Rectification circuit

Abstract

To provide a rectification circuit that can improve efficiency.SOLUTION: In a rectification circuit 10, which rectifies AC power to DC power, a rectifying element (first rectifying element D1) rectifies the AC power. An impedance circuit 14a is connected in parallel to the rectifying element. The impedance circuit 14a includes an inductive element and a capacitive element connected in series, and is open in terms of DC.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to a rectifier circuit. [Background technology]

[0002] In recent years, wireless power transmission systems have been developed. A rectifier circuit that converts AC power to DC power is provided in the wireless power transmission system. For example, Non-Patent Document 1 discloses a rectifier circuit that operates at 2.45 GHz. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Cheng Peng, Zhihao Ye, Jianhua Wu, Cheng Chen and Zerun Wang, "Design of a Wide-Dynamic RF-DC Rectifier Circuit Based on an Unequal Wilkinson Power Divider", Electronics, 2021, 10, 2815 Summary of the Invention [Problem to be solved by the invention]

[0004] In a rectifier circuit, the efficiency of conversion from AC power to DC power (hereinafter referred to as efficiency) decreases due to the presence of parasitic capacitance in the rectifier element. The larger the parasitic capacitance of the rectifier element is, and the higher the frequency of the AC power is, the greater the efficiency decrease due to the parasitic capacitance of the rectifier element is. It is desirable to improve the efficiency in a rectifier circuit.

[0005] The present disclosure has been made in view of the above problems, and one of the exemplary objectives thereof is to provide a rectifier circuit capable of improving efficiency. [Means for solving the problem]

[0006] In order to solve the above problems, a rectifier circuit according to an embodiment of the present disclosure is a rectifier circuit for rectifying AC power into DC power, and includes a rectifier element for rectifying the AC power, and an impedance circuit connected in parallel to the rectifier element. The impedance circuit includes an inductive element and a capacitive element connected in series, and is open in terms of DC.

[0007] Any combination of the above components, or mutual substitution of the components or expressions of the present disclosure between methods, systems, etc., are also valid aspects of the present disclosure. Effect of the Invention

[0008] According to the present disclosure, a rectifier circuit capable of improving efficiency can be provided. [Brief description of the drawings]

[0009] [Figure 1] 1(a) to (c) are circuit diagrams of various rectifier circuits of comparative examples. [Diagram 2] 2(a) and (b) are circuit diagrams of various rectifier circuits of comparative examples. [Diagram 3] 3(a) and (b) are diagrams for explaining the operation of the rectifier circuit of FIG. 1(a). [Figure 4] 4(a) and (b) are diagrams for explaining the operation of the rectifier circuit of FIG. 1(a). [Diagram 5] 5(a) to (c) are waveform diagrams of current and voltage at each portion of the rectifier circuit of FIG. 1(a). [Figure 6] FIG. 6(a) is a diagram showing the RL dependence of the output power and efficiency of the rectifier circuit of FIG. 1(a), and FIG. 6(b) is a diagram showing the RL dependence of the output power and efficiency in the rectifier circuit of FIG. 1(a) when it is assumed that there is no parasitic capacitance of the rectifier element. [Figure 7] 1 is a circuit diagram of a rectifier circuit according to an embodiment; [Figure 8] 8(a) and (b) are circuit diagrams of the impedance circuit of FIG. [Figure 9]9(a) and (b) are diagrams for explaining the operation of the rectifier circuit of FIG. [Figure 10] 10(a) and (b) are diagrams for explaining the operation of the rectifier circuit of FIG. [Figure 11] 11(a) to (d) are waveform diagrams of current and voltage at each portion of the rectifier circuit of FIG. [Figure 12] 12(a) and 12(b) are diagrams showing the Lp dependence of the output power, efficiency, etc. of the rectifier circuit of FIG. [Figure 13] 13(a) and (b) are diagrams showing the dependency of the optimum RL and optimum Lp of the rectifier circuit of FIG. 7 on the parasitic capacitance Cd. [Figure 14] FIG. 14(a) is a diagram showing the Lp dependence of the output power and efficiency, etc. of a rectifier circuit of a first modified example of an embodiment, and FIG. 14(b) is a diagram showing the Lp dependence of the output power and efficiency, etc. of a rectifier circuit of a second modified example of an embodiment. [Figure 15] FIG. 15(a) is a circuit diagram of a rectifier circuit having a bridge topology according to an embodiment, and FIG. 15(b) is a circuit diagram of another rectifier circuit having a bridge topology according to an embodiment. [Figure 16] FIG. 16(a) is a diagram showing the Lp dependence of the output power and efficiency of the rectifier circuit of FIG. 15(a), and FIG. 16(b) is a diagram showing the Lp dependence of the output power and efficiency of a rectifier circuit of a modified bridge topology. [Figure 17] FIG. 2 is a circuit diagram of a rectifier circuit of a current doubler topology according to an embodiment. [Figure 18] FIG. 18(a) is a diagram showing the Lp dependency of the output power and efficiency of the rectifier circuit of FIG. 17, and FIG. 18(b) is a diagram showing the Lp dependency of the output power and efficiency of the rectifier circuit of the modified example. [Figure 19] 1 is a circuit diagram of a rectifier circuit of a single shunt topology using a λ / 4 line according to an embodiment. [Figure 20] FIG. 20 is a diagram showing the Lp dependency of the output power, efficiency, etc. of the rectifier circuit of FIG. 19. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The present inventors have studied rectifier circuits and have obtained the following findings: Figures 1(a) to (c) and Figures 2(a) and (b) are circuit diagrams of various rectifier circuits as comparative examples.

[0011] Fig. 1(a) shows a comparative example of a voltage doubler topology rectifier circuit 100. Fig. 1(b) shows a comparative example of a bridge topology rectifier circuit 100A. Fig. 1(c) shows another comparative example of a bridge topology rectifier circuit 100B.

[0012] Fig. 2(a) shows a rectifier circuit 100C of a current doubler topology as a comparative example, and Fig. 2(b) shows a rectifier circuit 100D of a single shunt topology using a λ / 4 line 20 as a comparative example.

[0013] The rectifier circuits 100, 100A, 100B, 100C, and 100D each rectify AC power supplied from an AC signal source Vs via a signal source impedance Rs into DC power, and supply the rectified DC power to a load resistor R. These various rectifier circuits 100, 100A, 100B, 100C, and 100D have known configurations, and detailed descriptions thereof will be omitted.

[0014] As described above, the presence of parasitic capacitance of the rectifier elements reduces efficiency in these various rectifier circuits 100, 100A, 100B, 100C, and 100D. As an example, the efficiency of the rectifier circuit 100 in Fig. 1(a) will be considered below. The rectifier circuit 100 includes a harmonic control circuit 12, a first rectifier element D1, a second rectifier element D2, a parasitic capacitance Cd1 of the first rectifier element D1, a parasitic capacitance Cd2 of the second rectifier element D2, and a smoothing capacitor Co.

[0015] Figures 3(a), (b) and Figures 4(a), (b) are diagrams for explaining the operation of the rectifier circuit 100 of Figure 1(a). Figures 5(a) to (c) are waveform diagrams of current and voltage at each part of the rectifier circuit 100 of Figure 1(a). Figures 5(a) to (c) show the results of a simulation of the rectifier circuit 100.

[0016] Hereinafter, the first rectifier element D1 and the second rectifier element D2 will be collectively referred to as "rectifier elements" as appropriate. The parasitic capacitances Cd1 and Cd2 will be collectively referred to as "parasitic capacitance Cd" as appropriate. The symbols attached to the elements may also represent the values ​​of the elements. For example, the value of the parasitic capacitance Cd1 will be referred to as Cd1, the value of the parasitic capacitance Cd2 will be referred to as Cd2, and the value of the parasitic capacitance Cd will be referred to as Cd. It is assumed that Cd1 and Cd2 are equal. The AC voltage supplied from the signal source Vs will be referred to as Vs.

[0017] The voltage of the connection node between the cathode of the first rectifier element D1 and the anode of the second rectifier element D2 is defined as Vd. The current flowing through the harmonic control circuit 12, i.e., the current flowing through the signal source impedance Rs, is defined as the input current Iin. The current flowing through the first rectifier element D1 is defined as Id1, the current flowing through the second rectifier element D2 is defined as Id2, the current flowing through the parasitic capacitance Cd1 is defined as Icd1, and the current flowing through the parasitic capacitance Cd2 is defined as Icd2. The polarity of currents Icd1 and Icd2 is defined as positive in the direction corresponding to the forward direction of the rectifier elements. The sum of currents Id1 and Icd1 is defined as current Ip (the polarity is opposite to that of currents Id1 and Icd1). The sum of currents Id2 and Icd2 is defined as current Is.

[0018] Fig. 5(a) shows the waveforms of AC voltage Vs and voltage Vd. Fig. 5(b) shows the waveform of input current Iin. Fig. 5(c) shows the waveforms of currents Id1, Id2, Icd1, and Icd2. Outputs Vout and Iout are DC (constant values).

[0019] 3 to 5, a period during which the first rectifying element D1 is off and the second rectifying element D2 is on is referred to as "period A." A period following period A during which the first rectifying element D1 is off and the second rectifying element D2 is off is referred to as "period B." A period during which the first rectifying element D1 is on and the second rectifying element D2 is off is referred to as "period C." A period following period C during which the first rectifying element D1 is off and the second rectifying element D2 is off is referred to as "period D."

[0020] (Period A) 3(a) and 5, during period A, the input current Iin flows through the second rectifier element D2, and this input current Iin injects charge into the capacitor Co. Since the voltage Vd is equal to Vout and constant, the voltages across the first rectifier element D1 and the second rectifier element D2 are also constant, and no current flows through the parasitic capacitances Cd1 and Cd2.

[0021] (Period B) As shown in Figures 3(b) and 5, in period B, the dV / dt current when the voltage Vd drops, that is, the current Icd2 according to Cd2 (dV / dt), flows, causing the charge to be discharged from the capacitor Co. Half the current of the input current Iin becomes the current Ip and current Is, respectively.

[0022] (Period C) As shown in FIGS. 4(a) and 5, in period C, the second rectifier element D2 is off, and the currents Icd1 and Icd2 are zero as in period A, so that no charge is injected into or released from the capacitor Co.

[0023] (Period D) 4(b) and 5, in period D, the dV / dt current when the voltage Vd rises, that is, the current Icd1 according to Cd1(dV / dt) flows, and charge is injected into the capacitor Co. As in period B, half the input current Iin becomes the currents Ip and Is, respectively.

[0024] Since the injection and extraction of charges into and from the capacitor Co during periods B and D cancel each other out, they do not contribute to the DC power that is output.

[0025] Here, in each of periods B and D, the first rectifier element D1 and the second rectifier element D2 are off, so that the effective conduction angle of the first rectifier element D1 and the second rectifier element D2 decreases, the output power decreases, and the efficiency also decreases. The larger the parasitic capacitance Cd of the rectifier element is, and the higher the frequency of the AC power is, the greater the decrease in efficiency due to the parasitic capacitance Cd is.

[0026] FIG. 6(a) shows the RL dependence of the output power and efficiency of the rectifier circuit 100 of FIG. 1(a). Here, the results of simulating the rectifier circuit 100 are shown, assuming that the frequency of the AC power is 5.8 GHz, the AC power is 4 W, the signal source impedance Rs is 50 Ω, and the parasitic capacitance Cd is 200 fF. The rectifier element is assumed to be ideal, and its resistance component is substantially zero. As shown in FIG. 6(a), the output power and efficiency change depending on the load resistance RL, but the efficiency is approximately 74% at maximum.

[0027] FIG. 6(b) shows the RL dependence of the output power and efficiency when it is assumed that there is no parasitic capacitance Cd of the rectifier element in the rectifier circuit 100 of FIG. 1(a). The simulation conditions are the same as those in FIG. 6(a). As shown in FIG. 6(b), the efficiency is approximately 100% at maximum. This also shows that the efficiency decreases due to the influence of the parasitic capacitance Cd.

[0028] Similarly, the efficiency of the rectifier circuits 100A, 100B, 100C, and 100D having different topologies is reduced due to the parasitic capacitance Cd of the rectifier element.

[0029] Based on these findings, the inventors conducted extensive research and discovered that by connecting an impedance circuit in which a capacitive element and an inductive element are connected in series across a rectifier element, the output power of the rectifier circuit can be increased, thereby improving efficiency. The present embodiment was devised based on such findings, and the specific configuration thereof will be described below.

[0030] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the description, the same elements are denoted by the same reference numerals, and duplicated description will be omitted as appropriate.

[0031] 7 is a circuit diagram of a rectifier circuit 10 according to an embodiment. The rectifier circuit 10 rectifies AC power supplied from an AC signal source Vs via a signal source impedance Rs into DC power, and supplies the rectified DC power to a load resistance RL. The frequency band of the AC power is not particularly limited, and may be, for example, a kilohertz band, a megahertz band, a gigahertz band, or a terahertz band. The application of the rectifier circuit 10 is not particularly limited, and the rectifier circuit 10 may be used, for example, in a wireless power transmission system to rectify AC power received by an antenna.

[0032] The rectifier circuit 10 includes a harmonic control circuit 12, a first rectifier element D1, a second rectifier element D2, a parasitic capacitance Cd1, a parasitic capacitance Cd2, an impedance circuit 14a, an impedance circuit 14b, and a smoothing capacitor Co. Hereinafter, the impedance circuit 14a and the impedance circuit 14b will be collectively referred to as the "impedance circuit 14" as appropriate.

[0033] The rectifier circuit 10 has a voltage doubler topology. The rectifier circuit 10 further includes an impedance circuit 14a and an impedance circuit 14b in addition to the rectifier circuit 100 having a voltage doubler topology of the comparative example.

[0034] The harmonic control circuit 12 is connected in series to the signal source Vs and the signal source impedance Rs on the input side. The signal source impedance Rs is connected to one end of the harmonic control circuit 12, and AC power is supplied to the harmonic control circuit 12. The harmonic control circuit 12 is substantially open to a predetermined harmonic component of the AC power, and has the effect of making the voltage Vd closer to a square wave. The harmonic control circuit 12 has a capacitor C1 and an inductor L1 connected in series. The values ​​of the capacitor C1 and the inductor L1 can be appropriately determined by experiment or simulation. The harmonic control circuit 12 has a known configuration, so further detailed description is omitted.

[0035] The first rectifier element D1 and the second rectifier element D2 each rectify the AC power. Each of the first rectifier element D1 and the second rectifier element D2 is, for example, a diode.

[0036] The cathode of the first rectifier element D1 is connected to the other end of the harmonic control circuit 12. The anode of the first rectifier element D1 is connected to ground.

[0037] The anode of the second rectifier element D2 is also connected to the other end of the harmonic control circuit 12. The cathode of the second rectifier element D2 is connected to one end of the output-side capacitor Co. In this manner, the first rectifier element D1 and the second rectifier element D2 are each connected between a different pair of nodes.

[0038] The other end of the capacitor Co is connected to ground. A load resistor RL is connected in parallel to the capacitor Co.

[0039] The parasitic capacitance Cd1 is a parasitic capacitance between the anode and cathode of the first rectifier element D1, and is connected in parallel to the first rectifier element D1. The parasitic capacitance Cd2 is a parasitic capacitance between the anode and cathode of the second rectifier element D2, and is connected in parallel to the second rectifier element D2. For example, the parasitic capacitances Cd1 and Cd2 have the same value, which is Cd.

[0040] The impedance circuit 14a has a node A and a node B, and is connected in parallel to the first rectifying element D1. The impedance circuit 14b has a node A and a node B, and is connected in parallel to the second rectifying element D2.

[0041] Figures 8(a) and (b) are circuit diagrams of the impedance circuit 14 of Figure 7. The impedance circuit 14 includes an inductive element and a capacitive element connected in series between nodes A and B. Figure 8(a) shows an example in which the inductive element is an inductor Lp and the capacitive element is a capacitor Cp.

[0042] 8(b) shows an example in which the inductive element is a transmission line 16 and the capacitive element is a capacitor Cp. The width and length of the transmission line 16 can be appropriately determined by experiment or simulation so as to obtain a desired inductance.

[0043] In the illustrated example, the capacitive element is connected to the node A side, and the inductive element is connected to the node B side, but the reverse may be true.

[0044] The impedance circuit 14 is open in terms of DC, that is, the impedance of the impedance circuit 14 in terms of DC is an open impedance.

[0045] The impedance circuit 14a, one of whose nodes is grounded, may be an open stub. In this case, the open stub is connected to the cathode of the first rectifier element D1. The open stub is designed to function equivalently as an inductive element and a capacitive element connected in series between the cathode of the first rectifier element D1 and the ground at the frequency of the AC power.

[0046] Hereinafter, an example will be described in which the two impedance circuits 14 each have the configuration shown in Fig. 8(a). In the impedance circuit 14a, the inductor Lp may be called inductor Lp1, and the capacitor Cp may be called capacitor Cp1. In the impedance circuit 14b, the inductor Lp may be called inductor Lp2, and the capacitor Cp may be called capacitor Cp2. As an example, the values ​​of the capacitors Cp1 and Cp2 are equal and are denoted as Cp. The values ​​of the inductors Lp1 and Lp2 are equal and are denoted as Lp.

[0047] Figures 9(a), (b) and Figures 10(a), (b) are diagrams for explaining the operation of the rectifier circuit 10 of Figure 7. Figures 11(a) to (d) are waveform diagrams of current and voltage at each portion of the rectifier circuit 10 of Figure 7. Figures 11(a) to (d) show simulation results of the rectifier circuit 10.

[0048] The definitions of Vs, Vd, Iin, Id1, Id2, Icd1, Icd2, Ip, and Is are the same as those in the comparative example. The current flowing through the inductor Lp1 is ILp1, and the current flowing through the inductor Lp2 is ILp2. The voltage at one end of the capacitor Co is the output voltage Vout. The output voltage Vout is a direct current.

[0049] Fig. 11(a) shows the waveforms of AC voltage Vs and voltage Vd. Fig. 11(b) shows the waveform of input current Iin. Fig. 11(c) shows the waveforms of currents Id1, Id2, Icd1, and Icd2. Fig. 11(d) shows the waveforms of currents ILp1 and ILp2.

[0050] The polarities of the currents Icd1, Icd2, ILp1, and ILp2 are positive in a direction corresponding to the forward direction of the rectifying elements.

[0051] As shown in FIG. 11(a), the operations of the first rectifier element D1 and the second rectifier element D2 are complementary, so the DC component of the voltage Vd is Vout / 2. <vd>Let av be the voltage across capacitor Cp1 be Vc1, and let the voltage across capacitor Cp2 be Vc2.

[0052] Since the average voltage across each of the inductors Lp1 and Lp2 is zero, Vc1 = <vd>av=Vout / 2、Vc2=Vout- <vd>av=Vout / 2. Therefore, a DC component of Vc=Vout / 2 is generated between both ends of each of the capacitors Cp1 and Cp2 in period A with the polarity shown in FIG.

[0053] Since the characteristics can be optimized by adjusting the inductor Lp for any value of the capacitor Cp, here, each of the capacitors Cp1 and Cp2 is regarded as a DC power supply with a voltage Vout / 2.

[0054] If the capacitors Cp1 and Cp2 are regarded as DC power supplies, then the inductors Lp1 and Lp2 are driven by a DC voltage of Vout / 2, regardless of whether the first rectifier element D1 and the second rectifier element D2 are on or off. This drive causes the currents ILp1 and ILp2 to increase or decrease.

[0055] The values ​​of the inductors Lp1 and Lp2 are set so that the currents ILp1 and ILp2 are each injected into the capacitor Co at an appropriate timing, and the current injected into the capacitor Co during one period is positive.

[0056] In periods B and D shown in Fig. 9(b), Fig. 10(b), and Fig. 11, the operation seen from outside the circuit is the same as in the comparative example described above. As in the comparative example, the injection and loss of charge in capacitor Co cancel each other out in periods B and D. Inside the circuit, a current ILp1, which is the resonant frequency fr component of inductor Lp and parasitic capacitance Cd (resonant frequency component of the series loop of inductor Lp, capacitor Cp, and parasitic capacitance Cd for an arbitrary value of capacitor Cp), circulates through the loop of capacitor Cp1, inductor Lp1, and parasitic capacitance Cd1, and a current ILp2, which is the resonant frequency fr component, circulates through the loop of capacitor Cp2, inductor Lp2, and parasitic capacitance Cd2.

[0057] In the period A shown in FIG. 9(a) and FIG. 11, in addition to the current Iin, a current ILp1 is injected into the capacitor Co. The average of the current ILp1 is <ilp1>In this period A, as shown in FIG. <ilp1>Since av is greater than 0, the amount of charge injected into the capacitor Co is greater than in the comparative example where only the current Iin is applied.

[0058] In the period C shown in FIG. 10(a) and FIG. 11, the current ILp2 is injected into the capacitor Co. As described above, in the comparative example, no charge is injected into the capacitor Co in this period C. The average of the current ILp2 is <ilp2>In this period C, as shown in FIG. <ilp2>Since av is greater than 0, the amount of charge injected into the capacitor Co is greater than in the comparative example.

[0059] Due to the charge injection into the capacitor Co in the periods A and C, the voltage Vout across the capacitor Co becomes higher than in the comparative example, that is, the output power becomes larger and the efficiency improves.

[0060] A DC output current Iout flows from the capacitor Co to the load resistance RL.

[0061] Figures 12(a) and (b) show the Lp dependence of the output power, efficiency, etc. of the rectifier circuit 10 of Figure 7. Figure 12(a) shows the characteristics when Cp=1 pF, and Figure 12(b) shows the characteristics when Cp=1000 pF.

[0062] These show the results of simulating the rectifier circuit 10 with the AC power frequency set to 5.8 GHz, the AC power set to 4 W, the signal source impedance Rs set to 50 Ω, the load resistance RL set to 270 Ω, and the parasitic capacitance Cd set to 200 fF. Also, the rectifier element is assumed to be ideal, and its resistance component is substantially zero.

[0063] 12(a), when Cp=1pF, Lp=3.1nH, the efficiency reaches a maximum of about 100%. At this time, the resonant frequency Fres_LpCd of the inductor Lp and the parasitic capacitance Cd is about 6.39GHz, and the resonant frequency Fres_LpCpCd of the inductor Lp, the capacitor Cp, and the parasitic capacitance Cd is about 7.00GHz. If Lp=1.95nH or more, the efficiency is improved compared to the rectifier circuit 100 of the comparative example.

[0064] The resonant frequency Fres_LpCd represents the resonant frequency when it is assumed that the inductor Lp1 and the parasitic capacitance Cd1 form a series resonant circuit, and the resonant frequency when it is assumed that the inductor Lp2 and the parasitic capacitance Cd2 form a series resonant circuit.

[0065] The resonant frequency Fres_LpCpCd represents, for example, the resonant frequency of a circuit loop formed by the inductor Lp1, the capacitor Cp1, and the parasitic capacitance Cd1, and the resonant frequency of a circuit loop formed by the inductor Lp2, the capacitor Cp2, and the parasitic capacitance Cd2, as shown in Figures 9(b) and 10(b), respectively.

[0066] As shown in FIG. 12(b), when Cp=1000pF and Lp=2.4nH, the efficiency reaches a maximum of approximately 100%. At this time, the resonant frequency Fres_LpCd of Lp and Cd is approximately 7.26GHz. Although not shown, the resonant frequency Fres_LpCd is approximately equal to the resonant frequency Fres_LpCpCd. If Lp=1.2nH or more, the efficiency is improved compared to the rectifier circuit 100 of the comparative example.

[0067] In this way, there exists an optimal inductor Lp for any capacitor Cp, and efficiency can be made approximately 100%.

[0068] Figures 13(a) and (b) show the parasitic capacitance Cd dependence of the optimum RL and optimum Lp of the rectifier circuit 10 of Figure 7. Figure 13(a) also shows the resonant frequency Fres_LpCd of the inductor Lp and the parasitic capacitance Cd, the resonant frequency Fres_LpCpCd of the impedance circuit 14 and the parasitic capacitance Cd, the minimum value LowestLp of the inductor Lp at which the efficiency is improved compared to the comparative example, and the resonant frequency Fres_LpCp of the impedance circuit 14.

[0069] Fig. 13(b) also shows the resonant frequency Fres_LpCd and the minimum value LowestLp of the inductor Lp at which the efficiency is improved compared to the comparative example. Fig. 13(a) shows the characteristics when Cp=1 pF, and Fig. 13(b) shows the characteristics when Cp=1000 pF.

[0070] These show the results of a simulation using the above-mentioned values ​​for the AC power frequency, AC power, and signal source impedance Rs.

[0071] In FIG. 13(b), the resonant frequency Fres_LpCpCd is substantially equal to the resonant frequency Fres_LpCpCd, so the resonant frequency Fres_LpCpCd is omitted from illustration.

[0072] The resonant frequency Fres_LpCd, the resonant frequency Fres_LpCpCd, and the resonant frequency Fres_LpCp are each calculated using the optimal Lp for each parasitic capacitance Cd.

[0073] As shown in FIG. 13(a), the resonant frequency Fres_LpCp of the impedance circuit 14 may be lower than twice the frequency fo of the AC power. This relationship is called the first frequency relationship. In this example, twice the frequency fo of the AC power is 11.6 GHz. In the illustrated range of parasitic capacitance Cd, the first frequency relationship is satisfied for the optimal Lp. Although not illustrated, the first frequency relationship is also satisfied for the optimal Lp when Cp=1000 pF. By setting the inductor Lp and the capacitor Cp to satisfy the first frequency relationship, the efficiency can be improved.

[0074] As shown in Fig. 13(a) and (b), the resonant frequency Fres_LpCpCd of the impedance circuit 14 and the parasitic capacitance Cd of the rectifying element may be higher than the frequency fo of the AC power. This relationship is called the second frequency relationship. In the parasitic capacitance Cd in the illustrated range, the second frequency relationship is satisfied for the optimal Lp. By setting the inductor Lp and the capacitor Cp to satisfy the second frequency relationship, the efficiency can be improved. Both the first frequency relationship and the second frequency relationship may be satisfied.

[0075] As described above, according to the embodiment, in the period A in which the first rectifier element D1 is non-conductive and the second rectifier element D2 is conductive, the impedance circuit 14a can supply to the output side not only the current Id2 flowing through the second rectifier element D2 but also the current ILp1 flowing through the inductor Lp1 of the impedance circuit 14a. In addition, in the period C in which the first rectifier element D1 is conductive and the second rectifier element D2 is non-conductive, the impedance circuit 14b can also supply to the output side the current ILp2 flowing through the inductor Lp2 of the impedance circuit 14b. Therefore, the output power can be increased and the efficiency can be improved compared to the rectifier circuit 100 of the comparative example in which the impedance circuit 14 is not connected to both ends of the rectifier element.

[0076] Assuming there is no resistance component, 100% efficiency can be achieved even if the parasitic capacitance Cd of the rectifier element is present. In other words, by setting the inductor Lp to an appropriate value, it is possible to eliminate the decrease in efficiency caused by the parasitic capacitance Cd of the rectifier element.

[0077] In the comparative example, the larger the parasitic capacitance Cd of the rectifier element is, and the higher the frequency of the AC power is, the greater the efficiency reduction due to the parasitic capacitance Cd is. In the embodiment, the efficiency can be made 100% by appropriately setting the inductor Lp for any parasitic capacitance Cd and any frequency of the AC power. Therefore, the larger the parasitic capacitance Cd of the rectifier element is, and the higher the frequency of the AC power is, the greater the improvement in efficiency is.

[0078] Moreover, efficiency can be improved by simply adding two impedance circuits 14 to the configuration of the comparative example, and since the configuration of the impedance circuits 14 is also simple, the circuit configuration does not become excessively complicated and the increase in circuit area is relatively small.

[0079] 7, one impedance circuit 14 is connected to each of the first rectifying element D1 and the second rectifying element D2, but this is not limiting, and an impedance circuit 14 may be connected in parallel to either the first rectifying element D1 or the second rectifying element D2, and not connected in parallel to the other. In other words, the number of impedance circuits 14 may be less than the number of rectifying elements.

[0080] FIG. 14(a) shows the Lp dependency of the output power and efficiency of the rectifier circuit 10 of the first modified example of the embodiment. The first modified example differs from the rectifier circuit 10 of FIG. 7 in that the impedance circuit 14 is connected in parallel only to the first rectifier element D1. The simulation conditions such as the frequency of the AC power are the same as those in FIG. 12. Cp=1000 pF. As shown in FIG. 14(a), when Lp=1.6 nH, the efficiency is at a maximum of about 100%. Although not shown, the same result can be obtained even if the impedance circuit 14 is connected in parallel only to the second rectifier element D2. In this way, the efficiency can be improved compared to the comparative example even if the impedance circuit 14 is not connected to all the rectifier elements. In addition, the number of parts can be reduced compared to the configuration of FIG. 7, and the circuit configuration can be simplified.

[0081] Moreover, the rectifier circuit 10 may not have the harmonic control circuit 12. FIG. 14(b) shows the Lp dependency of the output power and efficiency of the rectifier circuit 10 of the second modified example of the embodiment. The second modified example differs from the rectifier circuit 10 of FIG. 7 in that the harmonic control circuit 12 is not provided. The simulation conditions such as the frequency of the AC power are the same as those in FIG. 12. As shown in FIG. 14(b), when Lp=2.7nH, the efficiency is approximately 95% of the maximum. Although the maximum efficiency is lower than the maximum efficiency of the embodiment due to the influence of harmonics, the efficiency can be improved compared to the comparative example having the harmonic control circuit 12 even without the harmonic control circuit 12. Moreover, the number of components can be reduced compared to the configuration of FIG. 7, and the circuit configuration can be simplified.

[0082] The first and second modified examples may be combined, in which case the number of parts can be further reduced compared to the configuration in FIG.

[0083] Here, the circuit topology of the rectifier circuit is not limited to the voltage doubler topology described above. For example, in rectifier circuits of various circuit topologies having at least one rectifier element as illustrated in the comparative example, the efficiency can be improved by connecting the impedance circuit 14 between both ends of the rectifier element. In the case of a rectifier circuit having multiple rectifier elements, the efficiency can be improved by individually connecting the impedance circuit 14 between both ends of at least one rectifier circuit among the multiple rectifier elements. Assuming that there is no resistance component, 100% efficiency can be achieved.

[0084] Another configuration example of the rectifier circuit 10 will be described below, focusing on the differences from the configuration in Fig. 7. Note that the impedance circuit 14 may be applied to a rectifier circuit having a circuit topology other than those described below.

[0085] FIG. 15(a) is a circuit diagram of a bridge topology rectifier circuit 10A according to an embodiment. The rectifier circuit 10A is a capacitor smoothing output type. In addition to the configuration of the rectifier circuit 10, the rectifier circuit 10A further includes a third rectifier element D3, a fourth rectifier element D4, an impedance circuit 14c, and an impedance circuit 14d. Hereinafter, the impedance circuits 14a, 14b, 14c, and 14d are collectively referred to as the "impedance circuit 14" as appropriate. It can be said that the rectifier circuit 10A further includes four impedance circuits 14 compared to the rectifier circuit 100A of the comparative example.

[0086] The first rectifier element D1 to the fourth rectifier element D4 each rectify the AC power. The first rectifier element D1 to the fourth rectifier element D4 are, for example, diodes.

[0087] The anode of the second rectifier element D2 is connected to the other end of the harmonic control circuit 12. The cathode of the second rectifier element D2 is connected to one end of the capacitor Co.

[0088] The cathode of the third rectifier element D3 is also connected to the other end of the harmonic control circuit 12. The anode of the third rectifier element D3 is connected to the other end of the capacitor Co.

[0089] The cathode of the first rectifying element D1 is also connected to one end of the capacitor Co. The anode of the first rectifying element D1 is connected to ground.

[0090] The anode of the fourth rectifier element D4 is also connected to the other end of the capacitor Co. The cathode of the fourth rectifier element D4 is connected to ground.

[0091] The parasitic capacitance Cd3 is a parasitic capacitance between the anode and cathode of the third rectifier element D3, and is connected in parallel to the third rectifier element D3. The parasitic capacitance Cd4 is a parasitic capacitance between the anode and cathode of the fourth rectifier element D4, and is connected in parallel to the fourth rectifier element D4. For example, the parasitic capacitances Cd1, Cd2, Cd3, and Cd4 have the same value, which is Cd.

[0092] The impedance circuit 14c is connected in parallel to the third rectifying element D3, and the impedance circuit 14d is connected in parallel to the fourth rectifying element D4.

[0093] FIG. 15(b) is a circuit diagram of another rectifier circuit 10B of the bridge topology of the embodiment. The rectifier circuit 10B is an inductor smoothing output type. The rectifier circuit 10B includes a harmonic control circuit 13 instead of the harmonic control circuit 12 in the configuration of the rectifier circuit 10A of FIG. 15(a), and includes a smoothing inductor Lo instead of the capacitor Co. The capacitor Co smoothes the voltage, while the inductor Lo smoothes the current. It can be said that the rectifier circuit 10B further includes four impedance circuits 14 compared to the voltage doubler topology rectifier circuit 100B of the comparative example. The following mainly describes the differences from the rectifier circuit 10A.

[0094] The harmonic control circuit 13 is connected in parallel to the signal source Vs and the signal source impedance Rs. One end of the harmonic control circuit 13 is connected to the signal source impedance Rs, and the other end of the harmonic control circuit 13 is grounded. The harmonic control circuit 13 is substantially short-circuited with respect to a predetermined harmonic component of the AC power, and has the effect of making the current flowing through the first rectifier element D1 to the fourth rectifier element D4 closer to a rectangular wave. The harmonic control circuit 13 has a capacitor C1 and an inductor L1 connected in parallel. The values ​​of the capacitor C1 and the inductor L1 can be appropriately determined by experiment or simulation. The harmonic control circuit 13 has a known configuration, so further detailed description will be omitted.

[0095] The anode of the second rectifier element D2 and the cathode of the third rectifier element D3 are commonly connected to one end of the harmonic control circuit 13, i.e., to the signal source impedance Rs. The cathode of the first rectifier element D1 and the cathode of the second rectifier element D2 are commonly connected to one end of an inductor Lo. The inductor Lo smoothes the output current. The other end of the inductor Lo is connected to one end of a load resistor RL. The other end of the load resistor RL is commonly connected to the anode of the third rectifier element D3 and the anode of the fourth rectifier element D4.

[0096] Fig. 16(a) shows the Lp dependency of the output power and efficiency of the rectifier circuit 10A of Fig. 15(a). The load resistance RL is set to 65 Ω, and other simulation conditions are the same as those in Fig. 12. As shown in Fig. 16(a), when Lp = 1.85 nH, the efficiency reaches a maximum of about 100%.

[0097] Although the simulation results of the rectifier circuit 10B are not shown, similar results are obtained. The effects already described in the embodiment can be obtained in these bridge topology configuration examples as well.

[0098] Fig. 16(b) shows the Lp dependency of the output power and efficiency of the rectifier circuit 10A of the modified bridge topology. The rectifier circuit 10A differs from the rectifier circuit 10A of Fig. 15(a) in that the impedance circuit 14 is connected in parallel only to the second rectifier element D2 and the fourth rectifier element D4. The simulation conditions are the same as those in Fig. 16(a). As shown in Fig. 16(b), when Lp = 0.95 nH, the efficiency is at its maximum of about 100%.

[0099] It is sufficient that at least one impedance circuit 14 is provided. In other words, efficiency can be improved if the impedance circuit 14 is individually connected in parallel to at least one of the four rectifying elements. The rectifying elements to which the impedance circuit 14 is connected in parallel are arbitrary. For example, when connecting to two rectifying elements, the impedance circuit 14 may be connected in parallel to only the first rectifying element D1 and the third rectifying element D3, the impedance circuit 14 may be connected in parallel to only the first rectifying element D1 and the second rectifying element D2, or the impedance circuit 14 may be connected in parallel to only the first rectifying element D1 and the fourth rectifying element D4.

[0100] 17 is a circuit diagram of a rectifier circuit 10C of a current doubler topology according to the embodiment. The rectifier circuit 10C includes a harmonic control circuit 13 instead of the harmonic control circuit 12 and an inductor Lo instead of the capacitor Co in the configuration of the rectifier circuit 10. It can also be said that the rectifier circuit 10C further includes two impedance circuits 14 in addition to the rectifier circuit 100C of the comparative example.

[0101] The harmonic control circuit 13 is connected in parallel to the signal source Vs and the signal source impedance Rs. The anode of the second rectifier element D2 is connected to one end of the harmonic control circuit 13.

[0102] The cathode of the first rectifier element D1 and the cathode of the second rectifier element D2 are commonly connected to one end of an inductor Lo. The inductor Lo smoothes the output current. The other end of the inductor Lo is connected to one end of a load resistor RL. The other end of the load resistor RL is connected to the anode of the first rectifier element D1 and is also grounded.

[0103] Figure 18(a) shows the Lp dependency of the output power and efficiency of the rectifier circuit 10C of Figure 17. The load resistance RL is set to 10.2 Ω, and other simulation conditions are the same as those in Figure 12. As shown in Figure 18(a), when Lp = 2.3 nH, the efficiency reaches a maximum of approximately 99%.

[0104] In order to improve the convergence of the simulation, a resistance component is added to the rectifying element. Due to the effect of the resistance component, the maximum efficiency is reduced by about 1% compared to the results in Figure 12, etc., but if the resistance component is reduced, the efficiency approaches 100%.

[0105] FIG. 18(b) shows the Lp dependency of the output power and efficiency of a modified rectifier circuit 10C. This modified rectifier circuit is different from the rectifier circuit 10C of FIG. 17 in that an impedance circuit 14 is connected in parallel only to the first rectifier element D1. The simulation conditions are the same as those in FIG. 18(a). As shown in FIG. 18(b), when Lp=1.1 nH, the efficiency is at a maximum of about 99%. The efficiency can be similarly improved by connecting an impedance circuit 14 in parallel only to the second rectifier element D2.

[0106] 19 is a circuit diagram of a single-shunt topology rectifier circuit 10D using the λ / 4 line 20 of the embodiment. The rectifier circuit 10D includes the λ / 4 line 20 instead of the second rectifier element D2 in the configuration of the rectifier circuit 10, and does not include the impedance circuit 14b. It can also be said that the rectifier circuit 10D further includes the impedance circuit 14a in addition to the rectifier circuit 100D of the comparative example.

[0107] The λ / 4 line 20 is a transmission line having a length of λ / 4, where λ is the wavelength of the AC voltage Vs of the AC power. The λ / 4 line 20 is connected between the other end of the harmonic control circuit 12 and one end of a capacitor Co. The capacitor Co also serves to AC ground the λ / 4 line 20.

[0108] Fig. 20 shows the Lp dependency of the output power, efficiency, etc. of the rectifier circuit 10D of Fig. 19. The load resistance RL is set to 64 Ω, and other simulation conditions are the same as those in Fig. 12. As shown in Fig. 20, when Lp = 1.9 nH, the efficiency reaches a maximum of approximately 99.4%.

[0109] It should be noted that these rectifier circuits 10A, 10B, 10C, and 10D do not necessarily need to include the harmonic control circuits 12 and 13. In this case, the rectifier circuits can be simplified and the efficiency can be improved compared to the comparative example.

[0110] The present disclosure has been described above based on the embodiments. It will be understood by those skilled in the art that the present disclosure is not limited to the above embodiments, that various design changes are possible, that various modifications are possible, and that such modifications are also within the scope of the present disclosure.

[0111] For example, each of the first rectifier element D1 to the fourth rectifier element D4 may have a plurality of unit rectifier elements connected in series or in parallel. This modification improves the degree of freedom of the circuit configuration of the rectifier circuit. The degree of freedom includes, for example, the output power and the withstand voltage of the rectifier elements.

[0112] An overview of one aspect of the present disclosure is as follows: A rectifier circuit according to an aspect of the present disclosure is a rectifier circuit for rectifying AC power into DC power, and includes a rectifier element for rectifying the AC power and an impedance circuit connected in parallel to the rectifier element, the impedance circuit including an inductive element and a capacitive element connected in series, and is open in terms of DC.

[0113] According to this embodiment, since the current flowing through the inductive element of the impedance circuit is supplied to the output side during the period when the rectifier element is non-conducting, the output power can be increased, and the efficiency of the rectifier circuit can be improved.

[0114] The resonant frequency of the impedance circuit may be lower than twice the frequency of the AC power, thereby improving the efficiency of the rectifier circuit.

[0115] The resonant frequency of the impedance circuit and the parasitic capacitance of the rectifier element may be higher than the frequency of the AC power, thereby improving the efficiency of the rectifier circuit.

[0116] The rectifier circuit may include a plurality of the rectifier elements, and the plurality of rectifier elements may be connected between different pairs of nodes. In this case, efficiency can be improved in the rectifier circuit including the plurality of rectifier elements.

[0117] The rectifier circuit may include a plurality of the impedance circuits, and the impedance circuits may be individually connected in parallel to at least one of the plurality of rectifier elements. In this case, efficiency can be improved in the rectifier circuit including the plurality of rectifier elements.

[0118] The inductive element may be an inductor, and the capacitive element may be a capacitor, in which case the impedance circuit can be realized with a simple configuration.

[0119] The inductive element may be a transmission line, and the capacitive element may be a capacitor, which increases the degree of freedom in the configuration of the impedance circuit.

[0120] The rectifying element may have a plurality of unit rectifying elements connected in series or in parallel, which can improve the degree of freedom in circuit configuration.

[0121] The rectifier circuit may not be provided with a harmonic control circuit that is substantially short-circuited or open-circuited with respect to the harmonic components of the AC power, in which case the rectifier circuit can be simplified and its efficiency can be improved. [Explanation of symbols]

[0122] 10, 10A, 10B, 10C, 10D... rectifier circuit, 12, 13... harmonic control circuit, 14, 14a, 14b, 14c, 14d... impedance circuit, 16... transmission line, 20... λ / 4 line, Cd, Cd1, Cd2, Cd3, Cd4... parasitic capacitance, C1, Cp, Cp1, Cp2, Co... capacitor, D1... first rectifier element, D2... second rectifier element, D3... third rectifier element, D4... fourth rectifier element, L1, Lp, Lp1, Lp2, Lo... inductor. < / vd> < / vd> < / vd>

Claims

1. A rectifier circuit that rectifies AC power to DC power, A rectifying element that rectifies AC power; an impedance circuit connected in parallel to the rectifying element; Equipped with The impedance circuit includes an inductive element and a capacitive element connected in series, and is open in a direct current sense. A rectifier circuit comprising:

2. The resonant frequency of the impedance circuit is lower than twice the frequency of the AC power.

2. The rectifier circuit according to claim 1 .

3. a resonant frequency of the impedance circuit and the parasitic capacitance of the rectifying element is higher than a frequency of the AC power; 3. The rectifier circuit according to claim 1 or 2.

4. A plurality of the rectifying elements are provided, Each of the rectifying elements is connected between a different pair of nodes.

3. The rectifier circuit according to claim 1 or 2.

5. A plurality of the impedance circuits are provided, the impedance circuit is individually connected in parallel to at least one of the plurality of rectifying elements; 5. The rectifier circuit according to claim 4.

6. the inductive element is an inductor; the capacitive element is a capacitor; 3. The rectifier circuit according to claim 1 or 2.

7. the inductive element is a transmission line; the capacitive element is a capacitor; 3. The rectifier circuit according to claim 1 or 2.

8. The rectifying element has a plurality of unit rectifying elements connected in series or in parallel.

3. The rectifier circuit according to claim 1 or 2.

9. There is no harmonic control circuit that is substantially short-circuited or open-circuited with respect to the harmonic components of the AC power.

3. The rectifier circuit according to claim 1 or 2.

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