Wiring circuit board

The printed circuit board design with protrusions between wiring layers addresses the challenge of miniaturization and resistance by enhancing adhesion and cross-sectional area, achieving higher density and reliability.

JP2025003596AInactive Publication Date: 2025-01-09NITTO DENKO CORP
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Patent Information

Application Number
JP2024186594
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-10-23
Publication Date
2025-01-09
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The increasing size of semiconductor components on printed circuit boards and the demand for miniaturization lead to reduced wiring space, which results in decreased reliability and manufacturing yield when wire widths and spacing are made finer, while also requiring lower resistance in denser wiring.

Method used

A printed circuit board design featuring a first and second wiring layer with a protrusion extending into a second insulating layer, enhancing adhesion and increasing cross-sectional area to reduce electrical resistance and improve reliability.

Benefits of technology

The design achieves higher wiring density with lower resistance and improved reliability by effectively utilizing space between wiring layers and ensuring adhesion through protrusions, while avoiding short circuits.

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Abstract

To provide a wiring circuit board suitable for increasing the density while reducing the resistance of wiring.SOLUTION: A wiring circuit board X includes an insulating layer 11, a pair of wiring layers 21, 21, an insulating layer 12, and a wiring layer 22. The pair of wiring layers 21, 21 is arranged on the insulating layer 11 and extends side by side so as to be separated from each other. The insulating layer 12 is arranged on the insulating layer 11 so as to cover the pair of wiring layers 21, 21. The wiring layer 22 is arranged on the insulating layer 12 and extends along the pair of wiring layers 21, 21 while facing the pair of wiring layers 21, 21 in the thickness direction of the wiring layer 21. The wiring layer 22 includes a ridge portion 22A. The ridge portion 22A plunges into the insulating layer 12 toward a region G between the wiring layers 21, 21 and extends along the region G.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present invention relates to a wired circuit board. [Background technology]

[0002] Some semiconductor components mounted on wired circuit boards are becoming larger as their functionality improves. In addition, wired circuit boards are subject to size restrictions and may need to be reduced in size in order to reduce the size of the devices in which they are built. As a result, the space available for forming wiring on wired circuit boards tends to decrease.

[0003] In response to this trend, if the width and spacing of the wiring laid out on the same plane of the board is made finer, the reliability and manufacturing yield of the wiring circuit board are likely to decrease. Therefore, in order to deal with the reduction in the wiring formation space, it is being considered to form the wiring laid out on the board into two layers. Such technology for forming two layers of wiring is described, for example, in Patent Document 1 below. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2009-252816 A Summary of the Invention [Problem to be solved by the invention]

[0005] On the other hand, as wiring density in wiring boards increases, there is also a demand for lower resistance.

[0006] The present invention provides a wired circuit board suitable for achieving high density while reducing the resistance of wiring. [Means for solving the problem]

[0007] The present invention [1] includes a wired circuit board comprising: a first insulating layer; a pair of first wiring layers arranged on the first insulating layer and extending side by side with a space between them; a second insulating layer arranged on the first insulating layer so as to cover the pair of first wiring layers; and a second wiring layer arranged on the second insulating layer and extending along the pair of first wiring layers while facing the pair of first wiring layers in a thickness direction of the first wiring layer, wherein the second wiring layer has a protrusion portion that protrudes into the second insulating layer toward a region between the pair of first wiring layers and extends along the region.

[0008] As described above, the wired circuit board of the present invention includes a pair of first wiring layers and a second wiring layer extending along the first wiring layers while facing the first wiring layers. Such a wired circuit board is suitable for achieving high density wiring. In addition, as described above, the second wiring layer has a protrusion portion that protrudes into the second insulating layer toward the region between the first wiring layers and extends along the region. This configuration is suitable for effectively utilizing the space between the first wiring layers to increase the cross-sectional area of ​​the second wiring layer, and therefore is suitable for reducing the electrical resistance (reducing resistance). In addition, the protrusion portion of the second wiring layer helps to ensure adhesion of the second wiring layer to the second insulating layer by the anchor effect on the second insulating layer, and therefore is suitable for ensuring the reliability of the second wiring layer.

[0009] The present invention [2] includes the wired circuit board according to the above [1], wherein the protrusion portion has a non-flat top portion in a cross section in a width direction intersecting with the extension direction of the second wiring layer.

[0010] A configuration in which the protrusion portion has such a top helps to ensure adhesion of the second wiring layer to the second insulating layer due to the anchor effect of the protrusion portion to the second insulating layer, and is therefore suitable for ensuring the reliability of the second wiring layer.

[0011] The present invention [3] includes the wired circuit board described in [2] above, wherein the protrusion portion further has a first curved side surface arranged on one side of the apex in the width direction and recessed toward the inside of the second wiring layer, and a second curved side surface arranged on the other side of the apex in the width direction and recessed toward the inside of the second wiring layer.

[0012] The configuration in which the protrusion portion has such first and second curved side surfaces helps to ensure adhesion of the second wiring layer to the second insulating layer due to the anchor effect of the protrusion portion to the second insulating layer, and is therefore suitable for ensuring the reliability of the second wiring layer.

[0013] The present invention [4] includes the wired circuit board according to any one of [1] to [3] above, wherein the distance between the first wiring layer and the second wiring layer in the thickness direction is 2 μm or more and 20 μm or less.

[0014] Such a configuration is suitable for achieving a thinner printed circuit board while avoiding short circuits between the first wiring layer and the second wiring layer.

[0015] The present invention [5] includes the wired circuit board according to any one of the above [1] to [4], wherein the distance between the pair of first wiring layers is 5 μm or more and 30 μm or less.

[0016] Such a configuration is suitable for achieving high density wiring while avoiding short circuits between the first wiring layers. [Brief description of the drawings]

[0017] [Figure 1] 1 is a schematic plan view of one embodiment of a printed circuit board of the present invention. [Diagram 2] 1 is a cross-sectional view in a width direction of a multilayer wiring structure in one embodiment of the wired circuit board of the present invention. [Diagram 3] 1 is a partial cross-sectional view in an extension direction of a multilayer wiring structure in one embodiment of the wired circuit board of the present invention. [Figure 4] Some steps in a manufacturing method for one embodiment of a wired circuit board of the present invention are shown as changes in a cross section corresponding to Fig. 2. Fig. 4A shows a preparation step, Fig. 4B shows a first insulating layer forming step, and Fig. 4C shows a first conductor portion forming step. [Diagram 5]These show steps subsequent to the step shown in Fig. 4. Fig. 5A shows a second insulating layer forming step, Fig. 5B shows a second conductor portion forming step, and Fig. 5C shows a third insulating layer forming step. [Figure 6] Some steps in a manufacturing method for one embodiment of a wired circuit board of the present invention are shown as changes in a cross section corresponding to Fig. 3. Fig. 6A shows a preparation step, Fig. 6B shows a first insulating layer forming step, and Fig. 6C shows a first conductor portion forming step. [Figure 7] These show steps subsequent to the step shown in Fig. 6. Fig. 7A shows a second insulating layer forming step, Fig. 7B shows a second conductor portion forming step, and Fig. 7C shows a third insulating layer forming step. [Figure 8] 13 is a partial cross-sectional view of a multilayer wiring structure in an extension direction of a modified example of the printed circuit board. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] 1 to 3 show a wired circuit board X according to one embodiment of the present invention. Fig. 1 is a schematic plan view of the wired circuit board X. Fig. 2 is a cross-sectional view in the width direction of a multilayer wiring structure portion of the wired circuit board X. Fig. 3 is a partial cross-sectional view in the extension direction of the multilayer wiring structure portion of the wired circuit board X.

[0019] As shown in FIG. 1, the wired circuit board X has a component mounting area R1 and a surrounding wiring formation area R2. The component mounting area R1 is an area where mounted components such as semiconductor chips are arranged. The component mounting area R1 is provided with pads (not shown) for electrical connection with the mounted components. The wiring formation area R2 is formed by drawing a plurality of wirings (not shown). The plurality of wirings includes, for example, power supply wiring, signal wiring, and ground wiring. At least some of the plurality of wirings are electrically connected to terminals (not shown) for external connection provided in the wiring formation area R2. The wired circuit board X also includes a multilayer wiring structure portion shown in FIG. 2 and FIG. 3 in the wiring formation area R2.

[0020] The multilayer wiring structure is a wiring structure including wires extending side by side facing each other in the thickness direction, and includes an insulating layer 11 as a first insulating layer, an insulating layer 12 as a second insulating layer, an insulating layer 13 as a third insulating layer, a pair of wiring layers 21 as a pair of first wiring layers, and a wiring layer 22 as a second wiring layer. Figures 2 and 3 exemplarily show a multilayer wiring structure disposed on a substrate S.

[0021] The substrate S is an element for ensuring the rigidity of the wiring circuit board X, and is provided on the entire or partial region of the wiring circuit board X in the plan view shown in FIG.

[0022] When the wired circuit board X is configured as a flexible wired circuit board, the substrate S is, for example, a flexible metal support layer. Examples of the constituent material of the metal support layer include metal foil. Examples of the metal material of the metal foil include stainless steel, 42 alloy, copper, and copper alloy. Examples of stainless steel include SUS304 based on the standard of AISI (American Iron and Steel Institute). The thickness of the substrate S as the metal support layer is, for example, 15 μm or more, for example, 500 μm or less, preferably 250 μm or less.

[0023] When the wiring circuit board X is configured as a rigid wiring circuit board, the base material S is a rigid board. Examples of the rigid board include a glass epoxy board and a metal plate. The thickness of the base material S as a rigid board is, for example, 0.1 mm or more, for example, 2 mm or less, preferably 1.6 mm or less.

[0024] The insulating layer 11 is formed on one surface in the thickness direction of the base material S. Examples of materials constituting the insulating layer 11 include synthetic resins such as polyimide, polyethernitrile, polyethersulfone, polyethylene terephthalate, polyethylene naphthalate, and polyvinyl chloride (similar synthetic resins can also be used as materials constituting the insulating layers 12 and 13 described below). The thickness of the insulating layer 11 is, for example, 1 μm or more, preferably 3 μm or more, and, for example, 35 μm or less, preferably 15 μm or less.

[0025] The pair of wiring layers 21, 21 are disposed on one surface in the thickness direction of the insulating layer 11. The pair of wiring layers 21, 21 extend side by side and spaced apart from each other. In this embodiment, the pair of wiring layers 21, 21 have a predetermined pattern shape on the insulating layer 11.

[0026] The thickness of the wiring layer 21 is, for example, 3 μm or more, preferably 5 μm or more, and for example, 50 μm or less, preferably 30 μm or less. The width of the wiring layer 21 (the dimension in the direction perpendicular to the extension direction of the wiring layer 21) is, for example, 5 μm or more, preferably 8 μm or more, and for example, 100 μm or less, preferably 50 μm or less. The distance L1 between the pair of wiring layers 21, 21 in the separation direction is preferably 5 μm or more, more preferably 8 μm or more, and preferably 30 μm or less, more preferably 20 μm or less.

[0027] Examples of materials constituting the wiring layer 21 include metal materials such as copper, nickel, gold, solder, and alloys thereof, and preferably copper (the same applies to the materials constituting the wiring layer 22 described below).

[0028] The insulating layer 12 is disposed on one surface in the thickness direction of the insulating layer 11 so as to cover the pair of wiring layers 21, 21. The thickness of the insulating layer 12 (the maximum height from the insulating layer 11) is greater than the thickness of the wiring layer 21.

[0029] 2, the wiring layer 22 is disposed on one surface in the thickness direction of the insulating layer 12, and faces the pair of wiring layers 21, 21 in the thickness direction via the insulating layer 12. In addition, the wiring layer 22 extends along each of the pair of wiring layers 21, 21, as shown in Fig. 3. Such a wiring layer 22 is connected to, for example, a conductive pad portion (not shown) provided on the insulating layer 11.

[0030] The width of the wiring layer 22 (the dimension in the direction perpendicular to the extension direction of the wiring layer 22) is, for example, 8 μm or more, preferably 10 μm or more, and for example, 100 μm or less, preferably 80 μm or less, as long as it faces the pair of wiring layers 21, 21 as described above.

[0031] The wiring layer 22 has a protrusion 22A. As shown in Fig. 2, the protrusion 22A protrudes into the insulating layer 12 toward a region G between the pair of wiring layers 21, 21, and extends along the region G. The protrusion 22A has an apex 22a. The apex 22a is not flat in a cross section (cross section shown in Fig. 2) in a width direction intersecting (orthogonal in this embodiment) the extension direction of the wiring layer 22, and has an outwardly bulging arc.

[0032] 2, the protrusion 22A has a curved side surface 22b (first curved side surface) and a curved side surface 22c (second curved side surface). The curved side surface 22b is disposed on one side of the apex 22a in the width direction and is recessed toward the inside of the wiring layer 22. The curved side surface 22c is disposed on the other side of the apex 22a in the width direction and is recessed toward the inside of the wiring layer 22.

[0033] Furthermore, the wiring layer 22 has a portion 22F that is thicker than a portion 22E facing the wiring layer 21 at a position between the pair of wiring layers 21, 21 in the separation direction (specifically, the position where the protrusion 22A is formed). The thickness of the portion 22E is preferably 3 μm or more, more preferably 5 μm or more, and preferably 50 μm or less, more preferably 30 μm or less. The thickness of the portion 22F, as long as it is thicker than the portion 22E, is preferably 3 μm or more, more preferably 5 μm or more, and preferably 60 μm or less, more preferably 40 μm or less.

[0034] The distance L2 between the wiring layer 21 and the wiring layer 22 or the portion 22E thereof in the thickness direction is preferably 2 μm or more, more preferably 5 μm or more, and is preferably 20 μm or less, more preferably 15 μm or less.

[0035] The insulating layer 13 is disposed on one surface of the insulating layer 12 in the thickness direction so as to cover the wiring layer 22. The thickness of the insulating layer 13 (the height from the insulating layer 12) is greater than the thickness of the wiring layer 22. As long as the thickness of the insulating layer 13 is thicker than the wiring layer 22, it is, for example, 4 μm or more, preferably 6 μm or more, and for example, 60 μm or less, preferably 40 μm or less.

[0036] The wiring layer 21 and the wiring layer 22 in the multilayer wiring structure of the wiring circuit board X are signal wiring or power wiring (i.e., wiring for power supply). There is often a strong demand for low resistance in the power wiring, and the wiring circuit board X is suitable for achieving high density while achieving low resistance in such power wiring.

[0037] Fig. 4 to Fig. 7 show an example of a method for producing a wired circuit board X. Fig. 4 and Fig. 5 show this production method as a cross-sectional change corresponding to Fig. 2, and Fig. 6 and Fig. 7 show this production method as a cross-sectional change corresponding to Fig. 3.

[0038] In this manufacturing method, first, as shown in FIG. 4A and FIG. 6A, a substrate S is prepared (preparation step).

[0039] Next, as shown in FIG. 4B and FIG. 6B, an insulating layer 11 is formed on the substrate S (first insulating layer forming step). In this step, for example, a resin solution (varnish) for forming the insulating layer 11 is applied to the substrate S and dried to form the insulating layer 11. When the insulating layer 11 has a predetermined pattern shape in a plan view, for example, a photosensitive resin solution (varnish) for forming the insulating layer 11 is applied to the substrate S and dried, and then the coating film formed thereby is subjected to an exposure process through a predetermined mask, a development process, and then a baking process as necessary. In this way, the insulating layer 11 of a predetermined pattern is formed on the substrate S.

[0040] Next, as shown in Figures 4C and 6C, the wiring layer 21 is patterned on the insulating layer 11 (first conductor forming step). Examples of methods for forming the wiring layer 21 include an additive method and a subtractive method. When the additive method is used in this step, the wiring layer 21 is formed, for example, as follows.

[0041] First, a thin seed layer (not shown) which is a conductive layer for forming an electrolytic plating film is formed on the exposed surface of the insulating layer 11, for example, by a sputtering method. Examples of materials constituting the seed layer include copper, chromium, nickel, and alloys thereof. Next, a resist pattern is formed on the seed layer. The resist pattern has openings of a pattern shape corresponding to the pattern shape of the wiring layer 21. In forming the resist pattern, for example, a photosensitive resist film is attached on the seed layer to form a resist film, and then the resist film is subjected to an exposure process through a predetermined mask, a development process thereafter, and a bake process as necessary thereafter. In forming the wiring layer 21, next, a metal material is grown on the seed layer in the region within the opening of the resist pattern by an electrolytic plating method. Copper is preferably used as the metal material. Next, the resist pattern is removed by etching. Next, the portion of the seed layer exposed by removing the resist pattern is removed by etching. For example, in the above manner, the wiring layer 21 of a predetermined pattern can be formed on the insulating layer 11.

[0042] In this manufacturing method, next, as shown in FIG. 5A and FIG. 7A, an insulating layer 12 is formed on the insulating layer 11 so as to cover the wiring layers 21, 21 (second insulating layer forming process). In this process, for example, a solution (varnish) of a photosensitive resin for forming the insulating layer 12 is applied on the insulating layer 11 and the wiring layers 21, 21 and dried, and then the coating film formed thereby is subjected to an exposure process through a predetermined mask, a development process, and a baking process as necessary. In this way, the insulating layer 12 of a predetermined pattern that covers the wiring layers 21, 21 of the predetermined pattern is formed on the insulating layer 11. The insulating layer 12 is formed so as to generate a recess 12a (i.e., to a thickness that generates the recess 12a) at a position between the wiring layers 21, 21 in the separation direction of the pair of wiring layers 21, 21 as shown in FIG. 5A.

[0043] 5B and 7B, the wiring layer 22 is patterned on the insulating layer 12 (second conductor forming step). Examples of methods for forming the wiring layer 22 include an additive method and a subtractive method. When the additive method is used in this step, the wiring layer 22 is formed, for example, as follows.

[0044] First, a thin seed layer (not shown) is formed on the exposed surface of the insulating layer 12 by, for example, a sputtering method, which is a conductive layer for forming an electrolytic plating film. Examples of materials constituting the seed layer include copper, chromium, nickel, and alloys thereof. Next, a resist pattern is formed on the seed layer. The resist pattern has openings of a pattern shape corresponding to the pattern shape of the wiring layer 22. In forming the resist pattern, for example, a photosensitive resist film is attached on the seed layer to form a resist film, and then the resist film is subjected to an exposure process through a predetermined mask, a development process, and then a baking process as necessary. In forming the wiring layer 22, next, a metal material is grown on the seed layer in the region within the opening of the resist pattern by an electrolytic plating method. Copper is preferably used as the metal material. Next, the resist pattern is removed by etching. Next, the portion of the seed layer exposed by removing the resist pattern is removed by etching. For example, the wiring layer 22 of a predetermined pattern can be formed in the above manner.

[0045] In this manufacturing method, next, as shown in Figures 5C and 7C, an insulating layer 13 is formed on the insulating layer 12 so as to cover the wiring layer 22 (third insulating layer forming step). In this step, for example, a solution (varnish) of a photosensitive resin for forming the insulating layer 13 is applied onto the insulating layer 12 and the wiring layer 22 and dried, and then the coating film formed thereby is subjected to an exposure process through a predetermined mask, a development process, and a baking process as necessary. In this way, the insulating layer 13 of a predetermined pattern that covers the wiring layer 22 of the predetermined pattern is formed on the insulating layer 12.

[0046] For example, by going through the steps described above, a wired circuit board X having a multilayer wiring structure can be manufactured.

[0047] As described above, the wired circuit board X has wiring laid out in a multilayer wiring structure including a pair of wiring layers 21, 21 and a wiring layer 22 extending along and facing the pair of wiring layers 21, 21. Such a wired circuit board X is suitable for achieving high density wiring.

[0048] As described above, the wiring layer 22 has the protrusions 22A that protrude into the insulating layer 12 toward the region G between the wiring layers 21, 21 and extend along the region G. Such a configuration is suitable for increasing the cross-sectional area (e.g., cross-sectional area perpendicular to the wiring extension direction) of the wiring layer 22 by effectively utilizing the space between the wiring layers 21, 21, and therefore reducing (lowering) electrical resistance such as DC resistance.

[0049] As described above, the wired circuit board X is suitable for achieving high density while reducing the resistance of the wiring.

[0050] Furthermore, the protrusions 22A of the wiring layer 22 serve to ensure adhesion of the wiring layer 22 to the insulating layer 12 due to the anchor effect on the insulating layer 12, and are therefore suitable for ensuring the reliability of the wiring layer 22.

[0051] In the wired circuit board X, as described above, the protrusions 22A have the tops 22a that are non-flat in a cross section (e.g., the cross section shown in FIG. 2) in the width direction intersecting with the extension direction of the wiring layer 22. The configuration in which the protrusions 22A have such tops 22a helps to ensure adhesion of the wiring layer 22 to the insulating layer 12 due to the anchor effect of the protrusions 22A to the insulating layer 12, and is therefore suitable for ensuring the reliability of the wiring layer 22.

[0052] As described above, the protrusion 22A further has the curved side surface 22b disposed on one widthwise side of the apex 22a and recessed toward the inside of the wiring layer 22, and the curved side surface 22c disposed on the other widthwise side of the apex 22a and recessed toward the inside of the wiring layer 22. The configuration in which the protrusion 22A has such curved side surfaces 22b, 22c in addition to the apex 22a helps to ensure adhesion of the wiring layer 22 to the insulating layer 12 due to the anchor effect of the protrusion 22A to the insulating layer 12, and is therefore suitable for ensuring the reliability of the wiring layer 22.

[0053] As described above, the distance L1 between the pair of wiring layers 21 is preferably 5 μm or more, more preferably 8 μm or more, and is preferably 30 μm or less, more preferably 20 μm or less. Such a configuration is suitable for achieving high density wiring while avoiding short circuits between the wiring layers 21.

[0054] As described above, the distance L2 between the wiring layer 21 and the wiring layer 22 in the thickness direction is preferably 2 μm or more, more preferably 5 μm or more, and is preferably 20 μm or less, more preferably 15 μm or less. Such a configuration is suitable for reducing the thickness of the wired circuit board X while avoiding short circuits between the wiring layer 21 and the wiring layer 22.

[0055] 8, the wired circuit board X may have a configuration in which the wiring layer 21 and the wiring layer 22 are electrically connected through vias 23. Specifically, in this configuration, each of the pair of wiring layers 21 and the wiring layer 22 is electrically connected through vias 23 (e.g., a plurality of vias 23 between each of the wiring layers 21 and the wiring layer 22) penetrating the insulating layer 12. [Explanation of symbols]

[0056] X Wiring Circuit Board R1 Component mounting area R2 wiring formation area S base material 11 Insulating layer (first insulating layer) 12 Insulating layer (second insulating layer) 13 Insulating layer (third insulating layer) 21 Wiring layer (1st wiring layer) 22 Wiring layer (2nd wiring layer) 22A Projection part 22a Top 22b Curved side (first curved side) 22c Curved side (second curved side) 23 Beer G area (area between the first wiring layers)

Claims

1. A first insulating layer; a pair of first wiring layers disposed on the first insulating layer and extending side by side and spaced apart from each other; a second insulating layer disposed on the first insulating layer so as to cover the pair of first wiring layers; a second wiring layer disposed on the second insulating layer and extending along the pair of first wiring layers while facing the pair of first wiring layers in a thickness direction of the first wiring layers; The second wiring layer has a protrusion portion that protrudes into the second insulating layer toward a region between the pair of first wiring layers and extends along the region.

2. The protrusion portion is non-flat in a cross section in a width direction intersecting with an extension direction of the second wiring layer.

2. The printed circuit board of claim 1, further comprising a top portion.

3. 3. The wired circuit board according to claim 2, wherein the protrusion portion further has a first curved side surface arranged on one side of the top in the width direction and recessed toward the inside of the second wiring layer, and a second curved side surface arranged on the other side of the top in the width direction and recessed toward the inside of the second wiring layer.

4. 4. The wired circuit board according to claim 1, wherein a distance between the first wiring layer and the second wiring layer in the thickness direction is 2 [mu]m or more and 20 [mu]m or less.

5. The distance between the pair of first wiring layers is 5 μm or more and 30 μm or less. The wired circuit board according to claim 1 .

Citation Information

Patent Citations

  • Printed circuit board

    JP2009252816A