Power supply device

Abstract

To provide a power supply device capable of improving the resolution of current detection while restraining an increase in cost.SOLUTION: When current is supplied from a drive power supply VB to a load 1 via FET 4a, an I / V conversion circuit 6 converts current based on that current into a voltage by passing the current through a detection resistor. The A / D converter 12 converts the voltage converted by the I / V conversion circuit 6 into a data value. When a calculated value based on the data value exceeds a threshold, an output control unit 15 performs a protective operation for stopping the current supply to the load 1 by the FET 4a. A sink side current source unit 16 is configured to be capable of superimposing an offset current Ioffset on the current passed through the detection resistor in multiple stages.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power supply apparatus including a power device that supplies a current from a driving power supply to a load. [Background technology]

[0002] For example, Patent Documents 1 and 2 propose a method of implementing a fuse function using a semiconductor switch to protect a wire harness and a load. Hereinafter, such a protection function may be referred to as eFuse control. To implement eFuse control, it is necessary to shut off the current in a short time when a large current occurs due to the thermal time constant of the wire harness, while it is necessary to improve the accuracy of current detection near the limit current that can be steadily passed through the harness in order to reduce costs by thinning the harness. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4624400 [Patent Document 2] Patent No. 4762044 Summary of the Invention [Problem to be solved by the invention]

[0004] In order to improve the current detection accuracy, there is a method of preparing two types of resistors for I / V conversion for the output to monitor the current flowing through the semiconductor switch and switching them according to the current range. In this case, in the current range where it is necessary to switch from high resistance to low resistance for measurement, the current measurement resolution decreases, and it becomes necessary to operate the protection so that the fuse is cut off earlier than the ideal fusing characteristic. In addition, for the high resistance side, it is necessary to select a resistance value that can ensure the current detection accuracy near the current that can be steadily flowed through the harness, and due to the decrease in measurement resolution in the range where the load current is small and the A / D conversion error, it is difficult to judge the quality of the load and grasp the load state such as wake-up / sleep. As a countermeasure, there is a problem that increasing the number of resistance values ​​increases costs.

[0005] The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a power supply device that can improve the resolution of current detection while suppressing an increase in costs. [Means for solving the problem]

[0006] According to the power supply device of claim 1, when a current is supplied from a drive power source (VB) to a load (1) via a power device (4a), an I / V conversion circuit (6, 6A) converts a current based on the current into a voltage by passing it through detection resistors (R, R1, R2). The power device is a semiconductor element that constitutes a power conversion circuit such as an inverter and is capable of switching a relatively large amount of power. A data converter (12) converts the voltage converted by the I / V conversion circuit into a data value based on a predetermined characteristic. When a calculation value based on the data value exceeds a threshold, a protection operation unit (13 to 15) performs a protection operation to stop the current supply from the power device to the load. A plurality of sink side current sources (I, Iδ, 2I, 3I, 4I) are configured to be able to superimpose an offset value for the current passed through the detection resistor in multiple stages.

[0007] With this configuration, the voltage input to the data converter can be further reduced by varying the offset value applied to the current flowing through the detection resistor by the multiple sink-side current sources, thereby making it possible to virtually improve the resolution of data conversion in the data converter.

[0008] According to the power supply device of claim 2, a plurality of sink side current sources (Iδ) are set so that the voltage converted by the I / V conversion circuit before and after the switching falls within the input range of the data converter at the boundary for switching the offset value. In this way, by applying an offset value, when the output characteristic of the sink side current source becomes nonlinear in the region where the voltage converted by the I / V conversion circuit is small, the offset value is switched to the smaller side so that the output characteristic of the sink side current source becomes linear, and the output characteristic can be made linear over the entire output characteristic.

[0009] According to the power supply device of claim 3, the difference in the data values ​​when switching between a plurality of sink side current sources is stored in advance in the memory unit (11M). When switching between a plurality of sink side current sources, the control unit (15) reads out the corresponding difference value from the memory unit and subtracts it. This simplifies the calculation process when switching between the sink side current sources to be used.

[0010] According to the power supply device of claim 4, the I / V conversion circuit is configured to be able to switch between energizing two or more detection resistors with different resistance values. First, a first data conversion is performed with no offset value applied and with energizing the detection resistor with the lowest resistance value. Then, when a second data conversion is performed with energizing a detection resistor with a higher resistance value than the detection resistor selected according to the result of the first data conversion, an offset value to be superimposed is determined according to the result of the previous data conversion. This allows current detection to be performed with high accuracy by performing data conversion at most twice. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram showing a configuration of a power supply device in a first embodiment; [Diagram 2] FIG. 1 is a diagram showing an offset current Ioffset applied according to the on / off states of the switches SW1 to SW4. [Diagram 3] A diagram showing the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit is only low resistors. [Figure 4] A diagram showing the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit can be switched between low and high resistance. [Diagram 5] This figure shows the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit is changed and the offset current Ioffset value is also changed. [Figure 6] FIG. 13 is a diagram showing a configuration of a power supply device in a second embodiment. [Figure 7] FIG. 1 is a diagram showing an offset current Ioffset applied according to the on / off states of switches sw1 to sw4. [Figure 8] FIG. 13 is a diagram showing a configuration of a power supply device in a third embodiment. [Figure 9] A diagram showing the relationship between the load current through a constant current circuit and the A / D conversion value. [Figure 10] This figure shows the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit is changed and the offset current Ioffset value is also changed. [Figure 11] A flowchart showing the processing contents of the control unit in the fourth embodiment. [Figure 12] This figure shows the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit is changed and the offset current Ioffset value is also changed. [Figure 13] FIG. 13 is a diagram showing a configuration of a power supply device in a fifth embodiment. [Figure 14] A diagram showing the relationship between the load current and the A / D conversion value when a positive offset current is superimposed on the sense MOS. [Figure 15] A diagram showing the relationship between the load current and the A / D conversion value when a negative offset current is superimposed on the sense MOS. [Figure 16]This figure shows the relationship between the load current and the A / D conversion value when the resistance value of the I / V conversion circuit is changed and the offset current Ioffset value is also changed. [Figure 17] FIG. 13 is a diagram showing a configuration of a power supply device in the sixth embodiment; [Figure 18] Diagram showing the configuration of the power supply device (part 2) [Figure 19] Flowchart showing the processing contents of the control unit [Figure 20] FIG. 13 is a diagram showing a configuration of a power supply device in the seventh embodiment; [Figure 21] Flowchart showing the processing contents of the control unit [Figure 22] A diagram showing an example of a table used to determine the IPD type [Figure 23] Diagram showing the configuration of the power supply device (part 2) [Figure 24] A flowchart showing the processing contents of the control unit in the eighth embodiment. [Diagram 25] A diagram explaining the process of applying a linear function to the A / D conversion result for correction. [Figure 26] FIG. 13 is a diagram showing a configuration of a power supply device in a ninth embodiment. [Figure 27] Flowchart showing the processing contents of the control unit DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] (First embodiment) As shown in FIG. 1, the power supply device of this embodiment supplies current to a load 1, one end of which is connected to ground, from a power source VB via an IPD 2 and a harness 3. The IPD 2 has N-channel MOSFETs 4a and 4b, the drain of which is connected to the power source VB and the gates of which are connected in common. The source of the FET 4a, which is an example of a power device, is connected to the load 1 via the harness 3, and the source of the FET 4b is connected to ground via a P-channel MOSFET 5 and an I / V conversion circuit 6. The source of the FET 4b is connected to the inverting input terminal of an operational amplifier 7 together with the source of the FET 5, and the non-inverting input terminal of the operational amplifier 7 is connected to the source of the FET 4a. The FETs 4a and 4b form a transistor pair 4. The FET 4b is a so-called sense MOS, and the FETs 4b and 5, as well as the operational amplifier 7, form a current output circuit 8.

[0013] The I / V conversion circuit 6 is composed of a combination of seven resistor elements, each of which is a resistor for detecting a resistance value R, and a P-channel MOSFET 9. A series circuit of two resistor elements R is connected between the source of the FET 4b and the ground. A series circuit of two resistor elements R and a MOSFET 9 is connected in parallel to this series circuit. In addition, three resistor elements R are connected in parallel to the two resistor elements R. The transistor pair 4 and the gate of the FET 9 are driven by the control unit 11. The resistance value of the I / V conversion circuit 6 is 2R when the FET 9 is off, and is R / 4 when the FET 9 is on. In the following, the former may be referred to as a "high resistance" and the latter as a "low resistance". t)

[0014] Inside the control unit 11, an A / D converter 12, an eFuse (I 2 A characteristic calculation unit 13, a cutoff determination unit 14, and an output control unit 15 are connected in series. An input terminal of an A / D converter 12, which is an example of a data converter, is connected to a common connection point of the IPD 2 and the I / V conversion circuit 6. The data converted by the A / D converter 12 is input to an eFuse (I 2, t) are input to a characteristic calculation unit 13. The result of the calculation by the calculation unit 13 is input to a tripping determination unit 14, and the determination result of the tripping determination unit 14 is input to an output control unit 15.

[0015] eFuse (I 2 ,t) The characteristic calculation unit 13 calculates and outputs the data converted by the A / D converter 12 based on data proportional to the square of the detected current, for example, as in the "multiplication circuit 200" shown in FIG. 1 of JP 2023-18957 A. This is based on the fact that the smoke generation time t of the harness 3 has a characteristic that depends on the square of the current passed through it, as described in the publication.

[0016] The shutoff determination unit 14 compares the data calculated as above with a threshold value to determine whether or not to issue a shutoff instruction. The output control unit 15 drives the gates of the transistor pair 4 of the IPD 2 in response to an output instruction input from a higher-level control device (not shown). When a shutoff instruction is input from the shutoff determination unit 14, the output control unit 15, which corresponds to a protection operation unit, turns off the transistor pair 4.

[0017] A sink-side current source section 16 is connected between the input terminal of the A / D converter 12 and the ground. The sink-side current source section 16 includes a series circuit in which a sink-side current source I is connected to each of the switches SW1 to SW4. The on / off control of the FET 9 and the switches SW1 to SW4 is performed by an eFuse (I 2 , t) are performed by the characteristic calculation unit 13. In the above, the portion excluding the harness 3 and the load 1 constitutes the power supply device 17.

[0018] Next, the operation of this embodiment will be described. In the sink side current source section 16, the offset current flowing to ground due to the operation of the current source I is defined as Ioffset. The current Ioffset reduces the current flowing from IPD2 to ground via the I / V conversion circuit 6. As shown in Fig. 2, the current Ioffset varies within the range of -I to -4I by selectively turning on the switches SW1 to SW4.

[0019] As shown in Figure 3, in the load current-I / V conversion characteristics when the current Ioffset is not flowing and the I / V conversion circuit 6 is in a low resistance state, in region (1) where the load current value is small, it is difficult to judge the quality of the load or to judge whether it is in a wake-up or sleep state due to the influence of errors caused by A / D conversion. In region (2), the current measurement resolution is low, so it becomes necessary to perform protective operation by shutting off the IPD 2 earlier than the ideal fusing characteristic of the harness 3. Region (3) indicates the current value that can be steadily flowed through the harness 3. Note that the numbers in parentheses correspond to the circled numbers in the figure.

[0020] If we add the characteristics when the I / V conversion circuit 6 is in a high resistance state to Fig. 3, we get the results shown in Fig. 4. In this way, even when switched to high resistance, it is necessary to select the resistance value so that the current detection accuracy near region (3) can be ensured.

[0021] When the current Ioffset is changed as in this embodiment, the load current-I / V conversion characteristic becomes as shown in Fig. 5. Here, if the load current is IL, the monitor current flowing to the I / V conversion circuit 6 side is IS, and the current ratio of the I / V conversion circuit 6 is KILIS, the relationship between the currents IL and IS is (IL=KILIS×IS). If the voltage generated in the I / V conversion circuit 6 is Vs, when the I / V conversion circuit 6 is selected on the high resistance side, Vs = (IL / KILIS + Ioffset) × 2R When I / V conversion circuit 6 is selected for low resistance Vs = (IL / KILIS + offset) × R / 4 If the upper limit of detection current is ILMAX, then Vs = (ILMAX / KILIS) × R / 4 = V_ADMAX It becomes.

[0022] When no offset current Ioffset is added, the load current IL is In contrast, in this embodiment, the current I of the current source is set to (=V_ADMAX / 2R), the I / V conversion circuit 6 is selected on the high resistance side, and the offset current Ioffset is increased stepwise from 0 to -I, -2I, and -3I.

[0023] When the current Ioffset is set to -I, the load current IL is IL=0.125×ILMAX~0.25×ILMAX Furthermore, if the current Ioffset is set to -2I or -3I, IL=0.25×ILMAX~0.5×ILMAX If the current Ioffset is set to -4I, the range of 0.75×ILMAX can be detected. That is, whereas the conventional resolution was four times that at the time of low resistance switching in the range of IL=0 to 0.25×ILMAX, the method of this embodiment can increase the current detection resolution to eight times in all of the regions (1) to (3), thereby reducing the effect of errors in the A / D converter 12.

[0024] As described above, according to this embodiment, when a current is supplied from the drive power supply VB to the load 1 via the FET 4a and the harness 3, the I / V conversion circuit 6 converts a current based on that current into a voltage by passing a current through a detection resistor. The A / D converter 12 converts the voltage converted by the I / V conversion circuit 6 into a data value. When a calculated value based on the data value exceeds a threshold, the output control unit 15 performs a protective operation to stop the current supply to the load 1 by the FET 4a. The sink side current source unit 16 is configured to be able to superimpose an offset current Ioffset on the current passed through the detection resistor in multiple stages.

[0025] With this configuration, by changing the current Ioffset applied to the current flowing through the detection resistor by the multiple current sources I, it is possible to further reduce the voltage input to the A / D converter 12. This makes it possible to virtually improve the resolution of data conversion in the A / D converter 12.

[0026] Second embodiment Hereinafter, the same parts as those in the first embodiment are denoted by the same reference numerals and their explanations are omitted, and only the different parts are explained. As shown in Fig. 6, a power supply device 21 of the second embodiment includes a sink-side current source section 22 replacing the sink-side current source section 16. In the sink-side current source section 22, sink-side current sources I, 2I, 4I, and 8I are connected to the switches sw1 to sw4, respectively. With this configuration, as shown in Fig. 7, by changing the on / off of the switches sw1 to sw4 to correspond to 4-bit data so as to become "1 to 15", the current Ioffset can be changed in the range of "-I to -15I" accordingly.

[0027] Third embodiment As shown in Fig. 8, a power supply device 23 of the third embodiment includes a sink-side current source section 24 in place of the sink-side current source section 16. The sink-side current source section 24 is composed of four current sources Iδ, each of which has a constant current value Iδ = (I - δ). Here, δ is Vsat, which is the voltage obtained by adding the minimum resistance value of the I / V conversion circuit 6 to the on-resistance of the FET 4b and multiplying the result by the current flowing therethrough, and Vdiff, which is the displacement voltage when the potential of the ground to which the I / V conversion circuit 6 is connected is displaced higher than 0V. δ>(Vsat+Vdiff) / (2R) The constant current value I is set to (=V_ADMAX / 2R) similarly to the first embodiment.

[0028] In general, a constant current circuit such as current output circuit 8 cannot perform constant current operation in a region where the input voltage is low, due to the on-resistance and saturation voltage of the transistors as described above, and the voltage generated in the resistor on the ground side, as shown in Fig. 9. Therefore, by setting each current source Iδ of sink side current source section 24 to (I-δ) and overlapping the range below voltage Vsat as shown in Fig. 10, it becomes possible to convert to voltage in a region where everything is linear by switching current Ioffset to 0, -Iδ, -2Iδ, -3Iδ, ....

[0029] (Fourth embodiment) As shown in Fig. 11, the fourth embodiment shows the control contents in the control unit 11. When the process starts, the resistance value of the I / V conversion circuit 6 is set to the low side (R / 4) (S1), and A / D conversion is performed with a current Ioffset = 0 (S2). This corresponds to the first data conversion. Then, the A / D conversion result is compared with each of the conversion values ​​adl4 to adl1 shown in Fig. 12, and it is determined whether or not it is equal to or greater than each of the conversion values ​​adl4 to adl1 (S3 to S6).

[0030] If the A / D conversion result is equal to or greater than the conversion value adl4 (S3; Yes), it belongs to the current region E (IL4 to ILMAX) shown in FIG. 12. If the ratio between the low resistance value and the high resistance value of the I / V conversion circuit 6 is KR, then the A / D conversion result is multiplied by KR to obtain the final digital value according to the detected current (S19). In the fourth embodiment, KR=8. Note that, for simplicity's sake, the "case of ideal characteristics" shown in the figure ignores the case where the conversion characteristics become nonlinear in the low current region, as in the third embodiment.

[0031] If the A / D conversion result is less than the conversion value adl1 (S5; No), it belongs to the current region A (0 to IL1), the resistance value of the I / V conversion circuit 6 is switched to the higher side 2R (S7), and A / D conversion is performed as in step S2 (S8). Then, the A / D conversion result is used as the final digital value as it is (S9). If the A / D conversion result is less than the conversion value adl2 and greater than or equal to the conversion value adl1 (S5; Yes), it belongs to the current region B (IL1 to IL2), and the same process as in step S7 is performed (S10), and A / D conversion is performed with a current Ioffset=-I (S11). Then, the A / D conversion result is obtained by subtracting the conversion value adh1 corresponding to the high resistance value 2R from the conversion value adl1, and the result is added to the maximum conversion value ADMAX to make a digital value continuous with the current region A (S12).

[0032] If the A / D conversion result is equal to or greater than the conversion value adl2 and less than the conversion value adl3 (S6; No), it belongs to current region C (IL2 to IL3), and the same process as in step S7 is performed (S13), and A / D conversion is performed with a current Ioffset=-2I (S14). Then, from the A / D conversion result, the conversion value adh1 and the conversion value adl2 are subtracted by the conversion value adh2 corresponding to the high resistance value 2R, and the result is added to twice the maximum conversion value ADMAX, to make a digital value continuous with current region B (S15).

[0033] If the A / D conversion result is less than the conversion value adl4 and greater than or equal to the conversion value adl3 (S6; Yes), it belongs to the current region D (IL3 to IL4), and the same process as in step S7 is performed (S16), and A / D conversion is performed with a current Ioffset=-3I (S17). Then, from the A / D conversion result, the conversion values ​​adh1 and adh2, and the conversion value adl3 are subtracted from the conversion value adh3 corresponding to the high resistance value 2R, and the result is added to a value three times the maximum conversion value ADMAX, to make a digital value continuous with the current region C (S15). Steps S8, S11, S14S, and S17 correspond to the second data conversion.

[0034] Incidentally, the digital value in step S19, the A / D conversion result at low resistance multiplied by KR, is equal to the result of subtracting the conversion values ​​adh1 to adh3 from four times the maximum conversion value ADMAX, and then subtracting the conversion value adl1 from the A / D conversion result at low resistance, multiplied by KR. The conversion values ​​adh1 to adh3 are the differences in A / D conversion values ​​when the sink side current source unit 16 switches the current Ioffset to transition between the current regions A to C, and these are stored in advance in the memory unit 11M (not shown) provided in the control unit 11.

[0035] As described above, according to the fourth embodiment, the A / D conversion values ​​adl1 to adl4 when the I / V conversion circuit 6 is set to a low resistance value are stored in advance, and the actual A / D conversion results are compared with these to classify the current regions A to E. For the current regions A to D, the I / V conversion circuit 6 is switched to a high resistance value and A / D conversion is performed again. In addition, the conversion values ​​adh1 to adh3 corresponding to the A / D conversion values ​​adl1 to adl3 when the I / V conversion circuit 6 is set to a low resistance value are also stored in advance, and the conversion values ​​adh1 to adh3 are subtracted from the result of the second A / D conversion to obtain a final digital value. This makes it possible to artificially increase the conversion resolution in the current regions A to D by performing A / D conversion up to two times. Here, in steps S11 and S17, exception processing is omitted, but when the input voltage exceeds the upper limit of the input voltage of the A / D converter 12, the digital value may be obtained by the method of step S19.

[0036] Fifth embodiment As shown in FIG. 13, a power supply device 25 of the fifth embodiment includes a source-side current source 26 and a sink-side current source 27 as correction current supply sources in a control unit 11C. The source-side current source 26 is connected between a power source VB and an input terminal of the A / D converter 12, and the sink-side current source 27 is connected between the input terminal and ground. Both of the current sources 26 and 27 are configured so that the constant current value is variable. The variable control is performed by an eFuse (I 2 , t) is performed by the characteristic calculation unit 13.

[0037] In IPD2, when a positive offset current Ioffset_IPD is superimposed on FET4b, which is a sense MOS, the relationship between the load current IL and the monitor current output IS is as follows: IL=KILIS×IS+Ioffset_IPD 14, when the resistance value of the I / V conversion circuit 6 is high, 2R, an offset voltage (Ioffset_IPD×2R) is generated when the load current IL=0A, compressing the dynamic range.

[0038] In response to this, if the offset voltage is reduced by adjusting the sink current Ioffset_trim to (≈-Ioffset_IPD) using the sink side current source 27, which has an adjustable constant current value, the dynamic range can be expanded.

[0039] In addition, if a negative offset current Ioffset_IPD is superimposed on FET4b, the relationship between the load current IL and the monitor current output IS is as follows: IL = KILIS × IS-Ioffset_IPD 15, the A / D conversion value is almost zero when the load current IL is in the range of 0 A to Ioffset_IPD, and the A / D conversion value is lower than the original value even in a region where the load current IL is larger than that. This makes the protection for preventing burnout due to overcurrent in the harness 3 less effective. Therefore, by adjusting the source current Ioffset_trim to (≈-Ioffset_IPD) by the source side current source 26, which has an adjustable constant current value, the protective function of the harness 3 can be maintained without degradation.

[0040] In addition, when the current value of the sink side current source unit 16 is controlled to -I, -2I, ..., if the I value of each current source varies, such as -I+α, -2I+β, ..., the value of Ioffset_trim in the sink side current source 27 is dynamically controlled to -Ioffset_IPD, -Ioffset_IPD-α, -Ioffset_IPD-β, ... to absorb the variation. This prevents the occurrence of a region that cannot be converted correctly into a digital value, as shown by (4) in FIG. 16, and expands the current range in which the load current IL can be detected with high resolution. The sink side current source 27 and the sink side current source unit 16 may be adjusted in cooperation with each other, or the adjustment step of the sink side current source unit 16 may be finely set to deal with the variation.

[0041] Sixth embodiment As shown in Fig. 17 and Fig. 18, power supply devices 28I, 28R of the sixth embodiment include source-side current supply sources 29I, 29R as correction current supply sources in control units 11I, 11R, respectively. The source-side current supply source 29I is composed of a series circuit of a current source 30 and a switch 31 connected between a power supply VB and ground, and the source-side current supply source 29R replaces the current source 30 with a resistance element 32. The on / off control of the switch 31 is performed by an eFuse (I 2 , t) is performed by the characteristic calculation unit 13.

[0042] Next, the operation of the sixth embodiment will be described. As shown in Fig. 19, when the output control unit 15 turns off the IPD 2 or puts it in standby, processing is started in a self-check mode. First, the switch 31 of the source-side current supply source 29I or 29R is turned on to pass a current through the resistive element of the I / V conversion circuit 6 (S21). It is preferable to initially set the resistance value of the I / V conversion circuit 6 to the low resistance value side. Then, A / D conversion is performed by the A / D converter 12, and the resistance value that can be read from the conversion result is determined (S22).

[0043] If the determined resistance value is equal to or greater than the upper threshold (S23; Yes), it is suspected that the I / V conversion circuit 6 is open or has a short to the power supply, and therefore it is determined to be abnormal (S30). Then, for example, a command to execute a diagnosis is sent to a higher-level control device or the like, or the IPD2 is maintained in the off state (S31).

[0044] If the determined resistance value is equal to or less than the lower threshold (S24; Yes), it is determined that there is an abnormality since the connection of the I / V conversion circuit 6 is suspected to have a ground fault (S28). Then, the same process as in step S31 is performed (S29). On the other hand, if the determined resistance value exceeds the lower threshold (S24; No), it is determined to be normal (S25). Then, if the start condition is met, for example, by a command from a higher-level control device (S26; Yes), the IPD2 is turned on to start eFuse control (S27).

[0045] In this way, by determining the resistance value when a source current is passed through the I / V conversion circuit 6 via the source-side current supply source 29 with the IPD 2 turned off, it is possible to determine whether the connection of the I / V conversion circuit 6 is normal or abnormal. Also, the resistance value of the I / V conversion circuit 6 is first set to low resistance to perform the above determination, and if the determination result is normal, the resistance value is switched to high resistance and a similar determination is performed. By comparing the first A / D conversion result after switching to high resistance with the A / D conversion result at low resistance, it is possible to determine whether the former A / D conversion result is appropriate. If there is an abnormality, only the connection on the high resistance side can be determined to be abnormal.

[0046] Seventh embodiment 20, a power supply device 33 of the seventh embodiment is a combination of the control unit 11I of the sixth embodiment and an I / V conversion circuit 6A. The I / V conversion circuit 6A includes a resistor R1 as a detection resistor and a resistor R2 connected together with a FET 9, and is configured to switch the resistance value between R1 and a parallel value R1 / / R2 of R1 and R2. In the seventh embodiment, the type of IPD2 connected to the I / V conversion circuit 6A is determined by the resistance values ​​of the resistors R1 and R2.

[0047] Next, the operation of the seventh embodiment will be described. As shown in Fig. 21, when processing is started in a self-check mode in the same state as in the sixth embodiment, the resistance value of the I / V conversion circuit 6A is switched to the high resistance side R1 (S41). The switch 31 of the source side current supply source 29I is turned on to pass a current through the resistive element of the I / V conversion circuit 6 (S42). Then, A / D conversion is performed by the A / D converter 12, and the conversion result is obtained as resistance value data ValR1 (S43).

[0048] Next, the resistance value of the I / V conversion circuit 6A is switched to the low resistance side R1 / / R2 (S44), A / D conversion is performed by the A / D converter 12, and the conversion result is obtained as resistance value data ValR1_R2 (S45). Then, a control parameter is set based on a combination of the resistance value data ValR1 and ValR1_R2 (S46).

[0049] The control unit 11I holds a data table for determining the type of IPD2, for example, as shown in FIG. 22. The same figure also shows an example of the determination method in step S46. For example, if the resistance value R1 is 6.55 kΩ or less, the part number of the IPD2 corresponds to "1, 2". Also, if the resistance values ​​R1 / / R2 are 0.97 kΩ or less, the part number of the IPD2 corresponds to "2, 3". From these results, the part number "2" is identified. Since the resistance ratio KILIS of the part number "2" is "1000", the resistance ratio KILIS=1000 is set as a parameter used in eFuse control. Other control parameters include, for example, the thickness of the wire harness, the allowable current, the time constant of the interruption characteristics, and the overcurrent threshold value.

[0050] 21 may be performed when the power is turned on, and the default operation of turning on or off at startup may be switched depending on the determined part number of the IPD 2. Furthermore, FIG. 23 shows a configuration using a control unit 35 in which a microcomputer 34 is added to the control unit 11I. In this case, the microcomputer 34 may be provided with a function of monitoring the output control unit 15, and parameters may be set to indicate the operation to be performed when the microcomputer 34 detects an abnormality, such as forced on or forced off, or maintaining the previous operation. Also, as shown in the sixth embodiment, a source side current supply source 29R may be used instead of the source side current supply source 29I.

[0051] Eighth embodiment As shown in Fig. 24, in the eighth embodiment, the connection state of the I / V conversion circuit 6 is judged as in the sixth embodiment. Then, after steps S28 and S30 are executed, it is judged as in step S26 whether the start-up condition is satisfied (S32). If the start-up condition is satisfied (Yes), for example, when correcting the A / D conversion result using a linear function, Bh shown in Fig. 25, which is an intercept; offset parameter, is changed to a value larger than the value normally used (S33).

[0052] After that, when the IPD2 starts to pass current, the correction value of the A / D conversion result makes it possible to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or power monitoring function operates the protection to cut off the current in a short time, making it possible to safely protect the load 1.

[0053] Ninth embodiment The ninth embodiment is a variation of the eighth embodiment. As shown in Fig. 26, a normally-closed switch 36 is inserted between the input terminal of the A / D converter 12 and the sink-side current source unit 16, and the source-side current source 29I of the sixth embodiment is connected to the common connection point between the input terminal and the switch 36. The on / off control of the switch 36 is performed by an eFuse (I 2 , t) is performed by the characteristic calculation unit 13. Then, as shown in FIG. 27, if the answer is "Yes" in step S32, the switch 36 is turned off and the switch 31 of the source side current source 29I is turned on (S34).

[0054] Thereby, when the IPD 2 starts to energize thereafter, it is recognized that a large current is flowing regardless of the actual load current IL, as in the eighth embodiment. As a result, the eFuse control function or the power monitoring function operates in a short time to provide protection that cuts off the current, thereby making it possible to safely protect the load 1.

[0055] (Other embodiments) The change in the resistance value in the I / V conversion circuit may be set to three or more stages. Also, it is not necessary to change the resistance value. The number of current sources provided in the sink side current source section may be "3" or less, or "5" or more. A / D converter 12 and eFuse (I 2 , t) The characteristic calculation unit 13 may be integrated to configure a data converter that outputs a conversion result according to the two-wire characteristic of the current. For example, the third embodiment may be applied to the second and fourth to ninth embodiments, and the like. Applicable embodiments may be combined as appropriate.

[0056] In addition to the inventions described in the claims, this case includes the following inventions: [1] a power device (4a) that supplies current from a drive power supply (VB) to a load (1); an I / V conversion circuit (6, 6A) that converts a current based on the current into a voltage by passing a current through a detection resistor (R, R1, R2) and detects the voltage; a data converter (12) that converts the voltage converted by the I / V conversion circuit into a data value based on a predetermined characteristic; a protection operation unit (13 to 15) that performs a protection operation to stop a current supply to a load by the power device when a calculated value based on the data value exceeds a threshold value; a power supply device including a plurality of sink-side current sources (I, Iδ, 2I, 3I, 4I) configured to be able to superimpose an offset value for a current flowing through the detection resistor in multiple stages; [2] The power supply device according to [1], wherein the plurality of sink-side current sources (Iδ) are set so that at the boundary for switching the offset value, the voltage converted by the I / V conversion circuit before and after switching falls within the input range of the data converter. [3] a storage unit (11M) in which the difference in data value when switching the plurality of sink side current sources is stored in advance; The power supply device according to [1] or [2], further comprising a control unit (15) that, when switching between the plurality of sink side current sources, reads out a corresponding difference value from the storage unit and subtracts it. [4] the I / V conversion circuit is configured to be capable of switching current flow to two or more detection resistors having different resistance values; The power supply device of any one of [1] to [3], wherein a first data conversion is performed without applying the offset value, with current passing through a detection resistor with the lowest resistance value, and then, when a second data conversion is performed with current passing through a detection resistor with a higher resistance value than the detection resistor, selected in accordance with the result of the first data conversion, an offset value to be superimposed on the offset value is determined in accordance with the result of the first data conversion. [5] a current output circuit (8) that outputs a current proportional to a load current flowing through the power device; The power supply device according to any one of [1] to [4], further comprising a correction current supply source for correcting an offset current generated in the current output circuit. [6] a source-side current supply source (29I, 29R) for supplying current to the detection resistor in a state where the power device stops supplying current to the load; The power supply device according to any one of [1] to [5], wherein the control unit determines whether the detection resistor is abnormal based on a result of data conversion associated with the energization. [7] the control unit has a correction unit that corrects the output data of the data converter, The power supply device according to [6], wherein when an abnormality is detected in the detection resistor, a correction parameter of the correction unit is set so that the protective operation unit starts the protective operation more quickly. [8] The power supply device according to [6], wherein the control unit, upon determining that the detection resistor is abnormal, sets the input voltage of the data converter to a high potential. [9] a source-side current supply source (29I, 29R) for supplying current to the detection resistor in a state where the power device stops supplying current to the load; The power supply device according to any one of [1] to [8], wherein the control unit determines the type of the connected power device based on the result of the data conversion associated with the energization, and sets control parameters according to the determined type.

[0057] Although the present disclosure has been described based on the embodiment, it is understood that the present disclosure is not limited to the embodiment or structure. The present disclosure also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure. [Explanation of symbols]

[0058] In the drawing, 1 is a load, 2 is an IPD, 3 is a harness, 4a and 4b are N-channel MOSFETs, 6 is an I / V conversion circuit, 8 is a current output circuit, 9 is a P-channel MOSFET, 11 is a control unit, 12 is an A / D converter, and 13 is an eFuse (I 2 ,t) a characteristic calculation section, 14 a cutoff determination section, 15 an output control section, and 16 a sink side current source section.

Claims

1. a power device (4a) that supplies current from a driving power supply (VB) to a load (1); an I / V conversion circuit (6, 6A) that converts a current based on the current into a voltage by passing a current through a detection resistor (R, R1, R2) and detects the voltage; a data converter (12) for converting the voltage converted by the I / V conversion circuit into a data value based on a predetermined characteristic; a protection operation unit (13 to 15) that performs a protection operation to stop a current supply to a load by the power device when a calculated value based on the data value exceeds a threshold value; a power supply device including a plurality of sink-side current sources (I, Iδ, 2I, 3I, 4I) configured to be able to superimpose an offset value for a current flowing through the detection resistor in multiple stages.

2. The power supply device according to claim 1, wherein the plurality of sink-side current sources (Iδ) are set so that at the boundary where the offset value is switched, the voltage converted by the I / V conversion circuit before and after the switching falls within the input range of the data converter.

3. A storage unit (11M) in which the difference in data value when switching the plurality of sink side current sources is stored in advance; 3. The power supply device according to claim 1, further comprising a control unit (15) that, when switching between the plurality of sink side current sources, reads out a corresponding difference value from the storage unit and subtracts it.

4. the I / V conversion circuit is configured to be capable of switching current flow to two or more detection resistors having different resistance values; 3. The power supply device according to claim 1, wherein a first data conversion is performed without applying the offset value, with current passing through a detection resistor with the lowest resistance value, and then, when a second data conversion is performed with current passing through a detection resistor with a higher resistance value than the detection resistor, selected in accordance with the result of the first data conversion, an offset value to be superimposed on the offset value is determined in accordance with the result of the first data conversion.

5. A current output circuit (8) is provided for outputting a current proportional to a load current flowing through the power device, 3. The power supply device according to claim 1, further comprising a correction current source for correcting an offset current generated in the current output circuit.

6. a source-side current supply source (29I, 29R) for supplying current to the detection resistor in a state where the power device stops supplying current to the load, 3. The power supply device according to claim 1, wherein an abnormality in the detection resistor is determined based on a result of the data conversion performed in response to the energization.

7. a correction unit that corrects the output data of the data converter; The power supply device according to claim 6 , wherein when it is determined that the detection resistor is abnormal, the correction parameter of the correction unit is set so that the protective operation unit starts the protective operation more quickly.

8. 7. The power supply device according to claim 6, wherein when it is determined that the detection resistor is abnormal, the input voltage of the data converter is set to a potential higher than a normal input range.

9. a source-side current supply source (29I, 29R) for supplying current to the detection resistor in a state where the power device stops supplying current to the load, 3. The power supply apparatus according to claim 1, wherein the control unit determines a type of the connected power device based on a result of the data conversion performed in response to the energization, and sets a control parameter in accordance with the determined type.

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