Mesh decoding device, mesh decoding method, and program

The mesh decoding device optimizes encoding efficiency by rearranging coefficient level values using a displacement decoding section and video codec techniques, addressing inefficiencies in existing mesh encoding methods.

JP2025009508APending Publication Date: 2025-01-20KDDI CORP
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Patent Information

Application Number
JP2023112559
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-07
Publication Date
2025-01-20

AI Technical Summary

Technical Problem

The existing technique for encoding mesh data using a video codec results in inefficient encoding, as the generated video is not suitable for video codecs, leading to decreased encoding efficiency.

Method used

A mesh decoding device and method that includes a displacement decoding section to decode displacement bitstreams using a video codec, with components such as a displacement video decoding unit, image expansion unit, inverse quantization unit, and inverse wavelet transform unit to rearrange coefficient level values, improving encoding efficiency by optimizing the arrangement of these values.

Benefits of technology

The proposed solution enhances encoding efficiency by rearranging coefficient level values using defined levels of detail (LOD) and specific video codec techniques, allowing for efficient encoding of mesh data.

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Abstract

To improve encoding efficiency.SOLUTION: An image development unit 2051 of a displacement decoding unit 205 of a mesh decoding device 200 according to the present invention develops an image while rearranging coefficient level values by using a LOD defined in the coefficient level values.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present invention relates to a mesh decoding device, a mesh decoding method, and a program. [Background technology]

[0002] Non-Patent Document 1 discloses a technique in which a mesh is divided into a rough basic mesh and a detailed displacement amount, decoded, and the displacement amount is converted into an image and then encoded by an image codec. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Khaled Mammou, Jungsun Kim, Alexis Tourapis, Dimitri Podborski, Krasimir Kolarov, “[V-CG] Apple's Dynamic Mesh Coding CfP Response,” ISO / IEC JTC 1 / SC 29 / WG 7 m59281, April 2022. Summary of the Invention [Problem to be solved by the invention]

[0004] However, the technology disclosed in Non-Patent Document 1 has a problem that the generated video is not suitable for encoding by a video codec, and the encoding efficiency is reduced. Therefore, the present invention has been made in consideration of the above-mentioned problems, and aims to provide a mesh decoding device, a mesh decoding method, and a program that can improve the encoding efficiency. [Means for solving the problem]

[0005] A first feature of the present invention is a mesh decoding device comprising: a displacement amount decoding unit configured to decode a displacement amount bitstream to generate and output displacement amounts, wherein the displacement amount decoding unit comprises: a displacement amount video decoding unit configured to generate an image by decoding the displacement amount bitstream using a video codec; an image expansion unit configured to generate coefficient level values ​​by expanding the image frame by frame; an inverse quantization unit configured to generate transform coefficients by performing inverse quantization on the coefficient level values; and an inverse wavelet transform unit configured to generate decoded displacement amounts by performing an inverse wavelet transform on the transform coefficients, and the image expansion unit expands an image while rearranging the coefficient level values ​​using an LOD defined for the coefficient level values.

[0006] A second feature of the present invention is a mesh decoding method comprising the steps of: decoding a displacement amount bit stream to generate and output displacement amounts, the steps including: step A of generating an image by decoding the displacement amount bit stream using a video codec; step B of generating coefficient level values ​​by expanding the image frame by frame; step C of generating transform coefficients by performing inverse quantization on the coefficient level values; and step D of generating decoded displacement amounts by performing an inverse wavelet transform on the transform coefficients, wherein in step B, an image is expanded while rearranging the coefficient level values ​​using an LOD defined for the coefficient level values.

[0007] A third feature of the present invention is a program for causing a computer to function as a mesh decoding device, the mesh decoding device comprising: a displacement amount decoding unit configured to decode a displacement amount bitstream to generate and output displacement amounts; the displacement amount decoding unit comprising: a displacement amount video decoding unit configured to generate an image by decoding the displacement amount bitstream using a video codec; an image expansion unit configured to generate coefficient level values ​​by expanding the image frame by frame; an inverse quantization unit configured to generate transform coefficients by performing inverse quantization on the coefficient level values; and an inverse wavelet transform unit configured to generate decoded displacement amounts by performing an inverse wavelet transform on the transform coefficients; and the image expansion unit expands an image while rearranging the coefficient level values ​​using an LOD defined for the coefficient level values. Effect of the Invention

[0008] According to the present invention, it is possible to provide a mesh decoding device, a mesh decoding method, and a program capable of improving the encoding efficiency. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a mesh processing system 1 according to an embodiment. [Diagram 2] FIG. 2 is a diagram illustrating an example of functional blocks of a mesh decoding device 200 according to an embodiment. [Diagram 3] FIG. 3 is a diagram showing an example of functional blocks of the displacement amount decoding unit 205 of the mesh decoding device 200 according to an embodiment. [Figure 4] FIG. 4 is a diagram showing an example of the configuration of a displacement amount bit stream. [Diagram 5] FIG. 5 is a diagram showing an example of a syntax configuration of a displacement parameter set (DPS). [Figure 6] FIG. 6 is a diagram showing another example of the syntax configuration of the displacement amount parameter set. [Figure 7] FIG. 7 is a diagram showing an example of image development when coefficient level values ​​are arranged in a combination of the raster order and the Morton order. [Figure 8] FIG. 8 is a diagram showing an example of image development in which coefficient level values ​​are arranged in a combination of the reverse raster order and the reverse Morton order. [Figure 9] FIG. 9 is a flowchart showing an example of the operation of the displacement amount decoding unit 205 of the mesh decoding device 200 according to an embodiment. [Figure 10] FIG. 10 is a flowchart showing an example of the operation of step S103 shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, the embodiments of the present invention will be described with reference to the drawings. Note that the components in the following embodiments can be appropriately replaced with existing components, and various variations including combinations with other existing components are possible. Therefore, the description of the following embodiments does not limit the content of the invention described in the claims.

[0011] First Embodiment The mesh processing system according to this embodiment will be described below with reference to FIGS.

[0012] 1 is a diagram showing an example of the configuration of a mesh processing system 1 according to this embodiment. As shown in FIG.

[0013] FIG. 2 is a diagram showing an example of functional blocks of the mesh decoding device 200 according to this embodiment.

[0014] As shown in FIG. 2, the mesh decoding device 200 includes a demultiplexing unit 201, a basic mesh decoding unit 202, a subdivision unit 203, a mesh decoding unit 204, a displacement amount decoding unit 205, a video decoding unit 206, and an atlas data decoding unit 207.

[0015] The demultiplexing unit 201 is configured to demultiplex the multiplexed bit stream into a base mesh bit stream, a displacement amount bit stream, a texture bit stream, and an atlas bit stream.

[0016] The base mesh decoding unit 202 is configured to decode the base mesh bitstream and generate and output a base mesh.

[0017] The subdivision unit 203 is configured to generate and output added subdivision vertices and their connection information from the basic mesh decoded by the basic mesh decoding unit 202 using a subdivision method indicated by the control information.

[0018] Here, the basic mesh, the added subdivision vertices, and their connection information are collectively referred to as a "subdivision mesh."

[0019] The mesh decoding unit 204 is configured to generate and output a decoded mesh using the subdivision mesh generated by the subdivision unit 203 and the amount of displacement decoded by the displacement amount decoding unit 205 .

[0020] The displacement amount decoding unit 205 is configured to decode the displacement amount bitstream to generate and output the displacement amount.

[0021] The video decoding unit 206 is configured to decode the texture by video encoding and output the texture. For example, the video decoding unit 206 may use HEVC in Non-Patent Document 1. The atlas data decoding unit 207 is configured to decode the atlas bitstream and output the control information.

[0022] The above-mentioned video decoding unit 206 uses a software or hardware video codec.

[0023] In particular, for hardware video codecs, the minimum image size is determined by the video specifications, the resolution of the display to be supported, the application, the hardware specifications, and the like.

[0024] Hardware video codecs intended for use with high-resolution displays often use a minimum image size defined in the video encoding specification.

[0025] For example, the minimum image size may be 360 ​​x 240, which is the minimum video size in the HEVC standard. Note that depending on the hardware specifications, it may not be possible to decode images smaller than the minimum image size.

[0026] On the other hand, in hardware video codecs intended for use on low-resolution displays such as mobile terminals, there is a need to display on devices with small transmission capacities or low specifications, and so a small minimum image size may be set, with the minimum image width being 100 or less. Furthermore, experiments have confirmed that it is possible to increase the coding efficiency by reducing the image width.

[0027] Therefore, in order to ensure that the video codec can decode it without any problems, it is necessary to specify a minimum image size in V-DMC.

[0028] For example, the image width is always set to a value larger than a minimum value defined in advance. Alternatively, the image height is always set to a value larger than a minimum value defined in advance. Alternatively, the image width and height are always set to a value larger than a minimum value defined in advance.

[0029] In order to satisfy requirements for display resolution, applications, hardware specifications, coding efficiency, etc. while still allowing for problem-free decoding by the video codec, the minimum image size that is predefined may be different depending on the profile and level.

[0030] (Displacement amount decoding unit 205) Fig. 3 is a diagram showing an example of the configuration of the displacement amount decoding unit 205. As shown in Fig. 3, the displacement amount decoding unit 205 includes a displacement amount video decoding unit 2051, an image development unit 2052, an inverse quantization unit 2053, and an inverse wavelet transformation unit 2054.

[0031] The displacement amount video decoding unit 2051 is configured to generate and output a video by decoding the received displacement amount bit stream using a video codec. For example, the displacement amount video decoding unit 2051 may use HEVC of Non-Patent Document 1.

[0032] Furthermore, the displacement amount video decoding unit 2051 may use a video codec in which a motion vector is always set to 0. For example, the displacement amount video decoding unit 2051 may use a video codec in which a motion vector of HEVC is always set to 0 and inter prediction is always performed at the same position.

[0033] Alternatively, the displacement amount video decoding unit 2051 may use a video codec in which conversion is always skipped. For example, the displacement amount video decoding unit 2051 may always perform conversion of HEVC in a conversion skip mode.

[0034] Furthermore, the displacement amount video decoding unit 2051 may use a video codec in which quantization is always skipped. For example, the displacement amount video decoding unit 2051 may always perform quantization skip mode for HEVC quantization.

[0035] The image expansion unit 2052 is configured to expand the video generated by the displacement amount video decoding unit 2051 for each frame, thereby generating and outputting coefficient level values.

[0036] The coefficient level values ​​generated by the image development unit 2052 are represented by a matrix of size 1×K when a one-dimensional displacement coding method is used for each frame, and are represented by a matrix of size 3×K when a three-dimensional displacement coding method is used, where 1 and 3 indicate the number of dimensions, and K indicates the total number of subdivision vertices.

[0037] Each subdivision vertex has a subdivision level (LOD) defined as an integer equal to or greater than 0. An LOD of 0 indicates a direct current component, and an LOD of 1 or greater indicates a higher frequency component as it increases.

[0038] The number of coefficient level values ​​belonging to each LOD is given by the subdivision unit 203. The image development unit 2052 will be described in detail later.

[0039] The inverse quantization unit 2053 is configured to perform inverse quantization on the coefficient level values ​​generated by the image development unit 2052 to generate and output transform coefficients.

[0040] The inverse wavelet transform unit 2054 is configured to perform an inverse wavelet transform on the transform coefficients generated by the inverse quantization unit 2053 to generate and output a decoded displacement amount.

[0041] (Bitstream configuration for displacement image expansion) An example of the configuration of a displacement amount bit stream will be described below with reference to FIGS.

[0042] FIG. 4 is a diagram showing an example of the configuration of a displacement amount bit stream.

[0043] As shown in FIG. 4, first, the displacement bit stream may include a Displacement Sequence Parameter Set (DSPS) that is a set of control information related to decoding of the displacement.

[0044] Secondly, the displacement bitstream may include a Displacement Frame Parameter Set (DFPS), which is a set of control information corresponding to a frame.

[0045] Third, the displacement bitstream may include a Displacement Header (DH) including reference frame index information, etc., or may include a Displacement Data Unit (DDU), which is an encoded displacement corresponding to a frame.

[0046] In the above example, the syntax is explained as a displacement amount syntax (DSPS, DFPS, etc.), but it may be the syntax of the atlas decoded by the atlas decoding unit (ASPS: atlas sequence parameter set, AFPS: atlas frame parameter set, etc.) or another syntax.

[0047] The DFPS and AFPS do not have to be for each frame, and may exist for a group of frames such as a GOF (Group of Frames).

[0048] FIG. 5 is a diagram showing an example of a syntax configuration of a displacement parameter set (DPS).

[0049] In addition, in Fig. 5, the Descriptor column indicates how each syntax is coded. In Fig. 5, u(n) indicates an n-bit code.

[0050] The DSPS includes a flag (dsps_lod1_swap_present_flag) indicating whether or not an exchange between a coefficient level value with an LOD of 0 (hereinafter, a coefficient level value with LOD0) and a coefficient level value with an LOD of 1 (hereinafter, a coefficient level value with LOD1) exists in the sequence.

[0051] For example, when dsps_lod1_swap_present_flag is 0, the coefficient level value of LOD0 may be defined as being placed in the original position (left end) in all frames in the sequence.

[0052] For example, when dsps_lod1_swap_present_flag is 1, it may be defined that the coefficient level value of LOD0 is arranged to the immediate right of the coefficient level value of LOD1, and there exists at least one frame in which the positions of both are swapped.

[0053] When there is an exchange between coefficient level values ​​of LOD1 and coefficient level values ​​of LOD0, i.e., in the above example, when dsps_lod1_swap_present_flag is 1, a flag dsps_lod1_adaptive_swap_enabled_flag may be included for each frame indicating whether or not such an exchange has been set.

[0054] For example, when dsps_lod1_adaptive_swap_enabled_flag is 0, the above-mentioned exchange setting may be performed collectively for the entire sequence, rather than for each frame.

[0055] When dsps_lod1_adaptive_swap_enabled_flag is 1, when dfps_lod1_swap_flag is 1, the coefficient level values ​​of LOD0 and LOD1 are swapped, and when dfps_lod1_swap_flag is 0, the coefficient level values ​​of LOD0 and LOD1 are not swapped.

[0056] Note that an interframe may use dfps_lod1_swap_flag of a reference intraframe, which can prevent the arrangement of LOD coefficients between an interframe and an intraframe from differing, thereby preventing a decrease in coding efficiency in interframe prediction.

[0057] With these, it is possible to improve coding efficiency not only by rearranging coefficient level values ​​of the entire sequence, but also by rearranging coefficient level values ​​for each frame in a sequence with many intra frames.

[0058] Here, in the case of rearrangement by frame, inter frames can maintain consistency by using the swap setting of intra frames, and there is no need to set the unnecessary dfps_lod1_swap_flag.

[0059] FIG. 6 shows an example of another syntax.

[0060] Here, the atlas sequence parameter sets are referred to as ASPS (Atlas Sequence Parameter Set VDMC ext) and AFPS (Atlas Frame Parameter Set VDMC ext), but this is not the only possible case.

[0061] The sequence parameter set ASPS includes a flag (asps_lod1_swap_present_flag) indicating whether or not an exchange between coefficient level values ​​of LOD0 and LOD1 is present in the sequence.

[0062] For example, when asps_lod1_swap_present_flag is 0, the coefficient level value of LOD0 may be defined as being placed in the original position (left end) in all frames in the sequence.

[0063] For example, when asps_lod1_swap_present_flag is 1, it may be defined that the coefficient level value of LOD0 is arranged to the immediate right of the coefficient level value of LOD1, and there exists at least one frame in which the positions of both are swapped.

[0064] When there is an exchange between coefficient level values ​​of LOD1 and coefficient level values ​​of LOD0, i.e., in the above example, when asps_lod1_swap_present_flag is 1, a flag asps_lod1_adaptive_swap _enable_flag may be included indicating whether such an exchange is set for each frame or each GOF.

[0065] For example, when asps_lod1_adaptive_swap_enable_flag is 0, such exchange may be set collectively for the entire sequence, rather than for each frame or GOF.

[0066] On the other hand, when asps_lod1_adaptive_swap_enable_flag is 1, a flag asps_lod1_perframe_swap_enable_flag indicating whether swapping is per frame or per GOF may be included.

[0067] Here, in this syntax, it is not necessary to assign a parameter set to each frame, and it is sufficient for AFPS to be assigned to a group of multiple frames.

[0068] When asps_lod1_perframe_swap_enable_flag is 1, it may include numframes_minus1 (u(4) or u(5)), which indicates the number of frames covered by the frame parameter set minus 1.

[0069] Get afps_lod1_swap_flag[i] for the number of frames numframes_minus1 + 1. When afps_lod1_swap_flag[i] is 1, the coefficient level value of LOD0 and the coefficient level value of LOD1 are swapped, and when afps_lod1_swap_flag[i] is 0, the coefficient level value of LOD0 and the coefficient level value of LOD1 are not swapped.

[0070] On the other hand, afps_lod1__swap_flag_for_gof may be included when asps_lod1_perframe_swap_enable_flag is 0. When afps_lod1_swap_flag_for_gof is 1, the coefficient level values ​​of LOD0 and LOD1 are swapped, and when afps_lod1_swap_flag_for_gof is 0, the coefficient level values ​​of LOD0 and LOD1 are not swapped.

[0071] numframes_minus1+1 is the number of frames for which afps_lod1_swap_flag is set, but it may also indicate the number of intra frames. Since inter frames do not need to be described by using the same value as intra frames, it is possible to save bits.

[0072] In this way, by allowing the exchange of coefficient level values ​​of LOD0 and LOD1 for each frame or for each group of frames that have a reference relationship such as GoF, similar values ​​can be placed close to each other in the image, and an image can be generated that can be efficiently encoded by a video codec.

[0073] (Image development section 2052) The image development unit 2052 is configured to generate coefficient level values ​​from an image based on the arrangement of the coefficient level values ​​indicated by the control information.

[0074] Here, as a method for arranging the coefficient level values, for example, the coefficient level values ​​from low frequency components to high frequency components may be arranged in raster order in the image.

[0075] In this case, M×N blocks may be created, the coefficient level values ​​may be arranged in raster order within the blocks, and the blocks may be arranged in raster order.

[0076] Alternatively, the coefficient level values ​​may be arranged in a reverse raster order within an image, for example, from low-frequency components to high-frequency components.

[0077] In this case, M×N blocks may be created, the coefficient level values ​​may be arranged in reverse raster order within the blocks, and the blocks may be arranged in reverse raster order.

[0078] Alternatively, the coefficient level values ​​may be arranged in a combination of raster order and Morton order.

[0079] Specifically, M×M blocks may be created, the coefficient level values ​​within the blocks may be arranged in Morton order, and the blocks may be arranged in raster order.

[0080] Alternatively, the coefficient level values ​​may be arranged by combining the reverse raster order and the reverse Morton order, or the coefficient level values ​​may be arranged by combining the raster order and the reverse Morton order, or the coefficient level values ​​may be arranged by combining the reverse raster order and the Morton order.

[0081] FIG. 7 is a diagram showing an example of image development when coefficient level values ​​are arranged in a combination of the raster order and the Morton order.

[0082] When generating coefficient level values ​​from an image, the number of coefficient level values ​​belonging to each LOD given by the subdivision unit 203, the block size M indicated by the control information, and lod1_swapping_flag indicated by the control information are used.

[0083] After generating the coefficient level values ​​from the image, the coefficient level values ​​are rearranged using the lod1_swap_flag indicated by the control information.

[0084] FIG. 7 shows the case where lod1_swapping_flag is 1.

[0085] FIG. 8 is a diagram showing an example of image development in which coefficient level values ​​are arranged in a combination of the reverse raster order and the reverse Morton order.

[0086] The coefficient level value of LOD0 often has a smaller absolute value than the coefficient level values ​​of other LODs. In particular, it is statistically known that the coefficient level value of LOD0 is often smaller than the coefficient level value of LOD1, and it is also statistically known that the coefficient level value of LOD0 tends to be larger than the coefficient level values ​​of LOD2 or higher.

[0087] Therefore, although it is possible to freely exchange positions among the coefficient level values ​​of LOD0 to LOD3, etc., it is possible to reduce the number of bits while maintaining efficiency by limiting the exchange to only the coefficient level values ​​of LOD0 and LOD1.

[0088] If the above-mentioned image expansion can be performed, similar values ​​can be placed close to each other in the image during encoding. Also, since the fluctuation in absolute values ​​of the blocks to be decoded first is small, making it easier to create predicted images, intra-frame prediction will also be easier, and it will be possible to generate images that can be efficiently encoded by a video codec.

[0089] (Operation of the Displacement Amount Decoding Unit 205) An example of the operation of the displacement amount decoding unit 205 will be described below with reference to Fig. 9. Fig. 9 is a flowchart showing an example of the operation of the displacement amount decoding unit 205.

[0090] As shown in FIG. 9, in step S101, the displacement amount video decoding unit 2051 generates a video by decoding using a video codec.

[0091] In step S102, the image development unit 2052 generates coefficient level values.

[0092] In step S103, the image development unit 2052 determines whether or not to exchange the arrangement of coefficient level values ​​of LOD0 and coefficient level values ​​of LOD1 in the frame being processed.

[0093] Such a determination can be made by (dsps_lod1_swap_present_flag==1&&dsps_lod1_adaptive_swap_enable_flag==0) or (dsps_lod1_swap_present_flag==1&&dsps_lod1_adaptive_swap_enabled_flag==1&&dfps_lod1_swap_flag).

[0094] As another example of the determination, in addition to asps_lod1_swap_present_flag==1, (asps_lod1_adaptive_swap_enable_flag==0) or (asps_lod1_adaptive_swap_enable_flag==1&&afps_lod1_perframe_swap_enable_flag==0&&afps_lod1_swap_flag_for_gof==1) or (asps_lod1_adaptive_swap_enable_flag==1&&afps_lod1_perframe_swap_enable_flag==1&&afps_lod1_swap_flag[i]==1) can be used. The variable names are not limited to those mentioned above as long as the meaning is the same.

[0095] If the result of the determination in step S103 is Yes, the displacement amount decoding unit 205 proceeds to step S104, and if the result of the determination in step S103 is No, the displacement amount decoding unit 205 proceeds to step S105.

[0096] In step S104, the image development unit 2052 rearranges the coefficient level values.

[0097] In step S105, the inverse quantization unit 2053 generates transform coefficients by performing inverse quantization.

[0098] In step S106, the inverse wavelet transform unit 2054 generates a decoded displacement amount by performing an inverse wavelet transform.

[0099] In step S107, the image development unit 2052 determines whether or not the frame currently being processed is the final frame.

[0100] If Yes, the displacement amount decoding unit 205 ends this operation, and if No, the displacement amount decoding unit 205 proceeds to step S107.

[0101] In step S107, the image development unit 2052 proceeds to processing the next frame.

[0102] FIG. 10 is a flowchart showing an example of the operation of step S103 shown in FIG.

[0103] As shown in FIG. 10, in step S1031, the image development unit 2052 determines whether asps_lod1_swap_present_flag is 1 or not.

[0104] If the answer is Yes, the image development unit 2052 proceeds to step S1032; if the answer is No, the image development unit 2052 determines that the current frame is not an exchange frame.

[0105] In step S1032, the image development unit 2052 determines whether asps_lod1_adaptive_swap_enabled_flag is 0 or not.

[0106] If the result is No, the image development unit 2052 proceeds to step S1033, and if the result is Yes, the image development unit 2052 determines that the current frame is an exchange frame.

[0107] In step S1033, the image development unit 2052 determines whether asps_lod1_perframe_swap_enable_flag is 0 or not. If the answer is Yes, the image development unit 2052 proceeds to step S1034, and if the answer is No, the image development unit 2052 proceeds to step S1035.

[0108] In step S1034, the image development unit 2052 determines whether afps_lod1_swap_flag[i] is 1 or not.

[0109] If the answer is Yes, the image development section 2052 determines that the current frame is an exchange frame, and if the answer is No, the image development section 2052 determines that the current frame is not an exchange frame.

[0110] In step S1035, the image development unit 2052 determines whether afps_lod1_swap_flag_for_gof is 1 or not.

[0111] If the answer is Yes, the image development section 2052 determines that the current frame is an exchange frame, and if the answer is No, the image development section 2052 determines that the current frame is not an exchange frame.

[0112] According to this embodiment, by rearranging the coefficient level values ​​for each sequence, frame, or frame group such as GOF in units of subdivision level (LOD) and making them selectable, it is possible to generate video that can be efficiently encoded by a video codec, thereby improving encoding efficiency.

[0113] The above-mentioned mesh encoding device 100 and mesh decoding device 200 may be realized as a program that causes a computer to execute each function (each process). [Industrial Applicability]

[0114] According to this embodiment, for example, it is possible to improve the overall service quality in video communication, which makes it possible to contribute to Goal 9 of the Sustainable Development Goals (SDGs) led by the United Nations, which is to "build resilient infrastructure, promote sustainable industrialization and foster innovation." [Explanation of symbols]

[0115] 1. Mesh processing system 100...Mesh coding device 200…Mesh decoding unit 201…Demultiplexer 202...Basic mesh decoding unit 203…Subdivision part 204...Mesh decoding unit 205...Displacement amount decoding unit 2051...Displacement amount video decoding unit 2052…Image development section 2053 Inverse quantization section 2054 Inverse Wavelet Transform 206...Video decoding section 207...Atlas data decoding unit

Claims

1. A mesh decoding device, comprising: a displacement amount decoding unit configured to decode the displacement amount bitstream to generate and output the displacement amount; The displacement amount decoding unit a displacement video decoder configured to generate a video by decoding the displacement bitstream using a video codec; an image expansion unit configured to generate coefficient level values ​​by expanding the image frame by frame; an inverse quantization unit configured to perform inverse quantization on the coefficient level values ​​to generate transform coefficients; an inverse wavelet transform unit configured to generate decoded displacements by performing an inverse wavelet transform on the transform coefficients, The mesh decoding device, wherein the image expansion unit expands the image while rearranging the coefficient level values ​​using an LOD defined for the coefficient level values.

2. 2. The mesh decoding device according to claim 1, wherein the image expansion unit is configured to exchange positions of coefficient level values ​​of LOD0 and coefficient level values ​​of LOD1.

3. 3. The mesh decoding device according to claim 1, wherein the image expansion unit is configured to determine whether or not there is an exchange of coefficient level values ​​on a sequence-by-sequence basis.

4. The mesh decoding device according to claim 3, characterized in that the image expansion unit is configured to make the determination depending on a flag indicating whether or not to switch the exchange setting for each frame or for each GoF.

5. The mesh decoding device according to claim 2, characterized in that the image expansion unit is configured to perform the exchange depending on a flag indicating whether to exchange the coefficient level values ​​of LOD0 and LOD1 for each frame or each GoF.

6. The mesh decoding device according to claim 1 or 2, characterized in that, in the case of an intra-frame, the image expansion unit is configured to set a flag indicating whether or not to exchange the coefficient level value of LOD0 and the coefficient level value of LOD1 for each frame.

7. The mesh decoding device according to claim 1 or 2, characterized in that, in the case of an interframe, the image expansion unit is configured to use the same value as the setting value of a flag indicating whether or not to exchange the coefficient level value of LOD0 and the coefficient level value of LOD1 for each frame of the referenced intraframe.

8. The mesh decoding device according to claim 5, characterized in that the image expansion unit is configured to exchange coefficient level values ​​of LOD0 and LOD1 throughout the entire sequence when the flag is set to not perform the exchange.

9. The mesh decoding device according to claim 1, characterized in that the image expansion unit is configured to expand the image in a combination of raster order and Morton order, a combination of raster order and reverse Morton order, a combination of reverse raster order and Morton order, or a combination of reverse raster order and reverse Morton order.

10. 2. The mesh decoding device according to claim 1, wherein the image expansion unit is configured to expand the image in a raster order or a reverse raster order.

11. The mesh decoding device according to claim 1 , wherein the video decoding unit is configured to generate video using a video codec that always skips transform and quantization.

12. 1. A mesh decoding method, comprising: Decoding the displacement bitstream to generate and output a displacement, The process comprises: A step A of generating a video by decoding the displacement bitstream by a video codec; a step B of generating coefficient level values ​​by unfolding said image frame by frame; a step C of generating transform coefficients by performing inverse quantization on the coefficient level values; and D generating decoded displacements by performing an inverse wavelet transform on the transform coefficients, A mesh decoding method, characterized in that in the step B, the image is expanded while rearranging the coefficient level values ​​using an LOD defined for the coefficient level values.

13. A program for causing a computer to function as a mesh decoding device, comprising: The mesh decoding device comprises a displacement decoding unit configured to decode a displacement bitstream to generate and output a displacement, The displacement amount decoding unit a displacement video decoder configured to generate a video by decoding the displacement bitstream using a video codec; an image expansion unit configured to generate coefficient level values ​​by expanding the image frame by frame; an inverse quantization unit configured to perform inverse quantization on the coefficient level values ​​to generate transform coefficients; an inverse wavelet transform unit configured to generate decoded displacements by performing an inverse wavelet transform on the transform coefficients, The image expansion unit expands an image while sorting the coefficient level values ​​using an LOD defined for the coefficient level values.

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