Image sensor

Abstract

To provide an image sensor having improved optical characteristics.SOLUTION: There is provided an image sensor, more specifically, an image sensor which includes a semiconductor substrate including a pixel array region having an edge pixel region surrounding a center pixel region, in the center pixel region and plan view, color filter groups on the pixel array region, in which each of the color filter groups includes color filters arranged in n rows and n columns, and micro-lenses which are arranged so as to cover each of the color filter groups, wherein the color filter group includes center color filter groups on the center pixel region and edge color filter groups on the edge pixel region, and in each of the edge color filter groups, at least two thicknesses in the color filters are different.SELECTED DRAWING: Figure 6A

Description

[Technical field]

[0001] The present invention relates to an image sensor, and more particularly to an image sensor having improved electrical and optical characteristics. [Background technology]

[0002] Image sensors convert optical images into electrical signals. With the development of the computer and communication industries, the demand for image sensors with improved performance is increasing in various fields such as digital cameras, video cameras, PCS (Personal Communication Systems), game machines, security cameras, and medical micro cameras. Image sensors include charge coupled devices (CCDs) and CMOS image sensors. Among them, CMOS image sensors have a simple driving method and can integrate signal processing circuits on a single chip, making it possible to miniaturize products. CMOS image sensors also consume very little power, making them easy to apply to products with limited battery capacity. In addition, CMOS image sensors can be used interchangeably with CMOS process technology, reducing manufacturing costs. Therefore, the use of CMOS image sensors is rapidly increasing as technology development makes it possible to realize high resolution. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent No. 11,128,796 B2 Summary of the Invention [Problem to be solved by the invention]

[0004] SUMMARY OF THE PRESENT EMBODIMENT An object of the present invention is to provide an image sensor having improved optical characteristics.

[0005] The problems to be solved by the present invention are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0006] In order to achieve the above problem, an image sensor according to an embodiment of the present invention includes a semiconductor substrate including a pixel array region having a center pixel region and an edge pixel region surrounding the center pixel region in a plan view, color filter groups on the pixel array region, each of the color filter groups including color filters arranged in n rows and n columns, and microlenses arranged to cover each of the color filter groups, wherein the color filter groups include a center color filter group on the center pixel region and an edge color filter group on the edge pixel region, and within each of the edge color filter groups, at least two of the color filters may have different thicknesses.

[0007] In order to achieve the above object, an image sensor according to an embodiment of the present invention includes a semiconductor substrate of a first conductivity type having a first surface and a second surface facing each other and including a pixel array region; a photoelectric conversion region provided in the pixel array region and including impurities of a second conductivity type; color pixel groups covering at least a portion of the pixel array region; each of the color pixel groups including first to fourth color filters arranged in two rows and two columns; and a microlens arranged to cover each of the color filter groups, wherein the pixel array region includes the center pixel region and an edge pixel region surrounding the center pixel region in a plan view, and the color filter groups include a center color filter group on the center pixel region and an edge color filter group on the edge pixel region, and a thickness of the first color filter may be greater than a thickness of the second color filter in each of the edge color filter groups.

[0008] In order to achieve the above object, an image sensor according to an embodiment of the present invention includes a semiconductor substrate having a first surface and a second surface facing each other, the first surface including a light receiving region, a light blocking region, and a pad region; a pixel separating structure disposed in the semiconductor substrate in the light receiving region and the light blocking region and defining a plurality of pixel regions; a photoelectric conversion region in the semiconductor substrate disposed in the light receiving region and the light blocking region; a color filter group disposed on the first surface, each of the color filter groups including first to fourth color filters arranged in two rows and two columns, a transfer gate electrode on the second surface, a pixel circuit layer on the second surface, and a microlens disposed to cover each of the color filter groups, the light receiving region including the center pixel region and an edge pixel region surrounding the center pixel region in a plan view, the color filter group including a center color filter group on the center pixel region and an edge color filter group on the edge pixel region, and a thickness of the first color filter in each of the edge color filter groups may be greater than a thickness of the second color filter. Effect of the Invention

[0009] According to an embodiment of the present invention, the optical performance of an image sensor can be improved. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram of an image sensor according to an embodiment of the present invention. [Figure 2A] 2 is a circuit diagram of a unit pixel of an image sensor according to an embodiment of the present invention; [Figure 2B] 2 is a circuit diagram of a unit pixel of an image sensor according to an embodiment of the present invention; [Diagram 3] 1 is a plan view illustrating an image sensor according to an embodiment of the present invention. [Figure 4]4 is an enlarged view of the light receiving area in FIG. 3. [Figure 5A] 5 is an enlarged view of part P1 in FIG. 4. [Figure 5B] 5 is an enlarged view of a portion P1' in FIG. 4. [Figure 6A] 5B is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line AA' of FIG. 5A. [Figure 6B] 5B is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line BB' of FIG. 5A. [Figure 6C] 5B is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line CC' of FIG. 5A. [Figure 7] 5 is an enlarged view of part P2 in FIG. 4. [Figure 8A] 8 is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line II' of FIG. 7; [Figure 8B] 8 is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line II-II' of FIG. 7. [Figure 8C] 8 is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line III-III' of FIG. 7. [Figure 9] FIG. 1 is a plan view illustrating an image sensor according to several embodiments of the present invention. [Figure 10] FIG. 1 is a plan view illustrating an image sensor according to several embodiments of the present invention. [Figure 11] 1 is a cross-sectional view illustrating an image sensor according to several embodiments of the present invention. [Figure 12] 1 is a cross-sectional view illustrating an image sensor according to several embodiments of the present invention. [Figure 13] 1 is a cross-sectional view illustrating an image sensor according to several embodiments of the present invention. [Figure 14] FIG. 11 is a plan view illustrating an image sensor according to another embodiment of the present invention. [Figure 15]15 is a cross-sectional view of an image sensor according to another embodiment of the present invention, taken along line AA' of FIG. 14. [Figure 16] FIG. 13 is a plan view illustrating an image sensor according to another embodiment of the present invention. [Figure 17] 17 is a cross-sectional view of an image sensor according to another embodiment of the present invention, taken along line AA' of FIG. 16. [Figure 18A] 4 is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line AA' of FIG. 3; [Figure 18B] 4 is a cross-sectional view of an image sensor according to an embodiment of the present invention, taken along line AA' of FIG. 3; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. The same reference characters may refer to the same elements throughout the specification.

[0012] FIG. 1 is a block diagram of an image sensor according to an embodiment of the present invention.

[0013] Referring to FIG. 1, the image sensor includes an active pixel sensor array 1, a row decoder 2, a row driver 3, a column decoder 4, a timing generator 5, a correlated double sampler (CDS) 6, an analog to digital converter (ADC) 7, and an input / output buffer 8.

[0014] The active pixel sensor array 1 includes a number of unit pixels arranged two-dimensionally, and converts optical signals into electrical signals. The active pixel sensor array 1 can be driven by a number of driving signals, such as a pixel selection signal, a reset signal, and a charge transfer signal, from a row driver 3. The converted electrical signals are provided to a correlated double sampler 6.

[0015] The row driver 3 provides a number of drive signals for driving a number of unit pixels to the active pixel sensor array 1 according to the result of decoding by the row decoder 2. When the unit pixels are arranged in a matrix, a drive signal can be provided for each row.

[0016] A timing generator 5 provides timing and control signals to the row decoder 2 and the column decoder 4 .

[0017] The correlated double sampler 6 receives, holds, and samples the electrical signal generated by the active pixel sensor array 1. The correlated double sampler 6 double samples a specific noise level and a signal level according to the electrical signal, and outputs a level corresponding to the difference between the noise level and the signal level.

[0018] The analog-to-digital converter 7 converts an analog signal corresponding to the level output from the correlated double sampler 6 into a digital signal and outputs the digital signal.

[0019] The input / output buffer 8 latches digital signals, and outputs the latched signals to a video signal processor (not shown) in sequence according to the results of decoding by the column decoder 4 .

[0020] 2A and 2B are circuit diagrams of a unit pixel of an image sensor according to an embodiment of the present invention.

[0021] 2A, the unit pixel P may include first and second photoelectric conversion elements PD1 and PD2, first and second transfer transistors TX1 and TX2, and four pixel transistors. For example, each of the four pixel transistors may correspond to, but is not limited to, a reset transistor (RX), a source follower transistor (SF), a selection transistor (SEL), and a dual conversion gain transistor (DCX). That is, the pixel transistors in each unit pixel P may be variously provided. The first and second photoelectric conversion elements PD1 and PD2 can generate and accumulate charges corresponding to incident light. For example, the first and second photoelectric conversion elements PD1 and PD2 can be a photodiode, a phototransistor, a photogate, a pinned photodiode (PPD), or a combination thereof.

[0022] The first and second transfer transistors TX1 and TX2 transfer the charges stored in the first and second photoelectric conversion elements PD1 and PD2 to the floating diffusion region FD. The first and second transfer transistors TX1 and TX2 can be controlled by signals applied to the first and second transfer gate electrodes TG1 and TG2. The first and second transfer transistors TX1 and TX2 can share the floating diffusion region FD, but are not limited thereto. That is, the first and second transfer transistors TX1 and TX2 can be connected to different floating diffusion regions FD.

[0023] The floating diffusion region FD receives and accumulates the charges generated in the first or second photoelectric conversion element PD1 or PD2. The source follower transistor SF can be controlled according to the amount of photocharges accumulated in the floating diffusion region FD.

[0024] The reset transistor RX can periodically initialize the charge stored in the floating diffusion region FD in response to a reset signal applied to the reset gate electrode RG. Specifically, the drain terminal of the reset transistor RX can be connected to the dual conversion gain transistor DCX, and the source terminal is connected to the pixel power supply voltage VDD. When the reset transistor RX and the dual conversion gain transistor DCX are turned on, the pixel power supply voltage VDD is transferred to the floating diffusion region FD. As a result, the charge stored in the floating diffusion region FD can be discharged, and the floating diffusion region FD can be initialized.

[0025] The dual conversion gain transistor DCX may be connected between the floating diffusion region FD and the reset transistor RX. The dual conversion gain transistor DCX may control the conversion gain by changing the capacitance of the floating diffusion region FD in response to a dual conversion gain control signal. Different conversion gains may be provided depending on the operation of the dual conversion gain transistor DCX. Thus, in a high illumination mode, the dual conversion gain transistor DCX may be turned on, and in a low illumination mode, the dual conversion gain transistor DCX may be turned off.

[0026] The source follower transistor SF may be a source follower buffer amplifier that generates a source-drain current in proportion to the amount of charge of the floating diffusion region FD1 input to the source follower gate electrode. The source follower transistor SF amplifies the potential change in the floating diffusion region FD and outputs the amplified signal to the output line Vout through the selection transistor SEL. The source terminal of the source follower transistor SF may be connected to a pixel power supply voltage VDD, and the drain terminal of the source follower transistor SF may be connected to the source terminal of the selection transistor SEL.

[0027] The selection transistor SEL can select a unit pixel P to be read out on a row-by-row basis. When the selection transistor SEL is turned on by a selection signal applied to the selection gate electrode SG, an electrical signal output to the drain electrode of the source follower transistor SF can be output to the output line Vout.

[0028] Referring to FIG. 2B, a unit pixel P may include first to fourth photoelectric conversion elements PD1, PD2, PD3, and PD4, first to fourth transfer transistors TX1, TX2, TX3, and TX4, and four pixel transistors.

[0029] The first to fourth transfer transistors TX1, TX2, TX3, and TX4 may share a floating diffusion region FD. The first to fourth transfer transistors TX1, TX2, TX3, and TX4 may be controlled by signals applied to the first to fourth transfer gate electrodes TG1, TG2, TG3, and TG4.

[0030] The four pixel transistors may correspond to the reset transistor RX, the source follower transistor SF, the selection transistor SEL, and the dual conversion gain transistor DCX described in FIG. 2A.

[0031] 3 is a plan view of an image sensor according to an embodiment of the present invention, and FIG 4 is an enlarged view of a light receiving area of ​​FIG 3.

[0032] 3 and 4, the image sensor may include a pixel array region R1 and a pad region R2.

[0033] The pixel array region R1 may include a plurality of pixels P two-dimensionally arranged along a first direction D1 and a second direction D2 intersecting each other. Each of the pixels P may include a photoelectric conversion element and a readout element. An electrical signal generated by incident light from each of the pixels P in the pixel array region R1 may be output.

[0034] The pixel array region R1 may include a light receiving region AR and a light blocking region OB. In a plan view, the light blocking region OB may surround the light receiving region AR. That is, in a plan view, the light blocking region OB may be disposed above, below, left and right of the light receiving region AR. A reference pixel P to which light is not incident is provided in the light blocking region OB, and the amount of charge sensed in the unit pixel P of the light receiving region AR may be compared with the amount of reference charge generated in the reference pixel P to calculate the size of an electrical signal sensed in the unit pixel P.

[0035] The pixel array region R1 may include a center pixel region CR in which a plurality of pixels are arranged in the light receiving region AR, and edge pixel regions ER surrounding the center pixel region CR in a plan view. In other words, the edge pixel regions ER may be arranged above, below, left and right of the center pixel region CR in a plan view. In this case, the angle of incident light entering the edge pixel region ER may be different from the angle of incident light entering the center pixel region CR.

[0036] A color filter and a microlens may be disposed on the pixel array region R1.

[0037] The color filters may be disposed on the pixel array region R1, each of which may be disposed to cover a reference pixel P. The color filters may be arranged in n rows and n columns to form color filter groups ECFG, ECFG', and CCFG.

[0038] The color filters may include a red color filter, a green color filter, and a blue color filter, which can selectively transmit incident light.

[0039] The microlenses can condense light incident from the outside. The microlenses can be two-dimensionally arranged along first and second directions D1 and D2 that intersect with each other in a plan view.

[0040] Each microlens may cover one of the color filter groups. For example, one microlens may cover color filter groups arranged in two rows and two columns. The color filters and microlenses will be described in detail below with reference to FIGS. 5A to 10.

[0041] FIG. 5A is an enlarged view of a portion P1 in FIG. 4. FIG. 5B is an enlarged view of a portion P1' in FIG. 4. FIGS. 6A to 6C are cross-sectional views of an image sensor according to an embodiment of the present invention, taken along lines A-A', B-B', and C-C' in FIG. 5A. FIG. 7 is an enlarged view of a portion P2 in FIG. 4. FIGS. 8A to 8C are cross-sectional views of an image sensor according to an embodiment of the present invention, taken along lines I-I', II-II', and III-III' in FIG. 7. FIGS. 9 and 10 are plan views showing image sensors according to various embodiments of the present invention.

[0042] 5A to 10, an image sensor according to an embodiment of the present invention may include a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30 from a vertical perspective.

[0043] The photoelectric conversion layer 10 may be disposed between the pixel circuit layer 20 and the light transmission layer 30 in a vertical perspective. Light incident from the outside may be converted into an electrical signal in the photoelectric conversion layer 10. The photoelectric conversion layer 10 may include a semiconductor substrate 100, a pixel isolation structure DTI located inside the semiconductor substrate 100, a barrier region 103, and a photoelectric conversion region PD.

[0044] Specifically, the semiconductor substrate 100 may have a first surface 100a and a second surface 100b facing each other. The semiconductor substrate 100 may be a substrate in which a first conductive type (e.g., p-type) bulk silicon substrate has a first conductive type epitaxial layer formed thereon, and may be a substrate in which the bulk silicon substrate is removed and only the p-type epitaxial layer remains in a manufacturing process of an image sensor. Alternatively, the semiconductor substrate 100 may be a bulk semiconductor substrate including a first conductive type well. The first surface 100a of the semiconductor substrate 100 may face a color filter, and the second surface 100b of the semiconductor substrate 100 may face the pixel circuit layer 20.

[0045] An isolation layer 105 may be disposed adjacent to the second surface 100b of the semiconductor substrate 100 in each of the pixel regions PR. The isolation layer 105 may be provided in an isolation trench T1 formed by recessing the second surface 100b of the semiconductor substrate 100. The isolation layer 105 may include an insulating material. The isolation layer 105 may define an active portion on the second surface 100b of the semiconductor substrate 100. For example, the isolation layer 105 may define first and second active portions in the semiconductor substrate 100. The first and second active portions may be disposed spaced apart from each other in each of the pixel regions PR and may have different sizes.

[0046] The pixel isolating structure DTI may be provided in a pixel isolating trench formed by recessing the first surface 100a of the semiconductor substrate 100. The pixel isolating structure DTI may define a plurality of pixel regions PR. The pixel isolating structure DTI may penetrate the semiconductor substrate 100 from the second surface 100b to the first surface 100a of the semiconductor substrate 100. The pixel isolating structure DTI may penetrate a portion of the device isolation layer 105.

[0047] The pixel separating structure DTI may include portions extending side by side along a first direction D1 and portions extending parallel to each other along a second direction D2. In a plan view, the pixel separating structure DTI may surround each of the pixel regions PR or the photoelectric conversion regions PD.

[0048] The pixel separating structure DTI may have an upper width at the second surface 100b of the semiconductor substrate 100 and a lower width at the first surface 100a of the semiconductor substrate 100. The lower width may be smaller than the upper width. For example, the width of the pixel separating structure DTI may become gradually narrower from the second surface 100b to the first surface 100a of the semiconductor substrate 100. The pixel separating structure DTI may have a length in a third direction D3. The length of the pixel separating structure DTI may be substantially equal to the vertical thickness of the semiconductor substrate 100.

[0049] A photoelectric conversion region PD may be provided in the semiconductor substrate 100 of each pixel region PR. The photoelectric conversion region PD generates photocharges in proportion to the intensity of incident light. The photoelectric conversion region PD may be formed by ion-implanting impurities having a second conductivity type opposite to that of the semiconductor substrate 100 into the semiconductor substrate 100. The photoelectric conversion region PD of the second conductivity type may form a photodiode by junctioning with the semiconductor substrate 100 of the first conductivity type. For example, the photoelectric conversion region PD may have a difference in impurity concentration between a region adjacent to the first surface 100a and a region adjacent to the second surface 100b so as to have a potential gradient between the first surface 100a and the second surface 100b of the semiconductor substrate 100. For example, the photoelectric conversion region PD may include a plurality of impurity regions vertically stacked.

[0050] A pixel circuit layer 20 may be disposed on the second surface 100b of the semiconductor substrate 100. The pixel circuit layer 20 may include a pixel circuit (e.g., a MOS transistor) electrically connected to the photoelectric conversion region PD. In other words, the pixel circuit layer 20 may include the pixel transistors described in FIG. 2A, such as a reset transistor RX, a selection transistor SEL, a dual conversion gain transistor DCX, and a source follower transistor SF.

[0051] The transfer gate electrode TG may be located on the second surface 100b of the semiconductor substrate 100. The transfer gate electrode TG may penetrate a portion of the semiconductor substrate 100. That is, the transfer gate electrode TG may be T-shaped from a vertical perspective. A gate insulating film GIL may be interposed between the transfer gate electrode TG and the semiconductor substrate 100.

[0052] A floating diffusion region FD may be provided in the first active portion on one side of the transfer gate electrode TG. The floating diffusion region FD may be formed by ion-implanting impurities having a conductivity type opposite to that of the semiconductor substrate 100. For example, the floating diffusion region FD may be an impurity region having a second conductivity type.

[0053] At least one pixel transistor may be provided in the second active portion in each pixel region PR. The pixel transistor provided in each pixel region PR may be at least one of the reset transistor RX, the source follower transistor SF, the dual conversion gain transistor DCX, and the selection transistor SEL described with reference to FIGS. 2A and 2B. The pixel transistor may include a pixel gate electrode across the second active portion and a source / drain region provided in the second active portion on both sides of the pixel gate electrode. The pixel gate electrode may have a bottom surface parallel to a top surface of the second active portion. The pixel gate electrode may include, for example, doped polysilicon, metal, conductive metal nitride, conductive metal silicide, conductive metal oxide, or a combination thereof.

[0054] An interlayer insulating film 210 is disposed on the second surface 100b of the semiconductor substrate 100 and may be composed of multiple layers. The interlayer insulating film 210 may cover the transfer gate electrode TG and a wiring structure connected to the pixel circuit. The wiring structure may include metal lines 223 and contact plugs 221 connecting the metal lines 223 and the contact plugs 221.

[0055] The light-transmitting layer 30 may be disposed on the first surface 100a of the semiconductor substrate 100. The light-transmitting layer 30 may include a flat insulating film 310, a light-shielding pattern 320, a protective film 330, a color filter CF, a microlens 340, and a passivation film. The light-transmitting layer 30 may collect and filter light incident from the outside and provide the collected light to the photoelectric conversion layer 10.

[0056] Specifically, the planar insulating film 310 may cover the first surface 100a of the semiconductor substrate 100. The planar insulating film 310 may be made of a transparent insulating material and may include a plurality of layers. The planar insulating film 310 may be made of an insulating material having a different refractive index from that of the semiconductor substrate 100. The planar insulating film 310 may include metal oxide and / or silicon oxide. For example, the planar insulating film 310 may be made of Al. 2 O3 , CeF 3 , HfO 2 , ITO, MgO, Ta 2 O 5 , TiO 2 , ZrO 2 , Si, Ge, ZnSe, ZnS, or PbF 2 Alternatively, the flat insulating film 310 may be formed of an organic material having a high refractive index, and may include siloxane resin, BCB (benzocyclobutene), polyimide series, acryl series, Parylene C, PMMA (Poly(methyl methacrylate)), PET (Polyethylene terephthalate), etc. Also, the flat insulating film 310 may include strontium titanate (SrTiO 3 ), polycarbonate, glass, bromine, sapphire, cubic zirconia, potassium niobate (KNbO 3 ), moissanite (SiC), gallium(III) phosphide (GaP), gallium(III) arsenide (GaAs), and the like.

[0057] The light blocking pattern 320 may be disposed on the planar insulating film 310 and may separate the color filter group CFG. The light blocking pattern 320 may have a lattice shape in a plan view, similar to the pixel separating structure DTI. In a plan view, the light blocking pattern 320 may overlap the pixel separating structure DTI. That is, the light blocking pattern 320 may include a portion extending in a first direction D1 and a portion extending in a second direction D2. The width of the light blocking pattern 320 may be substantially equal to or smaller than the minimum width of the pixel separating structure DTI. The light blocking pattern 320 may include a metal material such as titanium, tantalum, or tungsten.

[0058] A low refractive index pattern may be disposed on the planar insulating film 310 instead of the light blocking pattern 320. The low refractive index pattern may be made of a material having a lower refractive index than the light blocking pattern. The low refractive index pattern may be made of an organic material and may have a refractive index of about 1.1 to 1.3. For example, the low refractive index pattern may be a polymer layer containing silica nanoparticles.

[0059] The protective layer 330 may cover the surfaces of the planar insulating layer 310 and the light blocking pattern 320. The protective layer 330 may have a substantially uniform thickness. The protective layer 330 may include at least one single layer or multiple layers of, for example, an aluminum oxide layer and a silicon oxycarbide layer.

[0060] A color filter may be formed on the protective layer 330 corresponding to each of the pixel regions PR. The color filter may fill a space defined by the light blocking pattern 320. The color filter may include a red, green, or blue color filter, or a magenta, cyan, or yellow color filter depending on the unit pixel.

[0061] The color filters may constitute color filter groups ECFG and CCFG arranged in n rows and n columns. For convenience of explanation, only four color filter groups CFG_a, CFG_b, CFG_c, CFG_d, CFG_e, and CFG_f, which are a part of the color filter groups ECFG and CCFG, are illustrated in Figures 5A, 5B, and 7. Each of the color filter groups CFG_a, CFG_b, CFG_c, CFG_d, CFG_e, and CFG_f is composed of color filters arranged in n rows and n columns, and may include first to fourth color filters CF1_a to CF4_a / CF1_b to CF4_b / CF1_c to CF4_c / CF1_d to CF4_d / CF1_e to CF4_e. 5A to 10, color filter groups CFG_a, CFG_b, CFG_c, CFG_d, CFG_e, and CFG_f arranged in two rows and two columns are shown as an exemplary embodiment of the present invention.

[0062] A center color filter group CCFG may be disposed on a center pixel region (CR in FIG. 4), and an edge color filter group ECFG may be disposed on an edge pixel region (ER in FIG. 4). The center color filter group CCFG and the edge color filter group ECFG may be disposed at different positions on the pixel array region (R1 in FIG. 4).

[0063] For example, the edge color filter group ECFG can be disposed so as to surround the center color filter group CCFG in a plan view.

[0064] The microlenses 340a and 340b may be disposed on the color filters. Specifically, the microlenses 340a and 340b may be disposed to cover the color filter groups CCFG and ECFG, respectively. For example, the microlenses 340a and 340b may each cover one color filter group CFG_a, CFG_b, CFG_c, CFG_d, CFG_e, and CFG_f, which is composed of two rows and two columns of color filters.

[0065] The microlenses 340a and 340b may include a first microlens 340a covering the edge color filter group ECFG and a second microlens 340b covering the center color filter group CCFG. In a plan view, the center of the first microlens 340a may be shifted from the center of each edge color filter group ECFG. For example, the center of the first microlens 340a may be shifted toward the center of the pixel array region (R1 in FIG. 3). Therefore, light irradiated to the edge pixel region (ER in FIG. 4) may be irradiated close to the center of the edge pixel region (ER in FIG. 4).

[0066] The microlenses 340a and 340b may have a convex shape and a predetermined radius of curvature. The microlenses 340a and 340b may include a light-transmitting resin.

[0067] A passivation film may be disposed on the microlens 340 and conformally cover the surfaces of the microlenses 340a, 340b. As an example, the passivation film may include an inorganic oxide.

[0068] The color filter groups will be described with reference to FIGS. Each of the color filter groups CFG_1, CFG_2, CFG_3, CFG_4, and CFG may include first to fourth color filters CF1, CF2, CF3, and CF4 arranged in two rows and two columns. In the color filter groups CFG_1, CFG_2, CFG_3, CFG_4, and CFG, the first color filter CF1 and the second color filter CF2 may be arranged to face each other diagonally, and the third color filter CF3 and the fourth color filter CF4 may be arranged to face each other diagonally.

[0069] 9, the first to fourth color filters CF1, CF2, CF3, CF4 in each of the color filter groups CFG_1, CFG_2, CFG_3, CFG_4 may have the same color filters. As an example, the first to fourth color filters CF1, CF2, CF3, CF4 in each of the color filter groups CFG_1, CFG_2, CFG_3, CFG_4 may be one of a red color filter, a green color filter, or a blue color filter. As another example, the first to fourth color filters CF1, CF2, CF3, CF4 in each of the color filter groups CFG_1, CFG_2, CFG_3, CFG_4 may include complementary colors such as cyan, magenta, or yellow.

[0070] 10, the first to fourth color filters CF1, CF2, CF3, and CF4 in each color filter group CFG may include color filters of different colors. As an example, the first and second color filters CF1 and CF2 may include green color filters, the third color filter CF3 may include a blue color filter, and the fourth color filter CF4 may include a red color filter. In each color filter group CFG, the first to fourth color filters CF1, CF2, CF3, and CF4 may be arranged in a Bayer pattern. As another example, in each of the color filter groups CFG_1, CFG_2, CFG_3, and CFG_4, the first to fourth color filters CF1, CF2, CF3, and CF4 may include complementary colors such as cyan, magenta, or yellow.

[0071] 5A to 6C, the edge color filter groups ECFG and ECFG' may include first to fourth edge color filter groups CFG_a, CFG_b, CFG_c, and CFG_d arranged adjacent to each other. The first edge color filter group CFG_a may include first to fourth color filters CF1_a, CF2_a, CF3_a, and CF4_a. Similarly, the second to fourth edge color filter groups CFG_b, CFG_c, and CFG_d may include first to fourth color filters CF1_b, CF2_b, CF3_b, CF4_b / CF1_c, CF2_c, CF3_c, CF4_c / CF1_d, CF2_d, CF3_d, and CF4_d, respectively.

[0072] FIG. 5A illustrates an edge color filter group ECFG disposed at the upper right end of a pixel array region (R1 in FIG. 4). The second edge color filter group CFG_b may refer to a color filter group located at the upper right end of the first edge color filter group CFG_a, and located farther away from the center pixel region (CR in FIG. 4). In addition, the second color filter CF2_a in the first edge color filter group CFG_a may refer to a color filter located at the upper right end of the first color filter CF1_a, and located farther away from the center pixel region (CR in FIG. 4) than the first color filter CF1_a. Similarly, the second color filters CF2_b / CF2_c / CF2_d in the second to fourth edge color filter groups CFG_b / CFG_c / CFG_d may refer to color filters located farther away from the center pixel region (CR in FIG. 4) than the first color filters CF1_b / CF1_c / CF1_d.

[0073] FIG. 5B illustrates an edge color filter group ECFG' disposed at the lower left end of the pixel array region (R1 in FIG. 4). The second edge color filter group CFG_b may refer to a color filter group located at the lower left end of the first edge color filter group CFG_a, and located farther away from the center pixel region (CR in FIG. 4). In addition, the second color filter CF2_a in the first edge color filter group CFG_a may refer to a color filter located at the lower left end of the first color filter CF1_a, and located farther away from the center pixel region (CR in FIG. 4) than the first color filter CF1_a. Similarly, the second color filters CF2_b / CF2_c / CF2_d in the second to fourth edge color filter groups CFG_b / CFG_c / CFG_d may refer to color filters located farther away from the center pixel region (CR in FIG. 4) than the first color filters CF1_b / CF1_c / CF1_d.

[0074] For convenience of explanation, the present specification will be described based on an edge color filter disposed at the upper right end of a pixel array region (R1 in FIG. 4) as shown in FIG. 5A. However, the second to fourth edge color filter groups may refer to color filter groups located farther away from a center pixel region (CR in FIG. 4) than the first edge color filter group. Also, within each edge color filter group, the second to fourth color filters may refer to color filters located farther away from the center pixel region than the first color filter.

[0075] In the first edge color filter group CFG_a, the second color filter CF2_a may be disposed closer to the edge of the pixel array region (R1 in FIG. 3) than the first color filter CF1_a. Similarly, the third and fourth color filters CF3_a and CF4_a may be disposed farther away from the center pixel region (CR in FIG. 4) than the first color filter CF1_a, and may be disposed adjacent to the first and second color filters CF1_a and CF2_a.

[0076] In the first edge color filter group CFG_a, the first to fourth color filters CF1_a, CF2_a, CF3_a, and CF4_a may have different thicknesses. For example, the thickness T2a of the second color filter CF2_a may be smaller than the thickness T1a of the first color filter CF1_a. In addition, the thicknesses T3a and T4a of the third and fourth color filters CF3_a and CF4_a may also be smaller than the thickness T1a of the first color filter. In this case, the thicknesses of the first to fourth color filters CF1_a, CF2_a, CF3_a, and CF4_a may each represent a length in the third direction D3.

[0077] The first edge color filter group CFG_a may be disposed near the edge of the pixel array region (R1 in FIG. 4) unlike the center color filter group CCFG. Therefore, light may be incident on the first edge color filter group CFG_a at an angle relative to the edge, rather than being incident vertically. Depending on the incident angle of the light, the distance traveled by the light as it passes through the color filters may differ from the thickness of the color filters. Furthermore, in the first edge color filter group CFG_a disposed on the edge of the pixel array (R1 in FIG. 3), the incident angle of the light passing through the first color filter CF1_a may differ from the incident angle of the light passing through the second color filter CF2_a. In this case, since the second color filter CF2_a may be disposed outside the first color filter CF1_a, the incident angle of the light passing through the second color filter CF2_a may be greater than the incident angle of the light passing through the first color filter CF1_a. For example, when the first to fourth color filters CF1_a, CF2_a, CF3_a, and CF4_a have the same thickness, the amount of incident light passing through the second color filter CF2_a may be smaller than the amount of incident light passing through the first color filter CF1_a. Therefore, a difference in the amount of light may occur between the light passing through the first and second color filters CF1_a and CF2_a. Therefore, a channel difference may occur in the image sensor.

[0078] However, according to an embodiment of the present invention, the thickness T2a of the second color filter CF2_a is formed smaller than the thickness T1a of the first color filter CF1_a, so that the optical path lengths of the light passing through the first and second color filters CF1_a, CF2_a can be substantially the same. Similarly, the thicknesses T3a, T4a of the third and fourth color filters CF3_a, CF4_a can also be formed smaller than the thickness T1a of the first color filter, so that the optical path lengths of the light passing through the first, third and fourth color filters CF1_a, CF3_a, CF4_a can be substantially the same. Therefore, it is possible to prevent channel difference occurring in the image sensor.

[0079] Similarly to the first edge color filter group CFG_a described above, first to fourth color filters CF1_b, CF2_b, CF3_b, CF4_b / CF1_c, CF2_c, CF3_c, CF4_c / CF1_d, CF2_d, CF3_d, CF4_d may be arranged within the second to fourth edge color filter groups CFG_b, CFG_c, CFG_d, as well as the first edge color filter group CFG_a described above, and two of the thicknesses of the first to fourth color filters CF1_b, CF2_b, CF3_b, CF4_b / CF1_c, CF2_c, CF3_c, CF4_c / CF1_d, CF2_d, CF3_d, CF4_d may be different from each other.

[0080] Next, the thickness differences of the first to fourth color filters CF1a, CF2_a, CF3_a, CF4_a / CF1_b, CF2_b, CF3_b, CF4_b / CF1_c, CF2_c, CF3_c, CF4_c / CF1_d, CF2_d, CF3_d, CF4_d in the edge color filter group ECFG will be described.

[0081] The first edge color filter group CFG_a and the second edge color filter group CFG_b may be disposed diagonally opposite each other, and the second edge color filter group CFG_b may be disposed closer to the edge of the pixel array region (R1 in FIG. 3) than the first edge color filter group CFG_a.

[0082] The first and second color filters CF1_b and CF2_b of the second edge color filter group CFG_b may be disposed farther away from the center pixel region (CR in FIG. 4) than the first and second color filters CF1_a and CF2_a of the first edge color filter group CFG_a. That is, the first and second color filters CF1_b and CF2_b of the second edge color filter group CFG_b may be disposed closer to the edge of the pixel array region (R1 in FIG. 3) than the first and second color filters CF1_a and CF2_a of the first edge color filter group CFG_a. The amount of light incident obliquely becomes greater than the amount of light incident perpendicularly from the center of the pixel array region (R1 in FIG. 3) toward the edge. Therefore, the channel difference described above may occur more severely in the second to fourth edge color filter groups CFG_b, CFG_c, and CFG_d disposed near the edge of the pixel array region (R1 in FIG. 3).

[0083] According to an embodiment of the present invention, the thickness T2b of the second color filter CF2_b of the second edge color filter group CFG_b is smaller than the thickness T1b of the first color filter CF1_b of the second edge color filter group CFG_b to prevent channel difference within the color filter group. Further, the thickness T2b of the second color filter CF2_b of the second edge color filter group CFG_b may be smaller than the thickness T2a of the second color filter CF2_a of the first edge color filter group CFG_a. That is, the difference between the thicknesses T1b, T2b of the first and second color filters of the second edge color filter group CFG_b may be larger than the difference between the thicknesses T1a, T2a of the first and second color filters of the first edge color filter group CFG_a. For example, the thicknesses of the first color filters CF1_a, CF1_b, CF1_c, and CF1_d of the edge color filter group ECFG may be substantially the same as each other, and the thicknesses of the second color filters CF2_a, CF2_b, CF2_c, and CF2_d of the edge color filter group ECFG may be gradually reduced toward the edge of the pixel array region (R1 in FIG. 4). However, the thicknesses of the first color filters CF1_a, CF1_b, CF1_c, and CF1_d of the edge color filter group ECFG should not always be substantially the same.

[0084] The first and third color filters CF1_c and CF3_c of the third edge color filter group CFG_c may be disposed at a position farther away from the center pixel region (CR in FIG. 4) than the first and third color filters CF1_a and CF3_a of the first edge color filter group CFG_a. Similarly, the thickness T3c of the third color filter of the third edge color filter group CFG_c is smaller than the thickness T3a of the third color filter CF3_a of the first edge color filter group CFG_a, thereby preventing channel difference within the third edge filter group CFG_c.

[0085] In addition, the first and fourth color filters CF1_d and CF4_d of the fourth edge color filter group CFG_d may be disposed at a position farther away from the center pixel region (CR in FIG. 4) than the first and fourth color filters CF1_a and CF4_d of the first edge color filter group CFG_a. Similarly, the thickness T4d of the fourth color filter CF4_d of the fourth edge color filter group CFG_d is smaller than the thickness T4a of the fourth color filter CF4_a of the first edge color filter group CFG_a, so that channel difference can be prevented within the fourth edge color filter group CFG_d. Content that overlaps with the content described in the first and second edge color filter groups CFG_a and CFG_b will be replaced with the above description.

[0086] 7 to 8C, the center color filter group CCFG may include a plurality of color filter groups CFG_e and CFG_f arranged adjacent to each other. For convenience of explanation, the present specification will use as an example a first center color filter group CFG_e, which is one of the center color filter groups CCFG.

[0087] The first center color filter group CFG_e may include first to fourth color filters CF1_e, CF2_e, CF3_e, and CF4_e. In the first center color filter group CFG_e, the first to fourth color filters CF1_e, CF2_e, CF3_e, and CF4_e may have thicknesses T1e, T2e, T3e, and T4e that are substantially equal to each other.

[0088] Most of the light may be incident on the first center color filter group CFG_e perpendicularly to the first surface 100a of the semiconductor substrate 100. That is, most of the light passing through each of the color filters CF1_e, CF2_e, CF3_e, and CF4_e in the first center color filter group CFG_e may be incident perpendicularly, and there may be no difference in the angle of incidence between the light. Therefore, even if the color filters CF1_e, CF2_e, CF3_e, and CF4_e in the first center color filter group CFG_e have the same thickness, there may be no channel difference.

[0089] 11 to 13 are cross-sectional views illustrating image sensors according to various embodiments of the present invention. For the sake of simplicity, descriptions of the same technical features as those described with reference to FIGS. 5A to 10 will be omitted, and differences will be described in detail.

[0090] 11, the pixel separating structure DTI may have an upper width adjacent to the second surface 100b of the semiconductor substrate 100. The pixel separating structure DTI may have a lower width at the second surface 100b of the semiconductor substrate 100. The upper width may be smaller than the lower width. That is, the width of the pixel separating structure DTI may become gradually narrower from the first surface 100a of the semiconductor substrate 100 toward the second surface 100b.

[0091] 12, the pixel separating structure DTI may have an upper width at the second surface 100b of the semiconductor substrate 100. The pixel separating structure DTI may have a lower width at the first surface 100a of the semiconductor substrate 100. The pixel separating structure DTI may have an intermediate width within the semiconductor substrate 100. Each of the upper width and the lower width may be larger than the intermediate width. The width of the pixel separating structure DTI may narrow from the second surface 100b of the semiconductor substrate 100 toward the first surface 100a and then widen again. That is, the width of the pixel separating structure DTI may have a maximum value at the first surface 100a and the second surface 100b of the semiconductor substrate 100 and a minimum value within the semiconductor substrate 100.

[0092] 13, each pixel region PR may include first and second photoelectric conversion regions PD1 and PD2. The first and second photoelectric conversion regions PD1 and PD2 may be impurity regions doped with impurities of a second conductivity type (e.g., n-type) opposite to the first conductivity type of the semiconductor substrate 100.

[0093] A pixel separating structure DTI may be disposed between the first photoelectric conversion region PD1 and the second photoelectric conversion region PD2. The pixel separating structure DTI may prevent crosstalk between the first and second photoelectric conversion regions PD1 and PD2. That is, light incident on the first photoelectric conversion region PD1 may be blocked from being incident on the second photoelectric conversion region PD2 by the pixel separating structure DTI.

[0094] Figure 14 is a plan view of an image sensor according to another embodiment of the present invention. Figure 15 is a cross-sectional view of an image sensor according to another embodiment of the present invention, taken along line A-A' in Figure 14. Figure 16 is a plan view of an image sensor according to another embodiment of the present invention. Figure 17 is a cross-sectional view of an image sensor according to another embodiment of the present invention, taken along line A-A' in Figure 16. For ease of explanation, descriptions of the same technical features as those described with reference to Figures 5A to 10 will be omitted, and differences will be described in detail.

[0095] 14 and 15, each of the color filter groups CFG' may include nine color filters CF1', CF2', CF3' arranged in three rows and three columns. For convenience of explanation, the color filters arranged diagonally in the color filter group CFG' will be referred to as first to third color filters CF1', CF2', CF3'.

[0096] The incidence angle of light passing through the first color filter CF1', the incidence angle of light passing through the second color filter CF2', and the incidence angle of light passing through the third color filter CF3' may be different from each other. In this case, the third color filter CF3', the second color filter CF2', and the first color filter CF1' may be disposed closer to the edge of the pixel array region (R1 in FIG. 3) in this order. Therefore, the average incidence angle of light entering the color filters may become smaller going from the third color filter CF3' to the second color filter CF2' and the first color filter CF1'.

[0097] According to another embodiment of the present invention, the thicknesses of the first to third color filters CF1', CF2', and CF3' may be smaller from the first color filter CF1' to the third color filter CF3'. For example, the thickness T3' of the third color filter CF3' may be smaller than the thickness T2' of the second color filter CF2', and the thickness T2' of the second color filter CF2' may be smaller than the thickness T1' of the first color filter CF1'. Therefore, the lengths of the optical paths of the light passing through the first to third color filters CF1', CF2', and CF3' may be substantially the same. This can prevent channel differences occurring in the image sensor.

[0098] 16 and 17, each of the color filter groups CFG″ may include 16 color filters arranged in four rows and four columns. For ease of explanation, the color filters arranged diagonally within the color filter group CFG″ will be referred to as first to fourth color filters CF1″, CF2″, CF3″, and CF4″.

[0099] Within the color filter group CFG”, the incident angle of light passing through the first color filter CF1”, the incident angle of light passing through the second color filter CF2”, the incident angle of light passing through the third color filter CF3”, and the incident angle of light passing through the fourth color filter CF4” may be different from each other. In this case, the fourth color filter CF4”, the third color filter CF3”, the second color filter CF2”, and the first color filter CF1” may be disposed near the edge of the pixel array region (R1 in FIG. 3) in this order. Therefore, the average incident angle of light entering the first to fourth color filters CF1”, CF2”, CF3”, and CF4” may become smaller in the order of the fourth color filter CF4”, the third color filter CF3”, the second color filter CF2”, and the first color filter CF1”.

[0100] According to another embodiment of the present invention, the thicknesses of the first to fourth color filters CF1", CF2", CF3", and CF4" may be smaller from the first color filter CF1" to the fourth color filter CF4". For example, the thickness T4" of the fourth color filter CF4" may be smaller than the thickness T3" of the third color filter CF3", the thickness T3" of the third color filter CF3" may be smaller than the thickness T2" of the second color filter CF2", and the thickness T2" of the second color filter CF2" may be smaller than the thickness T1" of the first color filter CF1". Thus, the lengths of the optical paths of light passing through the first to fourth color filters CF1", CF2", CF3", and CF4" may be substantially the same as each other. This can prevent channel differences occurring within the image sensor.

[0101] 18A and 18B are cross-sectional views of an image sensor according to an embodiment of the present invention, taken along line AA' of FIG.

[0102] 3, 18A, and 18B, the image sensor may include a sensor chip S1 and a logic chip S2. The sensor chip S1 may include a pixel array region R1 and a pad region R2.

[0103] A plurality of conductive pads CP used for inputting and outputting control signals, photoelectric signals, etc. may be arranged in the pad region R2. The pad region R2 may surround the pixel array region R1 in a plan view to facilitate electrical connection with an external element. The conductive pads CP may input and output electrical signals generated in the unit pixels P to and from an external device.

[0104] In the light receiving region AR, the sensor chip S1 may include the same technical features as the image sensor described above. That is, the sensor chip S1 may include a photoelectric conversion layer 10 between the pixel circuit layer 20 and the light transmitting layer 30 in the vertical direction as described above. The photoelectric conversion layer 10 of the sensor chip S1 may include a semiconductor substrate 100, a pixel separating structure DTI defining a pixel region, and a photoelectric conversion region PD provided within the pixel region as described above. The pixel separating structure DTI may have substantially the same structure in the light receiving region AR and the light blocking region OB.

[0105] The light-transmitting layer 30 may include a light-shielding pattern OBP, a back contact plug PLG, a contact pattern CT, an organic layer 350, and a passivation layer 360 in a light-shielding region OB.

[0106] A portion of the pixel separating structure DTI may be connected to a rear contact plug PLG in the light blocking region OB.

[0107] In detail, the semiconductor pattern 113 may be connected to a rear contact plug PLG in the light-shielding region OB. A negative bias may be applied to the semiconductor pattern 113 through the contact pattern CT and the rear contact plug PLG. Therefore, dark current generated at the boundary between the pixel separating structure DTI and the semiconductor substrate 100 may be reduced.

[0108] The back contact plug PLG may have a width greater than the width of the pixel isolation structure DTI. The back contact plug PLG may include a metal and / or a metal nitride. For example, the back contact plug PLG may include titanium and / or titanium nitride.

[0109] The contact pattern CT may be embedded in a contact hole in which the back contact plug PLG is formed. The contact pattern CT may include a different material from the back contact plug PLG. For example, the contact pattern CT may include aluminum (Al).

[0110] The contact pattern CT may be electrically connected to the semiconductor pattern 113 of the pixel separating structure DTI. A negative bias may be applied to the semiconductor pattern 113 of the pixel separating structure DTI through the contact pattern CT, and the negative bias may be transferred from the light blocking region OB to the light receiving region AR.

[0111] In the light-shielding region OB, the light-shielding pattern OBP may be continuously extended from the back contact plug PLG and disposed on the top surface of the planar insulating film 310. That is, the light-shielding pattern OBP may include the same material as the back contact plug PLG. The light-shielding pattern OBP may include metal and / or metal nitride. For example, the light-shielding pattern OBP may include titanium and / or titanium nitride. The light-shielding pattern OBP may not be extended to the light-receiving region AR of the pixel array.

[0112] The light blocking pattern OBP can block light from being incident on the photoelectric conversion region PD provided in the light blocking region OB. In a reference pixel region of the light blocking region OB, the photoelectric conversion region PD can output a noise signal instead of outputting a photoelectric signal. The noise signal can be generated by electrons generated by heat generation or dark current, etc.

[0113] An organic layer 350 and a passivation layer 360 may be provided on the light blocking pattern OBP in the light blocking region OB. The organic layer 350 may include the same material as the microlenses 340.

[0114] In the light-shielding region OB, the first through conductive pattern 511 may penetrate the semiconductor substrate 100 and be electrically connected to the metal wiring 223 of the readout circuit layer 20 and the wiring structure 1111 of the logic chip S2. The first through conductive pattern 511 may have a first bottom surface and a second bottom surface located at different levels. A first buried pattern 521 may be provided inside the first through conductive pattern 511. The first buried pattern 521 may include a low refractive index material and have insulating properties.

[0115] A conductive pad CP may be provided on the second surface 100b of the semiconductor substrate 100 in the pad region R2. The conductive pad CP may be embedded in the second surface 100b of the semiconductor substrate 100. As an example, the conductive pad CP may be provided in a pad trench formed on the second surface 100b of the semiconductor substrate 100 in the pad region R2. The conductive pad CP may include a metal such as aluminum, copper, tungsten, titanium, tantalum, or an alloy thereof. In a mounting process of the image sensor, a bonding wire may be bonded to the conductive pad CP. The conductive pad CP may be electrically connected to an external device through the bonding wire.

[0116] In the pad region R2, the second through conductive pattern 513 may penetrate the semiconductor substrate 100 and be electrically connected to the wiring structure 1111 of the logic chip S2. The second through conductive pattern 513 may extend onto the second surface 100b of the semiconductor substrate 100 and be electrically connected to the conductive pad CP. A portion of the second through conductive pattern 513 may cover a bottom surface and a sidewall of the conductive pad CP. A second buried pattern 523 may be provided inside the second through conductive pattern 513. The second buried pattern 523 may include a low refractive index material and have insulating properties. In the pad region R2, a pixel separating structure DTI may be provided around the second through conductive pattern 513.

[0117] The logic chip S2 may include a logic semiconductor substrate 1000, a logic circuit TR, a wiring structure 1111 connected to the logic circuit, and a logic interlayer insulating film 1100. The top layer of the logic interlayer insulating film 1100 may be bonded to the readout circuit layer 20 of the sensor chip S1. The logic chip S2 may be electrically connected to the sensor chip S1 through a first through conductive pattern 511 and a second through conductive pattern 513.

[0118] In the above embodiment, the sensor chip 1 and the logic chip 2 are electrically connected to each other through the first and second through conductive patterns, but the present invention is not limited thereto.

[0119] Referring to FIG. 18B, the first and second through conductive patterns 511, 513 of FIG. 18A can be omitted, and the sensor chip S1 and the logic chip S2 can be electrically connected by directly bonding bonding pads provided on the top metal layers of the sensor chip S1 and the logic chip S2 to each other.

[0120] More specifically, the sensor chip S1 of the image sensor may include a first bonding pad BP1 provided on the top metal layer of the pixel circuit layer 20, and the logic chip S2 may include a second bonding pad BP2 provided on the top metal layer of the wiring structure 1111. The first and second bonding pads BP1 and BP2 may include at least one of, for example, tungsten (W), aluminum (Al), copper (Cu), tungsten nitride (WN), tantalum nitride (TaN), and titanium nitride (TiN).

[0121] The first bonding pad BP1 of the sensor chip S1 and the second bonding pad BP2 of the logic chip S2 may be directly and electrically connected to each other by a hybrid bonding method. Hybrid bonding refers to bonding in which two components containing the same material are fused at their interface. For example, if the first and second bonding pads BP1 and BP2 are made of copper (Cu), they may be physically and electrically connected to each other by copper (Cu)-copper (Cu) bonding. Also, the insulating film surface of the sensor chip S1 and the insulating film surface of the logic chip S2 may be joined by dielectric-dielectric bonding.

[0122] Although the embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention can be embodied in other specific forms without changing the technical concept or essential features of the present invention. Therefore, it should be understood that the embodiments described above are illustrative in all respects and are not limiting. [Explanation of symbols]

[0123] 100 Semiconductor substrate 10 Photoelectric conversion layer 20 pixel circuit layer 30 Light transmission layer 340a, 340b Microlenses CF1_a, CF1_b, CF1_c, CF1_d First color filter CF2_a, CF2_b, CF2_c, CF2_d Second color filter CF3_a, CF3_b, CF3_c, CF3_d 3rd color filter CF4_a, CF4_b, CF4_c, CF4_d 4th color filter CCFG Center Color Filter Group ECFG Edge Color Filter Group CFG_a 1st Edge Color Filter Group CFG_b 2nd edge color filter group CFG_c 3rd edge color filter group CFG_d 4th edge color filter group

Claims

1. a semiconductor substrate including a pixel array region having a center pixel region and edge pixel regions surrounding the center pixel region in a plan view; color filter groups on the pixel array region, each of the color filter groups including color filters arranged in n rows and n columns; a microlens disposed to cover each of the color filter groups; the color filter group includes a center color filter group on the center pixel region and an edge color filter group on the edge pixel region, In each of the edge color filter groups, at least two of the color filters have different thicknesses.

2. Each of the edge color filter groups includes a first color filter, a second color filter, a third color filter, and a fourth color filter, The image sensor of claim 1 , wherein the first color filter has a thickness greater than a thickness of the second color filter.

3. The image sensor of claim 2 , wherein the second color filter is farther away from the center pixel region than the first color filter.

4. the second, third, and fourth color filters are farther away from the center pixel region than the first color filter; the second color filter is disposed diagonally opposite to the first color filter, The image sensor of claim 2 , wherein the thickness of the third color filter and the thickness of the fourth color filter are each smaller than the thickness of the first color filter.

5. the edge color filter group includes a first edge color filter group and a second edge color filter group located farther away from the center pixel region than the first edge color filter group; The image sensor of claim 2 , wherein a thickness of the second color filter of the second edge color filter group is less than a thickness of the second color filter of the first edge color filter group.

6. The image sensor of claim 5 , wherein a thickness of the first color filter of the second edge color filter group is substantially the same as a thickness of the first color filter of the first edge color filter group.

7. The image sensor of claim 1 , wherein the thickness of each of the color filters in the center color filter group is substantially the same.

8. the microlenses include a first microlens covering the edge color filter group and a second microlens covering the center color filter group; The image sensor of claim 1 , wherein in a plan view, the centers of the first microlenses are shifted from the centers of the edge color filter groups.

9. 9. The image sensor of claim 1, further comprising a pixel separating structure disposed in the semiconductor substrate, the pixel separating structure defining a plurality of pixel regions in the pixel array region.

10. the semiconductor substrate includes a first surface and a second surface opposite to the first surface; the color filter group is disposed on the first surface; The image sensor of claim 9 , wherein a width of the pixel separating structure increases from the first surface to the second surface.

Images