Method for manufacturing polished semiconductor material and semiconductor device
Ion beam irradiation to form a brittle layer on SiC, diamond, or GAN materials, combined with minimal oxidant slurry polishing, addresses the low polishing rates and defect issues, improving the efficiency and quality of semiconductor substrate production.
Patent Information
- Application Number
- JP2023118492
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-20
- Publication Date
- 2025-01-30
AI Technical Summary
The existing chemical mechanical polishing (CMP) methods for silicon carbide (SiC), diamond, and gallium nitride (GAN) substrates suffer from low polishing rates and induce defects, hindering the transition from silicon to these materials in power semiconductor substrates.
A method involving ion beam irradiation to form a brittle layer on the surface or inside of SiC, diamond, or GAN semiconductor materials, followed by polishing with a slurry containing minimal oxidants to achieve high polishing rates and controlled removal of the brittle layer.
This approach significantly enhances the polishing rate and productivity of SiC, diamond, and GAN materials, reducing defects and enabling the production of high-quality semiconductor devices.
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Figure 2025015224000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a method for producing polished semiconductor material and to a semiconductor device. [Background technology]
[0002] In the technology for forming power semiconductor substrates, silicon is being replaced by materials with low dielectric loss. However, SiC, diamond, and GaN are difficult to process, and the supply of substrates is becoming a serious problem.
[0003] When CMP (Chemical Mechanical Polishing) technology developed for silicon semiconductors is transferred to SiC, diamond, or GaN, the problem of "extremely slow processing speed" is encountered. If polishing is performed with a slurry containing diamond abrasive grains with a relatively large particle size using the conventional CMP method, a high polishing rate can be expected, but on the other hand, many defects and dislocations are induced on the substrate surface, and these defects and dislocations may affect transistor performance. In order to popularize SiC, diamond, and GaN substrates, a polishing method that can remove material efficiently and leave a smooth, defect-free surface after polishing is required.
[0004] In the CMP of SiC, diamond, and GaN, a slurry containing abrasive grains and an oxidizing agent is generally used. For example, Patent Document 1 relates to a method for polishing a SiC wafer, and in the polishing step, a fixed abrasive polishing pad and potassium permanganate (KMnO 4 It is described that an acidic polishing solution containing a mixture of an acid salt and an oxidizing inorganic salt is used. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2012-253259 A Summary of the Invention [Problem to be solved by the invention]
[0006] However, compared with the polishing rate of silicon (Si), the polishing rate of SiC, diamond, and GaN is still slow, and further improvement of the polishing rate is required. Under such circumstances, the present invention aims to provide a method for manufacturing polished SiC material, diamond material, or GaN material that can polish SiC, diamond, or GaN at a high polishing rate and has excellent productivity. In addition, the present invention aims to provide a semiconductor device using these materials. [Means for solving the problem]
[0007] The present inventors have conducted extensive research to solve the above problems, and as a result have found that the following invention meets the above object, thereby completing the present invention.
[0008] <1> A method for producing a polished semiconductor material, comprising a polishing step of removing an embrittlement layer formed on the surface or inside of a semiconductor material, which is SiC, diamond or GaN, by irradiating the semiconductor material with an ion beam, by polishing the embrittlement layer in the presence of a slurry. <2> The slurry used in the polishing step contains polishing abrasive grains and has an oxidizing agent content of 1 mass % or less. <1> A method for producing a semiconductor material according to claim 1. <3> The polishing grains are silica. <1> or <2> A method for producing a semiconductor material according to claim 1. <4> In the polishing step, the polishing is self-stopped when removal of the embrittlement layer is completed. <1> from <3> 2. A method for producing a semiconductor material according to any one of claims 1 to 11. <5> a surface embrittlement step of forming the embrittlement layer on the surface of the semiconductor material by irradiation with the ion beam, and a polishing step of removing the embrittlement layer by polishing the embrittlement layer formed on the surface of the semiconductor material in the presence of the slurry. <1> from <4> 2. A method for producing a semiconductor material according to any one of claims 1 to 11. <6> In the surface embrittlement step, the embrittlement layer is formed on a part of the surface of the semiconductor material. <5> A method for producing a semiconductor material according to claim 1. <7> the method includes an internal embrittlement step of forming an embrittlement layer inside the semiconductor material at a predetermined depth from the surface thereof by irradiation with the ion beam; a bonding step of bonding a support substrate to the surface of the semiconductor material to obtain a bonded body of the semiconductor material and the support substrate; a dividing step of dividing the bonded body along the embrittlement layer; and a polishing step of polishing the embrittlement layer, which becomes a peeling surface of the separated substrate on the support substrate side, in the presence of the slurry to remove the embrittlement layer. <1> from <4> 13. A method for producing a semiconductor material according to any one of claims 1 to 12. <8> a separation step of separating the substrate on the support substrate side in the polishing step into the support substrate and a thin film substrate; <7> A method for producing a semiconductor material according to claim 1. <9> In the separation step, the support substrate and the thin film substrate are separated by at least laser cutting. <8> A method for producing a semiconductor material according to claim 1. <10> The embrittlement layer is formed to have a thickness that varies from part to part by changing an acceleration voltage of the ion beam or by controlling a part to be irradiated with the ion beam. <1> from <9> 13. A method for producing a semiconductor material according to any one of claims 1 to 12. <11> The above <1> from <10> 1. A semiconductor device comprising a substrate having an uneven surface on one side thereof, the substrate being made of a semiconductor material formed by the method for manufacturing a semiconductor material according to any one of claims 1 to 9, and an element portion in which a semiconductor layer and a conductive layer are laminated on the uneven surface of the substrate. Effect of the Invention
[0009] According to the present invention, a method for producing polished SiC material, diamond material or GaN material, which can polish SiC, diamond or GaN at a high polishing rate and has excellent productivity, is provided. Also, a semiconductor device using these materials is provided. [Brief description of the drawings]
[0010] [Figure 1]This is an example of an apparatus that can be used to irradiate semiconductor material with an ion beam. [Diagram 2] This is an example of an apparatus that can be used in the polishing process. [Diagram 3] FIG. 1 is a flow diagram showing an example of a production method of the present invention. [Figure 4] FIG. 4 is a schematic diagram for explaining the manufacturing method shown in FIG. [Diagram 5] FIG. 4 is a schematic diagram for explaining the manufacturing method shown in FIG. [Figure 6] FIG. 4 is a flow chart showing another example of the production method of the present invention. [Figure 7] FIG. 7 is a schematic diagram for explaining the manufacturing method shown in FIG. 6. [Figure 8] FIG. 7 is a schematic diagram for explaining the manufacturing method shown in FIG. 6. [Figure 9] FIG. 7 is a schematic diagram for explaining the manufacturing method shown in FIG. 6. [Figure 10] FIG. 7 is a schematic diagram for explaining the manufacturing method shown in FIG. 6. [Figure 11] 1A to 1C are schematic diagrams for explaining a method for forming a wiring structure on a semiconductor substrate obtained by the manufacturing method of the present invention. [Figure 12] 13A and 13B are cross-sectional SEM images of a test substrate before and after ion implantation. [Figure 13] 1 is a photograph of the apparatus used in the polishing experiment. [Figure 14] 13A and 13B are cross-sectional SEM images of a test substrate before and after polishing. [Figure 15] This is the result of height measurement using a laser microscope. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] The following is a detailed description of the embodiments of the present invention, but the following description of the constituent elements is one example (representative example) of the embodiment of the present invention, and the present invention is not limited to the following content as long as the gist of the present invention is not changed. Note that in this specification, when the expression "~" is used, it is used as an expression including the numerical value or physical property value before and after it.
[0012] The present invention relates to a method for producing a polished semiconductor material (hereinafter, sometimes referred to as the "production method of the present invention"), which includes a polishing step of removing an embrittlement layer formed on the surface or inside of a semiconductor material, which is SiC, diamond or GaN, by irradiating the semiconductor material with an ion beam, by polishing the embrittlement layer in the presence of a slurry.
[0013] It has been known that a relatively high polishing rate can be obtained by CMP of SiC, diamond, or GaN (hereinafter referred to as "SiC, etc.") using a slurry containing polishing grains and an oxidizing agent. On the other hand, the present inventors have discovered that an embrittled layer can be formed by irradiating a material such as SiC with an ion beam, and that this embrittled layer is embrittled enough to be removed at high speed by a general slurry that does not contain an oxidizing agent, which has been difficult to use for CMP of SiC, etc. The present invention is based on these findings.
[0014] By irradiating a semiconductor material such as SiC with an ion beam to form an embrittled layer as in the manufacturing method of the present invention, the polishing rate can be significantly improved. Furthermore, even if a general slurry that was previously difficult to use is used, polishing can be performed at high speed, and polishing can be self-stopped. In addition, by forming an embrittled layer with an ion beam, the embrittled layer can be formed in a short time, and the formation position and thickness of the embrittled layer can be easily adjusted by adjusting the acceleration energy, and a three-dimensional structure can also be easily manufactured.
[0015] (Semiconductor materials) The semiconductor material used in the manufacturing method of the present invention is SiC (silicon carbide), diamond, or GaN (gallium nitride). Representative examples of the semiconductor material include a single crystal SiC ingot, a SiC substrate (wafer) obtained by slicing the ingot, a single crystal diamond ingot, a diamond substrate (wafer) obtained by slicing the ingot, a single crystal GaN ingot, and a GaN substrate (wafer) obtained by slicing the ingot. The semiconductor material is not limited to a semiconductor material made of a single material, but may be a multilayer structure in which other semiconductor or insulating substrates are bonded together, or a metal layer or semiconductor layer is formed on the surface. When the surface of the semiconductor material is embrittled and polished, it is sufficient that the surface includes a portion formed of SiC or the like or a material in which ions are implanted into the SiC or the like, and is not limited to a material having a single surface formed of SiC or the like, and a material having a surface including a portion with a different composition, such as metal wiring, in addition to a portion formed of SiC or the like may be used.
[0016] It is preferable that the semiconductor material is basically in the form of a plate, taking into consideration the processing surface, ease of handling, etc. The outer shape of the plate may be a square, circle, ellipse, polygon, etc., and the outer shape may be changed depending on the processing purpose.
[0017] (Ion beam irradiation) In the manufacturing method of the present invention, an embrittled layer is formed on the surface or inside of a semiconductor material by irradiating it with an ion beam. When an ion beam consisting of ions accelerated by a high voltage is irradiated (injected) into a semiconductor material, an embrittled layer with a fragile crystal structure is formed by the collision of the ions. There is no particular limitation on the ions to be irradiated, and atoms such as argon (Ar), hydrogen (H), oxygen (O), boron (B), phosphorus (P), and arsenic (As) are ionized, accelerated, and irradiated onto the semiconductor material. The region (location and thickness) where the embrittled layer is formed can be controlled by the acceleration energy and incidence angle of the ion beam, and the acceleration energy can be controlled by the acceleration voltage, type of ions, defect concentration, dose amount, etc. For example, when the acceleration energy of the ion beam is low, the surface of the semiconductor material tends to be embrittled, and when it is high, the surface of the semiconductor material does not become embrittled, but the inside tends to become embrittled.
[0018] There is no particular limitation on the device used to irradiate the semiconductor material with an ion beam, and a general ion implantation device or ion doping device can be used. For example, as shown in Fig. 1, the ion implantation device 5 can be implemented using an ion source 51 that generates the desired ions, an extraction electrode 52 that extracts the ion beam, a mass separator 53 and an analysis slit 54 that select and extract the necessary ions, an acceleration tube 55 that accelerates or decelerates the ions, and a deflector 56, a Q lens 57, and a scanner 58 that adjust the shape of the ion beam 50 that is irradiated to the workpiece 1.
[0019] In addition, by adopting such a configuration in which an ion beam is irradiated onto a semiconductor material, it is possible to simultaneously irradiate almost the entire main surface of the plate-shaped semiconductor material with the ion beam, so that the embrittlement layer can be formed quickly.
[0020] In addition, the acceleration voltage, current value (beam current), irradiation time, dose amount, etc. of the ion beam irradiated to the semiconductor material may be constant or may be changed appropriately during irradiation depending on various specifications. For example, the acceleration voltage may be changed in an analog wave-like manner or in a pulse-like manner digitally. In addition, it is also possible to change the ions to be irradiated from hydrogen to phosphorus or boron, for example, during the course of irradiation of the same semiconductor material.
[0021] (polishing) In the polishing step in the manufacturing method of the present invention, the embrittled layer formed in the semiconductor material is polished and removed in the presence of a slurry. The polishing step is not particularly limited in method or device as long as it can polish the embrittled layer of the semiconductor material in the presence of a slurry. The polishing step may be performed by pressing the semiconductor material against a polishing pad or grindstone to which a slurry has been supplied, or may be performed by supplying a slurry to the semiconductor material and pressing a polishing pad or grindstone against the semiconductor material to polish it.
[0022] 2, the polishing step can be performed by a CMP device 6 including a head 60 to which the workpiece 1 is attached, a rotary drive device 61 for rotating the head 60, a slurry supply device 63, a platen 65 to which a polishing pad 64 is attached, and a rotary drive device 66 for rotating the platen 65. In the CMP device 6, the workpiece 1 is polished by pressing the workpiece 1 against the polishing pad 64 while rotating at least one of the workpiece 1 and the polishing pad 64 while supplying a slurry 62 to the polishing pad 64. In the manufacturing method of the present invention, the workpiece in the polishing step is a semiconductor material having an embrittlement layer formed thereon or a bonded body obtained by bonding the semiconductor material to a support substrate.
[0023] There are no particular limitations on the polishing pad 64, and any known polishing pad such as a nonwoven fabric polishing pad, a polyurethane polishing pad, or a polyurethane foam polishing pad can be used. The polishing pad 64 may contain abrasive grains, may not contain abrasive grains, or may have an uneven pattern on the surface.
[0024] (slurry) The slurry used for polishing contains polishing abrasive grains. Examples of polishing abrasive grains include silica, ceria, alumina, nanodiamond, and a mixture of diamond or silica with a fullerene compound, and these may be used alone or in combination. The particle size of the polishing abrasive grains may be a single particle size or a combination of a plurality of particle sizes. In addition, polishing may be performed by changing the type of slurry during the polishing process. On the other hand, since the use of polishing abrasive grains with high hardness is likely to cause defects and transfer in the semiconductor material, the polishing abrasive grains are preferably soft polishing abrasive grains such as silica, ceria, and alumina that are lower in hardness than the semiconductor material (SiC, diamond, or GaN). Among them, silica is preferred because it is less likely to settle or aggregate and can be stably dispersed. Examples of silica abrasive grains include colloidal silica, fumed silica, and precipitated silica, and colloidal silica is preferred.
[0025] The colloidal silica to be used has an average particle size of about 5 to 200 nm, preferably 10 to 150 nm, and more preferably 50 to 100 nm. The average particle size is the primary particle size calculated by the BET method.
[0026] The slurry used for polishing may have an abrasive grain content of about 5 to 40 mass %, but may also be 8 to 25 mass %, or 10 to 15 mass %, for example.
[0027] The slurry also contains a solvent for dispersing the abrasive grains. The solvent for the slurry is water or an organic solvent, and water is preferred. The pH of the aqueous slurry in which the solvent is water is preferably 4 to 11, more preferably 6 to 10, and even more preferably 7 to 9.
[0028] The slurry may contain, as in conventional slurries, an acid, an alkali, an oxidizing agent, a complexing agent, a dispersing agent, and the like in addition to the polishing abrasive grains and a solvent for dispersing the polishing abrasive grains, but it is preferable that the amount of the oxidizing agent in the slurry is small, and the content of the oxidizing agent is preferably 1 mass% or less. The content of the oxidizing agent may be 0.5 mass% or less, 0.1 mass% or less, 0.05 mass% or less, or 0.01 mass% or less. Also, a slurry containing polishing abrasive grains but not containing an oxidizing agent may be used.
[0029] More preferably, the slurry contains soft polishing grains having a hardness lower than that of SiC or GaN material, and contains 1% by mass or less of oxidizing agent, and even more preferably, the slurry contains silica as polishing grains, and contains 1% by mass or less of oxidizing agent. As described above, in order to improve the polishing rate, it is common to use a slurry containing polishing grains and a certain amount of oxidizing agent. On the other hand, the embrittled layer formed by ion beam irradiation can be removed even by using a slurry containing little or no oxidizing agent. In the presence of a slurry containing soft polishing grains and little or no oxidizing agent, when the embrittled layer is removed and the layer of non-embrittled semiconductor material is exposed, the polishing rate drops significantly and the progress of polishing is substantially stopped. That is, by using a slurry containing soft polishing grains and little or no oxidizing agent, polishing can be self-stopped at the point where removal of the embrittled layer is completed. By self-stopping, it becomes unnecessary to finely control the settings of polishing time, surface pressure, etc.
[0030] It is preferable to select a slurry that does not polish the semiconductor material or that is very difficult to polish, and that can effectively polish the embrittlement layer, and the above-mentioned slurry is one example. Although it is not very efficient, a slurry can be used that polishes the semiconductor material to some extent, but at a very slow polishing rate, and polishes the embrittlement layer at a very fast polishing rate. In this case, since the polishing does not stop by itself, it is necessary to end the polishing when the embrittlement layer has been polished to some extent.
[0031] The manufacturing method of the present invention will be described more specifically below with reference to Figures 3 to 10. In addition, in various embodiments described below, similar elements are given the same reference numerals, and duplicated explanations will be omitted.
[0032] [Embodiment 1] Fig. 3 is a flow diagram showing an example of the manufacturing method of the present invention. Also, Fig. 4 and Fig. 5 are schematic diagrams for explaining the manufacturing method shown in Fig. 3. The manufacturing method shown in Fig. 3 includes a surface embrittlement step (S1-1) and a polishing step (S1-2).
[0033] In the present embodiment shown in Figures 3 to 5, a rectangular plate made of a single material is used as the semiconductor material, but as described above, the semiconductor material used in the manufacturing method of the present invention is not limited to this.
[0034] (Surface embrittlement process (S1-1)) The surface embrittlement step (S1-1) is a step of forming an embrittled layer 20 on the surface 10S of the semiconductor material 10 by irradiation with an ion beam 50 (FIGS. 4(a) to 4(b)). In the surface embrittlement step (S1-1), the semiconductor material 10 is irradiated with the ion beam 50 at a low acceleration energy so that the embrittled layer 20 is formed on the surface 10S of the semiconductor material 10. For example, in the surface embrittlement step (S1-1), the acceleration voltage is set to 10 kV to 150 kV or 20 kV to 80 kV, and the dose amount is set to 1.0×10 15 ion / cm 2 ~1.0×10 18 ion / cm 2 Or 10x10 16 ion / cm 2 ~5.0×10 17 ion / cm 2 The ion beam 50 is irradiated under the conditions described above. The thickness of the embrittlement layer 20 is 10 nm to 5 μm, but can be appropriately adjusted by the acceleration energy of the ion beam 50 and the like.
[0035] (Polishing process (S1-2)) The polishing step (S1-2) is a step of removing the embrittled layer 20 formed on the surface 10S of the semiconductor material 10 by polishing in the presence of a slurry ((b) to (c) in FIG. 4). When using the CMP device 6 shown in FIG. 2, first, the semiconductor material 10 is attached to the head 60 so that the surface of the semiconductor material 10 on the side of the embrittled layer 20 becomes the polishing surface. Next, a slurry 62 is dropped onto the polishing pad 64 from a slurry supply device 63. As the slurry 62, an aqueous slurry in which colloidal silica is dispersed in water is used. In addition, the rotary drive device 66 is driven to rotate the polishing pad 64 in the circumferential direction at a rotation speed of 10 rpm to 200 rpm or 50 rpm to 100 rpm. Then, the rotary drive device 61 is driven to rotate the semiconductor material 10 in the opposite direction to the polishing pad 64 at a rotation speed of 10 rpm to 200 rpm or 50 rpm to 100 rpm, and the semiconductor material 10 is pressed against the polishing pad 64 and polished. The surface pressure between the semiconductor material 10 and the polishing pad 64 is 1 psi to 15 psi, or 5 psi to 10 psi. This allows the process to self-stop when the embrittlement layer 20 is removed, and a thin-film substrate 100 (semiconductor material with a polished surface) is obtained.
[0036] In Fig. 4, in the surface embrittlement step (S1-1), the embrittlement layer 20 is formed uniformly on the surface 10S of the semiconductor material 10, but the embrittlement layer 20 may be formed on a part of the surface 10S of the semiconductor material 10 by using a shielding plate or adjusting the irradiation position of the ion beam. For example, as shown in Fig. 5, the surface 10S of the semiconductor material 10 is irradiated with an ion beam 50 in a state where a shielding plate 3 is placed on a part of the surface 10S of the semiconductor material 10, and the embrittlement layer 20 is formed on the part where the shielding plate 3 is not placed. If the embrittlement layer 20 is formed in this manner, only the embrittlement layer 20 is removed in the polishing step (S1-2), and therefore a three-dimensional structure can be formed on the surface of the obtained thin film substrate 100a.
[0037] In addition, the acceleration energy of the ion beam may be partially changed to form an embrittled layer having a non-uniform thickness over the entire surface of the semiconductor material. In this case, too, by removing the embrittled layer, protrusions and recesses are formed on the surface, resulting in a semiconductor substrate having a three-dimensional structure on the surface.
[0038] [Embodiment 2] Fig. 6 is a flow diagram showing another example of the manufacturing method of the present invention. Also, Figs. 7 to 10 are schematic diagrams for explaining the manufacturing method shown in Fig. 6. In the embodiment shown in Figs. 7 to 10, parts having the same structure and function as the components of the embodiment shown in Figs. 4 and 5 are denoted by the same reference numerals as in Figs. 4 and 5, and description thereof will be omitted.
[0039] The manufacturing method shown in Fig. 6 includes an internal embrittlement step (S2-1), a joining step (S2-2), a dividing step (S2-3), a polishing step (S2-4), and a separation step (S2-5). In Figs. 6 to 10, the semiconductor material 12 in the internal embrittlement step (S2-1) is an ingot. By using an ingot as the semiconductor material 12, a wafer can be manufactured from the ingot by the manufacturing method shown in Fig. 6.
[0040] Here, thinning is required to produce a large number of wafers from an ingot. Conventionally, methods such as slicing with a diamond wire saw and laser cutting have been known as methods for producing wafers from an ingot, but there are limitations to thinning. On the other hand, in the manufacturing method shown in FIG. 6, the thickness of the wafer can be adjusted by controlling the acceleration energy of the ion beam in the internal embrittlement step (S2-1), and thin wafers can be manufactured. Since more wafers can be manufactured from an ingot by thinning, the manufacturing method shown in FIG. 6 is highly productive and easily forms uniform wafer thickness and good quality surfaces.
[0041] (Internal embrittlement process (S2-1)) The internal embrittlement step (S2-1) is a step of forming an embrittled layer 20 inside the semiconductor material 12 at a predetermined depth from the surface 12S by irradiation with an ion beam 50 (FIG. 7(a) to (b)). In the internal embrittlement step (S2-1), the acceleration energy of the ion beam 50 is increased and the surface 12S of the semiconductor material 12 is irradiated with the ion beam 50 so that the embrittled layer 20 is formed at a position at a predetermined depth from the surface 12S of the semiconductor material 12. The thickness of the embrittled layer 20 is 10 nm to 5 μm, but can be appropriately adjusted by the acceleration energy of the ion beam, etc. For example, in the internal embrittlement step (S2-1), the acceleration voltage is set to 200 kV or more (e.g., 200 kV to 300 kV), and the dose amount is set to 1.0×10 15 ion / cm 2 ~1.0×10 18 ion / cm 2 Or 10x10 16 ion / cm 2 ~5.0×10 17 The ion beam 50 is irradiated under conditions such that the surface layer 24 of the semiconductor material 12 (the layer between the surface 12S of the semiconductor material 12 and the embrittled layer 20) is highly crystallized by increasing the acceleration energy. The thickness of the surface layer 24 is about 0.1 to 0.5 μm or 0.2 to 0.4 μm, which is the thickness of the thin film substrate 102 (see FIG. 9(c)) obtained in the separation step (S2-5). By controlling the position where the embrittled layer 20 is formed and adjusting the thickness of the surface layer 24, a thin film substrate 102 of a desired thickness can be obtained.
[0042] (Joining process (S2-2)) The bonding step (S2-2) is a step of bonding a support substrate 30 to the surface 12S of the semiconductor material 12 to obtain a bonded body 40 of the semiconductor material 12 and the support substrate 30 ((b) to (c) of FIG. 7). The material and thickness of the support substrate 30 are not particularly limited as long as it can hold the surface layer 24 that will become the thin film substrate 102 without damaging it in the subsequent polishing step (S2-4) and other steps. For example, a Si substrate, a glass substrate, a metal substrate, a printed circuit board, or the like having a thickness of about 500 μm to 1000 μm can be used as the support substrate 30. The semiconductor material 12 and the support substrate 30 can be bonded by an adhesive, room temperature bonding, high temperature bonding, or the like.
[0043] (Dividing process (S2-3)) The dividing step (S2-3) is a step of dividing the bonded body 40 along the embrittlement layer 20 (FIG. 8). The bonded body 40 can be divided along the embrittlement layer 20 by applying an external force to the embrittlement layer 20 by ultrasonic vibration, mechanical vibration, or the like. The bonded body 40 may be divided by combining ultrasonic vibration or mechanical vibration with laser cutting. When a transparent substrate is irradiated with laser cutting, the laser absorption rate is low and it takes a long time to cut, but the embrittlement layer 20 formed by irradiation with the ion beam 50 turns black and has an improved laser absorption rate. Therefore, by combining with laser cutting, the bonded body 40 can be divided more efficiently in a short time. As a result, the bonded body 40 is divided into a substrate 40a on the support substrate 30 side, which is composed of the support substrate 30, the surface layer 24 of the semiconductor material 12, and a part of the embrittlement layer 20, and a substrate 40b on the semiconductor material 12 side from which the surface layer 24 of the semiconductor material 12 and a part of the embrittlement layer 20 have been removed.
[0044] (Polishing process (S2-4)) The polishing step (S2-4) is a step of polishing the embrittled layer 20, which is the peeled surface of the substrate 40a on the separated support substrate 30 side, in the presence of a slurry to remove the embrittled layer 20 ((a) to (b) in FIG. 9). The polishing step (S2-4) can be performed in the same manner as the polishing step (S1-2) except that the substrate 40a is used as the processing object instead of the semiconductor material 10.
[0045] In addition, the substrate 40b on the semiconductor material 12 side can be reused as the semiconductor material in the internal embrittlement step (S2-1) after the embrittlement layer 20 on the surface is polished in the same manner as in the polishing step (S1-2). This makes it possible to manufacture a large number of substrates from one ingot.
[0046] (Separation process (S2-5)) The separation step (S2-5) is a step of separating the substrate 40a on the support substrate 30 side after the polishing step (S2-4) into the support substrate 30 and the thin film substrate 102 (FIGS. 9(b) to 9(c)). The thin film substrate 102 corresponds to the surface layer 24 of the semiconductor material 12 formed in the internal embrittlement step (S2-1). The support substrate 30 and the thin film substrate 102 can be separated by using laser cutting or the like.
[0047] In Fig. 7, the embrittled layer 20 is formed uniformly inside the semiconductor material 12 in the internal embrittling step (S2-1), but the thickness of the embrittled layer may be made to vary partially instead of uniform by controlling the ion beam irradiation position and acceleration energy. For example, in the internal embrittling step (S2-1), the embrittled layer 20 having a protrusion protruding from the surface 12S side is formed (Fig. 10(a)), so that the embrittled layer 20 of the substrate 40a on the support substrate 30 side divided in the division step (S2-3) has a thicker thickness at the portion having the protrusion (Fig. 10(b)). In the polishing step (S2-4), only the embrittled layer 20 is removed, so that a three-dimensional structure is formed on the surface of the thin film substrate 102a (Fig. 10(c)).
[0048] [Semiconductor Devices] A semiconductor device can be manufactured using the semiconductor material with a polished surface manufactured by the manufacturing method of the present invention. For example, a semiconductor device can be obtained by using a wafer such as SiC manufactured by the manufacturing method of the present invention and a conventional manufacturing method of a semiconductor device.
[0049] As described above, in the present embodiment shown in FIG. 5(c) and FIG. 10(c), a three-dimensional structure represented by unevenness can be formed on the surface of a semiconductor material that is very difficult to process without performing surface processing means other than polishing (etching, etc.), so that semiconductor elements such as power semiconductors can be manufactured without increasing the number of steps by stacking various semiconductor layers, conductive layers, insulating layers, etc. on a semiconductor material (plate-shaped substrate). Also, as described above, by forming the unevenness by one processing means represented by polishing, it becomes easy to obtain the desired dimensional accuracy and surface shape of the unevenness, for example, and it is possible to suppress the characteristic variation of power semiconductor devices, etc., and further to reduce defective products. Also, it is possible to form a wiring structure using the damascene method. Specifically, by using the method shown in FIG. 5 or FIG. 10, the embrittlement layer 20 in the portion of the surface 14S of the semiconductor material 14 where wiring is to be formed is formed thicker than the other portions (FIG. 11(a)), and a structure 104a having grooves 32 corresponding to the wiring pattern is formed by polishing (FIG. 11(b)). Next, the wiring metal 34 is deposited in the formed groove 32 (FIG. 11(c)), and then the wiring metal 34 is removed by polishing except for the wiring metal 34 in the groove 32 (FIG. 11(d)), thereby forming a wiring structure. Also, a part where an embrittled layer is formed on the entire surface is removed by polishing, and then the embrittled layer is heated at a high temperature to highly crystallize the embrittled layer, thereby forming a layer partially doped with ions. These steps can be appropriately combined when manufacturing a semiconductor device. In this way, for example, a semiconductor device can be obtained that includes a substrate made of a semiconductor material such as SiC and having an uneven surface on one side, and an element portion in which a semiconductor layer and a conductive layer are laminated on the uneven surface of the substrate. EXAMPLES
[0050] The present invention will be described in more detail below with reference to examples. However, the present invention is not limited to the following examples unless the gist of the present invention is changed.
[0051] [Example] 1. Ion implantation (Materials and conditions) Substrate: SiC wafer, 20mm square substrate ·Device: IMX-3500 Ion species: Ar+ Acceleration voltage: 50kV Dose: 10×10 17 ion / cm 2
[0052] After the ion implantation, the surface of the substrate where the ions were implanted turned black. Figure 12 shows cross-sectional SEM images of the test substrate before and after ion implantation. As shown in Figure 12, it can be seen that an embrittlement layer had formed about 5 μm from the surface.
[0053] 2. Polishing (Materials and conditions) Slurry: PL-7 (Fuso Chemical Co., Ltd., high-purity colloidal silica) was diluted two-fold with water. Polishing pad: SUBA(R) 600 (Nitta DuPont Co., Ltd.) Polishing time: 20 minutes Pad rotation speed: 60 rpm Head rotation speed: 60 rpm Load (surface pressure): 8.45 psi Slurry drip rate: 12cc / min
[0054] Figure 13 is a photograph of the equipment used in the polishing experiment. After attaching a test substrate to the head as shown in Figure 13(a), it was set in the equipment as shown in Figure 13(b) and polished. Note that polishing was performed so that some residual film was left behind in order to make it easier to observe the polished area.
[0055] Figure 14 shows cross-sectional SEM images of the test substrate before and after polishing of the polished area. As shown in Figure 14, it was confirmed that the embrittled layer on the surface had been removed. Figure 15 shows the results of height measurements using a laser microscope. As a result, it was found that polishing was achieved at a high speed, with a removal rate of over 15 μm / h. As mentioned above, in order to emphasize the polished areas, a residual film was intentionally left in some areas, and here it can be seen that the embrittled layer has been removed in some areas, exposing a smooth surface.
[0056] [Comparative Example] Without ion implantation, polishing was carried out under the same polishing conditions as in Example 1. As a result, the polishing rate was about 0.2 μm / h. [Industrial Applicability]
[0057] According to the present invention, it is possible to apply the present invention to next-generation power semiconductor technology that replaces IGBTs and to improve the efficiency of power semiconductor manufacturing. The present invention is useful in various fields in which power semiconductors are used, such as mobility such as trains, high-speed communication technologies such as 5G, and railway fields such as trains and linear motor cars. [Explanation of symbols]
[0058] 1. Workpiece 3 Shielding plate 5. Ion implantation equipment 6 CMP equipment 10, 12, 14 Semiconductor materials 10S, 12S, 14S surface 20 Embrittlement layer 24 Surface layer 30 Support substrate 32 Groove 34 wiring metal 40 zygote 40a, 40b Substrate 50 Ion Beam 51 Ion Source 52 Extraction electrode 53 Mass separator 54 Analysis Slit 55 Accelerator tube 56 Deflector 57 Q Lens 58 Scanner 60 Head 61, 66 Rotation drive device 62 Slurry 63 Slurry supply device 64 Polishing Pad 65 Surface Plate 100, 100a, 102, 102a, 104a Thin film substrate
Claims
1. A method for producing a polished semiconductor material, comprising a polishing step of removing an embrittlement layer formed on the surface or inside of a semiconductor material, which is SiC, diamond or GaN, by irradiating the semiconductor material with an ion beam, by polishing the embrittlement layer in the presence of a slurry.
2. 2. The method for producing a semiconductor material according to claim 1, wherein a slurry used in the polishing step contains abrasive grains and has an oxidizing agent content of 1 mass % or less.
3. The method for producing a semiconductor material according to claim 1 or 2, wherein the polishing grains are silica.
4. The method for producing a semiconductor material according to claim 1 or 2, wherein in the polishing step, the polishing is self-stopped when removal of the embrittlement layer is completed.
5. a surface embrittlement step of forming the embrittlement layer on a surface of the semiconductor material by irradiation with the ion beam; The method for producing a semiconductor material according to claim 1 or 2, further comprising the step of polishing the embrittlement layer formed on the surface of the semiconductor material in the presence of the slurry to remove the embrittlement layer.
6. The method for producing a semiconductor material according to claim 5 , wherein in the surface embrittlement step, the embrittlement layer is formed on a part of the surface of the semiconductor material.
7. an internal embrittlement step of forming the embrittlement layer inside the semiconductor material at a predetermined depth from the surface of the semiconductor material by irradiating the ion beam; a bonding step of bonding a support substrate to the surface of the semiconductor material to obtain a bonded body of the semiconductor material and the support substrate; a dividing step of dividing the bonded body along the embrittlement layer; The method for producing a semiconductor material according to claim 1 or 2, further comprising: a polishing step of polishing the embrittlement layer, which becomes a peeling surface of the separated substrate on the support substrate side, in the presence of the slurry to remove the embrittlement layer.
8. The method for producing a semiconductor material according to claim 7 , further comprising a separation step of separating the substrate on the support substrate side in the polishing step into the support substrate and a thin film substrate.
9. The method for producing a semiconductor material according to claim 8 , wherein in the separating step, separation into the support substrate and the thin film substrate is performed by at least laser cutting.
10. 3. The method for producing a semiconductor material according to claim 1, wherein the embrittlement layer is formed to have different thicknesses in different parts by changing an acceleration voltage of the ion beam or by controlling a part irradiated with the ion beam.
11. 3. A semiconductor device comprising a substrate having an uneven surface on one side thereof, the substrate being made of a semiconductor material formed by the method for manufacturing a semiconductor material according to claim 1 or 2, and an element portion having a semiconductor layer and a conductive layer stacked on the uneven surface of the substrate.
Citation Information
Patent Citations
Polishing method and acidic polishing solution
JP2012253259A