Semiconductor device

Abstract

To expand an adjustment range of a power supply voltage generated based on a reference voltage while suppressing the influence of voltage noise.SOLUTION: A semiconductor device 100 is provided with a reference voltage generating circuit 120 for generating a reference voltage, a regulator 140 for generating a power supply voltage based on the reference voltage, a buffer 130 for transmitting the reference voltage of the reference voltage generating circuit 120 to the regulator 140, and a voltage control circuit 180 for generating a control signal. The reference voltage generating circuit 120 is configured to adjust the reference voltage. The regulator 140 is configured to change the output ratio of the power supply voltage to the reference voltage based on the control signal. The semiconductor device 100 further includes a voltage control circuit 180 for outputting a voltage control signal for switching the output ratio to the regulator 140.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] A power supply circuit mounted on an MCU (Micro Controller Unit) generates a power supply voltage VDD based on a reference voltage after a power-on reset is released. Patent Documents 1 and 2 disclose techniques for adjusting the power supply voltage by trimming the reference voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2004-319034 A [Patent Document 2] JP 2007-193933 A Summary of the Invention [Problem to be solved by the invention]

[0004] It is desirable to expand the adjustment range of the power supply voltage generated based on the reference voltage while suppressing the effects of voltage noise.

[0005] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0006] A semiconductor device according to one embodiment includes a reference voltage generation circuit that generates a reference voltage, a regulator that generates a power supply voltage based on the reference voltage, and a buffer that transmits the reference voltage from the reference voltage generation circuit to the regulator. The reference voltage generation circuit is configured to be able to adjust the reference voltage. The regulator is configured to be able to change an output ratio of the power supply voltage to the reference voltage. The semiconductor device further includes a voltage control circuit that outputs a voltage control signal to the regulator to switch the output ratio. Effect of the Invention

[0007] According to the embodiment, it is possible to expand the adjustment range of the power supply voltage generated based on the reference voltage while suppressing the influence of voltage noise. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to a comparative example. [Diagram 2] 11A and 11B are diagrams illustrating the relationship between a power supply voltage and a voltage assurance signal in the comparative example. [Diagram 3] 11A and 11B are diagrams illustrating the fluctuation ranges of a power supply voltage and a voltage detection value in a comparative example. [Figure 4] 10A to 10C are diagrams illustrating the operation of a semiconductor device according to a comparative example. [Diagram 5] 1A to 1C are diagrams for explaining a problem of a semiconductor device according to a comparative example. [Figure 6] 1A to 1C are diagrams for explaining a problem of a semiconductor device according to a comparative example. [Figure 7] 1A and 1B are diagrams illustrating a configuration of a semiconductor device according to a study example. [Figure 8] 1A to 1C are diagrams for explaining problems with a semiconductor device according to a study example; [Figure 9] FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to a first embodiment. [Figure 10] FIG. 4 is a diagram illustrating voltage noise in the semiconductor device according to the first embodiment. [Figure 11] FIG. 4 is a diagram illustrating the operation of the regulator according to the first embodiment. [Figure 12] 5 is a diagram illustrating the fluctuation ranges of a power supply voltage and a detected voltage value in the first embodiment. FIG. [Figure 13] FIG. 2 is a diagram illustrating the operation of the semiconductor device according to the first embodiment. [Figure 14] FIG. 2 is a diagram for explaining a configuration of a semiconductor device according to Example 1 of the first embodiment. [Figure 15] FIG. 2 is a diagram for explaining a configuration of a semiconductor device according to Example 2 of the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] In order to clarify the explanation, the following description and drawings are omitted and simplified as appropriate. In addition, each element shown in the drawings as a functional block performing various processes can be configured in hardware with a CPU, memory, and other circuits, and in software with a program loaded into memory. Therefore, it is understood by those skilled in the art that these functional blocks can be realized in various forms by hardware, software running on hardware, or a combination thereof, and are not limited to any one of them. In addition, in each drawing, the same elements are given the same reference numerals, and duplicate explanations are omitted as necessary.

[0010] Moreover, the above-mentioned program includes a set of instructions (or software code) for making the computer perform one or more functions described in the embodiment when the program is loaded into the computer. The program may be stored in a non-transitory computer-readable medium or a tangible storage medium. By way of example and not limitation, the computer-readable medium or the tangible storage medium includes Random Access Memory (RAM), Read Only Memory (ROM), flash memory, Solid State Drive (SSD) or other memory technology, CD-ROM, Digital Versatile Disc (DVD), Blu-ray (registered trademark) disk or other optical disk storage, magnetic cassette, magnetic tape, magnetic disk storage or other magnetic storage device. The program may be transmitted on a transitory computer-readable medium or a communication medium. By way of example and not limitation, the transitory computer-readable medium or the communication medium includes electrical, optical, acoustic, or other forms of propagating signals.

[0011] (Considerations leading to the embodiment) 1 is a diagram showing a configuration of a semiconductor device 100 according to a comparative example. The semiconductor device 100 includes a reset generation circuit 110, a reference voltage generation circuit 120, a buffer 130, a regulator 140, a voltage detection circuit 150, an oscillator 160, and a trimming circuit 170. The reset generation circuit 110 outputs a power-on reset to the trimming circuit 170 and the like.

[0012] The reference voltage generation circuit generates the reference voltage V REF This is a circuit that generates a reference voltage V REF The reference voltage generating circuit 120 includes a bandgap reference (BGR) 121, an operational amplifier 122, a p-type field effect transistor (FET) 123, a serial ladder resistor 124, and a selector 125. The BGR 121 adjusts the BGR voltage V BGR Generates the BGR voltage V BGRis input to the negative input terminal of the operational amplifier 122. The output terminal of the operational amplifier 122 is connected to the gate terminal of the FET 123. The source terminal of the FET 123 is connected to a power supply line that supplies a power supply voltage VCC, and the drain terminal of the FET 123 is connected to ground via the ladder resistor 124. The power supply voltage VCC is also called a primary power supply. A power supply voltage VDD, which will be described later, is also called a secondary power supply. The selector 125 selects one node from among a plurality of nodes on the ladder resistor 124 based on a trimming code, which will be described later, and outputs the voltage of the selected one connection node (feedback loop voltage V FB1 The voltage at a predetermined node among the multiple nodes on the ladder resistor 124 (called a voltage detection value HDET) is supplied to a voltage detection circuit 150. The reference voltage generation circuit 120 converts the voltage at a node between the FET 123 and the ladder resistor 124 into a reference voltage V REF The output is as follows:

[0013] The buffer 130 receives the reference voltage V REF to the regulator 140. The characteristics of the elements included in the buffer 130 are adjusted based on the trimming code. The buffer 130 may be, for example, a voltage follower circuit including an operational amplifier.

[0014] The regulator 140 includes an operational amplifier 141, a p-type FET 142, a resistor R0, and a resistor R1. The negative input terminal of the operational amplifier 141 is connected to the output terminal of the buffer 130. The output terminal of the operational amplifier 141 is connected to the gate terminal of the FET 142. The source terminal of the FET 142 is connected to a power supply line that supplies a power supply voltage VCC. The drain terminal of the FET 142 is connected to one end of the resistor R1. The other end of the resistor R1 is connected to one end of the resistor R0. The other end of the resistor R0 is connected to the ground. The voltage of a node between the resistors R0 and R1 is input to the positive input terminal of the operational amplifier 141. The regulator 140 outputs the voltage of a node between the FET 142 and the resistor R1 as a power supply voltage VDD. The power supply voltage VDD is also called a secondary power supply. The power supply voltage VDD is supplied to a non-volatile memory block 172, which will be described later, and the power supply voltage VCC is supplied to other circuits.

[0015] The voltage detection circuit 150 includes a circuit for detecting that the power supply voltage VDD has exceeded a voltage detection value HDET and a circuit for detecting that the power supply voltage VDD has exceeded a voltage detection value LDET. The voltage detection value LDET may be supplied from the reference voltage generation circuit 120, similar to the voltage detection value HDET. The voltage detection value LDET is lower than the voltage detection value HDET. When the power supply voltage VDD has exceeded the voltage detection value HDET, the voltage detection circuit 150 outputs a voltage guarantee signal to the trimming circuit 170.

[0016] FIG. 2 is a diagram for explaining the relationship between the power supply voltage VDD and the voltage guarantee signal. In the top graph, the power supply voltage VDD is indicated by a solid line, the voltage detection value HDET is indicated by a dashed line, and the voltage detection value LDET is indicated by a dashed line. The voltage detection value HDET is also called a first threshold value, and the voltage detection value LDET is also called a second threshold value. At power-on, when the power supply voltage VDD exceeds the voltage detection value HDET, a voltage guarantee signal (L level) is output. During normal operation, the output of the voltage guarantee signal continues as long as the power supply voltage VDD exceeds the voltage detection value LDET. When the voltage detection circuit 150 detects that the power supply voltage VDD has become equal to or lower than the voltage detection value LDET, it ends the output of the voltage guarantee signal. The output operation of the voltage guarantee signal has hysteresis, which provides a margin for the drop of the power supply voltage VDD.

[0017] Referring to FIG. 1, the oscillator 160 generates a reference voltage V REF The trimming circuit 170 includes a trimming control circuit 171, a nonvolatile memory block 172, and a trimming code supply circuit 173. When the trimming control circuit 171 receives a power-on reset, it performs a reset operation. When the trimming control circuit 171 receives a voltage assurance signal, it outputs a trimming start request to the nonvolatile memory block 172. Then, the trimming control circuit 171 outputs a signal (called trimming data supply control) to the trimming code supply circuit 173 for controlling the supply of trimming codes by the trimming code supply circuit 173. The nonvolatile memory block 172 stores a reference voltage V REF The nonvolatile memory block 172 stores information (called a trimming code) used to adjust the characteristics of an element included in the buffer 130. The trimming code may include information for adjusting the characteristics of an element included in the buffer 130. When the nonvolatile memory block 172 receives a trimming start request, the nonvolatile memory block 172 outputs reset transfer information including the trimming code to the trimming code supply circuit 173. The trimming code supply circuit 173 outputs the trimming code read from the nonvolatile memory block 172 to the selector 125 and the buffer 130 in accordance with the trimming data supply control.

[0018] Figure 3 shows the BGR voltage V BGR Variation in ΔV BGR FIG. 1 is a diagram for explaining the fluctuation range of the power supply voltage VDD and the voltage detection value HDET with respect to ΔV. The left diagram shows the fluctuation range of the power supply voltage VDD and the voltage detection value HDET before trimming. The right diagram shows the fluctuation range of the power supply voltage VDD and the voltage detection value HDET after trimming. The horizontal axis is ΔV BGR , and the vertical axis represents voltage.

[0019] The reference voltage generating circuit 120 generates the BGR voltage V BGR Based on the reference voltage V REF The power supply voltage VDD and the voltage detection value HDET are generated based on the reference voltage V REF Therefore, in the steady state, the power supply voltage VDD is generated based on the BGR voltage V BGR The voltage detection value HDET is proportional to the BGR voltage V BGR Therefore, ΔV BGR A linear variation with respect to is propagated to the power supply voltage VDD and the voltage detection value HDET.

[0020] In each figure, the upper solid line represents the power supply voltage VDD, and the lower solid line represents the voltage detection value HDET. BGR This shows the variation of the power supply voltage VDD when is fixed. The dotted lines show the upper and lower limits of the variation of the power supply voltage VDD. The double-headed arrows on the lower side show ΔV BGR The variation of HDET when is fixed. The upper and lower limits of the variation of the voltage detection value HDET are shown by dotted lines. The BGR voltage V BGR Variation in ΔV BGR Therefore, the fluctuation range of the power supply voltage VDD is between VDD(min) and VDD(max). Similarly, the BGR voltage V BGR Variation in ΔV BGRAs a result, the fluctuation range of the voltage detection value HDET is between HDET(min) and HDET(max). Referring to the diagram on the right, the fluctuation range of the power supply voltage VDD after trimming is narrower than the fluctuation range of the power supply voltage VDD before trimming. Similarly, the fluctuation range of the voltage detection value HDET after trimming is narrower than the fluctuation range of the voltage detection value HDET before trimming.

[0021] The main cause of fluctuations in the power supply voltage VDD is differential mismatch in the operational amplifier 141 included in the regulator 140. The main cause of fluctuations in the voltage detection value HDET is differential mismatch in an operational amplifier (not shown) and the like included in the voltage detection circuit 150. Since the manufacturing variations of the regulator 140 and the voltage detection circuit 150 are independent of each other, the power supply voltage VDD and the voltage detection value HDET fluctuate independently of each other.

[0022] 4 is a diagram for explaining the operation of the semiconductor device 100. When the power supply voltage VCC exceeds a threshold value, the power-on reset is released. Then, when the power supply voltage VDD exceeds the voltage detection value HDET, a voltage guarantee signal (L level) is output. Then, the trimming control circuit 171 outputs a trimming start request (H level), and the non-volatile memory block 172 outputs reset transfer information. Then, the trimming code supply circuit 173 changes the trimming code from the initial value to a correction value.

[0023] Next, a problem newly found by the present inventor regarding the semiconductor device 100 will be described. In the semiconductor device 100, the power supply voltage VDD and the voltage detection value HDET vary independently of each other, so that the power supply voltage VDD before trimming may become lower than the voltage detection value HDET as the MCU voltage becomes lower. FIG. 5 is a diagram for explaining the fluctuation range of the power supply voltage VDD and the voltage detection value HDET when the power supply voltage VDD is low. As in FIG. 3, the left diagram shows the fluctuation range before trimming, and the right diagram shows the fluctuation range after trimming. Referring to the left diagram, the minimum value VDD(min) of the power supply voltage VDD is lower than the maximum value HDET(max) of the voltage detection value HDET. Therefore, there is a risk that the power supply voltage VDD may become lower than the voltage detection value HDET.

[0024] When the power supply voltage VDD before trimming is lower than the voltage detection value HDET, the voltage detection circuit 150 does not output a voltage guarantee signal to the trimming control circuit 171. Then, the trimming control circuit 171 does not output a trimming request to the non-volatile memory block 172. Therefore, the semiconductor device 100 does not output a voltage guarantee signal to the non-volatile memory block 172. REF 6 is a diagram for explaining the operation of the semiconductor device 100 when the power supply voltage VDD is lower than the voltage detection value HDET. Since the power supply voltage VDD does not exceed the voltage detection value HDET, the voltage guarantee signal (L level) is not output. The trimming code remains at the initial value, and the reference voltage V REF is not cropped.

[0025] In order to solve the above problem, the present inventors have considered making the initial power supply voltage VDD higher than the power supply voltage VDD during normal operation so that the power supply voltage VDD that has fluctuated downward becomes higher than the voltage detection value HDET. FIG. 7 is a diagram illustrating the configuration of a semiconductor device 200 according to the considered example. The reset generation circuit 110, the oscillator 160, and the trimming circuit 170 are omitted from the illustration. Comparing FIG. 1 with FIG. 7, the reference voltage generation circuit 120 is replaced with a reference voltage generation circuit 120a. The reference voltage generation circuit 120a further includes a selector 126. The selector 126 selects a reference voltage V to be output to the buffer 130 based on a voltage control signal supplied from outside the reference voltage generation circuit 120a. REF The selector 126 has a function of switching the level of the reference voltage V REF The semiconductor device 200 roughly adjusts the reference voltage V REF By increasing the reference voltage V REF can be trimmed.

[0026] Next, a problem with the semiconductor device 200 will be described. REF Switching the height of causes a charge transfer from the selected node. Thus, the feedback loop voltage V FB1The transient switching noise propagates to the voltage detection value HDET. The dotted arrows indicate the path along which the switching noise propagates. The feedback loop voltage V FB1 The voltage noise generated in the BGR 121 propagates to the BGR 121 through the capacitive coupling included in the differential amplifier circuit of the operational amplifier 122. The voltage noise propagated to the BGR 121 is the BGR voltage V BGR The voltage noise propagated to the voltage detection circuit 150 deteriorates the accuracy of the voltage detection value HDET. REF The reference voltage V when the height of REF , feedback loop voltage V FB1 , voltage detection value HDET, and BGR voltage V BGR If the accuracy of the power supply voltage VDD decreases, the frequency accuracy of the oscillator may also decrease via the power supply voltage VDD.

[0027] Based on the above investigation, the inventors have come up with the following embodiment.

[0028] EMBODIMENT 1 Fig. 9 is a circuit diagram showing a configuration of a semiconductor device 300 according to the embodiment 1. Comparing Fig. 1 with Fig. 9, the regulator 140 is replaced with a regulator 140a. The semiconductor device 300 further includes a voltage control circuit 180.

[0029] The regulator 140a outputs a reference voltage V REF The output ratio of the power supply voltage VDD to the output voltage Vdd can be changed. For example, the resistor R1 is a variable resistor R ct The output voltage V OUT V OUT =(1+R ct / R0)V REFAlternatively, a series-type ladder resistor (not shown) may be arranged between the power supply line that outputs the power supply voltage VDD and ground, and a selector (not shown) may be provided to select one node from among a plurality of nodes. The voltage of the selected node is input to the negative input terminal of the operational amplifier 141. The voltage input to the negative input terminal of the operational amplifier 141 is the feedback loop voltage V FB2 It is said that.

[0030] The voltage control circuit 180 controls the reference voltage V REF The voltage control circuit 180 outputs a voltage control signal for switching the output ratio of the power supply voltage VDD to the voltage control signal VDD1 to the regulator 140a. Specifically, the voltage control circuit 180 outputs a set value before trimming (VDD set value 1) or a set value after trimming (VDD set value 2) as a voltage control signal based on a notice from the outside (called a trimming read completion notice). When the voltage control trimming read completion notice is not input, the voltage control circuit 180 outputs a set value (e.g., "0") for outputting a high power supply voltage VDD to the regulator 140a. When the trimming completion notice is input, the voltage control circuit 180 outputs a set value (e.g., "1") for outputting a low power supply voltage VDD to the regulator 140a. "0" represents an L level, and "1" represents an H level. The trimming read completion notice may be transmitted from the non-volatile memory block 172 or may be transmitted from a counter (not shown). The voltage control circuit 180 may change the power supply voltage VDD by about 0.1 V, for example.

[0031] As in the case of the examined example, voltage noise occurs due to fluctuations in the power supply voltage VDD, but the voltage noise propagating to the BGR 121 and the voltage detection circuit 150 is small. This is because the voltage noise propagates via the buffer 130. Therefore, the semiconductor device 300 has a low BGR The effect of voltage noise on the voltage detection value HDET and the BGR voltage V BGR 1 is a graph showing the change over time in the power supply voltage VDD and the feedback loop voltage V FB2 The voltage detection value HDET and the BGR voltage VBGR The voltage noise propagating to the

[0032] 11 is a diagram illustrating the operation of the regulator 140a. REF The diagram below shows the operation of regulator 140a before trimming the reference voltage V REF 1 shows the operation of regulator 140a after trimming. Regulator 140a includes ladder resistor 143 and selector 144. Series ladder resistor 143 is disposed between a power supply line that supplies power supply voltage VDD and ground. Selector 144 selects one of two nodes on ladder resistor 143 based on a voltage control signal. Selector 144 may be configured with one or more switches. The voltage of the selected node is determined as a feedback loop voltage V FB2 Before trimming, the selector 144 selects the low feedback loop voltage V FB2 is input to the op amp 141, and after trimming, a high feedback loop voltage V FB2 is input to the operational amplifier 141.

[0033] 12 is a diagram illustrating the fluctuation range of the power supply voltage VDD and the voltage detection value HDET in the semiconductor device 100. Referring to the left diagram, the power supply voltage VDD is set high so that the minimum value VDD(min) of the power supply voltage VDD is higher than the maximum value HDET(max) of the power supply voltage HDET. Referring to the right diagram, the power supply voltage VDD after trimming is set to a low value.

[0034] In the semiconductor device 100, after the power supply voltage VDD exceeds the voltage detection value HDET (first threshold value), the reference voltage V REF The output ratio of the power supply voltage VDD to the reference voltage V is switched from the first output ratio to a second output ratio that is smaller than the first output ratio. REF can be trimmed.

[0035] 13 is a diagram for explaining the operation of the semiconductor device 300. When the power supply voltage VDD exceeds the voltage detection value HDET, a voltage guarantee signal (L level) is output. Then, a trimming start request (H level) is output, and transmission of reset transfer information is started. Then, the trimming code is changed from the initial value to a correction value, and the reference voltage V REF This allows fine adjustment of the power supply voltage VDD. REF After the trimming is completed, a trimming read completion notification (L level) is output, and the power supply voltage VDD changes to a low value.

[0036] The semiconductor device 300 according to the first embodiment can expand the adjustment range of the power supply voltage VDD while suppressing the influence of the occurrence of voltage noise. The semiconductor device 300 can prevent the accuracy of the power supply voltage VDD and the voltage detection value HDET from being reduced due to the voltage noise propagating to the BGR 121, the voltage detection circuit 150, etc. Furthermore, the semiconductor device 300 can prevent the reference voltage from not being trimmed by expanding the adjustment range of the power supply voltage VDD.

[0037] Example 1 Next, a semiconductor device 300a according to Example 1, which is a specific example of the first embodiment, will be described. FIG. 14 is a diagram for explaining the configuration of the semiconductor device 300a according to Example 1. Comparing FIG. 9 with FIG. 14, the regulator 140a is configured as a DCDC converter. In addition, the clock signal CLK generated by the oscillator 160 is supplied to the trimming control circuit 171 and the nonvolatile memory block 172. The nonvolatile memory block may be, for example, a magnetoresistive random access memory (MRAM) or a flash memory. The trimming control circuit 171 outputs a memory reset to the nonvolatile memory block 172 in addition to a trimming start request.

[0038] The regulator 140a further includes a pulse generator 145, a p-type MOSFET 146, an n-type MOSFET 147, a diode 148, an inductor L, and a capacitor C. The source terminal of the MOSFET 146 is connected to a power supply line that supplies a power supply voltage VCC. The drain terminal of the MOSFET 146 and the drain terminal of the MOSFET 147 are connected to each other. The source terminal of the MOSFET 147 is connected to a ground GND. The pulse generator 145 switches the MOSFETs 146 and 147 on and off based on the output voltage of the operational amplifier 141 and a clock signal CLK. The voltage of the node between the MOSFETs 146 and 147 is output as a power supply voltage VDD via the inductor L. The anode terminal of the diode 148 is connected to the ground GND. The cathode terminal of the diode 148 is connected to a node between the MOSFET 147 and the inductor L. The capacitor C is disposed between the power supply line that outputs the power supply voltage VDD and the ground GND.

[0039] The dotted lines surrounding the buffer 130 and the regulator 140a indicate that the power supply voltage VCC is supplied to these circuits. The dotted lines surrounding the trimming control circuit 171, the trimming code supply circuit 173, and the voltage control circuit 180 indicate that the power supply voltage VCC is supplied to these circuits. The reset generation circuit 110, the reference voltage generation circuit 120, the voltage detection circuit 150, and the oscillator 160 are supplied with the power supply voltage VCC. The non-volatile memory block 172 is supplied with the power supply voltage VDD generated by the regulator 140.

[0040] The operation of the semiconductor device 300a according to the first embodiment will be described. After power-on, when the power supply voltage VCC becomes equal to or higher than the threshold value, the reset generation circuit 110 releases the power-on reset, and the oscillator 160 starts oscillating. In parallel with the release of the power-on reset and the start of oscillation, the regulator 140a generates a power supply voltage VDD based on the power supply voltage VCC according to a voltage control signal generated by the voltage control circuit 180. Then, the voltage detection circuit 150 detects that the power supply voltage VDD is within the voltage guarantee range, that is, that the power supply voltage VDD has exceeded the voltage detection value HDET, and outputs a voltage guarantee signal to the trimming control circuit 171. Then, the trimming control circuit 171 outputs a memory reset and trimming start request to the non-volatile memory block 172. Note that the power-on reset of the trimming control circuit 171 is released, and a clock is supplied from the oscillator 160 to the trimming control circuit 171. Then, reset transfer information including the trimming code is read from the non-volatile memory block 172, and the trimming code is stored in the trimming code supply circuit 173. Then, the reference voltage V generated by the reference voltage generation circuit 120 is REF is finely adjusted. Then, the non-volatile memory block 172 outputs a trimming read completion notification to the voltage control circuit 180. Upon receiving the trimming code completion notification, the voltage control circuit 180 changes the power supply voltage VDD by outputting a voltage control signal to the regulator 140a. The power supply voltage VDD is changed from a high voltage (e.g., 0.9 V) to a low voltage (e.g., 0.8 V).

[0041] In addition, in FIG. 13, the regulator 140a constitutes a step-down DCDC converter, but the regulator 140a may be constituted by a step-up DCDC converter or a linear regulator.

[0042] In the semiconductor device 300a according to the first embodiment, the nonvolatile memory block 172 that stores the trimming code can notify the voltage control circuit 180 of an appropriate timing for switching the power supply voltage VDD.

[0043] Example 2 Next, a semiconductor device 300b according to Example 2, which is a specific example of the first embodiment, will be described. FIG. 15 is a diagram for explaining the configuration of the semiconductor device 300b according to Example 2. Comparing FIG. 14 with FIG. 15, the semiconductor device 300b further includes a counter 190. A power supply voltage VCC is supplied to the counter 190. The trimming control circuit 171 outputs a memory reset to the non-volatile memory block 172 and the counter 190. The counter 190 starts counting after receiving the memory reset. Then, when the count number becomes equal to or higher than the reference voltage V REF When the count reaches a predetermined number corresponding to the period until trimming, the counter 190 transmits a trimming read completion notification to the voltage control circuit 180. This ensures a sufficient period from when a memory reset is output until when a trimming read completion notification is output (called a trimming read period). The trimming read completion notification can also be said to notify the timing of outputting a voltage control signal.

[0044] The operation of the semiconductor device 300b will be described. After power-on, when the power supply voltage VCC becomes equal to or higher than the threshold, the reset generation circuit 110 releases the power-on reset, and the oscillator 160 starts oscillating. When the trimming control circuit 171 outputs a memory reset and trimming start request to the non-volatile memory block 172, the counter 190 starts counting the number of pulses of the clock signal generated by the oscillator 160. The counter 190 can guarantee the length of the trimming read period. Then, the trimming code is read from the non-volatile memory block 172, and the trimming code is stored in the trimming code supply circuit 173. Then, when the number of counted pulses reaches a predetermined number, the counter 190 outputs a trimming read completion notification to the voltage control circuit 180, and the voltage control circuit 180 changes the power supply voltage VDD. Note that, similar to the first embodiment, the regulator 140a may be configured with a step-up type DCDC converter or a linear regulator.

[0045] In the semiconductor device 300b according to the second embodiment, the counter 190 can notify the voltage control circuit 180 of an appropriate timing for switching the power supply voltage VDD.

[0046] Finally, a description will be given of the effects achieved by the semiconductor device 300 according to the embodiment 1. The semiconductor device 300 can expand the adjustment range of the power supply voltage VDD while maintaining the accuracy of both the voltage detection value HDET and the power supply voltage VDD without significantly changing the circuit area.

[0047] With the semiconductor device 300, the operating voltage during normal operation of the MCU can be determined based on the relationship between the variation width of the power supply voltage VDD after trimming and the electrical characteristics in the process, regardless of the variation width of the power supply voltage VDD before trimming. Therefore, the semiconductor device 300 can contribute to lowering the operating voltage of the MCU.

[0048] The invention made by the inventor has been specifically described above based on an embodiment, but it goes without saying that the present invention is not limited to the above embodiment and can be modified in various ways without departing from the gist of the invention. [Explanation of symbols]

[0049] 100, 200, 300, 300a, 300b Semiconductor device 110 Reset Generation Circuit 120, 120a Reference voltage generating circuit 121 BGR 122, 141 Op-amps 123, 142 FET 124, 143 Ladder resistor 125, 126, 144 selector 130 Buffer 140, 140a regulator R0, R1 Resistors 145 Pulse Generator 146, 147 MOSFETs 148 Diode 150 Voltage detection circuit 160 Oscillator 170 Trimming circuit 171 Trimming control circuit 172 non-volatile memory blocks 173 Trimming cord supply circuit 180 Voltage control circuit 190 Counter L Inductor C Capacitor

Claims

1. a reference voltage generating circuit for generating a reference voltage; a regulator that generates a power supply voltage based on the reference voltage; a buffer that transmits the reference voltage from the reference voltage generating circuit to the regulator; A semiconductor device comprising: the reference voltage generating circuit is configured to be able to adjust the reference voltage; the regulator is configured to be able to change an output ratio of the power supply voltage to the reference voltage; The semiconductor device further includes a voltage control circuit that outputs a voltage control signal for switching the output ratio to the regulator. Semiconductor device.

2. a non-volatile memory block for storing a trimming code used to adjust the reference voltage; a trimming code supplying circuit that supplies the trimming code read from the nonvolatile memory block to the reference voltage generating circuit; The semiconductor device according to claim 1 , further comprising:

3. After it is detected that the power supply voltage exceeds a first threshold, the output ratio is switched from a first output ratio to a second output ratio that is smaller than the first output ratio. The semiconductor device according to claim 1 .

4. The non-volatile memory block notifies the voltage control circuit of the timing for supplying the voltage control signal. The semiconductor device according to claim 2 .

5. An oscillator that generates a clock signal; a counter for counting the number of pulses of the clock signal; Equipped with The counter notifies the voltage control circuit of the timing for supplying the voltage control signal based on the number of pulses. The semiconductor device according to claim 1 .

6. a voltage detection circuit that detects when the power supply voltage exceeds the first threshold value; The semiconductor device according to claim 3 .

7. The reference voltage generating circuit includes: a BGR circuit that generates a BGR (Bandgap Reference) voltage; An operational amplifier, A ladder resistor disposed between an output terminal of the operational amplifier and ground; a selector that selects one node from among a plurality of nodes on the ladder resistor and inputs a voltage of the one node to the operational amplifier; Equipped with The BGR voltage is input to the operational amplifier, The reference voltage is adjusted by the selector. The semiconductor device according to claim 6.

8. the first threshold value is a voltage of a predetermined node included in the plurality of nodes, The voltage at the predetermined node is supplied to the voltage detection circuit. The semiconductor device according to claim 7.

9. The voltage detection circuit outputs a voltage assurance signal when it detects that the power supply voltage exceeds the first threshold, and terminates output of the voltage assurance signal when it detects that the power supply voltage is equal to or lower than a second threshold that is smaller than the first threshold. The semiconductor device according to claim 6.

10. The power supply voltage is supplied to the non-volatile memory block. The semiconductor device according to claim 2 .

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