Power supply circuit and electronic apparatus
Through the design of the control and driving circuit, combined with the control of the switching element, the voltage instability problem caused by the charge emission circuit being directly connected to the internal circuit is solved, and the stability and reliability of the voltage signal are achieved, and power consumption is reduced.
Patent Information
- Application Number
- JP2023121532
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-26
- Publication Date
- 2025-02-06
AI Technical Summary
In the prior art, the charge discharge circuit is directly connected to the internal circuit, resulting in unstable output voltage, affecting the reliability of the constant voltage circuit and the accuracy of the voltage signal.
A circuit design is adopted, which includes a control circuit, a driving circuit, a regulation circuit and a constant voltage circuit. The control circuit generates a pre-drive signal and an activation signal. The driving circuit changes the voltage signal, the regulation circuit performs voltage conversion, and ensures voltage stability through the control of the switching element.
It improves the stability and reliability of the voltage signal, reduces the power consumption of the circuit, reduces the risk of voltage fluctuations, and improves the overall efficiency of the circuit.
Smart Images

Figure 2025018105000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a power supply circuit and an electronic device. [Background technology]
[0002] Patent document 1 discloses a power supply circuit including a semiconductor device that suppresses the rise in potential due to capacitive coupling by providing a charge removal circuit 1 at a node 110 located between a switching element 5 and an internal circuit 6. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2014-036249 A Summary of the Invention [Problem to be solved by the invention]
[0004] However, in the technology described in Patent Document 1, since the charge discharge circuit 1 directly discharges the charge at the node 110 to which the constant voltage supplied to the internal circuit propagates, the voltage value of the constant voltage supplied to the internal circuit fluctuates with the operation of the charge discharge circuit 1, which may result in a decrease in the accuracy of the constant voltage. In other words, the technology described in Patent Document 1 is insufficient in terms of increasing the reliability of the output voltage signal, and there is room for improvement. [Means for solving the problem]
[0005] One aspect of the power supply circuit according to the present invention is A power supply circuit that converts a first voltage signal having a first voltage value into a second voltage signal having a second voltage value and outputs the second voltage signal, a constant voltage circuit that outputs a third voltage signal having a third voltage value smaller than the first voltage value; a driver circuit to which the first voltage signal and the third voltage signal are input and which outputs a drive signal whose voltage value changes between the first voltage value and the third voltage value; a regulator circuit including a first switch element that is driven by the drive signal, the regulator circuit outputting the second voltage signal by driving the first switch element; Equipped with The driver circuit includes: a second switch element, one end of which is electrically connected to a first wiring through which the first voltage signal propagates and the other end of which is electrically connected to a second wiring through which the drive signal propagates; a third switch element, one end of which is electrically connected to a third wiring through which the third voltage signal propagates and the other end of which is electrically connected to the second wiring; having a conductive state between one end and the other end of the second switch element and a conductive state between one end and the other end of the third switch element are exclusively controlled; The constant voltage circuit includes: a fourth switch element having one end electrically connected to the third wiring, the other end electrically connected to a fourth wiring of a reference potential, and a control terminal electrically connected to a fifth wiring; a fifth switch element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring; has.
[0006] One aspect of the electronic device according to the present invention is The power supply circuit is provided. [Brief description of the drawings]
[0007] [Figure 1] FIG. 2 is a diagram showing a schematic configuration of a power supply circuit. [Diagram 2] FIG. 2 is a diagram illustrating an example of a detailed configuration of a power supply circuit. [Diagram 3] FIG. 4 is a diagram illustrating an example of an operation of a power supply circuit. [Figure 4] 6 is a diagram illustrating an example of a relationship between the logical level of a pre-drive signal and the logical level of a discharge control signal. FIG. [Diagram 5]13 is a diagram showing the simulation results of the voltage value of the constant voltage signal ING and the voltage value of the voltage control signal VG when a through current occurs in the transistors M1 and M2 and the drain terminal and source terminal of the transistor M6 are made non-conductive. [Figure 6] 13 is a diagram showing the simulation results of the voltage value of the constant voltage signal ING and the voltage value of the voltage control signal VG when a through current occurs in the transistors M1 and M2 and the drain terminal and source terminal of the transistor M6 are conductive. [Figure 7] FIG. 1 is a diagram illustrating an example of a structure of a liquid ejection device. [Figure 8] FIG. 2 is a diagram illustrating an example of a functional configuration of a liquid ejection device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Preferred embodiments of the present invention will be described below with reference to the drawings. The drawings are used for the convenience of explanation. Note that the embodiments described below do not unduly limit the contents of the present invention described in the claims. Furthermore, not all of the configurations described below are necessarily essential components of the present invention.
[0009] 1.Power circuit 1.1 Schematic configuration of the power supply circuit Fig. 1 is a diagram showing a schematic configuration of a power supply circuit 1 of this embodiment. As shown in Fig. 1, the power supply circuit 1 includes a control circuit 10, a driver circuit 20, a regulator circuit 30, and a constant voltage circuit 40. The power supply circuit 1 converts a voltage signal VIN having a voltage value of voltage vi, which is input from the outside, into a voltage signal VOUT having a voltage value of voltage vo, and outputs the voltage signal VOUT.
[0010] The control circuit 10 generates and outputs an enable signal EN, a discharge control signal DIS, and a pre-drive signal pDRV of a predetermined logic level at a predetermined timing after a power-on reset or a predetermined timing defined by a feedback voltage signal VFB output by a regulator circuit 30 described later. Such a control circuit 10 may be configured to include, for example, a CPU (Central Processing Unit) and an FPGA (Field Programmable Gate Array).
[0011] The constant voltage circuit 40 outputs a constant voltage signal ING with a voltage value of voltage vig smaller than voltage vi. The constant voltage circuit 40 receives the voltage signal VIN and the enable signal EN output by the control circuit 10. When the logic level of the input enable signal EN is H level, the constant voltage circuit 40 outputs the constant voltage signal ING with a voltage value of voltage vig, and when the logic level of the input enable signal EN is L level, the constant voltage circuit 40 does not output the constant voltage signal ING with a voltage value of voltage vig. That is, the constant voltage circuit 40 switches whether or not to output the constant voltage signal ING with the voltage vig depending on the logic level of the input enable signal EN. Note that the relationship between the logic level of the enable signal EN input to the constant voltage circuit 40 and whether or not the constant voltage signal ING with the voltage vig is output from the constant voltage circuit 40 is not limited to this.
[0012] Furthermore, a discharge control signal DIS output by the control circuit 10 is input to the constant voltage circuit 40. When the logic level of the input discharge control signal DIS is H level, the constant voltage circuit 40 releases the charge stored in the constant voltage circuit 40, and when the logic level of the input discharge control signal DIS is L level, the constant voltage circuit 40 stops releasing the charge stored in the constant voltage circuit 40.
[0013] When the amount of charge stored in the constant voltage circuit 40 increases, the stability of the operation of the constant voltage circuit 40 decreases. As a result, the voltage value of the constant voltage signal ING output by the constant voltage circuit 40 may fluctuate. On the other hand, when the charge stored in the constant voltage circuit 40 is continuously discharged, the power consumption of the power supply circuit 1 may increase. The constant voltage circuit 40 of the present embodiment discharges the charge stored in the constant voltage circuit 40 at an appropriate timing based on the logic level of the discharge control signal DIS, thereby reducing the risk of the voltage value of the constant voltage signal ING output by the constant voltage circuit 40 fluctuating and also reducing the risk of the power consumption of the power supply circuit 1 including the constant voltage circuit 40 increasing. Note that the relationship between the logic level of the discharge control signal DIS input to the constant voltage circuit 40 and the presence or absence of discharge of charge from the constant voltage circuit 40 is not limited to this.
[0014] The driver circuit 20 receives the voltage signal VIN, the pre-drive signal pDRV output by the control circuit 10, and the constant voltage signal ING output by the constant voltage circuit 40. The driver circuit 20 generates and outputs a drive signal DRV whose voltage value changes between voltages vi and vig based on the logical level of the input pre-drive signal pDRV. That is, the driver circuit 20 receives the voltage signal VIN and the constant voltage signal ING, and outputs a drive signal DRV whose voltage value changes between voltages vi and vig.
[0015] The regulator circuit 30 receives the voltage signal VIN and the drive signal DRV output by the driver circuit 20. The regulator circuit 30 operates based on the drive signal DRV, and generates a voltage signal VOUT having a voltage value vo different from the voltage vi by stepping down or stepping up the voltage vi of the voltage signal VIN. The regulator circuit 30 then outputs the generated voltage signal VOUT from the power supply circuit 1. That is, the regulator circuit 30 generates and outputs the voltage signal VOUT.
[0016] Moreover, the regulator circuit 30 generates a feedback voltage signal VFB according to the voltage vo, which is the voltage value of the voltage signal VOUT, and outputs it to the control circuit 10. The control circuit 10 controls the logic levels of the enable signal EN, the discharge control signal DIS, and the pre-drive signal pDRV based on the voltage value of the input feedback voltage signal VFB. This stabilizes the voltage value of the voltage signal VOUT output by the regulator circuit 30.
[0017] A specific example of the configuration of the power supply circuit 1 configured as above will be described with reference to Fig. 2. Fig. 2 is a diagram showing an example of the detailed configuration of the power supply circuit 1. As shown in Fig. 2, a voltage signal VIN having a voltage value of voltage vi input from the outside propagates through a wiring W1 and is input to the power supply circuit 1. The power supply circuit 1 converts the voltage signal VIN input through the wiring W1 into a voltage signal VOUT having a voltage value of voltage vo. The voltage signal VOUT converted by the power supply circuit 1 then propagates through a wiring W2 and is output from the power supply circuit 1.
[0018] As described above, the control circuit 10 generates and outputs the pre-drive signal pDRV, the enable signal EN, and the discharge control signal DIS. The pre-drive signal pDRV output by the control circuit 10 propagates through the wiring W3 and is input to the driver circuit 20. The enable signal EN output by the control circuit 10 propagates through the wiring W4 and is input to the constant voltage circuit 40. The discharge control signal DIS output by the control circuit 10 propagates through the wiring W5 and is input to the constant voltage circuit 40.
[0019] The constant voltage circuit 40 includes resistors R3, R4, R5, and R6, transistors M4, M5, and M6, and a constant voltage diode ZD. In the following description, the transistor M5 is assumed to be a P-channel MOS transistor, and the transistors M4 and M6 are assumed to be N-channel MOS transistors.
[0020] One end of the resistor R3 is electrically connected to the wiring W1. The other end of the resistor R3 is electrically connected to the wiring W6. The wiring W6 is electrically connected to the other end of the resistor R3, as well as one end of the resistor R5 and the drain terminal of the transistor M4. The gate terminal of the transistor M4 is electrically connected to the wiring W4, and the source terminal of the transistor M4 is electrically connected to the wiring Wg through which the ground signal GND of the ground potential gnd that functions as the reference potential of the power supply circuit 1 is propagated.
[0021] The wiring W1 is electrically connected to the cathode terminal of the constant voltage diode ZD. The anode terminal of the constant voltage diode ZD is electrically connected to the wiring W7. The wiring W7 is electrically connected to the other end of the resistor R5, one end of the resistor R6, and the gate terminal of the transistor M5 in addition to the anode terminal of the constant voltage diode ZD. The other end of the resistor R6 is electrically connected to the wiring W8. The wiring W8 is electrically connected to the other end of the resistor R6 and the drain terminal of the transistor M6. The gate terminal of the transistor M6 is electrically connected to the wiring W5, and the source terminal of the transistor M6 is electrically connected to the wiring Wg.
[0022] One end of resistor R4 is electrically connected to wiring W1. The other end of resistor R4 is electrically connected to wiring W9. In addition to the other end of resistor R4, the source terminal of transistor M5 is also electrically connected to wiring W9. The gate terminal of transistor M5 is electrically connected to wiring W7 as described above, and the drain terminal of transistor M5 is electrically connected to wiring Wg.
[0023] As described above, the constant voltage circuit 40 includes a transistor M5 having a source terminal electrically connected to the wiring W9, a drain terminal electrically connected to the wiring Wg of the ground potential gnd functioning as a reference potential, and a gate terminal corresponding to a control terminal electrically connected to the wiring W7, and a transistor M6 having a drain terminal electrically connected to the wiring W7 and a source terminal electrically connected to the wiring Wg. The constant voltage circuit 40 further includes a resistor R6 having one end electrically connected to the wiring W7 and the other end electrically connected to the wiring Wg via the transistor M6, a resistor R5 having one end electrically connected to the wiring W7 and the other end electrically connected to the wiring Wg without the transistor M6, a resistor R4 having one end electrically connected to the wiring W1 and the other end electrically connected to the wiring W9, and a constant voltage diode ZD having a cathode terminal electrically connected to the wiring W1 and an anode terminal electrically connected to the wiring W7.
[0024] The constant voltage circuit 40 configured as above receives an enable signal EN at H level from the control circuit 10, and outputs a constant voltage signal ING whose voltage value is the voltage vig.
[0025] Specifically, the enable signal EN of the H level output by the control circuit 10 propagates through the wiring W4 and is input to the gate terminal of the transistor M4 of the constant voltage circuit 40. This controls the drain terminal and source terminal of the transistor M4 to be conductive. Then, by controlling the drain terminal and source terminal of the transistor M4 to be conductive, a current path is formed between the wiring W1 and the wiring Wg via the constant voltage diode ZD, the resistor R5, and the transistor M4. At this time, the amount of current flowing through the current path is limited by the resistor R5. Then, a potential difference of the breakdown voltage vb of the constant voltage diode ZD is generated between the wiring W7 and the wiring W1 by the current flowing through the current path. Here, in the following description, the signal propagating through the wiring W7 is referred to as the voltage control signal VG, and the voltage value of the voltage control signal VG is referred to as the voltage vg.
[0026] The voltage control signal VG propagating through the wiring W7 is input to the gate terminal of the transistor M5. The voltage control signal VG controls the conduction state between the source terminal and the drain terminal of the transistor M5. When the voltage vg is smaller than the voltage value of the source terminal of the transistor M5 minus the voltage vth, which is the gate threshold voltage of the transistor M5, the source terminal and the drain terminal of the transistor M5 are controlled to be conductive. On the other hand, when the voltage vg is smaller than the voltage value of the source terminal of the transistor M5 minus the voltage vth, the source terminal and the drain terminal of the transistor M5 are controlled to be non-conductive. As a result, a signal having a voltage value obtained by adding the voltage vth to the voltage vg is generated on the wiring W9, which is the source terminal of the transistor M5. The constant voltage circuit 40 outputs the signal generated on the wiring W9 as a constant voltage signal ING, whose voltage value is the voltage vig. That is, the voltage vig is ideally a value obtained by adding the voltage vg, which is the voltage value of the voltage control signal VG propagating on the wiring W7, to the voltage vth, which is the gate threshold voltage of the transistor M5.
[0027] In such a constant voltage circuit 40, the breakdown voltage vb of the constant voltage diode ZD can be set based on the voltage vig, which is the voltage value of the constant voltage signal ING output by the constant voltage circuit 40, and the voltage vth, which is the gate threshold voltage of the transistor M5. For example, the breakdown voltage vb of the constant voltage diode ZD can be set to the difference voltage value between the voltage vi and the voltage value obtained by subtracting the voltage vth from the voltage value of the target voltage vig. However, the breakdown voltage vb of the constant voltage diode ZD is not limited to this.
[0028] Moreover, the H-level discharge control signal DIS output by the control circuit 10 propagates through the wiring W5 and is input to the gate terminal of the transistor M6 of the constant voltage circuit 40. This controls the drain terminal and source terminal of the transistor M6 to be conductive. Then, by controlling the drain terminal and source terminal of the transistor M6 to be conductive, the charge stored in the wiring W7 is discharged to the wiring Wg through which the ground signal GND propagates via the resistor R6 and the transistor M6. At this time, the resistance value of the resistor R6 is set to be smaller than the resistance value of the resistor R5. This allows the charge stored in the wiring W7 to be efficiently discharged by the operation of the transistor M6. That is, the resistance value of the resistor R6 of the constant voltage circuit 40 is smaller than the resistance value of the resistor R5, and this allows the charge stored in the wiring W7 to be efficiently discharged by the operation of the transistor M6.
[0029] When an unintended charge is stored in the wiring W7, the voltage vg, which is the voltage value of the voltage control signal VG supplied to the gate terminal of the transistor M5, rises. As a result, the voltage vig, which is the voltage value of the constant voltage signal ING output by the constant voltage circuit 40, also rises. That is, when an unintended charge is stored in the wiring W7, the output accuracy of the constant voltage circuit 40 decreases. In contrast, the power supply circuit 1 of the present embodiment has a transistor M6 that releases the charge stored in the wiring W7, thereby reducing the risk of an increase in the voltage vg, which is the voltage value of the voltage control signal VG supplied to the gate terminal of the transistor M5. As a result, the risk of a decrease in the accuracy of the constant voltage signal ING output by the constant voltage circuit 40 also decreases.
[0030] Here, the transistor M4 included in the constant voltage circuit 40 is not limited to an N-channel MOS transistor as long as the conduction state between the drain terminal and the source terminal can be controlled by the enable signal EN output by the control circuit 10. Similarly, the transistor M6 included in the constant voltage circuit 40 is not limited to an N-channel MOS transistor as long as the conduction state between the drain terminal and the source terminal can be controlled by the discharge control signal DIS output by the control circuit 10.
[0031] The driver circuit 20 includes a transistor M1 and a transistor M2. In the following description, the transistor M1 is assumed to be a P-channel MOS transistor, and the transistor M2 is assumed to be an N-channel MOS transistor.
[0032] The gate terminal of the transistor M1 is electrically connected to the wiring W3. The source terminal of the transistor M1 is electrically connected to the wiring W1. The drain terminal of the transistor M1 is electrically connected to the wiring W10. The gate terminal of the transistor M2 is electrically connected to the wiring W3. The drain terminal of the transistor M2 is electrically connected to the wiring W10. The source terminal of the transistor M2 is electrically connected to the wiring W9. That is, the driver circuit 20 includes a transistor M1 having a source terminal at one end electrically connected to the wiring W1 through which a voltage signal VIN propagates and a drain terminal at the other end electrically connected to the wiring W10 through which a drive signal DRV propagates, and a transistor M2 having a source terminal at one end electrically connected to the wiring W9 through which a constant voltage signal ING propagates and a drain terminal at the other end electrically connected to the wiring W10.
[0033] The driver circuit 20 configured as above generates and outputs a drive signal DRV whose voltage value changes between voltage vi and voltage vig based on the logic level of the pre-drive signal pDRV output by the control circuit 10.
[0034] Specifically, the pre-drive signal pDRV output by the control circuit 10 propagates through the wiring W3 and is input to the gate terminal of the transistor M1 and the gate terminal of the transistor M2. When the control circuit 10 outputs the pre-drive signal pDRV at the H level, the source terminal and the drain terminal of the transistor M1 are controlled to be non-conductive, and the drain terminal and the source terminal of the transistor M2 are controlled to be conductive. That is, the conductive state between the source terminal and the drain terminal of the transistor M1 and the conductive state between the source terminal and the drain terminal of the transistor M2 are exclusively controlled. As a result, the constant voltage signal ING, which is a signal propagating through the wiring W9 and has a voltage value of voltage vig, is supplied to the wiring W10.
[0035] On the other hand, when the control circuit 10 outputs a pre-drive signal pDRV of L level, the source terminal and the drain terminal of the transistor M1 are controlled to be conductive, and the drain terminal and the source terminal of the transistor M2 are controlled to be non-conductive. That is, the conductive state between the source terminal and the drain terminal of the transistor M1 and the conductive state between the source terminal and the drain terminal of the transistor M2 are exclusively controlled. As a result, the voltage signal VIN, which is a signal propagating through the wiring W1 and has a voltage value of voltage vi, is supplied to the wiring W10.
[0036] The driver circuit 20 outputs the signal generated on this wiring W10 as the drive signal DRV. That is, the driver circuit 20 generates a signal whose voltage value becomes voltage vig when an H-level pre-drive signal pDRV is input from the control circuit 10, and whose voltage value becomes voltage vi when an L-level pre-drive signal pDRV is input from the control circuit 10. The driver circuit 20 then outputs the signal generated on this wiring W10 as the drive signal DRV.
[0037] Here, the driver circuit 20 may include an inversion circuit that inverts the logic level of the pre-drive signal pDRV output by the control circuit 10, an impedance conversion circuit that performs impedance conversion, and the like. That is, the driver circuit 20 may output a drive signal DRV whose voltage value changes between voltage vi and voltage vig according to the logic level of the input pre-drive signal pDRV, and the relationship between the logic level of the pre-drive signal pDRV input to the driver circuit 20 and the voltage value of the drive signal DRV output by the driver circuit 20 is not limited to the above-mentioned example. In addition, in the driver circuit 20, the conductive state between the source terminal and drain terminal of the transistor M1 and the conductive state between the source terminal and drain terminal of the transistor M2 may be exclusively controlled. Therefore, the control circuit 10 may output a control signal that controls the conductive state between the source terminal and drain terminal of the transistor M1 and a control signal that controls the conductive state between the source terminal and drain terminal of the transistor M2 as separate signals.
[0038] The regulator circuit 30 includes a voltage conversion circuit 32 and a feedback circuit 34. The voltage conversion circuit 32 includes a transistor M3, a diode D, an inductor L, and a capacitor C. In the following description, the transistor M3 is assumed to be a P-channel MOS transistor.
[0039] The gate terminal of the transistor M3 is electrically connected to the wiring W10. The source terminal of the transistor M3 is electrically connected to the wiring W1. The drain terminal of the transistor M3 is electrically connected to the wiring W11. The wiring W11 is also electrically connected to the cathode terminal of the diode D and one end of the inductor L. The anode terminal of the diode D is electrically connected to the wiring Wg. The other end of the inductor L is electrically connected to the wiring W2. The wiring W2 is also electrically connected to one end of the capacitor C. The other end of the capacitor C is electrically connected to the wiring Wg.
[0040] The voltage conversion circuit 32 configured as above converts the voltage value of the voltage signal VIN, which has a voltage value of voltage vi and is propagated through the wiring W1, into a voltage signal VOUT, which is generated by converting the voltage value of the voltage signal VIN into a voltage vo. Then, the voltage conversion circuit 32 outputs the generated voltage signal VOUT from the power supply circuit 1 via the wiring W2.
[0041] Specifically, the drive signal DRV output by the driver circuit 20 is input to the gate terminal of the transistor M3. When the voltage value of the drive signal DRV input to the transistor M3 is voltage vi, the transistor M3 is controlled so that the source terminal and the drain terminal are not conductive. On the other hand, when the voltage value of the drive signal DRV input to the transistor M3 is voltage vig, the transistor M3 is controlled so that the source terminal and the drain terminal are conductive. That is, the transistor M3 switches whether or not to supply the voltage signal VIN to the wiring W11 depending on the voltage value of the input drive signal DRV.
[0042] Inductor L stores energy based on a voltage signal VIN supplied during a period when the source terminal and drain terminal of transistor M3 are controlled to be conductive, and releases the stored energy during a period when the source terminal and drain terminal of transistor M3 are controlled to be non-conductive. Diode D feeds back to wiring W11 the energy released by inductor L during a period when the source terminal and drain terminal of transistor M3 are controlled to be non-conductive. Capacitor C smoothes the energy output by inductor L, generating a voltage signal VOUT with a voltage value of vo on wiring W2.
[0043] As described above, the voltage conversion circuit 32 of this embodiment is a step-down circuit that outputs a voltage signal VOUT with a voltage value of vo lower than the voltage vi by driving the transistor M3, and constitutes a so-called buck converter circuit. The voltage conversion circuit 32 included in such a regulator circuit 30 includes a transistor M3 driven by a drive signal DRV, and outputs a voltage signal VOUT by driving the transistor M3. Here, the magnitude of the voltage vo, which is the voltage value of the voltage signal VOUT output by the voltage conversion circuit 32, is the duty ratio of the switching of the transistor M3, and is controlled by the duty ratio between the voltages vi and vig of the drive signal DRV, i.e., the duty ratio of the logical level of the pre-drive signal pDRV.
[0044] The voltage conversion circuit 32 is not limited to a buck converter circuit, but may be any of various switching regulators. The voltage conversion circuit 32 is not limited to a step-down circuit, but may be a step-up circuit or a step-up / step-down circuit.
[0045] The feedback circuit 34 includes a resistor R1 and a resistor R2. One end of the resistor R1 is electrically connected to the wiring W2. The other end of the resistor R1 is electrically connected to the wiring W12. One end of a resistor R2 is electrically connected to the line W12, and the other end of the resistor R2 is electrically connected to the wiring Wg.
[0046] The feedback circuit 34 configured as above divides the voltage signal VOUT, whose voltage value is the voltage vo, propagating through the wiring W2, by the resistors R1 and R2. The feedback circuit 34 then outputs a signal obtained by dividing the voltage signal VOUT, whose voltage value is the voltage vo, as the feedback voltage signal VFB. That is, the regulator circuit 30 has a feedback circuit 34 that detects the voltage vo, which is the voltage value of the voltage signal VOUT, and feeds back the detection result to the control circuit 10. The feedback voltage signal VFB output by the feedback circuit 34 propagates through the wiring W12 and is input to the control circuit 10. The control circuit 10 compares the voltage value of the input feedback voltage signal VFB with a predetermined target output voltage vot. Then, based on the comparison result, the on-duty of the pre-drive signal pDRV is controlled. That is, the control circuit 10 controls the driving of the transistors M1 and M2 based on the detection result of the voltage vo in the feedback circuit 34. This controls the voltage value of the voltage signal VOUT, that is, the magnitude of the voltage vo.
[0047] Here, the feedback circuit 34 is not limited to the above configuration as long as it can detect the voltage value of the voltage signal VOUT and output a signal according to the detection result as the feedback voltage signal VFB.
[0048] In addition, in the power supply circuit 1, the various electronic components constituting the driver circuit 20, the regulator circuit 30, and the constant voltage circuit 40 may be composed of discrete components. However, as shown in FIG. 2, among the various components constituting the power supply circuit 1, it is preferable that the control circuit 10, the driver circuit 20, the constant voltage circuit 40, and the transistor M3 are configured as a single semiconductor device 50.
[0049] That is, the power supply circuit 1 may have a semiconductor device 50, which may include a constant voltage circuit 40 that outputs a constant voltage signal ING of a voltage vig that is smaller than the voltage vi, a driver circuit 20 that receives the voltage signal VIN and the constant voltage signal ING and outputs a drive signal DRV whose voltage value changes between the voltage vi and the voltage vig, and a transistor M3 that is driven by the drive signal DRV. This allows the power supply circuit 1 to be miniaturized and the propagation paths of various signals to be shortened, thereby reducing the risk of the accuracy of various signals being reduced due to the influence of noise.
[0050] 1.2 Power supply circuit operation A specific example of the operation of the power supply circuit 1 configured as above will be described below.
[0051] 3, before time t10, a voltage signal VIN having a constant voltage value of voltage vi is input to the power supply circuit 1. At this time, the control circuit 10 outputs a pre-drive signal pDRV at an L level, an enable signal EN at an L level, and a discharge control signal DIS at an L level.
[0052] The enable signal EN at the L level is input to the transistor M4. This controls the drain terminal and source terminal of the transistor M4 to be non-conductive. In addition, the discharge control signal DIS at the L level is input to the transistor M6. This also controls the drain terminal and source terminal of the transistor M6 to be non-conductive. Therefore, a signal having a voltage value equal to the voltage vi, which is the voltage value of the voltage signal VIN, is input to the gate terminal of the transistor M5 as the voltage control signal VG. At this time, a signal having a voltage value equal to the voltage vi, which is the voltage value of the voltage signal VIN, is input to the source terminal of the transistor M5 via the resistor R4. Therefore, the source terminal and drain terminal of the transistor M5 are controlled to be non-conductive. As a result, before time t10, the constant voltage circuit 40 controls the voltage It outputs a constant voltage signal ING whose value is voltage vi.
[0053] The pre-drive signal pDRV of the L level is input to the gate terminal of the transistor M1 and the gate terminal of the transistor M2 of the driver circuit 20. Therefore, the source terminal and the drain terminal of the transistor M1 are controlled to be conductive, and the drain terminal and the source terminal of the transistor M2 are controlled to be non-conductive. As a result, the driver circuit 20 outputs the drive signal DRV whose voltage value is constant at the voltage vi.
[0054] The drive signal DRV, which is output by the driver circuit 20 and has a constant voltage value of voltage vi, is input to the gate terminal of the transistor M3 in the voltage conversion circuit 32 of the regulator circuit 30. At this time, a voltage signal VIN, which has a voltage value of voltage vi, is input to the source terminal of the transistor M3. Therefore, the source terminal and drain terminal of the transistor M3 are controlled to be non-conductive. Therefore, the voltage value of the drain terminal of the transistor M3, that is, the voltage values of the wiring W10 and wiring W2, are controlled to be constant at the ground potential gnd.
[0055] That is, before time t10, the power supply circuit 1 outputs the voltage signal VOUT of the ground potential gnd. In other words, before time t10, the power supply circuit 1 stops outputting.
[0056] At time t10, the control circuit 10 changes the logic level of the enable signal EN from the L level to the H level. As a result, the drain terminal and the source terminal of the transistor M4 are controlled to be conductive. At this time, the drain terminal and the source terminal of the transistor M6 are controlled to be non-conductive. Therefore, a voltage control signal VG having a voltage value vg, which is a voltage value obtained by subtracting the breakdown voltage vb of the constant-voltage diode ZD from the voltage vi, which is the voltage value of the voltage signal VIN, is input to the gate terminal of the transistor M5. As a result, a constant-voltage signal ING having a voltage value vig, which is a voltage value obtained by adding the voltage vg, which is the voltage value of the voltage control signal VG input to the gate terminal, to the voltage vth, which is the gate threshold voltage of the transistor M5, is generated at the source terminal of the transistor M5. That is, the constant-voltage circuit 40 starts outputting the constant-voltage signal ING having a voltage value vig at time t10.
[0057] At this time, the control circuit 10 continues to output the pre-drive signal pDRV at the L level. Therefore, in the driver circuit 20, the source terminal and the drain terminal of the transistor M1 are controlled to be conductive, and the drain terminal and the source terminal of the transistor M2 are controlled to be non-conductive. Therefore, at time t10, the driver circuit 20 continues to output the drive signal DRV whose voltage value is constant at the voltage vi.
[0058] The drive signal DRV, whose voltage value is constant at voltage vi and output by the driver circuit 20, is input to the gate terminal of the transistor M3. This maintains non-conduction between the source terminal and the drain terminal of the transistor M3. Therefore, the voltage values of the wiring W10 and wiring W2, which are the drain terminals of the transistor M3, maintain a constant state at the ground potential gnd. That is, at time t10, the power supply circuit 1 continues to output the voltage signal VOUT at the ground potential gnd. In other words, at time t10, the power supply circuit 1 continues to stop outputting.
[0059] At time t20 after the voltage value of the constant voltage signal ING output by the constant voltage circuit 40 has stabilized at the voltage vig, the control circuit 10 outputs a pre-drive signal pDRV whose logical level switches between H level and L level with a duty ratio according to the voltage value of the feedback voltage signal VFB. This exclusively controls the conductive state between the source terminal and drain terminal of the transistor M1 in the driver circuit 20 and the conductive state between the drain terminal and source terminal of the transistor M2.
[0060] Specifically, during a period when the control circuit 10 outputs a pre-drive signal pDRV of L level, the source terminal and drain terminal of the transistor M1 are controlled to be conductive, and the drain terminal and source terminal of the transistor M2 are controlled to be non-conductive. On the other hand, during a period when the control circuit 10 outputs a pre-drive signal pDRV of H level, the source terminal and drain terminal of the transistor M1 are controlled to be non-conductive, and the drain terminal and source terminal of the transistor M2 are controlled to be conductive. At this time, a voltage signal VIN having a voltage value of voltage vi is input to the source terminal of the transistor M1, and a constant voltage signal ING having a voltage value of voltage vig is input to the source terminal of the transistor M2. Therefore, a drive signal DRV whose voltage value changes between voltage vi and voltage vig according to the logical level of the pre-drive signal pDRV output by the control circuit 10 is generated in the wiring W10 that electrically connects the drain terminal of the transistor M1 and the drain terminal of the transistor M2. The driver circuit 20 then outputs to the regulator circuit 30 a drive signal DRV whose voltage value changes between voltage vi and voltage vig.
[0061] The transistor M3 in the voltage conversion circuit 32 of the regulator circuit 30 is controlled so that the source terminal and the drain terminal are non-conductive during a period in which the drive signal DRV having a voltage value of voltage vi is input, and is controlled so that the source terminal and the drain terminal are conductive during a period in which the drive signal DRV having a voltage value of voltage vig is input. That is, the conductive state of the transistor M3 is controlled according to the logic level of the pre-drive signal pDRV. Then, the signal generated at the drain terminal of the transistor M3 is smoothed by the inductor L and the capacitor C in the voltage conversion circuit 32 of the regulator circuit 30. The regulator circuit 30 outputs the signal smoothed by the inductor L and the capacitor C as a voltage signal VOUT.
[0062] At this time, the feedback circuit 34 of the regulator circuit 30 detects the voltage value of the voltage signal VOUT, and outputs a feedback voltage signal VFB corresponding to the detected voltage value to the control circuit 10. The control circuit 10 controls the duty ratio of the pre-drive signal pDRV so that the voltage value of the input feedback voltage signal VFB becomes a predetermined target feedback voltage vft. As a result, the voltage vo, which is the voltage value of the voltage signal VOUT output by the regulator circuit 30, is controlled to become a predetermined target output voltage vot output by the power supply circuit 1.
[0063] Then, at time t30, the voltage vo, which is the voltage value of the voltage signal VOUT output by the regulator circuit 30, becomes the target output voltage vot, and the operation of the power supply circuit 1 becomes stable.
[0064] Furthermore, at time t20, the control circuit 10 starts outputting a discharge control signal DIS whose logic level switches between H level and L level in synchronization with the switching of the logic level of the pre-drive signal pDRV.
[0065] Here, an example of the relationship between the pre-drive signal pDRV output by the control circuit 10 and the discharge control signal DIS will be described. FIG. 4 is a diagram showing an example of the relationship between the logical level of the pre-drive signal pDRV and the logical level of the discharge control signal DIS. Here, in the following description, a period in which the logical level of the pre-drive signal pDRV output by the control circuit 10 changes is referred to as a switching period SWC. FIG. 4 illustrates an arbitrary switching period SWC[n] (n is an arbitrary integer) among the switching periods SWC, a switching period SWC[n-1] as the switching period SWC preceding the switching period SWC[n], and a switching period SWC[n+1] as the switching period SWC following the switching period SWC[n]. In the following description, the timing of the start of the switching period SWC is referred to as a start timing ts, and the timing of the end of the switching period SWC is referred to as a start timing ts. The timing at which the logic level of the pre-drive signal pDRV changes in the switching period SWC is referred to as end timing te, and the timing at which the logic level of the pre-drive signal pDRV changes in the switching period SWC is referred to as change timing tc. Note that the end timing te of the switching period SWC corresponds to the start timing ts of the next switching period SWC.
[0066] The control circuit 10 also switches the logical level of the pre-drive signal pDRV and the logical levels of various signals including the discharge control signal DIS in synchronization with the rising or falling edge of the clock signal CLK. Here, the clock signal CLK that defines the operation timing of the control circuit 10 may be generated by an internal clock circuit (not shown) provided inside the control circuit 10, or may be generated by an external clock circuit (not shown) provided outside the control circuit 10.
[0067] The control circuit 10 determines the duty ratio of the pre-drive signal pDRV to be output in a switching cycle SWC[n-1] based on a feedback voltage signal VFB input from the feedback circuit 34. Specifically, when the control circuit 10 controls the duty ratio of the pre-drive signal pDRV by PWM (Pulse Width Modulation), the control circuit 10 determines the duty ratio of the pre-drive signal pDRV by setting the period from the start timing ts to the end timing te to a constant and defining the change timing tc in the switching cycle SWC[n] based on the feedback voltage signal VFB input from the feedback circuit 34 in the switching cycle SWC[n-1]. Furthermore, when the control circuit 10 controls the duty ratio of the pre-drive signal pDRV using PDM (Pulse-Density Modulation), the control circuit 10 keeps the period from the start timing ts to the change timing tc constant, and determines the duty ratio of the pre-drive signal pDRV by specifying the end timing te in the switching period SWC[n] based on the feedback voltage signal VFB input from the feedback circuit 34 in the switching period SWC[n-1].
[0068] That is, the control circuit 10 specifies the duty ratio of the pre-drive signal pDRV, that is, the end timing te and the change timing tc, based on the feedback voltage signal VFB input from the feedback circuit 34. Here, the control circuit 10 is not limited to the above-mentioned PWM control and PDM control as long as it can specify the duty ratio of the pre-drive signal pDRV, specifically, the end timing te and the change timing tc in the switching period SWC, based on the feedback voltage signal VFB input from the feedback circuit 34.
[0069] At this time, the control circuit 10 changes the logic level of the discharge control signal DIS from L level to H level immediately before the logic level of the pre-drive signal pDRV is changed, and changes the logic level of the discharge control signal DIS from H level to L level after the logic level of the pre-drive signal pDRV is changed. That is, the control circuit 10 changes the logic level of the pre-drive signal pDRV during the period in which the H-level discharge control signal DIS is output.
[0070] Specifically, the control circuit 10 determines the end timing te and the change timing tc based on the feedback voltage signal VFB input from the feedback circuit 34. Then, the control circuit 10 sets the logic level of the discharge control signal DIS to H level a period Δt earlier than the determined end timing te, and sets the logic level of the discharge control signal DIS to L level after the period Δt has elapsed from the determined end timing te. Similarly, the control circuit 10 sets the logic level of the discharge control signal DIS to H level a period Δt earlier than the determined change timing tc, and sets the logic level of the discharge control signal DIS to L level after the period Δt has elapsed from the determined change timing tc.
[0071] That is, the control circuit 10 controls the driving of the transistors M1, M2, and M6 based on the detection result of the feedback circuit 34. Specifically, during a period in which the control circuit 10 controls the drain terminal and the source terminal of the transistor M6 to be conductive, In the period in which the source terminal and drain terminal of the transistor M1 are controlled from conductive to non-conductive, the drain terminal and source terminal of the transistor M2 are controlled from non-conductive to conductive, and the drain terminal and source terminal of the transistor M6 are controlled to be non-conductive, the source terminal and drain terminal of the transistor M1 are not controlled from conductive to non-conductive, and the drain terminal and source terminal of the transistor M2 are not controlled from non-conductive to conductive. That is, in the period in which the conduction state between the drain terminals and source terminals of the transistors M1 and M2 changes, the drain terminal and source terminal of the transistor M6 are controlled to be conductive. In other words, at the timing when the logic level of the pre-drive signal pDRV output by the control circuit 10 changes, the control circuit 10 outputs a discharge control signal DIS of H level.
[0072] Here, the period Δt that defines the timing at which the control circuit 10 changes the logic level of the discharge control signal DIS can be determined based on, for example, the clock signal CLK.
[0073] In the power supply circuit 1 configured as above, the driving of the transistor M3 of the regulator circuit 30 that outputs the voltage signal VOUT is controlled by a driving signal DRV that is generated by exclusively controlling the conductive state between the source terminal and the drain terminal of the transistor M1 and the conductive state between the source terminal and the drain terminal of the transistor M2. However, in the power supply circuit 1 configured as above, a through current is generated between the source terminal and the drain terminal of the transistor M1 and between the source terminal and the drain terminal of the transistor M2 at the timing when the source terminal and the drain terminal of the transistor M1 are controlled from conductive to non-conductive and the source terminal and the drain terminal of the transistor M2 are controlled from non-conductive to conductive, and at the timing when the source terminal and the drain terminal of the transistor M1 are controlled from non-conductive to conductive and the source terminal and the drain terminal of the transistor M2 are controlled from conductive to non-conductive.
[0074] Such a through current propagates through the wiring W9 and flows between the source terminal and the drain terminal of the transistor M5. At this time, the voltage value between the source terminal and the drain terminal of the transistor M5 rises due to the through current and the on-resistance of the transistor M5. Then, when the voltage value between the source terminal and the drain terminal of the transistor M5 rises, the voltage vg, which is the voltage value of the gate terminal of the transistor M5 and the voltage value of the voltage control signal VG, also rises due to the capacitive coupling of the transistor M5. As a result, the voltage value of the constant voltage signal ING output by the constant voltage circuit 40 rises. Furthermore, if the voltage value of the constant voltage signal ING rises with the rise in the voltage vg, there is a possibility that a vicious circle will occur in which the voltage vg further rises and the voltage value of the constant voltage signal ING further rises.
[0075] Such an increase in the voltage value of the constant voltage signal ING reduces the potential difference between the gate terminal and the source terminal of the transistor M3, and increases the on-resistance of the transistor M3, which in turn reduces the circuit efficiency of the power supply circuit 1 and the semiconductor device 50, increases the power consumption of the power supply circuit 1 and the semiconductor device 50, and may also reduce the waveform accuracy of the voltage signal VOUT output by the power supply circuit 1.
[0076] In response to this problem, the power supply circuit 1 of the present embodiment has a constant voltage circuit 40 having a transistor M6 whose drain terminal is electrically connected to the wiring W7 to which the gate terminal of the transistor M5 is electrically connected, and whose source terminal is electrically connected to the wiring Wg. This allows the transistor M6 to discharge the charge stored in the gate terminal of the transistor M5. As a result, the risk of the voltage vg, which is the voltage value of the voltage control signal VG, increasing due to the through current generated in the transistors M1 and M2 is reduced, and the risk of the voltage value of the constant voltage signal ING output by the constant voltage circuit 40 increasing is reduced.
[0077] Here, the effect of the transistor M6 of the power supply circuit 1 of this embodiment will be described with reference to Fig. 5 and Fig. 6. Fig. 5 is a diagram showing a simulation result of the voltage value of the constant voltage signal ING and the voltage value of the voltage control signal VG when the drain terminal and the source terminal of the transistor M6 are made non-conductive when a through current occurs in the transistors M1 and M2. Fig. 6 is a diagram showing a simulation result of the voltage value of the constant voltage signal ING and the voltage control signal VG when the drain terminal and the source terminal of the transistor M6 are made conductive when a through current occurs in the transistors M1 and M2. That is, Fig. 5 corresponds to the simulation result of the voltage value of the constant voltage signal ING and the voltage value of the voltage control signal VG when the power supply circuit 1 does not have the transistor M6.
[0078] Here, the through current generated in the transistor M1 and the transistor M2 is the same in the case where the drain terminal and the source terminal of the transistor M1 are controlled from non-conductive to conductive and the drain terminal and the source terminal of the transistor M2 are controlled from conductive to non-conductive, and in the case where the drain terminal and the source terminal of the transistor M1 are controlled from conductive to non-conductive and the drain terminal and the source terminal of the transistor M2 are controlled from non-conductive to conductive. Therefore, in Fig. 5 and Fig. 6, the case where the drain terminal and the source terminal of the transistor M1 are controlled from non-conductive to conductive and the drain terminal and the source terminal of the transistor M2 are controlled from conductive to non-conductive are illustrated and described, and the case where the drain terminal and the source terminal of the transistor M1 are controlled from conductive to non-conductive and the drain terminal and the source terminal of the transistor M2 are controlled from conductive to non-conductive are omitted.
[0079] As shown in Figure 5, when the drain terminal and source terminal of transistor M1 are controlled from non-conductive to conductive and the drain terminal and source terminal of transistor M2 are controlled from conductive to non-conductive, and the logical level of the pre-drive signal pDRV is switched from H level to L level, if the drain terminal and source terminal of transistor M6 are controlled to be non-conductive, the voltage value of the voltage control signal VG rises by approximately 0.7 V and the voltage value of the constant voltage signal ING rises by approximately 1.0 V, and this rise in voltage value continues for approximately 15 ns to 20 ns.
[0080] 6, when the drain terminal and source terminal of the transistor M1 are controlled from non-conductive to conductive and the drain terminal and source terminal of the transistor M2 are controlled from conductive to non-conductive, and when the logic level of the pre-drive signal pDRV is switched from H level to L level, if the drain terminal and source terminal of the transistor M6 are controlled to be conductive, the voltage value of the voltage control signal VG does not rise, and the rise in the voltage value of the constant voltage signal ING can be reduced to about 0.5 V or less. Furthermore, the period during which the voltage value of the constant voltage signal ING continues to rise is also shortened to about 10 nsec.
[0081] This reduces the risk of an increase in the voltage value of the voltage control signal VG input to the gate terminal of the transistor M5 of the constant voltage circuit 40 in the power supply circuit 1 of this embodiment. As a result, the risk of an increase in the power consumption of the power supply circuit 1 and the semiconductor device 50 is reduced, and the risk of a decrease in the circuit efficiency of the power supply circuit 1 and the semiconductor device 50 is reduced, as well as a decrease in the waveform accuracy of the voltage signal VOUT output by the power supply circuit 1.
[0082] Here, the voltage signal VIN is an example of a first voltage signal, the voltage signal VOUT is an example of a second voltage signal, and the constant voltage signal ING is an example of a third voltage signal. The voltage vi is an example of a first voltage value, the voltage vo is an example of a second voltage value, and the voltage vig is an example of a third voltage value. The transistor M3 is an example of a first switch element, and the transistor M1 is an example of a second switch element, transistor M2 is an example of a third switch element, transistor M5 is an example of a fourth switch element, and transistor M6 is an example of a fifth switch element. Furthermore, resistor R6 is an example of a first resistor element, resistor R5 is an example of a second resistor element, and resistor R4 is an example of a third resistor element. Furthermore, feedback circuit 34 is an example of a detection circuit. Furthermore, wiring W1 is an example of a first wiring, wiring W10 is an example of a second wiring, wiring W9 is an example of a third wiring, wiring Wg is an example of a fourth wiring, and wiring W7 is an example of a fifth wiring.
[0083] 1.3 Effects In the power supply circuit 1 configured as above, the constant voltage circuit 40 includes a transistor M5 having a source terminal electrically connected to the wiring W9, a drain terminal electrically connected to the wiring Wg of the ground potential gnd functioning as a reference potential, and a gate terminal corresponding to a control terminal electrically connected to the wiring W7, and a transistor M6 having a drain terminal electrically connected to the wiring W7 and a source terminal electrically connected to the wiring Wg. Even if the voltage vg, which is the voltage value of the voltage control signal VG input to the gate terminal of the transistor M5, rises due to the through current of the transistors M1 and M2, the charge stored in the gate terminal of the transistor M5 can be discharged via the transistor M6. This reduces the risk that the voltage vg, which is the voltage value of the voltage control signal VG, will rise due to the capacitive coupling of the transistor M5, and reduces the risk that the voltage value of the constant voltage signal ING will rise. As a result, the risk that the potential difference between the gate terminal and source terminal of the transistor M3 will be reduced. Therefore, the risk of an increase in power consumption in the power supply circuit 1 and the semiconductor device 50 is reduced, the risk of a decrease in the circuit efficiency of the power supply circuit 1 and the semiconductor device 50 is reduced, and the risk of a decrease in the waveform accuracy of the voltage signal VOUT output by the power supply circuit 1 is also reduced.
[0084] In the power supply circuit 1 of this embodiment, the control circuit 10 controls the source terminal and drain terminal of the transistor M1 from conductive to non-conductive, and controls the source terminal and drain terminal of the transistor M2 from non-conductive to conductive, during a period when the drain terminal and source terminal of the transistor M6 are conductive. That is, the control circuit 10 controls the drain terminal and source terminal of the transistor M6 to conductive during a period when a through current occurs in the transistors M1 and M2, which are likely to accumulate charge in the gate terminal of the transistor M6. This further reduces the risk of charge accumulating in the gate terminal of the transistor M6.
[0085] Furthermore, in the power supply circuit 1 of this embodiment, during the period when the control circuit 10 makes the drain terminal and source terminal of the transistor M6 non-conductive, the control circuit 10 does not control the source terminal and drain terminal of the transistor M1 from conductive to non-conductive, and does not control the source terminal and drain terminal of the transistor M2 from non-conductive to conductive. That is, the control circuit 10 controls the drain terminal and source terminal of the transistor M6 to be non-conductive only during the period when a through current occurs in the transistors M1 and M2, which are likely to accumulate charge in the gate terminal of the transistor M6. This further reduces the risk of an increase in power consumption in the power supply circuit 1 and the semiconductor device 50.
[0086] 1.4 Variations In the power supply circuit 1 configured as above, the constant voltage circuit 40 may have a capacitive element having one end electrically connected to the wiring W7 and the other end electrically connected to the wiring Wg. As shown in Figures 5 and 6, the rise in the voltage value of the voltage control signal VG caused by the occurrence of a shoot-through current in the transistors M1 and M2 occurs in a very short period of time. The constant voltage circuit 40 has a capacitive element having one end electrically connected to the wiring W7 and the other end electrically connected to the wiring Wg, and the capacitive element reduces the voltage fluctuation of the voltage control signal VG that occurs in a short period of time.
[0087] This further reduces the risk of an increase in power consumption in the power supply circuit 1 and the semiconductor device 50, further reduces the risk of a decrease in the circuit efficiency of the power supply circuit 1 and the semiconductor device 50, and further reduces the risk of a decrease in the waveform accuracy of the voltage signal VOUT output by the power supply circuit 1.
[0088] 2.Electronic equipment Next, a liquid ejection device 100 will be described as an example of an electronic device including the above-mentioned power supply circuit 1. Fig. 7 is a diagram showing an example of the structure of the liquid ejection device 100. As shown in Fig. 7, the liquid ejection device 100 includes a moving body 102 and a moving unit 103 that moves the moving body 102 back and forth along a scanning axis.
[0089] The moving unit 103 has a carriage motor 131 which serves as a drive source for the reciprocating movement of the moving body 102 along the scanning axis, a carriage guide shaft 132 which has both ends fixed, and a timing belt 133 which extends substantially parallel to the carriage guide shaft 132 and is driven by the carriage motor 131. The moving body 102 also has a print head 120 which ejects ink, and a carriage 124 on which the print head 120 is mounted.
[0090] The carriage 124 is supported by a carriage guide shaft 132 so as to be freely movable back and forth, and is fixed to a part of a timing belt 133. The carriage 124 moves back and forth while being guided by the carriage guide shaft 132 as the timing belt 133 runs forward and backward by a carriage motor 131. In addition, the carriage 124 is mounted with a plurality of ink cartridges 126 that store ink to be ejected onto the medium P.
[0091] The print head 120 is located in a portion of the moving body 102 that faces the medium P. Nozzles that eject ink supplied from an ink cartridge 126 are provided on the surface of the print head 120 that faces the medium P. A cable 190 is also electrically connected to the print head 120. Various control signals for controlling the operation of the print head 120 are input to the print head 120 via the cable 190. As such a cable 190, a flexible flat cable that can slide in accordance with the reciprocating movement of the moving body 102 can be used.
[0092] The liquid ejection device 100 also includes a transport unit 104 that transports the medium P. The transport unit 104 has a platen 140 that supports the medium P, a transport motor 141 that functions as a drive source for transporting the medium P, and transport rollers 142 that transport the medium P by rotating when driven by the transport motor 141. The transport unit 104 transports the medium P in a predetermined transport direction when the transport motor 141 is driven.
[0093] In the liquid ejection device 100 configured as described above, the medium P is transported in a predetermined transport direction under the control of the transport unit 104, and the carriage 124 carrying the print head 120 moves back and forth along the scanning axis under the control of the moving unit 103. The print head 120 mounted on the carriage 124 ejects ink in synchronization with the timing at which the medium P is transported and the timing at which the moving body 102 moves back and forth. As a result, the ink ejected by the print head 120 lands at a desired position on the medium P, forming a desired image or characters on the medium P.
[0094] Next, the functional configuration of the liquid ejection device 100 will be described. Fig. 8 is a diagram showing an example of the functional configuration of the liquid ejection device 100. As shown in Fig. 8, the liquid ejection device 100 includes a control unit 110, a print head 120, a moving unit 103, and a transport unit 104. The control unit 110 and the print head 120 are electrically connected to each other via the cable 190 described above. As a result, various signals output by the control unit 110 are input to the print head 120.
[0095] The control unit 110 includes a control circuit 111 , an AC / DC conversion circuit 112 , a DC / DC conversion circuit 113 , and a drive circuit 150 .
[0096] A commercial AC voltage VAC is input to the AC / DC conversion circuit 112 from the outside of the liquid ejection device 100. The AC / DC conversion circuit 112 generates a voltage signal VH, which is a constant DC voltage with a voltage value of, for example, 42 V, from the input commercial AC voltage VAC, and outputs the generated voltage signal. The voltage signal VH output by the AC / DC conversion circuit 112 is input to the DC / DC conversion circuit 113. The DC / DC conversion circuit 113 converts the input voltage signal VH of 42 V to a voltage signal VDD, which is a DC voltage of, for example, 5 V or 3.3 V, and outputs the converted voltage signal. That is, the AC / DC conversion circuit 112 and the DC / DC conversion circuit 113 generate DC voltages of various voltage values used in the liquid ejection device 100 from the commercial AC voltage VAC input to the liquid ejection device 100. The voltage signal VH output by the AC / DC conversion circuit 112 and the voltage signal VDD output by the DC / DC conversion circuit 113 are used as a power supply voltage and a control voltage for each component of the liquid ejection device 100. Here, the DC / DC conversion circuit 113 corresponds to the above-mentioned power supply circuit 1, the voltage signal VH input to the DC / DC conversion circuit 113 corresponds to the above-mentioned voltage signal VIN, and the voltage signal VDD output by the DC / DC conversion circuit 113 corresponds to the above-mentioned voltage signal VOUT.
[0097] Image data is input to the control circuit 111 from an external device (not shown) provided outside the liquid ejection device 100, such as a host computer. The control circuit 111 performs various types of image processing and the like on the input image data to generate various control signals for controlling each part of the liquid ejection device 100, and outputs the signals to the corresponding components.
[0098] Specifically, the control circuit 111 generates a control signal Ctrl1 for controlling the reciprocating movement of the movable body 102, and outputs it to a carriage motor 131 included in the moving unit 103. This drives the carriage motor 131 to control the reciprocating movement of the movable body 102 along the scanning direction. The control circuit 111 also generates a control signal Ctrl2 for controlling the transport of the medium P, and outputs it to a transport motor 141 included in the transport unit 104. This drives the transport motor 141 to control the transport of the medium P along the transport direction.
[0099] In addition, the control circuit 111 outputs a basic drive signal dA, which is a digital signal, to the drive circuit 150. The drive circuit 150 converts the input digital basic drive signal dA into an analog signal, and then generates an ejection drive signal COM by performing class D amplification on the analog signal and outputs it to the print head 120.
[0100] In addition, the control circuit 111 generates ejection control signals DATA for controlling the ejection of ink from the print head 120 based on the input image data, and outputs the signals to the print head 120 .
[0101] The print head 120 includes a drive signal selection circuit 121 and a plurality of ejection units 600 .
[0102] The drive signal selection circuit 121 receives the ejection control signal DATA output by the control circuit 111 and the ejection drive signal COM output by the drive circuit 150. The drive signal selection circuit 121 generates ejection drive signals VDP corresponding to each of the multiple ejection sections 600 by selecting or not selecting a signal waveform included in the ejection drive signal COM based on the input ejection control signal DATA. The drive signal selection circuit 121 then generates the ejection drive signal VDP corresponding to each of the multiple ejection sections 600. P is output to one end of the piezoelectric element 60 of the corresponding ejection portion 600.
[0103] At this time, a reference voltage signal VBS is input to the other end of the piezoelectric element 60 of each of the multiple ejection units 600. The reference voltage signal VBS is a DC voltage signal with a constant voltage value, for example, ground potential, 5.5 V, 6 V, etc., and functions as a reference for driving the piezoelectric element 60. The piezoelectric element 60 of each of the multiple ejection units 600 is driven in response to the potential difference between the ejection drive signal VDP supplied to one end and the reference voltage signal VBS supplied to the other end. Then, an amount of ink corresponding to the drive of the piezoelectric element 60 is ejected from the ejection unit 600.
[0104] The liquid ejection device 100, which is an example of an electronic device configured as described above, has a DC / DC conversion circuit 113 equivalent to the power supply circuit 1 described above, which makes it possible to reduce the power consumption of the liquid ejection device 100 and to improve the signal accuracy of the voltage signal VDD output by the DC / DC conversion circuit 113.
[0105] The electronic device is not limited to the liquid ejection device 100, but may be any electronic device that includes a circuit for converting a voltage value. Examples of such electronic devices include notebook computers, electronic book players, mobile phones, cordless phone sub-units, fax machines, copy machines, LCD televisions, handheld cleaners, portable CDs, radios, lighting equipment, toys, game devices, cameras, and medical devices.
[0106] Although the embodiments and modifications have been described above, the present invention is not limited to these embodiments, and can be embodied in various forms without departing from the spirit of the present invention. For example, the above embodiments can be appropriately combined.
[0107] The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations with the same functions, methods and results, or configurations with the same purpose and effect). The present invention also includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. The present invention also includes configurations that achieve the same effects as the configurations described in the embodiments or that can achieve the same purpose. The present invention also includes configurations in which publicly known technology is added to the configurations described in the embodiments.
[0108] The following can be derived from the above-described embodiment.
[0109] One aspect of the power supply circuit is A power supply circuit that converts a first voltage signal having a first voltage value into a second voltage signal having a second voltage value and outputs the second voltage signal, a constant voltage circuit that outputs a third voltage signal having a third voltage value smaller than the first voltage value; a driver circuit to which the first voltage signal and the third voltage signal are input and which outputs a drive signal whose voltage value changes between the first voltage value and the third voltage value; a regulator circuit including a first switch element that is driven by the drive signal, the regulator circuit outputting the second voltage signal by driving the first switch element; Equipped with The driver circuit includes: a second switch element, one end of which is electrically connected to a first wiring through which the first voltage signal propagates and the other end of which is electrically connected to a second wiring through which the drive signal propagates; a third switch element, one end of which is electrically connected to a third wiring through which the third voltage signal propagates and the other end of which is electrically connected to the second wiring; having A conductive state between one end and the other end of the second switch element and a conductive state between one end and the other end of the third switch element The conduction state with the end is exclusively controlled, The constant voltage circuit includes: a fourth switch element having one end electrically connected to the third wiring, the other end electrically connected to a fourth wiring of a reference potential, and a control terminal electrically connected to a fifth wiring; a fifth switch element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring; has.
[0110] According to this power supply circuit, by having a fifth switch element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring, it is possible to release the charge stored in the fifth wiring. Therefore, the stability of the operation of the fourth switch element having a control terminal electrically connected to the fifth wiring is improved. And, by improving the stability of the operation of the fourth switch element having a control terminal electrically connected to the fifth wiring, the reliability of the third voltage signal electrically connected to the fourth switch element is improved, and the reliability of the drive signal generated based on the third voltage signal is improved. As a result, the stability of the operation of the first switch element driven by the drive signal is improved, and the reliability of the second voltage signal output by driving the first switch element is improved.
[0111] Furthermore, according to this power supply circuit, by stabilizing the voltage of the fifth wiring, the risk of the second voltage signal being indirectly output becoming unstable can be reduced, thereby reducing the risk of the voltage value of the second voltage signal decreasing as a result of the voltage stabilization of the fifth wiring.
[0112] In one aspect of the power supply circuit, The constant voltage circuit includes: a first resistor element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring via the fifth switch element; a second resistor element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring without passing through the fifth switch element; having The first resistor element may have a resistance value smaller than a resistance value of the second resistor element.
[0113] According to this power supply circuit, the resistance value of the first resistor element used to release the charge of the fifth wire is reduced, so that the charge of the fifth wire can be released efficiently.
[0114] In one aspect of the power supply circuit, The constant voltage circuit includes: a third resistor element having one end electrically connected to the first wiring and the other end electrically connected to the third wiring; a constant voltage diode having a cathode terminal electrically connected to the first wiring and an anode terminal electrically connected to the fifth wiring; may have the following structure:
[0115] In one aspect of the power supply circuit, The constant voltage circuit may include a capacitance element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring.
[0116] According to this power supply circuit, by having a capacitance element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring, it is possible to further stabilize the voltage of the fifth wiring.
[0117] In one aspect of the power supply circuit, The driving of the second switch element, the third switch element, and the fifth switch element is controlled. A control circuit for controlling the the regulator circuit has a detection circuit that detects the second voltage value; The control circuit may control driving of the second switch element, the third switch element, and the fifth switch element based on a detection result of the detection circuit.
[0118] According to this power supply circuit, the charge stored in the fifth wiring can be released in synchronization with the operation of the driver circuit including the second switch element and the third switch element, and the regulator circuit operated by the drive signal output by the driver circuit. That is, the charge in the fifth wiring can be released at an appropriate timing. This reduces the risk of the voltage value of the second voltage signal decreasing, and increases the reliability of the second voltage signal.
[0119] In one aspect of the power supply circuit, The control circuit includes: During a period in which one end and the other end of the fifth switch element are conductive, one end and the other end of the second switch element may be controlled from conductive to non-conductive, and one end and the other end of the third switch element may be controlled from non-conductive to conductive.
[0120] According to this power supply circuit, the fifth switch element releases the charge stored in the fifth wire at the timing of driving the second and third switch elements, which operate exclusively, thereby reducing the risk of charge being stored in the fifth wire due to the influence of the shoot-through current generated in the second and third switch elements, thereby further improving the reliability of the second voltage signal.
[0121] In one aspect of the power supply circuit, The control circuit includes: During a period in which one end and the other end of the fifth switch element are non-conductive, one end and the other end of the second switch element do not have to be controlled from conductive to non-conductive, and one end and the other end of the third switch element do not have to be controlled from non-conductive to conductive.
[0122] According to this power supply circuit, During a period in which no through current is generated in the second switch element and the third switch element, The fifth switch element does not release the charge stored in the fifth wiring, The power consumption of the power supply circuit can be reduced.
[0123] One aspect of the electronic device is The power supply circuit according to the above aspect is provided.
[0124] According to this electronic device, By including the above-described embodiment of the power supply circuit, a highly reliable voltage signal can be used, and the stability of the operation of the electronic device is improved. [Explanation of symbols]
[0125] 1...power supply circuit, 5...switching element, 6...internal circuit, 10...control circuit, 20...driver circuit, 30...regulator circuit, 32...voltage conversion circuit, 34...feedback circuit, 40...constant voltage circuit, 50...semiconductor device, 60...piezoelectric element, 100...liquid ejection device, 102...moving body, 103...moving unit, 104...transport unit, 110...control unit, 111...control circuit, 112...AC / DC conversion circuit, 113...DC / DC conversion circuit, 120...print head, 121...drive signal selection circuit, 124...carriage, 126...ink cartridge, 131...carriage motor, 132...carriage guide shaft, 133...timing belt, 140...platen, 141...transport motor, 142...transport roller, 150...drive circuit, 190...cable, 600...ejection section, C...capacitor, D...diode, L...inductor M1~M6: transistors, P: medium, R1~R6: resistors, W1~W12: wiring, ZD: constant voltage diode
Claims
1. A power supply circuit that converts a first voltage signal having a first voltage value into a second voltage signal having a second voltage value and outputs the second voltage signal, a constant voltage circuit that outputs a third voltage signal having a third voltage value smaller than the first voltage value; a driver circuit to which the first voltage signal and the third voltage signal are input and which outputs a drive signal whose voltage value changes between the first voltage value and the third voltage value; a regulator circuit including a first switch element that is driven by the drive signal, the regulator circuit outputting the second voltage signal by driving the first switch element; Equipped with The driver circuit includes: a second switch element, one end of which is electrically connected to a first wiring through which the first voltage signal propagates and the other end of which is electrically connected to a second wiring through which the drive signal propagates; a third switch element, one end of which is electrically connected to a third wiring through which the third voltage signal propagates and the other end of which is electrically connected to the second wiring; having a conductive state between one end and the other end of the second switch element and a conductive state between one end and the other end of the third switch element are exclusively controlled, The constant voltage circuit includes: a fourth switch element having one end electrically connected to the third wiring, the other end electrically connected to a fourth wiring of a reference potential, and a control terminal electrically connected to a fifth wiring; a fifth switch element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring; having A power supply circuit comprising:
2. The constant voltage circuit includes: a first resistor element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring via the fifth switch element; a second resistor element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring without passing through the fifth switch element; having The resistance value of the first resistor element is smaller than the resistance value of the second resistor element.
2. The power supply circuit according to claim 1.
3. The constant voltage circuit includes: a third resistor element having one end electrically connected to the first wiring and the other end electrically connected to the third wiring; a constant voltage diode having a cathode terminal electrically connected to the first wiring and an anode terminal electrically connected to the fifth wiring; having 2. The power supply circuit according to claim 1.
4. the constant voltage circuit has a capacitance element having one end electrically connected to the fifth wiring and the other end electrically connected to the fourth wiring; 2. The power supply circuit according to claim 1.
5. a control circuit that controls driving of the second switch element, the third switch element, and the fifth switch element; the regulator circuit has a detection circuit that detects the second voltage value; The control circuit controls driving of the second switch element, the third switch element, and the fifth switch element based on a detection result of the detection circuit.
2. The power supply circuit according to claim 1.
6. The control circuit includes: during a period in which one end and the other end of the fifth switch element are conductive, one end and the other end of the second switch element are controlled from conductive to non-conductive, and one end and the other end of the third switch element are controlled from non-conductive to conductive.
6. The power supply circuit according to claim 5.
7. The control circuit includes: during a period in which one end and the other end of the fifth switch element are non-conductive, one end and the other end of the second switch element are not controlled from conductive to non-conductive, and one end and the other end of the third switch element are not controlled from non-conductive to conductive; 7. The power supply circuit according to claim 6.
8. A power supply circuit comprising:
1. An electronic device comprising:
Citation Information
Patent Citations
Charge extraction circuit
JP2014036249A