In-situ strain compensation circuit

Abstract

To provide a highly-precise voltage reference circuit.SOLUTION: A circuit (70) includes a voltage reference circuit (72) that includes an output terminal (74). The voltage reference circuit (72) is configured to generate an output voltage having a first transfer function of a voltage with respect to strain at the output terminal (74). The circuit (70) also includes a strain compensation circuit (78) having an input terminal connected to the output terminal (74) of the voltage reference circuit, and a strain compensation circuit output terminal (80). The strain compensation circuit (78) is configured to receive the output voltage including the first transfer function at the input terminal. The strain compensation circuit (78) has a second transfer function of a voltage with respect to strain that is substantially opposite to that of the first transfer function, thereby outputting a compensated voltage that is substantially independent from strain at the strain compensation circuit output terminal (80).SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] This application claims the benefit of Indian Patent Application No. 202341048797, filed on July 20, 2023, the contents of which are incorporated herein by reference in their entirety. [Patent Document 1] Indian Patent Application No. 202341048797 [Background technology]

[0002] Many modern devices contain a variety of electrical circuits. One type of circuit is a voltage reference circuit. It is desirable to create voltage reference circuits with high accuracy and to maintain such high accuracy over time and independent of stress, temperature, or both. Summary of the Invention

[0003] In one example, a circuit includes a voltage reference circuit including an output terminal. The voltage reference circuit is configured to generate an output voltage at the output terminal, the output voltage including a first transfer function of voltage with respect to distortion. The circuit also includes a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit and a distortion compensation circuit output terminal. The distortion compensation circuit is configured to receive the output voltage including the first transfer function at the input terminal. The distortion compensation circuit includes a second transfer function of voltage with respect to distortion that is substantially opposite to the distortion of the first transfer function, thereby outputting a compensated voltage at the distortion compensation circuit output terminal that is substantially independent of distortion.

[0004] In one aspect of the present disclosure, the distortion compensation circuit includes a strain dependent circuit element that exhibits an impedance that is a function of the distortion, and in one aspect of the present disclosure, the strain dependent circuit element includes a piezoresistor.

[0005] In another aspect of the present disclosure, the circuit further includes a variable current source circuit connected to the distortion compensation circuit output terminal. The variable current source circuit is configured to source or sink a distortion compensation current to or from the distortion compensation circuit, respectively. The distortion compensation current results in a distortion compensation voltage, which the distortion compensation circuit adds or subtracts to an output voltage at the output terminal of the voltage reference circuit, respectively, to form a compensated voltage at the distortion compensation circuit output terminal.

[0006] In another aspect of the disclosure, the circuit also includes a baseline compensation current generating circuit configured to generate a baseline compensation current. The variable current source circuit is coupled to the baseline compensation current generating circuit and further configured to generate a distortion compensation current based on the baseline compensation current.

[0007] In one aspect of the disclosure, the variable current source circuit includes a plurality of transistor circuits coupled in a current mirror configuration with the baseline compensation current generating circuit, connected in parallel and selectively activated, and also includes a control circuit that generates a plurality of control signals and couples the plurality of control signals to the parallel connected and selectively activated transistor circuits, respectively, thereby conducting one or more of the parallel connected and selectively activated transistor circuits to form the distortion compensation current.

[0008] In one aspect of the disclosure, each parallel connected selectively activated transistor circuit includes a transistor connected in series with a switch element configured to receive a respective one of a plurality of control signals at its control terminal, such that a state of the respective control signal causing the switch element to close activates the respective parallel connected selectively activated transistor circuit to conduct a current of a magnitude corresponding to the size of the respective transistor.

[0009] In one aspect of the disclosure, the circuit further includes a temperature compensation circuit having an input terminal connected to the distortion compensation circuit output terminal, the temperature compensation circuit configured to sense a temperature in the circuit and generate a temperature compensation voltage based on the sensed temperature, and the temperature compensation circuit further configured to combine the temperature compensation voltage with the compensated voltage at the distortion compensation circuit output terminal to form a combined distortion and temperature compensated voltage at the temperature compensation circuit output terminal.

[0010] In one aspect of the disclosure, a circuit is disclosed that includes a current source circuit configured to generate a source current at a current source output terminal. The source current has a first bias current component and a second compensation current component. The circuit also includes a voltage reference circuit configured to generate a reference voltage at a voltage reference output terminal. The voltage reference output terminal is coupled to the current source output terminal, and the voltage reference circuit is configured to sink the first bias current component of the source current. The circuit also includes a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit and a distortion compensation circuit output terminal. The distortion compensation circuit is configured to source or sink the second compensation current component, generate a distortion compensation voltage based on the second compensation current component, and combine the reference voltage and the distortion compensation voltage to form a compensated reference voltage at the output terminal of the distortion compensation circuit.

[0011] In one aspect of the present disclosure, the distortion compensation circuit includes a strain dependent circuit element that exhibits an impedance that is a function of the strain, hi one aspect, the strain dependent circuit element includes a piezoresistor.

[0012] In another aspect of the present disclosure, the circuit further includes a variable current source circuit connected to the distortion compensation circuit output terminal, the variable current source circuit configured to source or sink a second compensation current component to or from the distortion compensation circuit, respectively, the second compensation current component providing a distortion compensation voltage that the distortion compensation circuit adds or subtracts to a reference voltage at an output terminal of the voltage reference circuit to form a compensated reference voltage at the distortion compensation circuit output terminal.

[0013] In one aspect of the disclosure, the current source circuit is configured to generate a baseline compensation current, and the variable current source circuit is configured to source or sink a second compensation current component based on the baseline compensation current. In one aspect, the variable current source circuit includes a plurality of parallel-connected and selectively activated transistor circuits connected in a current mirror configuration to circuit elements in the current source circuit that generate the baseline compensation current, and a control circuit. The control circuit is configured to generate a plurality of control signals and couple the plurality of control signals to the parallel-connected and selectively activated transistor circuits, respectively, thereby causing one or more of the parallel-connected and selectively activated transistor circuits to conduct to form the second compensation current component.

[0014] In one aspect of the disclosure, each of the parallel connected selectively activated transistor circuits includes a transistor connected in series with a switch circuit element configured to receive a respective one of a plurality of control signals at its control terminal, such that when the state of the respective control signal causes the switch circuit element to close, the respective parallel connected selectively activated transistor circuit is activated to conduct a current of a magnitude corresponding to the size of the respective transistor.

[0015] In one aspect of the disclosure, the circuit further includes a temperature compensation circuit having an input terminal connected to the distortion compensation circuit output terminal, the temperature compensation circuit configured to sense a temperature in the circuit, generate a temperature compensation voltage based on the sensed temperature, and combine the temperature compensation voltage with the compensated voltage at the distortion compensation circuit output terminal to form a combined distortion and temperature compensated voltage at the temperature compensation circuit output terminal.

[0016] In one aspect of the disclosure, a method is disclosed. The method includes generating a reference voltage using a voltage reference circuit. The generated reference voltage is provided at an output terminal of the voltage reference circuit and includes a first transfer function of voltage relative to distortion. The method also includes generating a distortion-compensated voltage using a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit. The distortion-compensated voltage includes a second transfer function of voltage relative to distortion that is substantially opposite to the distortion of the first transfer function. The method also includes combining the reference voltage with the distortion compensation voltage to form a compensated reference voltage, and outputting the compensated reference voltage at an output terminal of the distortion compensation circuit.

[0017] In one aspect of the method, the distortion compensation circuit includes a distortion dependent circuit element exhibiting an impedance that is a function of the distortion. Also, in one aspect, the method includes sourcing or sinking a distortion compensation current, respectively, to or from the distortion compensation circuit with a variable current source circuit, the distortion compensation current resulting in a distortion compensation voltage. The method also includes generating a baseline compensation current with a configured baseline compensation current generating circuit, and generating a distortion compensation current based on the baseline compensation current by coupling the variable current source circuit to the baseline compensation current generating circuit.

[0018] In one aspect of the method, generating a distortion compensation current based on a baseline compensation current includes coupling a plurality of parallel connected and selectively activated transistor circuits coupled in a current mirror configuration in a variable current source circuit to a baseline compensation current generating circuit, generating a plurality of control signals with a control circuit, and coupling the plurality of control signals, respectively, to the plurality of parallel connected and selectively activated transistor circuits, thereby causing one or more of the parallel connected and selectively activated transistor circuits to conduct to form the distortion compensation current.

[0019] In one aspect of the disclosure, the method further includes coupling a temperature compensation circuit having an input terminal to the distortion compensation circuit output terminal and sensing temperature at the voltage reference circuit, and the method also includes generating a temperature compensation voltage based on the sensed temperature using the temperature compensation circuit and combining the temperature compensation voltage with a compensated reference voltage at the distortion compensation circuit output terminal to form a combined distortion and temperature compensated reference voltage at the temperature compensation circuit output terminal.

[0020] In another aspect of the present disclosure, a circuit element for providing a stable voltage reference may be configured by a number of instructions stored on a non-transitory computer-readable medium. Such a circuit element may include, for example, one or more circuit cells in an application specific integrated circuit library (ASIC) and may be incorporated into various circuit designs. When executed by a processor, the instructions are used to generate a circuit element configured to generate a reference voltage using a voltage reference circuit, the generated reference voltage being provided at an output terminal of the voltage reference circuit, the reference voltage comprising a first transfer function of voltage related to distortion. The circuit element is further configured to generate a distortion compensation voltage using a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit, the distortion compensation voltage comprising a second transfer function of voltage related to distortion substantially opposite to the distortion of the first transfer function. The circuit element is further configured to combine the reference voltage with the distortion compensation voltage to form a compensated reference voltage and output the compensated reference voltage at an output terminal of the distortion compensation circuit.

[0021] In another aspect of the disclosure, the circuit element generated in response to the executed instructions is configured to source or sink a distortion compensation current to or from the distortion compensation circuit, respectively, using a variable current source circuit. The distortion compensation current results in a distortion compensation voltage. The circuit element is further configured to generate a baseline compensation current using a configured baseline compensation current generation circuit, and generate a distortion compensation current based on the baseline compensation current by coupling the variable current source circuit to the baseline compensation current generation circuit. In one aspect of the disclosure, generating a distortion compensation current based on the baseline compensation current includes coupling a plurality of parallel-connected and selectively activated transistor circuits coupled in a current mirror configuration in the variable current source circuit to the baseline compensation current generation circuit, generating a plurality of control signals using a control circuit, and coupling the plurality of control signals to the plurality of parallel-connected and selectively activated transistor circuits, respectively, thereby conducting one or more of the parallel-connected and selectively activated transistor circuits to form the distortion compensation current.

[0022] In another aspect of the disclosure, the circuit element couples a temperature compensation circuit having an input terminal to the distortion compensation circuit output terminal and is configured to sense temperature at the voltage reference circuit, the circuit element is also configured to generate a temperature compensation voltage based on the sensed temperature with the temperature compensation circuit and combine the temperature compensation voltage with the compensated reference voltage at the distortion compensation circuit output terminal to form a combined distortion and temperature compensated reference voltage at the temperature compensation circuit output terminal. [Brief description of the drawings]

[0023] [Figure 1] 1 is a combined circuit diagram and graph of a known voltage reference circuit, a strain gauge sensor circuit, and a graph showing the rate of change in reference voltage with respect to orthogonal strain;

[0024] [Diagram 2]FIG. 2 is a block diagram of a SAR ADC temperature and distortion compensation circuit that uses detected strain from the strain gauge sensor circuit of FIG.

[0025] [Diagram 3] Three graphs containing transfer functions are shown, the first graph showing the transfer function of a voltage reference circuit, the second graph showing the transfer function of a distortion compensation circuit, and the third graph showing an analog combination of the two transfer functions.

[0026] [Figure 4] 1 is a graph showing empirical data for a voltage reference circuit illustrating voltage drift versus variations in strain.

[0027] [Diagram 5] FIG. 1 is a circuit schematic illustrating a circuit that exhibits a stable voltage reference that is substantially independent of distortion, in one example.

[0028] [Figure 6] 1 is a graph showing different distortion sensitivities for a voltage reference circuit and a distortion compensation circuit;

[0029] [Figure 7] FIG. 1 is a circuit schematic illustrating, in one example, a circuit that exhibits a stable voltage reference and shows in greater detail the ability to adjust the distortion compensation circuitry for improved performance.

[0030] [Figure 8A] FIG. 8 is a circuit schematic illustrating an alternative baseline compensation current source circuit that may be used in the circuits of FIGS. 5 and 7 in one example. [Figure 8B] FIG. 8 is a circuit schematic illustrating an alternative baseline compensation current source circuit that may be used in the circuits of FIGS. 5 and 7 in one example.

[0031] [Figure 9] FIG. 1 is a circuit schematic illustrating a circuit that exhibits a stable voltage reference that is substantially independent of strain and temperature, in one example.

[0032] [Figure 10] 1 is a flow chart illustrating a method for providing a stable voltage reference in one example.

[0033] In the drawings, the same reference numbers or other reference designations are used to denote the same or similar (functional and / or structural) features. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] In the following description, many different examples are provided for implementing different features of the provided subject matter. To simplify the description, specific examples of components and arrangements are described below. The drawings are not drawn to scale.

[0035] FIG. 1 is a combined circuit diagram and graph illustrating a distortion compensation scheme for a voltage reference circuit known to the inventors of the present disclosure. A voltage reference circuit is a common circuit application, the purpose of which is to provide a stable and accurate output voltage reference. One challenge in providing a stable and accurate output voltage is voltage drift, which can be caused by a variety of factors including strain (also referred to as stress) and temperature. Drift due to strain can occur based on a variety of factors such as long-term drift (LTD), which is a time-varying stress, and can be significant to the circuit die in a plastic package, solder shift in die attachment, and thermal hysteresis in both back-end-of-line (BEOL) and front-end-of-line (FEOL) processing.

[0036] One conventional approach to reducing voltage reference drift is to take measures to minimize the amount of stress / strain experienced by the circuit elements, such as using floorplans (i.e., circuit element layouts on a die) with low stress gradients, the use of polyamide layers, low stress packaging, and low stress die attach processes.

[0037] Another conventional approach to improving the accuracy of the output reference voltage is to compensate for the strain / stress experienced by the voltage reference circuitry. For example, a stress sensor circuit can be placed locally on the voltage reference circuitry, and then compensation can be used on the reference voltage circuitry output to compensate for the voltage drift caused by the detected stress.

[0038] One compensation solution known to the inventors of the present disclosure is shown in Figures 1 and 2. At 10, a bandgap reference voltage circuit is provided to generate a reference voltage at an output terminal 12. A strain gauge circuit 14 is provided local to the bandgap reference voltage circuit 10 to sense die stress experienced by the bandgap reference voltage circuit 10 in one direction (e.g., the X direction). In one example, a sensor element 16 (e.g., a resistor) exhibiting characteristics that vary in a predictable manner with strain in the X direction generates an output voltage indicative of the detected strain at an output terminal 18 of the strain gauge circuit element 14. Similarly, a second strain gauge circuit detects strain in a second, orthogonal direction (e.g., the Y direction) and outputs a voltage indicative thereof.

[0039] Graph 20 in Figure 1 shows data illustrating the rate of drift in the voltage reference output for multiple voltage reference circuits on different dies for various amounts of distortion. It is this variation in the output reference voltage that needs to be compensated for.

[0040] 2 is a block diagram illustrating an analog-to-digital converter (ADC) that operates to provide distortion and temperature compensation in the digital domain. An input multiplexer 24 receives multiple analog inputs including, among other things, a sensed temperature input value 26 and two strain input values ​​28, 30 reflecting distortion detected at the die in two orthogonal directions. The analog inputs 26, 28, 30 are passed in serial format through the multiplexer 24, converted to digital values ​​via the ADC 32, demultiplexed by a demultiplexer 34, and processed by a digital correction circuit block 36. More specifically, the digital correction circuit block 36 receives digitized values ​​for the sensed digital temperature 38 and the sensed digital distortion vectors 40, 42 and provides compensation to a reference voltage to generate a digitally compensated reference voltage value 44.

[0041] The solution in FIG. 2 incorporates multiple stages of circuitry to implement, with each cascaded stage being a potential source of error. Also, digitizing analog values ​​into the digital domain introduces quantization errors. Finally, the digital compensation block 36 also introduces clock noise that contributes to compensation errors. Therefore, such a digital solution is not an optimal choice for high-precision voltage reference applications.

[0042] Another solution known to the inventor uses two different types of strain gauges to generate a differential signal and then uses temperature compensation for the residual temperature response. Such a solution requires first and second order temperature compensation and much of the detected strain information may be lost due to multiple error sources.

[0043] Another solution known to the inventor utilizes a Wheatstone bridge type architecture, where the principle is implemented that the ratio of resistors indicates a zero potential difference when no strain is present. The detected potential difference is therefore indicative of the detected strain. This solution requires that the materials of the resistors of the bridge circuit elements are the same with respect to temperature drift, otherwise temperature errors may be aliased in the stress signal. Also, to generate a differential signal, care must be taken to ensure that only one resistor of the bridge arrangement is sensitive to strain, or that the resistors are arranged so that one resistor experiences a compressive stress and another a tensile stress. These requirements may also be sources of error. Also, for compensation, subsequent active processing and driver circuit elements are required, which also add errors.

[0044] The present disclosure is directed to a circuit and method for providing a high accuracy voltage reference. The solution employs a combined distortion detection and distortion compensation mechanism in a circuit element that exhibits a transfer function (e.g., voltage drift with respect to distortion) that is substantially opposite to that of the voltage reference circuit element. The two transfer functions essentially cancel each other out, resulting in a compensated reference voltage that is substantially independent of distortion. In accordance with one aspect of the disclosure, the distortion detection circuit element is also the compensation circuit element, and the compensation is performed in the analog domain, thereby reducing the number of circuit element stages and associated errors.

[0045] FIG. 3 shows three graphs illustrating transfer functions and a conceptual solution according to the present disclosure, a voltage reference circuit is provided having an output voltage that is substantially independent of strain-induced variations. In a first graph 50, a transfer function 52 is shown that reflects the transfer function of a typical voltage reference circuit. In the first graph 50, the voltage 52 shown at the output terminal of the voltage reference circuit varies in a generally positive linear manner with respect to stress. FIG. 4 shows empirical data 53 collected from a typical voltage reference circuit. As can be seen from the data 53, for negative and positive stress values ​​(which may reflect, for example, compressive and tensile stresses), the value of the output voltage does not remain constant as desired, but instead "drifts" in a substantially positive linear manner.

[0046] 3, a second graph 54 shows another transfer function 56 that is approximately the opposite of that of the voltage reference circuit transfer function 52 in graph 50. This second graph 54 illustrates how a variation in strain results in a change in the voltage characteristics of a strain gauge element or circuit in accordance with the present disclosure. In one example, this can be reflected by a piezoresistor element or other type of circuit element. In particular, for example, in one non-limiting example, when a piezoresistor is used, such as an N-well diffused resistor, the voltage drop across the resistor element varies generally linearly with respect to strain. When a voltage is dropped across a resistor, such an element, when placed in series with the output terminal of the voltage reference circuit, results in a subtraction (e.g., the voltage drop across the strain gauge element), and is therefore reflected as an opposite transfer function 56 in graph 54. Because the magnitude of the voltage drop across the strain gauge is also a function of the current through the strain gauge element, the opposite transfer function 56 can be "tuned" or "trimmed" to closely match the positive drift of the voltage reference circuit output voltage. Then, by combining the two transfer functions together, a third graph 58 is produced, where transfer function 60, which is the combination of transfer functions 52 and 56, results in a compensated output voltage reference that is substantially independent of distortion. That is, the reference voltage at the compensated output terminal of the circuit does not experience "drift" due to distortions encountered in the circuit. Also, in accordance with the present disclosure, the use of strain gauges, not just to detect distortion, but as the distortion compensation elements themselves, simplifies the circuit elements and reduces many of the error sources in known conventional solutions, providing a reference voltage accuracy with greatly reduced "drift" due to distortion.

[0047] 5 is a schematic circuit diagram illustrating a circuit 70 for providing a voltage reference that is substantially independent of distortion. The circuit 70 includes a voltage reference circuit 72 that generates a reference voltage at an output terminal 74. A current source circuit 76 is coupled between a predefined voltage, such as, for example, a supply voltage Vdd, and the output terminal 74. A distortion compensation circuit 78 is coupled between the output terminal 74 of the voltage reference circuit 72 and a compensated reference voltage output terminal 80. A variable or programmable current source circuit 82 is also connected to the compensated reference voltage output terminal 80, for example in parallel with the series combination of the voltage reference circuit 72 and the distortion compensation circuit 78.

[0048] In one aspect of the present disclosure, voltage reference circuit 72 includes a Zener diode that, when reverse biased, exhibits a Zener breakdown voltage equal to the desired reference output voltage at output terminal 74. Alternatively, reference voltage circuit 72 may include other types of voltage reference circuits, such as a bandgap reference voltage circuit, or other types of reference voltage circuits, and any such alternatives are contemplated as falling within the scope of the present disclosure.

[0049] In operation, circuit 70 operates as follows: Under reverse bias breakdown conditions, in one example, voltage reference circuit 72, operating as a Zener diode, generates a BIAS A Zener breakdown current, illustrated as I BIAS +ISX to output terminal 74, where ISX is the compensation current and may be positive or negative. The Zener diode provides a current I BIAS is conducted, the compensation current ISX passes through the distortion compensation circuit 78 and is sunk or sunk by the variable current source circuit 82.

[0050] The compensation current ISX is conducted through the distortion compensation circuit 78, causing a voltage drop across it. For example, in one embodiment of the present disclosure, the distortion compensation circuit 78 includes a piezoresistor R SG3. In this way, if the compensation current ISX is fixed, the voltage drop across the distortion compensation circuit 78 changes in response to variations in the distortion encountered by the circuit 70. Optionally, the distortion encountered by the circuit 70 causes a "drift" of the reference voltage at the reference voltage output terminal 74, which occurs in a generally positive linear fashion over variations in distortion, as in the graph 50 showing the transfer function 52 in FIG. 3, so that the voltage drop across the distortion compensation circuit 78 similarly changes due to changes in its impedance caused by the distortion encountered by the circuit 70, as illustrated in the graph 54 using the transfer function 56 in FIG. 3. The resulting compensated reference voltage at the compensated reference voltage output terminal 80 is the analog sum of the transfer functions of the reference voltage circuit 72 and the distortion compensation circuit 78.

[0051] Referring to FIG. 6, a graph 90 is provided showing the "stress sensitivity" of both the voltage reference circuit 72 (e.g., Zener diode) and the strain compensation circuit 78 (e.g., piezoresistor). In both examples, the circuits exhibit similar, but not identical, circuit characteristic relationships with respect to strain. Through empirical data collected for numerous circuit configurations, it has been found that the stress sensitivity "b" 92 of the strain gauge element (e.g., impedance) is approximately 4.4% / 100 MPa, and the stress sensitivity "d" 94 of the Zener element (e.g., Zener breakdown voltage) is approximately 0.02% / 100 MPa. Thus, while the strain responses of both elements are similar, tuning of the response of the strain compensation circuit 78 is used by varying the sink / source current ISX through the strain gauge element to more closely match the transfer functions of the two circuits. This tuning can be performed using a variable current source circuit 82.

[0052] 7 is a schematic diagram illustrating a circuit 70' similar to circuit 70 of FIG. 5 in accordance with one embodiment of the present disclosure, showing in greater detail a current source circuit 76' (similar to current source circuit 76 of FIG. 5) and a variable current source circuit 82' (similar to variable current source circuit 82 of FIG. 5). As in FIG. 5, FIG. 7 shows a reference voltage circuit 72 represented by a Zener diode and a piezoresistor R SGand a distortion compensation circuit 78 represented by

[0053] The regulation of circuit 70' is via a current source circuit 76' and a variable current source circuit 82'. Current source circuit 76' provides a baseline compensation current I BASELINE (e.g., some fractional value of ISX). This current is mirrored (e.g., in a current mirror topology) to a plurality of parallel-configured transistors 98, which may be selectively connected to the voltage reference output terminal 74 via switches 100. In one embodiment, the current mirror transistors 98 are different sizes from one another to conduct different magnitudes of current when their associated switches 100 are closed. Alternatively, each of the transistors 98 may be approximately equal in size, or different ones may be the same size and others may be different sizes from one another.

[0054] 7, the variable current source circuit 82' includes a plurality of parallel-connected, selectively activated transistor circuits 102, at least one of which is series-connected to the compensated reference voltage output terminal 80 via a switch 104. The transistors 102 each generate a baseline compensation current (I BASELINE ) to form a current mirror configuration. In the manner described above, the current I conducted through the distortion compensation circuit 78 can be scaled by the number of switches 102 that are closed in the variable current source circuit 82′.

[0055] As can be seen in FIG. 6, the stress / strain sensitivities 92 and 94 of the distortion compensation circuit 78 and the voltage reference circuit 72 are similar, but they are not identical. Therefore, performing an analog combination of the two transfer functions of such circuits without tuning the circuit elements would not result in an optimal cancellation as shown in FIG. 3. Rather, the analog combination of the transfer functions may result in a net drift of the compensated reference voltage due to distortion. By tuning the circuit elements 70' as shown in FIG. 7, the current ISX sinking / sourcing through the distortion compensation circuit 78 may be increased or decreased to account for variations in the strain sensitivities, e.g., "b" and "d". As described above, the second, opposite transfer function is adjusted or "shifted" by the change in ISX to match the transfer functions (e.g., inverted with respect to each other), thereby resulting in a compensated reference voltage that is substantially independent of the strain.

[0056] In one aspect of the present disclosure, the tuning process may be performed after manufacturing or packaging of the circuit element 70 and before it is sent to a customer. The distortion sensitivities of the distortion compensation circuit and the voltage reference circuit may be ascertained by characterizing a number of different devices in a device test setup where various amounts of stress / strain are applied to the completed package. Determination of the variation between the determined sensitivities may be used to determine how much tuning is required to make the transfer function of the distortion compensation circuit 78 substantially the opposite of the transfer function of the voltage reference circuit 72. Tuning is then accomplished by determining which one or more of the switches 100 and 104 are closed and which are open, and programming the control circuitry to provide the necessary control signals to open and close the appropriate switches. Also, such device characterization may be performed for each manufacturing lot of the circuit element, or for each packaging lot, or according to other criteria, and all such alternatives are contemplated as falling within the scope of the present disclosure.

[0057] 8A and 8B are circuit schematics illustrating examples of baseline compensation current source circuits 96′ and 96″ that may be used in the circuit 70′ of FIG. 7. In FIG. 8A, the baseline compensation current source circuit 96′ is BE / R type circuits. Such a circuit element is implemented by a fixed bias and a ΔV BE , which shows distortion cancellation and offers the advantage that Q1 is process independent. GS 9 shows a baseline compensation current source circuit 96″ implemented by a current bias generator. It also has a fixed bias and ΔV GS 8A and 8B are examples and any current source circuitry may be used and is contemplated as falling within the scope of the present disclosure.

[0058] FIG. 9 is a schematic circuit diagram illustrating a voltage reference circuit 110 that uses both distortion compensation and temperature compensation. The circuit 110 is similar in many respects to the circuit element 70 of FIG. 5, but the circuit 110 further includes a temperature compensation circuit 112 downstream of the distortion compensation circuit 78. More specifically, the temperature compensation circuit 112 includes at least a temperature compensation circuit element that is connected to the distortion-compensated voltage reference output terminal 80. This means that the circuit 110 first performs distortion compensation via the distortion compensation circuit 78, regardless of considering temperature variations in the circuit elements. After performing distortion compensation and providing a distortion-compensated reference output voltage at the output terminal 80, further compensation is performed on this voltage based on the temperature detected in the circuit 110. By placing the temperature compensation downstream of the distortion detection / compensation, multi-stage circuit element errors, including but not limited to temperature aliasing errors, are avoided.

[0059] FIG. 10 shows a flow chart illustrating a method 120 according to the present disclosure. The method may be implemented in conjunction with any circuit element, some examples being provided in FIG. 5 and FIG. 7 above. The method 120 includes, at 130, generating a reference voltage using a voltage reference circuit, the generated reference voltage being provided at an output terminal of the voltage reference circuit. The reference voltage includes a first transfer function of voltage related to distortion. The method 120 further includes, at 140, providing the distortion compensation voltage using a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit. The distortion compensation voltage includes a second transfer function of voltage related to distortion that is substantially opposite to that of the first transfer function. Finally, the method 120 includes, at 150, combining the reference voltage with the distortion compensation voltage to form a compensated reference voltage, and outputting the compensation reference voltage at an output terminal of the distortion compensation circuit. In one aspect of the present disclosure, the distortion compensation circuit includes a distortion-dependent circuit element that exhibits an impedance that is a function of distortion.

[0060] In one aspect of the disclosure, the method also includes using a variable current source circuit to source or sink a distortion compensation current to or from the distortion compensation circuit, respectively, where the distortion compensation current results in a distortion compensation voltage. The method may also include generating a baseline compensation current using a configured baseline compensation current generating circuit, and generating a distortion compensation current based on the baseline compensation current by coupling the variable current source circuit to the baseline compensation current generating circuit. In one aspect, generating a distortion compensation current based on the baseline compensation current may include coupling a plurality of parallel-connected and selectively activated transistor circuits coupled in a current mirror configuration in the variable current source circuit to the baseline compensation current generating circuit, generating a plurality of control signals using a control circuit, and coupling the plurality of control signals to the plurality of parallel-connected and selectively activated transistor circuits, respectively, thereby conducting one or more of the parallel-connected and selectively activated transistor circuits to form the distortion compensation current.

[0061] In one aspect of the disclosure, the method further includes coupling a temperature compensation circuit having an input terminal to the distortion compensation circuit output terminal, sensing temperature in a voltage reference circuit, generating a temperature compensated voltage based on the sensed temperature using the temperature compensation circuit, and combining the temperature compensated voltage with a compensated reference voltage at the output terminal of the distortion compensation circuit to form a combined distortion and temperature compensated reference voltage at the output terminal of the temperature compensation circuit.

[0062] In another aspect of the present disclosure, a circuit element for providing a stable voltage reference may be configured by a number of instructions stored on a non-transitory computer-readable medium. Such a circuit element may include, for example, one or more circuit cells in an application specific integrated circuit library (ASIC) and may be incorporated into various circuit designs. The instructions, when executed by a processor, are used to generate a circuit element configured to generate a reference voltage using a voltage reference circuit, the generated reference voltage being provided at an output terminal of the voltage reference circuit, the reference voltage comprising a first transfer function of voltage related to distortion. The circuit element is further configured to generate a distortion compensation voltage using a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit, the distortion compensation voltage comprising a second transfer function of voltage related to distortion substantially opposite to the distortion of the first transfer function. The circuit element is further configured to combine the reference voltage with the distortion compensation voltage to form a compensated reference voltage and output the compensated reference voltage at an output terminal of the distortion compensation circuit.

[0063] In another aspect of the disclosure, the circuit element generated in response to the executed instructions is configured to source or sink a distortion compensation current to or from the distortion compensation circuit, respectively, using a variable current source circuit. The distortion compensation current results in a distortion compensation voltage. The circuit element is further configured to generate a baseline compensation current using a configured baseline compensation current generation circuit, and generate a distortion compensation current based on the baseline compensation current by coupling the variable current source circuit to the baseline compensation current generation circuit. In one aspect of the disclosure, generating a distortion compensation current based on the baseline compensation current includes coupling a plurality of parallel-connected and selectively activated transistor circuits coupled in a current mirror configuration in the variable current source circuit to the baseline compensation current generation circuit, generating a plurality of control signals using a control circuit, and coupling the plurality of control signals to the plurality of parallel-connected and selectively activated transistor circuits, respectively, thereby conducting one or more of the parallel-connected and selectively activated transistor circuits to form the distortion compensation current.

[0064] In another aspect of the disclosure, a circuit element couples a temperature compensation circuit having an input terminal to a distortion compensation circuit output terminal and is configured to sense a temperature at a voltage reference circuit, the circuit element is also configured to generate a temperature compensation voltage based on the sensed temperature using the temperature compensation circuit and combine the temperature compensation voltage with a compensated reference voltage at the output terminal of the distortion compensation circuit to form a combined distortion and temperature compensated reference voltage at the output terminal of the temperature compensation circuit.

[0065] Although the use of certain transistors is described herein, other transistors (or equivalent devices) may alternatively be used with little or no modification to the remaining circuit elements. For example, metal oxide silicon FETs (MOSFETs) (such as n-channel MOSFETs, nMOSFETs, or p-channel MOSFETs, pMOSFETs), bipolar junction transistors (BJTs, e.g., NPN or PNP), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in conjunction with the devices described herein. The transistors may be depletion mode devices, drain extension devices, enhancement mode devices, natural transistors, or other types of device structure transistors. Also, the devices may be implemented in or on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0066] While some elements of the illustrated examples are included in an integrated circuit and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Also, some or all of the features shown as being external to the integrated circuit may be included in the integrated circuit and / or some features shown as being internal to the integrated circuit may be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" refers to one or more circuits that are (1) incorporated in / on a semiconductor substrate, (2) incorporated in a single semiconductor package, (3) incorporated in the same module, and / or (4) incorporated in / on the same printed circuit board.

[0067] Use of the term "ground" in the preceding description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable or suitable to the teachings of the present description. Unless otherwise stated, "about," "approximately," or "substantially" preceding a value means + / - 10 percent of the stated value, or, if the value is zero, a reasonable range of values ​​around zero.

[0068] Modifications in the described examples are possible and other implementations are possible within the scope of the claims.

Claims

1. 1. A circuit comprising: A voltage reference circuit; A distortion compensation circuit; Including, the voltage reference circuit includes an output terminal, the voltage reference circuit configured to generate an output voltage at the output terminal, the output voltage comprising a first transfer function of voltage with respect to distortion; the distortion compensation circuit has an input terminal connected to the output terminal of the voltage reference circuit and a distortion compensation circuit output terminal, the distortion compensation circuit being configured to receive the output voltage having the first transfer function at the input terminal, the distortion compensation circuit including a second transfer function of voltage related to distortion that is substantially opposite to that of the first transfer function, thereby outputting a compensated voltage at the distortion compensation circuit output terminal that is substantially independent of distortion; circuit.

2. 2. The circuit of claim 1, wherein the distortion compensation circuit comprises a distortion dependent circuit element that exhibits an impedance that is a function of distortion.

3. 3. The circuit of claim 2, wherein the strain dependent circuit element comprises a piezoresistor.

4. 3. The circuit of claim 2, a variable current source circuit connected to the distortion compensation circuit output terminal; the variable current source circuit is configured to respectively source and sink a distortion compensation current to and from the distortion compensation circuit; the distortion compensation current provides a distortion compensation voltage, and the distortion compensation circuit adds or subtracts, respectively, the distortion compensation voltage to the output voltage at the output terminal of the voltage reference circuit to form the compensated voltage at the distortion compensation circuit output terminal. circuit.

5. 5. The circuit of claim 4, a baseline compensation current generating circuit configured to generate a baseline compensation current; the variable current source circuit is coupled to the baseline compensation current generating circuit and is further configured to generate the distortion compensation current based on the baseline compensation current. circuit.

6. 6. The circuit of claim 5, wherein the variable current source circuit comprises: a plurality of parallel connected, selectively activated transistor circuits coupled in a current mirror configuration to the baseline compensation current generating circuit; a control circuit configured to generate a plurality of control signals and couple the plurality of control signals, respectively, to the parallel connected and selectively activated transistor circuits, thereby causing one or more of the parallel connected and selectively activated transistor circuits to conduct to form the distortion compensation current; The circuit includes:

7. 7. The circuit of claim 6, each of the parallel connected selectively activated transistor circuits includes a transistor connected in series with a switch element, the switch element configured to receive a respective one of the plurality of control signals at a control terminal; when the state of the respective control signal causes the switch element to be closed, the respective parallel connected selectively activated transistor circuits are activated to conduct therethrough a current of a magnitude corresponding to the size of the respective transistor; circuit.

8. 5. The circuit of claim 4, a temperature compensation circuit having an input terminal connected to the distortion compensation circuit output terminal; the temperature compensation circuit is configured to sense temperature in the circuit, generate a temperature compensation voltage based on the sensed temperature, and combine the temperature compensation voltage with the compensated voltage at the output terminal of the distortion compensation circuit to form a combined distortion and temperature compensated voltage at the output terminal of the temperature compensation circuit. circuit.

9. 1. A circuit comprising: A current source circuit; A voltage reference circuit; A distortion compensation circuit; Including, the current source circuit is configured to generate a source current at a current source output terminal, the source current having a first bias current component and a second compensation current component; the voltage reference circuit is configured to generate a reference voltage at a voltage reference output terminal, the voltage reference output terminal is coupled to the current source output terminal, and the voltage reference circuit is configured to sink the first bias current component of the source current; the distortion compensation circuit has an input terminal connected to the output terminal of the voltage reference circuit and a distortion compensation circuit output terminal, the distortion compensation circuit is configured to source or sink the second compensation current component, generate a distortion compensation voltage based on the second compensation current component, and combine the reference voltage and the distortion compensation voltage to form a compensated reference voltage at the output terminal of the distortion compensation circuit. circuit.

10. 10. The circuit of claim 9, wherein the distortion compensation circuit comprises a distortion dependent circuit element that exhibits an impedance that is a function of distortion.

11. 11. The circuit of claim 10, wherein the strain dependent circuit element comprises a piezoresistor.

12. 10. The circuit of claim 9, a variable current source circuit connected to the distortion compensation circuit output terminal, the variable current source circuit being configured to respectively output the second compensation current component to the distortion compensation circuit or to sink the second compensation current component from the distortion compensation circuit; the second compensation current component produces a distortion compensation voltage, and the distortion compensation circuit adds or subtracts the distortion compensation voltage to or from the reference voltage at the output terminal of the voltage reference circuit to form the compensated reference voltage at the distortion compensation circuit output terminal. circuit.

13. 13. The circuit of claim 12, the current source circuit is configured to generate a baseline compensation current; the variable current source circuit is configured to source or sink the second compensation current component based on the baseline compensation current. circuit.

14. 14. The circuit of claim 13, wherein the variable current source circuit comprises: a plurality of parallel-connected, selectively activated transistor circuits; A control circuit; Including, the parallel connected selectively activated transistor circuit is coupled in a current mirror configuration with a circuit element in the current source circuit that generates the baseline compensation current; the control circuit is configured to generate a plurality of control signals and couple the plurality of control signals, respectively, to the parallel connected and selectively activated transistor circuits, thereby causing one or more of the parallel connected and selectively activated transistor circuits to conduct to form the second compensation current component. circuit.

15. 15. The circuit of claim 14, wherein each parallel-connected selectively-activated transistor circuit includes a transistor connected in series with a switch circuit element configured to receive a respective one of the plurality of control signals at a control terminal thereof; when the state of the respective control signal causes the switch circuit element to be closed, the respective parallel connected selectively activated transistor circuits are activated to conduct a current of a magnitude corresponding to the size of the respective transistor; circuit.

16. 10. The circuit of claim 9, a temperature compensation circuit having an input terminal connected to the distortion compensation circuit output terminal; the temperature compensation circuit is configured to sense a temperature in the circuit, generate a temperature compensation voltage based on the sensed temperature, and combine the temperature compensation voltage with the compensated voltage at the output terminal of the distortion compensation circuit to form a combined distortion and temperature compensated voltage at the output terminal of the temperature compensation circuit. circuit.

17. 1. A method comprising: generating a reference voltage with a voltage reference circuit, the generated reference voltage being provided at an output terminal of the voltage reference circuit, the reference voltage comprising a first transfer function of voltage with respect to distortion; generating a distortion-compensated voltage using a distortion compensation circuit having an input terminal connected to the output terminal of the voltage reference circuit, the distortion-compensated voltage comprising a second transfer function of voltage related to distortion, the second transfer function being substantially the inverse of the first transfer function; combining the reference voltage with the distortion compensation voltage to form a compensated reference voltage and outputting the compensated reference voltage at an output terminal of the distortion compensation circuit; A method comprising:

18. 20. The method of claim 17, wherein the distortion compensation circuit includes a distortion dependent circuit element that exhibits an impedance that is a function of distortion.

19. 20. The method of claim 17, and further comprising using a variable current source circuit to source or sink a distortion compensation current to or from the distortion compensation circuit, respectively; the distortion compensation current provides the distortion compensation voltage; method.

20. 20. The method of claim 19, generating a baseline compensation current using a baseline compensation current generating circuit; generating the distortion compensation current based on the baseline compensation current by coupling the variable current source circuit to the baseline compensation current generating circuit; A method comprising:

21. 21. The method of claim 20, wherein generating the distortion compensation current based on the baseline compensation current comprises: coupling a plurality of parallel-connected, selectively-activated transistor circuits coupled in a current mirror configuration within the variable current source circuit with the baseline compensation current generating circuit; generating, with a control circuit, a plurality of control signals and coupling the plurality of control signals respectively to the plurality of parallel connected, selectively activated transistor circuits, thereby causing one or more of the parallel connected, selectively activated transistor circuits to conduct to form the distortion compensation current; A method comprising:

22. 20. The method of claim 17, coupling a temperature compensation circuit having an input terminal to the distortion compensation circuit output terminal; Sensing a temperature in the voltage reference circuit; generating a temperature compensated voltage based on the sensed temperature using the temperature compensation circuit; combining the temperature compensated voltage with the compensated reference voltage at the output terminal of the distortion compensation circuit to form a combined distortion and temperature compensated reference voltage at the output terminal of the temperature compensation circuit; The method further comprises:

Images