Method for manufacturing semiconductor device
Patent Information
- Application Number
- JP2023125147
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-31
- Publication Date
- 2025-02-13
Smart Images

Figure 2025021318000001_ABST
Abstract
Description
[Technical field]
[0001] An embodiment of the present invention relates to a method for manufacturing a semiconductor device. [Background technology]
[0002] Semiconductor devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used for applications such as power conversion. Such semiconductor devices are manufactured by forming a circuit pattern on a substrate, and then dicing the substrate into individual chips. Each process involved in the manufacture of a semiconductor device is performed by aligning the substrate with reference to an alignment line formed on the device surface. On the other hand, in terms of product quality, it may be preferable to perform a process after forming the circuit pattern (e.g., a dicing process) from the opposite side of the device surface. In this case, there is a problem that it is difficult to align the substrate because it is not possible to directly confirm an alignment line on the device surface. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2016-096265 A Summary of the Invention [Problem to be solved by the invention]
[0004] An object of the present invention is to provide a method for manufacturing a semiconductor device that allows easy in-process alignment of a base material. [Means for solving the problem]
[0005] The manufacturing method of the semiconductor device according to the embodiment includes a mark forming step, a first attachment step, a grinding step, and a processing step. The mark forming step is a step of forming a recess in the device surface of the substrate made of a semiconductor material on which a circuit pattern is formed. The first attachment step is a step of attaching the device surface to a support substrate. The grinding step is a step of grinding the surface of the substrate opposite the device surface while the substrate is supported by the support substrate to form a ground surface. The processing step is a step of processing the substrate from the ground surface side while the substrate is supported by the support substrate. In the manufacturing method of the semiconductor device according to the embodiment, in the grinding step, the recess is exposed on the grinding surface to serve as a mark, and in the processing step, processing is performed using the mark as a reference. [Brief description of the drawings]
[0006] [Figure 1] 1 is a schematic diagram of a semiconductor device according to a first embodiment; [Diagram 2] 3 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment. [Diagram 3] 5A to 5C are schematic diagrams showing a device surface forming step according to the first embodiment. [Figure 4] 5A to 5C are schematic diagrams showing a mark forming step according to the first embodiment. [Diagram 5] 5A to 5C are schematic diagrams illustrating the device surface in a mark forming step according to the first embodiment. [Figure 6] FIG. 4 is a schematic diagram showing a first attaching step in the first embodiment. [Figure 7] Schematic diagram showing a grinding process in the first embodiment. [Figure 8] 3A to 3C are schematic diagrams illustrating a film forming process according to the first embodiment. [Figure 9] FIG. 4 is an example of an enlarged view of a film portion near a groove portion of the first embodiment. [Figure 10] FIG. 4 is an example of an enlarged view of a film portion near a groove portion of the first embodiment. [Figure 11] FIG. 4 is an example of an enlarged view of a film portion near a groove portion of the first embodiment. [Figure 12] 5A to 5C are schematic diagrams illustrating a photoresist coating step according to the first embodiment. [Figure 13] Schematic diagram showing an exposure process in the first embodiment. [Figure 14] Schematic diagram of a photomask according to a first embodiment. [Figure 15] 3A to 3C are schematic diagrams illustrating a developing process according to the first embodiment. [Figure 16] 5A to 5C are schematic views showing an etching process according to the first embodiment. [Figure 17] 5A to 5C are schematic views illustrating a photoresist removing step in the first embodiment. [Figure 18] Schematic diagram showing a singulation process according to the first embodiment. FIG. [Figure 19] FIG. 4 is a schematic diagram showing a second attaching step in the first embodiment. [Figure 20] 5A to 5C are schematic views showing a supporting substrate removing step according to the first embodiment. [Figure 21] 5A to 5C are schematic diagrams showing a pick-up process according to the first embodiment. [Figure 22] 13A to 13C are schematic diagrams showing the device surface in a mark forming step according to a modified example. [Figure 23] 6 is a flowchart showing a method for manufacturing a semiconductor device according to a second embodiment. [Figure 24] FIG. 11 is a schematic diagram showing a second attaching step in the second embodiment. [Diagram 25] 10A to 10C are schematic views showing a supporting substrate removing step according to the second embodiment. [Figure 26] Schematic diagram showing a singulation process according to the second embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0007] Hereinafter, a semiconductor device and a manufacturing method thereof according to an embodiment will be described with reference to the drawings.
[0008] In this specification, in order to indicate the positional relationship of parts, etc., the upward direction of the drawing is described as "upper" and the downward direction of the drawing is described as "lower." In this specification, the concepts of "upper" and "lower" are not necessarily terms that indicate a relationship with the direction of gravity.
[0009] (First embodiment) 1 is a schematic diagram of a semiconductor device 1 according to a first embodiment. The semiconductor device 1 according to this embodiment is, for example, a MOSFET or an IGBT (Insulated Gate Bipolar Transistor). The semiconductor device 1 according to this embodiment includes a rectangular plate-shaped semiconductor chip 10T and an electrode 20T provided on one surface of the semiconductor chip 10T.
[0010] The semiconductor chip 10T is made of a semiconductor material, which in this specification is, for example, silicon (Si), silicon carbide (SiC), GaAs (gallium arsenide), GaN (gallium nitride), etc., but is not limited thereto.
[0011] The semiconductor chip 10T has a device surface 10a, a back surface 10b located opposite to the device surface 10a, and four side surfaces 10c connecting the device surface 10a and the back surface 10b. The area of each side surface 10c is sufficiently smaller than the areas of the device surface 10a and the back surface 10b. A circuit pattern is formed on the device surface 10a. For example, a MOSFET device or an IGBT device is formed on the device surface 10a. In the following description, the distance between the device surface 10a and the back surface 10b is referred to as the thickness H of the semiconductor chip 10T.
[0012] The electrode 20T is provided on the back surface 10b of the semiconductor chip 10T. The electrode 20T contacts the back surface 10b of the semiconductor chip 10T. For example, when the semiconductor chip 10T is a MOSFET chip, the electrode 20T is a drain electrode of the MOSFET. The electrode 20T includes an electrically conductive material. Here, the electrically conductive material is, for example, Cu (copper), Al (aluminum), Ni (nickel), Ag (silver), Au (gold), or the like, but is not limited thereto.
[0013] In the semiconductor chip 10T of this embodiment, the area of the device surface 10a is larger than the area of the back surface 10b. All the side surfaces 10c of the semiconductor chip 10T are inclined with respect to the normal line of the device surface 10a. All the side surfaces 10c are inclined in a direction approaching the side surface 10c located opposite to the side surface 10c from the device surface 10a side toward the back surface 10b side. It is sufficient that at least one pair of side surfaces 10c facing opposite to each other among the four side surfaces 10c are inclined in a direction approaching each other from the device surface 10a side toward the back surface 10b side.
[0014] 2 is a flowchart showing a method for manufacturing the semiconductor device 1 of this embodiment. The method for manufacturing the semiconductor device 1 of this embodiment includes a device surface forming step S10, a mark forming step S20, a first bonding step S30, a grinding step S40, a film forming step S50, a photolithography step (processing step) S60, a singulation step (processing step) S70, a second bonding step S80, a support substrate removing step S90, and a pick-up step S100.
[0015] 3 is a schematic diagram showing the device surface forming step S10 of this embodiment. The device surface forming step S10 is a step of forming a circuit pattern of, for example, a MOSFET device or an IGBT device on one surface of a disk-shaped substrate 10 (semiconductor wafer) made of a semiconductor material, and forming this surface as the device surface 10a. In the following description, the surface opposite to the device surface 10a before the grinding step S40 described later is referred to as the initial back surface 10f. Although not shown in the figure, the device surface forming step S10 and the subsequent mark forming step S20 are performed in a state where the substrate 10 is supported by the initial back surface 10f.
[0016] 4 is a schematic diagram showing the mark forming step S20 of the present embodiment. The mark forming step S20 of the present embodiment is a step of processing the device surface 10a of the substrate 10 to form a plurality of grooves (recesses, marks) 11 having a depth D and a plurality of holes (recesses, marks) 12 having a depth D on the device surface 10a.
[0017] In this embodiment, the groove 11 functions as a mark in the subsequent singulation step S70. Meanwhile, the hole 12 functions as a mark in the subsequent photolithography step S60. Note that the steps in this embodiment in which the groove 11 and the hole 12 are used are merely examples and can be interchanged or substituted with each other. Therefore, the hole 12 may be used as a mark in the singulation step S70, and the groove 11 may be used as a mark in the photolithography step S60.
[0018] The depth D of the groove 11 and the hole 12 is greater than the thickness H (see FIG. 1) of the semiconductor chip 10T manufactured by the manufacturing method of this embodiment. In this embodiment, the depth D of the groove 11 and the hole 12 are the same. However, the depth D of the groove 11 and the hole 12 may not be the same as each other as long as they are greater than the thickness H. In addition, the shape of the groove 11 and the hole 12 that function as the mark in this embodiment is an example, and the mark is not limited to the shape of this embodiment as long as it is a recess processed in the depth direction from the device surface 10a. In this specification, the "recess" means a shape processed in the depth direction with respect to a predetermined surface (the device surface 10a in this embodiment), and is a concept that includes a penetrating portion that penetrates in the depth direction. Therefore, the recess formed in the mark forming step S20 may penetrate the substrate 10 in the thickness direction. In addition, the shape of the bottom of the "recess" does not need to be flat, and it may be circular like the groove 11, or any other shape.
[0019] In the mark forming step S20 of this embodiment, the grooves 11 are formed by a dicing device M used in the singulation process (see the subsequent singulation step S70). The grooves 11 are formed by a rotating disk-shaped blade 9 provided on the dicing device M. A laser may also be used to form the grooves 11.
[0020] In the mark forming step S20 of this embodiment, the hole 12 is formed by using, for example, a laser. A cutting tool such as a drill may also be used to form the hole 12. Note that, although the hole 12 of this embodiment is a circular hole in a plan view, the shape of the hole 12 is not limited.
[0021] FIG. 5 is a schematic diagram showing the device surface 10a after the mark forming step S20. In FIG. 5, the groove portion 11 is illustrated by a thick line. As shown in FIG. 5, a plurality of alignment lines L11, L12 are formed in advance on the device surface 10a. The alignment lines L11, L12 are used as reference positions for forming a circuit pattern in the device surface forming step S10. The alignment lines L11, L12 include a plurality of first alignment lines L11 and a plurality of second alignment lines L12. The first alignment lines L11 and the second alignment lines L12 extend in directions perpendicular to each other. The alignment lines L11, L12 divide the device surface 10a into a plurality of vertical and horizontal sections.
[0022] The sections arranged between the alignment lines L11 and L12 are classified into a rectangular effective section S1 used as the semiconductor device 1 and a removal section S2 arranged along the outer edge of the device surface 10a. In each effective section S1, a circuit pattern of one semiconductor device 1 is formed. On the other hand, in the removal section S2, no circuit pattern is formed. The removal section S2 is arranged to surround the central area where the effective sections S1 are concentrated.
[0023] In this embodiment, the groove 11 and the hole 12 are formed based on the alignment lines L11 and L12. At least one groove 11 is required to detect the relative position of the device surface 10a when used as a marker, and it is more preferable to provide two or more grooves 11 to improve detection accuracy. The groove 11 of this embodiment is formed so as to overlap the portion that is on the alignment lines L11 and L12 and that separates the adjacent removal sections S2. That is, the groove 11 of this embodiment is formed so as to overlap the end of some of the alignment lines L11 and L12. The groove 11 of this embodiment is formed on all of the alignment lines L11 and L12 that separate the removal sections S2 among the multiple alignment lines L11 and L12. However, the groove 11 is required to be formed on at least some of the alignment lines L11 and L12 that separate the removal sections S2.
[0024] In this embodiment, three holes 12 are provided on the device surface 10a. At least two holes 12 are required to detect the relative position of the device surface 10a when used as a marker, and three or more holes are preferably provided to improve detection accuracy. In addition, the multiple holes 12 are preferably arranged at intervals on the device surface 10a to improve detection accuracy. In this embodiment, three holes 12 are provided on the device surface 10a, and are arranged in different removal sections S2 near the outer edge of the device surface 10a.
[0025] 6 is a schematic diagram showing the first attachment step S30 of this embodiment. In the process of transitioning from the mark formation step S20 to the first attachment step S30, the base material 10 is turned upside down. The first attachment step S30 is a step of attaching the device surface 10a facing downward to the support substrate 40 using an adhesive 30. Through the first attachment step S30, the base material 10 is fixed to the support substrate 40.
[0026] In the first attachment step S30, first, the device surface 10a is coated with an uncured adhesive 30. Next, the device surface 10a is placed opposite the support surface of the support substrate 40 and attached to it. Next, the adhesive 30 is cured. As the adhesive 30, for example, an acrylic adhesive, an epoxy adhesive, or a silicon adhesive can be preferably used. The support substrate 40 is a plate-shaped member made of, for example, glass or silicon (Si).
[0027] 6 illustrates a case where the adhesive 30 is completely filled inside the grooves 11 and holes 12, but the filling state of the adhesive 30 is not limited to the state shown in Fig. 6. That is, the adhesive 30 may be filled partway into the grooves 11 and holes 12, with gaps being provided near the bottoms of the grooves 11 and holes 12. Also, the adhesive 30 may not be filled into the grooves 11 and holes 12.
[0028] FIG. 7 is a schematic diagram showing the grinding step S40 of this embodiment. The grinding step S40 is a step of grinding the initial back surface 10f to form the back surface (ground surface) 10b. The grinding step S40 of this embodiment is performed in a state in which the base material 10 is supported by the support substrate 40. The grinding step S40 makes the base material 10 have a thickness H. As a result, the grooves 11 and holes 12 formed from the device surface 10a side are connected to the back surface 10b side, and the grooves 11 and holes 12 penetrate the base material 10. That is, in the manufacturing method of the semiconductor device 1 of this embodiment, in the grinding step S40, the grooves 11 and holes 12 are exposed to the back surface 10b to serve as marks that can be confirmed from the back surface 10b side. Also, as described above, the adhesive 30 is filled inside the grooves 11 and holes 12 of this embodiment. Therefore, the grooves 11 penetrate the base material 10, and the adhesive 30 is exposed from the back surface 10b.
[0029] FIG. 8 is a schematic diagram showing the film forming step S50 of this embodiment. The film forming step S50 is a step of forming a film portion 20 on the rear surface 10b of the base material 10. The film forming step S50 of this embodiment is performed in a state in which the base material 10 is supported by the support substrate 40. The film portion 20 of this embodiment is a metal film made of a metal material. However, the material of the film portion 20 is not limited. The film forming step S50 of this embodiment is performed by, for example, CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), electrolytic plating, electroless plating, or the like. The thickness h of the film portion 20 of this embodiment is, for example, about 40 μm. However, the thickness h of the film portion 20 is not limited to that of this embodiment.
[0030] As described above, the adhesive 30 in the grooves 11 and holes 12 is exposed on the back surface 10b. Therefore, a part of the film portion 20 is formed on the adhesive 30. FIG. 9 is an enlarged view of the film portion 20 near the grooves 11 (or holes 12). When the material of the surface on which the film is formed is different, the film portion 20 in that part is in a different state from the other parts. For example, the region 20b of the film portion 20 formed on the adhesive 30 has observable differences such as local unevenness, rough surface roughness, or a small or large film thickness compared to the region 20a formed on the substrate 10. Therefore, even after the film portion 20 is formed on the back surface 10b, the positions of the grooves 11 and holes 12 can be grasped by observing the film portion 20. Note that FIG. 9 illustrates a case in which the adhesive 30 is completely filled in the grooves 11 and holes 12. However, the adhesive 30 in the grooves 11 and the holes 12 may not fill the grooves 11 and the holes 12 as shown in Fig. 10, or may fill only a portion of the grooves 11 and the holes 12 as shown in Fig. 11. In these cases, since a recess 20c is formed in the surface of the film portion 20, the positions of the grooves 11 and the holes 12 can be easily ascertained by observing the film portion 20.
[0031] 12 to 17 are schematic diagrams showing the photolithography process S60 of this embodiment. The photolithography process S60 is a process for etching the film portion 20 formed in the film formation process S50 in a desired pattern. The photolithography process S60 includes a photoresist application process, an exposure process, a development process, an etching process, and a photoresist removal process.
[0032] 12 is a schematic diagram showing a photoresist coating step of this embodiment. In the photoresist coating step, a photoresist 60 is applied to the surface of the film portion 20 by means of spin coating or the like, and is hardened through a pre-bake process.
[0033] 13 is a schematic diagram showing the exposure step of this embodiment. In the exposure step, light from a light source LS is irradiated onto the photoresist 60 through a photomask 70. In the exposure step, a portion of the light that has passed through the photomask 70 hits the photoresist 60. The portion of the photoresist 60 that is hit by the light becomes a photosensitive portion 61, and the solubility is changed. In this embodiment, the photosensitive portion 61 is formed in a line shape so as to overlap the alignment lines L11, L12 (see FIG. 5). The position of the photosensitive portion 61 needs to be positioned with respect to the substrate 10. For this reason, the photomask 70 needs to be aligned so that the light-transmitting portion 72 is located at a desired position with respect to the substrate 10.
[0034] 14 is a schematic diagram of a photomask 70 of this embodiment. The photomask 70 is provided with a plurality of mask portions 71 that limit the transmission of light, and light-transmitting portions 72 that are located in portions other than the mask portions 71 and transmit light. The light-transmitting portions 72 are formed in lines so as to expose portions that overlap the alignment lines L11 and L12.
[0035] The photomask 70 is provided with three alignment marks 73 for aligning the photomask 70 with respect to the substrate 10. In the exposure step, the three alignment marks 73 are superimposed on the holes 12 exposed on the rear surface 10b of the substrate 10, so that the photomask 70 can be aligned with respect to the substrate 10. That is, in the exposure step, the photomask 70 is aligned with the holes 12 as a reference. Note that the method of aligning the photomask 70 with the substrate 10 described here is just one example, and other methods may be used as long as the method can be performed with the holes 12 as a reference.
[0036] The photolithography process S60 of this embodiment is performed from the back surface 10b side of the substrate 10. For this reason, it is difficult to align the photomask 70 using the alignment lines L11 and L12 provided on the device surface 10a. In this embodiment, the hole 12 provided on the device surface 10a penetrates to the back surface 10b side. For this reason, in the photolithography process S60, the position of the hole 12 can be grasped from the back surface 10b side through the film portion 20. The alignment of the photomask 70 is performed by observing the film portion 20 to grasp the position of the hole 12 and overlapping it with the alignment mark 73 of the photomask 70. That is, the photolithography process S60 of this embodiment is performed based on the hole 12 penetrated to the back surface 10b side.
[0037] In this embodiment, the case where the photomask 70 is aligned using the holes 12 has been described, but the photomask 70 can also be aligned using the grooves 11. In this case, the photomask 70 is provided with an alignment mark 73 for overlapping with the grooves 11. In this case, the holes 12 of the substrate 10 are omitted.
[0038] 15 is a schematic diagram showing the developing step of this embodiment. The developing step is a step of dissolving and removing the exposed portion 61 of the photoresist 60 using a developer, and then performing post-baking. By removing the exposed portion 61, an opening 62 is formed in the photoresist 60. Also, a part of the film portion 20 is exposed from the opening 62. Note that, although the photolithography step S60 using the positive photoresist 60 is described in this embodiment, the photolithography step may be performed using a negative photoresist. When a negative photoresist is used, the portion other than the exposed portion is dissolved to form an opening.
[0039] 16 is a schematic diagram showing the etching step of this embodiment. The etching step is a step of removing the film portion 20 exposed from the opening portion 62 of the photoresist 60 by etching. As described above, the light-transmitting portion 72 (FIG. 14) of the photomask 70 of this embodiment is formed in a line shape so as to overlap the alignment lines L11, L12. Therefore, by going through the etching step, a groove 22 overlapping the alignment lines L11, L12 is formed in the film portion 20. The groove 22 penetrates the film portion 20 in the thickness direction. Therefore, the rear surface 10b of the substrate 10 is exposed at the bottom of the groove 22.
[0040] 17 is a schematic diagram of the photoresist removal step of this embodiment. In the photoresist removal step, the photoresist 60 is removed, and the surface of the film portion 20 is exposed.
[0041] 18 is a schematic diagram showing the singulation step S70 of the present embodiment. The singulation step S70 is a step of cutting the base material 10 to singulate the base material 10 and extracting the semiconductor chips 10T. The singulation step S70 of the present embodiment is performed in a state in which the base material 10 is supported by the support substrate 40.
[0042] In the singulation step S70 of this embodiment, cutting of the base material 10 is performed by a dicing device M using a blade 9. Alternatively, cutting of the base material 10 may be performed by using a laser dicing device.
[0043] The singulation step S70 of this embodiment is performed from the rear surface 10b side of the substrate 10. Therefore, in the singulation step S70, it is difficult to observe the alignment lines L11, L12 (see FIG. 5) provided on the device surface 10a from the processing side. In addition, the film portion 20 of this embodiment is provided with a groove 22 extending along the alignment lines L11, L12. Therefore, it is also possible to cut the substrate 10 along the groove 22 to singulate the substrate 10. However, the groove 22 is formed sufficiently wide with respect to the alignment lines L11, L12 to prevent the inner surface of the groove 22 from contacting the blade 9 when cutting the substrate 10. In addition, the groove 22 is formed by etching, so that the positional accuracy is low. Therefore, when the singulation step S70 is performed based on the groove 22, there is a problem that it is difficult to improve the positional accuracy of the cut surface in the singulation step S70.
[0044] In this embodiment, the grooves 11 provided on the device surface 10a penetrate to the back surface 10b. Therefore, in the singulation step S70, the positions of the grooves 11 can be grasped from the back surface 10b. The dicing device M has an imaging device C that observes the grooves 11 from above. The dicing device M grasps the positions of the grooves 11 by the imaging device C, and cuts the base material 10 using the grooves 11 as a reference. That is, the singulation step S70 of this embodiment is performed using the grooves 11 that penetrate to the back surface 10b as a reference.
[0045] 5, all alignment lines L11, L12 in this embodiment are disposed on the extensions of the grooves 11. Therefore, the dicing device M cuts the substrate 10 linearly along the grooves 11 grasped by the imaging device C, thereby dividing the substrate 10 into individual pieces. By cutting the substrate 10, a semiconductor device 1 is formed in which an electrode 20T is provided on the back surface 10b side of the semiconductor chip 10T.
[0046] As shown in FIG. 18, in the singulation step S70, a dicing groove 10G is formed in the substrate 10 by a blade 9. Even if the blade 9 has a constant thickness, the width dimension of the dicing groove 10G gradually increases from the bottom portion toward the opening side. This is because the cut surface is polished by the side of the blade 9 at the opening side of the dicing groove 10G. Therefore, the cut surfaces of the substrate 10 facing each other across the dicing groove 10G gradually move apart toward the opening side. For this reason, the pair of side surfaces 10c of the semiconductor chip 10T formed between the cut surfaces are inclined in a direction gradually approaching each other from the device surface 10a side toward the back surface 10b side.
[0047] 19 is a schematic diagram showing the second attachment step S80 of this embodiment. In the process of moving from the singulation step S70 to the second attachment step S80, the substrate 10 is turned upside down. The second attachment step S80 is performed in a state where the substrate 10 is supported by the support substrate 40. The second attachment step S80 is a step of attaching the substrate 10 to the dicing tape 50 on the side opposite the support substrate 40. In this embodiment, since the film portion 20 is provided on the back surface 10b side of the substrate 10, the substrate 10 is attached to the dicing tape 50 via the film portion 20.
[0048] 20 is a schematic diagram showing the support substrate detaching step S90 of this embodiment. The support substrate detaching step S90 is a step of detaching the support substrate 40 from the base material 10. In the support substrate detaching step S90 of this embodiment, the adhesive 30 may be dissolved by a solvent, or the adhesive force may be weakened by irradiating a laser through the light-transmitting support substrate 40. Furthermore, the support substrate detaching step S90 may be a step of detaching the support substrate 40 from the base material 10 by mechanical peeling in which a sharp tool is inserted between the base material 10 and the support substrate 40 to peel off the adhesive 30.
[0049] FIG. 21 is a schematic diagram showing the pick-up step S100 of this embodiment. The pick-up step S100 is a step of individually removing the individual semiconductor devices 1 on the dicing tape 50 from the dicing tape 50. In the pick-up step S100, first, a process is performed to weaken the adhesive strength of the adhesive layer on the surface of the dicing tape 50. As a process for weakening the adhesive strength of the adhesive layer of the dicing tape 50, for example, a process of irradiating the adhesive layer with ultraviolet light or heating the adhesive layer is performed. In addition, in the pick-up step S100, one semiconductor device 1 is pushed up from the lower side of the dicing tape 50 with a pin, and the semiconductor device 1 is picked up by applying negative pressure to the device surface 10a of the semiconductor device 1 and adsorbing it. By going through the above steps, the semiconductor device 1 can be manufactured.
[0050] Next, the effects of the first embodiment will be described. The manufacturing method of the semiconductor device 1 of this embodiment includes a mark forming step S20, a first attaching step S30, a grinding step S40, and a processing step (photolithography step S60 or singulation step S70) as shown in FIG. 2. As shown in FIG. 4, the mark forming step S20 is a step of forming recesses (groove portions 11 and holes 12) on the device surface 10a of the substrate 10 made of a semiconductor material on which a circuit pattern is to be formed. As shown in FIG. 6, the first attaching step S30 is a step of attaching the device surface 10a to a support substrate 40. As shown in FIG. 7, the grinding step S40 is a step of grinding the surface (initial back surface 10f) of the substrate 10 opposite the device surface 10a while supported by the support substrate 40 to form a back surface (ground surface) 10b. As shown in FIGS. 12 to 18, the processing step (photolithography step S60 or singulation step S70) is a step of processing the base material 10 from the back surface 10b side while it is supported on the support substrate 40. In the manufacturing method of the semiconductor device 1 of this embodiment, in the grinding step S40, the recesses (groove 11 and hole 12) are exposed on the back surface 10b to serve as marks. In the manufacturing method of the semiconductor device 1 of this embodiment, in the processing step (photolithography step S60 or singulation step S70), processing is performed using the marks (groove 11 and hole 12) as references.
[0051] According to this configuration, in the mark forming step S20, the recesses (groove 11 and hole 12) can be formed from the device surface 10a side with reference to the alignment lines L11, L12, etc., of the device surface 10a. In addition, the formed recesses (groove 11 and hole 12) can be exposed from the back surface 10b by the grinding step S40. As a result, when a processing step (photolithography step S60 or singulation step S70) is performed from the back surface 10b, the recesses (groove 11 and hole 12) can be used as a reference to perform alignment from the back surface 10b side. According to this configuration, for a processing step (photolithography step) that needs to be performed from the back surface 10b side, alignment of the substrate 10 during processing is facilitated. In addition, when performing a processing step that requires alignment of the substrate 10, there is no need to turn the device surface 10a side upward for alignment, and the manufacturing process can be simplified.
[0052] As shown in FIG. 18, in the manufacturing method of the semiconductor device 1 of this embodiment, the processing step is a singulation step S70 in which the base material 10 is cut using the mark (groove portion 11) as a reference while supported by the support substrate 40 to individualize the base material 10.
[0053] According to this configuration, as a processing step, the singulation step S70 is performed from the back surface 10b side while supported by the support substrate 40. Conventionally, in the manufacturing method of a semiconductor device, the step of cutting and singulating the substrate to form the semiconductor device 1 was performed while mounted on a dicing tape. Since the dicing tape 50 has elasticity, there was a problem that the substrate was not stable during cutting when the substrate was cut on the dicing tape, and damage was likely to occur on the cut surface. In contrast, according to the above-mentioned configuration, the substrate 10 is singulated while supported by the support substrate 40. Therefore, compared to the case where the substrate 10 is singulated on the dicing tape 50, the substrate 10 can be cut while being stably supported. As a result, damage is less likely to remain on the cut surface after the singulation step S70, and it is possible to provide a semiconductor device 1 with improved quality.
[0054] According to the above-mentioned configuration, the singulation step S70 is performed with the device surface 10a attached to the support substrate 40. Generally, in the singulation step S70, particles are likely to be generated during cutting, and these particles may scatter into the processing space and contaminate the device surface 10a. In particular, when the singulation step S70 is performed on the dicing tape 50, there is a risk that a part of the dicing tape 50 will be scraped off by the blade 9 performing the singulation step S70 and adhere to the device surface 10a, making it difficult to remove. According to the above-mentioned configuration, the device surface 10a is covered by the support substrate 40 via the adhesive 30, so that it is possible to suppress the particles generated in the singulation step S70 from adhering to the device surface 10a, and it is possible to provide a semiconductor device 1 with improved quality.
[0055] Moreover, according to the above-mentioned configuration, after the singulation step S70 is completed, the singulated base material 10 (semiconductor chip 10T) is mounted on the support substrate 40. Therefore, when processing the semiconductor chip 10T (for example, etching the side surface 10c) after the singulation step S70, it is possible to process the multiple semiconductor chips 10T on the support substrate 40 at once. In contrast, when the singulation step S70 is performed on the dicing tape 50 as in the conventional case, etching and other processing cannot be performed on the dicing tape 50 considering damage to the dicing tape 50. Therefore, in the conventional manufacturing method, it is necessary to move the singulated semiconductor chip 10T from the dicing tape 50 to the support base before processing. According to the above-mentioned configuration, when etching and other processing is performed on the singulated semiconductor chip 10T, the process of remounting the semiconductor chip 10T on the support base can be omitted, and the manufacturing process can be simplified.
[0056] 5, in the manufacturing method of the semiconductor device 1 of this embodiment, alignment lines L11, L12 that partition the base material 10 are provided on the device surface 10a. The recess is a groove portion 11 at least partially overlapping the alignment lines L11, L12 when viewed from the thickness direction of the base material 10.
[0057] According to this configuration, by using the recessed portion as a mark as the groove portion 11, by providing at least one groove portion 11, it becomes possible to align the substrate 10. Furthermore, by arranging the groove portion 11 so as to overlap the alignment lines L11, L12 when viewed from the thickness direction of the substrate 10, it becomes possible to perform the singulation step S70 by cutting along the groove portion 11. That is, it becomes easy to align the cutting line in the singulation step S70, and it becomes possible to manufacture the semiconductor device 1 with improved positional accuracy of the cutting line.
[0058] In the manufacturing method of the semiconductor device 1 of this embodiment, the substrate 10 is divided by the alignment lines L11, L12 into a plurality of effective sections S1, which are divided into rectangular shapes, and a plurality of removal sections S2, which are arranged along the outer edge. The groove portion 11 overlaps with the portions of the alignment lines L11, L12 that divide the removal sections S2 from each other.
[0059] This configuration makes it possible to prevent the cut surface of the groove 11 formed in the mark forming step S20 from forming the outer side surface of the final semiconductor device 1. Therefore, in the mark forming step S20, the forming means of the groove 11 and various conditions during the formation can be set with a priority on the processing speed rather than the state of the cut surface, and the time required for the mark forming step S20 can be shortened. As a result, the manufacturing time of the semiconductor device 1 can be shortened while maintaining the surface accuracy of the side surface 10c of the semiconductor device 1 to be manufactured.
[0060] 2, the manufacturing method of the semiconductor device 1 of this embodiment includes a film forming step S50 performed after the grinding step S40. The film forming step S50 is a step of forming a film portion 20 on the back surface 10b. As shown in FIGS. 12 to 17, the processing step is a photolithography step S60 in which a part of the film portion 20 is etched and removed using the mark (hole portion 12) as a reference.
[0061] According to this configuration, a photolithography step S60 can be performed as a processing step to etch a part of the film portion 20. That is, the alignment of the photomask 70 in the photolithography step S60 can be performed from the rear surface 10b side. This can improve the accuracy of the alignment of the photomask 70, and the concave grooves 22 can be formed in the film portion 20 with high positional accuracy.
[0062] 14, in the manufacturing method of the semiconductor device 1 of the present embodiment, alignment lines L11, L12 that partition the base material 10 are provided on the device surface 10a. In the photolithography step S60, the region (groove 22) where the film portion 20 is etched overlaps with the alignment lines L11, L12 when viewed from the thickness direction of the base material 10.
[0063] According to this configuration, the film portion 20 can be divided into individual pieces to the size of the electrode 20T of the semiconductor device 1 by the photolithography process S60. As a result, it is not necessary to cut the film portion 20 in the separate dividing process S70. If the film portion 20 is sufficiently thick (40 μm or more), a large load is applied to the substrate 10 when cutting the film portion 20 and the substrate 10 at the same time, which may cause damage to the substrate 10. In particular, since the substrate 10 is made of a brittle material such as silicon (Si) or silicon carbide (SiC), there is a risk of cracking the substrate 10 when the film portion 20 is connected to the lower side of the film portion 20, which is a sufficiently thick ductile material. By dividing the film portion 20 in the photolithography process S60, damage to the substrate 10 during cutting can be suppressed.
[0064] 2, the method for manufacturing the semiconductor device 1 of this embodiment includes a singulation step S70 that is performed after the photolithography step S60. The singulation step S70 is a step of cutting the base material 10 to separate the base material 10 into individual pieces.
[0065] When the film portion 20 is mechanically cut with a blade 9 or the like, burrs may occur from the film portion 20. Burrs occurring from the film portion 20 may affect subsequent processes, and therefore a separate process is required to process the burrs. According to the above-described configuration, the film portion 20 is singulated in advance in the photolithography process S60, and therefore no burrs are generated from the film portion 20 in the singulation process S70. Therefore, the singulation process S70 can be carried out smoothly.
[0066] As shown in FIG. 1, the semiconductor device 1 of this embodiment includes a plate-shaped semiconductor chip 10T made of a semiconductor material. The semiconductor chip 10T has a device surface 10a, a back surface 10b, and four side surfaces 10c. A circuit pattern is formed on the device surface 10a. The back surface 10b is located on the opposite side of the device surface 10a. The four side surfaces 10c connect the device surface 10a and the back surface 10b. At least one pair of the side surfaces 10c facing opposite to each other among the four side surfaces 10c are inclined in a direction approaching each other from the device surface 10a side toward the back surface 10b side.
[0067] By performing the singulation step S70 with the blade 9 from the back surface 10b side of the base material 10, the side surfaces 10c are inclined toward each other from the device surface 10a side toward the back surface 10b side. In other words, by having such side surfaces 10c, the above-mentioned manufacturing method can be adopted, and a semiconductor device 1 with improved quality can be provided.
[0068] Modifications that can be adopted in this embodiment will be described. In the present embodiment, a case has been described in which the film portion 20 is formed on the rear surface 10b of the substrate 10 in the film formation step S50, and a part of the film portion 20 is etched in the photolithography step S60. However, the semiconductor device 1 does not need to have the electrode 20T. In this case, in the method for manufacturing the semiconductor device 1, the film formation step S50 and the photolithography step S60 are omitted.
[0069] In this embodiment, as shown in FIG. 5, the groove 11 is disposed only between the removal sections S2, and is not disposed between the effective sections S1. Therefore, in this embodiment, the cut surface of the groove 11 as a mark does not appear as the side surface 10c of the semiconductor device 1, which is the final product. However, as in the modified example shown in FIG. 22, the groove 11A may be disposed on the alignment lines L11, L12 between the effective section S1 and the removal section S2. That is, the groove 11A may overlap with the portion of the alignment lines L11, L12 that defines the effective section S1. According to this modified example, the cut surface of the groove 11A formed in the mark forming step S20 can be used as the outer side surface of the semiconductor device 1, which is the final product. Therefore, in the singulation step S70, it is possible to omit some cutting steps, and the time required for the singulation step S70 can be shortened. The groove 11A may be disposed between the effective sections S1.
[0070] Next, the singulation process S70 for forming the groove portion 11A of the modified example will be described with reference to Fig. 22. The singulation process S70 includes a first cutting process for cutting the substrate 10 in a direction along the first alignment line L11, and a second cutting process for cutting the substrate 10 in a direction along the second alignment line L12.
[0071] In the first cutting step, first, the substrate 10 is cut along one groove portion 11A that overlaps with the first alignment line L11, and then the blade 9 is offset a predetermined distance in a direction perpendicular to the first alignment line L11 to cut the substrate 10. Furthermore, by repeating the procedure of cutting the substrate 10 after offsetting the blade 9 by the predetermined distance, the substrate 10 can be cut along all of the first alignment lines L11.
[0072] In the second cutting step, the substrate 10 is cut along the second alignment line L12 in the same procedure as in the first cutting step. That is, first, the substrate 10 is cut along one groove portion 11A that overlaps with the second alignment line L12, and then the blade 9 is offset by a predetermined distance in a direction perpendicular to the second alignment line L12 to cut the substrate 10. Furthermore, by repeating the procedure of cutting the substrate 10 after offsetting the blade 9 by a predetermined distance, the substrate 10 can be cut along all of the second alignment lines L12. Through the above steps, the substrate 10 is cut along all of the alignment lines L11 and L12, and all of the semiconductor chips 10T are taken out of the substrate 10.
[0073] Second Embodiment 23 is a flowchart showing a method for manufacturing the semiconductor device 1 of the second embodiment. In the following description of the embodiment, the same components as those in the already described embodiment are denoted by the same reference numerals, and the description thereof will be omitted.
[0074] The manufacturing method of the semiconductor device 1 of this embodiment includes a device surface forming step S10, a mark forming step S20, a first attaching step S30, a grinding step S40, a film forming step S50, a photolithography step S60, a second attaching step S170, a support substrate removing step S180, a singulation step S190, and a pick-up step S100. The manufacturing method of the semiconductor device 1 of the second embodiment is different from the first embodiment in that the order of the second attaching step S170, the support substrate removing step S180, and the singulation step S190 is different. In the second embodiment, the description of each step performed before the second attaching step S170 is omitted.
[0075] 24 is a schematic diagram showing the second attachment step S170 of this embodiment. The second attachment step S170 is performed in a state where the film portion 20 is supported by the support substrate 40. The second attachment step S170 is a step of attaching the surface on the film portion 20 side to the dicing tape 50. In this embodiment, the second attachment step S170 is performed immediately after the photolithography step S60 and before the singulation step S190. Therefore, at the stage of the second attachment step S170, the film portion 20 is singulated into a plurality of electrodes 20T, and the base material 10 is not singulated.
[0076] 25 is a schematic diagram showing the support substrate detaching step S180 of this embodiment. The support substrate detaching step S180 is a step of detaching the support substrate 40 from the base material 10. The support substrate detaching step S180 of this embodiment is performed in the same procedure as in the first embodiment.
[0077] FIG. 26 is a schematic diagram showing the singulation step S190 of this embodiment. The singulation step S190 of this embodiment is performed in a state where the surface on the film portion 20 side is attached to the dicing tape 50. The cutting of the substrate 10 is performed by a dicing device M using a blade 9. The singulation step S190 of this embodiment is performed from the device surface 10a side of the substrate 10. For this reason, the dicing device M cuts the substrate 10 along the alignment lines L11 and L12 by the imaging device C. In the singulation step S190 of this embodiment, since the film portion 20 has been singulated in advance, the blade 9 cuts only the substrate 10.
[0078] Next, the effects of the second embodiment will be described. The method for manufacturing the semiconductor device 1 of this embodiment has a photolithography step S60 similar to that of the first embodiment. That is, the photomask 70 can be aligned by aligning from the rear surface 10b side using the marks (holes 12) as references.
[0079] The manufacturing method of the semiconductor device 1 of this embodiment includes a second attachment step S170 performed after the photolithography step S60, and a support substrate detachment step S180 performed after the second attachment step S170 and before the singulation step S190. The second attachment step S170 is a step of attaching the surface on the film portion 20 side to a dicing tape 50 in a state where the support substrate 40 is supported by the support substrate 40. The support substrate detachment step S180 is a step of detaching the support substrate 40 from the base material 10. The singulation step S190 is performed in a state where the surface on the film portion 20 side is attached to the dicing tape 50.
[0080] Conventionally, a singulation step was performed in which the film portion and the base material were simultaneously cut on a dicing tape. In the conventional method, when the film portion was a metal film, burrs were generated from the cut portion toward the dicing tape due to the ductility of the metal. In addition, the burrs of the film portion were sometimes embedded in the dicing tape, making it difficult to pick up the semiconductor device. In contrast, according to the above-mentioned configuration, although the singulation step S190 is performed on the dicing tape 50, since the film portion 20 is singulated in advance, no burrs are generated from the film portion 20, and the above-mentioned problem does not occur. As a result, it is possible to stably manufacture the semiconductor device 1. In addition, according to this configuration, since the singulation step S190 can be performed on the dicing tape 50, it is possible to eliminate the concern that the adhesive 30 will damage the blade 9, compared to the case where the singulation step is performed on the support substrate 40.
[0081] According to at least one of the embodiments described above, by exposing the recesses (groove portion 11 and hole portion 12) on the back surface 10b side to serve as markers, it becomes possible to align the substrate 10 from the back surface 10b side, and a manufacturing method for the semiconductor device 1 can be provided that facilitates the alignment of the substrate 10 during the process.
[0082] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]
[0083] 1...semiconductor device, 10...substrate, 10a...device surface, 10b...back surface (ground surface), 11, 11A...groove portion (recess, mark), 12...hole portion (recess, mark) 20...film portion, 40...support substrate, 50...dicing tape, h, H...thickness, L11...alignment line, S1...effective section, S2...removal section, S20...mark formation step, S30...first attachment step, S40...grinding step, S50...film formation step, S60...photolithography step (processing step), S70...single step (processing step), S80, S170...second attachment step, S90, S180...support substrate removal step, S190...single step
Claims
1. a mark forming step of forming a recess on a device surface of a substrate made of a semiconductor material on which a circuit pattern is to be formed; a first bonding step of bonding the device surface to a support substrate; a grinding step of grinding a surface of the base material opposite to the device surface while the base material is supported by the support substrate to form a ground surface; and a processing step of processing the substrate from the grinding surface side while the substrate is supported by the support substrate, In the grinding step, the recess is exposed on the grinding surface to serve as a mark; In the processing step, the processing is performed based on the mark. A method for manufacturing a semiconductor device.
2. The processing step is a singulation step of cutting the base material using the mark as a reference while the base material is supported on the support substrate, and singulating the base material. The method for manufacturing a semiconductor device according to claim 1 .
3. The device surface is provided with an alignment line that defines the base material; The recess is a groove at least a part of which overlaps with the alignment line when viewed in a thickness direction of the base material. The method for manufacturing a semiconductor device according to claim 2 .
4. The substrate is divided by the alignment lines into a plurality of effective sections that are rectangular in shape and a plurality of removal sections that are arranged along an outer edge of the substrate; The groove portion overlaps with a portion of the alignment line that separates the removal sections. The method for manufacturing a semiconductor device according to claim 3 .
5. The substrate is divided by the alignment lines into a plurality of effective sections that are rectangular in shape and a plurality of removal sections that are arranged along an outer edge of the substrate; The groove portion overlaps with a portion of the alignment line that defines the effective section. The method for manufacturing a semiconductor device according to claim 3 .
6. A film forming process for forming a film portion on the grinding surface, which is performed after the grinding process, The processing step is a photolithography step in which a part of the film portion is etched and removed using the mark as a reference. The method for manufacturing a semiconductor device according to claim 1 .
7. The device surface is provided with an alignment line that defines the base material; In the photolithography process, a region where the film portion is etched overlaps the alignment line when viewed in a thickness direction of the base material. The method for manufacturing a semiconductor device according to claim 6 .
8. A singulation process is performed after the photolithography process, in which the base material is cut and the base material is singulated. The method for manufacturing a semiconductor device according to claim 7 .
9. a second attachment step performed after the photolithography step, in which the surface of the film portion side is attached to a dicing tape while being supported by the support substrate; A support substrate detachment process, which is performed after the second attachment process and before the singulation process, of detaching the support substrate from the base material, The singulation step is performed in a state where the surface on the film portion side is attached to the dicing tape. The method for manufacturing a semiconductor device according to claim 8 .
Citation Information
Patent Citations
Manufacturing method of device
JP2016096265A