Display device, electronic apparatus, and method for driving display device

JP2025024874APending Publication Date: 2025-02-21NIPPON HOSO KYOKAI
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2023129222
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-08
Publication Date
2025-02-21

AI Technical Summary

Benefits of technology

【0016】 本発明によれば、走査時間を短縮することなく、消費電力の増加を抑制しながら、動画ぼやけを改善し、総合的画質を向上させることが可能な表示装置、電子機器及び表示装置の駆動方法を提供することができる。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025024874000001_ABST
    Figure 2025024874000001_ABST
Patent Text Reader

Abstract

To reduce moving-image blurs and improve overall image quality while suppressing an increase in power consumption, without shortening a scan time.SOLUTION: A display device is provided with a plurality of pixel blocks, and a pixel selection line for each pixel block for selecting an effective pixel. A pixel block includes a plurality of pixel circuits, each of which comprises a capacitor, an image forming element, a first transistor for supplying a current corresponding to the electric charge accumulated in the capacitor to the image forming element, a second transistor for supplying an electric charge to the capacitor, and a third transistor for controlling whether or not to drive the second transistor and controlled by the pixel selection line.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a display device, an electronic device, and a method for driving a display device. [Background technology]

[0002] In recent years, liquid crystal displays and organic EL (Electroluminescence) displays have become widely used as display devices for smartphones and televisions. These display devices use an active matrix driving method (TFT) and display the same image continuously for one frame. Display devices using the active matrix driving method are called hold type display devices, in contrast to impulse type display devices such as CRTs that were used before these display devices became mainstream.

[0003] It is known that in hold-type display devices, when a displayed object moves on the screen, the image appears blurred due to the integral effect of the eye, as the human eye follows the object. To prevent this hold blur, methods have been proposed to increase the frame rate of the display and to suppress the apparent blur by inserting black display (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-76034 A Summary of the Invention [Problem to be solved by the invention]

[0005] The method of inserting black display as described in the above-mentioned Patent Document 1 is prone to image quality interference such as "flicker" where the screen appears to flicker and "strobe effect" where moving objects appear double. Therefore, in order to improve the quality of moving images, it is desirable to increase the frame rate.

[0006] Display devices that use the active matrix driving method rewrite the screen by scanning each line sequentially. Therefore, in order to improve the frame rate of a display device, it is necessary to shorten the scanning time for one line. For example, the scanning time for one line needs to be reduced by half for double-speed display, and by a quarter for quadruple-speed display. Active matrix display devices for televisions generally use oxide TFTs as the backplane for driving the pixels, which limits the reduction in scanning time. In addition, high-speed driving significantly increases power consumption. Therefore, there was an issue that it was difficult to achieve high frame rates with high resolution.

[0007] Therefore, the present invention aims to provide a display device, electronic device, and a method for driving a display device that can improve moving image blur and improve overall image quality while suppressing an increase in power consumption without shortening the scanning time. [Means for solving the problem]

[0008] [1] In order to solve the above problems, one aspect of the present invention is a display device comprising a plurality of pixel blocks and a pixel selection line for selecting an effective pixel for each of the pixel blocks, wherein the pixel blocks comprise a plurality of pixel circuits, and the pixel circuit comprises a capacitance, an image forming element, a first transistor for supplying a current to the image forming element corresponding to an amount of charge stored in the capacitance, a second transistor for supplying charge to the capacitance, and a third transistor controlled by the pixel selection line for controlling whether or not the second transistor is driven.

[0009] [2] Furthermore, one aspect of the present invention is a display device according to the above item [1], further comprising a signal processing unit that acquires information regarding a region corresponding to an amount of change in pixel value for each control unit including a plurality of the pixel circuits, and the signal processing unit controls the conduction state of the third transistor in different drive modes depending on the region.

[0010] [3] Furthermore, in one aspect of the present invention, in the display device described in [2] above, the signal processing unit compares successive frame images and makes a judgment according to the amount of change in pixel value, thereby obtaining information regarding the area according to the amount of change in pixel value.

[0011] [4] Moreover, in one aspect of the present invention, in the display device described in [2] or [3] above, the information regarding the region acquired by the signal processing unit includes a dynamic region, which is a region in which pixel values ​​change greatly, and a still region, which is a region in which pixel values ​​change little, and the signal processing unit controls the conduction state of the third transistor in the still region by driving in a standard drive mode in which pixel values ​​are controlled on a frame-by-frame basis, and controls the conduction state of the third transistor in the dynamic region by driving in a high-speed drive mode in which pixel values ​​are controlled on a sub-frame basis obtained by time-dividing one frame.

[0012] [5] Furthermore, in one aspect of the present invention, in the display device described in [4] above, in the standard drive mode, the plurality of pixel circuits included in the pixel block are controlled in sequence on a sub-frame basis, and pixel values ​​for all of the pixel circuits included in the pixel block are updated during one frame period.

[0013] [6] Moreover, one aspect of the present invention is the display device described in [4] above, wherein in the high-speed drive mode, all of the pixel circuits included in the pixel block are controlled simultaneously for each subframe unit.

[0014] [7] Another embodiment of the present invention is an electronic device including the display device described in any one of [1] to [6] above.

[0015] [8] Also, one aspect of the present invention is a method for driving a display device having a pixel block including a plurality of pixel circuits each including at least a capacitance and an image forming element, a plurality of the pixel blocks, and a pixel selection line for selecting an effective pixel for each of the pixel blocks, the method comprising a first transfer step of supplying a current corresponding to an amount of charge stored in the capacitance to the image forming element, a second transfer step of supplying charge to the capacitance, and a third transfer step of controlling whether or not to perform the second transfer step by the pixel selection line. Effect of the Invention

[0016] According to the present invention, it is possible to provide a display device, an electronic device, and a method for driving a display device that can improve moving image blur and improve overall image quality while suppressing an increase in power consumption without shortening the scanning time. [Brief description of the drawings]

[0017] [Figure 1] 2 is a block diagram showing an example of a functional configuration of the display device according to the present embodiment. FIG. [Diagram 2] 2 is a block diagram showing an example of the configuration of a pixel block included in a display panel according to the present embodiment. FIG. [Diagram 3] 2 is a circuit diagram showing an example of a circuit configuration of a pixel circuit according to the embodiment; [Figure 4] 5 is a timing chart showing an example of changes in a drive signal in a standard drive mode according to the present embodiment. [Diagram 5] 5 is a timing chart showing an example of changes in a drive signal in a high-speed drive mode according to the present embodiment. [Figure 6] 2 is a block diagram showing an example of the configuration of a pixel block included in a color display panel according to the present embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] [Embodiment] A display device, an electronic device, and a display device driving method according to the present invention will be described in detail below with reference to the accompanying drawings, with preferred embodiments presented. The present invention is not limited to these embodiments, and includes various modifications or improvements. In other words, the components described below include those that a person skilled in the art can easily imagine, and those that are substantially the same, and the components described below can be appropriately combined. In addition, various omissions, substitutions, or modifications of the components can be made without departing from the gist of the present invention. In addition, in the following drawings, the scale and number of each structure may be different from the scale and number of the actual structure in order to make each structure easier to understand.

[0019] FIG. 1 is a block diagram showing an example of the functional configuration of a display device according to this embodiment. First, an example of the functional configuration of a display device 10 will be described with reference to the figure. In the following description, an example will be described in which the display device 10 is an active matrix organic EL (Electroluminescence) display. However, the embodiment of the display device 10 is not limited to this example, and a wide range of active matrix displays using other methods are included. The display device 10 includes a video input unit 11, a signal processing unit 12, a column driver unit 13, a row driver unit 14, and a display panel 15.

[0020] A video signal is input to the video input unit 11. The video signal includes a plurality of frame image data. The video signal input to the video input unit 11 may be, for example, 4K240p (i.e., a screen resolution of 3840×2160 [pixels] and a frame rate of 240 [FPS]). When a video signal is input to the video input unit 11, image data included in the video signal is temporarily stored in an input buffer (not shown). The image data stored in the input buffer is sequentially provided to the downstream signal processing unit 12 in accordance with the processing timing. The image data temporarily stored in the input buffer is, in other words, frame image data constituting the video signal.

[0021] The signal processing unit 12 acquires information about each predetermined control unit (in the following description, the predetermined control unit may be simply referred to as a region). The information about the region is determined according to the amount of change in pixel values ​​included in the region. The region includes multiple pixel circuits. The region may be in pixel block units, or may include multiple pixel blocks. In the following description, an example will be described in which the control unit is a pixel block unit including multiple pixel circuits (e.g., 16 pixel circuits).

[0022] The information regarding the region may be input to the video input unit 11 in synchronization with the video signal, or may be determined by the display device 10 by analyzing the video signal. In the following description, an example will be described in which the signal processing unit 12 determines the information regarding the region by analyzing the video signal input to the video input unit 11.

[0023] The signal processing unit 12, for example, compares consecutive frame images included in the video signal input to the video input unit 11 and makes a judgment according to the amount of change in pixel value to obtain information about the region. The consecutive frame images are preferably adjacent frame images, but do not necessarily have to be adjacent frame images, and may be different frame images among multiple frame images included in the same video signal. Specifically, the signal processing unit 12 judges whether the region is a moving region or a still region based on the amount of change in pixel value between consecutive frame images. A moving region is a region where the change in pixel value is large. A still region is a region where the change in pixel value is small.

[0024] The signal processing unit 12 controls the display in different drive modes depending on the region. Specifically, the signal processing unit 12 drives a region determined to be a moving region in the high-speed drive mode. Also, the signal processing unit 12 drives a region determined to be a still region in the standard drive mode. The signal processing unit 12 generates a panel control signal and image data signal according to the high-speed drive mode or the standard drive mode. The signal processing unit 12 controls the display by outputting the generated panel control signal and image data signal to the column driver unit 13 and the row driver unit 14.

[0025] The column driver unit 13 transmits the panel control signal and the image data signal output from the signal processing unit 12 to the display panel 15. Specifically, a plurality of image data signal lines arranged in the vertical direction and pixel selection lines for selecting pixels (pixel blocks) to be driven are connected to the column driver unit 13. The pixel selection lines select effective pixels for each pixel block or for each pixel. The column driver unit 13 supplies image data signals to each of the plurality of image data signal lines and pixel block selection signals to each of the plurality of pixel selection lines.

[0026] The row driver section 14 transmits the panel control signal output from the signal processing section 12 to the display panel 15. More specifically, a plurality of selection signal lines arranged in the horizontal direction are connected to the row driver section 14. The row driver section 14 supplies a row selection signal, which is a panel control signal, to each of the plurality of selection signal lines.

[0027] FIG. 2 is a block diagram showing an example of the configuration of a pixel block included in a display panel according to this embodiment. The display device 10 includes a plurality of pixel blocks 20. The plurality of pixel blocks 20 are arranged in a matrix on the display device 10. An example of the configuration of one pixel block 20 will be described with reference to the same figure. In the following description, the pixel block 20 shows an example of the configuration when the display panel 15 is an organic EL panel. However, this embodiment is not limited to this example, and any active matrix display may be used.

[0028] One pixel block 20 includes a plurality of pixel circuits. In the illustrated example, one pixel block 20 includes 4×4 pixel circuits. Furthermore, 2×2 is one sub-block, and one sub-block includes four pixel circuits A, B, C, and D. In the following description, a sub-block including pixel circuits A1, B1, C1, and D1 may be referred to as a first sub-block. Similarly, a sub-block including pixel circuits A2 to D2 may be referred to as a second sub-block, a sub-block including pixel circuits A3 to D3 may be referred to as a third sub-block, and a sub-block including pixel circuits A4 to D4 may be referred to as a fourth sub-block. According to this embodiment, the sub-block is used as one control unit, and standard drive mode and high-speed drive mode can be switched. That is, the signal processing unit 12 uses 2×2 pixel circuits as one control unit and determines whether each control unit is a moving region or a stationary region.

[0029] As shown in the figure, in the pixel block 20, a plurality of data lines DATA_E, DATA_O and pixel selection lines SL_A, SL_B, SL_C, SL_D are arranged in the vertical direction. The data line DATA_E supplies a data signal to the third sub-block and the fourth sub-block. The data line DATA_O supplies a data signal to the first sub-block and the second sub-block. The pixel selection line SL_A selects the pixel circuits A1 to A4 included in each sub-block. Similarly, the SL_B selects the pixel circuits B1 to B4 included in each sub-block, the SL_C selects the pixel circuits C1 to C4 included in each sub-block, and the SL_D selects the pixel circuits D1 to D4 included in each sub-block. A plurality of row selection lines SCN are arranged in the horizontal direction. In the intersection areas of the plurality of data lines DATA and the pixel selection lines SL and the plurality of row selection lines SCN, pixel circuits are arranged in a matrix.

[0030] The pixel selection line SL and row selection line SCN are connected to one block (4×4 pixels). Also, the data line is connected to one sub-block (2×2 pixels). Furthermore, although not shown, each pixel can receive an anode voltage Vdd and a cathode voltage Vss for power supply.

[0031] 3 is a circuit diagram showing an example of a circuit configuration of a pixel circuit according to this embodiment. With reference to the same figure, an example of the circuit configuration of the pixel circuit 30 will be described. The pixel circuit 30 has a light emitting element Del, a capacitance C1, a first transistor Tr1, a second transistor Tr2, and a third transistor Tr3 as a circuit configuration.

[0032] Specifically, the light-emitting element Del is an organic EL element. The light-emitting element Del may be a light-emitting diode (LED) or the like. The light-emitting element Del has a cathode connected to a cathode power line Vss, and an anode connected to an anode power line Vdd via a collector-emitter gap of the first transistor Tr1. The present embodiment is not limited to an example of a case where a self-emitting element such as an organic EL element or a light-emitting diode is used, and can also be applied to a liquid crystal panel (Liquid Crystal Display; LCD) having a configuration including a light modulation element and a backlight. In the following description, the term "image forming element" may be used as a higher-level concept that broadly includes pixels for forming an image such as an organic EL element, a light-emitting diode, and a light modulation element. The following description will be given of an example of a case where the light-emitting element Del is used as an image forming element.

[0033] The capacitance C1 is a storage capacitor. One end of the capacitance C1 is connected to the anode power supply line Vdd, and the other end is connected between the gate of the first transistor Tr1 and the second transistor Tr2. When the second transistor Tr2 is ON, capacitance is stored in the capacitance C1 according to the value of the data line DATA.

[0034] Specifically, the first transistor Tr1, the second transistor Tr2, and the third transistor Tr3 may be thin film transistors (TFTs). Note that the first transistor Tr1, the second transistor Tr2, and the third transistor Tr3 are not limited to the example of thin film transistors, and may be other switching elements that control an electrical conduction state.

[0035] The first transistor Tr1 supplies a current corresponding to the amount of charge stored in the capacitance C1 to the light-emitting element Del. The second transistor Tr2 is controlled by the third transistor Tr3 and supplies a charge corresponding to the value of the data line DATA to the capacitance C1. The third transistor Tr3 is controlled by a pixel selection line SL and controls whether the second transistor Tr2 is driven. Specifically, the conductive state of the third transistor Tr3 is controlled by the signal processor 12. The signal processor 12 controls the conductive state of the third transistor Tr3 in different drive modes depending on the region. The pixel circuit 30 according to this embodiment includes the third transistor Tr3 and the pixel selection line SL, and thus is capable of controlling the light-emitting element Del for each pixel or for each pixel block.

[0036] During display operation, a voltage is applied to the row selection line SCN, and while the second transistor Tr2 and the third transistor Tr3 are ON, a voltage Vda corresponding to the value of the data line DATA is charged to the capacitor C1. The current flowing through the first transistor Tr1 is adjusted according to the voltage Vda charged to the capacitor C1, and the current flowing through the light-emitting element Del is controlled.

[0037] Next, an example of a method for driving the display device 10 according to the present embodiment will be described with reference to Figs. 4 and 5. Here, an example is used in which the standard drive mode is a 60 Hz display and the high-speed drive mode is a 240 Hz display. That is, the high-speed drive mode has a frame rate four times that of the standard drive mode. However, the present embodiment is not limited to this example, and drive control may be performed at other frequencies.

[0038] FIG. 4 is a timing chart showing an example of changes in drive signals in the standard drive mode according to the present embodiment. With reference to the same figure, an example of a method for driving the display device 10 in the standard drive mode will be described. The same figure shows changes over time for the row selection line SCN, pixel selection line SL_A, pixel selection line SL_B, pixel selection line SL_C, pixel selection line SL_D, data line DATA_O, and data line DATA_E. All of these signals are digital signals expressed in two values. For the physical connections of these signals, refer to FIG. 2.

[0039] First, a voltage is applied to the pixel selection line SL_A at the timing when a voltage is applied to the row selection line SCN. At this time, a charge according to the voltage of the data line DATA_O(i) is stored in the capacitance of the pixel A1, and a charge according to the voltage of the data line DATA_E(i) is stored in the capacitance of the pixel A3. A current flows through the light-emitting element Del of the pixel A1 according to the amount of charge stored in the capacitance of the pixel A1, and the organic EL element emits light. Also, a current flows through the light-emitting element Del of the pixel A3 according to the amount of charge stored in the capacitance of the pixel A3, and the organic EL element emits light. Similarly, a charge according to the voltage of the data line DATA_O(i+1) is stored in the capacitance of the pixel A2, and a charge according to the voltage of the data line DATA_E(i+1) is stored in the capacitance of the pixel A4. A current flows through the light-emitting element Del of the pixel A2 according to the amount of charge stored in the capacitance of the pixel A2, and the organic EL element emits light. Furthermore, a current flows through the light emitting element Del of pixel A4 according to the amount of charge stored in the capacitance of pixel A4, causing the organic EL element to emit light. The voltage applied to the row selection line SCN is turned off after a predetermined time has elapsed.

[0040] 1 / 240 [sec] after the voltage starts to be applied to the row selection line SCN, a voltage is applied to the row selection line SCN again. At this timing, a voltage is applied to the pixel selection line SL_B next. At this time, a charge according to the voltage of the data line DATA_O(i) is stored in the capacitance of the pixel B1, and a charge according to the voltage of the data line DATA_E(i) is stored in the capacitance of the pixel B3. A current flows through the light-emitting element Del of the pixel B1 according to the amount of charge stored in the capacitance of the pixel B1, and the organic EL element emits light. Also, a current flows through the light-emitting element Del of the pixel B3 according to the amount of charge stored in the capacitance of the pixel B3, and the organic EL element emits light. Similarly, a charge according to the voltage of the data line DATA_O(i+1) is stored in the capacitance of the pixel B2, and a charge according to the voltage of the data line DATA_E(i+1) is stored in the capacitance of the pixel B4. According to the amount of charge stored in the capacitance of pixel B2, a current flows through the light-emitting element Del of pixel B2, causing the organic EL element to emit light. Also, according to the amount of charge stored in the capacitance of pixel B4, a current flows through the light-emitting element Del of pixel B4, causing the organic EL element to emit light. The voltage applied to the row selection line SCN is turned off after a predetermined time has elapsed.

[0041] Although the pixel selection lines SL_C and SL_D are not illustrated, such a process is repeated at intervals of 1 / 240 [sec]. By sequentially scanning such a process from the top horizontal line of the display panel 15, the pixels corresponding to pixel A are similarly sequentially scanned during 1 / 240 [sec], and writing of 1 / 4 of the pixels in the entire panel is completed. Furthermore, during the next 1 / 240 [sec], the pixels corresponding to pixel B are similarly sequentially scanned and writing is completed. During the next 1 / 240 [sec], pixel C is sequentially scanned, and during the next 1 / 240 [sec], pixel D is sequentially scanned and writing is completed. Therefore, it is possible to complete writing of all pixels in 1 / 60 [sec].

[0042] As described above, in the still region, the pixel values ​​of pixels A to D are updated every frame. That is, in the still region, driving is performed in the standard drive mode in which the pixel values ​​are controlled every frame. In this case, the signal processing unit 12 controls the conductive state of the third transistor in the standard drive mode. In the standard drive mode, the pixel circuits 30 included in the pixel block 20 are controlled in sequence on a subframe basis, and the pixel values ​​of all the pixel circuits 30 included in the pixel block are updated in one frame period.

[0043] 5 is a timing chart showing an example of changes in drive signals in the high-speed drive mode according to the present embodiment. With reference to the same figure, an example of a method for driving the display device 10 in the high-speed drive mode will be described. As in FIG. 4, FIG. 5 also shows changes over time for the row selection line SCN, pixel selection line SL_A, pixel selection line SL_B, pixel selection line SL_C, pixel selection line SL_D, data line DATA_O, and data line DATA_E.

[0044] First, at the timing when a voltage is applied to the row selection line SCN, voltages are simultaneously applied to the pixel selection lines SL_A, SL_B, SL_C, and SL_D. At this time, charges according to the voltage of the data line DATA_O(i) are stored in the capacitances of the pixels A1, B1, C1, and D1. Charges according to the voltage of the data line DATA_E(i) are stored in the capacitances of the pixels A3, B3, C3, and D3. Current flows through the light-emitting element Del of each pixel according to the amount of charge stored in the capacitance corresponding to each pixel, and the organic EL element emits light. Similarly, charges according to the voltage of the data line DATA_O(i+1) are stored in the capacitances of the pixels A2, B2, C2, and D2. Furthermore, electric charges corresponding to the voltage of the data line DATA_E(i+1) are stored in the capacitances of pixels A4, B4, C4, and D4. A current flows through the light-emitting element Del of each pixel according to the amount of electric charge stored in the capacitance corresponding to each pixel, causing the organic EL element to emit light.

[0045] In this way, in the high-speed drive mode, writing to all pixels of the panel can be completed within 1 / 240 seconds. 1 / 240 [sec] after the start of application of voltage to the row selection line SCN, voltage is applied to the row selection line SCN again, and voltage is simultaneously applied to the pixel selection lines SL_A, SL_B, SL_C, and SL_D. Although a description of the subsequent process is omitted, by repeating the same process thereafter, it becomes possible to display an image at 240 [Hz] (i.e., at four times the speed of the standard drive mode).

[0046] In the panel configuration and driving method of the display device 10, the timing at which voltages are applied to the row selection line SCN, the data line DATA_O, and the data line DATA_E is the same in both the standard driving mode and the high-speed driving mode. According to this embodiment, it is possible to select the standard driving mode or the high-speed driving mode by controlling the operations of the pixel selection line SL_A, the pixel selection line SL_B, the pixel selection line SL_C, and the pixel selection line SL_D for each predetermined control unit.

[0047] As described above, in the dynamic region, driving is performed in the high-speed driving mode in which pixel values ​​are controlled in units of subframes obtained by time-dividing one frame. In this case, the signal processing unit 12 controls the conductive state of the third transistor in the high-speed driving mode. In the high-speed driving mode, all pixel circuits 30 included in the pixel block 20 are simultaneously controlled in units of subframes.

[0048] By adopting such a configuration, it becomes possible to display an image at an appropriate frame rate in any region without shortening the scanning time. Therefore, according to this embodiment, it becomes possible to improve the overall image quality while suppressing power consumption.

[0049] FIG. 6 is a block diagram showing an example of the configuration of a pixel block included in a color display panel according to this embodiment. With reference to the same figure, an example of the configuration of a pixel block 20A included in a color display panel will be described. The pixel block 20A is a modified example of the pixel block 20. The pixel block 20A differs from the pixel block 20 in that, instead of each pixel of the pixel block 20, the pixel block 20A includes pixels of each color of R (Red), G (Green), and B (Blue). In the pixel block 20A, instead of the data line DATA_O, the pixel block 20A includes data lines DATAr_O, DATAg_O, and DATAb_O to correspond to the pixels of each color of RGB. Also, instead of the data line DATA_E, the pixel block 20A includes data lines DATAr_E, DATAg_E, and DATAb_E.

[0050] For the sake of simplicity, the description of subpixels has been omitted in the example of the configuration described with reference to Figures 1 to 5. However, by configuring an organic EL panel as shown in Figure 6, the configuration of the display device 10 according to this embodiment can also be used in a color display panel.

[0051] In addition, in the above example, an example was described in which the pixel block unit was 4 x 4 pixels, but it is possible to drive an area of ​​any size, such as 8 x 8 pixels, as a pixel block unit in the same manner as the above example.

[0052] In the above example, an example of displaying a video signal on an organic EL panel has been described, but the display element of the display device 10 according to the present embodiment is not limited to this example. According to the present embodiment, regardless of the type of display element, it is also possible to apply the present invention to a liquid crystal display (LCD) panel, a light-emitting diode (LED) display, and the like.

[0053] Moreover, the display device 10 according to the present embodiment can be widely applied to output devices for computers to output video signals. Specifically, a digital camera can be exemplified as an example of an electronic device equipped with the display device 10. For example, the display device 10 may be applied to the back surface of a digital camera. Also, the display device 10 may be applied to an electronic viewfinder (EVF) of a digital camera. Also, a smartphone, a tablet terminal device, etc. can be exemplified as an example of an electronic device equipped with the display device 10. For example, the display device 10 may be applied to a display unit of a smartphone, a tablet terminal device, etc.

[0054] Moreover, a head mounted display can be exemplified as an example of an electronic device equipped with the display device 10. The head mounted display is a wearable terminal device having a temple portion, a bridge portion, and a lens portion similar to glasses. A display device 10 for the left eye and a display device 10 for the right eye are provided on the inside of the bridge. Images displayed on the display device 10 for the left eye and the display device 10 for the right eye may be incident on both eyes via an optical lens system.

[0055] The effects described in this specification are merely explanatory or exemplary and are not limiting. In other words, the technology according to the present disclosure may have other effects that are apparent to a person skilled in the art from the description of this specification, in addition to or in place of the above effects. Furthermore, the present invention is not limited to these embodiments, and various modifications and substitutions can be made within the scope of the present invention. [Explanation of symbols]

[0056] 10 Display device 11 Video input section 12 Signal Processing Section 13 Column driver section 14 Row driver section 15 Display Panel 20 pixel blocks 30 Pixel circuit Tr1 First transistor Tr2 Second transistor Tr3 Third transistor C1 capacity Del Light Emitting Device SL Pixel selection line SCN Row selection line DATA Data line Vdd anode power line Vss cathode power line

Claims

1. A plurality of pixel blocks; A display device comprising a pixel selection line for selecting an effective pixel for each pixel block, The pixel block includes a plurality of pixel circuits, The pixel circuit includes: Capacity and An image forming element; a first transistor that supplies a current corresponding to an amount of charge stored in the capacitance to the image forming element; a second transistor that supplies a charge to the capacitor; a third transistor that is controlled by the pixel selection line and controls whether or not the second transistor is driven. Display device.

2. A signal processing unit that acquires information about a region according to an amount of change in pixel value for each control unit including a plurality of the pixel circuits, The signal processing unit controls the conduction state of the third transistor in different driving modes depending on the region. The display device according to claim 1 .

3. The signal processing unit obtains information about a region according to the amount of change in pixel value by comparing successive frame images and making a determination according to the amount of change in pixel value. The display device according to claim 2 .

4. The information on the region acquired by the signal processing unit includes a dynamic region, which is a region where pixel values ​​change significantly, and a static region, which is a region where pixel values ​​change only slightly. The signal processing unit includes: In the still region, the pixel value is controlled every frame in a standard drive mode, thereby controlling the conduction state of the third transistor; In the dynamic region, the conductive state of the third transistor is controlled by driving in a high-speed driving mode in which pixel values ​​are controlled in subframe units obtained by time-dividing one frame. The display device according to claim 2 .

5. In the standard drive mode, the pixel circuits included in the pixel block are controlled in sequence in units of subframes, and pixel values ​​for all the pixel circuits included in the pixel block are updated during one frame period. The display device according to claim 4.

6. In the high-speed drive mode, all of the pixel circuits included in the pixel block are simultaneously controlled for each subframe. The display device according to claim 4.

7. An electronic device comprising the display device according to claim 1 .

8. A pixel block including a plurality of pixel circuits each including at least a capacitance and an image forming element, a pixel selection line for selecting an effective pixel for each pixel block, a first transfer step of supplying a current corresponding to an amount of charge stored in the capacitance to the image forming element; a second transfer step of supplying charge to the capacitance; and a third transfer step of controlling whether or not the second transfer step is performed by the pixel selection line. A method for driving a display device.

Citation Information

Patent Citations

  • Image display device and method for driving the same

    JP2011076034A