Antiparallel diode

JP2025029336APending Publication Date: 2025-03-06KANAZAWA INSTITUTE OF TECHNOLOGY
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2023133891
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-21
Publication Date
2025-03-06

AI Technical Summary

Benefits of technology

【0013】 本発明に係るアンチパラレルダイオードの動作機構を図2にて説明する。 図2は、実施例の1つとして第1単位ダイオードとしてのダイオードAと第2単位ダイオードとしてのダイオードBとを点対称に配置した例である。 負荷側に接続される接続点1において、電気長(線路長)θ1とθ2とが等しく、接続点2において電気長θ3とθ4とが等しいため、各ダイオードで発生した偶数次高調波は接続点で相殺される。 これにより本発明は、偶高調波ミクサに適している。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025029336000001_ABST
    Figure 2025029336000001_ABST
Patent Text Reader

Abstract

To provide an antiparallel diode that has excellent symmetry between the individual diodes that make up the antiparallel diode and has improved ability to suppress even-order harmonics.SOLUTION: A first unit diode and a second unit diode are arranged antiparallel, the first and second unit diodes have a first ohmic electrode and a second ohmic electrode arranged in parallel, and a gate electrode arranged in parallel between the first and second ohmic electrodes and connected to the first ohmic electrode, an electrical length between a first connection point connected to a first load and the first ohmic electrode of the first unit diode is equal to an electrical length between the first connection point and the second ohmic electrode of the second unit diode, and an electrical length between a second connection point connected to a second load and the second ohmic electrode of the first unit diode is equal to an electrical length between the second connection point and the first ohmic electrode of the second unit diode.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a high-frequency device that performs frequency conversion while suppressing even harmonics of an input wave. [Background technology]

[0002] When anti-parallel diodes are used in an even harmonic mixer, the LO frequency can be lowered compared to when a single diode is used, and even-order spurious emissions can be suppressed without the need for a filter. However, when a gated anode diode (GAD), which forms a diode between the drain electrode (or source electrode) connected to the gate electrode and the source electrode (or drain electrode), is used as an anti-parallel diode, a higher output power can be obtained than with a Schottky barrier diode (SBD). However, there is a technical issue in that there is a difference in the line length (electrical length) from the electrode of each diode to the connection point connecting to the load side, which reduces the amount of suppression of even-order harmonics at the connection point. To explain this using Figure 12, there was an issue between Diode A and Diode B, where a difference occurred between the electrical length θ1 indicated by the white arrow and the electrical length θ2 indicated by the black arrow with respect to connection point 1 connected to load 1, and where a difference occurred between the electrical length θ3 indicated by the black arrow and the electrical length θ4 indicated by the white arrow with respect to connection point 2 connected to load 2.

[0003] For example, Patent Document 1 and the like disclose the use of an anti-parallel diode pair in a mixer, but does not relate to symmetry between the two diodes. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2001-313530 A Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide an anti-parallel diode that has excellent symmetry between the diodes that constitute the anti-parallel diode and has an improved effect of suppressing even-order harmonics. [Means for solving the problem]

[0006] An anti-parallel diode according to the present invention includes a first unit diode and a second unit diode arranged in anti-parallel, the first and second unit diodes having a first ohmic electrode and a second ohmic electrode arranged in parallel, and a gate electrode arranged in parallel between the first and second ohmic electrodes and connected to the first ohmic electrode, wherein an electrical length between a first connection point connected to a first load and the first ohmic electrode of the first unit diode is equal to an electrical length between the first connection point and the second ohmic electrode of the second unit diode, and an electrical length between a second connection point connected to a second load and the second ohmic electrode of the first unit diode is equal to an electrical length between the second connection point and the first ohmic electrode of the second unit diode. Here, an example of making the electrical lengths equal can be an embodiment having a first connection line connecting a first ohmic electrode of the first unit diode and a second ohmic electrode of the second unit diode, and a second connection line connecting the second ohmic electrode of the first unit diode and the first ohmic electrode of the second unit diode, with a first connection point provided at a midpoint of the line length of the first connection line, and a second connection point provided at a midpoint of the line length of the second connection line. Here, the first and second ohmic electrodes serve as a drain electrode and a source electrode.

[0007] Here, the first connection point and the second connection point are connected to the input side and output side loads. In this way, since the electrical lengths from the connection point connected to the load side to the electrodes of the constituent unit diodes are equal, the even-order harmonics generated in each diode are cancelled out at this connection point and suppressed.

[0008] The present invention is characterized in that the electrical lengths to the connection point connected to the load side and the electrodes of the unit diodes connected on both sides of the connection point are equal. For example, examples of configurations in which the diode electrodes are arranged so that the connection point is located at the center of the line lengths of the first connection line and the second connection line include a configuration in which the first unit diode and the second unit diode are arranged point-symmetrically or in parallel with each other. The present invention also includes a configuration in which four or more unit diode groups are arranged point symmetrically or in parallel.

[0009] In the present invention, the first ohmic electrode, the second ohmic electrode and the gate electrode constituting the first unit diode and the second unit diode are preferably arranged in line symmetry with respect to an axis connecting their centers. Here, the connection portion between the first ohmic electrode and the gate electrode may be configured as a part of the first and second connection lines.

[0010] In the present invention, it is preferable to reduce the number of connecting lines as much as possible, and a first ohmic electrode, a second ohmic electrode, and a third ohmic electrode may be arranged in parallel to each other, a first gate electrode is between the first ohmic electrode and the second ohmic electrode and connected to the second ohmic electrode, and a second gate electrode is between the second ohmic electrode and the third ohmic electrode and connected to the third ohmic electrode, the distance between the first ohmic electrode and the first gate electrode is equal to the distance between the second ohmic electrode and the second gate electrode, and a first connection point is provided on the second ohmic electrode and a second connection point is provided at a midpoint of the line length of the connecting line between the first ohmic electrode and the third ohmic electrode.

[0011] Further, as a configuration for reducing the number of connection lines, a first diode group is provided in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, where k is a natural number, and an even-numbered ohmic electrode is connected to its adjacent gate electrode, and a second diode group is provided in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, and an odd-numbered ohmic electrode is connected to its adjacent gate electrode, and the first diode group and the second diode group have connection parts that connect the same-numbered ohmic electrodes with equal lengths, and the first connection part is referred to as a first connection point and the last connection part is referred to as a second connection point. and a first diode group in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, where k and i are natural numbers, and the i-th ohmic electrode is connected to the gate electrode, and a second diode group in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, and the (i+1) ohmic electrode is connected to the i-th gate electrode, where the first diode group and the second diode group have connection parts that connect the same ohmic electrodes with equal lengths, and the first connection part is a first connection point and the last connection part is a second connection point.

[0012] The present invention may include first and second anti-parallel diodes as defined in claims 1 to 8, and a third connection line connecting the first connection points of the first and second anti-parallel diodes, and the third connection line may be loosely coupled to each of the first connection lines such that electrical lengths from the first connection points to ohmic electrodes connected to the first connection points in each of the first connection lines are equal. Effect of the Invention

[0013] The operation mechanism of the anti-parallel diode according to the present invention will be described with reference to FIG. FIG. 2 shows an example in which a diode A as a first unit diode and a diode B as a second unit diode are arranged in point symmetry as one embodiment. At connection point 1 connected to the load side, the electrical lengths (line lengths) θ1 and θ2 are equal, and at connection point 2, the electrical lengths θ3 and θ4 are equal, so the even harmonics generated in each diode are canceled out at the connection points. This makes the present invention suitable for even harmonic mixers. [Brief description of the drawings]

[0014] [Figure 1] (a) shows an example in which the first and second unit diodes are point symmetric, and (b) shows an example in which the first and second unit diodes are connected in parallel and the connecting lines are line symmetric. [Diagram 2] An operation explanatory diagram is shown. [Diagram 3] An example in which the connection portion of the gate electrode is made a part of the connection line is shown. [Figure 4] An example is shown in which each of the first unit diode and the second unit diode is formed of two diodes in parallel. [Diagram 5] An example consisting of three ohmic electrodes is shown. [Figure 6] An example of a bridge structure for the second connecting line is shown. [Figure 7] An example configured with a first diode group and a second diode group is shown. [Figure 8] Another example of the gate electrode is shown in FIG. [Figure 9] 13 shows another example of connections between the first diode group and the second diode group. [Figure 10] 4 shows another example of gate electrode connection. [Figure 11] An example of forming an external connection line is shown. [Figure 12] An example of the configuration of a conventional GAD is shown below. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Examples of configurations of the anti-parallel diode according to the present invention will be described below with reference to the drawings, but the present invention is not limited to these.

[0016] FIG. 1(a) shows an example (embodiment 1) in which the first and second unit diodes are arranged point-symmetrically, and FIG. 1(b) shows an example (embodiment 2) in which the first and second unit diodes are arranged in parallel and the connecting lines are arranged line-symmetrically. 1(a) and (b) are representations of the patterns formed on the substrate. First, the first embodiment shown in FIG. 1(a) will be described. The first unit diode 31 has a first ohmic electrode 11 and a second ohmic electrode 12 arranged parallel to each other, and a gate electrode 13 located between the first ohmic electrode 11 and the second ohmic electrode 12, arranged parallel to them, and connected to the first ohmic electrode 11. The second unit diode 32 is arranged point-symmetrically with the first unit diode 31 . The second unit diode 32 has a first ohmic electrode 21 and a second ohmic electrode 22 arranged in parallel, and a gate electrode 23 arranged in parallel therebetween. The first ohmic electrode 11 of the first unit diode 31 and the second ohmic electrode 22 of the second unit diode 32 are connected by a first connection line 51, and the first connection line 51 has a connection point 1 at the center of its line length (electrical length) that connects to the load 1 side. The second ohmic electrode 12 of the first unit diode 31 and the first ohmic electrode 21 of the second unit diode 32 are connected by a second connection line 52, and the second connection line 52 has a connection point 2 at the center of its line length (electrical length) that connects to the load 2 side.

[0017] FIG. 1(b) is an example in which the first unit diode 31 and the second unit diode 32 are arranged in parallel, the first connection line 51 is arranged line-symmetrically with respect to connection point 1, and the second connection line 52 is arranged line-symmetrically with respect to connection point 2, whereas FIG. 1(a) has a point-symmetric arrangement. In this case, the first connection line 51 and the second connection line 52 have different line lengths, but the first connection line 51 and the second connection line 52 are symmetrical with respect to connection points 1 and 2, so that even-order harmonics are canceled out at connection points 1 and 2. In the following, loads 1 and 2 are indicated by circles and their explanations are omitted.

[0018] In FIG. 1, the first ohmic electrodes 11, 21, the gate electrodes 13, 23 and the second ohmic electrodes 12, 22 are parallel to each other and are arranged vertically symmetrically about a central axis that horizontally connects the vertical center of the first ohmic electrode, the vertical center of the gate electrode, and the vertical center of the second ohmic electrode in FIG. 1.

[0019] FIG. 3 shows an example in which the connection portions between the first ohmic electrodes 11, 21 and the gate electrodes 13, 23 are parts (41, 42) of the first connection line 51 and the second connection line 52 (Example 3), as compared to FIG. 1(a). In the present invention, as shown in FIG. 4, a plurality of first unit diodes 31 and a plurality of second unit diodes 32 can be arranged in parallel (fourth embodiment).

[0020] Figures 5(a) and (b) show an example in which the number of connecting lines is reduced. In Figure 5(a), a first ohmic electrode 61, a second ohmic electrode 62, and a third ohmic electrode 63 are arranged parallel to each other, and a first gate electrode 64 is arranged between the first ohmic electrode 61 and the second ohmic electrode 62, and this first gate electrode 64 is connected to the second ohmic electrode 62. A second gate electrode 65 is disposed between the second ohmic electrode 62 and the third ohmic electrode 63 and is connected to the third ohmic electrode. Moreover, the distance between the first ohmic electrode 61 and the first gate electrode 64 and the distance between the second ohmic electrode 62 and the second gate electrode 65 are arranged to be equal. In this case, a connection point 1 is provided on the second ohmic electrode, the first ohmic electrode 61 and the third ohmic electrode 63 are connected by a second connection line 81, and a connection point 2 is provided in the center of the line. This allows the connection points 1 and 2 to be line-symmetrical on the left and right sides, and also allows the number of first connection lines in the first and second embodiments to be reduced (fifth embodiment). Comparing FIG. 5 with FIG. 1, it can be seen that the ohmic electrode 62 in FIG. 5 is a common electrode that combines the ohmic electrodes 11 and 22 in FIG. 1, thereby reducing the number of connection lines by one.

[0021] FIG. 5(b) shows a method of connecting the first gate electrode 64 and the second ohmic electrode 62 and a method of connecting the second gate electrode 65 and the third ohmic electrode 63 in (a) corresponding to the configuration shown in FIG. 3 (Example 6). In the embodiment shown in FIG. 5, the second connection line 91 may have a bridge structure as shown in FIG. 6, and in this case, it is preferable that the lengths of Wbrd and Wele are equal (embodiment 7).

[0022] 7 to 10 show examples in which the number of connection lines is further reduced and multiple anti-parallel diodes are arranged. FIG. 7(a) shows an example pattern, and (b) shows an equivalent circuit (Example 8). A first diode group 101 is arranged in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, with even-numbered ohmic electrodes connected to their adjacent gate electrodes, and a second diode group 102 is arranged in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, with odd-numbered ohmic electrodes connected to their adjacent gate electrodes. Here, k represents a natural number. The example in Figure 7 is an example where k=4, in which the first diode group 101 has gate electrodes connected to the second and fourth ohmic electrodes, respectively, and the second diode group 102 has gate electrodes connected to the first, third, and fifth ohmic electrodes. The first diode group 101 and the second diode 102 are connected so that the ohmic electrodes arranged in the same order have the same length. As a result, the connection portion between the first ohmic electrodes of the first and second diode groups 101 and 102 and the connection portion between the fifth ohmic electrodes of the first and second diode groups 101 and 102 become connection point 1 and connection point 2 (Example 8). FIG. 8 shows an example in which a gate electrode is disposed on an ohmic electrode via a connection portion (Example 9).

[0023] FIG. 9 shows an example in which the first diode group 111 is configured such that (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, with the i-th gate electrode connected to the i-th ohmic electrode, and the second diode group 122 is configured such that (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, with the i-th gate electrode connected to the (i+1)-th ohmic electrode. Here, k and i are natural numbers. FIG. 9 shows an example where k=4. The first diode group 111 and the second diode group 122 have the same number of ohmic electrodes connected to each other with the same length. The equivalent circuit in this case is shown in FIG. The connection between the first ohmic electrodes is connection point 1, and the connection between the final, fifth ohmic electrodes is connection point 2 (Example 10). FIG. 10 shows an example in which the gate electrode is connected to an ohmic electrode via a connection portion (Example 11).

[0024] FIG. 11 shows an example in which a plurality of anti-parallel diodes are connected to an external connection line 201. In FIG. If the connection point of the connection line 51 of the first anti-parallel diode 131 and the connection point of the connection line 53 of the second anti-parallel diode 132 are externally connected by the external connection part 201, a difference in electrical length may occur between the left and right sides of the connection point in each of the connection lines 51 and 53. In FIG. 11, 52 and 54 are connection lines to the load side. In such a case, in order to suppress the influence of the external connection line 201, it is preferable to loosely couple the connection lines 51, 53 and the ohmic electrodes of the first and second anti-parallel diodes 131, 132 with the external connection line 201. Examples of means for achieving loose coupling include separating the connection lines 51 and 53 from the external connection line 201 by at least three times the line width of the connection lines 51 and 53, and placing a ground between the external connection line 201 and the connection lines 51 and 53.

Claims

1. the first unit diode and the second unit diode are arranged in anti-parallel; The first and second unit diodes each have a first ohmic electrode and a second ohmic electrode arranged in parallel, and a gate electrode arranged in parallel between the first and second ohmic electrodes and connected to the first ohmic electrode, an electrical length between a first connection point connected to a first load and a first ohmic electrode of the first unit diode is equal to an electrical length between the first connection point and a second ohmic electrode of the second unit diode; an electrical length between a second connection point connected to a second load and a second ohmic electrode of the first unit diode is equal to an electrical length between the second connection point and the first ohmic electrode of the second unit diode.

2. a first connection line connecting a first ohmic electrode of the first unit diode and a second ohmic electrode of the second unit diode; a second connection line connecting the second ohmic electrode of the first unit diode and the first ohmic electrode of a second unit diode; 2. The anti-parallel diode according to claim 1, comprising: the first connection point provided at a midpoint of the line length of the first connection line; and the second connection point provided at a midpoint of the line length of the second connection line.

3. 3. The anti-parallel diode according to claim 2, wherein the first unit diode and the second unit diode are arranged point-symmetrically or in parallel with each other.

4. 4. The anti-parallel diode according to claim 3, wherein the first ohmic electrode, the second ohmic electrode and the gate electrode are arranged in line symmetry with respect to an axis connecting their centers.

5. 3. The anti-parallel diode according to claim 2, wherein a connection portion between said first ohmic electrode and said gate electrode is configured as a part of said first and second connection lines.

6. a first ohmic electrode, a second ohmic electrode, and a third ohmic electrode are arranged in parallel to each other, and the first gate electrode is between the first ohmic electrode and the second ohmic electrode and connected to the second ohmic electrode, and a second gate electrode is between the second ohmic electrode and the third ohmic electrode and connected to the third ohmic electrode; a distance between the first ohmic electrode and the first gate electrode is equal to a distance between the second ohmic electrode and the second gate electrode; An anti-parallel diode comprising: a first connection point provided on the second ohmic electrode; and a second connection point provided at a midpoint of a line length of a connection line between the first ohmic electrode and a third ohmic electrode.

7. In the following, k is a natural number. a first diode group in which (k+1) ohmic electrodes and k gate electrodes are arranged alternately in parallel, and an even-numbered ohmic electrode is connected to its adjacent gate electrode; a second diode group in which (k+1) ohmic electrodes and k gate electrodes are alternately arranged in parallel, and odd-numbered ohmic electrodes are connected to their adjacent gate electrodes; the first diode group and the second diode group have connection parts that connect the same-numbered ohmic electrodes to each other with equal lengths, An anti-parallel diode, characterized in that a first connection portion is a first connection point and a last connection portion is a second connection point.

8. Hereinafter, k and i are natural numbers, a first diode group in which (k+1) ohmic electrodes and k gate electrodes are alternately arranged in parallel, with the i-th ohmic electrode and gate electrode being connected; a second diode group in which (k+1) ohmic electrodes and k gate electrodes are alternately arranged in parallel, and an (i+1)-th ohmic electrode and an i-th gate electrode are connected; the first diode group and the second diode group have connection parts that connect the same ohmic electrodes to each other with equal lengths, An anti-parallel diode, characterized in that a first connection portion is a first connection point and a last connection portion is a second connection point.

9. First and second anti-parallel diodes according to claims 1 to 8; a third connection line connecting the first connection points of the first and second anti-parallel diodes to each other, an anti-parallel diode, characterized in that the third connection line and each of the first connection lines are loosely coupled so that the electrical lengths from the first connection point to the ohmic electrode connected to the first connection point in each of the first connection lines are equal.

Citation Information

Patent Citations

  • Mixer

    JP2001313530A