Semiconductor device

Abstract

To surely prevent a damage of a semiconductor element in a semiconductor device due to an application of an over-voltage exceeding an assumption on a device design.SOLUTION: A semiconductor device (1) comprises: circuit boards (2A and 2B) that contain a wiring board, and a semiconductor element arranged onto a first surface of the wiring board; a case (7) that includes a hollow part (710) housing each circuit board; and a first conductive terminal (720) and a second conductive terminal (730) that include inner connection parts (721 and 731) that are attached to the case, and are exposed toward the hollow part of the case and an external connection part that is exposed toward a direction that is different from the hollow part. Both of the first and second conductive terminals include discharge parts (1210, 1310 / 722, and 732) that are opposite in the hollow part of the case with a second gap (G2) that is narrower than a first gap (G1) of the inner connection parts, respectively. Both the discharge parts of the first and second conductive terminals are projected to a position separated from the other member, and are opposite via a gas.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] Among semiconductor devices used in power conversion devices such as inverter devices, there are semiconductor devices that prevent the voltage applied to the semiconductor elements in the device from becoming overvoltage due to discharge, in order to avoid the semiconductor elements being destroyed by the voltage applied to the semiconductor elements due to lightning strikes or the like (see, for example, Patent Documents 1 and 2). There are also semiconductor devices that reduce surge voltages by suppressing the parasitic inductance of the positive and negative terminals and by increasing the parasitic capacitance between the positive and negative terminals (see, for example, Patent Document 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-15389 A [Patent Document 2] Japanese Patent Application Publication No. 6-224367 [Patent Document 3] Patent Publication No. 2022-6780 Summary of the Invention [Problem to be solved by the invention]

[0004] In semiconductor devices that prevent the breakdown of semiconductor elements by discharging, the discharge voltage is likely to fluctuate due to individual differences in the gap between the terminals used for discharging. In semiconductor devices that reduce surge voltages by using parasitic inductance and parasitic capacitance, the effects of increases in applied voltage, etc., may not be sufficiently suppressed.

[0005] The present invention has been made in consideration of the above-mentioned points, and has as its object to more reliably prevent the destruction of semiconductor elements in a semiconductor device caused by the application of an overvoltage that exceeds the assumptions made in the design of the device. [Means for solving the problem]

[0006] A semiconductor device according to one embodiment of the present invention comprises a circuit board including a wiring board and a semiconductor element arranged on a first surface of the wiring board, a case having a hollow portion to accommodate the circuit board, and a first conductive terminal and a second conductive terminal attached to the case, each having an internal connection portion exposed toward the hollow portion of the case and an external connection portion exposed in a direction different from the hollow portion, wherein the first conductive terminal and the second conductive terminal each have discharge portions that face each other within the hollow portion of the case at a second gap that is narrower than the first gap between the internal connection portions, and the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal protrude at a position spaced apart from other members and face each other via the gas. Effect of the Invention

[0007] According to the present invention, it is possible to more reliably prevent the semiconductor elements in a semiconductor device from being destroyed by an overvoltage caused by the application of an overvoltage that exceeds the assumption in the design of the device. [Brief description of the drawings]

[0008] [Figure 1] 1 is a top view illustrating a configuration example of a semiconductor device according to an embodiment; [Diagram 2] 2 is a cross-sectional view that typically illustrates a cross-sectional configuration of the semiconductor device in FIG. [Diagram 3] 2 is an enlarged top view of a discharge portion in the semiconductor device of FIG. 1. [Figure 4] 4 is a cross-sectional view taken along line AA' in FIG. [Diagram 5] 2 is an equivalent circuit diagram of the semiconductor device in FIG. [Figure 6] FIG. 11 is a graph illustrating a method for setting the gap of the discharge unit. [Figure 7] FIG. 11 is a table illustrating an example of setting the gap of the discharge unit. [Figure 8] FIG. 1 is a perspective view (part 1) illustrating an example of a method for manufacturing a discharge wiring board. [Figure 9] FIG. 13 is a perspective view (part 2) illustrating an example of a method for manufacturing a discharge wiring board. [Figure 10] FIG. 11 is a perspective view (part 3) illustrating an example of a method for manufacturing a discharge wiring board. [Figure 11] FIG. 13 is an enlarged top view showing a modified example of the discharge wiring board. [Figure 12] 12 is a cross-sectional view taken along line BB' in FIG. 11. [Figure 13] FIG. 13 is a perspective view illustrating another example of the configuration of the discharge unit. [Figure 14] 14 is a view of the discharge part of FIG. 13 taken along the arrow C. [Figure 15] FIG. 11 is a top view showing another configuration example of a semiconductor device. [Figure 16] 16 is an equivalent circuit diagram illustrating an example of an inverter circuit using the semiconductor device illustrated in FIG. 15. [Figure 17] 11 is a cross-sectional view for explaining another example of a method for connecting a discharge wiring board. FIG. [Figure 18] 18A and 18B are partial top views illustrating modified examples of the shape of the discharge part. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. The X-axis, Y-axis, and Z-axis in each of the drawings are shown for the purpose of defining planes and directions in the illustrated semiconductor device. The X-axis, Y-axis, and Z-axis are mutually orthogonal and form a right-handed system. In the following description, the direction parallel to the X-axis is called the X-direction, the direction parallel to the Y-axis is called the Y-direction, and the direction parallel to the Z-axis is called the Z-direction. Furthermore, when each of the X-direction, Y-direction, and Z-direction is associated with the direction of the arrows (positive and negative) of the X-axis, Y-axis, and Z-axis shown in the drawings, the "positive side" or "negative side" is added.

[0010] In this specification, the Z direction may be referred to as the up-down direction. In this specification, "up" and "upper" are intended to be on the positive side of the Z direction relative to a reference surface, member, position, etc., and "lower" and "lower" are intended to be on the negative side of the Z direction relative to a reference surface, member, position, etc. For example, when it is described that "a member B is placed on a member A," the member B is placed on the positive side of the Z direction as viewed from the member A. Also, when it is described that "the upper surface of a member A" is a surface located at the end of the member A on the positive side of the Z direction and facing the positive side of the Z direction. In this specification, "top view" is intended to be a planar view of the target item (e.g., a semiconductor device, etc.) as viewed from the positive side of the Z direction. In this specification, "side view" is intended to be a planar view of the target item as viewed from the negative side or positive side of the X direction, and a planar view as viewed from the negative side of the X direction may be referred to as a "left side view," and a planar view as viewed from the positive side of the X direction may be referred to as a "right side view." These directions and surfaces are terms used for convenience of explanation, and the corresponding relationship with each of the directions of the X-axis, Y-axis, and Z-axis may change depending on the mounting posture of the semiconductor device. For example, in this specification, the surface of the semiconductor element facing the wiring board is called the bottom surface, and the surface opposite the bottom surface is called the top surface, but this is not limited to this, and the surface facing the wiring board may be called the top surface, and the surface opposite the bottom surface may be called the bottom surface. The bottom surface and the top surface of the semiconductor element may be called side surfaces. In addition, the aspect ratio and the size relationship between each member in each figure are shown only diagrammatically, and do not necessarily match the relationship in the semiconductor device actually manufactured. For convenience of explanation, it is assumed that the size relationship between each member is exaggerated. In addition, some of the cross-sectional views show the cross-sectional configuration of the semiconductor device cut by a virtual cutting line that cannot be accurately shown in a top view (plan view) for convenience of explanation. Furthermore, some of the cross-sectional views show the part of the semiconductor device located in the depth of the cross section in a simplified manner.

[0011] In this specification, descriptions such as "not shown", "not shown", "not shown" and the like are intended to indicate which part in the figure the component to which the description is attached is, without using a specific symbol and a leading line. For example, "first main electrode not shown" is intended to indicate both that a part (e.g., a shape, a line, etc.) representing the first main electrode is not shown in the figure, and that there is no symbol or leading line clearly indicating the part corresponding to the first main electrode in the figure. Also, an underlined symbol in the figure indicates the entire component including multiple parts distinguished by multiple symbols.

[0012] The semiconductor device exemplified in the following description may be applied to a power conversion device such as an inverter device for industrial or electrical equipment (e.g., an in-vehicle motor). For this reason, in the following description, detailed descriptions of configurations, functions, operations, manufacturing methods, etc. that are the same as or similar to those of known semiconductor devices will be omitted.

[0013] FIG. 1 is a top view showing a configuration example of a semiconductor device according to an embodiment. FIG. 2 is a cross-sectional view showing a schematic cross-sectional configuration of the semiconductor device of FIG. 1. FIG. 3 is an enlarged top view of a discharge part in the semiconductor device of FIG. 1. FIG. 4 is a cross-sectional view taken along line A-A' in FIG. 3. In each of FIGS. 1 to 4, a cover disposed on the top surface of a case and a sealant sealing a circuit board housed in the case are omitted. The cross-sectional view of FIG. 2 shows a schematic cross-sectional configuration associated with a current path between a first main terminal and a third main terminal in the semiconductor device exemplified in FIG. 1.

[0014] The semiconductor device 1 illustrated in FIG. 1 and FIG. 2 includes a first circuit board 2A, a second circuit board 2B, a case 7, and a cooler 8. The semiconductor device 1 illustrated in FIG.

[0015] The first circuit board 2A includes a first wiring board 3A and four semiconductor elements including a first semiconductor element 4A arranged on the upper surface of the first wiring board 3A. The first wiring board 3A includes an insulating substrate 300, conductor patterns 301-304 arranged on the upper surface of the insulating substrate 300, and a conductor pattern 305 arranged on the lower surface of the insulating substrate 300. The second circuit board 2B includes a second wiring board 3B and four semiconductor elements including a second semiconductor element 4B and a third semiconductor element 4C arranged on the upper surface of the second wiring board 3B. The second wiring board 3B includes an insulating substrate 310, conductor patterns 311-313 arranged on the upper surface of the insulating substrate 310, and a conductor pattern 315 arranged on the lower surface of the insulating substrate 310. In the following description, when multiple semiconductor elements are not distinguished from each other, they are referred to as "semiconductor elements 4".

[0016] The first wiring board 3A and the second wiring board 3B may be, for example, a DCB (Direct Copper Bonding) board or an AMB (Active Metal Brazing) board. The first wiring board 3A and the second wiring board 3B may be called a laminated board, an insulating circuit board, or the like.

[0017] The insulating substrates 300 and 310 are not limited to a specific substrate. The insulating substrates 300 and 310 are, for example, aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), or aluminum oxide (Al 2 O 3 ) and zirconium oxide (ZrO 2 The insulating substrates 300 and 310 may be, for example, a substrate made of an insulating resin such as an epoxy resin, a substrate made of a base material such as glass fiber impregnated with an insulating resin, or a substrate made of a flat metal core having a surface coated with an insulating resin.

[0018] Conductive patterns 301-304 provided on the upper surface of insulating substrate 300 and conductive patterns 311-313 provided on the upper surface of insulating substrate 310 function as wiring for an inverter circuit, which will be described later. These conductive patterns 301-304 and 311-313 are formed of, for example, a metal plate or metal foil made of copper, aluminum, or the like. These conductive patterns 301-304 and 311-313 may also be called conductive layers, conductive plates, conductive layers, wiring patterns, or the like.

[0019] The semiconductor elements 4 arranged on the upper surface of the first wiring board 3A and the upper surface of the second wiring board 3B are each composed of, for example, an RC (Reverse Conducting)-IGBT element that integrates the functions of an IGBT (Insulated Gate Bipolar Transistor) element, which is a switching element, and a diode element such as an FWD (Free Wheeling Diode) element connected in reverse parallel to the IGBT element. This type of semiconductor element 4 has a first main electrode (not shown) on the lower surface and a second main electrode and a control electrode (gate electrode) (not shown) on the upper surface. When the switching element of the semiconductor element 4 is an IGBT element, the first main electrode on the lower surface may be called a collector electrode, and the second main electrode on the upper surface may be called an emitter electrode. In addition, the semiconductor substrate on which the switching element and the diode element in the semiconductor element 4 are formed is not limited to a silicon substrate, and may be, for example, a substrate using a wide band gap semiconductor such as a SiC (silicon carbide) substrate or a GaN (gallium nitride) substrate.

[0020] The four semiconductor elements 4 (including the first semiconductor element 4A) included in the first circuit board 2A are disposed on a first conductor pattern 301 in the first wiring board 3A, and the first main electrodes (collector electrodes) are joined to the first conductor pattern 301 by a bonding material 5A. The bonding material 5A may be, for example, a well-known solder. The first conductor pattern 301 is electrically connected to a first main terminal (P terminal) 720 provided on the case 7 by a bonding wire 6A. The second main electrode (emitter electrode) of the semiconductor element 4 included in the first circuit board 2A is electrically connected to the second conductor pattern 302 of the first wiring board 3A by a bonding wire. For example, the second main electrode (not shown) of the first semiconductor element 4A is electrically connected to the second conductor pattern 302 by a bonding wire 6B. Second conductor pattern 302 is electrically connected to first conductor pattern 311 of second wiring board 3B by bonding wire 6C. A control electrode (gate electrode) of semiconductor element 4 included in first circuit board 2A is electrically connected to third conductor pattern 303 of first wiring board 3A by a bonding wire. For example, a control electrode of first semiconductor element 4A is electrically connected to third conductor pattern 303 by bonding wire 6D. Third conductor pattern 303 of first wiring board 3A is electrically connected to control terminal 750 provided on case 7 by bonding wire 6F.

[0021] The four semiconductor elements 4 (including the second semiconductor element 4B and the third semiconductor element 4C) included in the second circuit board 2B are disposed on the first conductor pattern 311 in the second wiring board 3B, and the first main electrodes (collector electrodes) are joined to the first conductor pattern 311 by a bonding material 5B. The bonding material 5B may be, for example, a well-known solder. The first conductor pattern 311 is electrically connected to a third main terminal (OUT terminal) 740 provided on the case 7 by a bonding wire 6G. The second main electrodes (emitter electrodes) of the semiconductor elements 4 included in the second circuit board 2B are electrically connected to the second conductor pattern 312 of the second wiring board 3B by a bonding wire. For example, the second main electrode (not shown) of the third semiconductor element 4C is electrically connected to the second conductor pattern 312 by a bonding wire 6H. Second conductor pattern 312 is electrically connected to fourth conductor pattern 304 of first wiring board 3A by bonding wire 6J. Fourth conductor pattern 304 of first wiring board 3A is electrically connected to second main terminal (N terminal) 730 provided on case 7 by bonding wire 6N. A control electrode (gate electrode) of semiconductor element 4 included in second circuit board 2B is electrically connected to third conductor pattern 313 of second wiring board 3B by a bonding wire. For example, a control electrode of third semiconductor element 4C is electrically connected to third conductor pattern 313 via a control electrode of another semiconductor element 4 by bonding wire 6K. Third conductor pattern 313 of second wiring board 3B is electrically connected to control terminal 760 provided on case 7 by bonding wire 6L.

[0022] The first circuit board 2A and the second circuit board 2B in the above-described semiconductor device 1 may be replaced by a single circuit board.

[0023] The bonding wire electrically connecting the two conductors is not limited to one, but may be multiple. For example, the bonding wire 6A connecting the first main terminal 720 of the case 7 and the first conductor pattern 301 of the first wiring board 3A may be a set of multiple bonding wires. Also, for example, the bonding wire 6B connecting the second main electrode of the first semiconductor element 4A and the second conductor pattern 302 of the first wiring board 3A may be a set of multiple bonding wires. Also, the two conductors are not limited to bonding wires, and may be electrically connected using other conductors, for example, a conductive member formed by bending a conductor plate such as a copper plate, which may be called a lead, lead frame, or the like.

[0024] Conductive pattern 305 provided on the lower surface of insulating substrate 300 in first wiring board 3A functions as a heat-conducting member that conducts heat generated by semiconductor element 4 arranged on first wiring board 3A to cooler 8. Similarly, conductive pattern 315 provided on the lower surface of insulating substrate 310 in second wiring board 3B functions as a heat-conducting member that conducts heat generated by semiconductor element 4 arranged on second wiring board 3B to cooler 8. These conductive patterns 305, 315 are formed of, for example, a metal plate or metal foil such as copper or aluminum. First circuit board 2A is fixed on cooler 8 by bonding conductive pattern 305 of first wiring board 3A to the upper surface of cooler 8 with bonding material 5C such as solder. Second circuit board 2B is fixed on cooler 8 by bonding conductive pattern 315 of second wiring board 3B to the upper surface of cooler 8 with bonding material 5C such as solder. The cooler 8 has, for example, a coolant flow passage in which a plurality of fins are arranged, and exchanges heat between the fins whose temperature has risen due to heat from the plurality of semiconductor elements 4 and the coolant flowing through the flow passage. The cooler 8 may be any component in the semiconductor device 1 of this embodiment. The semiconductor device 1 of this embodiment may be, for example, a device in which the first circuit board 2A and the second circuit board 2B are arranged on the upper surface of a heat dissipation base separate from the cooler 8, and the heat dissipation base is thermally connected to the cooler 8 separate from the semiconductor device 1. In this type of semiconductor device 1, the heat dissipation base and the cooler 8 may be in close contact with each other using a thermal conductive material such as thermal grease or thermal compound. The cooler 8 may be, for example, a member called a heat sink or the like that dissipates heat to the surrounding gas.

[0025] The case 7 includes a case member 700 having a first circuit board 2A and a second circuit board 2B arranged on the upper surface of the cooler 8 (or a heat dissipation base), as well as an accommodating section 710 capable of accommodating bonding wires 6A to 6N, etc., and the above-mentioned first main terminal (P terminal) 720, second main terminal (N terminal) 730, third main terminal (OUT terminal) 740, and control terminals 750 and 760.

[0026] The case member 700 of the case 7 illustrated in Figs. 1 and 2 has a generally ring shape in top view with a hollow portion with an open upper end and lower end, and the hollow portion is used as a housing portion 710 for housing the first circuit board 2A and the second circuit board 2B, etc. The above-mentioned first main terminal 720, second main terminal 730, third main terminal 740, and control terminals 750 and 760 each have an inner connection portion exposed in the housing portion 710 of the case member 700 and an outer connection portion exposed from the upper surface of the case member 700, and are provided integrally with the case member 700. This type of case 7 is manufactured by a well-known manufacturing method such as a method using insert molding. The case member 700 is formed using an insulating resin material such as PPS (Poly Phenylene Sulfide) and PA (Polyamide). The first main terminal 720, the second main terminal 730, the third main terminal 740, and the control terminals 750 and 760 are formed by processing a conductive plate such as a copper plate. The first main terminal 720, the second main terminal 730, and the third main terminal 740 may be called a bus bar or the like. The first main terminal 720, the second main terminal 730, and the third main terminal 740 are each bent so that the outer connection portion is along the upper surface of the case member 700. The outer connection portion of each main terminal covers a nut (not shown) housed in a recess formed in the upper surface of the case member 700, and a through hole is formed at a position corresponding to the screw hole of the nut. The outer connection portion of each main terminal of the semiconductor device 1 is connected to, for example, a conductive plate sometimes called a bus bar or the like, or a terminal of a power cable, by screwing a bolt (not shown) into the nut housed in the case member 700.

[0027] The case 7 is formed by, for example, bonding the case member 700 to the top surface of the cooler 8 (or the heat dissipation base) with an adhesive. The storage section 710 of the case 7 is filled with a sealant (not shown) that seals the first circuit board 2A and the second circuit board 2B, etc. The sealant may be, for example, an epoxy resin or a silicone gel. The sealant may be a combination of two or more types of insulating materials. The sealant is filled so that the connection between the inner connection part of the main terminal of the case 7 and the bonding wire is located above the top surface 901 of the sealant, as shown in FIG. 2. Also, the opening on the top end side of the storage section 710 of the case 7 may be covered with a lid, for example.

[0028] 3 and 4, in the case 7 of the semiconductor device 1 of this embodiment, an inner connection portion 721 of a first main terminal 720 and an inner connection portion 731 of a second main terminal 730 are arranged with a gap G1 on a single surface 711 facing an accommodation portion 710 of a case member 700. Moreover, a discharge wiring board 10 is arranged above the surface 711 on which the inner connection portion 721 of the first main terminal 720 and the inner connection portion 731 of the second main terminal 730 are arranged.

[0029] 3 and 4 includes an insulating substrate 11, and a first conductor pattern 12 and a second conductor pattern 13 disposed on the upper surface of the insulating substrate 11. The insulating substrate 11 of the discharge wiring board 10 may be, for example, a film-like substrate such as a polyimide film used in well-known flexible printed wiring boards. The insulating substrate 11 is formed with an opening 1101 that is open on the upper and lower surfaces.

[0030] The first conductor pattern 12 and the second conductor pattern 13 of the discharge wiring board 10 are formed by patterning a conductive layer such as a copper foil or a copper plating layer, and each has a discharge portion 1210 and a discharge portion 1310 extending (protruding) onto the opening 1101 of the insulating substrate 11. The discharge portion 1210 refers to a portion of the first conductor pattern 12 that is located on the opening 1101 and has a lower surface that is not in contact with the insulating substrate 11, and the discharge portion 1310 refers to a portion of the second conductor pattern 13 that is located on the opening 1101 and has a lower surface that is not in contact with the insulating substrate 11. The discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 face each other on the opening 1101 of the insulating substrate 11 with a gap G2 therebetween. The discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 are formed so that the end faces 1211 and 1311 facing the other discharge portion are entirely located above the opening 1101 of the insulating substrate 11. The end faces 1211 and 1311 may be called discharge faces. A gap G2 between the end face 1211 of the first conductor pattern 12 and the end face 1311 of the second conductor pattern 13 is smaller than a gap G1 (e.g., several mm to several tens of mm) between the inner connection portion 721 of the first main terminal 720 and the inner connection portion 731 of the second main terminal 730. A specific example of the size of the gap G2 will be described later with reference to Figs. 6 and 7.

[0031] 3 and 4 show an example of the shape of the discharge parts 1210 and 1310. The shape of the discharge parts 1210 and 1310 is not limited to a rectangular parallelepiped as shown in FIG. 3 and FIG. 4. In FIG. 3 and FIG. 4, the end faces (discharge surfaces) 1211 and 1311 of the discharge parts 1210 and 1310 are flat, and other faces (e.g., upper and lower faces) are in contact with the outer periphery (each side) of the end faces at right angles. However, in the case where the outer periphery of the end faces 1211 and 1311 of such opposing discharge parts has a corner, for example, an electric field may concentrate at the corner, causing a drop in the discharge start voltage, and if the shape of the corner cannot be controlled, a problem may occur in which the discharge start voltage cannot be controlled. Therefore, the shape of the discharge parts 1210 and 1310 may be a shape that suppresses or prevents electric field concentration on the outer periphery of the end faces (discharge surfaces) 1211 and 1311 of the discharge parts 1210 and 1310, as exemplified in Figures 18A and 18B. Figures 18A and 18B are partial top views illustrating modified examples of the shape of the discharge parts.

[0032] Fig. 18A shows an example of a shape in which the outer periphery (side) of the end face (discharge surface) of the discharge part is contacted with another surface at an obtuse angle as a first modified example of the shape of the discharge part. An end face 1211 of a discharge part 1210 of a first conductor pattern 12 shown in Fig. 18A has a rectangular planar shape, and a first inclined surface 1212 and a second inclined surface 1213 contact each of an end side on the positive side in the X direction and an end side on the negative side in the X direction of the end face 1211 at an obtuse angle. Similarly, an end face 1311 of a discharge part 1310 of a second conductor pattern 13 shown in Fig. 18A has a rectangular planar shape, and a first inclined surface 1312 and a second inclined surface 1313 contact each of an end side on the positive side in the X direction and an end side on the negative side in the X direction of the end face 1311 at an obtuse angle. By forming the discharge parts 1210 and 1310 in such a shape, it is possible to suppress the concentration of the electric field at the ends on the positive side and negative side of the X direction, or to prevent the concentration of the electric field from occurring. In addition, the shape of the discharge parts 1210 and 1310 illustrated in Fig. 18A may be, for example, a shape in which an inclined surface is in contact with each of the end edges on the positive side of the Z direction and the end edges on the negative side of the Z direction of the end faces 1211 and 1311 at an obtuse angle. The angle between the end face (discharge surface) of the discharge part and another surface in contact with the outer periphery (side) of the end face is not limited to a specific angle.

[0033] FIG. 18B shows an example of a shape in which the outer periphery of the end face (discharge surface) of the discharge part is a convex curved surface, as a second modified example of the shape of the discharge part. In the discharge part 1210 of the first conductor pattern 12 shown in FIG. 18B, the end part on the positive side in the X direction and the end part on the negative side in the X direction of the end face 1211 are the first convex curved surface 1216 and the second convex curved surface 1217, respectively. Similarly, in the discharge part 1310 of the second conductor pattern 13 shown in FIG. 18B, the end part on the positive side in the X direction and the end part on the negative side in the X direction of the end face 1311 are the first convex curved surface 1316 and the second convex curved surface 1317, respectively. By forming the discharge parts 1210 and 1310 in such a shape, it is possible to prevent the concentration of the electric field from occurring at the end parts on the positive side in the X direction and the negative side in the X direction. In addition, the shape of the discharge parts 1210 and 1310 illustrated in Fig. 18B may be such that, for example, the end part on the positive side in the Z direction and the end part on the negative side in the Z direction of the end faces 1211 and 1311 are each a convex curved surface. The curvature of the convex curved surface of the end face (discharge surface) of the discharge part is not limited to a specific curvature. For example, the end faces (discharge surfaces) 1211 and 1311 of the discharge parts 1210 and 1310 may be a convex spherical shape as shown by the two-dot chain line in Fig. 18B.

[0034] Discharge wiring board 10 is adhered onto surface 711 of case member 700 by adhesive 14. First conductor pattern 12 of discharge wiring board 10 is electrically connected to inner connection portion 721 of first main terminal 720 by bonding wire 15A, and functions as the discharge portion of first main terminal 720. Second conductor pattern 13 of discharge wiring board 10 is electrically connected to inner connection portion 731 of second main terminal 730 by bonding wire 15B, and functions as the discharge portion of second main terminal 730.

[0035] In the discharge wiring board 10 illustrated in Fig. 3 and Fig. 4, the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 extend (protrude) onto the opening 1101 formed in the insulating substrate 11. That is, the discharge portion 1210 of the first conductor pattern and the discharge portion 1310 of the second conductor pattern 13 protrude to a position spaced apart from other members such as the adhesive 14 on the surface 711 of the case member 700 and the insulating substrate 11, and face each other. Therefore, the distance between the end surface 1211 of the first conductor pattern 12 and the end surface 1311 of the second conductor pattern 13 facing each other becomes closer, so that the discharge inception voltage in the air between the end surfaces becomes lower than the discharge inception voltage of the creeping discharge along the surface of the other member (for example, the insulating member such as the insulating substrate 11), and the occurrence of the creeping discharge can be prevented. The area around discharge units 1210 and 1310 may be filled with air, or may be filled with a gas other than air (for example, nitrogen gas, etc.).

[0036] Fig. 5 is an equivalent circuit diagram of the semiconductor device of Fig. 1. Fig. 5 shows a half-bridge inverter circuit 16 as an example of the equivalent circuit of the semiconductor device 1.

[0037] In the half-bridge inverter circuit 16, for example, a first switching element 1604 and a second switching element 1605 are connected in series between a P terminal 1601 connected to the positive pole of an external DC power supply and an N terminal 1602 connected to the negative pole. The P terminal 1601 and the N terminal 1602 may be the first main terminal 720 and the second main terminal 730 of the semiconductor device 1 illustrated in FIG. 1, respectively. The first switching element 1604 is a switching element provided in a semiconductor element of the first circuit board 2A in the semiconductor device 1 illustrated in FIG. 1, and a collector is connected to the P terminal 1601. The second switching element 1605 is a switching element provided in a semiconductor element of the second circuit board 2B in the semiconductor device 1 illustrated in FIG. 1, and an emitter is connected to the N terminal 1602. The emitter of the first switching element 1604 is connected to the collector of the second switching element 1605 and the OUT terminal 1603.

[0038] A first diode element 1606 included in a semiconductor element of the first circuit board 2A is connected in anti-parallel to the first switching element 1604, and a second diode element 1607 included in a semiconductor element of the second circuit board 2B is connected in anti-parallel to the second switching element 1605. The diode elements 1606 and 1607 may be FWD. A set 1611 of the first switching element 1604 and the first diode element 1606 connected between the P terminal 1601 and the OUT terminal 1603 may be called an upper arm 1611, and a set 1612 of the second switching element 1605 and the second diode element 1607 connected between the N terminal 1602 and the OUT terminal 1603 may be called a lower arm 1612.

[0039] 5 includes a discharge path 1620 including a first branch wiring 1621 branched from a wiring connecting a P terminal 1601 and a collector of a first switching element 1604, and a second branch wiring 1622 branched from a wiring connecting an N terminal 1602 and an emitter of a second switching element 1605. In the discharge path 1620, the first branch wiring 1621 and the second branch wiring 1622 are electrically separated by a gap 1623. The first branch wiring 1621 corresponds to, for example, the first conductor pattern 12 and the bonding wire 15A of the discharge wiring board 10 described above with reference to FIGS. 3 and 4. The second branch wiring 1622 corresponds to, for example, the second conductor pattern 13 and the bonding wire 15B of the discharge wiring board 10 described above with reference to FIGS. 3 and 4.

[0040] In an environment in which a semiconductor device having the half-bridge inverter circuit 16 illustrated in FIG. 5 is used, for example, an excessive rise in commercial power supply voltage beyond the assumption of the device design due to a lightning strike or the like may occur. When the commercial power supply voltage rises, the voltage applied to the first switching element 1604 and the second switching element 1605 exceeds the maximum rated voltage range (in other words, the voltage applied to the switching elements becomes an overvoltage exceeding the allowable range), and there is a risk that the switching elements may be destroyed. In the half-bridge inverter circuit 16 illustrated in FIG. 5, a discharge path 1620 is provided to prevent the destruction of the semiconductor elements (switching elements) due to an overvoltage. The discharge path 1620 may be a current path that discharges when the potential difference between the P terminal 1601 and the N terminal 1602 becomes large due to an overvoltage such as a lightning strike in order to prevent the destruction (damage) of the semiconductor elements of the upper arm 1611 and the lower arm 1612. The magnitude of the voltage (potential difference) at which a discharge occurs in discharge path 1620 can be controlled by the size of the gap (gap 1623) between first branch wiring 1621 and second branch wiring 1622. In other words, the magnitude of the voltage at which a discharge occurs can be controlled by gap G2 (see FIGS. 3 and 4) between discharge portion 1210 of first conductor pattern 12 of discharge wiring board 10 corresponding to first branch wiring 1621 and discharge portion 1310 of second conductor pattern 13 of discharge wiring board 10 corresponding to second branch wiring 1622.

[0041] Fig. 6 is a graph illustrating a method for setting the gap of the discharge unit. Fig. 7 is a table illustrating an example of setting the gap of the discharge unit. The graph in Fig. 6 and the table in Fig. 7 are related to a method and an example of setting the gap G2 when the shape of the discharge units 1210 and 1310 is such that no electric field concentration occurs (see Figs. 18A and 18B, for example).

[0042] In the graph shown in Figure 6, the horizontal axis is the gap of the discharge part shown on a logarithmic scale (units are mm), and the vertical axis is the discharge voltage shown on a logarithmic scale (units are V). The thick curve in Figure 6 shows the relationship between the gap of the discharge part and the discharge voltage under an atmospheric pressure of 1013.25 hPa, in accordance with Paschen's law. The "●" in Figure 6 shows the relationship between the gap of the discharge part with a standard sphere (standard sphere gap) and the voltage at which a spark discharge occurs.

[0043] As can be seen from the graph illustrated in Fig. 6, when the gap of the discharge section is 0.1 mm or more, the larger the gap, the larger the discharge voltage becomes. On the other hand, in the semiconductor device 1 of Fig. 1 corresponding to the half-bridge inverter circuit 16 illustrated in Fig. 5, for example, the withstand voltage of the semiconductor element 4 connected between the first main terminal (P terminal) 720 and the second main terminal (N terminal) 730 varies depending on the application. Therefore, in order to prevent the semiconductor element 4 from being destroyed by an overvoltage, it is preferable to reliably discharge the voltage (potential difference) between the first main terminal 720 and the second main terminal 730 at a stage smaller than the maximum rated voltage (withstand voltage) specified based on the circuit configuration between the terminals.

[0044] Fig. 7 illustrates a preferable relationship between the withstand voltage between the terminals to be protected, the voltage to be discharged, and the gap G2 of the discharge portion, which is set based on the graph illustrated in Fig. 6. For example, when the withstand voltage between the first main terminal (P terminal) 720 and the second main terminal (N terminal) 730 is 1200V, it is preferable to discharge at 1000V to 1100V in order to reliably prevent the semiconductor element 4 from being destroyed by an overvoltage. Therefore, the gap G2 between the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 in the discharge wiring board 10 used in the semiconductor device 1 having a withstand voltage of 1200V is set to, for example, 0.1mm to 0.2mm according to Paschen's law.

[0045] When the withstand voltage between the terminals is 1700V, for example, by setting the gap G2 between the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 in the discharge wiring board 10 to 0.2mm to 0.3mm, discharge can be performed at 1500V to 1600V, and damage to the semiconductor element 4 due to an overvoltage exceeding the withstand voltage can be prevented. When the withstand voltage between the terminals is 3300V, for example, by setting the gap G2 between the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 in the discharge wiring board 10 to 0.5mm to 0.6mm, discharge can be performed at 3100V to 3200V, and damage to the semiconductor element 4 due to an overvoltage exceeding the withstand voltage can be prevented.

[0046] The graph in Fig. 6 and the table in Fig. 7 are related to a method and example of setting the gap G2 when the shape of the discharge parts 1210 and 1310 is a shape that does not cause electric field concentration (for example, see Figs. 18A and 18B). When the shape of the discharge parts 1210 and 1310 is a shape that may cause electric field concentration (for example, a rectangular parallelepiped as described above with reference to Figs. 3 and 4), the size of the gap G2 is set in consideration of a drop in the discharge start voltage due to electric field concentration. When electric field concentration occurs, the gap G2 set based on a certain discharge start voltage (for example, 1000V to 1100V) is larger than the gap G2 set based on that discharge start voltage as described with reference to the table in Fig. 7.

[0047] The manufacturing method of the above-mentioned discharge wiring board 10 is not limited to a specific method. However, from the viewpoint of controlling the gap G2 between the discharge part 1210 of the first conductor pattern 12 and the discharge part 1310 of the second conductor pattern 13 with high precision and reducing individual differences, it is preferable to manufacture the board by the method described below with reference to Figs. 8 to 10, for example.

[0048] FIG. 8 is a perspective view (part 1) for explaining an example of a method for manufacturing a discharge wiring board. FIG. 9 is a perspective view (part 2) for explaining an example of a method for manufacturing a discharge wiring board. FIG. 10 is a perspective view (part 3) for explaining an example of a method for manufacturing a discharge wiring board. When actually manufacturing a discharge wiring board, one discharge wiring board shown by the solid lines in FIGS. 8 to 10 is manufactured in a continuous state in the X direction and Y direction, and is divided into individual discharge wiring boards in the final process.

[0049] When manufacturing the discharge wiring board 10, first, as illustrated in Figs. 8 and 9, a laminate is formed by laminating the conductive film 20 in which the slits 2001 are formed and the insulating substrate 11 in which the openings 1101 are formed. The conductive film 20 may be a metal foil such as rolled copper foil or electrolytic copper foil. The thickness of the conductive film 20 may be, for example, about 30 µm to 50 µm, but is not limited to a specific thickness. The slits 2001 of the conductive film 20 are formed with a width corresponding to the gap G2 between the discharge part 1210 of the first conductive pattern 12 and the discharge part 1310 of the second conductive pattern 13. The slits 2001 are formed, for example, by laser processing or the like. The insulating substrate 11 may be a film-like insulating substrate such as a polyimide film. The openings 1101 are formed, for example, by a die (punching die). The conductive film 20 and the insulating substrate 11 are laminated together, for example, by an adhesive not shown. The opening 1101 of the insulating substrate 11 may be, for example, a bottomed recess formed by router processing and having an open upper surface on which the conductive film 20 is to be attached.

[0050] 10, the conductive film 20 in the formed laminate is patterned to form the first conductive pattern 12 and the second conductive pattern 13. The conductive film 20 is patterned by etching. When the first conductive pattern 12 and the second conductive pattern 13 are formed by etching, if an etching resist is formed that passes over the slit 2001 and has a portion that is continuous with a resist portion on the discharge portion 1210 of the first conductive pattern 12 and a resist portion on the discharge portion 1310 of the second conductive pattern 13, the surfaces (end surfaces 1211 and 1311 in FIG. 4) of the discharge portions 1210 and 1310 facing each other can be prevented from being etched. In other words, by forming the first conductor pattern 12 and the second conductor pattern 13 by etching the conductor film 20 in which the slits 2001 are formed, it is possible to reduce the individual differences in the gap G2 between the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 in multiple discharge wiring boards 10.

[0051] Therefore, by using the discharge wiring board 10 manufactured by the method described above with reference to Figs. 8 to 10, it is possible to reduce the individual difference in the magnitude (potential difference) of the discharge voltage. In other words, individual differences are less likely to occur in the configuration of the discharge section for preventing the destruction (damage) of the semiconductor element inside the semiconductor device 1 due to an overvoltage. Therefore, even if an overvoltage exceeding the assumption in the device design is applied to the semiconductor device 1, it is possible to stably prevent the destruction of the semiconductor element 4, and it is possible to avoid a failure, emergency stop, etc. of the power conversion device using the semiconductor device 1. In addition, since it is possible to reduce the individual difference in the magnitude of the discharge voltage (discharge start voltage), it is possible to configure the discharge section so as to discharge at a voltage smaller than the withstand voltage of the semiconductor element 4 between the terminals and closer to the withstand voltage, and it is possible to fully utilize the withstand voltage of the semiconductor element 4.

[0052] Furthermore, by forming the shape of discharge parts 1210 and 1310 by etching in a shape such that no other surface contacts the outer periphery (side) of end faces 1211 and 1311 at a right angle, as illustrated in Figures 18A and 18B, it is possible to reduce individual differences in the magnitude of the discharge start voltage due to the concentration of the electric field described above and to make the most of the withstand voltage of semiconductor element 4.

[0053] In contrast, in the semiconductor device described in the above-mentioned Patent Document 1, discharge is generated between a flat discharge electrode provided on a matching substrate and a discharge needle electrode attached to a metal cap that is the ceiling of the case. However, in such semiconductor devices, individual differences are likely to occur in the gap between the flat discharge electrode and the discharge needle electrode. For this reason, for example, in an actually manufactured semiconductor device, the gap between the flat discharge electrode and the discharge needle electrode is made large so that the voltage (potential difference) that causes discharge does not exceed the withstand voltage of the semiconductor element, and this may result in the semiconductor element not being able to fully utilize its withstand voltage.

[0054] In addition, in the semiconductor device described in the above-mentioned Patent Document 2, a high-resistance film (insulator) is interposed in the gap between the first metal film and the second metal film that discharge. In such a semiconductor device, for example, individual differences are likely to occur in the dimensions and composition of the high-resistance film in the gap between the first metal film and the second metal film. In addition, in the semiconductor device described in Patent Document 2, for example, when discharge occurs, the high-resistance film interposed in the gap between the first metal film and the second metal film may burn out, which may cause the destruction of the semiconductor element.

[0055] Furthermore, in the semiconductor device described in the above-mentioned Patent Document 3, for example, individual differences are likely to occur in the relative positional relationship between the positive and negative terminals, and individual differences are likely to occur in the parasitic capacitance between the positive and negative terminals. Therefore, in a semiconductor device that reduces a surge voltage by using parasitic capacitance, for example, the influence of an increase in applied voltage (for example, commercial power supply voltage) due to a lightning strike or the like cannot be sufficiently suppressed, and the semiconductor element may be destroyed.

[0056] In the semiconductor device 1 of the present embodiment, by using the above-mentioned discharge wiring board 10, individual differences in the discharge voltage (discharge start voltage) can be easily reduced compared to the semiconductor devices of Patent Documents 1 to 3, and the destruction of the semiconductor element 4 due to an overvoltage can be more reliably prevented. Therefore, the power conversion device including the semiconductor device of the present embodiment can avoid, for example, an excessive increase in commercial power supply voltage beyond the assumption of the device design due to lightning strikes, device failure due to electrostatic discharge (ESD: Electro-Static Discharge), emergency stop, and the like. Moreover, in the discharge wiring board 10, the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 extend over the opening 1101 of the insulating substrate 11, and face each other in a state of protruding at a position separated from other members such as the insulating substrate 11, the case member 700, and the adhesive 14. Therefore, it is possible to prevent the burning of nearby insulating members due to creeping discharge along the surface of the discharge wiring board 10, and to prevent damage to the semiconductor device 1. The discharge parts may face each other in a gas spaced apart from solid objects such as the case member 700 and the adhesive 14. The discharge parts may face each other not only in air but also in a gas space such as an inert gas (e.g., nitrogen gas) filled in a space sealed by the case member 700 and a lid (not shown). The air pressure in the space sealed by the case member 700 and a lid (not shown) may be different from atmospheric pressure. As described above, the discharge parts may have a shape in which another surface is in contact with the outer periphery (side) of the end face at an obtuse angle, or a shape in which the outer periphery (side) of the end face or the entire end face is a convex curved surface.

[0057] It should be noted that the discharge wiring board 10 used in the semiconductor device 1 of this embodiment is not limited to the configuration described above with reference to FIGS.

[0058] Fig. 11 is an enlarged top view showing a modified example of a discharge wiring board, and Fig. 12 is a cross-sectional view taken along line BB' in Fig. 11.

[0059] 11 and 12, a first conductor pattern 12 and a second conductor pattern 13 are formed on the upper surface of an insulating substrate 11. An opening 1101 is formed in the insulating substrate 11, and a discharge portion 1210 of the first conductor pattern 12 and a discharge portion 1310 of the second conductor pattern 13 extend (protrude) over the opening 1101 and face each other across a gap G2.

[0060] 11 and 12, a third conductor pattern 22 electrically connected to the first conductor pattern 12 and a fourth conductor pattern 23 electrically connected to the second conductor pattern 13 are formed on the lower surface of an insulating substrate 11. The first conductor pattern 12 and the third conductor pattern 22 are electrically connected by through-hole plating 24 formed in a through-hole penetrating the first conductor pattern 12, the insulating substrate 11, and the third conductor pattern 22. The second conductor pattern 13 and the fourth conductor pattern 23 are electrically connected by through-hole plating 25 formed in a through-hole penetrating the second conductor pattern 13, the insulating substrate 11, and the fourth conductor pattern 23. In the discharge wiring board 10 having conductor patterns formed on the upper and lower surfaces of the insulating substrate 11, the third conductor pattern 22 is joined to the inner connection portion 721 of the first main terminal 720 of the case 7 by a bonding material 5E, and the fourth conductor pattern 23 is joined to the inner connection portion 731 of the second main terminal 730 of the case 7 by a bonding material 5F.

[0061] The discharge wiring board 10 illustrated in Fig. 11 and Fig. 12 can be formed by etching. For example, in the process of laminating the conductive film 20 having the slits 2001 to the upper surface of the insulating substrate 11 having the openings 1101, as described above with reference to Fig. 8 and Fig. 9, or before or after the process, another conductive film is also laminated to the lower surface of the insulating substrate 11 to form a double-sided copper-clad laminate. After that, through holes are formed that penetrate the conductive film 20 on the upper surface of the insulating substrate 11, the insulating substrate 11, and the conductive film on the lower surface of the insulating substrate 11, and through-hole platings 24 and 25 are formed in the through holes. After the through-hole platings 24 and 25 are formed, the conductive film 20 on the upper surface of the insulating substrate 11 and the conductive film on the lower surface are patterned by etching to form the first conductive pattern 12, the second conductive pattern 13, the third conductive pattern 22, and the fourth conductive pattern 23.

[0062] In addition, in the discharge wiring board 10 described above with reference to Fig. 11 and Fig. 12, the shapes of the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 are not limited to the rectangular parallelepiped illustrated in Fig. 11 and Fig. 12. The shapes of the discharge portions 1210 and 1310 may be, for example, as illustrated in Fig. 18A and Fig. 18B, in which other surfaces are in contact with the outer periphery (side) of the end faces 1211 and 1311 at an obtuse angle, or in which the outer periphery or the entire end face is a convex curved surface. By forming the shape such that other surfaces are not in contact with the outer periphery (side) of the end faces 1211 and 1311 at a right angle, it is possible to suppress the concentration of the electric field on the outer periphery of the end faces 1211 and 1311 described above, or to prevent the concentration of the electric field from occurring.

[0063] 11 and 12 are electrically connected to a first main terminal 720 and a second main terminal 730 of the case 7 via bonding materials 5E and 5F, such as solder, located below the discharge wiring board 10. This makes it possible to prevent interference between, for example, a bonding wire 6A (see FIGS. 1 and 2) connecting the first main terminal 720 and the first conductor pattern 301 of the first wiring board 3A and a bonding wire 15A connecting the first conductor pattern 12 of the discharge wiring board 10 and the first main terminal 720.

[0064] The method for electrically connecting the conductor pattern on the upper surface of insulating substrate 11 to the conductor pattern on the lower surface thereof is not limited to the above-mentioned method using through-hole plating 24 and 25, and other methods may be used. For example, the conductor film 20 on the upper surface of insulating substrate 11 or the conductor film on the lower surface thereof may be electrically connected to a via formed by filling a conductor in a via hole penetrating insulating substrate 11 by plating or the like.

[0065] Furthermore, in the semiconductor device 1 of the present embodiment, instead of using the discharge wiring board 10, for example, a discharge portion may be formed on each of the first main terminal 720 and the second main terminal 730.

[0066] Fig. 13 is a perspective view illustrating another configuration example of the discharge unit, and Fig. 14 is a view taken along the arrow C of the discharge unit in Fig. 13 .

[0067] The semiconductor device 1 illustrated in Figures 13 and 14 has a first discharge portion 722 protruding from an inner connection portion 721 of a first main terminal 720 and a second discharge portion 732 protruding from an inner connection portion 731 of a second main terminal 730.

[0068] The first discharge portion 722 has a first portion 723 extending upward from the surface 711 of the case member 700 on which the first main terminal 720 is arranged, and a second portion 724 extending from an upper end portion of the first portion 723 along the surface 711 in a direction approaching the second main terminal 730. The second portion 724 extends in a direction along the surface 711 at a position spaced a distance D from the surface 711 of the case member 700. The second discharge portion 732 has a first portion 733 extending upward from the surface 711 of the case member 700 on which the second main terminal 730 is arranged, and a second portion 734 extending from an upper end portion of the first portion 733 along the surface 711 in a direction approaching the first main terminal 720. Second portion 734 extends in a direction along surface 711 at a position spaced a distance D from surface 711 of case member 700. Second portion 724 of first discharge portion 722 and second portion 734 of second discharge portion 732 face each other across gap G2. Second portion 724 of first discharge portion 722 and second portion 734 of second discharge portion 732 illustrated in Figs. 13 and 14 correspond to discharge portion 1210 of first conductor pattern 12 and discharge portion 1310 of second conductor pattern 13 in discharge wiring board 10 described above with reference to Figs. 3 and 4, etc.

[0069] The semiconductor device 1 having the first discharge portion 722 and the second discharge portion 732 described above with reference to Figures 13 and 14, like the semiconductor device 1 having the discharge wiring board 10, is capable of reducing the individual difference in the gap G2 between the second portions 724 and 734, and can prevent insulators such as the case member 700 from burning during discharge.

[0070] The method of forming the case 7 including the first main terminal 720 having the first discharge portion 722 and the second main terminal 730 having the second discharge portion 732 is not limited to a specific method. For example, the case 7 may be formed by insert molding using the first main terminal 720 and the second main terminal 730 in which the second portion 724 of the first discharge portion 722 and the second portion 734 of the second discharge portion 732 are integrated, and then the second portion 724 of the first discharge portion 722 and the second portion 734 of the second discharge portion 732 may be cut by laser processing or electric discharge processing to form the gap G2. The shapes of the second portion 724 of the first discharge portion 722 and the second portion 734 of the second discharge portion 732 are not limited to the rectangular parallelepiped exemplified in FIG. 13 and FIG. 14. The shapes of the second portion 724 of the first discharge portion 722 and the second portion 734 of the second discharge portion 732 can also be similar to the shapes of the discharge portions 1210 and 1310 illustrated in Figures 18A and 18B. By forming the shapes such that no other surface is in contact at a right angle with the outer periphery (side) of the end face (discharge surface) 725 in the second portion 724 of the first discharge portion 722 and the end face 735 in the second portion 734 of the second discharge portion 732, it is possible to suppress the concentration of the electric field on the outer periphery of the end faces 725 and 735 described above, or to prevent the concentration of the electric field from occurring.

[0071] Moreover, the semiconductor device provided with the above-mentioned discharge section is not limited to the semiconductor device 1 (see FIG. 1) in which the half-bridge inverter circuit 16 described above with reference to FIG. 5 is formed.

[0072] Fig. 15 is a top view showing another configuration example of a semiconductor device Fig. 16 is an equivalent circuit diagram explaining an example of an inverter circuit using the semiconductor device shown in Fig. 15.

[0073] In the semiconductor device 100 illustrated in FIG. 15, a first main terminal 720, a second main terminal 730, and a control terminal 750 are provided in a case 7 that accommodates a circuit board 2C. In other words, the case 7 of the semiconductor device 100 does not include the third main terminal 740 and the control terminal 760 in the case 7 of the semiconductor device 1 described above with reference to FIG. 1 and the like. The circuit board 2C includes a wiring board 3C and four semiconductor elements (including a first semiconductor element 4A) arranged on the upper surface of the wiring board 3C. The wiring board 3C includes an insulating substrate 320, conductor patterns 321 to 323 provided on the upper surface of the insulating substrate 320, and a conductor pattern (not shown) provided on the lower surface of the insulating substrate 320. The four semiconductor elements in the circuit board 2C are, for example, the above-mentioned RC-IGBT elements, and the first main electrodes on the lower surfaces are connected to the first main terminal 720 of the case 7 via the first conductor pattern 321 of the wiring board 3C and the bonding wire 6A. A second main electrode on the upper surface of the semiconductor element is connected to a second conductor pattern 322 of wiring board 3C by a bonding wire (e.g., bonding wire 6B), and second conductor pattern 322 is connected to a second main terminal 730 of case 7 by a bonding wire 6N. A control electrode on the upper surface of the semiconductor element is connected to a third conductor pattern 323 of wiring board 3C by a bonding wire (e.g., bonding wire 6D), and third conductor pattern 323 is connected to a control terminal 750 of case 7 by a bonding wire 6F. Case 7 is provided with a discharge wiring board 10 used for discharging between first main terminal 720 and second main terminal 730.

[0074] 16 shows a half-bridge inverter circuit 16 composed of a first circuit 16A and a second circuit 16B, each of which is a separate semiconductor device 100. The first circuit 16A includes a first switching element 1604 and a first diode element 1606 corresponding to the upper arm 1611 illustrated in FIG. 5, a collector-side terminal 1601A of the first switching element 1604 corresponds to the first main terminal 720, and an emitter-side terminal 1602A corresponds to the second main terminal 730. The second circuit 16B includes a second switching element 1605 and a second diode element 1607 corresponding to the lower arm 1612 illustrated in FIG. 5, a collector-side terminal 1601B of the second switching element 1605 corresponds to the first main terminal 720, and an emitter-side terminal 1602B corresponds to the second main terminal 730. The emitter side terminal 1602A of the first circuit 16A and the collector side terminal 1601B of the second circuit 16B are electrically connected by, for example, a terminal board (sometimes called a bus bar) functioning as an OUT terminal 1603 in the half-bridge inverter circuit 16. At this time, the collector side terminal 1601A in the first circuit 16A functions as a P terminal 1601 in the half-bridge inverter circuit 16, and the emitter side terminal 1602B in the second circuit 16B functions as an N terminal 1602 in the half-bridge inverter circuit 16 (see FIG. 5).

[0075] In the half-bridge inverter circuit 16 formed using the semiconductor device 100 illustrated in Fig. 15, a discharge path 1620 may be formed in each of the first circuit 16A and the second circuit 16B formed by separate semiconductor devices 100. The discharge path 1620 illustrated in Fig. 16 may utilize the discharge wiring board 10 (see Figs. 3 and 4, and Figs. 11 and 12), or may be a part formed integrally with the first main terminal 720 and the second main terminal 730 (see Figs. 13 and 14).

[0076] Furthermore, in the semiconductor device 1, 100 using the discharge wiring board 10 described above with reference to Figures 3 and 4, for example, the first conductor pattern 12 and the second conductor pattern 13 formed on the upper surface of the insulating substrate 11 may be connected to the first main terminal 720 and the second main terminal 730, respectively, via a high-resistance member.

[0077] FIG. 17 is a cross-sectional view for explaining another example of a connection method of a discharge wiring board. The cross-sectional view of FIG. 17 corresponds to the cross-section taken along the line A-A' of FIG. 3. The discharge wiring board 10 illustrated in FIG. 17 has the configuration described above with reference to FIG. 3 and FIG. 4, and the first conductor pattern 12 and the second conductor pattern 13 are formed on the upper surface of the insulating substrate 11, and are bonded to the surface 711 of the case member 700 by the adhesive 14. The shapes of the discharge portion 1210 of the first conductor pattern 12 and the discharge portion 1310 of the second conductor pattern 13 are not limited to rectangular parallelepipeds, and may be shapes as illustrated in FIG. 18A and FIG. 18B. In the discharge wiring board 10 illustrated in FIG. 3 and FIG. 4, the end of the bonding wire 15A on the inner connection portion 721 side, which connects the first conductor pattern 12 formed on the upper surface of the insulating substrate 11 and the inner connection portion 721 of the first main terminal 720, is directly connected to the upper surface of the inner connection portion 721. Similarly, an end of a bonding wire 15 B connecting the second conductor pattern 13 and an inner connection portion 731 of a second main terminal 730 on the inner connection portion 731 side is directly connected to the upper surface of the inner connection portion 731 .

[0078] 17, high resistance members 30A and 30B are provided on the inner connection portion 721 of the first main terminal 720 and on the inner connection portion 731 of the second main terminal 730, respectively, and one end of the bonding wire 15A is connected to the high resistance member 30A, and one end of the bonding wire 15B is connected to the high resistance member 30B. The high resistance members 30A and 30B are formed of, for example, a material having a resistance of about 200 kΩ or other suitable insulating material. The shapes of the high resistance members 30A and 30B are not limited to a specific shape.

[0079] By providing the high resistance members 30A and 30B, for example, the impedance in the discharge path 1620 (see FIG. 5) becomes large, and the surge energy can be effectively absorbed. This makes it possible to make the semiconductor device less susceptible to damage caused by the surge voltage.

[0080] The embodiments of the semiconductor device 1 according to the present invention are not limited to the above-mentioned embodiments, and may be modified, substituted, or altered in various ways without departing from the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way due to technological progress or a derived technology, the invention may be implemented using that method. Therefore, the claims cover all embodiments that may be included within the scope of the technical idea.

[0081] For example, the switching element in the semiconductor element 4 of the semiconductor device 1 is not limited to the above-mentioned IGBT element, and may be, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a BJT (Bipolar Junction Transistor), or the like. When the switching element is a MOSFET element, the main electrode on the lower surface side of the semiconductor element 4 may be called a drain electrode, and the main electrode on the upper surface side may be called a source electrode. Also, the diode element in the semiconductor element 4 may be, for example, an SBD (Schottky Barrier Diode), a JBS (Junction Barrier Schottky) diode, an MPS (Merged PN Schottky) diode, a PN diode, or the like. Also, the control electrode provided on the upper surface of the semiconductor element 4 may include a gate electrode and an auxiliary electrode. For example, the auxiliary electrode may be an auxiliary emitter electrode or an auxiliary source electrode that is electrically connected to the main electrode on the upper surface side and serves as a reference potential for the gate potential. Also, the auxiliary electrode may be a temperature sense electrode that is electrically connected to a temperature sense unit that may be included in an inverter device or the like equipped with the semiconductor device 1, and measures the temperature of the semiconductor element 4.

[0082] Furthermore, the half-bridge inverter circuit 16 in the semiconductor device 1 may be composed of, for example, a semiconductor element in which a switching element is formed and a semiconductor element in which a diode element is formed. The inverter circuit formed in the semiconductor device 1 may be a full-bridge inverter circuit. The inverter circuit formed in a single semiconductor device 1 is not limited to the single-phase AC inverter circuit described above with reference to FIG. 5, but may be a three-phase AC inverter circuit or the like.

[0083] The semiconductor devices 1 and 100 of the above-described embodiments can be applied to industrial power conversion devices, such as inverter devices for driving motors in elevators, escalators, building air conditioning systems, and railroad cars. The applications of the semiconductor devices 1 and 100 are not limited to specific applications. The semiconductor device having the above-described discharge portion is not limited to the semiconductor device 1 (see FIG. 1) in which an inverter circuit is formed, or the semiconductor device 100 (see FIG. 15) that can be used to form an inverter circuit.

[0084] The features of the above-described embodiment will be summarized below.

[0085] The semiconductor device according to the above-described embodiment comprises a circuit board including a wiring board and a semiconductor element arranged on a first surface of the wiring board, a case having a hollow portion for accommodating the circuit board, and a first conductive terminal and a second conductive terminal attached to the case, each having an internal connection portion exposed toward the hollow portion of the case and an external connection portion exposed in a direction different from the hollow portion, wherein the first conductive terminal and the second conductive terminal each have discharge portions that face each other within the hollow portion of the case at a second gap that is narrower than the first gap between the internal connection portions, and the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal protrude at a position spaced apart from other members and face each other via the gas.

[0086] In the semiconductor device of the above embodiment, the first conductive terminal is electrically connected to a first terminal of a circuit formed on the circuit board, and the second conductive terminal is electrically connected to a second terminal of the circuit, and the gap between the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal is sized to discharge when the potential difference between the first conductive terminal and the second conductive terminal becomes equal to or greater than a potential difference set based on the operating voltage of the circuit.

[0087] In the semiconductor device of the above embodiment, an inverter circuit is formed on the circuit board, the first conductive terminal is connected to a first input terminal of the inverter circuit, and the second conductive terminal is connected to a second input terminal of the inverter circuit.

[0088] The semiconductor device according to the above embodiment further includes a discharge wiring plate in which a first conductor pattern and a second conductor pattern are arranged on a first surface of an insulating substrate so as to face each other with the predetermined gap, the insulating substrate has an opening on the first surface, the first conductor pattern and the second conductor pattern each have a discharge portion extending over the opening and protruding at a position spaced apart from other members and facing each other with the predetermined gap interposed therebetween, the discharge wiring plate is attached to the case within the hollow portion of the case with a second surface of the insulating substrate opposite the first surface facing the case, the first conductor pattern is electrically connected to the first conductor terminal as the discharge portion of the first conductor terminal, and the second conductor pattern is electrically connected to the second conductor terminal as the discharge portion of the second conductor terminal.

[0089] In the semiconductor device of the above embodiment, the internal connection portion of the first conductor terminal and the internal connection portion of the second conductor terminal are arranged on a single plane facing the hollow portion of the case, and the discharge portion of the first conductor terminal and the discharge portion of the second conductor terminal face each other in the in-plane direction of the single plane.

[0090] The semiconductor device according to the above embodiment further includes a cooler that is disposed at a position facing a second surface of the wiring board opposite the first surface, and is thermally connected to the wiring board.

[0091] The semiconductor device according to the above embodiment further includes a sealant that seals the circuit board so that the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal protrude at a position spaced apart from other members and face each other via the gas. [Industrial Applicability]

[0092] As described above, the present invention can reduce the occurrence of individual differences in the configuration of the discharge section that discharges when an overvoltage exceeding the assumption in the device design due to a lightning strike or the like is applied to the semiconductor device, and can more reliably prevent failures such as the destruction of semiconductor elements inside the semiconductor device due to an overvoltage. By applying such a semiconductor device to industrial power conversion devices (inverter devices) such as elevators, escalators, air conditioning equipment, and railway cars that operate on commercial power sources, in particular, it is possible to avoid failures and emergency stops due to lightning strikes and the like. [Explanation of symbols]

[0093] 1 Semiconductor device 2A, 2B circuit board 3A, 3B wiring board 300, 310 Insulating substrate 301~305, 311~313, 315 Conductor pattern 4A, 4A, 4C Semiconductor elements 5A~5C, 5E, 5F Bonding material 6A~6H, 6J~6L, 6N, 15A, 15B Bonding wire 7 Cases 700 Case material 710 Storage unit 711 sides 720 First main terminal 730 Second main terminal 721, 731 Inner connection part 722, 732 Discharge section 740 Third main terminal 750, 760 Control terminal 8 Cooler 10 Discharge wiring board 11 Insulating substrate 12 First conductor pattern 13 Second conductor pattern 1210, 1310 Discharge section 14 Adhesive 16 Half-bridge inverter circuit 1604, 1605 Switching element 1606, 1607 Diode elements 1620 Discharge Path

Claims

1. a circuit board including a wiring board and a semiconductor device disposed on a first surface of the wiring board; a case having a hollow portion for accommodating the circuit board; a first conductive terminal and a second conductive terminal attached to the case, each having an internal connection portion exposed toward the hollow portion of the case and an external connection portion exposed in a direction different from the hollow portion; Equipped with The first conductive terminal and the second conductive terminal each have a discharge portion that faces each other in the hollow portion of the case with a second gap that is narrower than the first gap between the internal connection portions, and the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal protrude to a position spaced apart from other members and face each other via a gas. Semiconductor device.

2. the first conductive terminal is electrically connected to a first terminal of a circuit formed on the circuit board, and the second conductive terminal is electrically connected to a second terminal of the circuit; The gap between the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal is sized to discharge when a potential difference between the first conductive terminal and the second conductive terminal becomes equal to or greater than a potential difference set based on an operating voltage of the circuit. The semiconductor device according to claim 1 .

3. An inverter circuit is formed on the circuit board, the first conductive terminal is connected to a first input terminal of the inverter circuit, and the second conductive terminal is connected to a second input terminal of the inverter circuit. The semiconductor device according to claim 1 .

4. a discharge wiring board in which the first conductor pattern and the second conductor pattern are disposed on the first surface of the insulating substrate so as to face each other with the predetermined gap therebetween; the insulating substrate has an opening in the first surface, the first conductor pattern and the second conductor pattern each have a discharge portion extending over the opening and protruding at a position spaced apart from other members, the discharge portion facing each other with the predetermined gap interposed therebetween, the discharge wiring board is attached to the case in the hollow portion of the case with a second surface of the insulating substrate opposite to the first surface facing the case, The first conductor pattern is electrically connected to the first conductor terminal as the discharge portion of the first conductor terminal, and the second conductor pattern is electrically connected to the second conductor terminal as the discharge portion of the second conductor terminal. The semiconductor device according to claim 1 .

5. the internal connection portion of the first conductor terminal and the internal connection portion of the second conductor terminal are disposed on a single surface facing the hollow portion of the case, The discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal face each other in an in-plane direction of the single surface. The semiconductor device according to claim 1 .

6. a cooler that is arranged at a position facing a second surface of the wiring board opposite to the first surface and thermally connected to the wiring board. The semiconductor device according to claim 1 .

7. a sealant that seals the circuit board so that the discharge portion of the first conductive terminal and the discharge portion of the second conductive terminal protrude at a position spaced apart from the other member and face each other via the gas. The semiconductor device according to claim 1 .

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