Control circuit, processing method, and program

Abstract

To provide a control circuit capable of being used without turning off the power supply when changing a configuration of a semiconductor device having rewritable circuit configuration or a rewritable logic circuit.SOLUTION: The control circuit comprises: a programmable digital power supply which is an interface with a digital power supply, and supplies power to a semiconductor device having a rewritable circuit configuration or to a rewritable logic circuit; and a power supply circuit generating multiple types of power supply voltages from a single type of power supply by a digital signal control signal connected to the interface circuit, dynamically changing and adjusting the multiple types of power supply voltages, and applying the multiple types of changed and adjusted power supply voltages to the semiconductor device having a rewritable circuit configuration or to the rewritable logic circuit.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present disclosure relates to a control circuit, a processing method, and a program. [Background technology]

[0002] A control circuit for controlling a digital power supply may be implemented using an FPGA with a rewritable circuit configuration or an ASIC including a rewritable logic circuit, etc. Patent Document 1 discloses a related technology for optimizing the power supply voltage value of a PLD by optimizing the delay amount of the critical path of the PLD. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-027413 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the control circuit for controlling the digital power supply related to the cited document 1, when using a field programmable gate array (FPGA), which is a semiconductor device whose circuit configuration can be rewritten, the power supply voltage applied during normal operation differs from that applied when the circuit configuration is changed. If the power supply voltage applied to a dynamically reconfigurable circuit such as this FPGA differs between normal operation and when the circuit configuration is changed, the power supply must be cut off once when the circuit configuration is changed, and the power supply voltage applied must be changed. In this case, it is difficult to continuously use the dynamically reconfigurable circuit.

[0005] An object of each aspect of the present disclosure is to provide a control circuit, a processing method, and a program that can solve the above problems. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, the control circuit includes a programmable digital power supply that is an interface with a digital power supply and supplies power to a semiconductor device or a rewritable logic circuit whose circuit configuration is rewritable, and a power supply circuit that generates multiple types of power supply voltages from a single type of power supply based on a digital signal control signal connected to the interface circuit, dynamically changes and adjusts the multiple types of power supply voltages, and applies the changed and adjusted multiple types of power supply voltages to the semiconductor device or the rewritable logic circuit whose circuit configuration is rewritable.

[0007] According to another aspect of the present disclosure, a processing method is an interface with a digital power supply, and a control circuit controlling a digital power supply that supplies power to a semiconductor device or a rewritable logic circuit whose circuit configuration is rewritable generates multiple types of power supply voltages from a single type of power supply as digital power supply control signals connected to an interface circuit, dynamically changes and adjusts the multiple types of power supply voltages, and applies the changed and adjusted multiple types of power supply voltages to the rewritable semiconductor device or the rewritable logic circuit.

[0008] According to another aspect of the present disclosure, the program executes a control circuit that is an interface with a digital power supply and that includes an interface circuit that connects a control signal to a digital power supply that supplies digital power to a semiconductor device or a rewritable logic circuit whose circuit configuration is rewritable, and a means for generating multiple types of power supply voltages from a single type of power supply as power supply voltages to be applied to the interface circuit, dynamically changing and adjusting the multiple types of power supply voltages, and applying the changed and adjusted multiple types of power supply voltages to the rewritable semiconductor device or the rewritable logic circuit. Effect of the Invention

[0009] According to each aspect of the present disclosure, when changing the configuration of a rewritable semiconductor device or a rewritable logic circuit, the device can be used continuously without cutting off the power supply. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating an example of a configuration of a digital power supply control circuit according to the present disclosure. [Diagram 2] FIG. 1 is a diagram illustrating an example of a configuration of a digital power supply control circuit to be compared. [Diagram 3] FIG. 1 is a diagram illustrating an example of a configuration of a digital power supply control circuit according to the present disclosure. [Figure 4] FIG. 13 is a diagram showing the configuration of another control circuit according to the present disclosure. [Diagram 5] FIG. 11 is a diagram showing an example of a processing flow of another control circuit according to the present disclosure. [Figure 6] FIG. 1 is a schematic block diagram showing the configuration of a computer according to the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, the embodiments will be described in detail with reference to the drawings. First Embodiment (Configuration of digital power supply control circuit) A digital power supply control circuit 1 according to a first embodiment of the present disclosure will be described with reference to the drawings. Fig. 1 is a diagram showing an example of the configuration of the digital power supply control circuit 1 according to the present disclosure. As shown in Fig. 1, the digital power supply control circuit 1 includes a digital power supply 10, an FPGA (Field Programmable Gate Array) 20 (an example of an interface circuit), a microprocessor (or an FPGA other than the FPGA 20) 30, another circuit (or a microprocessor) 40, and an interface circuit 50.

[0012] The digital power supply 10 includes a programmable single external power supply 101 and a programmable POL (Programmable Point Of Load) 102 (an example of a power supply circuit). The programmable POL (Programmable Point Of Load) 102 generates multiple types of power supply voltages from the single type of power supply of the programmable single external power supply 101 based on a digital power supply control signal input from a microprocessor (or an FPGA other than the FPGA 20) 30 via an interface circuit 50, and dynamically changes and adjusts the power supply voltage. Then, the programmable POL 102 applies the multiple types of power supply voltages after the change and adjustment to the FPGA 20.

[0013] The FPGA 20 is connected to a microprocessor (or another FPGA other than the FPGA 20) 30 and other circuits (or a microprocessor) 40 via signal lines.

[0014] The programmable POL 102 and FPGA 20 are implemented in the same module. The mode of the FPGA 20 can be dynamically switched between application execution and circuit information rewriting, and the multiple types of power supply voltages output by the programmable POL 102 are also changed in synchronization with the switching. This allows the output of the programmable single external power supply 101 to remain at a single type of voltage, and allows the circuit information of the FPGA 20 to be switched without turning off the power of the FPGA 20.

[0015] The microprocessor (or another FPGA than the FPGA 20) 30 generates a digital power supply control signal that controls the digital power supply 10. The microprocessor (or another FPGA than the FPGA 20) 30 outputs the digital power supply control signal to the digital power supply 10 via the interface circuit 50.

[0016] Another circuit (or microprocessor) 40 is a circuit (or microprocessor) that executes a predetermined process.

[0017] The interface circuit 50 is a circuit that connects the microprocessor (or another FPGA other than the FPGA 20) 30 and the digital power supply 10.

[0018] (Digital power control circuit operation) The programmable POL 102 has a programmable function. The programmable function includes a function for switching the nominal value of the voltage output and an adjustment function (adjustment circuit) for adjusting each power supply voltage in mV units. The microprocessor (or another FPGA than the FPGA 20) 30 has a function for controlling the digital power supply 10 according to the mode of the FPGA 20. That is, the microprocessor (or another FPGA than the FPGA 20) 30 can output a digital power supply control signal according to the mode of the FPGA 20 to the digital power supply 10.

[0019] The mode of the FPGA 20 can be dynamically switched between application execution and circuit information rewriting. The programmable POL 102 changes multiple types of power supply voltages in synchronization with the switching under the control of a digital power supply control signal. This allows the output of the programmable single external power supply 101 to remain at a single type of voltage, and the circuit information of the FPGA 20 to be switched without turning off the power to the FPGA 20.

[0020] (advantage) The above describes the digital power supply control circuit 1 according to the first embodiment of the present disclosure. Here, we will explain the advantages of the digital power supply control circuit 1. To show the advantages of the digital power supply control circuit 1, first, we will explain a digital power supply control circuit 1a for comparison.

[0021] 2 is a diagram showing an example of the configuration of a digital power supply control circuit 1a for comparison. As shown in FIG. 2, the digital power supply control circuit 1a includes two POLs 10a, an FPGA 20, and a microprocessor 30. The FPGA 20 and the microprocessor 30 are similar processors to the FPGA 20 and the microprocessor 30 included in the digital power supply control circuit 1.

[0022] Unlike the programmable POL 10, the two POLs 10a cannot vary the voltage they output. That is, the voltages output by the two POLs 10a are fixed voltages. One of the two POLs 10a generates multiple types of fixed power supply voltages from a single type of power supply, which is a single external power supply for application circuit operation, and applies the generated fixed power supply voltages to the FPGA 20. The other of the two POLs 10a generates multiple types of fixed power supply voltages from a single type of power supply, which is a single external power supply for circuit information rewriting, and applies the generated fixed power supply voltages to the FPGA 20. In this way, when the two POLs 10a apply fixed power supply voltages to the FPGA 20, the fixed power supply voltages generated by the two POLs 10a may differ because they are fixed power supply voltages for application circuit operation and circuit information rewriting. If the fixed power supply voltages generated by the two POLs 10a are different, when applying a fixed power supply voltage for rewriting circuit information to the FPGA 20 during a change in the circuit configuration, it is necessary to temporarily shut off the power supply for operating the application circuit of the FPGA 20 and then restart the FPGA 20 to apply the fixed power supply voltage for rewriting the circuit information. Therefore, in the digital power supply control circuit 1a, it is difficult to switch the circuit information of the FPGA 20 without temporarily shutting down the power supply of the FPGA 20.

[0023] In contrast, as described above, the digital power supply control circuit 1 according to the first embodiment of the present disclosure does not change the output of the programmable single external power supply 101 from a single type of voltage, and can switch the circuit information of the FPGA 20 without turning off the power of the FPGA 20. Also, in the digital power supply control circuit 1, the programmable POL 102 that generates multiple types of power supply voltages has a voltage adjustment circuit that can perform fine adjustment to about 1 / 1000 of the rated voltage, thereby enabling reliable rewriting of the circuit configuration.

[0024] <Second embodiment> A digital power supply control circuit 1 according to a second embodiment of the present disclosure will be described with reference to the drawings. Fig. 3 is a diagram showing an example of the configuration of the digital power supply control circuit 1 according to the present disclosure. As shown in Fig. 3, the digital power supply control circuit 1 includes a programmable single external power supply 101, a microprocessor (or an FPGA other than the FPGA 602) 30, another circuit (or a microprocessor) 40, an interface circuit 50, and an ASIC (Application Specific Integrated Circuit) 60.

[0025] The programmable single external power supply 101 outputs a single programmed voltage to the ASIC 60 .

[0026] The microprocessor (or another FPGA other than the FPGA 602) 30 is a processor similar to the microprocessor (or another FPGA other than the FPGA 20) 30 included in the digital power supply control circuit 1 according to the first embodiment of the present disclosure.

[0027] Another circuit (or microprocessor) 40 is a circuit (or microprocessor) that executes a predetermined process.

[0028] The interface circuit 50 is a circuit that connects the microprocessor (or an FPGA other than the FPGA 602) 30 and the digital power supply 10.

[0029] As shown in FIG. 3, the ASIC 60 includes a programmable power supply circuit 601 and a PFGA (logic circuit) 602.

[0030] The programmable power supply circuit 601 is, for example, a circuit similar to the programmable POL 102 according to the first embodiment of the present disclosure. The programmable power supply circuit 601 generates multiple types of power supply voltages from a single type of power supply of the programmable single external power supply 101, and dynamically changes and adjusts the power supply voltage. Then, the programmable power supply circuit 601 applies the multiple types of power supply voltages after the change and adjustment to the FPGA (logic circuit) 602.

[0031] The programmable power supply circuit 601 also has a programmable function, which includes a function for switching the nominal value of the voltage output and an adjustment function (adjustment circuit) for adjusting each power supply voltage in mV units.

[0032] The FPGA (logic circuit) 602 of the ASIC 60 is connected to the microprocessor (or another FPGA than the FPGA 602) 30 and other circuits (or microprocessors) 40 via signal lines. The FPGA (logic circuit) 602 is made rewritable in terms of circuit information. The mode of the FPGA (logic circuit) 602 in the ASIC 60 can be dynamically switched between application execution mode and circuit information rewrite mode. The programmable power supply circuit 601 changes the multiple types of power supply voltages in synchronization with the switching. This allows the output of the programmable single external power supply 101 to remain at a single type of voltage, and allows the circuit information of the FPGA (logic circuit) 602 to be switched without turning off the power of the FPGA (logic circuit) 602.

[0033] (advantage) The digital power supply control circuit 1 according to the second embodiment of the present disclosure has been described above. In the digital power supply control circuit 1, the output of the programmable single external power supply 101 remains at a single type of voltage, and the circuit information of the FPGA (logic circuit) 602 can be switched without turning off the power of the FPGA (logic circuit) 602. In addition, in the digital power supply control circuit 1, the programmable power supply circuit 601 that generates multiple types of power supply voltages has a voltage adjustment circuit that can perform fine adjustment to about 1 / 1000 of the rated voltage, thereby enabling reliable rewriting of the circuit configuration.

[0034] Fig. 4 is a diagram showing a configuration of a control circuit 300 according to the present disclosure. As shown in Fig. 4, the control circuit 300 includes a digital power supply 301 and a power supply circuit 302. The control circuit 300 is an interface with the digital power supply.

[0035] The digital power supply 301 is a programmable digital power supply. The digital power supply 301 supplies power to a semiconductor device or a reprogrammable logic circuit whose circuit configuration is reprogrammable. The power supply circuit 302 generates multiple types of power supply voltages from a single type of power supply in response to a digital signal control signal connected to an interface circuit, dynamically changes and adjusts the multiple types of power supply voltages, and applies the changed and adjusted multiple types of power supply voltages to the semiconductor device or the reprogrammable logic circuit whose circuit configuration is reprogrammable.

[0036] The digital power supply 301 can be realized, for example, by using the function of the digital power supply 10 illustrated in Fig. 1, or the function of the programmable single external power supply 101 and the programmable power supply circuit 601 illustrated in Fig. 3. The power supply circuit 302 can be realized, for example, by using the function of the programmable POL 102 illustrated in Fig. 1, or the function of the programmable power supply circuit 601 illustrated in Fig. 3.

[0037] 5 is a diagram showing an example of a processing flow of the control circuit 300 according to the present disclosure. Next, processing of the control circuit 300 according to another embodiment of the present disclosure will be described with reference to FIG.

[0038] In the control circuit 300 that is an interface with the digital power supply, the digital power supply 301 is a programmable digital power supply. The digital power supply 301 supplies power to a semiconductor device or a rewritable logic circuit whose circuit configuration is rewritable (step S101). The power supply circuit 302 generates multiple types of power supply voltages from a single type of power supply according to a digital signal control signal connected to the interface circuit, dynamically changes and adjusts the multiple types of power supply voltages, and applies the changed and adjusted multiple types of power supply voltages to the semiconductor device or the rewritable logic circuit whose circuit configuration is rewritable (step S102).

[0039] The above describes the control circuit 300 according to another embodiment of the present disclosure. The control circuit 300 allows continuous use of a reprogrammable semiconductor device or a reprogrammable logic circuit without cutting off the power supply when the configuration of the reprogrammable semiconductor device or the reprogrammable logic circuit is changed.

[0040] It should be noted that the order of the processes in the embodiments of the present disclosure may be changed as long as appropriate processes are performed.

[0041] Although the embodiment of the present disclosure has been described, the above-mentioned control circuit 300 and other control devices may have a computer system inside. The above-mentioned process steps are stored in a computer-readable recording medium in the form of a program, and the above-mentioned process is performed by the computer reading and executing the program. Specific examples of computers are shown below.

[0042] 6 is a schematic block diagram showing the configuration of a computer according to the present disclosure, the computer 5 includes a CPU (Central Processing Unit) 6, a main memory 7, a storage 8, and an interface 9.

[0043] For example, the above-mentioned control circuit 300 and each of the other control devices are implemented in a computer 5. The operations of each of the above-mentioned processing units are stored in the storage 8 in the form of a program. The CPU 6 reads the program from the storage 8, loads it in the main memory 7, and executes the above-mentioned processing in accordance with the program. The CPU 6 also secures storage areas in the main memory 7 corresponding to each of the above-mentioned storage units in accordance with the program.

[0044] Examples of the storage 8 include a hard disk drive (HDD), a solid state drive (SSD), a magnetic disk, a magneto-optical disk, a compact disc read only memory (CD-ROM), a digital versatile disc read only memory (DVD-ROM), and a semiconductor memory. The storage 8 may be an internal medium directly connected to the bus of the computer 5, or an external medium connected to the computer 5 via an interface 9 or a communication line. In addition, when the program is distributed to the computer 5 via a communication line, the computer 5 that receives the program may load the program into the main memory 7 and execute the above-mentioned process. In at least one embodiment, the storage 8 is a non-transitory tangible storage medium.

[0045] The program may also realize some of the functions described above. Furthermore, the program may be a file that can realize the functions described above in combination with a program already recorded in the computer system, that is, a so-called differential file (differential program).

[0046] Although some embodiments of the present disclosure have been described, these embodiments are merely examples and do not limit the scope of the disclosure. Various additions, omissions, substitutions, and modifications may be made to these embodiments without departing from the spirit of the disclosure.

[0047] Although the present disclosure has been described above with reference to the embodiments, the present disclosure is not limited to the above-mentioned embodiments. Various modifications that can be understood by a person skilled in the art can be made to the configuration and details of the present disclosure within the scope of the present disclosure. Furthermore, each embodiment can be appropriately combined with other embodiments.

[0048] Note that some or all of the above-described embodiments can be described as, but are not limited to, the following supplementary notes.

[0049] (Appendix 1) It is an interface with digital power supplies, a programmable digital power supply for supplying power to a semiconductor device or a logic circuit whose circuit configuration can be reprogrammed; a power supply circuit that generates a plurality of types of power supply voltages from a single type of power supply in response to a digital signal control signal connected to an interface circuit, dynamically changes and adjusts the plurality of types of power supply voltages, and applies the changed and adjusted plurality of types of power supply voltages to the semiconductor device or the reprogrammable logic circuit having a circuit configuration; A control circuit comprising:

[0050] (Appendix 2) The semiconductor device whose circuit configuration can be rewritten is a Field Programmable Gate Array (FPGA). 2. The control circuit according to claim 1.

[0051] (Appendix 3) The rewritable logic circuit is part of an Application Specific Integrated Circuit (ASIC). 2. The control circuit according to claim 1.

[0052] (Appendix 4) The interface circuit includes: generating a control signal for controlling the digital power supply, and outputting the generated control signal to the digital power supply; 4. The control circuit according to claim 1,

[0053] (Appendix 5) It is an interface with digital power supplies, A control circuit for controlling a digital power supply that supplies power to a rewritable semiconductor device or a rewritable logic circuit, generating a plurality of types of power supply voltages from a single type of power supply as a digital power supply control signal to be connected to an interface circuit, dynamically changing and adjusting the plurality of types of power supply voltages, and applying the changed and adjusted plurality of types of power supply voltages to the reprogrammable semiconductor device or the reprogrammable logic circuit; Processing methods.

[0054] (Appendix 6) The semiconductor device whose circuit configuration can be rewritten is a Field Programmable Gate Array (FPGA). The processing method described in Appendix 5.

[0055] (Appendix 7) The rewritable logic circuit is part of an Application Specific Integrated Circuit (ASIC). The processing method described in Appendix 5.

[0056] (Appendix 8) The interface circuit includes: generating a control signal for controlling the digital power supply, and outputting the generated control signal to the digital power supply; 8. The processing method according to any one of claims 5 to 7.

[0057] (Appendix 9) A control circuit including an interface circuit that is an interface with a digital power supply and connects a control signal to a digital power supply that supplies digital power to a semiconductor device or a rewritable logic circuit having a circuit configuration rewritable, A program for executing a means for generating multiple types of power supply voltages from a single type of power supply as power supply voltages to be applied to the interface circuit, dynamically changing and adjusting the multiple types of power supply voltages, and applying the changed and adjusted multiple types of power supply voltages to the rewritable semiconductor device or the rewritable logic circuit.

[0058] (Appendix 10) The semiconductor device whose circuit configuration can be rewritten is a Field Programmable Gate Array (FPGA). 9. The program described in Appendix 9.

[0059] (Appendix 11) The rewritable logic circuit is part of an Application Specific Integrated Circuit (ASIC). 9. The program described in Appendix 9.

[0060] (Appendix 12) The interface circuit includes: generating a control signal for controlling the digital power supply, and outputting the generated control signal to the digital power supply; 12. The program according to any one of claims 9 to 11. [Explanation of symbols]

[0061] 1. Digital power supply control circuit 5. Computers 6. CPU 7. Main memory 8. Storage 9. Interface 10. Digital Power 10a···POL 20...FPGA 30. Microprocessor 40...Other circuits 50 Interface circuit 60···ASIC 101 Programmable Single External Power Supply 102 Programmable POL 300 Control circuit 301 Digital Power Supply 302...Power supply circuit 601 Programmable power supply circuit 602: FPGA (logic circuit)

Claims

1. a programmable digital power supply that is an interface with a digital power supply and supplies power to a semiconductor device or a logic circuit whose circuit configuration can be reprogrammed; a power supply circuit that generates a plurality of types of power supply voltages from a single type of power supply in response to a digital signal control signal connected to an interface circuit, dynamically changes and adjusts the plurality of types of power supply voltages, and applies the changed and adjusted plurality of types of power supply voltages to the semiconductor device or the reprogrammable logic circuit having a circuit configuration; A control circuit comprising:

2. The semiconductor device having a reprogrammable circuit configuration is a Field Programmable Gate Array (FPGA).

2. The control circuit of claim 1.

3. The rewritable logic circuit is a part of an Application Specific Integrated Circuit (ASIC).

2. The control circuit of claim 1.

4. The interface circuit includes: generating a control signal for controlling the digital power supply, and outputting the generated control signal to the digital power supply; A control circuit according to any one of claims 1 to 3.

5. A control circuit which is an interface with a digital power supply and controls a digital power supply that supplies power to a rewritable semiconductor device or a rewritable logic circuit, generating a plurality of types of power supply voltages from a single type of power supply as a digital power supply control signal to be connected to an interface circuit, dynamically changing and adjusting the plurality of types of power supply voltages, and applying the changed and adjusted plurality of types of power supply voltages to the reprogrammable semiconductor device or the reprogrammable logic circuit; Processing methods.

6. A control circuit including an interface circuit that is an interface with a digital power supply and connects a control signal to a digital power supply that supplies digital power to a semiconductor device or a rewritable logic circuit having a circuit configuration rewritable, A program for executing a means for generating multiple types of power supply voltages from a single type of power supply as power supply voltages to be applied to the interface circuit, dynamically changing and adjusting the multiple types of power supply voltages, and applying the changed and adjusted multiple types of power supply voltages to the rewritable semiconductor device or the rewritable logic circuit.

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