Processing method of wafer
Patent Information
- Application Number
- JP2024108324
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-31
- Filing Date
- 2024-07-04
- Publication Date
- 2025-03-14
AI Technical Summary
【0011】 本願発明は、ウエーハの破損を抑制しつつ外周縁に沿った環状の改質層およびクラックを形成することができる。
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Figure 2025036121000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a wafer processing method. [Background technology]
[0002] In recent years, the development of 3D stacked semiconductor wafers has progressed in line with the trend toward lower profile and higher integration of device chips. For example, TSV (Through-Silicon Via) wafers enable the connection of electrodes between two chips by bonding them together using through-hole electrodes.
[0003] Such wafers are ground and thinned while bonded to a support wafer (silicon, glass, ceramics, etc.) that serves as a base. Normally, the outer edge of a wafer is chamfered, so when the wafer is ground to an extremely thin thickness, the outer edge becomes a so-called knife edge, and the edge is likely to chip during grinding. This may cause the chip to extend to the device, leading to damage to the device.
[0004] As a countermeasure to the knife edge, an edge trimming method has been devised in which wafers are bonded together and then a laser beam is irradiated along the outer edge of the device to form an annular modified layer, thereby preventing chipping of the wafer edge that occurs during grinding from extending into the device (see Patent Document 1). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2020-057709 A Summary of the Invention [Problem to be solved by the invention]
[0006] However, in the method of Patent Document 1, there is a possibility that the extension of the crack will differ depending on the irradiation position of the laser beam due to variations in the wafer surface orientation and thickness, and differences in the reflectance of the laser incident surface.
[0007] The present invention has been made in consideration of such problems, and its object is to provide a wafer processing method that can form an annular modified layer and cracks along the outer peripheral edge while suppressing damage to the wafer. [Means for solving the problem]
[0008] In order to solve the above-mentioned problems and achieve the object, the wafer processing method of the present invention comprises a modified layer formation step in which a laser beam having a wavelength that transmits through a wafer is annularly irradiated along a position a predetermined distance inside the outer circumferential edge of the wafer to form an annular modified layer and cracks extending from the modified layer inside the wafer, and a thinning step in which, after the modified layer formation step, one side of the wafer is ground to thin the wafer to a finish thickness, the modified layer formation step further comprising a storage step in which, before the modified layer formation step is performed, a predicted region indicating a region where poor formation of the cracks extending from the modified layer is predicted among the annular region along the outer circumferential edge where the laser beam is irradiated, and the modified layer formation step is characterized in that the laser beam is irradiated to the predicted region under irradiation conditions different from those of the annular region excluding the predicted region.
[0009] In the wafer processing method of the present invention, in the storing step, the predicted area may be set based on a crystal orientation of the wafer.
[0010] In addition, in the wafer processing method of the present invention, the irradiation conditions of the laser beam for the predicted area may be different from the irradiation conditions of the laser beam for the annular area excluding the predicted area in at least one of the output, phase, processing depth of the focal point, distance between the focal points, and pulse width of the laser beam. Effect of the Invention
[0011] The present invention can form an annular modified layer and cracks along the outer peripheral edge while suppressing damage to the wafer. [Brief description of the drawings]
[0012] [Figure 1] FIG. 1 is a perspective view showing an example of a wafer to be processed by the wafer processing method according to the embodiment. [Diagram 2] FIG. 2 is a cross-sectional view taken along the line II-II shown in FIG. [Diagram 3] FIG. 3 is a flowchart showing a flow of the wafer processing method according to the embodiment. [Figure 4] FIG. 4 is a perspective view showing one state of the bonded wafer forming step shown in FIG. [Diagram 5] FIG. 5 is a plan view of a bonded wafer showing an example of an expected area stored in the storing step shown in FIG. [Figure 6] FIG. 6 is a side view, partly in section, showing one state of the modified layer forming step shown in FIG. [Figure 7] FIG. 7 is an enlarged cross-sectional view showing a part of the bonded wafer after the modified layer forming step shown in FIG. [Figure 8] FIG. 8 is an enlarged cross-sectional view showing a part of the bonded wafer after the modified layer forming step shown in FIG. [Figure 9] FIG. 9 is a side view, partially in section, showing one state of the thinning step shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0013] The form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiment. Furthermore, the components described below include those that a person skilled in the art can easily imagine and those that are substantially the same. Furthermore, the configurations described below can be appropriately combined. Furthermore, various omissions, substitutions, or modifications of the configurations can be made without departing from the gist of the present invention.
[0014] [Embodiment] A method for processing a wafer 10 according to an embodiment of the present invention will be described with reference to the drawings. First, the wafer 10 to be processed will be described. Fig. 1 is a perspective view showing an example of the wafer 10 to be processed in the method for processing a wafer 10 according to the embodiment. Fig. 2 is a cross-sectional view taken along the line II-II shown in Fig. 1.
[0015] 1 and 2 is a wafer such as a disk-shaped semiconductor wafer or an optical device wafer, with silicon (Si), sapphire (Al2O3), gallium arsenide (GaAs), silicon carbide (SiC), or the like, as a substrate 11, and in the embodiment, is a silicon wafer. As shown in Fig. 2, the wafer 10 has a chamfered outer periphery 12 such that the center in the thickness direction protrudes most toward the outer periphery, and the cross section from the front surface 13 to the back surface 14 of the substrate 11 is arc-shaped.
[0016] 1, the wafer 10 has a device layer including a central region 15 on the surface 13 side of the substrate 11 and an outer periphery region 16 surrounding the central region 15. The central region 15 has a plurality of planned division lines 17 set in a lattice pattern on the surface 13 of the substrate 11, and devices 18 formed in each region partitioned by the planned division lines 17. The outer periphery region 16 is a region surrounding the central region 15 all around and in which no devices 18 are formed.
[0017] In the embodiment, the device 18 constitutes a 3D NAND flash memory and includes an electrode pad and a through electrode connected to the electrode pad. The through electrode penetrates the back surface 14 side of the substrate 11 when the substrate 11 is thinned and the devices 18 are individually separated from the wafer 10. That is, the wafer 10 of the embodiment is a so-called TSV wafer in which the individually separated devices 18 have through electrodes. Note that the wafer 10 of the present invention is not limited to a TSV wafer having through electrodes as in the embodiment, and may be a device wafer without through electrodes.
[0018] Next, the flow of the processing method of the wafer 10 will be described. FIG. 3 is a flow chart showing the flow of the processing method of the wafer 10 according to the embodiment. As shown in FIG. 3, the processing method of the wafer 10 according to the embodiment includes a bonded wafer forming step 1, a storage step 2, a modified layer forming step 3, and a thinning step 4. The processing method of the wafer 10 according to the embodiment is a method of bonding the front surface 13 side of one wafer 10 (first wafer 10-1) to the other wafer 10 (second wafer 10-2) by bonding them, forming a division starting point for removing the outer peripheral region 16, and then thinning the one wafer 10 (first wafer 10-1) to a predetermined finishing thickness 19.
[0019] In the following description, when distinguishing between the wafers 10 of the pair of wafers 10, one wafer 10 will be referred to as a first wafer 10-1 and the other wafer 10 will be referred to as a second wafer 10-2 (see FIG. 4), and when no distinction is required, the wafers will be simply referred to as wafers 10. The other, second wafer 10-2, which is not thinned, will be described as a TSV wafer similar to the first wafer 10-1 in the embodiment, but in the present invention, it may be a simple substrate wafer without a pattern.
[0020] (Bonded wafer formation step 1) Fig. 4 is a perspective view showing one state of the bonded wafer forming step 1 shown in Fig. 3. The bonded wafer forming step 1 is a step of forming a bonded wafer 20 by bonding the front surface 13 side of a first wafer 10-1 to a second wafer 10-2.
[0021] In the bonded wafer forming step 1, first, the surface 13 of the first wafer 10-1 and the surface 13 of the second wafer 10-2 are opposed to each other with a gap therebetween, as shown in Fig. 4. Next, the surface 13 of the first wafer 10-1 and the surface 13 of the second wafer 10-2 are bonded together. In this way, the bonded wafer 20 is formed.
[0022] In this case, when a bonding layer is provided between the first wafer 10-1 and the second wafer 10-2, the bonding layer is laminated on one of the front surface 13 of the first wafer 10-1 and the front surface 13 of the second wafer 10-2, and then the front surface 13 of the first wafer 10-1 and the front surface 13 of the second wafer 10-2 are bonded together via the bonding layer. The bonding layer may be a double-sided tape having an adhesive layer laminated on the front and back surfaces of a base layer, an oxide film, or a layer formed by applying an adhesive containing a resin or the like.
[0023] Alternatively, the first wafer 10-1 and the second wafer 10-2 may be directly bonded together without using a bonding layer. In this case, for example, at least one of the surface 13 of the first wafer 10-1 and the surface 13 of the second wafer 10-2 may be subjected to plasma treatment to activate them, and then temporarily bonded together, and then annealed to increase the bonding strength. In the plasma treatment, in a vacuum chamber, high-frequency power is supplied while a process gas such as argon (Ar), nitrogen (N2), or oxygen (O2) is being supplied, to supply a plasma-like gas to the surface to be treated with the plasma treatment.
[0024] The annealing method may be, for example, a single-wafer RTA in which the wafers are rapidly heated one by one in a chamber, or a batch method in which a plurality of bonded wafers 20 arranged in a quartz furnace tube are heated from the outside with a heater and simultaneously heat-treated, or may be a method of heating with a hot plate without being limited to infrared heating. Note that the annealing may be performed after the storage step 2 or the modified layer formation step 3, as long as it is performed before the thinning step 4 described later is performed.
[0025] In the embodiment, the surface 13 side of the first wafer 10-1 and the surface 13 side of the second wafer 10-2 are bonded together, but when the second wafer 10-2 is a substrate wafer, the surface 13 side of the second wafer 10-2 may be bonded to any surface of the second wafer 10-2. In the embodiment, the processing method of the wafer 10 performs each processing of the first wafer 10-1 in a state in which the surface 13 side of the first wafer 10-1 and the surface 13 side of the second wafer 10-2 are bonded together, but the wafer 10 processed in the present invention is not necessarily limited to the wafer 10 constituting the bonded wafer 20, and a single wafer 10 may be processed. That is, the bonded wafer forming step 1 may not be performed.
[0026] (Memory step 2) Fig. 5 is a plan view of the bonded wafer 20 showing one example of the predicted regions 24, 25 stored in the storing step 2 shown in Fig. 3. The storing step 2 of the embodiment is performed after the bonded wafer forming step 1 is performed. The storing step 2 is performed before the modified layer forming step 3 is performed. The storing step 2 is a step in which predetermined predicted regions 24, 25 are stored in advance in the annular region 23 along the outer circumferential edge 12 to be irradiated with the laser beam 43 (see Fig. 6).
[0027] The annular region 23 is located a predetermined distance inside the outer circumferential edge 12 to which the laser beam 43 is irradiated in the modified layer formation step 3 described below, and specifically, is the boundary between the central region 15 and the outer circumferential region 16. The predicted regions 24, 25 indicate regions where poor formation of a crack 22 (see FIG. 6, etc.) extending from the modified layer 21 (see FIG. 6, etc.) formed in the modified layer formation step 3 described below is predicted.
[0028] The predicted regions 24, 25 are set based on, for example, the crystal orientation of the first wafer 10-1. The wafer 10 is prone to cracking along the cleavage plane, and for example, the cleavage plane in the first wafer 10-1, which is a silicon wafer of the embodiment, is a crystal plane {100}, {111}, {110}, etc. The wafer 10 is unlikely to crack along a plane slightly tilted from the cleavage plane, so the crack 22 is unlikely to extend in a direction that is more than 0 degrees and less than 22.5 degrees from the direction along the crystal plane, particularly in a direction tilted at 1 degree or more and less than 5 degrees.
[0029] For example, the first wafer 10-1 shown in FIG. 5 has a main surface parallel to the front surface 13 and the back surface 14 with a crystal plane orientation of (100), and the crystal orientation indicated by the notch 26 is <110> In this case, the angle θ1 between the tangent of the planar annular region 23 of the main surface (rear surface 14) and the crystal plane {110} is set as the predicted region 24, where the angle is 0 degrees < θ1 < 22.5 degrees, preferably 1 degree ≦ θ1 < 5 degrees. The angle θ2 between the tangent of the planar annular region 23 of the main surface (rear surface 14) and the crystal plane {100} is set as the predicted region 25, where the angle is 0 degrees < θ2 < 22.5 degrees, preferably 1 degree ≦ θ2 < 5 degrees. Note that when the crystal plane orientation of the main surface is (111) or (110), the predicted regions 24 and 25 are set in a similar manner.
[0030] In this way, when setting the predicted regions 24, 25 based on the crystal orientation, for example, a mechanism for registering or recognizing the crystal orientation of the wafer 10 in advance is used. Then, in the storage step 2, the predicted regions 24, 25 are set based on the crystal orientation that has been registered in advance or recognized by the mechanism.
[0031] (Modified layer formation step 3) Fig. 6 is a side view partially in cross section showing one state of the modified layer forming step 3 shown in Fig. 3. Figs. 7 and 8 are enlarged cross-sectional views showing a part of the bonded wafer 20 after the modified layer forming step 3 shown in Fig. 3. The modified layer forming step 3 is performed after the storage step 2 is performed. The modified layer forming step 3 is a step of forming an annular modified layer 21 and cracks 22 extending from the modified layer 21 along a position a predetermined distance inside the outer circumferential edge 12 of the first wafer 10-1.
[0032] In the modified layer forming step 3, a modified layer 21 and cracks 22 are formed inside the first wafer 10-1 by stealth dicing using a laser processing device 40. The laser processing device 40 includes a holding table 41 and a laser beam irradiation unit 42. The holding table 41 holds the wafer 10 on a holding surface and is rotatable around a vertical axis. The laser beam irradiation unit 42 irradiates a laser beam 43 onto the wafer 10 (first wafer 10-1) held on the holding table 41. The laser processing device 40 further includes a moving unit (not shown) that moves the holding table 41 and the laser beam irradiation unit 42 relatively, an imaging unit (not shown) that images the wafer 10 held on the holding table 41, and the like.
[0033] In the modified layer forming step 3, a laser beam 43 is irradiated from the back surface 14 side of the first wafer 10-1 along a position a predetermined distance inside the outer circumferential edge 12 of the first wafer 10-1, thereby forming an annular modified layer 21 inside the first wafer 10-1. Specifically, the position a predetermined distance inside the outer circumferential edge 12 is the annular region 23 that is the boundary between the central region 15 and the outer circumferential region 16. The laser beam 43 is a laser beam with a wavelength that passes through the first wafer 10-1, for example, infrared rays (IR).
[0034] The modified layer 21 refers to a region in which the density, refractive index, mechanical strength or other physical properties are different from those of the surrounding area as a result of irradiation with the laser beam 43. The modified layer 21 is, for example, a melting process region, a crack region, a dielectric breakdown region, a refractive index change region, a region in which these regions are mixed, etc. The modified layer 21 has a lower mechanical strength, etc. than other parts of the first wafer 10-1.
[0035] In the modified layer forming step 3, first, the back surface 14 side of the second wafer 10-2 is sucked and held on the holding surface (upper surface) of the holding table 41. Next, the first wafer 10-1 and the condenser of the laser beam irradiation unit 42 are aligned. Specifically, the holding table 41 is moved to an irradiation area below the laser beam irradiation unit 42 by a moving unit (not shown). Next, the first wafer 10-1 is photographed and aligned by an imaging unit (not shown), so that the irradiation part of the laser beam irradiation unit 42 is vertically opposed to a position at a predetermined distance inside the outer circumferential edge 12 of the first wafer 10-1, and then the focusing point 44 of the laser beam 43 is set inside the first wafer 10-1.
[0036] In the modified layer forming step 3, next, while rotating the holding table 41 about a vertical axis, a pulsed laser beam 43 is emitted from a laser beam irradiation unit 42 to the back surface 14 of the first wafer 10-1. That is, the laser beam 43 is annularly irradiated along a position a predetermined distance inside the outer circumferential edge 12 of the first wafer 10-1.
[0037] At this time, the laser beam 43 is irradiated under different irradiation conditions between the predicted areas 24, 25 stored in advance in the storage step 2 and the annular area 23 excluding the predicted areas 24, 25. The irradiation conditions of the laser beam 43 are changed for at least one of the output, phase, processing depth of the condensing point 44, distance between the condensing points 44, and pulse width of the laser beam 43 between the predicted areas 24, 25 and the annular area 23 excluding the predicted areas 24, 25. Specifically, the irradiation conditions are set so that the laser intensity at the processing points is higher for the predicted areas 24, 25, such as the output of the laser beam 43 being higher, the distance between the condensing points 44 being shorter, and the pulse width being narrower, compared to the annular area 23 excluding the predicted areas 24, 25. In addition, irradiation conditions may be set to promote the growth of the crack, for example, by forming a phase pattern using a spatial light modulator (Liquid Crystal on Silicon-Spatial Light Modulator; LCOS-SLM) such that aberration is formed in the predicted regions 24, 25 compared to the annular region 23 excluding the predicted regions 24, 25, or by deepening the depth of the focal point 44.
[0038] As a result, an annular modified layer 21 is formed on the first wafer 10-1 along a position a predetermined distance inside the outer circumferential edge 12, and cracks 22 extend from the modified layer 21. As shown in Fig. 7, in the modified layer formation step 3, it is preferable to form the modified layer 21 by irradiating the laser beam 43 so that the cracks 22 extending from the modified layer 21 are exposed on the front surface 13 side of the first wafer 10-1. The cracks 22 may be exposed not only on the front surface 13 side of the first wafer 10-1 but also on the back surface 14 side.
[0039] In the modified layer forming step 3, the height of the focal point 44 of the laser beam 43 may be changed and the laser beam 43 may be irradiated multiple times, or a laser beam 43 having multiple focal points 44 spaced apart in the thickness direction of the first wafer 10-1 may be irradiated to form multiple modified layers 21 along the direction perpendicular to the surface 13 of the first wafer 10-1. A laser beam 43 branched in the traveling direction of the laser beam 43 may be used, a laser beam 43 branched in a direction perpendicular to the traveling direction may be used, or an elliptical laser beam 43 having a major axis in the traveling direction and a minor axis in a direction perpendicular to the traveling direction may be used.
[0040] When the laser beam 43 is irradiated multiple times from the back surface 14 side of the first wafer 10-1, the modified layer 21 is formed in sequence from the front surface 13 side toward the back surface 14 side. Moreover, "perpendicular to the front surface 13 of the first wafer 10-1" means that the inclination of an approximation plane obtained by approximating the entire extended crack 22 to a plane relative to the vertical plane is within ±5 degrees, preferably within ±2 degrees.
[0041] 6 and 7, a plurality of modified layers 21 extending along a direction perpendicular to the front surface 13 of the first wafer 10-1 and cracks 22 extending in the perpendicular direction are formed in the modified layer forming step 3, but a plurality of modified layers 21-1 and cracks 22-1 may be formed along the side surface of a truncated cone having an inclination from the front surface 13 side toward the back surface 14 side of the first wafer 10-1 as shown in Fig. 8. When the modified layers 21, 21-1 and the cracks 22, 22-1 are formed in an annular shape along the entire circumference of the first wafer 10-1, the modified layer forming step 3 is completed.
[0042] (Thinning Step 4) Fig. 9 is a side view, partially in cross section, showing one state of the thinning step 4 shown in Fig. 3. The thinning step 4 is performed after the modified layer forming step 3. The thinning step 4 is a step of grinding the wafer 10 (in the embodiment, the first wafer 10-1 of the bonded wafer 20) from the back surface 14 side to thin the wafer 10 to a finish thickness 19.
[0043] In the thinning step 4 of the embodiment, the back surface 14 side of the first wafer 10-1 is ground by a grinding device 50 to thin the wafer to a predetermined finish thickness 19. The grinding device 50 includes a holding table 51, a spindle 52 which is a rotating shaft member, a grinding wheel 53 attached to the lower end of the spindle 52, a grinding stone 54 attached to the lower surface of the grinding wheel 53, and a grinding fluid supply unit (not shown). The grinding wheel 53 rotates on an axis parallel to the axis of the holding table 51.
[0044] In the thinning step 4, first, the back surface 14 side of the second wafer 10-2 is suction-held on the holding surface of the holding table 51. Next, while the holding table 51 is rotated about its axis, the grinding wheel 53 is rotated about its axis. Grinding fluid is supplied to the processing point by a grinding fluid supply unit (not shown), and the grinding wheel 54 of the grinding wheel 53 is brought close to the holding table 51 at a predetermined feed speed, whereby the back surface 14 of the first wafer 10-1 is ground by the grinding wheel 54, thereby thinning the wafer to a predetermined finishing thickness 19.
[0045] At this time, the grinding wheel 54 applies an external force to press the grinding surface of the first wafer 10-1, and the end material of the outer peripheral region 16 of the first wafer 10-1 is removed starting from the modified layer 21, with the modified layer 21 and the crack 22 serving as the interface.
[0046] As described above, in the processing method for the wafer 10 according to the embodiment, when processing is performed by irradiating the laser beam 43 along the annular region 23 that is a predetermined distance inside from the outer circumferential edge 12 of the wafer 10, the predicted regions 24, 25 indicating regions where the cracks 22 are unlikely to extend and regions where the cracks 22 are unlikely to connect to each other are recognized (set) in advance. Then, the laser beam 43 is irradiated to the predicted regions 24, 25 under irradiation conditions different from the irradiation conditions for the annular region 23 excluding the predicted regions 24, 25, that is, processing is performed under processing conditions that promote the extension of the cracks 22 and the connection of the cracks 22 to each other.
[0047] This makes it possible to more reliably generate cracks 22 around the entire circumference of the annularly formed modified layer 21, and to connect the cracks 22 to adjacent modified layers 21 and cracks 22. This makes the splitting starting point formed between the central region 15 and the outer peripheral region 16 clearer, and has the effect of suppressing processing defects such as cracking of the wafer 10 and damage to the device 18 when removing the outer peripheral region 16 by grinding load in the subsequent grinding process of the thinning step 4. Furthermore, since the shape of the wafer 10 after removing the outer peripheral region 16 can be made to have a shape that is less deviated from the desired shape, it becomes possible to perform trimming processing in a shape that is less deviated from the desired shape.
[0048] It should be noted that the present invention is not limited to the above-described embodiment and modifications, and can be practiced in various forms without departing from the spirit of the present invention.
[0049] For example, if a film such as an oxide film formed on the back surface 14 of the wafer 10 has an area with thickness variation or low transmittance, the crack 22 may not propagate easily, so the irradiation conditions may be changed by treating the area as the predicted area 24, 25.
[0050] Furthermore, before carrying out the thinning step 4, the outer circumferential region 16 may be removed in advance by applying an external force. Specifically, for example, a method of pressing the outer circumferential region 16 from above to apply an external force in the shear direction, a method of lifting the outer circumferential region 16 to apply an external force in the shear direction, or a method of crushing the outer circumferential region 16 with a roller may be used. Furthermore, the external force is not limited to a mechanical external force, and may be ultrasonic vibration or an external force in the radial direction caused by attaching an expandable tape to the back surface 14 of the first wafer 10-1 and expanding the expandable tape.
[0051] In the present invention, the first wafer 10-1 may be a simple substrate wafer on which the devices 18 are not formed. That is, the present invention is also applicable to a case where the modified layer 21 is formed on a wafer 10 that does not have a device layer. In this case, the second wafer 10-2 is limited to a wafer on which the devices 18 are formed. [Explanation of symbols]
[0052] 10 wafers 10-1 First wafer 10-2 Second wafer 11 Substrate 12 Outer rim 13 Surface 14 Back side 15 Central area 16 Outer area 17 Division line 18 Devices 19 Finished thickness 20 Bonded wafer 21, 21-1 Modified layer 22, 22-1 Crack 23 Annular Region 24, 25 Prediction Area 26 Notches 43 Laser Beam 44 Focus point
Claims
1. A wafer processing method comprising the steps of: a modified layer forming step of irradiating a wafer having a chamfered outer periphery with a laser beam having a wavelength that transmits the wafer in an annular shape along a position a predetermined distance inside the outer periphery of the wafer, thereby forming an annular modified layer and cracks extending from the modified layer inside the wafer; After the modified layer forming step is performed, a thinning step of grinding one surface side of the wafer to a finishing thickness; Equipped with Before carrying out the modified layer forming step, The method further includes a storage step of storing in advance a predicted region indicating a region where the crack extending from the modified layer is predicted to be formed poorly, among the annular region along the outer circumferential edge to which the laser beam is irradiated; In the modified layer forming step, The predicted region is irradiated with the laser beam under irradiation conditions different from those of the annular region excluding the predicted region. A wafer processing method comprising the steps of:
2. In the storing step, The predicted area is set based on the crystal orientation of the wafer.
2. The wafer processing method according to claim 1 .
3. The irradiation conditions of the laser beam on the predicted area are as follows: At least one of the output, phase, processing depth of the focal point, distance between the focal points, and pulse width of the laser beam is different from the irradiation condition of the laser beam for the annular region excluding the predicted region.
3. The wafer processing method according to claim 1 or 2.
Citation Information
Patent Citations
Processing method of wafer
JP2020057709A