Semiconductor structure, semiconductor processing system, and method for forming related computer program production
Patent Information
- Application Number
- JP2024145584
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-30
- Filing Date
- 2024-08-27
- Publication Date
- 2025-03-14
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Figure 2025036267000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates generally to forming semiconductor structures and, more particularly, to forming semiconductor structures and associated computer program products during the manufacturing of semiconductor devices. [Background technology]
[0002] A material layer is typically deposited onto a substrate, such as during the fabrication of a semiconductor device. Deposition of a material layer is typically accomplished by heating the substrate to a desired deposition pressure and exposing the substrate to a material layer precursor under environmental conditions selected to cause the material layer to deposit onto the substrate. Once the material layer has one or more desired properties, the substrate is typically sent on for further processing as required for the device being fabricated.
[0003] In some material layer deposition methods, deposition may involve exposing a substrate to two or more material layer precursors. When the precursors contain components with different uptake affinities and / or migration tendencies, such as boron, measures may be necessary to compensate for the different affinities and migration tendencies, for example, by stopping the deposition of one layer before depositing an overlying layer. While generally satisfactory, deposition processes using such measures may prolong the deposition process.
[0004] Such systems and methods have generally been accepted for their intended purposes. However, a need remains for improved methods of forming semiconductor structures, semiconductor processing systems, and related computer program products. The present disclosure provides a solution to this need. Summary of the Invention
[0005] A method of forming a semiconductor processing system is provided that includes placing a substrate on a substrate support disposed in a chamber arrangement of the semiconductor processing system, flowing a boron-containing precursor into the chamber arrangement at a first boron-containing precursor mass flow rate, and depositing a first portion of a first SiGe:B layer using the boron-containing precursor. A second portion of the first SiGe:B layer is deposited using the boron-containing precursor with the mass flow rate of the boron-containing precursor at an intermediate boron-containing precursor flow rate, the mass flow rate of the boron-containing precursor to the chamber arrangement is further increased to a second boron-containing precursor mass flow rate, and a second SiGe:B layer is deposited on the first SiGe:B layer using the boron-containing precursor, wherein increasing the mass flow rate of the boron-containing precursor to the intermediate boron-containing precursor mass flow rate limits a boron concentration at a first SiGe:B layer and second SiGe:B layer interface defined between the first SiGe:B layer and the second SiGe:B layer to less than the boron concentration in the second SiGe:B layer.
[0006] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include a first portion of the first SiGe:B layer being formed during a deposition interval of a first portion, and a second portion of the first SiGe:B layer being formed during a deposition interval of a second portion, the deposition interval of the second portion being shorter than the deposition interval of the first portion.
[0007] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include an intermediate boron-containing precursor mass flow rate for the first SiGe:B layer being between about 110% and about 200% of the first boron-containing precursor mass flow rate for the first SiGe:B layer. The method may include a second boron-containing precursor for the first SiGe:B layer being between about 150% and about 250% of the intermediate boron-containing precursor mass flow rate for the first SiGe:B layer.
[0008] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include a deposition interval of the second portion being between about 10% and about 40% of a deposition interval of the first portion.
[0009] In addition to or in the alternative to one or more of the above features, further embodiments of the method can include that a mass flow rate of the boron-containing precursor can be substantially constant during a deposition interval of the first portion.
[0010] In addition to or in the alternative to one or more of the above-mentioned features, further embodiments of the method can include that a mass flow rate of the boron-containing precursor can be gradually increased during a deposition interval of the second portion.
[0011] In addition to or as an alternative to one or more of the above-mentioned features, further examples of the method include flowing a silicon-containing precursor to the chamber arrangement during deposition of a first portion of the first SiGe:B layer, flowing a germanium-containing precursor to the chamber arrangement during deposition of the first portion of the first SiGe:B layer, and increasing a ratio of the germanium-containing precursor mass flow rate (and / or mass) to the silicon-containing precursor mass flow rate (and / or mass) during deposition of a second portion of the first SiGe:B layer.
[0012] In addition to or as an alternative to one or more of the above-mentioned features, further examples of the method may include: increasing the ratio of germanium-containing precursor to silicon-containing precursor flowed to the chamber arrangement during deposition of the second portion of the SiGe:B layer includes flowing the germanium-containing precursor to the chamber arrangement at a first germanium-containing precursor mass flow rate during deposition of the first portion of the first SiGe:B layer; increasing the first germanium-containing precursor mass flow rate to a second germanium-containing precursor mass flow rate during deposition of the second portion of the first SiGe:B layer; and flowing the germanium-containing precursor to the chamber arrangement at the second germanium-containing precursor mass flow rate during deposition of the second SiGe:B layer.
[0013] In addition to or in the alternative to one or more of the above features, further embodiments of the method can include, the second germanium-containing precursor mass flow rate can be between about 150% and about 400% of the first germanium-containing precursor mass flow rate.
[0014] In addition to or in the alternative to one or more of the above features, further embodiments of the method can include that the mass flow rate of the second germanium-containing precursor can remain substantially constant during deposition of the second SiGe:B layer.
[0015] In addition to or in the alternative to one or more of the above features, further embodiments of the method can include that a mass flow rate of the germanium-containing precursor can remain substantially constant during definition of the interface between the first SiGe:B layer and the second SiGe:B layer.
[0016] In addition to or as an alternative to one or more of the above-mentioned features, further examples of the method may include that increasing the ratio of germanium-containing precursor to silicon-containing precursor flowed to the chamber arrangement during deposition of the second portion of the SiGe:B layer may include flowing the silicon-containing precursor to the chamber arrangement at a first silicon-containing precursor mass flow rate during deposition of the first portion of the first SiGe:B layer, increasing the first silicon-containing precursor mass flow rate to a second silicon-containing precursor mass flow rate during deposition of the second portion of the first SiGe:B layer, and flowing the silicon-containing precursor to the chamber arrangement at the second silicon-containing precursor mass flow rate during deposition of the second SiGe:B layer.
[0017] In addition to or in the alternative to one or more of the above features, further embodiments of the method can include, the second silicon-containing precursor mass flow rate can be from about 105% to about 125% of the first silicon-containing precursor mass flow rate.
[0018] In addition to or as an alternative to one or more of the above-mentioned features, further embodiments of the method may include a mass flow rate of the first silicon-containing precursor flowing into the chamber arrangement remaining constant during definition of an interface between the first SiGe:B layer and the second SiGe:B layer.
[0019] In addition to or in the alternative to one or more of the above-mentioned features, further embodiments of the method may include flowing an etchant into the chamber arrangement at a first etchant mass flow rate during deposition of a first portion of the first SiGe:B layer, increasing the flow rate of the etchant to a second etchant mass flow rate during deposition of a second portion of the first SiGe:B layer, and flowing the etchant into the chamber arrangement at the second etchant mass flow rate during deposition of the second SiGe:B layer.
[0020] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include the second etchant mass flow rate being between about 150% and about 600% of the first etchant mass flow rate.
[0021] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include the first SiGe:B layer and the second SiGe:B layer being deposited consecutively and without interruption.
[0022] In addition to or in the alternative to one or more of the above features, further examples of the method may include the substrate having a trench defined in a top surface of the substrate, the method may further include depositing a silicon germanium (SiGe) layer on a bottom surface and sidewalls bordering the trench, and depositing a first SiGe:B layer on the SiGe layer.
[0023] In addition to or in the alternative to one or more of the above features, further embodiments of the method may include a first SiGe:B layer being deposited in the trench and on the SiGe layer, a second SiGe:B layer protruding above an upper surface of the substrate, and the method further including depositing a boron-doped silicon layer on the second SiGe:B layer.
[0024] In addition to or in place of one or more of the above features, further embodiments of the method may include depositing a SiGe intermediate layer on the second SiGe:B layer. It is contemplated that a boron-doped silicon (Si:B) layer may be deposited on the SiGe intermediate layer.
[0025] In addition to or in place of one or more of the features described above, further embodiments of the method may include depositing a SiGe intermediate layer by stopping the flow of the boron-containing precursor and simultaneously reducing the flow of the germanium-containing precursor to the chamber arrangement, and then continuing to flow the germanium-containing precursor to the chamber arrangement, followed by resuming the flow of the boron-containing precursor to the chamber arrangement. The flow of an etchant to the chamber arrangement may be reduced simultaneously with the reduction in the flow of the germanium-containing precursor, and the etchant flows at a reduced rate until the flow of the boron-containing precursor to the chamber arrangement is resumed.
[0026] A semiconductor structure is provided, the semiconductor structure being formed from the above-described method of forming a semiconductor structure, wherein the second SiGe:B layer has a greater thickness than the first SiGe:B layer, the second SiGe:B layer has a higher germanium concentration than the first SiGe:B layer, and the second SiGe:B layer has a higher boron concentration than the first SiGe:B layer.
[0027] In addition to or as an alternative to one or more of the above features, further embodiments of the semiconductor structure may include the first SiGe:B layer and the second SiGe:B layer defining a first SiGe:B layer and second SiGe:B layer boundary therebetween, and a boron concentration at an interface of the first SiGe:B layer and the second SiGe:B layer being less than a boron concentration at the second SiGe:B layer during a process in which the second SiGe:B layer is continuously and uninterruptedly deposited on the first SiGe:B layer.
[0028] In addition to or as an alternative to one or more of the above features, further embodiments of the semiconductor structure may include the second SiGe:B layer having a boron concentration and a thickness of the second SiGe layer. The second SiGe:B layer may have a boron concentration that is substantially uniform throughout a thickness of the second SiGe:B layer.
[0029] In addition to or as an alternative to one or more of the above features, further examples of the semiconductor structure may include the first SiGe:B layer having a first portion and an overlying second portion, and the boron concentration may be substantially uniform within a thickness of the first portion of the first SiGe:B layer and the boron concentration may be substantially uniform in a thickness of the second portion of the second SiGe:B layer.
[0030] In addition to or as an alternative to one or more of the above features, further embodiments of the semiconductor structure may include that a SiGe intermediate layer may be deposited on the second SiGe:B layer, and that a boron-doped silicon (Si:B) layer may be deposited on the second SiGe:B layer. The SiGe intermediate layer may consist of, or consist essentially of, SiGe. The SiGe intermediate may have a higher germanium concentration than the second SiGe:B layer. The Si:B layer may consist of, or consist essentially of, boron-doped silicon.
[0031] A computer program product is provided that, when read by a processor, causes the processor to place a substrate on a substrate support disposed in a chamber arrangement of a semiconductor processing system, flow a boron-containing precursor into the chamber arrangement at a first boron-containing precursor mass flow rate, deposit a first portion of a first SiGe:B layer using the boron-containing precursor, increase the mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate, deposit a second portion of the first SiGe:B layer using the boron-containing precursor, and flow a boron-containing precursor into the chamber arrangement. further increasing the mass flow rate of the boron-containing precursor to a second boron-containing precursor mass flow rate, and depositing a second SiGe:B layer on the first SiGe:B layer using the boron-containing precursor, such that increasing the mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate limits a boron concentration at an interface of the first SiGe:B layer and the second SiGe:B layer defined between the first SiGe:B layer and the second SiGe:B layer to less than a boron concentration in the second SiGe:B layer.
[0032] This Summary is provided to introduce selected concepts in a simplified form. These concepts are described in more detail below in the Detailed Description of the Disclosure. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. [Brief description of the drawings]
[0033] These and other features, aspects, and advantages of the inventions disclosed herein are described below with reference to drawings of certain specific embodiments, which are intended to illustrate, but not to limit, the invention.
[0034] [Figure 1] 1 is a schematic diagram of a semiconductor processing system showing precursors flowing from a precursor delivery arrangement to a chamber arrangement to form a semiconductor structure on a substrate disposed within the chamber arrangement. [Diagram 2] 2 is a schematic diagram of a portion of the semiconductor processing system of FIG. 1 showing a precursor delivery arrangement and a chamber arrangement according to an embodiment of the present disclosure; [Diagram 3] 2 is a schematic diagram of a portion of the semiconductor processing system of FIG. 1 showing a precursor delivery arrangement and a chamber arrangement according to an embodiment of the present disclosure; [Figure 4] 2 is a cross-sectional side view of the semiconductor structure of FIG. 1, showing the semiconductor structure formed in a trench defined in a top surface of a substrate, according to an embodiment of the present disclosure. [Diagram 5] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 6] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 7] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 8] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 9] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 10] 2 is a sequential view of a portion of the substrate of FIG. 1 , illustrating a semiconductor structure formed within a trench defined in a top surface of the substrate, according to an embodiment of the present disclosure. [Figure 11] 2 is a graph of mass flow rates of precursors and etchants during the formation of the semiconductor structure of FIG. 1 , comparatively illustrating changes in mass flow rates to precursors to limit boron accumulation at an interface defined between a first boron doped silicon germanium layer and a second boron doped silicon germanium layer. [Figure 12]2 is a block diagram of a method of fabricating a semiconductor structure using the semiconductor processing system of FIG. 1, illustrating operations of the method according to an illustrative and non-limiting example of the method. [Figure 13] 2 is a block diagram of a method of fabricating a semiconductor structure using the semiconductor processing system of FIG. 1, illustrating operations of the method according to an illustrative and non-limiting example of the method. [Figure 14] 2 is a block diagram of a method of fabricating a semiconductor structure using the semiconductor processing system of FIG. 1, illustrating operations of the method according to an illustrative and non-limiting example of the method. [Figure 15] 2 is a block diagram of a method of fabricating a semiconductor structure using the semiconductor processing system of FIG. 1, illustrating operations of the method according to an illustrative and non-limiting example of the method. [Figure 16] 2 is a block diagram of a method of fabricating a semiconductor structure using the semiconductor processing system of FIG. 1, illustrating operations of the method according to an illustrative and non-limiting example of the method.
[0035] It will be appreciated that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale, for example, the relative sizes of some of the elements in the figures may be exaggerated compared to other elements to help improve understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0036] Reference is now made to the drawings, in which like reference numbers identify similar structural features or aspects of the present disclosure. For purposes of explanation and illustration, and not by way of limitation, a partial view of an embodiment of a semiconductor processing system according to the present disclosure is shown in FIG. 1 and generally designated by reference character 100. Other embodiments of semiconductor processing systems, semiconductor structures, and methods of fabricating semiconductor structures according to the present disclosure, or embodiments thereof, are provided in FIGS. 2-16, as described. The systems and methods of the present disclosure may be used to form semiconductor structures including boron-doped silicon germanium (SiGe:B) layers, such as in semiconductor devices that use boron-doped SiGe:B layers to control electrical properties in semiconductor devices having three-dimensional device architectures, such as gate-all-around (GAA) and three-dimensional dynamic random access memory (3D DRAM) semiconductor devices, although the present disclosure is not limited to any particular semiconductor device architecture, or to the particular adoption of semiconductor structures having SiGe:B layers in general.
[0037] Referring to FIG. 1, a semiconductor processing system 100 is shown. The semiconductor processing system 100 generally includes a precursor supply arrangement 102, a chamber arrangement 104, an exhaust arrangement 106, and a controller 108. The precursor supply arrangement 102 is connected to the chamber arrangement 104 and configured to provide a flow of precursors 10 to the chamber arrangement 104. The chamber arrangement 104 is connected to the exhaust arrangement 106 and configured to expose a substrate 2 placed within the chamber arrangement 104 to the precursors 10 to form a semiconductor structure 200. The exhaust arrangement 106 is connected to the chamber arrangement 104 and configured to communicate a flow of residual precursors and / or reaction products 12 to an external environment 14 outside the chamber arrangement 104, and in this regard may include one or more abatement devices such as a vacuum pump and / or a scrubber. The controller 108 is operatively connected to the semiconductor processing system 100 (e.g., to one or more of the precursor delivery arrangement, the chamber arrangement 104, and the exhaust arrangement 106), such as via a wired or wireless link 110, and is configured to form the semiconductor structure 200, for example, using a computer program product 300 having instructions recorded thereon that cause the semiconductor processing system 100 to perform operations of a method 400 (shown in FIG. 9) for fabricating a semiconductor structure, as described.
[0038] The term "substrate" as used herein may refer to any underlying material(s), including any underlying material(s) that may be modified or upon which a device, circuit, or film may be formed. Substrates may be continuous or non-continuous, rigid or flexible, solid or porous, and combinations thereof. Substrates may be in any form, such as, but not limited to, a powder, a plate, or a workpiece. Substrates in the form of a plate may include wafers of various shapes and sizes, including, for example, 300 millimeter wafers.
[0039] The substrate may be formed from semiconductor materials including, for example, silicon (Si), silicon germanium (SiGe), silicon oxide (SiO2), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC). The substrate may include a pattern or may be a blanket type substrate without a pattern. As an example, a substrate in powder form may have applications for pharmaceutical manufacturing. The porous substrate may include one or more polymers. Examples of workpieces may include medical devices (e.g., stents, and syringes), jewelry, tooling equipment, components for battery manufacturing (e.g., anodes, cathodes, or separators), or components of photovoltaic cells, etc. The continuous substrate may extend beyond the boundaries of the process chamber in which the deposition process occurs. In some processes, the continuous substrate may move through the process chamber, whereby the process continues until the edge of the substrate is reached. The continuous substrate may be fed from a continuous substrate feeding system to enable the manufacture and production of the continuous substrate in any suitable form. Non-limiting examples of continuous substrates may include sheets, nonwoven films, rolls, foils, webs, flexible materials, bundles of continuous filaments, or fibers (e.g., ceramic or polymeric fibers). Continuous substrates may also include carriers or sheets upon which one or more non-continuous substrates are mounted.
[0040] Referring to FIG. 2, a precursor supply arrangement 102 is shown according to one embodiment of the present disclosure. In the illustrated embodiment, the precursor supply arrangement 102 includes a silicon-containing precursor source 112, a germanium-containing precursor source 114, and a boron-containing precursor source 116. As shown and described herein, the precursor supply arrangement 102 also includes a diluent / carrier gas source 118 and an etchant source 120. In a particular embodiment, the precursor supply arrangement 102 may be as shown and described in U.S. Pat. No. 11,053,591 to Ma et al., issued July 6, 2021, the contents of which are incorporated herein by reference in their entirety. Although shown and described herein as having certain elements and a particular arrangement, it should be recognized and understood that the precursor supply arrangement 102 may include and / or exclude other elements shown and described herein in other embodiments and / or have a different arrangement in other embodiments and remain within the scope of the present disclosure.
[0041] The silicon-containing precursor source 112 includes a silicon-containing precursor 16 and is connected to the chamber arrangement 104 through, for example, a silicon-containing precursor supply valve 122 and configured to flow the silicon-containing precursor 16 to the chamber arrangement 104. The silicon-containing precursor supply valve 122 may then be operatively associated with the controller 108 and may include a mass flow controller (MFC) device and may cooperate with one or more of a mass flow meter and a diverter valve to flow the silicon-containing precursor 16 to the chamber arrangement 104. In certain embodiments, the silicon-containing precursor 16 may include a non-chlorinated silicon-containing precursor. Non-limiting examples of suitable silicon-containing precursors include silane (SiH4), disilane (S2H6), and trisilane (Si3H8). According to certain embodiments, the silicon-containing precursor 16 may include a chlorinated silicon-containing precursor. Non-limiting examples of chlorinated silicon-containing precursors include dichlorosilane (H2SiCl2) and trichlorosilane (HCl3Si).As will be understood by those skilled in the art in view of this disclosure, other silicon-containing precursors as well as mixtures of the aforementioned silicon-containing precursors may be employed and remain within the scope of this disclosure.
[0042] The germanium-containing precursor source 114 includes a germanium-containing precursor 18 and is connected to the chamber arrangement 104 through, for example, a germanium-containing precursor supply valve 124 and configured to flow the germanium-containing precursor 18 to the chamber arrangement 104. The germanium-containing precursor supply valve 124 may then be operatively associated with the controller 108 and may include an MFC device and may cooperate with one or more of a mass flow meter and a diverter valve to flow the germanium-containing precursor 18 to the chamber arrangement 104. In certain embodiments, the germanium-containing precursor 18 may include germane (GeH4), digermane (Ge2H6), trigermane (Ge3H8), or germylsilane (GeH6Si). According to certain embodiments, the germanium-containing precursor 18 may include a halogenated germanium-containing precursor, such as germanium bromide (GeBr4) and germanium tetrachloride (GeCl4). As will be understood by one of ordinary skill in the art in light of this disclosure, germanium-containing precursor 18 may include other germanium-containing precursors and / or mixtures that include one or more of the foregoing germanium-containing precursors and remain within the scope of this disclosure.
[0043] The boron-containing precursor source 116 includes a boron-containing precursor 20 and is connected to the chamber arrangement 104, for example, through a boron-containing precursor supply valve 126, and configured to flow the boron-containing precursor 20 to the chamber arrangement 104. The boron-containing precursor supply valve 126 may then be operatively associated with the controller 108 and may include an MFC device and may cooperate with one or more of a mass flow meter and a diverter valve to flow the boron-containing precursor 20 to the chamber arrangement 104. In certain embodiments, the boron-containing precursor 20 may include diborane (B2H6). According to certain embodiments, the boron-containing precursor 20 may include boron trichloride (BCl3). As will be appreciated by those of skill in the art in view of the present disclosure, the boron-containing precursor 20 may include other boron-containing precursors and / or mixtures including one or more of the aforementioned boron-containing precursors and remain within the scope of the present disclosure.
[0044] The diluent / carrier gas source 118 includes a diluent / carrier gas 22 and is connected to the chamber arrangement 104, for example, through a diluent / carrier gas supply valve 128, and is configured to flow the diluent / carrier gas 22 to the chamber arrangement 104. In this regard, the diluent / carrier gas supply valve 128 may be operatively associated with the controller 108, may be incorporated into an MFC device, and may cooperate with one or more of a mass flow meter and a diverter valve to flow the diluent / carrier gas 22 to the chamber arrangement 104. In a further regard, the diluent / carrier gas source 118 may be configured to mix the diluent / carrier gas 22 with one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20, and flow (and thereby transport) the diluent / carrier gas 22 into the chamber arrangement 104 along with one or more of the aforementioned precursors. In certain embodiments, the diluent / carrier gas 22 may include a noble gas, such as argon (Ar) gas, helium (He) gas, and krypton (Kr) gas. According to certain embodiments, the diluent / carrier gas 22 may include nitrogen (N2) gas, hydrogen (H2) gas, or a mixture including one or more of the aforementioned diluent / carrier gases. As will be appreciated by those of skill in the art in view of this disclosure, other diluent / carrier gases or mixtures of the aforementioned gases with other diluent / carrier gases may be employed and remain within the scope of the present disclosure.
[0045] The etchant source 120 includes the etchant 24 and is connected to the chamber arrangement 104 through, for example, an etchant supply valve 130 and configured to flow the etchant 24 to the chamber arrangement 104. In this regard, the etchant supply valve 130 may in turn be operatively associated with the controller 108, may be incorporated into an MFC device, and may cooperate with one or more of a mass flow meter and a diverter valve to flow the etchant 24 to the chamber arrangement 104. In a further respect, the etchant source 120 may be configured to mix the etchant 24 with one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 to co-flow the etchant 24 with one or more of the aforementioned precursors to the chamber arrangement 104. In certain embodiments, the etchant may include a halide-containing material, for example, chlorine (Cl2) gas and / or hydrochloric acid (HCl). As would be understood by one of ordinary skill in the art in view of this disclosure, other etchants may be employed and remain within the scope of the present disclosure.
[0046] 3, the chamber arrangement 104 and controller 108 are shown in accordance with one embodiment of the present disclosure. In the illustrated embodiment, the chamber arrangement 104 has a single wafer cross-flow arrangement and in this regard includes a chamber body 132, an inlet flange 134, and an exhaust flange 136. In further respects, the chamber arrangement 104 may also include an upper heater element array 138, a lower heater element array 140, a partition 142, a substrate support 144, a support member 146, a shaft member 148, and a lift and rotate module 150. Although shown and described herein as including certain elements and having a particular arrangement, it should be understood and appreciated that the chamber arrangement 104 may have a different arrangement or include additional elements and / or exclude elements shown and described herein and remain within the scope of the present disclosure.
[0047] The chamber body 132 is formed from a transparent material 152 (e.g., transparent to electromagnetic radiation in the infrared wavelength range) and has a top wall 154, a bottom wall 156, a first sidewall 158, and a second sidewall 160. The chamber body 154 extends longitudinally between an inlet end 162 and a longitudinally opposite exhaust end 164 of the chamber body 132. The bottom wall 156 is spaced from the top wall 154 by an interior 166 of the chamber body 132, extends between the inlet end 162 and the exhaust end 164 of the chamber body 132, and is coupled to the top wall 154 by the first sidewall 158 and the second sidewall 160. In certain embodiments, the transparent material 152 may include ceramic materials such as quartz, fused silica, and sapphire. According to one particular embodiment, the chamber body 132 may include a plurality of exterior ribs extending around the exterior of the chamber body 132 and spaced longitudinally from one another between the inlet end 162 and the exhaust end 164 of the chamber body 132. Although shown and described herein as having a generally planar shape, it should be understood and appreciated that either (or both) of the upper wall 154 and the lower wall 156 may define an arcuate profile and / or have a generally dome-like shape and remain within the scope of the present disclosure.
[0048] The inlet flange 134 abuts an inlet end 162 of the chamber body 132 and couples the precursor supply arrangement 102 to the chamber body 132. The inlet flange 134 is further configured to communicate precursors 10 provided by the precursor supply arrangement 102 (shown in FIG. 1 ) to an interior 166 of the chamber body 132, for example to provide lateral (side-to-side) mass flow control of the precursors 10. The exhaust flange 136 abuts an exhaust end 164 of the chamber body 132 and couples the chamber body 132 to the exhaust arrangement 106, for example to communicate residual precursors and / or reaction products 12 output by the chamber arrangement 104 during the formation of the semiconductor structure 200 to the exhaust arrangement 106 (shown in FIG. 1 ).
[0049] The upper heater element array 138 is supported above the upper wall 154 of the chamber body 132 and is configured to radiatively transfer heat to the interior 166 of the chamber body 132 through the upper wall 154 of the chamber body 132, for example, using electromagnetic radiation in the infrared wavelength range transmitted by the transparent material 152 forming the upper wall 154 of the chamber body 132 to radiatively transfer heat to the interior 166 of the chamber body 132. The lower heater element array 140 is similar to the upper heater element array 138 and is additionally supported below the lower wall 156 of the chamber body 132 and is configured to transfer heat to the interior 166 of the chamber body 132 through the lower wall 156 of the chamber body 132. In a particular embodiment, the upper heater element array 138 may include a plurality of upper linear lamps and the lower heater element array 140 may include a plurality of lower linear lamps, where the plurality of lower linear lamps may be orthogonal to the plurality of upper linear lamps. According to certain embodiments, the plurality of upper linear lamps may extend laterally between the first sidewall 158 and the second sidewall 160, and the plurality of linear lamps may be spaced apart longitudinally from one another between the inlet end 162 and the exhaust end 164 of the chamber body 132. It is also contemplated that the plurality of upper linear lamps may extend longitudinally between the inlet end 162 and the exhaust end 164 of the chamber body 132 and be spaced apart laterally from one another between the first sidewall 158 and the second sidewall 160 and remain within the scope of the present disclosure. As will be understood by one of ordinary skill in the art in view of the present disclosure, either (or both) of the upper heater element array 138 and the lower heater element array 140 may include bulb or spot lamp type heater elements and remain within the scope of the present disclosure.
[0050] The divider 142 is formed from an opaque material 168 (e.g., a material that is opaque to electromagnetic radiation in the infrared wavelength range) and is secured within the interior 166 of the chamber body 132 and divides the interior 166 of the chamber body 132 into an upper chamber 170 and a lower chamber 172. The divider 142 further defines an opening 174, which in turn fluidly connects the upper chamber 170 to the lower chamber 172 of the interior 166 of the chamber body 132. The substrate support 144 is supported for rotation R about a rotation axis 176 extending through the opening 174 and is at least partially disposed within the opening 174 and configured to support the substrate 2 during formation of the semiconductor structure 200 on the substrate 2. In this regard, it is contemplated that the substrate support 144 may be formed from an opaque material (e.g., opaque material 168) and may be optically coupled to at least one of the upper heater element array 138 and the lower heater element array 140 by the upper and lower walls 154, 156 of the chamber body 132. In certain embodiments, the opaque material 168 may include a carbonaceous material and / or silicon carbide.
[0051] The support member 146 is disposed within the lower chamber 172 of the chamber body 132 along a rotation axis 176, is rotationally fixed relative to the substrate support 144, and couples the substrate support 144 to a shaft member 148. The shaft member 148 is rotationally fixed relative to the support member 146, extends through a lower wall 156 of the chamber body 132 into an environment external to the chamber body 132, and couples the substrate support 144 through the support member 146 to a lift-and-rotate module 150. The lift-and-rotate module 150 is operatively connected to the substrate support 144 and configured to rotate the substrate support 144 about the rotation axis 176 during formation of the semiconductor structure 200 on the substrate 2. The lift-and-rotate module 150 may be further configured to load and unload a substrate (e.g., substrate 2) onto the substrate support 144, e.g., in cooperation with a gate valve 178 and a substrate transport robot 180. In certain embodiments, either (or both) the support member 146 and / or the shaft member 148 may be formed from a permeable material, such as permeable material 152 .
[0052] In the illustrated embodiment, the controller 108 includes a device interface 182, a processor 184, a user interface 186, and a memory 188. The device interface 182 couples the controller 108 to one or more of the precursor delivery arrangement 102, the chamber arrangement 104, and the exhaust arrangement 106, for example, via a wired or wireless link 110. The processor 184 is disposed in communication with the user interface 182 and the memory 188, and is operatively connected to the user interface 186, for example, to receive input therethrough and / or provide output to a user. The memory 188 includes a non-transitory machine-readable medium having a number of program modules 190 recorded thereon that, when read by the processor 184, cause the processor 184 to perform certain operations. Among the operations are those of a method 400 (shown in FIG. 9 ) of fabricating a semiconductor structure, for example, the semiconductor structure 200, as described. Although the example embodiments are shown and described as including certain elements and having a particular arrangement, it should be understood and appreciated that the controller 108 may include additional elements and / or exclude certain elements shown and described herein, or may have a different architecture, and remain within the scope of the present disclosure.
[0053] Referring to FIG. 4, a semiconductor structure 200 is shown. In the illustrated embodiment, the semiconductor structure 200 overlies a substrate 2 and includes a silicon germanium (SiGe) layer 202, a first boron-doped silicon germanium (SiGe:B) layer 204, and a second SiGe:B layer 206. The semiconductor structure 200 also includes a SiGe intermediate layer 240, a boron-doped silicon (Si:B) layer 208, a channel 210, and a gate 212. The substrate 2 defines a trench 6 in a top surface 4 of the substrate 2. The trench 6 has a bottom 8 and sidewalls 3, extends into the bulk material forming the substrate 2, and is at least partially defined by a silicon (Si)-containing material. It is contemplated that a channel 210 overlies the top surface 4 of the substrate 2 and is laterally offset from the trench 6. It is also contemplated that the gate 212 overlaps (e.g., is deposited on) the channel 210 and is laterally offset from the trench 6 and configured to cooperate with the channel 210 in a semiconductor device that includes the semiconductor structure 200, such as a fin field effect transistor (finFET) semiconductor device, a GAA semiconductor device, or a 3D DRAM semiconductor device.
[0054] The SiGe layer 202 may be disposed (e.g., formed or deposited) within the trench 6 and overlie and conformally deposit on the bottom 8 and sidewalls 3 of the trench 6. In certain embodiments, the SiGe layer 202 may have a SiGe layer germanium concentration 214 that is between about 5% and about 20%, such as between about 5% and about 10%, or between about 10% and about 15%, or even between about 15% and about 20% germanium concentration. According to certain embodiments, the SiGe layer 202 may have a SiGe layer thickness 216 that is between about 50 Angstroms and about 450 Angstroms, such as between about 50 Angstroms and about 200 Angstroms, or between about 200 Angstroms and about 350 Angstroms, or even between about 350 Angstroms and about 600 Angstroms thick. It is contemplated that SiGe layer 202 may be epitaxial (e.g., single crystal) with the silicon-containing material bordering trench 6. It is also contemplated that SiGe layer 202 may consist of, or consist essentially of, silicon germanium, and that SiGe layer 202 may be compositionally uniform or compositionally graded.
[0055] A first SiGe:B layer 204 may be disposed (e.g., formed or deposited) within trench 6 and overlie SiGe layer 202, and may be conformally deposited on SiGe layer 202. In certain embodiments, first SiGe:B layer 204 may have a first SiGe:B layer germanium concentration 218 that is between about 15% and about 35%. For example, first SiGe:B layer germanium concentration 218 may be between about 15% and about 25%, or between about 25% and about 35%, or even between about 35% and about 45% germanium. According to certain embodiments, first SiGe:B layer 204 may have a first SiGe:B layer germanium concentration 218 between about 5e% and about 35%. 18 Atoms / cubic centimeter (cm 3 ) ~ approx. 1e 20 atoms / cm 3 In this regard, the first SiGe:B layer may have a boron concentration 220 that is between about 5e18 atoms / cm and about 5e 19 atoms / cm 3 , or about 5e 19atoms / cm 3 ~ approx. 1e 20 atoms / cm 3 , or even about 1e 20 atoms / cm 3 ~about 5e 20 atoms / cm 3 It is contemplated that the first SiGe:B layer 204 may have a first SiGe:B layer thickness 222 that is between about 200 Angstroms and about 500 Angstroms, such as between about 200 Angstroms and about 350 Angstroms, or between about 350 Angstroms and about 500 Angstroms, or even between about 500 Angstroms and about 650 Angstroms. It is also contemplated that the first SiGe:B layer 204 may be epitaxial (e.g., single crystalline) with the silicon germanium material forming the SiGe layer 202, and that the first SiGe:B layer 204 may consist of or consist essentially of boron doped silicon germanium material, and that the first SiGe layer may be compositionally uniform or compositionally graded with respect to either (or both) the germanium concentration and the boron concentration.
[0056] The second SiGe:B layer 206 may be at least partially disposed within the trench 6, overlying the first SiGe:B layer 204, and conformally deposited on the first SiGe:B layer 204. The second SiGe:B layer 206 may protrude further from the trench 6 above the top surface 4 of the substrate 2 and laterally separate the channel 210 from the channel of an adjacent semiconductor device. The second SiGe:B layer 206 may protrude from the trench 6 in a direction opposite the channel 210, further separating (at least partially) the channel 210 from the channel of an adjacent semiconductor device. In certain embodiments, the second SiGe:B layer 206 may have a second SiGe:B layer germanium concentration 224 that is between about 30% and about 75%, e.g., between about 30% and about 45%, or between about 45% and about 60%, or even between about 60% and about 75% germanium. According to one specific embodiment, the second SiGe:B layer 206 may have a second SiGe:B layer boron concentration 226. The second SiGe:B boron concentration layer may be about 1e 19 atoms / cm 3 ~about 5e 20 atoms / cm 3 , for example, about 1e 19 atoms / cm 3 ~about 5e 19 atoms / cm 3 , or about 5e 19 atoms / cm 3 ~ approx. 1e 20 atoms / cm 3 , or even about 1e 20 atoms / cm 3 ~about 5e 20 atoms / cm 3It is contemplated that the second SiGe:B layer 206 may have a second SiGe:B layer thickness 228 that is between about 300 Angstroms and about 900 Angstroms. In this regard, the second SiGe:B layer thickness 228 may be between about 300 Angstroms and about 500 Angstroms, or between about 500 Angstroms and about 700 Angstroms, or even between about 700 Angstroms and about 900 Angstroms. It is also contemplated that the second SiGe:B layer 206 may be epitaxial (e.g., single crystal) with the boron doped silicon germanium material forming the first SiGe:B layer 204, and that the second SiGe:B layer 206 may consist of, or consist essentially of, a boron doped silicon germanium material that is different in composition from the first SiGe:B layer 204.
[0057] The SiGe interlayer 240 may overlie and be conformally deposited on the second SiGe:B layer 206. In certain embodiments of the present disclosure, the SiGe interlayer 240 may be substantially free of boron. According to certain embodiments, the SiGe interlayer 240 may consist of or consist essentially of SiGe. It is contemplated that the SiGe interlayer 240 may have a thickness less than a thickness of the second SiGe:B layer 206. It is also contemplated that the SiGe interlayer 240 may have a thickness less than a thickness of the SiB layer 208.
[0058] The Si:B layer 208 overlies the second SiGe:B layer 206 and may further overlie the SiGe intermediate layer 240, and may be conformally deposited on the second SiGe:B layer 206. In this regard, the Si:B layer 208 may be disposed (e.g., formed or deposited) at least in part over the trench 6, the iGe:B layer 208 laterally separating (at least in part) the gate 212 from the S-gate comprising the semiconductor device adjacent the gate 212. In one particular embodiment, the Si:B layer 208 has a thickness of about 1e 20 atoms / cm 3 ~ approx. 1e 22 atoms / cm 3For example, the Si:B layer boron concentration 230 may be about 1e 20 atoms / cm 3 ~about 5e 20 atoms / cm 3 , or about 5e 20 atoms / cm 3 ~ approx. 1e 21 atoms / cm 3 , or even about 1e 21 atoms / cm 3 ~about 5e 21 atoms / cm 3 According to certain embodiments, the Si:B layer 208 may have a Si:B layer thickness 232, for example, between about 25 Angstroms and about 250 Angstroms. In this regard, the Si:B layer thickness 232 may be between about 25 Angstroms and about 100 Angstroms, or between about 100 Angstroms and about 175 Angstroms, or even between about 175 Angstroms and about 250 Angstroms. It is contemplated that the Si:B layer 208 may be epitaxial (e.g., monocrystalline) with the boron doped silicon germanium material that forms the second SiGe:B layer 206. It is also contemplated that the Si:B layer 208 may consist of, or consist essentially of, a boron doped silicon material.
[0059] In certain embodiments, the thickness 228 of the second SiGe:B layer may be greater than the thickness 222 of the first SiGe:B layer. The thickness 222 of the first SiGe:B layer may be greater than the thickness 216 of the SiGe layer, and the thickness 232 of the Si:B layer may be less than the thickness 228 of the second SiGe:B layer. According to certain embodiments, the germanium concentration 224 of the second SiGe:B layer may be greater than the germanium concentration 218 of the first SiGe:B layer. The germanium concentration 218 of the first SiGe:B layer may be greater than the germanium concentration 214 of the SiGe layer. It is also contemplated that the boron concentration 226 of the second SiGe:B layer may be greater than the boron concentration 220 of the first SiGe:B layer, and the boron concentration 230 of the Si:B layer may be greater than the boron concentration 226 of the second SiGe:B layer, according to certain embodiments. As will be understood by one of ordinary skill in the art in view of the present disclosure, semiconductor structure 200 having these compositions may apply a suitable compressive stress to channel 210 such that a semiconductor device formed using semiconductor structure 200 has advantageous properties (e.g., channel resistivity and / or device speed).
[0060] As explained above, layer components that have a higher affinity for incorporation at the growth surface of the deposition than other layer components may, in some deposition processes, induce concentration variations in the semiconductor structure formed from the layer. In this regard, applicant has come to recognize that, in the absence of countermeasures, boron may agglomerate at the first and second SiGe:B layer interface 234 defined between the first and second SiGe:B layers 204 and 206. Without being bound to a particular theory or mode of operation, applicant believes that available boron atoms present in the process environment may outcompete available germanium and silicon atoms for incorporation into (and thereby preferentially incorporation into) a semiconductor structure such as semiconductor structure 200, causing boron to accumulate at the first and second SiGe:B layer interface 234 and altering the electrical properties of semiconductor structure 200. To avoid such boron agglomeration and ensure that the boron concentration at the first SiGe:B layer to SiGe:B layer interface 234 does not exceed the boron concentration of that second SiGe:B layer, the semiconductor structure 200 is formed by alternating increases in the flow of boron-containing precursor 20 between the first boron-containing precursor mass flow rate used to deposit the first SiGe:B layer 204 and the second boron-containing precursor mass flow rate used to form the second SiGe:B layer 206 with staggered increases in the boron-containing precursor mass flow rate to an intermediate boron-containing precursor mass flow rate during deposition of the first SiGe:B layer 204. The staggered increases constrict the amount of available boron atoms at the growth surface of the semiconductor structure 200 during the formation of the first SiGe:B layer 204, ensuring that the available boron atoms do not compete with the increased (relatively) available germanium atoms provided to the growth surface to initiate deposition of the second SiGe:B layer 206. Advantageously, the staggered growth avoids the need to stop deposition of the first SiGe:B layer 204 before the second SiGe:B layer 206 .Further advantageously, the staggered growth provides a partial compositional gradient in the first SiGe:B layer 204 having a first portion 236 abutting the SiGe layer 202 and a second portion 238 overlying the first portion 236 and abutting the second SiGe:B layer 206, limiting stress at the interface 234 between the first and second SiGe:B layers.
[0061] 5-10, semiconductor structures 200 are shown being sequentially formed according to method 300 during a continuous process, e.g., precursor flow is not stopped (as shown in FIG. 4) for purposes of managing boron agglomeration at interface 234 between first and second SiGe:B layers. As shown in FIG. 5, formation of semiconductor structure 200 begins by placing a substrate into a semiconductor processing system, e.g., semiconductor processing system 100 (as shown in FIG. 1). At this point, gate valve 178 (as shown in FIG. 3) may be opened to allow substrate transfer robot 180 (as shown in FIG. 3) to advance an end effector into substrate 2 and into upper chamber 170 of chamber body 132 (as shown in FIG. 3) to a position above substrate support 144. The lift-and-rotate module 150 may then place the substrate 2 on the upper surface of the substrate support 144, for example, using a number of lift pins slidably received within the substrate support 144, after which the end effector is withdrawn from the upper chamber 170 of the chamber body 132. The gate valve 178 is then closed, the pressure within the interior 166 is elevated to a predetermined SiGe layer deposition pressure, the substrate is heated to a predetermined SiGe deposition temperature, and the substrate 2 is rotated about the rotation axis 176 (FIG. 3). Elevating the pressure within the interior 166 of the chamber body 132 may be accomplished using, for example, a vacuum pump included in the exhaust arrangement 106 (shown in FIG. 1) in cooperation with a pressure control valve connecting the chamber arrangement 104 (shown in FIG. 1) to the exhaust arrangement 106. Heating the substrate 2 to a predetermined SiGe layer deposition temperature may be accomplished radiatively, for example, using an upper heater element array 138 (shown in FIG. 3) and / or a lower heater element array 140 (shown in FIG. 3). Rotating the substrate 2 about a rotation axis 176 may be accomplished using a lift-rotate module 150 (shown in FIG. 3).
[0062] Deposition of the SiGe layer 202 may be accomplished by flowing the silicon-containing precursor 16 and the germanium-containing precursor 18 into the chamber arrangement 104 (shown in FIG. 3). An injection flange 134 communicates the silicon-containing precursor 16 and the germanium-containing precursor 18 with the chamber body 132, which is contemplated to flow the silicon-containing precursor 16 and the germanium-containing precursor 18 across the top surface 4 of the substrate 2 to expose the substrate 2 to the silicon-containing precursor 16 and the germanium-containing precursor 18 as the substrate 2 rotates about an axis of rotation 176 (shown in FIG. 3). As will be understood by one of ordinary skill in the art in view of the present disclosure, a SiGe layer 202 is deposited on substrate 2 by exposing substrate 2 to silicon-containing precursor 16 and germanium-containing precursor 18 according to a predetermined SiGe layer deposition temperature, a predetermined SiGe layer deposition pressure, the mass flow rates of silicon-containing precursor 16 and germanium-containing precursor 18, and the duration of exposure of substrate 2 to silicon-containing precursor 16 and germanium-containing precursor 18.
[0063] In certain embodiments, the predetermined SiGe layer deposition pressure may be between about 0.1 Torr and about 760 Torr. In this regard, the SiGe layer deposition pressure may be between about 0.1 Torr and about 10 Torr, or between about 10 Torr and about 50 Torr, or even between about 50 Torr and about 760 Torr. According to certain embodiments, the predetermined SiGe layer deposition temperature may be between about 400 degrees Celsius and about 1000 degrees Celsius. For example, the predetermined SiGe layer deposition temperature may be between about 400 degrees Celsius and about 600 degrees Celsius, or between about 600 degrees Celsius and about 800 degrees Celsius, or even between about 800 degrees Celsius and about 1000 degrees Celsius. It is contemplated that the SiGe layer deposition interval may be between about 5 seconds and about 30 seconds, for example, between about 5 seconds and about 15 seconds, or between about 15 seconds and about 25 seconds, or even between about 25 seconds and about 35 seconds. It is also contemplated that either (or both) of the silicon-containing precursor 16 and the germanium-containing precursor 18 may be mixed with a diluent / carrier gas 22 and the etchant 24 may be co-flowed with the silicon-containing precursor 16 and the germanium-containing precursor 18 through the upper chamber 170 of the chamber body 132.
[0064] 6 and 7, deposition of the first SiGe:B layer 204 may be accomplished by (e.g., simultaneously) flowing the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 to a chamber arrangement 104 (shown in FIG. 3). In this regard, it is contemplated that the precursor supply arrangement 102 (shown in FIG. 2) flows the silicon-containing precursor 16 to the chamber arrangement 104 at a silicon-containing precursor mass flow rate for the first SiGe:B layer, the precursor supply arrangement 102 flows the germanium-containing precursor 18 to the chamber arrangement 104 at a germanium-containing precursor mass flow rate for the first SiGe:B layer, and the precursor supply arrangement 102 flows the boron-containing precursor 20 to the chamber arrangement 104 at a first boron-containing precursor mass flow rate for the first SiGe:B layer. The injection flange 134 communicates the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 with the chamber body 132, which is then intended to expose the top surface 4 of the substrate 2 to the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 as the substrate 2 rotates about an axis of rotation 176 (shown in FIG. 3). As will be understood by one of ordinary skill in the art in view of the present disclosure, a first SiGe layer 204 is deposited on SiGe layer 202 by exposing substrate 2 to silicon-containing precursor 16, germanium-containing precursor 18, and boron-containing precursor according to a predetermined first SiGe:B layer deposition temperature, a predetermined first SiGe:B layer deposition pressure, a silicon-containing precursor mass flow rate for the first SiGe:B layer, a germanium-containing precursor mass flow rate for the first SiGe:B layer, and a boron-containing precursor mass flow rate for the first SiGe:B layer, and a duration of a predetermined first SiGe:B layer deposition interval during which substrate 2 (and thereby the substrate of SiGe layer 202) is exposed to silicon-containing precursor 16, germanium-containing precursor 18, and boron-containing precursor 20.
[0065] In certain embodiments, the predetermined first SiGe:B layer deposition pressure may be between about 0.1 Torr and about 760 Torr. In this regard, the predetermined first SiGe:B layer deposition pressure may be between about 0.1 Torr and about 10 Torr, or between about 10 Torr and about 50 Torr, or even between about 50 Torr and about 760 Torr. According to certain embodiments, the predetermined first SiGe:B layer deposition temperature may be between about 400 degrees Celsius and about 1000 degrees Celsius. For example, the predetermined first SiGe:B layer deposition temperature may be between about 400 degrees Celsius and about 600 degrees Celsius, or between about 600 degrees Celsius and about 800 degrees Celsius, or even between about 800 degrees Celsius and about 1000 degrees Celsius. It is contemplated that the predetermined first SiGe:B layer deposition interval may be from about 50 seconds to about 450 seconds, for example, from about 50 seconds to about 200 seconds, or from about 200 seconds to about 350 seconds, or even from about 350 seconds to about 500 seconds. It is also contemplated that one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 may be mixed with the diluent / carrier gas 22 when flowed through the chamber arrangement 104 (shown in FIG. 1 ) during deposition of the first SiGe:B layer 204. It is further contemplated that the etchant 24 may be co-flowed with one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 through the upper chamber 170 (shown in FIG. 3 ) of the chamber body 132 (shown in FIG. 3 ) during deposition of the first SiGe:B layer 204. It is further contemplated that the first SiGe:B layer 204 may be deposited continuously and without interruption, for example, between the completion of deposition of the SiGe layer 202 and the start of deposition of the second SiGe:B layer 206.
[0066] As shown in Figure 8, deposition of the second SiGe:B layer 206 may be accomplished by flowing the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 to the chamber arrangement 104 (shown in Figure 3). In this regard, the precursor supply arrangement 102 (shown in Figure 2) is contemplated to flow the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 to the chamber arrangement 104. The silicon-containing precursor 16 may be flowed to the chamber arrangement 104 at a silicon-containing precursor mass flow rate for the second SiGe:B layer, the germanium-containing precursor 18 may be flowed to the chamber arrangement 104 at a germanium mass flow rate for the second SiGe:B layer, and the boron-containing precursor 20 may be flowed to the chamber arrangement 104 at a boron-containing precursor flow rate for the second SiGe:B layer. The injection flange 134 communicates the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 with the chamber body 132, which is then intended to expose the top surface 4 of the substrate 2 to the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 as the substrate 2 rotates about an axis of rotation 176 (shown in FIG. 3). As will be understood by one of ordinary skill in the art in view of the present disclosure, a second SiGe:B layer 206 is deposited on first SiGe:B layer 204 by exposing substrate 2 to a silicon-containing precursor 16, a germanium-containing precursor 18, and a boron-containing precursor according to a predetermined second SiGe:B layer deposition temperature, a predetermined second SiGe:B layer deposition pressure, a silicon-containing precursor mass flow rate for the second SiGe:B layer, a germanium-containing precursor mass flow rate for the second SiGe:B layer, and a boron-containing precursor mass flow rate for the second SiGe:B layer, and a predetermined second SiGe:B layer deposition interval duration.
[0067] In certain embodiments, the predetermined second SiGe:B layer deposition pressure may be between about 0.1 Torr and about 760 Torr. In this regard, the second predetermined SiGe:B layer deposition pressure may be between about 0.1 Torr and about 10 Torr, or between about 10 Torr and about 50 Torr, or even between about 50 Torr and about 760 Torr. According to certain embodiments, the predetermined second SiGe:B layer deposition temperature may be between about 400 degrees Celsius and about 1000 degrees Celsius. For example, the predetermined second SiGe:B layer deposition temperature may be between about 400 degrees Celsius and about 600 degrees Celsius, or between about 600 degrees Celsius and about 800 degrees Celsius, or even between about 800 degrees Celsius and about 1000 degrees Celsius. It is contemplated that the predetermined second SiGe:B layer deposition interval may be from about 100 seconds to about 400 seconds, for example, from about 100 seconds to about 200 seconds, or from about 200 seconds to about 300 seconds, or even from about 300 seconds to about 400 seconds. It is also contemplated that one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 may be mixed with the diluent / carrier gas 22 when flowed through the chamber arrangement 104 (shown in FIG. 1 ) during deposition of the second SiGe:B layer 206. It is further contemplated that the etchant 24 may be co-flowed with one or more of the silicon-containing precursor 16, the germanium-containing precursor 18, and the boron-containing precursor 20 through the upper chamber 170 (shown in FIG. 3 ) of the chamber body 132 (shown in FIG. 3 ) during deposition of the second SiGe:B layer 206. In one particular embodiment, the second SiGe:B layer 206 may be deposited continuously and without interruption (or define an interface 234 between the first and second SiGe:B layers), for example, between the completion of deposition of the first SiGe:B layer 204 and the start of deposition of the Si:B layer 208.
[0068] 9 and 10, deposition of the Si:B layer 208 may be accomplished by flowing the silicon-containing precursor 16 and the boron-containing precursor 20 to the chamber arrangement 104 (shown in FIG. 3). In this regard, it is contemplated that the precursor supply arrangement 102 (shown in FIG. 2) may flow the silicon-containing precursor 16 to the chamber arrangement 104 at a silicon-containing precursor mass flow rate for the Si:B layer, and the boron-containing precursor 20 to the chamber arrangement 104 at a boron-containing precursor mass flow rate for the Si:B layer. It is contemplated that the injection flange 134 communicates the silicon-containing precursor 16 and the boron-containing precursor 20 received from the precursor supply arrangement 102 to the chamber body 132, which in turn exposes the second SiGe:B layer 206 to the silicon-containing precursor 16 and the boron-containing precursor 20 as the substrate 2 rotates about the axis of rotation 176 (shown in FIG. 3). As will be understood by one of ordinary skill in the art in view of the present disclosure, a Si:B layer 208 is deposited on the second SiGe:B layer 206 by exposing the second SiGe:B layer 206 to the silicon-containing precursor 16 and the boron-containing precursor 20 according to a predetermined Si:B layer deposition temperature, a predetermined Si:B layer deposition pressure, a silicon-containing precursor mass flow rate for the Si:B layer and a boron-containing precursor mass flow rate for the Si:B layer, and a duration of the Si:B layer deposition interval.
[0069] In certain embodiments, the predetermined Si:B layer deposition pressure may be between about 0.1 Torr and about 760 Torr. In this regard, the predetermined Si:B layer deposition pressure may be between about 0.1 Torr and about 10 Torr, or between about 10 Torr and about 50 Torr, or even between about 50 Torr and about 760 Torr. According to certain embodiments, the predetermined Si:B layer deposition temperature may be between about 400 degrees Celsius and about 1000 degrees Celsius. For example, the predetermined Si:B layer deposition temperature may be between about 400 degrees Celsius and about 600 degrees Celsius, or between about 600 degrees Celsius and about 800 degrees Celsius, or even between about 800 degrees Celsius and about 1000 degrees Celsius. It is contemplated that the predetermined Si:B layer deposition interval may be between about 100 seconds and about 400 seconds, for example, between about 100 seconds and about 200 seconds, or between about 200 seconds and about 300 seconds, or even between about 300 seconds and about 400 seconds. It is also contemplated that one or more of the silicon-containing precursor 16 and the boron-containing precursor 20 may be mixed with the diluent / carrier gas 22 as they are flowed into the chamber arrangement 104 (shown in FIG. 1 ) during deposition of the Si:B layer 208. It is further contemplated that the etchant 24 may be co-flowed with one or more of the silicon-containing precursor 16 and the boron-containing precursor 20 through the upper chamber 170 (shown in FIG. 3 ) of the chamber body 132 (shown in FIG. 3 ) during deposition of the Si:B layer 208.
[0070] With reference to Figure 11 and with continued reference to Figures 6 and 7, it is contemplated that the boron-containing precursor 20 is flowed into the chamber arrangement 104 (shown in Figure 3) at a first boron-containing precursor mass flow rate of the first SiGe:B layer to deposit a first portion 236 of the first SiGe:B layer 204. It is also contemplated that the mass flow rate of the boron-containing precursor 20 is subsequently (and during deposition of the first SiGe:B layer 204) increased to an intermediate boron-containing precursor flow rate of the first SiGe:B boron layer, and a second portion 238 of the first SiGe:B layer 204 is deposited using the boron-containing precursor 20 flowed into the chamber arrangement 104 at the intermediate boron-containing precursor flow rate of the first SiGe:B layer. It is further contemplated that the mass flow rate of the boron-containing precursor 20 flowed into the chamber arrangement 104 is further increased to a second boron-containing precursor mass flow rate of the first SiGe:B layer, and a second SiGe:B layer 206 is deposited on the first SiGe:B layer 204 using the boron-containing precursor 20 flowed into the chamber arrangement 104 at the second boron-containing precursor mass flow rate of the first SiGe:B layer. Advantageously, increasing the mass flow rate of the boron-containing precursor 20 to an intermediate boron-containing precursor mass flow rate of the first SiGe:B layer limits the boron concentration at the interface 234 of the first SiGe:B layer and the second SiGe:B layer defined between the first SiGe:B layer and the second SiGe:B layer to less than the boron concentration in the second SiGe:B layer 206, ensuring the reliability of semiconductor devices formed using the semiconductor structure 200.
[0071] 11, the first portion 236 of the first SiGe:B layer 204 may be formed during a deposition interval A of the first portion of the first SiGe:B layer, and the second portion 238 of the first SiGe:B layer 204 may be formed during a deposition interval B of the second portion of the first SiGe:B layer. It is contemplated that the deposition interval of the second portion of the first SiGe:B layer may be shorter than the deposition interval of the first portion of the first SiGe:B layer. In this regard, the deposition interval of the second portion of the first SiGe:B layer may be about 10% to about 40% of the deposition interval of the first portion of the first SiGe:B layer, such as about 10% to about 20%, or 20% to about 30%, or even about 30% to about 40% of the deposition interval of the first portion of the first SiGe:B layer. It is also contemplated that the deposition interval of the second portion of the second SiGe:B layer may be longer than the deposition interval of the first portion of the first SiGe:B layer. For example, the deposition interval of the second portion of the first SiGe:B layer may be about 110% to about 140% of the deposition interval of the first portion of the first SiGe:B layer, such as about 110% to about 120%, or 120% to about 130%, or even about 130% to about 140% of the deposition interval of the first portion of the first SiGe:B layer. The boron-containing precursor mass flow rate of the first SiGe:B layer may be substantially constant during the deposition interval of the first portion of the first SiGe:B layer. The boron-containing precursor mass flow rate of the first SiGe:B layer may be substantially constant during the deposition interval of the second portion of the first SiGe:B layer. In a further embodiment, the boron-containing precursor mass flow rate of the first SiGe:B layer may be gradually increased during a deposition interval of the second portion of the first SiGe:B layer.
[0072] In a particular embodiment, the mass flow rate of the boron-containing precursor 20 may be increased only during the deposition interval B of the second portion of the first SiGe:B layer. In this regard, the intermediate boron-containing precursor mass flow rate of the first SiGe:B layer may be about 110% to about 200% of the first boron-containing precursor mass flow rate of the first SiGe:B layer. According to a particular embodiment, the mass flow rate of the boron-containing precursor 20 may be increased during (or to define) the interface 234 (shown in FIG. 4 ) between the first and second SiGe:B layers. For example, the mass flow rate of the boron-containing precursor 20 may be increased stepwise from the intermediate boron-containing precursor mass flow rate of the first SiGe:B layer to the second boron-containing precursor mass flow rate of the first SiGe:B layer. In this regard, the second boron-containing precursor of the first SiGe:B layer may be about 150% to about 250% of the intermediate boron-containing precursor mass flow rate of the first SiGe:B layer. Advantageously, this allows the mass flow rates of the silicon-containing precursor 16 and the germanium-containing precursor 18 to be ramped during the deposition interval B of the second portion of the first SiGe:B layer to compensate for the ramping of the mass flow rate of the boron-containing precursor 20 during the deposition interval B of the second portion of the first SiGe:B layer (limiting or eliminating the boron concentration at the interface 234 of the first and second SiGe:B layers), while allowing the composition of the first SiGe:B layer 204 to remain substantially uniform throughout the thickness of the SiGe:B layer 204.
[0073] In a particular embodiment, the ratio of germanium-containing precursor 18 to silicon-containing precursor 16 may be increased during a deposition interval of the second portion 238 of the first SiGe:B layer 204, such as during a deposition interval of the second portion of the first SiGe:B layer. The increase in ratio may be accomplished by flowing the germanium-containing precursor 18 into the chamber arrangement 104 (shown in FIG. 1 ) at a first germanium-containing precursor mass flow rate for the first SiGe:B layer during deposition of a first portion 236 of the first SiGe:B layer 204, increasing the mass flow rate of the germanium-containing precursor 18 from the first germanium-containing precursor mass flow rate for the first SiGe:B layer to a second germanium-containing precursor mass flow rate for the first SiGe:B layer during deposition of a second portion 238 of the first SiGe:B layer 204, and flowing the germanium-containing precursor 18 into the chamber arrangement 104 at the second germanium-containing precursor mass flow rate for the first SiGe:B layer during deposition of a second portion 238 of the second SiGe:B layer 206. In this regard, the second germanium-containing precursor mass flow rate of the first SiGe:B layer may be between about 150% and about 400% of the first germanium-containing precursor mass flow rate of the first SiGe:B layer, such as between about 150% and about 250%, or between about 250% and about 350%, or even between about 350% and about 400% of the first germanium-containing precursor mass flow rate of the first SiGe:B layer. It is contemplated that the germanium-containing precursor mass flow rate of the first SiGe:B layer may remain substantially constant during deposition of the second SiGe:B layer 206. It is also contemplated that the mass flow rate of the germanium-containing precursor 18 may remain constant during definition of the interface 234 of the first and second SiGe:B layers, for example, by incrementally increasing the mass flow rate of the germanium-containing precursor 18 at the end of the deposition interval of the second portion of the first SiGe:B layer.As will be understood by one of ordinary skill in the art in view of the present disclosure, a second germanium-containing precursor mass flow rate for the first SiGe:B layer within these ranges can ensure continuous growth of the first SiGe:B layer 204 and the second SiGe:B layer 206 (and / or during definition of the interface 234 between the first SiGe:B layer and the second SiGe layer) by limiting the available germanium atoms at the growth surface of the semiconductor structure 200 to an amount sufficient to offset the increase in the number of boron atoms at the growth surface of the semiconductor structure 200.
[0074] According to one particular embodiment, the increase in ratio may be achieved by flowing the silicon-containing precursor 16 into the chamber arrangement 104 (shown in FIG. 1 ) at a first silicon-containing precursor mass flow rate for the first SiGe:B layer during deposition of a first portion 236 of the first SiGe:B layer 204, increasing the mass flow rate of the silicon-containing precursor 16 from the first silicon-containing precursor mass flow rate for the first SiGe:B layer to a second silicon-containing precursor mass flow rate for the first SiGe:B layer during deposition of a second portion 238 of the first SiGe:B layer 204, and then flowing the silicon-containing precursor 16 into the chamber arrangement 104 at the second silicon-containing precursor mass flow rate for the first SiGe:B layer during deposition of a second portion 238 of the second SiGe:B layer 206. In this regard, the second silicon-containing precursor mass flow rate of the first SiGe:B layer may be about 105% to about 125% of the first silicon-containing precursor mass flow rate of the first SiGe:B layer, such as about 105% to about 110%, or about 110% to about 120%, or even about 120% to about 125% of the first silicon-containing precursor mass flow rate of the first SiGe:B layer. It is contemplated that the second silicon-containing precursor mass flow rate of the first SiGe:B layer may remain substantially constant during deposition of the second SiGe:B layer 206. It is also contemplated that the mass flow rate of the silicon-containing precursor 16 may remain substantially constant during definition of the interface 234 of the first and second SiGe:B layers, for example, by incrementally increasing the mass flow rate of the silicon-containing precursor 16 at the end of the deposition interval of the second portion of the first SiGe:B layer. Additionally, as will be understood by one of ordinary skill in the art in light of the present disclosure, a second silicon-containing precursor mass flow rate for the first SiGe:B layer within these ranges can also ensure continuous growth of first SiGe:B layer 204 and second SiGe:B layer 206 (and / or during definition of interface 234 between the first SiGe:B layer and the second SiGe layer) by limiting the available silicon atoms at the growth surface of semiconductor structure 200 to an amount sufficient to offset the increase in the number of boron atoms at the growth surface of semiconductor structure 200.
[0075] In one particular embodiment, etchant 24 may be flowed into chamber arrangement 104 (shown in FIG. 1 ) at a first etchant mass flow rate for the first SiGe:B layer during deposition of first portion 236 of first SiGe:B layer 204. The mass flow rate of etchant 24 may be increased to a second etchant mass flow rate for the first SiGe:B layer during deposition of second portion 238 of first SiGe:B layer 204, and etchant 24 may be flowed into chamber arrangement 104 at the second etchant mass flow rate for the first SiGe:B layer during deposition of second SiGe:B layer 206. In this regard, the second etchant mass flow rate of the first SiGe:B layer may be between about 150% and about 600% of the first etchant mass flow rate of the first SiGe:B layer, such as between about 150% and about 300%, or between about 300% and about 450%, or even between about 450% and about 600% of the first etchant mass flow rate of the first SiGe:B layer. As will be understood by one of ordinary skill in the art in view of the present disclosure, the second etchant mass flow rate of the first SiGe:B layer may continue to provide selectivity for deposition during the aforementioned increase in the ratio of germanium-containing precursor 18 provided to chamber arrangement 104 during deposition interval of the second portion of the first SiGe:B layer and / or during deposition of the second SiGe:B layer, during deposition of second portion 238 of first SiGe:B layer 204 and / or during deposition of second SiGe:B layer 206.
[0076] In one particular embodiment, a SiGe intermediate layer 240 (shown in FIG. 4) may be deposited on the second SiGe:B layer 206 prior to deposition of the Si:B layer 208. In this regard, it is contemplated that the flow of the boron-containing precursor 20 into the chamber arrangement 104 (shown in FIG. 1) may be reduced (or stopped entirely) while continuing to flow the silicon-containing precursor 16. The flow of the germanium-containing precursor 18 into the chamber arrangement 104 may be reduced in response to (e.g., simultaneously with) the reduction (or complete cessation) of the flow of the boron-containing precursor 20 into the chamber arrangement 104. The flow of the silicon-containing precursor 16 and the germanium-containing precursor 18 without the flow of the boron-containing precursor 20 may continue for a relatively short deposition interval, such as, for example, for a deposition interval shorter than the deposition intervals of both the second SiGe:B layer 206 and the Si:B layer 208, such that the thickness of the SiGe intermediate layer 240 is less than the thickness of the second SiGe:B layer 206 or thinner than the Si:B layer 208. The deposition of Si:B may then be commenced by restoring the flow of the boron-containing precursor 20 into the chamber body 132, for example, at a flow rate greater than the flow rate flowed during the deposition of the second SiGe:B layer 206. Advantageously, deposition of the intermediate SiGe layer 240 may facilitate nucleation of component precursors of the Si:B layer 208 on the semiconductor structure 200, for example, by limiting (or eliminating) the effect that a relatively high germanium concentration (e.g., 30% to about 60%) in the second SiGe:B layer 206 might otherwise have on nucleation of component precursors of the subsequently deposited Si:B layer 208 on the semiconductor structure 200.
[0077] In one particular embodiment, the etchant 24 may be flowed into the chamber arrangement 104 (shown in FIG. 1 ) during deposition of the SiGe intermediate layer 240. In this regard, the flow of the etchant 24 may be reduced in concert with (e.g., simultaneously with) the reduction of the flow of the germanium-containing precursor 18 into the chamber arrangement 104 and in concert with (e.g., simultaneously with) the cessation of the boron-containing precursor 20 into the chamber arrangement 104 to, for example, exclude substantially all boron from the SiGe intermediate layer 240. Advantageously, this may prevent boron segregation at the interface of the second SiGe:B layer 206 and the Si:B layer 208, thereby preventing any effects that segregated boron at the interface of the second SiGe:B layer 206 and the Si:B layer 210 may otherwise have on the structure of the Si:B layer 201. Further advantageously, the flow rate of the etchant 24 may be less than the flow rate of the etchant 24 provided to the chamber arrangement 104 during deposition of both the second SiGe:B layer 206 and the Si:B layer 208, limiting the tendency of the etchant 24 to etch back the second SiGe:B layer 206 while retaining the aforementioned beneficial avoidance of boron segregation at the interface of the second SiGe:B layer 206 and the Si:B layer 208.
[0078] 12-16, a method 300 of forming a semiconductor structure, e.g., semiconductor structure 200 (shown in FIG. 1), is illustrated. As shown in FIG. 12, method 300 includes placing a substrate, e.g., substrate 2 (shown in FIG. 1) in semiconductor processing system 100 (shown in FIG. 1), on a substrate support disposed within a chamber arrangement of a semiconductor processing system, as shown in box 302. A SiGe layer is deposited on the substrate, e.g., SiGe layer 202 (shown in FIG. 4), as shown in box 304, a first SiGe:B layer is deposited on the SiGe layer, e.g., first SiGe:B layer 204 (shown in FIG. 4), as shown in box 306, and a second SiGe:B layer is deposited on the first SiGe:B layer, e.g., second SiGe:B layer 206 (shown in FIG. 4), as shown in box 308. It is contemplated that a Si:B layer is deposited on a second SiGe:B layer, e.g., Si:B layer 208 (shown in FIG. 4), and a semiconductor device, e.g., semiconductor device 200 (shown in FIG. 1), is formed from a semiconductor conductor structure including the SiGe layer, the first SiGe:B layer, the second SiGe:B layer, and the Si:B layer, as shown in boxes 310 and 312. The semiconductor device formed using the semiconductor structure may be a finFET semiconductor device, a GAA semiconductor device, and / or a 3D DRAM semiconductor device formed from the semiconductor devices, as shown in 314-318. In a particular embodiment, a SiGe interlayer, e.g., SiGe interlayer 240 (shown in FIG. 4), may be deposited on the second SiGe:B layer, as shown in box 390 and further shown in box 310, and a Si:B layer may be deposited on the SiGe interlayer.
[0079] 13, depositing 304 the SiGe layer may include flowing a silicon-containing precursor at a silicon-containing precursor mass flow rate for the SiGe layer and a germanium-containing precursor at a germanium-containing precursor mass flow rate for the SiGe layer into the chamber arrangement, e.g., silicon-containing precursor 16 (shown in FIG. 2) and germanium-containing precursor 18 (shown in FIG. 2), as shown in box 320 and box 322. Depositing 308 the second SiGe:B layer may include flowing a silicon-containing precursor at a silicon-containing precursor mass flow rate for the second SiGe:B layer and flowing a germanium-containing precursor at a germanium-containing precursor mass flow rate for the second SiGe:B layer, as shown in box 324 and box 326. Depositing the second SiGe:B layer 308 may also include flowing a boron-containing precursor into the chamber arrangement at a boron-containing precursor mass flow rate for the second SiGe:B layer, such as boron-containing precursor 20 (shown in FIG. 2 ), as indicated by box 328. Depositing 310 may include flowing a silicon-containing precursor and a boron-containing precursor into the chamber arrangement at a silicon-containing mass flow rate for the Si:B layer and a boron-containing precursor mass flow rate for the Si:B layer, respectively, as indicated by boxes 330 and 332.
[0080] 14, depositing 306 the first SiGe:B layer may include flowing a silicon-containing precursor into the chamber arrangement at a predetermined silicon-containing precursor mass flow rate of the first SiGe:B layer, as shown in box 334. Depositing 306 the first SiGe:B layer may include flowing a germanium-containing precursor into the chamber arrangement at a first germanium-containing mass flow rate of the first SiGe:B layer, as shown in box 336. It is contemplated that depositing 306 the first SiGe:B layer may include flowing a boron-containing precursor into the chamber arrangement. In this regard, it is contemplated that a boron-containing precursor is initially flowed into the chamber arrangement at a predetermined first boron-containing precursor mass flow rate of the first SiGe:B layer, as shown in box 338. As shown in box 340, the mass flow rate of the boron-containing precursor is then increased to a first SiGe:B layer intermediate boron-containing precursor mass flow rate, and it is further contemplated that, upon completion of deposition of the first SiGe:B layer, the mass flow rate of the boron-containing precursor is increased from the first SiGe:B layer intermediate boron-containing precursor mass flow rate to a second boron-containing precursor for the first SiGe:B layer, as shown in box 342. Advantageously, the progressive (e.g., gradual) increase in the mass flow rate of the boron-containing precursor from a first boron-containing precursor mass flow rate for the first SiGe:B layer to an intermediate boron-containing precursor mass flow rate for the first SiGe:B layer, and the increase in the boron-containing precursor mass flow rate for the second SiGe:B layer to a second boron-containing precursor mass flow rate for the first SiGe:B layer, may limit the boron concentration at an interface between the first SiGe:B layer and the second SiGe:B layer, e.g., interface 234 (shown in FIG. 4 ) between the first SiGe:B layer and the second SiGe:B layer, as indicated by box 344. In certain embodiments of the present disclosure, the boron concentration at the interface may be lower than the boron concentration in the second SiGe:B layer, e.g., during an operation in which the second SiGe:B layer is deposited immediately and uninterruptedly after deposition of the first SiGe:B layer, limiting the time required to form the semiconductor structure.
[0081] 12, it is contemplated that deposition of the first SiGe:B layer may be accomplished by depositing a first portion of the first SiGe layer onto the SiGe layer (e.g., first portion 236 (shown in FIG. 4)), and then depositing a second portion of the first SiGe:B layer onto the first portion of the first SiGe:B layer (e.g., second portion 238 (shown in FIG. 4)), as indicated by boxes 346 and 348. 13, a first portion of the first SiGe:B layer may be deposited using a boron-containing precursor flowed into the chamber arrangement at a first boron-containing precursor mass flow rate of the first SiGe:B layer, as shown in box 350, and a second portion of the first SiGe:B layer may be deposited using a boron-containing precursor flowed into the chamber arrangement while increasing the mass flow rate of the boron-containing precursor from the first boron-containing precursor mass flow rate of the first SiGe:B layer to an intermediate boron-containing precursor mass flow rate of the first SiGe:B layer, as shown in box 352. It is contemplated that a first portion of the first SiGe:B layer is deposited during a deposition interval of a first portion, and a second portion of the first SiGe:B layer is deposited during a deposition interval of a second portion, as shown in boxes 354 and 356. In certain embodiments, the deposition interval of the second portion may be shorter than the deposition interval of the first portion. For example, as also shown in boxes 354 and 356, the deposition interval of the second portion may be about 10% to about 40% of the deposition interval of the first portion. According to certain embodiments, the deposition interval of the second portion may be longer than the deposition interval of the first portion. It is also contemplated that the deposition interval of the second portion may be substantially equivalent in duration to the deposition interval of the first portion and remain within the scope of the present disclosure.
[0082] 15, depositing 352 the second portion of the first SiGe:B layer may include increasing the ratio of the germanium-containing precursor mass flow rate to the silicon-containing precursor mass flow rate, as indicated by box 358. In certain embodiments of the present disclosure, the increase in ratio may be accomplished by flowing the germanium-containing precursor into the chamber arrangement at a first germanium-containing precursor mass flow rate of the first SiGe:B layer during deposition of the first portion of the first SiGe:B layer, as indicated by box 360, and then increasing the mass flow rate of the germanium-containing precursor to a second germanium-containing precursor mass flow rate of the first SiGe:B layer at the start of deposition (or progressively during deposition) of the second portion of the first SiGe:B layer, as indicated by box 362. It is contemplated that the first portion of the first SiGe:B layer is deposited using a germanium-containing precursor flowed into the chamber arrangement at the first germanium-containing precursor mass flow rate of the first SiGe:B layer, as indicated by box 364. It is also contemplated that the second portion of the first SiGe:B layer is deposited using a germanium-containing precursor flowed into the chamber arrangement at (or during a gradual increase to) the second germanium-containing precursor mass flow rate of the first SiGe:B layer, as indicated by box 366. In certain embodiments of the present disclosure, the second germanium-containing precursor mass flow rate may be between about 150% and about 400% of the first germanium-containing precursor mass flow rate, which may limit (or completely prevent) boron concentration changes within the second portion of the first SiGe:B layer that would otherwise accompany an increase in the mass flow rate of the boron-containing precursor from the first boron-containing precursor mass flow rate of the first SiGe:B layer to an intermediate boron-containing precursor mass flow rate of the first SiGe:B layer.
[0083] According to certain embodiments of the present disclosure, increasing 358 the germanium-containing precursor relative to the silicon-containing precursor during deposition of the second portion of the SiGe:B layer may involve increasing the mass flow rate of the silicon-containing precursor into the chamber arrangement. In this regard, deposition of the first portion of the first SiGe:B layer may be accomplished while flowing the silicon-containing precursor at a first silicon-containing precursor mass flow rate, as shown in boxes 368 and 370, and then the mass flow rate of the silicon-containing precursor may be increased (e.g., according to a step function) to a second silicon-containing precursor mass flow rate of the first SiGe:B layer, as shown in boxes 372 and 374, such that the second portion of the first SiGe:B layer is deposited using the silicon-containing precursor flowed into the chamber arrangement at the second silicon-containing precursor mass flow rate of the first SiGe:B layer. Advantageously, increasing the mass flow rates of either the germanium-containing precursor and the silicon-containing precursor (or both) at the start of deposition of the second portion of the first SiGe:B layer can fill the upper chamber 170 (shown in FIG. 3 ) with an accumulation of silicon and germanium atoms available for incorporation into the second portion of the SiGe:B layer, countering the tendency that the gradual increase in available boron atoms (and their associated higher affinity for incorporation) during the increase from the first boron-containing precursor of the first SiGe:B layer to the intermediate boron-containing precursor of the second SiGe:B layer might otherwise have on the composition of the second portion of the first SiGe:B layer.
[0084] As shown in FIG. 16, it is contemplated that the method 300 includes co-flowing an etchant, such as etchant 24 (shown in FIG. 2), into the chamber arrangement during the formation of the semiconductor structure. In this regard, the etchant may be flowed into the chamber arrangement during deposition of the SiGe layer, for example, by co-flowing the etchant with either (or both) a silicon-containing precursor and a germanium-containing precursor, as shown in box 376. The etchant may also be flowed into the chamber arrangement during deposition of the first SiGe:B layer, for example, by continuing the co-flow of the etchant with either (or both) a silicon-containing precursor and a germanium-containing precursor, and / or with a boron-containing precursor, as shown in box 378. The etchant may be further flowed into the chamber arrangement during deposition of the second SiGe:B layer, also by continuing the co-flow of the etchant with either (or both) a silicon-containing precursor and a germanium-containing precursor, and / or with a boron-containing precursor, as shown in box 380. It is contemplated that an etchant may additionally be flowed into the chamber arrangement during deposition of the Si:B layer, for example, by co-flowing the etchant with either the silicon-containing precursor and / or the boron-containing precursor (or both), as indicated by box 382. As will be understood by one of ordinary skill in the art in view of the present disclosure, flowing an etchant into the chamber arrangement during formation of the semiconductor structure may selectively allow the deposition of such layers onto the substrate, while removing amorphous material deposited onto dielectric surface portions of the substrate, such as, for example, channel 210 (shown in FIG. 4 ) and gate 212 (shown in FIG. 4 ).
[0085] In certain embodiments of the present disclosure, the mass flow rate of the etchant provided to the chamber arrangement may vary during the formation of the semiconductor structure. For example, the etchant may be flowed into the chamber arrangement at a first etchant mass flow rate for the first SiGe:B layer during deposition of a first portion of the first SiGe:B layer, as shown in box 384, and the mass flow rate of the etchant may be increased to a second etchant mass flow rate for the first SiGe:B layer during deposition of a second portion of the second SiGe:B layer, as shown in box 386. The mass flow rate of the etchant into the chamber arrangement may remain unchanged during deposition of the second SiGe:B layer, e.g., the mass flow rate may remain at the second etchant mass flow rate for the first SiGe:B layer during deposition of the second SiGe:B layer, as shown in box 388. For example, the flow of the etchant may be increased from a first etchant mass flow rate for the first SiGe:B layer to a second etchant mass flow rate for the first SiGe:B layer that is about 150% to about 600% of the first etchant mass flow rate for the first SiGe:B layer. Advantageously, increasing the mass flow rate of the etchant within these ranges can compensate for changes in the composition of the amorphous material associated with the above-mentioned changes in the mass flow rates of one or more of the silicon-containing precursor, germanium-containing precursor, and boron-containing precursor, allowing deposition on substrates having both exposed silicon and dielectric surfaces (e.g., on patterned substrates) to remain selective despite adjustments in the mass flow rates, and limiting the increase in boron concentration at the interface of the first and second SiGe:B layers, as described above.
[0086] Although the present disclosure has been provided in the context of certain embodiments and examples, those skilled in the art will understand that the present disclosure extends beyond the specifically described embodiments to other alternative embodiments and / or uses of the embodiments, and their obvious modifications, equivalents. In addition, while several variations of the embodiments of the present disclosure have been shown and described in detail, other modifications that are within the scope of the present disclosure will be readily apparent to those skilled in the art based on the present disclosure. It is also contemplated that various combinations or subcombinations of the specific features and aspects of the embodiments may be made and still fall within the scope of the present disclosure. It should be understood that various features and aspects of the disclosed embodiments can be combined with or substituted for one another to form various modes of the embodiments of the present disclosure. It is therefore not intended that the scope of the present disclosure should be limited by the specific embodiments described above.
[0087] The headings provided herein (if any) are for convenience only and do not necessarily affect the scope or meaning of the devices and methods disclosed herein. [Explanation of symbols]
[0088] 2 Base material 3 side wall 4 Top side 6. Trench 8 bottom 10 Precursors 12 Reaction Products 14 External environment 16 Silicon-containing precursors 18 Germanium-containing precursors 20 Boron-containing precursors 22 Carrier gas 24 Etchant 100 Semiconductor Processing System 104 Chamber Layout 108 Controller 110 Radio Link 112 Silicon-containing precursor sources 114 Germanium-containing precursor sources 116 Boron-containing precursor sources 118 Carrier Gas Source 120 Etchant Source 122 Silicon-containing precursor supply valve 124 Germanium-containing precursor delivery valve 126 Boron-containing precursor supply valve 128 Carrier gas supply valve 130 Etchant supply valve 132 Chamber body 134 Injection flange 136 Exhaust flange 138 Upper Heater Element Array 140 Lower Heater Element Array 144 Substrate support 146 Support member 148 Shaft member 150 Lift and Rotate Module 152 Transparent materials 154 Upper Wall 156 Lower Wall 158 First Side Wall 160 Second Side Wall 162 Injection end 164 Exhaust end 166 Internal 168 Opaque materials 170 Upper Chamber 172 Lower Chamber 174 Aperture 176 Rotational Axis 178 Gate valve 180 Substrate transport robot 182 User Interface 184 processors 186 User Interface 188 Memory 190 Program Modules 200 Semiconductor Structure 202 SiGe layer 204 First SiGe:B layer 206 Second SiGe:B layer 208 Si:B layer 210 Channels Gate 212 214 SiGe layer germanium concentration 218 First SiGe:B layer germanium concentration 220 Boron concentration in the first SiGe:B layer 224 Second SiGe:B Layer Germanium Concentration 226 Boron concentration in the second SiGe:B layer 230 Si:B layer boron concentration 234 Interface 236 First Part 238 Second Part 240 SiGe intermediate layer 300 Computer Program Products
Claims
1. 1. A method of fabricating a semiconductor structure, comprising: placing a substrate on a substrate support disposed within a chamber arrangement of a semiconductor processing system; flowing a boron-containing precursor into the chamber arrangement at a first boron-containing precursor mass flow rate; depositing a first portion of a first SiGe:B layer using the boron-containing precursor; increasing the mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate; depositing a second portion of the first SiGe:B layer using the boron-containing precursor; further increasing the mass flow rate of the boron-containing precursor into the chamber arrangement to a second boron-containing precursor mass flow rate; depositing a second SiGe:B layer on the first SiGe:B layer using the boron-containing precursor; the increasing the mass flow rate of the boron-containing precursor to the intermediate boron-containing precursor mass flow rate limits a boron concentration at a first SiGe:B layer and SiGe:B layer interface defined between the first SiGe:B layer and the second SiGe:B layer to less than a boron concentration in the second SiGe:B layer.
2. 2. The method of claim 1 , wherein the first portion of the first SiGe:B layer is formed during a deposition interval of a first portion and the second portion of the first SiGe:B layer is formed during a deposition interval of a second portion, the deposition interval of the second portion being shorter than the deposition interval of the first portion.
3. The method of claim 2 , wherein the deposition interval of the second portion is from about 10% to about 40% of the deposition interval of the first portion.
4. The method of claim 2 , wherein a mass flow rate of the boron-containing precursor is substantially constant during a deposition interval of the first portion.
5. The method of claim 2 , wherein the mass flow rate of the boron-containing precursor is gradually increased during a deposition interval of the second portion.
6. flowing a silicon-containing precursor into the chamber arrangement during deposition of the first portion of the first SiGe:B layer; flowing a germanium-containing precursor into the chamber arrangement during deposition of the first portion of the first SiGe:B layer; 10. The method of claim 1, further comprising: increasing a ratio of a germanium-containing precursor mass flow rate to a silicon-containing precursor mass flow rate during deposition of the second portion of the first SiGe:B layer.
7. increasing the ratio of the germanium-containing precursor to the silicon-containing precursor flowed into the chamber arrangement during deposition of the second portion of the SiGe:B layer; flowing the germanium-containing precursor into the chamber arrangement at a first germanium-containing precursor mass flow rate during deposition of the first portion of the first SiGe:B layer; increasing the first germanium-containing precursor mass flow rate to a second germanium-containing precursor mass flow rate during deposition of the second portion of the first SiGe:B layer; and flowing the germanium-containing precursor into the chamber arrangement at the second germanium-containing precursor mass flow rate during deposition of the second SiGe:B layer.
8. The method of claim 7, wherein the second germanium-containing precursor mass flow rate is between 150% and 400% of the first germanium-containing precursor mass flow rate.
9. 8. The method of claim 7, wherein the second germanium-containing precursor mass flow rate remains substantially constant during deposition of the second SiGe:B layer.
10. 8. The method of claim 7, wherein a mass flow rate of the germanium-containing precursor remains constant during definition of an interface between the first and second SiGe:B layers.
11. increasing the ratio of the germanium-containing precursor to the silicon-containing precursor flowed into the chamber arrangement during deposition of the second portion of the SiGe:B layer; flowing the silicon-containing precursor into the chamber arrangement at a first silicon-containing precursor mass flow rate during deposition of the first portion of the first SiGe:B layer; increasing the first silicon-containing precursor mass flow rate to a second silicon-containing precursor mass flow rate during deposition of the second portion of the first SiGe:B layer; and flowing the silicon-containing precursor into the chamber arrangement at the second silicon-containing precursor mass flow rate during deposition of the second SiGe:B layer.
12. The method of claim 11 , wherein the second silicon-containing precursor mass flow rate is from about 105% to about 125% of the first silicon-containing precursor mass flow rate.
13. 12. The method of claim 11 , wherein the first silicon-containing precursor mass flow rate flowed through the chamber arrangement remains constant during definition of a first SiGe:B layer and second SiGe:B layer interface between the first SiGe:B layer and the second SiGe:B layer.
14. flowing an etchant into the chamber arrangement at a first etchant mass flow rate during deposition of the first portion of the first SiGe:B layer; increasing a flow rate of the etchant to a second etchant mass flow rate during deposition of the second portion of the first SiGe:B layer; 2. The method of claim 1, further comprising: flowing the etchant into the chamber arrangement at the second etchant mass flow rate during deposition of the second SiGe:B layer.
15. The method of claim 14, wherein the second etchant mass flow rate is between about 150% and about 600% of the first etchant mass flow rate.
16. The method of claim 1 , wherein the first SiGe:B layer and the second SiGe:B layer are deposited consecutively and uninterruptedly.
17. 10. The method of claim 1, wherein the substrate comprises a trench defined in an upper surface of the substrate, the method further comprising depositing a silicon germanium (SiGe) layer on a lower surface and sidewalls bordering the trench.
18. 20. The method of claim 17, wherein the first SiGe:B layer is deposited in the trench and on the SiGe layer and the second SiGe:B layer protrudes above the top surface of the substrate, the method further comprising depositing a boron doped silicon layer on the second SiGe:B layer.
19. depositing a SiGe intermediate layer on the second SiGe:B layer; The method of claim 1 , further comprising: depositing a Si:B layer on the SiGe intermediate layer.
20. 10. A semiconductor structure formed using the method of claim 1 , wherein the second SiGe:B layer has a greater thickness than the first SiGe:B layer, the second SiGe:B layer has a greater germanium concentration than the first SiGe:B layer, and the second SiGe:B layer has a greater boron concentration than the first SiGe:B layer.
21. a SiGe intermediate layer deposited on the second SiGe:B layer; 21. The semiconductor structure of claim 20, further comprising: a Si:B layer deposited on the SiGe intermediate layer.
22. When read by a processor, the processor is placing the substrate on a substrate support disposed within a chamber arrangement of a semiconductor processing system; flowing a boron-containing precursor into the chamber arrangement at a first boron-containing precursor mass flow rate; depositing a first portion of a first SiGe:B layer using the boron-containing precursor; increasing the mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate; depositing a second portion of the first SiGe:B layer using the boron-containing precursor; further increasing the mass flow rate of the boron-containing precursor into the chamber arrangement to a second boron-containing precursor mass flow rate; 11. A computer program product comprising: a non-transitory machine-readable medium having instructions for depositing a second SiGe:B layer on the first SiGe:B using the boron-containing precursor, whereby the increase in the mass flow rate of the boron-containing precursor to the flow of the intermediate boron-containing precursor limits a boron concentration at an interface of the first SiGe:B layer and the SiGe:B layer defined between the first and second SiGe:B layers to less than a boron concentration in the second SiGe:B layer.