Microelectromechanical system component or microfluidic component comprising free-hanging or free-standing microchannel
Patent Information
- Application Number
- JP2024231190
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2019-09-20
- Filing Date
- 2024-12-26
- Publication Date
- 2025-03-14
Smart Images

Figure 2025036658000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention generally relates to Microelectromechanical System (MEMS) or microfluidic components that include free-hanging or freestanding microchannels, as well as methods for fabricating microchannels, and flow sensors, such as thermal or Coriolis flow sensors, pressure sensors or multi-parameter sensors, that include such Microelectromechanical System components. [Background technology]
[0002] 2. Background of the Invention From the prior art, micro-Coriolis mass flowmeters (MEMs) are known for measuring fluid flow rates of 2 g / h and even 4 g / h. These sensors are manufactured using the so-called surface channel technology (SCT), which makes it possible to realize free-hanging semicircular channels of various sizes and shapes.
[0003] For example, EP2078936B1 discloses a method for manufacturing a system chip for a flow meter, providing a monocrystalline silicon substrate, where a SiN deposition step and partial etching out and partial exposure by etching results in a tube structure, fixed at least on one side and otherwise free, of SiN tubes, for which a micro-SCT is used. The width and depth of the channels are determined by the position and amount of slits. The resulting cross section of the channel is a partially circular channel with a flat top. This SCT allows the maximum channel diameter to be limited to around 300 μm. In the SCT, the etching time of the silicon through the slits and the arrangement position of the slits are important in determining the shape and size of the surface channels.
[0004] However, many applications, such as liquid chromatography or "lab-on-a-chip", require low volumes and low pressure drops in microfluidic flowmeters while using higher flow rates, which cannot be achieved using microelectromechanical system (MEMS) components manufactured with SCT processes. Summary of the Invention [Problem to be solved by the invention]
[0005] Object of the invention It is an object of the present invention to provide a Microelectromechanical Systems (MEMS) or microfluidic component containing a free-hanging or free-standing microchannel, and a method for manufacturing such a microchannel, capable of achieving higher flow rates while providing a low volume and relatively low pressure drop for a microfluidic flow meter.
[0006] Summary of the Invention According to the invention there is provided a microelectromechanical system component or a microfluidic component comprising a free-hanging or free-standing microchannel, the channel having a substantially circular cross section and characterized in that the diameter of the channel is 10 times or more, such as 15 times or more, such as 20 times or more, such as 25 times or more, such as 30 times or more, such as 35 times or more, such as 50 times or more, such as 55 times or more, such as 60 times or more, such as 65 times or more, such as 70 times or more, such as 75 times or more, such as 80 times or more, such as 85 times or more, such as 90 times or more, such as 100 times or more, such as a diameter of the channel being 20 μm or more. Depending on the lower limit selected for the ratio, the upper limit of the ratio may be 100, 90, 85, 80, 75, 70, 65, 60, 55, 50, 35, 30, 25, 20, 15, etc., depending on the application. Thus, various ranges can be defined, such as ratios from 10 to 100, from 15 to 90, etc.
[0007] "Free-hanging" or "free-standing" means that after fabrication, the final channel is not connected or has only minimal connections to surrounding structures, such as the substrate, mold, etc., in which the channel was fabricated, e.g., not yet embedded therein. "Substantially circular" indicates a relatively high degree of circularity or rotational symmetry, e.g., without a flat top surface (as in the prior art) or clearly identifiable corners (as in squares), although some irregularities are permitted. This depends on the technology used, the crystal lattice, and irregularities due to the various fabrication processes. Thus, preferably, hexagonal or similar polygonal shapes are also contemplated, provided that they have rounded corners.
[0008] The above-mentioned MEMS or microfluidic components make it possible to increase the flow range of, for example, a micro-Coriolis MFM and / or reduce pressure losses by increasing the channel diameter while maintaining their advantages (fast speed, precision, low volume, small form factor).
[0009] The MEMS or microfluidic components described above have a substantially circular cross-section, which reduces sensitivity to pressure as the channel diameter increases, in contrast to SCT processes, where the channels have a flat top surface and a maximum channel wall thickness, both of which limit the maximum size of a free-hanging channel and increase sensitivity to pressure as the size of the channel increases.
[0010] An embodiment relates to said MEMS or microfluidic components, wherein the diameter of the channels is 5 μm or more, such as 10 μm or more, for example 20 μm or more, such as 30 μm or more, for example 40 μm or more, such as 50 μm or more, for example 60 μm or more, such as 70 μm or more, for example 80 μm or more, such as 90 μm or more, for example 100 μm or more, such as 200 μm or more, for example 500 μm or more, such as 1000 μm or more, etc. The upper limit of the channel diameter may be 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 200 μm, 500 μm, 1000 μm, etc. depending on the application. Thus, various channel diameter ranges can be defined, for example channel diameters of 5-1000 μm, 10-500 μm, etc.
[0011] An embodiment relates to said MEMS or microfluidic components, in which the thickness of the channel walls is smaller than 50 μm, or 20 μm, or 10 μm, e.g. smaller than 5 μm, e.g. smaller than 2.5 μm, e.g. smaller than 2 μm, e.g. smaller than 1.5 μm, e.g. smaller than 1.4 μm, e.g. smaller than 1.3 μm, e.g. smaller than 1.2 μm, e.g. smaller than 1.1 μm, e.g. smaller than 1.0 μm. Depending on the selected upper limit of the wall thickness, the lower limit of the channel diameter can be different values, such as 5 μm, 2.5 μm, 2 μm, 1.5 μm, 1.4 μm, 1.3 μm, 1.2 μm, 1.1 μm, 1.0 μm, etc., depending on the application. Thus, different thickness ranges can be defined, e.g. wall thicknesses from 1.0 to 10 μm, from 1.2 to 5 μm, etc.
[0012] Another aspect of the invention relates to a flow sensor, such as a thermal sensor or a Coriolis flow sensor, or a pressure sensor, a density sensor, a viscosity sensor, or a multi-parameter sensor, or a (micro)valve, or a (micro)pump, or a microheater, or a microcooler, or a lab-on-a-chip, such as a biosensor or a chemical sensor, comprising the aforementioned Microelectromechanical System components or microfluidic components.
[0013] A further aspect of the invention relates to microfluidic or MEMS components that are pre-formed, so that the channels are manufactured to have their final shape without an additional bending step.
[0014] First Method Another aspect of the invention relates to a first method of manufacturing free-hanging microchannels, particularly for use in the aforementioned microelectromechanical systems or microfluidic components, comprising the following steps: (a) providing a substrate of a first material; (b) depositing a trench etch protection layer on the front and / or back surface of the substrate; (c) etching a trench in the first material through the trench etch protection layer; (d) forming a channel etch protection layer within the trench, the channel etch protection layer covering a bottom wall and a sidewall of the trench; (e) etching the first material of the substrate through the channel etch protection layer and the bottom wall of the trench to form a channel outline centered at the location of the etched bottom wall of the trench; (f) removing the trench etch protection layer and the channel etch protection layer from the substrate; (g) depositing a wall-forming layer on the substrate, the wall-forming layer forming a channel wall on the channel contour and closing the trench; (h) Etching the substrate to remove the first material surrounding the channel walls such that the channels are free-hanging.
[0015] The above method introduces some important modifications to SCT: By (isotropically) etching the channels from the bottom of the trenches rather than from the surface of the wafer, the top surface planarization inherent in SCT is avoided.
[0016] The channels may have a diameter of, for example, up to 180 μm and the channel walls may have a thickness of up to 10 μm. The integrated metal electrodes can be used for actuation and readout of the micro-flow sensor. Thus, for example, a micro-Coriolis mass flow sensor with high flow rates can be realized.
[0017] An embodiment relates to the aforementioned method, further comprising: (i) preferably after step (a) and before step (b), forming an inlet etch protection layer on the front and / or back surface of the substrate.
[0018] Thus, the protective layer may be formed prior to etching the inlets for the channels in the substrate.
[0019] Thus, one embodiment relates to the aforementioned method, further comprising: (j) preferably after steps (a) and (i) and before step (b), etching inlets in the substrate, at the front and / or back side of the substrate, through the inlet etch protection layer; (k) during step (g), depositing a wall-forming layer on the substrate, the wall-forming layer covering the sidewalls of the inlet and forming a channel wall on the channel contour, closing the trench, and the inlet and the channel forming a continuous flow channel.
[0020] An embodiment relates to the aforementioned method, further comprising: (l) depositing a photoresist layer over the inlet etch protection layer and / or the trench etch protection layer and / or the metal layer;
[0021] An embodiment relates to the aforementioned method, further comprising: (m) preferably prior to step (b), removing the inlet etch protection layer from the front and / or back surface of the substrate.
[0022] An embodiment relates to the aforementioned method, further comprising: (n) preferably after step (b) and before step (c), depositing a further trench etch protection layer on the trench etch protection layer.
[0023] An embodiment relates to the aforementioned method, further comprising: (o) depositing a metal layer on the wall forming layer above the channel, and prior to step (h), etching the substrate to remove the first material surrounding the channel walls.
[0024] That is, after the channel is "closed", the aforementioned metal layers are deposited and patterned to form, for example, electrodes for actuation and readout of the Coriolis sensor.
[0025] One embodiment relates to the aforementioned method, wherein the metal layer comprises a gold layer having a chromium adhesion layer.
[0026] An embodiment relates to the aforementioned method, wherein the first material is silicon, the silicon preferably comprising heavily doped silicon and / or the silicon wafer is a heavily doped silicon wafer.
[0027] Thus, one embodiment relates to the aforementioned method, wherein the substrate is a silicon wafer.
[0028] One embodiment relates to the aforementioned method, wherein the silicon wafer has a thickness of 200-2000 μm, preferably 400-600 μm, more preferably 500-550 μm, for example 525 μm.
[0029] An embodiment relates to the method as described above, wherein the inlet etch protection layer comprises thermal SiO. The inlet etch protection layer having thermal SiO (t-SiO) may be used as a hard mask, such as from the backside of the wafer, during inlet etching, as described below.
[0030] One embodiment relates to the aforementioned method, where the trench etch protection layer is deposited using low pressure chemical vapor deposition (LPCVD). The trench etch oxide layer may be patterned with one or more rectangular trenches, e.g., 5-20 μm wide, e.g., 10 μm wide, and 25-75 μm long, e.g., 50 μm long, that define the contours of the channel, as discussed below.
[0031] One embodiment relates to the above method, where an additional trench etch protection layer is deposited using tetraethyl orthosilicate (TEOS, Si(OC2H5)4).
[0032] One embodiment relates to the aforementioned method, wherein the trench etch protection layer is used as a hard mask for etching the trenches. The trench etch protection layer may be used as a hard mask for etching one or more trenches, for example, with a depth of 100-150 μm, for example 110 μm. The trench etch protection layer is preferably also deposited on the inside of the inlet(s) to protect them during the channel etch.
[0033] One embodiment relates to the aforementioned method, wherein the channel etch protection layer comprises thermal SiO2, which protects the trench sidewalls during the channel etch.
[0034] One embodiment relates to the aforementioned method, wherein the trench etch protection layer is deposited using plasma enhanced chemical vapor deposition (PECVD). The PECVD process is preferably non-conformal, meaning that substantially no SiO2 is deposited inside the trench(es), while a very thick layer is deposited on the surface of the wafer.
[0035] One embodiment relates to the aforementioned method, wherein etching the substrate through the bottom wall of the trench to form the channel profile includes using a directional plasma etch to remove the channel etch protection layer. Because the etch rate of this process drops significantly inside the trench(es), the surface trench etch protection layer (PECVD layer) needs to be much thicker than the thermal SiO2 layer at the bottom of the trench.
[0036] One embodiment relates to the aforementioned method, wherein etching the substrate through the bottom wall of the trench to form a channel profile includes removing the first material using isotropic gas-phase XeF2. This etching process is isotropic in nature and therefore results in a round channel centered at the bottom of the etched trench. However, it is contemplated that other gases may be used. Even a fluid such as HNA (69% HNO3, 50% HF and H2O mixed in a ratio of 2:1:2) may be used.
[0037] In one embodiment, the method relates to the above, wherein removing any one of the protective layers from the substrate includes using, for example, a wet HF etch to prepare for depositing a wall-forming layer, as described below.
[0038] One embodiment relates to the aforementioned method, wherein depositing a wall-forming layer on the substrate comprises the steps of: - depositing a first wall-forming layer comprising thermal SiO2; - depositing a second wall-forming layer comprising silicon-rich silicon nitride (SiRN) using low pressure chemical vapor deposition (LPCVD); - depositing a third wall-forming layer comprising polycrystalline silicon (polysilicon); and depositing a fourth wall-forming layer comprising silicon-rich silicon nitride (SiRN);
[0039] The total "stack" can be up to 10 μm thick (depending on the etched trench width) and can be deposited conformally, i.e. inside the channel, on the front and back side of the substrate or wafer. The wall-forming layer closes the trench(es) in which the channel is etched, achieving a hermetically sealed and leak-free channel. The only wetted material in the channel is silicon-rich silicon nitride (SiRN).
[0040] One embodiment relates to the aforementioned method, further comprising forming one or more holes or recesses in the trench, preferably after depositing the third wall forming layer and before depositing the fourth wall forming layer, to prevent the trench from being blocked by the first, second, third and / or fourth wall forming layers.
[0041] One embodiment relates to the aforementioned method, wherein etching the substrate to remove the first material surrounding the channel walls comprises etching a wall-forming layer on the front and / or back side of the substrate to reach the first material, e.g. etching a layer stack above the wafer to reach the bulk substrate, e.g. silicon, next to the channel.
[0042] One embodiment relates to the aforementioned method, wherein etching the wall forming layer on the front side of the substrate to access the first material includes using a directional plasma etch.
[0043] One embodiment relates to the method described above, where etching the substrate to remove the first material around the channel walls so that the channels are free-hanging includes removing the first material using a semi-isotropic SF6 plasma etch and an isotropic gas-phase XeF2 etch, although as previously described other gases are contemplated for use, and even fluids such as HNA may be used, as described below.
[0044] One embodiment relates to a MEMS or microfluidic component manufactured by any of the methods described above.
[0045] Further embodiments of the present invention will now be described.
[0046] One embodiment relates to the aforementioned method of manufacturing a free-hanging microchannel, particularly for use in a microelectromechanical system component as described above, comprising the steps of: (a) providing a substrate of a first material; (b) depositing a trench-etching protection layer on the front and / or back surface of the substrate; (c) etching a trench in the first material through the trench-etching protection layer; (d) forming a channel-etching protection layer in the trench, covering the bottom and side walls of the trench; (e) etching the first material of the substrate through the channel-etching protection layer and the bottom wall of the trench to form a channel profile centered on the location of the etched bottom wall of the trench; (f) removing the trench-etching protection layer and the channel-etching protection layer from the substrate; (g) depositing a wall-forming layer on the substrate, the wall-forming layer forming a channel wall on the channel profile to close the trench; and (h) etching the substrate to remove the first material around the channel wall, such that the channel is free-hanging.
[0047] An embodiment relates to the aforementioned method, further comprising: (i) forming an inlet etching protection layer on the front and / or back surface of the substrate, preferably after step (a) and before step (b).
[0048] An embodiment relates to the aforementioned method further comprising: (j) preferably after steps (a) and (i) and before step (b), etching an inlet in the substrate through the inlet etching protection layer at the front and / or back side of the substrate; (k) depositing a wall forming layer on the substrate during step (g), the wall forming layer covering the sidewalls of the inlet and forming a channel wall on the contour of the channel to close the trench, and the inlet and the channel forming a continuous flow channel.
[0049] An embodiment relates to the aforementioned method, further comprising: (l) depositing a photoresist layer over the inlet etch protection layer and / or the trench etch protection layer and / or the metal layer.
[0050] An embodiment relates to the aforementioned method, further comprising: (m) removing an inlet etch protection layer from the front and / or back side of the substrate, preferably before step (b).
[0051] An embodiment relates to the aforementioned method, further comprising: (n) preferably after step (b) and before step (c), depositing a further trench etch protection layer on the trench etch protection layer.
[0052] An embodiment relates to the aforementioned method, further comprising: (o) depositing a metal layer on the wall-forming layer above the channel, and prior to step (h), etching the substrate to remove the first material surrounding the channel walls.
[0053] One embodiment relates to the aforementioned method, wherein the metal layer comprises a gold layer having a chromium adhesion layer.
[0054] One embodiment relates to the aforementioned method, wherein the first material is silicon.
[0055] One embodiment relates to the aforementioned method, wherein the substrate is a silicon wafer.
[0056] One embodiment relates to the aforementioned method, wherein the silicon wafer has a thickness of 200-2000 μm, preferably 400-600 μm, more preferably 500-550 μm, for example 525 μm.
[0057] One embodiment relates to the aforementioned method, wherein the inlet etch protection layer comprises thermal SiO2.
[0058] One embodiment relates to the aforementioned method, wherein the trench etch protection layer is deposited using low pressure chemical vapor deposition (LPCVD).
[0059] One embodiment relates to the aforementioned method, wherein an additional trench etch protection layer is deposited using tetraethyl orthosilicate (TEOS, Si(OC2H5)4).
[0060] One embodiment relates to the aforementioned method, wherein the trench etch protection layer is used as a hard mask for etching the trenches.
[0061] One embodiment relates to the aforementioned method, wherein the channel etch protection layer comprises thermal SiO2.
[0062] One embodiment relates to the aforementioned method, wherein the trench etch protection layer is deposited using plasma enhanced chemical vapor deposition (PECVD).
[0063] One embodiment relates to the aforementioned method, wherein etching the substrate through the bottom wall of the trench to form a channel profile includes using a directional plasma etch to remove a channel etch protection layer.
[0064] One embodiment relates to the aforementioned method, wherein etching the substrate through the bottom wall of the trench to form the channel contour includes removing the first material using isotropic gas-phase XeF2.
[0065] One embodiment relates to the aforementioned method, wherein removing any one of the protective layers from the substrate includes using a wet HF etch.
[0066] One embodiment relates to the aforementioned method, wherein depositing a wall-forming layer on the substrate comprises the steps of: - depositing a first wall-forming layer comprising thermal SiO2; - depositing a second wall-forming layer comprising silicon-rich silicon nitride (SiRN) using low pressure chemical vapor deposition (LPCVD); - depositing a third wall-forming layer comprising polycrystalline silicon (polysilicon); and depositing a fourth wall-forming layer comprising silicon-rich silicon nitride (SiRN);
[0067] One embodiment relates to the aforementioned method, further comprising forming one or more holes or recesses in the trench, preferably after depositing the third wall forming layer and before depositing the fourth wall forming layer, to prevent the trench from being blocked by the first, second, third and / or fourth wall forming layers.
[0068] One embodiment relates to the aforementioned method, wherein etching the substrate to remove a first material surrounding the channel walls includes etching a wall-forming layer on the front and / or back side of the substrate to access the first material.
[0069] One embodiment relates to the aforementioned method, wherein etching the wall forming layer on the front side of the substrate to reach the first material includes using a directional plasma etch.
[0070] One embodiment relates to the aforementioned method, wherein etching the substrate to remove the first material around the channel walls so that the channels are free-hanging includes removing the first material using a semi-isotropic SF6 plasma etch and an isotropic gas-phase XeF2 etch.
[0071] Second Method Another aspect of the invention relates to a second method for fabricating free-hanging or free-standing microchannels using a sol-gel process, particularly for use in the aforementioned microelectromechanical system components, comprising the following steps: - forming a mould having a circular channel; - flushing the circular channel with a cleaning solution to form an oxidized inner channel wall; - cleaning and drying the oxidized channel walls; - flowing the circular channel with a sol-gel solution; - allowing the gelling reaction to occur until the desired channel wall thickness is achieved; - washing off the remaining sol-gel solution; and - Removing mould material from around the channel walls.
[0072] The above methods allow the fabrication of free-hanging or free-standing microchannels with reduced pressure sensitivity, increased flow range, and more circular channel cross-sections. Furthermore, the channel diameter can be increased, for example, up to 1000 μm.
[0073] One embodiment relates to the method described above, wherein the material of the mold comprises polydimethylsiloxane (PDMS). The mold itself can be formed using the ESCARGOT (Embedded SCAffold RemovinG Open Technology) method.
[0074] One embodiment relates to the aforementioned method, wherein the cleaning liquid comprises piranha solution.
[0075] One embodiment relates to the aforementioned method, wherein the circular channel is flushed with the cleaning solution for 35-70 seconds.
[0076] In this way, the hydroxyl groups are encouraged to form covalent bonds.
[0077] One embodiment relates to the aforementioned method, where cleaning and drying of the oxidized inner channel walls is performed using deionized (DI) water and nitrogen.
[0078] One embodiment relates to the aforementioned method, wherein the sol-gel solution is made by mixing TEOS, MTES (methyltriethoxysilane), ethanol and water, preferably in a ratio of 1:1:1:1, more preferably including adding HCl to adjust the pH to 4.
[0079] Preferably, the sol-gel mixture is slowly flowed through the circular channel using a syringe pump. To allow the gelation reaction to occur, the channel may be placed on a hot plate at, for example, 55° C. This temperature may be limited by two factors: evaporation of ethanol, which would make the channel non-uniform, and the glass transition temperature of PDMS, if PDMS is used as the mold material.
[0080] Also, a stream of air may be used to wash away any remaining sol-gel solution.
[0081] The inventors found that the thickness of the channel wall can be controlled by the time and temperature of the gelation reaction and, for example, the delivery speed of a syringe pump. However, when PDMS is used, it should be noted that PDMS is not easily dissolved in piranha solution and that part of the channel wall may dissolve.
[0082] One embodiment relates to a MEMS component manufactured by any of the methods described above.
[0083] Further embodiments of the present invention will now be described.
[0084] One embodiment relates to the aforementioned method of manufacturing free-hanging or free-standing microchannels, in particular for use in the aforementioned microelectromechanical systems or microfluidic components, using a sol-gel process comprising the following steps: - forming a mould having a circular channel; - flushing the circular channel with a cleaning solution to form an oxidized inner channel wall; - cleaning and drying the oxidized inner channel walls; - flowing the circular channel with a sol-gel solution; - allowing the gelling reaction to occur until the desired channel wall thickness is achieved; - washing off the remaining sol-gel solution; and - Removing mould material from around the channel walls.
[0085] One embodiment relates to the aforementioned method, wherein the mold material comprises polydimethylsiloxane (PDMS).
[0086] One embodiment relates to the aforementioned method, wherein the cleaning fluid comprises piranha solution.
[0087] One embodiment relates to the aforementioned method, wherein the circular channel is flushed with the cleaning solution for 35-70 seconds.
[0088] One embodiment relates to the aforementioned method, where cleaning and drying of the oxidized inner channel walls is performed using deionized (DI) water and nitrogen.
[0089] One embodiment relates to the aforementioned method, wherein the sol-gel solution is made by mixing TEOS, MTES, ethanol and water, preferably in a ratio of 1:1:1:1, more preferably including adding HCl to adjust the pH to 4.
[0090] Third Method Another aspect of the present invention relates to a third method of manufacturing free-hanging or free-standing microchannels using electroplating techniques, particularly for use in microfluidic components such as the microelectromechanical system components mentioned above, comprising the following steps: - providing a conductive or non-conductive electroplated wire; - if the electroplated wire is non-conductive, forming a conductive coating on the electroplated wire to form a cathode; - electroplating the channel walls with an electroplating wire or conductive coating; and - Removing the electroplated wire.
[0091] One embodiment relates to the method described above, where the electroplated wire is made of acrylonitrile-butadiene-styrene (ABS) or copper. ABS can be subsequently dissolved, for example by using acetone. Other materials can also be used that can be dissolved, etched away, or otherwise removed. The material may be conductive, in which case no additional conductive coating is required (see below).
[0092] One embodiment relates to the aforementioned method, wherein the conductive coating comprises silver. To produce a conductive cathode, for example, an ABS electroplated wire may be coated with silver conductive paint and dried at room temperature. If the wire itself is already conductive, there is no need to apply additional conductive paint. The conductive paint is preferably easily removable when forming a free-standing channel. Nickel conductive paint and other conductive metal paints may be used instead of silver conductive paint.
[0093] One embodiment relates to an electroplating cell having two electrodes immersed in an electrolytic bath and a DC power supply. The anode is a rod of metal that will form the channel (preferably nickel, e.g., 99.99% pure rod, or copper or other metal), while a conductive or coated non-conductive electroplating wire forms the cathode.
[0094] An embodiment relates to the method as described above, where the channel walls comprise nickel or copper, and the electroplating step is carried out in a nickel or copper electroplating cell using an aqueous solution of nickel or copper. The copper electroplating cell may then comprise, for example, a copper anode, e.g., an ABS wire as a cathode, an aqueous solution of copper, and a DC power supply, for completeness. For example, a vessel containing 0.1 kg of copper salt, 0.11 liters of 96% sulfuric acid, 0.15 ml of 50% hydrochloric acid, 10 ml of HL11 starter, and 0.25 ml of HL13 grain refiner may be used to obtain 1 liter of aqueous copper solution. Deionized (DI) water may be added until the required volume is reached. Metals other than nickel and copper can in principle also be used. The electrolyte solution can be optimized for each metal to maximize production efficiency.
[0095] Nickel is particularly preferred as a material for constructing the channel walls. Nickel has good corrosion resistance to aqueous solutions (pH 4-10), common alcohols and simple carbohydrates. In some applications, it may be advantageous to leave the silver coating (partially) in order to take advantage of the properties of silver. The invention also envisages other coatings on the outside as well as inside the channel to protect the channel walls from adverse environmental effects from the outside and from corrosive fluids inside.
[0096] Another embodiment relates to channels produced by the above method that are not substantially circular, but are (near) perfectly circular.
[0097] An embodiment relates to the method as described above, wherein the microchannel is integrated into a microfluidic system component or a microelectromechanical system (MEMS) component. The microfluidic component may be a flow sensor; a pressure sensor; a density sensor; a viscosity sensor; a multi-parameter sensor; a valve; a pump; and / or a microheater. The flow sensor is preferably a thermal flow sensor or a Coriolis flow sensor.
[0098] An embodiment relates to the method as described above, where the electroplated wire is preformed to produce a free-standing microchannel in its shape without bending the microchannel. The electroplated wire may therefore have one or more bends. The bends may be in one plane. Preferably, the bends are rounded. The shape may be optimized to facilitate the step of removing the electroplated wire. In a particularly preferred embodiment, the shape is a U-shape or a loop for a Coriolis flowmeter as disclosed in EP1719982B1. Preferably, the preformed electroplated wire is attached to a MEMS or microfluidic system prior to the step of electroplating.
[0099] Another preferred embodiment relates to a microfluidic density sensor, which comprises a plated free-hanging or free-standing microchannel; actuation means for vibrating the free-standing microfluidic component at its resonant frequency; and readout means for measuring and comparing the resonant frequency. The shape of the microchannel is straight, rectangular, triangular or U-shaped (Groenesteijn, J.; van de Ridder, B.; Lotters, JC; Wiegerink, RJ / Modelling of a micro Coriolis mass flow sensor for sensitivity improvement.Paper presented at 2014 IEEE Sensors, Valencia, Spain). In particular, a U-shaped microchannel with a straight central part is preferred, which can be used, for example, in combination with the actuation shown in FIG. 5 of Groenesteijn, J, et al., 2012, A: Physical, vol.186, pp.48-53; DOI: 10.1016 / j.sna.2012.01.010. The density sensor is a microfluidic device. The actuation means preferably uses Lorentz force and the readout means is preferably capacitive, as known to those skilled in the art. The readout means is sensitive to any change in resonance due to changes in the weight, and therefore density, of the medium.
[0100] Further embodiments relate to the above method, where the electroplated wires are pre-formed and attached to the microfluidic system, optionally the MEMS system, prior to electroplating, after which the wires and attachment points are electroplated, resulting in a connection that forms the channel directly on the device without other attachment means such as welding, soldering or gluing.
[0101] Electroplating is performed at room temperature, for example at 3A / dm 2The electroplating can be performed for 1 hour at a current density of 10 ... [Brief description of the drawings]
[0102] The present invention will now be described with reference to the accompanying drawings and description of the figures. Figures 1A-2G show different stages in the fabrication of a free-hanging microchannel according to a first method, with Figures 1A-1G showing different stages with a cross section of the substrate along the length of the channel, and Figures 2A-2G showing stages with a cross section of the substrate perpendicular to the channel. Figures 6A-6F show different stages in the fabrication of a free-standing microchannel according to a second method. Figures 7A-7D show different stages in the fabrication of a free-standing microchannel according to a third method. [Figure 1A] FIG. 1A shows a schematic diagram of the production of a first thermal SiO2 layer as an inlet etching protection layer and the etching of the inlet. [Figure 1B] FIG. 1B shows a schematic of the etching of three trenches with a LPCVD SiO2 layer as a trench etching protection layer. [Figure 1C] FIG. 1C illustrates the formation of three additional PECVD SiO 2 layers as trench etch protection layers and a second thermal SiO 2 layer as a channel etch protection layer. [Figure 1D] FIG. 1D shows a schematic of etching the substrate through the bottom walls of the three trenches to form the channel features. [Figure 1E] FIG. 1E illustrates a schematic of the deposition of a wall-forming layer on a substrate. [Figure 1F] FIG. 1F shows a schematic of the deposition of a metal layer on the wall-forming layer above the channel. [Figure 1G] FIG. 1G illustrates a schematic of etching the substrate to remove the first material around the channel walls, leaving the channels free-hanging. [Figure 2A] FIG. 2A shows a schematic diagram of the production of a first thermal SiO2 layer as an inlet etching protection layer and the etching of the inlet. [Figure 2B] FIG. 2B shows a schematic of the etching of three trenches with a LPCVD SiO2 layer as a trench etching protection layer. [Figure 2C] FIG. 2C illustrates the formation of three additional PECVD SiO 2 layers as trench etch protection layers and a second thermal SiO 2 layer as a channel etch protection layer. [Figure 2D] FIG. 2D shows a schematic of etching the substrate through the bottom walls of the three trenches to form the channel features. [Figure 2E] Figure 2E illustrates a schematic of the deposition of a wall-forming layer on a substrate, and Figure 2F illustrates a schematic of the deposition of a metal layer on the wall-forming layer above the channel. [Figure 2G] FIG. 2G illustrates a schematic of etching the substrate to remove the first material around the channel walls, leaving the channels free-hanging. [Diagram 3] FIG. 3 further illustrates the layer stack at the channel wall. [Figure 4] FIG. 4 shows a schematic of a free-hanging channel next to another free-hanging channel that is partially released. [Diagram 5] FIG. 5 shows a schematic of metal electrodes on a free-hanging channel. [Figure 6A] FIG. 6A shows a schematic of an example of a mold having a circular channel. [Figure 6B] FIG. 6B shows a schematic of the circular channel being flushed with piranha solution. [Figure 6C] FIG. 6C shows a schematic diagram of the formation of hydroxyl groups on the inner wall of the channel. [Figure 6D]FIG. 6D shows a schematic of the flow of the sol-gel solution through a circular channel. [Figure 6E] FIG. 6E shows a schematic of the formation of a silicon dioxide layer on the circular inner wall. [Figure 6F] FIG. 6F shows a schematic of the resulting free-standing channel. [Figure 7A] FIG. 7A illustrates a schematic of an electroplated wire. [Figure 7B] FIG. 7B shows a schematic of applying a conductive layer to the electroplated wire to form the cathode. [Figure 7C] FIG. 7C shows a schematic of a copper or nickel layer being applied onto the conductive layer. [Figure 7D] FIG. 7D shows a schematic of a free-standing (copper or nickel) channel. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0103] Detailed explanation First Method As shown with respect to Figs. 1A-5 and as described above, the applicant has come up with a first advantageous manufacturing process for producing relatively large free-hanging or free-standing microchannels 1, preferably integrated with electrodes 23 for actuation and readout of a micro-Coriolis mass flow sensor. This process is an improvement over the previously presented SCT. The resulting microchannels 1 have a circular or near-circular (partially hexagonal-like) cross section, with a diameter of, for example, up to 180 μm and a channel wall 7 thickness of, for example, up to 10 μm, without the use of wafer bonding. This channel 1 can be released from the bulk to enable the oscillatory motion required for a Coriolis mass flow meter (MFM). The integrated metal electrodes 23 can be used for actuation and readout of the sensor.
[0104] However, as mentioned above, many applications such as liquid chromatography or "lab-on-a-chip" use higher flow rates while still requiring low volumes of microfluidic flowmeters. To increase the flow range and / or reduce pressure loss of micro-Coriolis MFMs while still maintaining the advantages of micro-Coriolis MFMs (high speed, high accuracy, low volume, small size), the channel diameter needs to be enlarged. However, the SCT process is characterized by channels with flat tops and maximum channel wall thickness. Both of these limit the maximum size of free-hanging channels and increase the sensitivity to pressure when the channel size is large.
[0105] The fabrication process shown in Figures 1A-5 introduces two major modifications to the SCT. By isotropically etching the channel 1 from the bottom 16 of the trench 15 rather than from the surface of the wafer 2, the "flat top" inherent in the SCT is avoided. Furthermore, by preferably using a stack of multiple materials as the channel walls 7, the wall thickness can be increased beyond what the intrinsic stress of the silicon-rich silicon nitride (SiRN) used in the SCT allows.
[0106] Manufacturing Overview 1A to 5 show a simple outline of the first manufacturing process.
[0107] 1A and 2A, the fabrication may preferably start with wet thermal oxidation of a substrate 2, for example a 525 μm thick highly doped silicon wafer 2. This thermal SiO2 (t-SiO2) layer 4 serves as an inlet etch protection layer 4 and may be used as a hard mask during etching of inlets 10 from the backside 12 of the wafer 2.
[0108] As shown in FIG. 1B and FIG. 2B, after the inlet etch, the inlet etch protection layer 4 can be stripped and a new SiO2 layer 5 (as trench etch protection layer 5) can be deposited using low pressure chemical vapor deposition (LPCVD) of tetraethyl orthosilicate (TEOS, Si(OC2H5)4). This trench etch protection layer 5 is patterned with three rectangular holes, e.g., 10 μm wide and 50 μm long, that can form the longitudinal outline of the channel 1. The SiO2 layer 5 is then used as a hard mask to etch a trench 15, e.g., 110 μm deep, into which the channel 1 will be etched.
[0109] As shown in Figures 1C and 2C, this SiO2 layer 5 can also be deposited inside the inlet 10 to protect it during channel etching. Then, a thermal oxidation step can be performed, which forms a t-SiO2 layer 18 as a channel etching protection layer 18 on the silicon in the trench 15. This channel etching protection layer 18 protects the trench sidewalls 17 during channel etching. A thick SiO2 layer 6 can be deposited on the front side 11 of the wafer 2 as a further trench etching protection layer 6, for example using plasma enhanced chemical vapor deposition (PECVD).
[0110] The PECVD process is preferably non-conformal, meaning that substantially no SiO2 is deposited inside the trenches 15, while a relatively thick layer is deposited on the surface of the wafer 2. A directional plasma etch may be used to remove the t-SiO2 at the bottom 16 of the trenches 15. Since the etch rate of this process is greatly reduced inside the trenches 15, the PECVD SiO2 layer 6 at the surface (front side 11) needs to be much thicker than the t-SiO2 layer at the bottom 16.
[0111] 1D and 2D, the channel 1 may then be etched in the bulk of the wafer 2 through the trench 15, for example by an isotropic gas-phase XeF2 etch. Because this etching process is generally isotropic, it results in the formation of a circular channel 1 centered at the location of the etched bottom wall 16 of the etch trench 15.
[0112] As shown in Figures 1E and 2E, a wet HF etch may be used to remove all the SiO2 and deposit the channel walls 7. Preferably, the first layer is a t-SiO2 layer, followed by LPCVD of a silicon-rich silicon nitride (SiRN) layer, a polycrystalline silicon (polySi) layer, and finally a SiRN layer (as shown more clearly in Figure 3).
[0113] As shown in Figures 1F and 2F, the thickness of the entire stack can be, for example, up to 10 μm (depending on the etching trench width) and may be deposited conformally, meaning inside the channel outline 19 and on the front 11 and back 12 of the wafer 2. It may close the trench 15 in which the channel 1 is etched, resulting in a sealed and leak-free channel 1. The only wetted material inside the channel 1 is silicon-rich silicon nitride (SiRN). After the channel 1 is closed, a gold layer 8 with a chromium adhesion layer may be deposited and patterned to form electrodes, for example for actuation and readout of the Coriolis sensor.
[0114] Finally, as shown in Figures 1G and 2G, the layer stack on top of wafer 2 may be etched using a directional plasma etch to reach the bulk silicon next to channel 1. A semi-isotropic SF6 plasma etch and an isotropic gas-phase XeF2 etch can be used to remove the silicon around channel 1 to allow free movement of the channel 1.
[0115] Manufacturing results At the beginning of the etching, the silicon load is very small and the etchant reaches the silicon well while the reaction products can be removed. This results in a completely isotropic etch. However, as the channel diameter increases, the silicon load also increases, but the trench 15 through which the etchant and reaction products must diffuse does not increase. As a result, the XeF2 concentration inside the channel decreases, the etching kinetics change, and finally a less favorable hexagonal cross section is obtained.
[0116] Channel wall Conventionally, the channel walls 7 are made with a single layer of silicon-rich silicon nitride (SiRN). Due to intrinsic stresses in the available layer, this layer is only 2 μm thick. This means that when the diameter of the channel 1 increases, the strength and stiffness of the channel walls 7 may not increase with it. As a result, the mechanical behavior of the free-hanging channel 1 becomes increasingly dependent on external influences such as applied pressure and temperature. To create free-hanging channels 1 with thicker channel walls 7, preferably a layer stack is used in which all layers have a function.
[0117] The SiO2 protects the channel walls 7 during the XeF2 release etch. SiO2 has much better selectivity compared to SiRNP, allowing the completed channel 1 to be released.
[0118] The SiRNs on the inside of the channel walls 7 form a chemically inert flow path. Due to intrinsic stresses, these SiRN layers have a maximum thickness of about 2 μm and therefore cannot be used for the entire channel walls 7. They are also deposited on the outside of the channel walls 7 so that the stresses in the channel walls 7 are approximately balanced.
[0119] Polysilicon can be deposited, for example, up to 10 μm, while its stress can be adjusted by annealing, so that this layer can be used to reach a specific wall thickness without affecting the stress in the channel wall 7.
[0120] Figure 3 shows the top view of an etched trench closed with a wall-forming layer 9 consisting of such a layer stack: from bottom to top, Figure 3 shows a 1 μm thick t-SiO2 layer 25, a 1 μm thick SiRN layer 26, a 5 μm thick polysilicon layer 27, a 1 μm thick second SiRN layer 28 and finally a photoresist layer 3 on top.
[0121] In this case the trench is only 10 μm wide and is completely closed during the deposition of the polysilicon layer 27. As a result, the final SiRN layer 28 is only found on the top surface of the wafer 2 and not inside the channel walls 7.
[0122] Silicon Isotropic Wet Etching Silicon isotropic wet etching, also called HNA etching, is the chemical etching of silicon with a mixture of hydrofluoric acid (H), nitric acid (N) and acetic acid (A), although some researchers prefer to use water instead of acetic acid. The process proceeds in the order of oxidation-dissolution. The complete reaction can be written as: Si+2HNO3+6HF → H2SiF6+2HNO2+2H2O
[0123] The factor limiting the etch rate depends heavily on the composition of the mixture: if the concentration of nitric acid is low and the concentration of hydrofluoric acid is high, the etch rate is limited by the oxidation step; in the opposite case, the limitation is the dissolution of SiO2.
[0124] With a sufficient supply of etchant and an ultrasonic bath to facilitate diffusion of the etchant and etch products, the maximum diameter of the etched channel 1 is limited only by the depth of the trench 15 and the thickness of the SiRN mask. From previous testing, SiRN is a good material to use as a mask for the HNA solution, with an etch rate of about 23 nm / min. However, a thicker layer of SiRN can withstand longer during etching, with the tradeoff being that it is more difficult to remove the layer at the bottom 16 of the trench 15. For this reason, alternative materials to serve as a mask for the HNA solution may also be considered.
[0125] Releasing a channel The release of the channel 1 "from the bulk" is done in three steps. First, the channel walls 7 of the layer stack 9, which is also deposited on the top / front side 11 of the wafer, are patterned with release windows next to the channel 1 using a directional plasma etch. To prevent the exposed polysilicon layer 27 from being exposed during the bulk etch, a new photoresist layer 3 is added with smaller release windows. This photoresist needs good planarization properties to be able to completely cover the 10 μm steps and also to allow a sufficiently accurate patterning for the interdigitated fingers used for the capacitive readout. Then, trenches, for example 200 μm deep, may be etched through the release windows using a directional plasma etch. An isotropic XeF2 etch is performed through these trenches to remove the silicon underneath the channel 1.
[0126] To keep the silicon loading low during this etch (and therefore the etch rate relatively high), parallel channels 1 are created around the free-hanging channel 1 to act as etch stops. This is shown in Figure 4. The "pillars" on top of the channel 1 show a periodic pattern that matches the etched trenches, e.g. 50 μm long, spaced e.g. by 10 μm. The channel walls 7 show the same periodic pattern.
[0127] Activation and Readout Figure 5 shows metal electrodes 23 on the free-hanging channel 1, i.e., several actuation metal electrodes 23 on the top surface of the free-hanging channel 1. Below, the closed channel etch trenches 21 are still visible. In the center of Figure 5, comb fingers 22 for capacitive readout are shown. One side of the comb structure 22 is attached to the free-hanging channel 1 and the other side to the bulk of the chip. The comb fingers 22 significantly reduce the etch rate of the release etch, so extra release holes 24 are etched above and below the comb fingers 22.
[0128] Thus, the applicant has developed a manufacturing process for making relatively large circular free-hanging microchannels 1. The channels 1 may have a channel wall 7 thickness of, for example, up to 10 μm and a diameter of, for example, up to 180 μm. The integrated metal electrodes 23 can be used for actuation and readout of micro flow sensors, for example high-flow micro Coriolis mass flow sensors.
[0129] Second Method A second method that can result in (near-perfect) circular channels 1 with various diameters and thicknesses of the channel walls 7 involves the so-called "sol-gel" method.
[0130] 6A-6F show a method step outline for using this method to achieve a channel 1 with, for example, silicon dioxide channel walls 7. The sol-gel mixture can be made by mixing, for example, TEOS, MTES, ethanol and water in a 1:1:1:1 volume ratio and adding HCl to adjust the pH to 4.
[0131] 6A-6C, the mixture may be placed in an oven for 12 hours. A circular mold 29 is made of PDMS, preferably using the ESCARGOT method. As shown in FIG. 6B, the mold 29 may then be flushed with piranha solution 30 for, for example, 35-70 seconds to have hydroxyl groups 31 form covalent bonds, and then rinsed with pure water and dried with a stream of nitrogen.
[0132] As shown in Figure 6D, the sol-gel mixture 32 may then be slowly flowed through the channel 37 using, for example, a syringe pump. To allow the gelation reaction to occur, the channel 37 is preferably placed on a hotplate at 55°C. This temperature may be limited by two factors: evaporation of ethanol, which results in non-uniform channels, and the glass transition temperature of PDMS, if PDMS is used. Once the desired coating thickness is reached, the remaining solution may be washed away with a stream of air.
[0133] FIG. 6E shows the resulting silicon dioxide layer 33 inside a circular channel 37 with a diameter of, for example, 600 μm. A free-standing channel 1 can then be realized by selectively dissolving the PDMS of the mold 29 around the silicon dioxide layer 33. The thickness of the silicon dioxide layer 33 can be controlled, for example, by the time and temperature of the layer formation process and the speed of the syringe pump. However, it should be noted that the creation of a free-standing channel 1 is difficult, since, as the skilled person will understand, PDMS does not dissolve easily in piranha solution and care must be taken not to dissolve the silicon dioxide layer 33 as well.
[0134] Third Method As a third method, electroplating can be used. Plating can be performed, for example, on a wire 34 (with a circular cross section) of acrylonitrile-butadiene-styrene (ABS), which can then be dissolved, for example, by acetone. Figures 7A-7D show possible process steps of this method. A copper electroplating cell may include a copper anode, an ABS wire 34 as a cathode, an aqueous copper solution, and a DC power supply (not shown). However, in principle nickel or other metals could also be used.
[0135] To produce a conductive cathode, FDM-ABS wire 34 may be coated with silver conductive paint 35 and dried at room temperature. One liter of copper aqueous solution preferably contains 0.1 kg of copper salt, 0.11 liters of 96% sulfuric acid, 0.15 ml of 50% hydrochloric acid, 10 ml of HL11 starter and 0.25 ml of HL13 grain refiner. Pure water may be added to the required amount. Electroplating may be performed, for example, at room temperature with a current of 3 A / dm 2 The electroplating may be performed for 1 hour at a current density of 1000 nm. After electroplating, the substrate is rinsed with pure water to prevent oxidation of the electroplated copper 36. The wire 34 may then be immersed for 12 hours in a beaker of acetone, for example, to completely dissolve the inner ABS wire 34. Instead of ABS, PA or PVA polymers may also be used, which can be dissolved in hot water. Figure 7D shows a schematic depiction of the resulting free-standing channel 1.
[0136] This plating method can be used to predictably fabricate microchannels with very high circularity, for example, the channel 1 fabricated by the plating method has a high degree of rotational symmetry. By selecting a wire 34 with a high degree of circularity, flat spots can be avoided.
[0137] This method was repeatedly tested using ABS wire 34 with diameters ranging from 120 to 1000 μm. Table 1 shows example measurements of wall thickness for each size of ABS wire 34 after several nickel electroplating passes. The thinnest wall thickness achieved was about 8 μm. The thickest wall was 60 μm, and thicker walls could be achieved if the electroplating step was allowed to continue longer.
[0138] [Table 1]
[0139] Thus, this method is capable of producing channels with wall thickness to channel diameter ratios of approximately 1:3 to 1:115. It was also found that the channel walls were highly uniform.
[0140] This plating method allows the production of a microfluidic density sensor with low manufacturing costs. Such a density sensor may preferably comprise a free-standing U-shaped channel with multiple straight legs connected to a straight middle section by rounded edges. In this case, the density sensor tube is made of nickel.
[0141] The channels are produced by electroplating. Before immersion in the plating bath, a 600 μm diameter ABS wire is bent into a U-shape (optionally using a mold), deeply coated with silver paint and allowed to dry. The anode of the electroplating cell is a nickel rod with a purity of 99.99%, and the cathode is formed of a conductive or non-conductive electroplated wire. Electroplating may be continued until the desired wall thickness of 20 μm is reached. The wire is then removed from the electroplating bath and placed in an ABS dissolving solution consisting of acetone and optionally heated. The result is a channel with a highly circular cross section with a diameter of 600 μm and a wall thickness of 20 μm.
[0142] The U-shaped density sensor channel is 12×12 mm long and wide and can be used in a similar assembly as mentioned in Groenesteijn, et al., 2012, supra. The density sensor was further assembled by placing three external magnets parallel to the length of the channel, attaching a power supply and connecting the inlet to the fluid supply and the outlet to a drain. A filter and degasser are preferably placed in front of the inlet. An alternating current is applied to the density sensor tube in the presence of an external magnetic field, causing the channel to vibrate due to the Lorentz force. When the vibrating channel fills with liquid, the mass increases and this increase is detected by a change in the (torsion mode) resonant frequency. The detection mode may change depending on the channel geometry used. The density sensor has a density of 1.56×10 at atmospheric pressure and room temperature. 4 Spring constant in N / m and 3.78×10 5 In addition, the circular cross section of the channel reduces the dependence on gauge pressure. [Explanation of symbols]
[0143] 1. Microchannel 2. Substrate of the first material (silicon) 3. Photoresist Layer 4. First thermal SiO2 layer 5. SiO2 layer by LPCVD method 6. SiO2 layer by PECVD method 7.Channel Walls 8. Metal layer 9. Wall cambium 10. Inlet 11.Front 12.Back side 13. Inlet sidewall 14. Inlet top wall 15. Trench 16. Bottom wall of trench 17. Trench sidewalls 18. Second thermal SiO2 layer 19.Channel Outline 20. Continuous flow channel 21.Closed channel etch trench 22. Comb structure with interdigitated fingers 23.Metal electrode 24. Release Hole 25. First wall forming layer (thermal SiO2) 26. Second wall forming layer (SiRN) 27. Third wall forming layer (polysilicon) 28. Fourth wall forming layer (SiRN) 29.Circular 30. Piranha solution 31. Hydroxyl group 32. Sol-gel mixtures 33. Silicon dioxide layer 34.ABS wire 35.Silver layer 36. Copper layer 37. Circular channel mold
Claims
1. A microelectromechanical system or microfluidic component comprising a free-hanging or free-standing microchannel (1), The channel (1) has a substantially circular cross section, The diameter of said channel (1) is at least 10 times the thickness of the channel wall (7); The diameter of the channel (1) is 20 μm or more; A microelectromechanical system component or a microfluidic component, comprising:
2. The diameter of the channel (1) is 50 μm or more, such as 100 μm or more, for example 200 μm or more, such as 500 μm or more, for example 1000 μm or more; 2. A microelectromechanical system or microfluidic component according to claim 1.
3. the thickness of the channel wall (7) is less than 10 μm; A microelectromechanical system or microfluidic component according to claim 1 or 2.
4. A flow sensor, such as a thermal flow sensor or a Coriolis flow sensor; a pressure sensor; a density sensor; a viscosity sensor; a multi-parameter sensor; a valve; a pump; and / or a microheater, comprising a microelectromechanical system component or a microfluidic component according to any one of claims 1 to 3.
5. A method for the manufacture of a free-hanging or free-standing microchannel (1) using an electroplating method, comprising the steps of: Providing a conductive or non-conductive electroplated wire (34); If the electroplated wire (34) is non-conductive, forming a conductive coating (35) on the electroplated wire (34) to form a cathode; Electroplating the channel walls (7, 37) onto said electroplated wire (34) or said conductive coating (35); removing said electroplated wire (34); A method comprising:
6. A microelectromechanical system component or a microfluidic component according to any one of claims 1 to 3, The method according to claim 5.
7. The electroplated wire (34) is composed of acrylonitrile-butadiene-styrene (ABS) or copper. The method according to claim 5 or 6.
8. The conductive coating (35) comprises silver. The method according to any one of claims 5 to 7.
9. the channel walls (7) comprise nickel or copper (37); the electroplating step is carried out in a nickel or copper electroplating cell using an aqueous solution of nickel or copper; The method according to any one of claims 5 to 8.
10. The microchannel (1) is integrated into a microelectromechanical system (MEMS) component or a microfluidic system; The method according to any one of claims 5 to 9.
11. The electroplated wire (34) is pre-formed to be part of a MEMS or microfluidic system prior to the electroplating step. The method according to any one of claims 5 to 10.
12. The preformed electroplated wire (34) is attached to a MEMS or microfluidic system prior to the electroplating step. The method of claim 11.
13. A free-hanging or free-standing microchannel (1) manufactured according to the method of any one of claims 5 to 12.
14. 14. Comprising a free-hanging or free-standing microchannel (1) according to claim 13, Microfluidic or MEMS systems.
15. A flow sensor, such as a thermal or Coriolis flow sensor; a pressure sensor; a density sensor; a viscosity sensor; a multi-parameter sensor; a valve; a pump; and / or a microheater, comprising a free-hanging or free-standing microchannel (1) according to claim 13.
16. A free-hanging or free-standing microchannel (1) according to claim 13, an actuation means for vibrating said free-hanging or free-standing microchannel at its resonant frequency; and readout means for measuring and comparing said resonant frequencies. Microfluidic density sensor.
17. A method for manufacturing a free-hanging microchannel (1), in particular for use in a microelectromechanical systems component or a microfluidic component according to any one of claims 1 to 3, comprising the following steps: (a) providing a substrate (2) of a first material; (b) depositing a trench etch protection layer (5) on the front side (11) and / or back side (12) of said substrate (2); (c) etching a trench (15) in the first material through the trench etch protection layer (5); (d) forming a channel etch protection layer (18) within the trench (15) covering the bottom wall (16) and the sidewalls (17) of the trench (15); (e) etching the first material of the substrate (2) through the channel etch protection layer (18) and the bottom wall (16) of the trench (15) to form a channel outline (19) centered about the location of the etched bottom wall (16) of the trench (15); (f) removing the trench etch protection layer (5) and the channel etch protection (18) layer from the substrate (2); (g) depositing a wall-forming layer (9) on said substrate (2), said wall-forming layer (9) forming channel walls (7) on said channel contours (19) and closing said trenches (15); (h) etching said substrate (2) to remove said first material surrounding said channel walls (7) so that said channels (1) are free-hanging.
18. A method for the production of free-hanging or free-standing microchannels (1), in particular for use in microelectromechanical systems components or microfluidic components according to any one of claims 1 to 3, using a sol-gel method, comprising the steps of: forming a mould (29) having a circular channel (37); flushing said circular channel (37) with a cleaning solution (30) to form an oxidized inner channel wall (31); washing and drying the oxidized channel inner walls (31); flushing said circular channel (37) with a sol-gel solution (32); allowing the gelling reaction to occur until the desired channel wall (7, 33) thickness is achieved; Washing off the remaining sol-gel solution (32); and removing material of the mould (29) from around the channel walls (7, 33). Manufacturing method.
Citation Information
Patent Citations
Manufacturing method of microchannel heat exchanger using sacrificial core metal
JP1997505388A
Microfabrication process for enclosed microstructures
US6093330A
A novel flexible microfluidic meshwork for glaucoma surgery
WO2018156687A1