Semiconductor device

Abstract

To provide an oxide semiconductor layer in which hydrogen does not easily enter by reducing the nitrogen concentration in the oxide semiconductor layer.SOLUTION: A semiconductor device includes a gate electrode 200, an oxide semiconductor layer 410 including a channel formation region, and a gate insulating layer 300 held between the gate electrode and the oxide semiconductor layer. The nitrogen concentration of the channel formation region is 1×1020 atoms / cm3 or less.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an oxide semiconductor. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device using an oxide semiconductor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2007-123861 A Summary of the Invention [Problem to be solved by the invention]

[0004] While the physical properties of silicon semiconductors have been largely elucidated, the physical properties of oxide semiconductors remain unclear. Mostly.

[0005] In particular, the effect of impurities on oxide semiconductors has not yet been clarified.

[0006] In view of the above, it is possible to prevent impurities that affect the electrical characteristics of a semiconductor device using an oxide semiconductor layer. The configurations in which the above have been eliminated or removed are disclosed below. [Means for solving the problem]

[0007] First, there are two factors that affect carriers in the oxide semiconductor layer.

[0008] The first type is carriers resulting from oxygen vacancies in the oxide semiconductor layer.

[0009] The second type is carriers originating from donor or acceptor elements in the oxide semiconductor layer. be.

[0010] The hydrogen element serves as a carrier (donor) in the oxide semiconductor layer.

[0011] Furthermore, hydrogen element has reducing properties and is an element that induces oxygen deficiency.

[0012] Therefore, since hydrogen has both of the factors that induce carriers, It can be said that the substance containing the oxide semiconductor layer is an element that prevents the oxide semiconductor layer from being highly purified and becoming closer to an I-type oxide semiconductor layer. This is a novel finding discovered by the present inventors through their research.

[0013] The substance containing a hydrogen element is, for example, hydrogen, moisture, hydroxide, hydride, or the like.

[0014] As a result of the inventors' research, it was surprisingly found that a large amount of nitrogen was present in the oxide semiconductor layer. It has been found that when hydrogen is contained in the oxide semiconductor layer, hydrogen easily enters the oxide semiconductor layer.

[0015] Conversely, an oxide semiconductor layer with a reduced nitrogen concentration is an oxide semiconductor layer into which hydrogen is less likely to penetrate. It can be said to be the body layer.

[0016] Specifically, secondary ion mass spectrometry (SIMS) The nitrogen concentration in the oxide semiconductor layer measured by s Spectrometry was 1×10 20 atoms / cm 3 Less than or equal to (or 1×10 20 atoms / cm 3 By making it less than Thus, an oxide semiconductor layer into which hydrogen is less likely to enter can be formed.

[0017] That is, a gate electrode, an oxide semiconductor layer having a channel formation region, and a gate insulating layer sandwiched between the oxide semiconductor layer and the channel formation region. The nitrogen concentration in is 1×10 20 atoms / cm 3 The present invention provides a semiconductor device that is It is possible.

[0018] Alternatively, a gate electrode, a gate insulating layer provided on the gate electrode, and the gate insulating layer an oxide semiconductor layer provided on the edge layer and having a channel formation region; and a pair of contact electrodes provided on the contact portion, the nitrogen concentration of the channel forming region being is 1 x 10 20 atoms / cm 3 It is possible to provide a semiconductor device as described below.

[0019] Alternatively, a gate electrode, a gate insulating layer provided on the gate electrode, and the gate insulating layer A pair of contact electrodes are provided on the edge layer, and the gate insulating layer and the pair of contact electrodes are provided on the edge layer. an oxide semiconductor layer provided on the contact electrode and having a channel formation region; The nitrogen concentration in the pore formation region is 1×10 20 atoms / cm 3 Semiconductor device Locations can be provided.

[0020] Alternatively, a gate electrode, a gate insulating layer provided on the gate electrode, and the gate insulating layer an oxide semiconductor layer provided on the edge layer and having a channel formation region; a channel protection layer provided on the oxide semiconductor layer and the channel protection layer; and a pair of contact electrodes formed on the channel forming region, the nitrogen concentration in the channel forming region being 1 ×10 20 atoms / cm 3 It is possible to provide a semiconductor device as described below.

[0021] Alternatively, in the semiconductor device, the hydrogen concentration in the channel formation region is 6×1 0 18 atoms / cm 3 It is possible to provide a semiconductor device as described below.

[0022] Alternatively, a gate electrode, an oxide semiconductor layer, and a gate electrode and an oxide semiconductor layer A method for manufacturing a semiconductor device having a gate insulating layer sandwiched therebetween, the method comprising the steps of: 10 20 atoms / cm 3 The oxide semiconductor layer is heated to 350° C. or higher for 1 hour or more. It is possible to provide a method for manufacturing a semiconductor device, which includes a step of performing heat treatment on the semiconductor device.

[0023] Alternatively, a gate electrode, an oxide semiconductor layer, and a gate electrode and an oxide semiconductor layer A method for manufacturing a semiconductor device having a gate insulating layer sandwiched therebetween, the method comprising the steps of: 10 20 atoms / cm 3 The oxide semiconductor layer is heated to 450° C. or higher for 1 hour or more. It is possible to provide a method for manufacturing a semiconductor device, which includes a step of performing heat treatment on the semiconductor device.

[0024] Alternatively, a gate electrode, an oxide semiconductor layer, and a gate electrode and an oxide semiconductor layer A method for manufacturing a semiconductor device having a gate insulating layer sandwiched therebetween, the method comprising the steps of: 10 20 atoms / cm 3 The oxide semiconductor layer is heated to 550° C. or higher for 1 hour or more. It is possible to provide a method for manufacturing a semiconductor device, which includes a step of performing heat treatment on the semiconductor device.

[0025] Alternatively, a gate electrode, an oxide semiconductor layer, and a gate electrode and an oxide semiconductor layer A method for manufacturing a semiconductor device having a gate insulating layer sandwiched therebetween, the method comprising the steps of: 10 20 atoms / cm 3 The oxide semiconductor layer is heated at 650° C. or higher for 3 minutes or longer. It is possible to provide a method for manufacturing a semiconductor device, which includes a step of performing heat treatment at a temperature of 100.degree. Effect of the Invention

[0026] By reducing the nitrogen concentration in the oxide semiconductor layer, it is possible to obtain an oxide semiconductor layer into which hydrogen is less likely to penetrate. A conductor layer can be formed.

[0027] In other words, by reducing the nitrogen concentration in the oxide semiconductor layer, hydrogen is absorbed into the oxide semiconductor layer. It is possible to prevent the particles from penetrating into the layer. [Brief description of the drawings]

[0028] [Figure 1] An example of a method for manufacturing a semiconductor device [Diagram 2] An example of a method for manufacturing a semiconductor device [Diagram 3] An example of a method for manufacturing a semiconductor device [Figure 4] An example of a semiconductor device [Diagram 5] An example of a method for manufacturing a semiconductor device [Figure 6] An example of a method for manufacturing a semiconductor device [Figure 7] An example of a method for manufacturing a semiconductor device [Figure 8] An example of a method for manufacturing a semiconductor device [Figure 9] An example of a sputtering device [Figure 10] SIMS data [Figure 11] SIMS data [Figure 12] SIMS data [Figure 13] SIMS data [Figure 14] TDS Data [Figure 15] An example of a semiconductor device [Figure 16] TEM images DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] The embodiments and examples will be described in detail with reference to the drawings.

[0030] However, the form and details of the invention may be modified in various ways without departing from the spirit of the invention. This will be readily understood by those skilled in the art.

[0031] Therefore, the scope of the present invention should be interpreted as being limited to the following description of the embodiments and examples. It is not something that can be achieved.

[0032] In the configurations described below, the same parts or parts having similar functions are referred to as the same parts. Reference numerals are used commonly among different drawings, and repeated explanations will be omitted.

[0033] In addition, the following embodiments and examples can be implemented in appropriate combination. Cut.

[0034] (Embodiment 1) An example of a method for manufacturing a semiconductor device will be described.

[0035] First, a gate electrode 200 is formed on a substrate 100 having an insulating surface. A gate insulating layer 300 is formed on the gate insulating layer 300, and an oxide semiconductor layer 400 is formed on the gate insulating layer 300. (Figure 1(A)).

[0036] The substrate may be made of any material, such as a glass substrate, a quartz substrate, a metal substrate, or a plastic substrate. A quartz substrate, a semiconductor substrate, etc. can be used, but are not limited to these.

[0037] When an insulating substrate is used as the substrate, it can be said to have an insulating surface.

[0038] On the other hand, when a metal substrate, a semiconductor substrate, or the like is used as the substrate, a base insulating layer is formed on the substrate. By this, an insulating surface can be formed.

[0039] When an insulating substrate is used as the substrate, a base insulating layer may be formed on the substrate. stomach.

[0040] The gate electrode can be made of any material that is conductive. For example, Aluminum, titanium, molybdenum, tungsten, gold, silver, copper, silicon, various alloys A conductive oxide layer (typically, indium tin oxide, etc.) can be used. The gate electrode may have a single layer structure or a multilayer structure.

[0041] The gate insulating layer can be made of any material that has insulating properties. For example, silicon oxide film, silicon nitride film, silicon oxide film containing nitrogen, silicon nitride film containing oxygen, aluminum nitride film, etc. A film made of aluminum, an aluminum oxide film, a hafnium oxide film, etc. can be used. The gate insulating layer may have a single layer structure or a multilayer structure.

[0042] However, in order to prevent carrier injection into the oxide semiconductor layer, the gate insulating layer is made of a material having a hydrogen content. It is preferable that the film has a low nitrogen content.

[0043] The gate insulating layer with low hydrogen content is formed by using hydrogen (H) or hydrides (e.g. It is preferable to form the film without containing any other metals (e.g., SiH4).

[0044] The gate insulating layer with a low nitrogen content is formed by using nitrogen (N) or a nitride (e.g. It is preferable to form the gas without containing any other gases (e.g., N2O, NH4, etc.).

[0045] Therefore, focusing on the fact that the hydrogen content is low, the plasma CVD method is a hydride Since a gate insulating film formed by sputtering is used (e.g., SiH4, etc.), a gate insulating film formed by sputtering is preferable. stomach.

[0046] In addition, when the nitrogen content is low, an oxide film that does not contain nitrogen is preferable. stomach.

[0047] However, the gate insulating layer formed by the plasma CVD method is different from the gate insulating layer formed by the sputtering method. It has fewer defects and has better film quality.

[0048] Therefore, the transistor characteristics are better when a gate insulating layer formed by plasma CVD is used. In some cases, the cost is high.

[0049] Therefore, plasma CVD, sputtering, or other methods can be used appropriately as needed. Good.

[0050] When a gate insulating layer formed by plasma CVD is used, hydrogen can be removed by heat treatment. Since substances containing elements are removed from the gate insulating layer, it is necessary to use the plasma CVD method. After the insulating layer is formed, heat treatment (200°C to 1000°C (preferably 300°C to 80°C) It is preferable to carry out the reaction at a temperature of 0° C. or lower.

[0051] The substance containing a hydrogen element is, for example, hydrogen, moisture, hydroxide, hydride, or the like.

[0052] The oxide semiconductor layer is, for example, an In-Ga-Zn-O oxide (indium, gallium, and zinc) Lead and oxygen are the main components), In-Sn-Zn-O oxide (indium, tin, zinc In-Al-Zn-O oxides (mainly composed of indium, aluminum and oxygen) Zinc and oxygen are the main components), Sn-Ga-Zn-O oxide (tin, gallium, zinc, Oxygen), Al-Ga-Zn-O oxide (aluminum, gallium and zinc The main components are lead and oxygen), Sn-Al-Zn-O oxide (tin, aluminum and zinc and oxygen), In-Zn-O oxide (mainly composed of indium, zinc, and oxygen Sn-Zn-O oxides (mainly tin, zinc, and oxygen), Al-Zn -O oxides (mainly composed of aluminum, zinc, and oxygen), In-O oxides (In Indium oxide (indium oxide), Sn-O oxide (tin oxide (tin oxide)), Zn- Oxide semiconductors such as O-based oxides (zinc oxide) can be used. Not limited to.

[0053] The oxide semiconductor layer can be formed by, for example, a sputtering method, a vapor deposition method, or the like.

[0054] The thickness of the oxide semiconductor layer is preferably 5 nm to 1 μm (preferably 20 to 80 nm).

[0055] When forming an oxide semiconductor layer, care must be taken to prevent nitrogen from being included in the oxide semiconductor layer. do.

[0056] Specifically, the nitrogen concentration of the oxide semiconductor layer during film formation was measured using secondary ion mass spectrometry (SIMS). Nitrogen measured by Secondary Ion Mass Spectrometry Concentration is 1×10 20 atoms / cm 3 Less than or equal to (or 1×10 20atoms / cm 3 Not yet Full), 5×10 19 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Not yet Full), 1×10 19 atoms / cm 3 Less than or equal to (or 1×10 19 atoms / cm 3 Not yet Full), 5×10 18 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Not yet 1000, or 1×10 18 atoms / cm 3 Less than or equal to (or 1×10 18 atoms / cm 3 (less than) is preferred.

[0057] Note that nitrogen is unlikely to enter the oxide semiconductor layer even when the oxide semiconductor layer is subjected to heat treatment. There is a direction.

[0058] Therefore, the nitrogen concentration in the oxide semiconductor layer after the semiconductor device is completed can also be determined by the secondary ion mass spectrometry. Analysis method (SIMS: Secondary Ion Mass Spectrometry) ) the nitrogen concentration measured is 1×10 20 atoms / cm 3 Less than or equal to (or 1×10 20 at oms / cm 3 less than 5×10 19 atoms / cm 3 Less than or equal to 5 x 10 19 at oms / cm 3 less than 1×10 19 atoms / cm 3 Less than or equal to (or 1×10 19 at oms / cm 3 less than 5×1018 atoms / cm 3 Less than or equal to 5 x 10 18 at oms / cm 3 Less than 1×10 18 atoms / cm 3 Below (or 1×1 0 18 atoms / cm 3 (less than) is preferred.

[0059] The nitrogen concentration was measured by secondary ion mass spectrometry (SIMS). The average value within the valid range of n Mass Spectrometry can be used.

[0060] The nitrogen concentration was measured by secondary ion mass spectrometry (SIMS). The maximum value within the valid range of n Mass Spectrometry can also be used. (If the maximum value in the valid range is less than the specified value, the average value in the valid range is also becomes smaller than the specified value.)

[0061] An example of a sputtering apparatus is shown in FIG.

[0062] The sputtering apparatus in FIG. 9 includes a film-forming chamber 2001, a cover 2002, a target 2003, and a pump 2004. 004.

[0063] A substrate is placed on the cover 2002, and a film is formed by sputtering the target 2003. The system is structured to:

[0064] The film-forming chamber 2001 and the lid 2002 are connected to each other, and an O-ring 2005 is provided at the connection. It is being done.

[0065] The deposition chamber 2001 and the target 2003 are connected to each other, and an O-ring 200 is provided at the connection. 6 is provided.

[0066] The deposition chamber 2001 and the pump 2004 are connected to each other, and a metal gasket 2 007 and a metal gasket 2008 are provided.

[0067] Both the O-ring and the metal gasket are components that prevent leaks at the connection parts. Therefore, the O-ring and metal gasket prevent air (especially nitrogen) from entering the deposition chamber 2001. This prevents the problem from occurring.

[0068] An O-ring is an annular packing made of a material such as rubber.

[0069] The metal gasket is an annular stationary seal material made of, for example, metal.

[0070] The lid 2002 and the target 2003 are frequently opened and closed, so they use O-rings that are easy to attach and detach. It is.

[0071] On the other hand, the pump is difficult to attach and detach because it is opened and closed very rarely, but it is easier to attach and detach than the O-ring. A metal gasket is provided to improve sealing.

[0072] Therefore, if the O-ring or metal gasket has scratches or cracks, leakage will occur. Therefore, the air outside the film forming chamber 2001 enters the film forming chamber 2001 .

[0073] Since the atmosphere contains a large amount of nitrogen, there should be no scratches or cracks on the O-ring or metal gasket. Always be careful not to allow the atmosphere (especially nitrogen) to form a film due to the O-ring or metal gasket. It is necessary to prevent intrusion into room 2001.

[0074] In addition, although it requires more maintenance, all O-rings are replaced with highly airtight metal gaskets. In order to prevent the air (especially nitrogen) from entering the deposition chamber 2001, the air is replaced with So it is valid.

[0075] On the other hand, even if the air (especially nitrogen) is prevented from entering the deposition chamber 2001, When nitrogen is attached to or has infiltrated into the inner wall of 2001 or the surface of the target 2003, or When nitrogen is floating in the deposition chamber 2001, the nitrogen is mixed into the oxide semiconductor layer. There are cases where this happens.

[0076] Therefore, in order to remove the nitrogen adhering to or penetrating the inner wall of the deposition chamber, the deposition chamber was heated to 200°C. Heat to a temperature of 500°C or higher.

[0077] When the deposition chamber is heated, nitrogen that has adhered to or penetrated into the inner wall of the deposition chamber is released into the deposition chamber. can be.

[0078] The nitrogen released by heating the film-forming chamber is exhausted using a pump 2004. In this way, nitrogen adhering to or penetrating the inner wall of the film formation chamber can be removed.

[0079] Furthermore, after the heating and exhausting processes in the film formation chamber, It is preferable to perform a process of forming an oxide semiconductor layer on the dummy substrate before forming the oxide semiconductor layer. It is nice.

[0080] When a process for forming an oxide semiconductor layer on a dummy substrate is performed, the oxide semiconductor adheres to or penetrates into the target surface. This can remove the nitrogen that is present in the air.

[0081] In addition, nitrogen remaining in the deposition chamber due to the process of depositing an oxide semiconductor layer on a dummy substrate is Since the oxide semiconductor layer on the dummy substrate is taken in, the oxide semiconductor layer used in the semiconductor device This means that the nitrogen remaining in the deposition chamber can be removed before the deposition.

[0082] Thereafter, the dummy substrate is removed, and an oxide semiconductor layer to be used in a semiconductor device is formed.

[0083] It is to be noted that it is more effective to perform film formation on the dummy substrate multiple times.

[0084] As described above, the leakage from the deposition chamber, the nitrogen on the inner wall of the deposition chamber, and the deposition on the dummy substrate were reduced. By sufficiently performing a film or the like, it is possible to thoroughly prevent nitrogen from being mixed into the oxide semiconductor layer. It is possible.

[0085] Next, the oxide semiconductor layer 400 is etched into islands by photolithography. Then, a compound semiconductor layer 410 is formed (FIG. 1(B)).

[0086] Next, a first heat treatment (at least X° C. and less than Y° C.) is performed on the oxide semiconductor layer.

[0087] The atmosphere of the first heat treatment may be a nitrogen atmosphere, a rare gas atmosphere, an oxygen atmosphere, or an atmosphere containing oxygen and nitrogen. atmosphere containing oxygen and rare gas, atmosphere containing nitrogen and rare gas, atmosphere containing oxygen, nitrogen and rare gas The atmosphere can be appropriately selected from among the above.

[0088] In the first heat treatment, the oxide semiconductor layer 400 is etched into an island shape to form the oxide semiconductor layer 410. This may be carried out before forming the

[0089] On the other hand, the oxide semiconductor layer 400 is etched into islands by photolithography. In the process of forming the oxide semiconductor layer 410, the oxide semiconductor layer is removed by the photoresist and the water of the remover. exposed to minutes.

[0090] Therefore, in order to remove moisture caused by the photoresist and the stripping solution, The oxide semiconductor layer 410 is formed by etching the oxide layer 400 into an island shape, and then a first heat treatment is performed. It can be said that it is preferable to carry out the above.

[0091] The lower limit of the first heat treatment (X°C) is 350°C or more (or more than 350°C) and 400°C or less. above (or over 400℃), 450℃ or above (or over 450℃), 500℃ or above (or over 50 0℃ or higher), 550℃ or higher (or higher than 550℃), 600℃ or higher (or higher than 600℃), 650℃ or higher (or over 650℃), 700℃ or higher (or over 700℃), 750℃ or higher (or over 750℃).

[0092] The first heat treatment is preferably performed using a heating method using a furnace, an oven, gas RTA, or the like. It is.

[0093] Gas RTA involves placing the object to be treated in a gas heated to a high temperature for a short period of time (several minutes to several tens of minutes). This refers to a method of rapidly heating the workpiece by using a

[0094] Since a higher temperature is preferable for the first heat treatment, there is no need to set an upper limit.

[0095] However, the upper limit (Y° C.) of the first heat treatment is lower than the heat resistance temperature of the substrate. preferable.

[0096] In addition, the upper limit (Y°C) of the first heat treatment is set to 1000°C or less (or less than 1000°C). 900℃ or less (or less than 900℃), 800℃ or less (or less than 800℃), 700℃ or less (or less than 700°C).

[0097] The time for the first heat treatment is preferably 1 hour or more. The upper limit is not particularly limited, but the treatment time is From the perspective of reduction, you can choose from 10 hours or less, 9 hours or less, or 8 hours or less.

[0098] When the first heat treatment is performed by gas RTA, the time for the first heat treatment is preferably 3 minutes or more. There is no particular upper limit. However, from the perspective of reducing processing time, you can choose from 1 hour or less, 50 minutes or less, or 40 minutes or less. can be done.

[0099] In addition, the thermal desorption spectrometry (TDS) When the samples were measured by CT, the samples baked at 450℃ for 1 hour showed The moisture peak around 300℃ had disappeared. Bake at 650℃ for 3 minutes with gas RTA. The moisture peak around 300℃ disappeared in the sample. The sample that was baked between 100°C and 200°C still had a moisture peak near 300°C.

[0100] In addition, secondary ion mass spectrometry (SIMS) When the sample was baked at 550°C for 1 hour, the The hydrogen concentration in the sample was reduced by nearly one order of magnitude compared to the sample baked at 450°C for 1 hour. was doing.

[0101] That is, the first heat treatment under predetermined conditions is performed on the oxide semiconductor layer in which the nitrogen concentration is reduced. This dramatically reduces the amount of hydrogen-containing substances that adversely affect the electrical characteristics of transistors. We found that this is possible.

[0102] The more energy is applied to the oxide semiconductor, the more hydrogen-containing substances are released. Therefore, a higher heating temperature and a longer heating time are preferred.

[0103] The hydrogen concentration in the oxide semiconductor layer after the first heat treatment was 6×10 18 atoms / cm 3 Below Down (or 6×10 18 atoms / cm 3 less than 5×10 18 atoms / cm 3 Below Down (or 5×10 18 atoms / cm 3 less than 4×10 18 atoms / cm 3 Below Down (or 4×10 18 atoms / cm 3 less than 3×10 18 atoms / cm 3 Below Down (or 3×10 18 atoms / cm 3 less than 1×10 16 atoms / cm 3 Below Down (or 1×10 16 atoms / cm 3 less than 1×10 14 atoms / cm 3 Below Down (or 1×10 14 atoms / cm 3 Less than 1×10 12 atoms / cm 3 Less than or equal to (or 1×10 12 atoms / cm 3 (less than) is preferred.

[0104] Note that the oxide semiconductor layer with reduced nitrogen concentration is treated with water in the steps following the first heat treatment. It has the property of preventing the intrusion of elements.

[0105] Therefore, the hydrogen concentration in the oxide semiconductor layer after the semiconductor device is completed is also 6×10 18ato ms / cm 3 Less than or equal to 6 x 10 18 atoms / cm 3 less than 5×10 18 ato ms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 less than 4×10 18 ato ms / cm 3 Less than or equal to 4 x 10 18 atoms / cm 3 less than 3×10 18 ato ms / cm 3 Less than or equal to 3 x 10 18 atoms / cm 3 less than 1×10 16 ato ms / cm 3 Less than or equal to (or 1×10 16 atoms / cm 3 less than 1×10 14 ato ms / cm 3 Less than or equal to (or 1×10 14 atoms / cm 3 Less than 1×10 12 atoms / cm 3 Less than or equal to (or 1×10 12 atoms / cm 3 Less than 100% is preferable. .

[0106] The hydrogen concentration was measured using secondary ion mass spectrometry (SIMS). The average value within the valid range of n Mass Spectrometry can be used.

[0107] The hydrogen concentration was measured by secondary ion mass spectrometry (SIMS). The maximum value within the valid range of n Mass Spectrometry can also be used. (If the maximum value in the valid range is less than the specified value, the average value in the valid range is also becomes smaller than the specified value.)

[0108] Note that the smaller the amount of a substance containing a hydrogen element contained in the oxide semiconductor layer, the greater the The electrical characteristics of a transistor using the insulating layer are improved.

[0109] Next, a conductive layer 500 is formed over the oxide semiconductor layer 410 (FIG. 1C).

[0110] The conductive layer can be made of any material that is conductive. Minium, titanium, molybdenum, tungsten, yttrium, indium, gold, silver, copper , silicon, various alloys containing these metals, oxide conductive layers (typically indium tin oxide) The conductive layer may have a single layer structure or a multilayer structure. The structure is also good.

[0111] Note that the conductive layer in contact with the oxide semiconductor layer may be formed using titanium, indium, yttrium, or indium. By using an alloy of aluminum and zinc, a gallium alloy (gallium nitride, etc.), etc., the conductive layer can be made of The contact resistance between the electrode (wiring) formed by etching and the oxide semiconductor layer can be reduced. Cut.

[0112] The reason why the contact resistance can be reduced is that titanium, indium, yttrium, and indium The electron affinity of gallium-zinc alloys, gallium alloys (gallium nitride, etc.), etc. is higher than that of oxide semiconductors. This is because the electron affinity of the layer is lower than that of the layer.

[0113] In other words, in the case of a single layer, a metal (or alloy, compound) having a lower electron affinity than the oxide semiconductor layer is used. (material) is preferred.

[0114] On the other hand, in the case of stacking, the metal (or alloy, compound) with a lower electron affinity than the oxide semiconductor layer is ) is preferably disposed in contact with the oxide semiconductor layer.

[0115] Titanium (Ti), indium (In), yttrium (Y), indium (In) and nickel Alloys with lead (Zn) and gallium (Ga) alloys (such as gallium nitride) have high resistivity, Aluminum (Al), gold (Au), silver (Ag), copper (Cu), and various other metals A material with low resistivity, such as an alloy, is stacked on a conductive layer arranged in contact with the oxide semiconductor layer. It is preferable to do so.

[0116] Specifically, the structure in which Ti and Al are laminated in sequence, the structure in which Ti and Al alloy are laminated in sequence, and the structure in which Y , Al sequentially laminated structure, Y, Al alloy sequentially laminated structure, Ti, Al, Ti sequentially laminated structure Layered structure, Ti, Al alloy, Ti layered in sequence, In, Al, Mo layered in sequence a structure in which Y, Al, and Ti are layered in sequence; a structure in which Mo, Al, and Ti are layered in sequence; There are many variations, such as a structure in which Ti, Al alloy, Mo, and Ti are laminated in sequence. However, the present invention is not limited to the above.

[0117] In addition, alloys with low resistivity include alloys of aluminum, gold, silver, copper, etc., and other substances. It means money. (For example, Al-Si, Al-Ti, Al-Nd, Cu-Pb-Fe, Cu- Ni etc.)

[0118] Note that as a material for the oxide conductive layer, a material similar to that for the oxide semiconductor layer can be used.

[0119] The oxide conductive layer should have a lower resistivity than the oxide semiconductor layer used for the channel formation region. .

[0120] Here, the oxide conductive layer is a layer that intentionally contains a substance containing a hydrogen element or a substance that intentionally contains a large amount of oxygen vacancies. Oxides. Hydrogen-containing materials and oxygen vacancies induce carriers, so the conductivity of oxides It can increase sexuality.

[0121] In addition, the oxide semiconductor layer may intentionally contain a substance containing a hydrogen element or oxygen vacancies. It is an oxide that does not exist.

[0122] That is, the amount of a substance containing a hydrogen element in the oxide semiconductor layer is adjusted or oxygen vacancies are adjusted. It is possible to adjust the resistivity more precisely.

[0123] Note that the materials of the oxide conductive layer and the oxide semiconductor layer used for the channel formation region are different from each other. Therefore, the oxide conductive layer has a lower resistivity than the oxide semiconductor layer used for the channel formation region. If the amount of oxygen vacancy in the oxide semiconductor layer is large, the amount of the substance containing a hydrogen element in the oxide semiconductor layer may be adjusted. There is no need to adjust the resistivity by adjusting the

[0124] Next, the conductive layer 500 is etched to form a plurality of electrodes or a plurality of wirings (source electrodes (contacts) Then, a gate electrode (contact electrode), a drain electrode (contact electrode), wiring, etc. are formed (Figure 2(A)). FIG. 2A illustrates a contact electrode 510, a contact electrode 520, and the like.

[0125] A transistor is completed through the process shown in FIG. 2(A) (channel etch type transistor).

[0126] In addition, the portion indicated by the dashed line 8000 in FIG. 2 is slightly etched when the conductive layer 500 is etched. do.

[0127] The area indicated by the dashed line 8000 is the back channel area because it is located behind the channel formation area. It is called.

[0128] Next, an insulating layer 600 (protective film, interlayer insulating film) is formed to cover the transistor (FIG. 2(B) )).

[0129] The insulating layer can be made of any material that has insulating properties. Silicon film, silicon nitride film, silicon oxide film containing nitrogen, silicon nitride film containing oxygen, aluminum nitride Films, aluminum oxide films, siloxane films, acrylic films, polyimide films, etc. can be used. The interlayer insulating film may have a single layer structure or a multilayer structure.

[0130] Here, we compared the electrical characteristics of transistors with different types of insulating layers. The insulating layer in contact with the panel (dotted line 8000) contains hydrogen as a sputtering gas. It was found that the film formed without using any substance was good.

[0131] When the back channel contains a substance containing hydrogen, the threshold voltage (Vth ) shifts to the negative side.

[0132] Therefore, in the plasma CVD method, gas containing hydrogen (typically SiH4, etc.) is used. Therefore, when an insulating layer is formed by the plasma CVD method, a substance containing hydrogen elements is formed in the back channel. is added.

[0133] In addition, siloxane, acrylic, and polyimide films contain a large amount of moisture, This results in a state in which a substance containing hydrogen elements is constantly supplied to the back channel.

[0134] Therefore, the insulating layer in contact with the back channel is made of a film with a low content of substances containing hydrogen elements. It can be said that it is preferable to have

[0135] In the step of FIG. 2(B), the contact electrodes 510, 520, and the backplane are This can also be said to be a step of forming an insulating layer 600 on the insulating channel (portion of the dashed line 8000).

[0136] After the step of FIG. 2B, a contact hole is formed in the insulating layer 600. A wiring 810, a wiring 820, and the like may be formed (FIG. 3(A)).

[0137] After the step of FIG. 2B, a contact hole is formed in the insulating layer 600. A pixel electrode 910 may be formed (FIG. 3(B)).

[0138] As shown in FIG. 3A, after forming wiring on an insulating layer 600, an insulating layer, wiring, A transistor, a display element, an antenna, or the like may be formed.

[0139] After forming the pixel electrode 910 as shown in FIG. 3B, a display element (EL element, liquid crystal element, etc.) By forming the above, a display device can be formed.

[0140] In addition, it is preferable to carry out a second heat treatment after the step of FIG. 3(A) or the step of FIG. 3(B). It is.

[0141] A second heating treatment is performed between the step of FIG. 2(B) and the step of FIG. 3(A) or the step of FIG. 3(B). It is also acceptable to carry out the theory.

[0142] In other words, the second heat treatment may be performed at any time after the insulating layer 600 is formed.

[0143] The heating temperature of the second heat treatment is 150° C. or higher and 500° C. or lower (preferably 200° C. or higher and 30° C. or lower). 0°C or lower) is preferred.

[0144] The heating time of the second heat treatment is preferably from 1 hour to 10 hours.

[0145] The second heat treatment is preferably performed using a furnace, an oven, gas RTA, or the like.

[0146] By the way, hydrogen is released from the oxide semiconductor layer by the first heat treatment. In addition, oxygen in the oxide semiconductor layer is also released.

[0147] That is, oxygen vacancies are formed in the oxide semiconductor layer by the first heat treatment.

[0148] Therefore, when the second heat treatment is performed, the insulating layer is kept in an oxygen-excess state. Since oxygen can be supplied to the oxide semiconductor layer, oxygen vacancies in the oxide semiconductor layer can be reduced. It can be reduced.

[0149] The method for forming an oxygen-rich insulating layer is, for example, to use a non-oxide target as a sputtering target. Reactive sputtering using oxygen as the sputtering gas. In the case of performing the above, a method of increasing the oxygen flow rate and a method of using an oxide target as a sputtering target are used. A method using a silicon oxide, aluminum oxide, etc., and oxygen as a sputtering gas ( When an oxide target is used, oxygen is not usually used as the sputtering gas. After the formation of the insulating layer, oxygen may be ion-implanted or ion-doped into the insulating layer. However, the present invention is not limited to these. (When performing reactive sputtering, gas such as argon is used.) It is preferable to use a sputtering gas containing 100% oxygen.

[0150] That is, a method of using oxygen as a deposition gas when forming an insulating layer, a method of adding oxygen to an insulating layer afterwards, Of course, oxygen may be used as a deposition gas when forming the insulating layer, and the insulating layer may be formed by a method such as the above. Oxygen may be added later.

[0151] When titanium is used as the contact electrode, after forming the insulating layer 600, By performing heat treatment, titanium oxide is formed between the oxide semiconductor layer and titanium. It is possible.

[0152] By forming titanium oxide, the contact between the oxide semiconductor layer and titanium is formed. The tact resistance can be reduced.

[0153] If titanium oxide is present between the oxide semiconductor layer and titanium, the oxide semiconductor layer and titanium Since the contact resistance between the contact electrode and the contact terminal can be reduced, Alternatively, a structure in which titanium oxide and titanium are laminated in this order may be formed.

[0154] In this case, the titanium oxide can be formed by a sputtering method, a vapor deposition method, or the like.

[0155] A part or all of the contents of this embodiment may be combined with all other embodiments and examples. This can be implemented.

[0156] (Embodiment 2) In this embodiment, a semiconductor device having a transistor with a structure different from that in the first embodiment will be described. He explains.

[0157] The materials of each layer are the same as those in the first embodiment.

[0158] The transistor in Figure 4(A) is a bottom-gate bottom-contact type (BGBC) transistor. A gate electrode 200 is provided on a substrate 100 having an edge surface, and a semiconductor device is provided on the gate electrode 200. A gate insulating layer 300 and a contact electrode 51 provided on the gate insulating layer 300. 0 and the contact electrode 520, and on the gate insulating layer 300 and the contact electrode 510 and A transistor having an oxide semiconductor layer (island-shaped) provided on a contact electrode (520). It's Jista.

[0159] An insulating layer 600 is provided to cover the transistor.

[0160] Moreover, the portion indicated by the dashed line 8000 is the back channel.

[0161] The transistor in FIG. 4B is a top-gate transistor having an insulating surface. An oxide semiconductor layer 410 (island-shaped) is provided on the substrate 100. A gate insulating layer 300 is provided, and a gate electrode 200 is provided on the gate insulating layer 300. and

[0162] An insulating layer 600 is provided to cover the transistor. A wiring 810, a wiring 820, and a wiring 830 are provided via contact holes.

[0163] The transistor in FIG. 4(C) is a channel-stop type transistor having an insulating surface. A gate electrode 200 is provided on a substrate 100, and a gate electrode 210 is provided on the gate electrode 200. A gate insulating layer 300 and an oxide semiconductor layer 410 (island-shaped) provided on the gate insulating layer 300. A channel protection layer 700 provided on the oxide semiconductor layer 410, and a The contact electrode 510 and the contact electrode 520 are provided on the channel protection layer 700. 520 and a transistor having

[0164] An insulating layer 600 is provided to cover the transistor.

[0165] Moreover, the portion indicated by the dashed line 8000 is the back channel.

[0166] Here, the material of the channel protection layer 700 is the same as the material of the insulating layer 600 described in the first embodiment. The channel protection layer 700 and the insulating layer 600 can be made of the same material. But it's okay if they are different.

[0167] In a channel-stop transistor, the part in contact with the back channel is insulating. It is the channel protection layer 700 rather than the edge layer 600 .

[0168] Therefore, it is preferable to use a film containing a small amount of hydrogen-containing material for the channel protection layer 700. is preferred.

[0169] The transistor in FIG. 15(A) is a top-gate type transistor (TGBC), The contact electrodes 510 and 520 are provided on the insulating base layer 900. An oxide film is provided on the insulating layer 900, the contact electrode 510, and the contact electrode 520. A gate insulating layer 30 is provided on the oxide semiconductor layer 410. 0 and a gate electrode 200 provided on a gate insulating layer 300. do.

[0170] The base insulating layer 900 is provided on a substrate 100 .

[0171] Also provided is an insulating layer 600 covering the transistor.

[0172] Moreover, the portion indicated by the dashed line 8000 is the back channel.

[0173] Here, the material of the base insulating layer 900 is the same as the material of the insulating layer 600 described in the first embodiment. The materials of the base insulating layer 900 and the insulating layer 600 may be the same or different. It's okay to have it.

[0174] In the top-gate transistor, the part in contact with the back channel is an insulating layer. It is the underlying insulating layer 900 rather than 600 .

[0175] Therefore, the base insulating layer 900 can be formed using a film containing a small amount of a substance containing a hydrogen element. preferable.

[0176] In addition, the base insulating layer 900 is formed by an oxygen permeation treatment using a method similar to that described in the first embodiment. In this case, when the first heat treatment is performed, the oxide semiconductor layer is preferably formed as an insulating layer. At the same time that oxygen is released, oxygen is supplied from the base insulating layer to the oxide semiconductor layer. do.

[0177] The transistor in FIG. 15(B) is a top-gate transistor (TGTC). The oxide semiconductor layer 410 (island-shaped) provided on the insulating layer 900, and the oxide semiconductor layer 410 Contact electrodes 510 and 520 provided on the upper and lower insulating layers 900 and a contact electrode 510 and a contact electrode 520 are provided on the oxide semiconductor layer. The gate insulating layer 300 is formed on the insulating layer 300, and the gate electrode 200 is formed on the insulating layer 300. It is a transistor that

[0178] The base insulating layer 900 is provided on a substrate 100 .

[0179] Also provided is an insulating layer 600 covering the transistor.

[0180] Moreover, the portion indicated by the dashed line 8000 is the back channel.

[0181] Here, the material of the base insulating layer 900 is the same as the material of the insulating layer 600 described in the first embodiment. The materials of the base insulating layer 900 and the insulating layer 600 may be the same or different. It's okay to have it.

[0182] In the top-gate transistor, the part in contact with the back channel is an insulating layer. It is the underlying insulating layer 900 rather than 600 .

[0183] Therefore, the base insulating layer 900 can be formed using a film containing a small amount of a substance containing a hydrogen element. preferable.

[0184] In the transistor in FIG. 4B, the channel formation region (the gate electrode and the oxide semiconductor between the contact region (where the wiring and the oxide semiconductor are in contact) and the An offset region of several μm is formed.

[0185] The offset region has the advantage of lowering the off-state current of the transistor. However, it has the disadvantage that it also reduces the on-state current of the transistor.

[0186] On the other hand, in Fig. 15(A) and Fig. 15(B), there is an offset region like Fig. 4(B). Therefore, the on-state current of the transistor can be improved compared to FIG. 4(B). There are benefits to this.

[0187] As described above, the transistor may have any structure.

[0188] That is, a transistor includes at least a gate electrode, an oxide semiconductor layer, and the gate Any structure having a gate insulating layer sandwiched between the electrode and the oxide semiconductor layer can be used. A structure may also be used.

[0189] Also, a first gate electrode, a first gate insulating layer on the first gate electrode, and a first gate insulating layer on the first gate electrode. an oxide semiconductor layer on the gate insulating layer; a second gate insulating layer on the oxide semiconductor layer; and a second gate electrode on the first insulating layer. stomach.

[0190] Therefore, the structure of the transistor is the same as that of the first and second embodiments. It should be noted that this is not limiting.

[0191] A part or all of the contents of this embodiment may be combined with all other embodiments and examples. This can be implemented.

[0192] (Embodiment 3) An example of a method for manufacturing the semiconductor device shown in FIG.

[0193] The materials, heat treatment conditions, etc. are the same as those in the other embodiments.

[0194] A gate electrode 200 is formed on a substrate 100 having an insulating surface, and a gate electrode 200 is formed on the gate electrode 200. A gate insulating layer 300 is formed, and a contact electrode 510 and a contact A base electrode 520 is formed (FIG. 5(A)).

[0195] Next, on the gate insulating layer 300, the contact electrode 510, and the contact electrode 520 An oxide semiconductor layer 400 is formed on the insulating layer 402 (FIG. 5B).

[0196] Next, the oxide semiconductor layer is subjected to first heat treatment.

[0197] The conditions for the first heat treatment are the same as those in the first embodiment.

[0198] In the first heat treatment, the oxide semiconductor layer 400 is etched into an island shape to form the oxide semiconductor layer 410. This may be performed after forming

[0199] However, after the oxide semiconductor layer 410 is formed by etching into an island shape, The contact electrodes are exposed.

[0200] If the first heat treatment is performed while the contact electrode is exposed, the surface of the contact electrode is oxidized. This reduces the surface conductivity.

[0201] Therefore, the first heat treatment is performed in a state where the contact electrode is covered with the oxide semiconductor layer 400. It is preferable to do so.

[0202] Next, the oxide semiconductor layer 400 is etched into an island shape to form an oxide semiconductor layer 410. An insulating layer 600 is formed to cover the transistor (FIG. 5(C)).

[0203] The portion indicated by the dashed line 8000 is the back channel.

[0204] After the step of FIG. 5C, a contact hole is formed in the insulating layer 600, and a A wiring 810, a wiring 820, and the like may be formed (FIG. 6(A)).

[0205] After the step of FIG. 5C, a contact hole is formed in the insulating layer 600, and a A pixel electrode 910 may be formed (FIG. 6(B)).

[0206] As shown in FIG. 6A, after forming wiring on an insulating layer 600, an insulating layer, wiring, A transistor, a display element, an antenna, or the like may be formed.

[0207] After forming the pixel electrode 910 as shown in FIG. 6B, a display element (EL element, liquid crystal element, etc.) By forming the above, a display device can be formed.

[0208] In addition, it is preferable to carry out a second heat treatment after the step of FIG. 6(A) or the step of FIG. 6(B). It is nice.

[0209] In addition, between the step of FIG. 5(C) and the step of FIG. 6(A) or the step of FIG. 6(B), A heat treatment may be carried out.

[0210] The conditions for the second heat treatment are the same as those in the first embodiment.

[0211] A part or all of the contents of this embodiment may be combined with all other embodiments and examples. This can be implemented.

[0212] (Embodiment 4) An example of a method for manufacturing the semiconductor device shown in FIG.

[0213] The materials, heat treatment conditions, etc. are the same as those in the other embodiments.

[0214] First, the structure of FIG. 1(B) is formed in the same manner as in the first embodiment.

[0215] As in the first embodiment, the first heat treatment is also performed.

[0216] Next, a channel protection layer 700 (island-shaped) is formed, and a conductive layer 500 covering the channel protection layer is formed. (Figure 7(A)).

[0217] Next, the conductive layer 500 is etched to form the contact electrodes 510 and 520. (Figure 7(B)).

[0218] The portion indicated by the dashed line 8000 is the back channel.

[0219] In addition, the presence of the channel protection layer 700 prevents the backfill from being damaged during the formation of the contact electrode. Damage to the back channel can be reduced because the back channel is not etched. do.

[0220] Here, the material of the channel protection layer 700 is the same as the material of the insulating layer 600 described in the first embodiment. The channel protection layer 700 and the insulating layer 600 can be made of the same material. But it's okay if they are different.

[0221] In a channel-stop transistor, the part in contact with the back channel is insulating. It is the channel protection layer 700 rather than the edge layer 600 .

[0222] Therefore, the channel protection layer 700 should be made of a film having a low content of substances containing hydrogen elements. is preferred.

[0223] In addition, the channel protection layer 700 is formed by the same method as that described in the first embodiment. It is preferable to use an insulating layer having a large amount of silicon.

[0224] Next, an insulating layer 600 is formed to cover the transistor (FIG. 7(C)).

[0225] After the step of FIG. 7C, a contact hole is formed in the insulating layer 600, and A wiring 810, a wiring 820, and the like may be formed (FIG. 8(A)).

[0226] After the step of FIG. 7C, a contact hole is formed in the insulating layer 600, and A pixel electrode 910 may be formed (FIG. 8(B)).

[0227] As shown in FIG. 8(A), after forming wiring on an insulating layer 600, an insulating layer, wiring, A transistor, a display element, an antenna, or the like may be formed.

[0228] After forming the pixel electrode 910 as shown in FIG. 8B, a display element (EL element, liquid crystal element, etc.) A display device can be formed by forming the above.

[0229] In addition, it is preferable to carry out a second heat treatment after the step of FIG. 8(A) or the step of FIG. 8(B). It is nice.

[0230] In addition, between the step of FIG. 7(C) and the step of FIG. 8(A) or the step of FIG. 8(B), A heat treatment may be carried out.

[0231] The conditions for the second heat treatment are the same as those in the first embodiment.

[0232] A part or all of the contents of this embodiment may be combined with all other embodiments and examples. This can be implemented.

[0233] (Embodiment 5) Semiconductor devices include various types of integrated circuits.

[0234] For example, display devices (liquid crystal display devices, electroluminescence display devices (light-emitting devices), etc. ), semiconductor devices that perform wireless communication via antennas (RFID tags, wireless tags, IC chips , wireless chips, non-contact signal processing devices, semiconductor integrated circuit chips), etc., but are not limited to these Not done.

[0235] A part or all of the contents of this embodiment may be combined with all other embodiments and examples. This can be implemented. EXAMPLES

[0236] The effect of the nitrogen concentration in the oxide semiconductor was investigated.

[0237] First, an oxide semiconductor layer was formed over a glass substrate.

[0238] The case where the heat treatment was not performed after the oxide semiconductor layer was formed and the case where the oxide semiconductor layer was formed were The results were compared with those in which heat treatment was subsequently performed.

[0239] The comparison method is secondary ion mass spectrometry (SIMS). Spectrometry was used.

[0240] The heat treatment was carried out at 350° C. for 1 hour.

[0241] The heating atmosphere was air or nitrogen.

[0242] Here, the oxide semiconductor layer is In:Ga:Zn in an atomic ratio of 1:1:0.5 (InO 3: Sputtering an oxide semiconductor target with Ga2O3:ZnO (1:1:1 (molar ratio)) And it was formed.

[0243] Note that before the oxide semiconductor layer is formed, leakage from a deposition chamber and nitrogen on an inner wall of the deposition chamber are reduced. Then, the deposition on the dummy substrate is sufficiently performed to thoroughly prevent nitrogen from being mixed into the oxide semiconductor layer. Removed.

[0244] (Sample 1) The sample was subjected to sputtering with a flow rate of Ar / N2=40 / 0sccm (N2 ratio 0%). The sample was named Sample 1. Three samples of Sample 1 were prepared.

[0245] The SIMS measurement results of Sample 1 are shown in FIG.

[0246] (Sample 2) The sputtering gas flow rate was Ar / N2=35 / 5sccm (N2 ratio 12.5%). This was designated as Sample 2. Three pieces of Sample 2 were prepared.

[0247] The SIMS measurement results of Sample 2 are shown in FIG.

[0248] (Sample 3) Sample with sputtering gas flow rate of Ar / N2=0 / 40sccm (N2 ratio 100%) This was designated as Sample 3. Three samples of Sample 3 were prepared.

[0249] The SIMS measurement results of Sample 3 are shown in FIG.

[0250] (Consideration) In FIG. 10 to FIG. 12, the dotted line 3001 indicates a sample that has not been subjected to heat treatment (as-d epo), thick solid line 3002 is a sample heated in a nitrogen atmosphere (N2 bake), thin solid line 3003 indicates a sample heated in air (air bake).

[0251] 10 to 12, (A) indicates the hydrogen concentration, and (B) indicates the nitrogen concentration.

[0252] 10 to 12, the vertical axis represents the concentration, and the horizontal axis represents the depth from the surface of the oxide semiconductor layer ( (film thickness).

[0253] It should be noted that secondary ion mass spectrometry (SIMS) measurement results have a valid range.

[0254] In this embodiment, the surface area of ​​the oxide semiconductor layer (depth 0n in FIGS. 10 to 12) 10 to 12) and near the interface between the oxide semiconductor layer and the glass substrate. It is difficult to calculate accurate values ​​for depths of around 80 nm to 100 nm.

[0255] Therefore, in this embodiment, the SIMS measurement results are in the range of 30 nm to 80 nm in depth. The valid range of the results was as follows.

[0256] Here, the dotted line 3001 (as-depo) in FIG. 10(A) and the dotted line 300 1 (as-depo), and the effective range of the dotted line 3001 (as-depo) in FIG. 12(A) When comparing the average hydrogen concentration in Fig. 11(A), it is higher than that in Fig. 10(A). It can be seen that FIG. 12(A) is higher than FIG. 11(A).

[0257] Furthermore, the dotted line 3001 (as-depo) in FIG. 10B and the dotted line 300 in FIG. 1 (as-depo), and the effective range of the dotted line 3001 (as-depo) in FIG. 12(B) When comparing the average nitrogen concentration in Fig. 11(B), it is higher than that in Fig. 10(B). It can be seen that FIG. 12(B) is higher than FIG. 11(B).

[0258] In other words, under the as-depo condition, the higher the nitrogen concentration in the oxide semiconductor layer, the greater the oxidation It can be seen that the hydrogen concentration in the semiconductor layer increases.

[0259] Therefore, the higher the nitrogen concentration in the oxide semiconductor layer, the more hydrogen is mixed into the oxide semiconductor layer. I found it to be easier to do.

[0260] In addition, referring to FIG. 10A, the hydrogen concentration is reduced by performing the heat treatment. It can be seen that.

[0261] On the other hand, referring to FIG. 11(A) and FIG. 12(A), the hydrogen concentration is increased by the heat treatment. It can be seen that is increasing.

[0262] In FIG. 12A, the dotted line 3001 (as-d epo), thick solid line 3002 (N2 bake), thin solid line 3003 (air bake) There isn't much difference in degree.

[0263] However, the average hydrogen concentration in the effective range of 30 nm to 80 nm is shown by the thick solid line. The dotted line 3001 (a) and the thin solid line 3003 (air bake) are s-depo).

[0264] Therefore, when comparing the total amount of hydrogen in the oxide semiconductor layer, the thick solid line 3002 (N2 base The thin solid line 3003 (air baked) is better than the dotted line 3001 (as-depo). It is clear that there are many more.

[0265] In FIG. 12A, the thick solid line 3002 (N2 bake) and the thin solid line 3003 The reason why the shape of the film (air baked) is V-shaped is because hydrogen has been transported from the film surface and the glass substrate. It was considered that this was due to the injection of

[0266] Here, for sample 1, the maximum nitrogen concentration in the effective range of the SIMS measurement results is The value is 1 x 10 20 atoms / cm 3 Less than (1×10 20 atoms / cm 3 (less than) There was. (Figure 10(B))

[0267] Therefore, for sample 1, the average nitrogen concentration in the effective range of the SIMS measurement results is The value is also 1 x 10 20 atoms / cm 3 Less than (1×10 20 atoms / cm 3 (less than) (The average value was never greater than the maximum value.)

[0268] In addition, under the as-depo conditions of sample 1 (Figure 10), the validity of the SIMS measurement results The maximum nitrogen concentration in the effective range is 9.3×10 19 atoms / cm 3 And SIM The minimum nitrogen concentration in the valid range of the measurement result of S is 1.9 × 10 19 atoms / cm 3 The average nitrogen concentration in the effective range of the SIMS measurement results was 6.1 × 10 19 atoms / cm 3 It was.

[0269] In addition, under the as-depo conditions of sample 1 (Figure 10), the validity of the SIMS measurement results The maximum hydrogen concentration in the effective range is 6.9×10 19 atoms / cm 3 And SIM The minimum hydrogen concentration in the valid range of the measurement results for S is 4.5×10 19 atoms / cm 3 The average hydrogen concentration in the effective range of the SIMS measurement results was 5.6 × 10 19 atoms / cm 3 It was.

[0270] In addition, under the N2 bake conditions of sample 1 (Figure 10), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 9.7×10 19 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 3.0 x 10 19 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 6.0 × 10 19 at oms / cm 3 It was.

[0271] In addition, under the N2 bake conditions of sample 1 (Figure 10), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 2.3×10 19 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 6.4×10 18 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 1.2 × 10 19 at oms / cm 3 It was.

[0272] In addition, under the atmospheric baking conditions of sample 1 (Figure 10), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 3.1×10 19 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 4.4 x 10 18 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 1.8 × 10 19 at oms / cm 3 It was.

[0273] In addition, under the atmospheric baking conditions of sample 1 (Figure 10), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 6.7×10 18 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 2.0×10 18 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 3.8 × 10 18 at oms / cm3 It was.

[0274] On the other hand, in samples 2 and 3, the nitrogen in the effective range of the SIMS measurement results was The minimum value of the element concentration is 1×10 22 atoms / cm 3 The above was the case (Figure 11(B), Figure 1 2(B)).

[0275] Therefore, in sample 2 and sample 3, the effective range of the SIMS measurement results The average nitrogen concentration is also 1×10 22 atoms / cm 3 (The average value was greater than the minimum value.) (It will never be a smaller value.)

[0276] In addition, under the as-depo conditions of sample 2 (Figure 11), the validity of the SIMS measurement results The maximum nitrogen concentration in the effective range is 1.6×10 22 atoms / cm 3 And SIM The minimum nitrogen concentration in the valid range of the measurement result of S is 1.5 × 10 22 atoms / cm 3 The average nitrogen concentration in the effective range of the SIMS measurement results is 1.5 × 10 22 atoms / cm 3 It was.

[0277] In addition, under the as-depo conditions of sample 2 (Figure 11), the validity of the SIMS measurement results The maximum hydrogen concentration in the effective range is 1.0×10 20 atoms / cm 3 And SIM The minimum hydrogen concentration in the valid range of the measurement results for S is 6.3×10 19 atoms / cm 3 The average hydrogen concentration in the effective range of the SIMS measurement results was 7.8 × 10 19 atoms / cm 3 It was.

[0278] In addition, under the N2 bake conditions of sample 2 (Figure 11), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 1.5×10 22 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 1.4 x 10 22 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 1.5 × 10 22 at oms / cm 3 It was.

[0279] In addition, under the N2 bake conditions of sample 2 (Figure 11), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 1.2×10 21 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 6.5×10 20 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 7.7 × 10 20 at oms / cm 3 It was.

[0280] In addition, under the atmospheric baking conditions of sample 2 (Figure 11), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 1.6×10 22 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 1.5 x 10 22 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 1.6 × 10 22 at oms / cm 3 It was.

[0281] In addition, under the atmospheric baking conditions of sample 2 (Figure 11), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 6.9×10 20 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 4.4×10 20 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 5.3 × 10 20 at oms / cm 3 It was.

[0282] In addition, under the as-depo conditions of sample 3 (Figure 12), the validity of the SIMS measurement results was The maximum nitrogen concentration in the effective range is 3.4×10 22 atoms / cm 3 And SIM The minimum nitrogen concentration in the valid range of the measurement result of S is 3.1 × 10 22 atoms / cm 3 The average nitrogen concentration in the effective range of the SIMS measurement results is 3.3 × 10 22 atoms / cm 3 It was.

[0283] In addition, under the as-depo conditions of sample 3 (Figure 12), the validity of the SIMS measurement results was The maximum hydrogen concentration in the effective range is 1.9×10 20 atoms / cm 3 And SIM The minimum hydrogen concentration in the valid range of the measurement results of S is 1.1×10 20 atoms / cm 3 The average hydrogen concentration in the effective range of the SIMS measurement results is 1.4 × 10 20 atoms / cm 3 It was.

[0284] In addition, under the N2 bake conditions of sample 3 (Figure 12), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 3.3×10 22 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 3.2 x 10 22 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 3.2 × 10 22 at oms / cm 3 It was.

[0285] In addition, under the N2 bake conditions of sample 3 (Figure 12), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 8.6×10 20 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 1.4×10 20 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 2.7 × 10 20 at oms / cm 3 It was.

[0286] In addition, under the atmospheric baking conditions of sample 3 (Figure 12), the effective range of the SIMS measurement results The maximum nitrogen concentration in the range is 3.5×10 22 atoms / cm 3 and SIMS The minimum nitrogen concentration in the valid range of the measurement results is 3.3 x 10 22 atoms / cm 3 in The average nitrogen concentration in the effective range of the SIMS measurement results was 3.4 × 10 22 at oms / cm 3 It was.

[0287] In addition, under the atmospheric baking conditions of sample 3 (Figure 12), the effective range of the SIMS measurement results The maximum hydrogen concentration in the range is 1.0×10 21 atoms / cm 3 and SIMS The minimum hydrogen concentration in the valid range of the measurement results is 7.6×10 19 atoms / cm 3 in The average hydrogen concentration in the effective range of the SIMS measurement results was 2.8 × 10 20 at oms / cm 3 It was.

[0288] As described above, the nitrogen-containing oxide semiconductor layer has a property of easily absorbing hydrogen. It was found that...

[0289] Conversely, if the average nitrogen concentration in the effective range of the SIMS measurement results is 1×10 20 atoms / cm 3 Less than (1×10 20 atoms / cm 3 (less than 1000 nm) It can be said that this layer is dense with respect to hydrogen.

[0290] In addition, in Samples 1 to 3, the nitrogen concentration in the oxide semiconductor layer was In sample 1 that was baked in air, the nitrogen in the oxide semiconductor layer did not increase. The element concentration had decreased.

[0291] Here, the mechanism by which nitrogen is incorporated into the oxide semiconductor layer is as follows: At this time, some of the oxygen bonds in the oxide semiconductor layer are broken, and nitrogen is substituted at the positions of the broken bonds. It was speculated that this was due to the formation of bonds.

[0292] Therefore, if an oxygen bond is formed at the position of the broken bond, it will be incorporated into the oxide semiconductor layer. We hypothesized that this would reduce the nitrogen concentration in the soil. If this assumption and hypothesis are correct, Nitrogen also has an effect on oxide semiconductors other than n-Ga-Zn-O. EXAMPLES

[0293] In order to verify whether the assumptions and hypotheses in Example 1 are correct, oxygen was used as the sputtering gas to measure oxide. A semiconductor layer was formed.

[0294] Supplying oxygen should increase the probability of an oxygen bond being formed at the site of the broken bond.

[0295] The oxide semiconductor layer is In:Ga:Zn 1:1:0.5 (atomic ratio) (In2O3:Ga Formed by sputtering an oxide semiconductor target with a molar ratio of 2O3:ZnO of 1:1:1 did.

[0296] Note that before the oxide semiconductor layer is formed, leakage from a deposition chamber and nitrogen on an inner wall of the deposition chamber are reduced. Then, the deposition on the dummy substrate is sufficiently performed to thoroughly prevent nitrogen from being mixed into the oxide semiconductor layer. Removed.

[0297] (Sample 4) The sputtering gas flow rate was Ar / O2=30 / 15sccm (O2 ratio 33.3%). The resulting sample was designated as sample 4 (as-depo).

[0298] The SIMS measurement result (nitrogen) of Sample 4 is shown in FIG.

[0299] (Sample 5) Sample with sputtering gas flow rate of Ar / O2=0 / 40sccm (O2 ratio 100%) This was designated as sample 5 (as-depo).

[0300] The SIMS measurement result (nitrogen) of Sample 5 is shown in FIG.

[0301] (Consideration) The effective range of the SIMS measurement results is the same as in the first embodiment.

[0302] Here, in sample 4 (FIG. 13(A)), The maximum nitrogen concentration is 5×10 19 atoms / cm 3 Less than (5×10 19 atoms / cm 3 (less than)

[0303] Therefore, in sample 4 (FIG. 13(A)), the effective range of the SIMS measurement results The average nitrogen concentration is also 5×10 19 atoms / cm 3 Less than (5×10 19 atoms / cm 3 (The average value cannot be greater than the maximum value.)

[0304] In addition, in sample 4 (FIG. 13(A)), The average nitrogen concentration was calculated to be 1×10 19 atoms / cm 3 Less than (1×10 1 9 atoms / cm 3 (less than 100%).

[0305] In addition, in sample 5 (FIG. 13(B)), The maximum nitrogen concentration is 2×10 19 atoms / cm 3 Less than (2×10 19 atoms / cm3 (less than 100%).

[0306] Therefore, in sample 5 (FIG. 13(B)), the effective range of the SIMS measurement results The average nitrogen concentration in the 19 atoms / cm 3 Less than (1×10 19 atoms / cm 3 (less than 100%).

[0307] Compared to sample 1, which did not contain oxygen (FIG. 10(B)), sample 4 (FIG. 13(A)) and sample 5 (FIG. 13(B)) have lower nitrogen concentrations.

[0308] In addition, under the as-depo conditions of sample 4 (FIG. 13(A)), the SIMS measurement results The maximum nitrogen concentration in the effective range of the result is 1.6×10 19 atoms / cm 3 and The minimum nitrogen concentration in the valid range of the SIMS measurement results is 2.2×10 18 atoms / cm 3 The average nitrogen concentration in the effective range of the SIMS measurement results is 4.6×1 0 18 atoms / cm 3 It was.

[0309] In addition, under the as-depo conditions of sample 5 (FIG. 13(B)), the SIMS measurement results The maximum nitrogen concentration in the effective range of the result is 1.6×10 19 atoms / cm 3 and The minimum nitrogen concentration in the valid range of the SIMS measurement results is 2.3 × 10 18 atoms / cm 3 The average nitrogen concentration in the effective range of the SIMS measurement results is 7.7 × 1 0 18 atoms / cm3 It was.

[0310] Therefore, it was possible to prove that the speculations and hypotheses in Example 1 were correct. EXAMPLES

[0311] The difference in the electrical characteristics of the transistor due to the difference in the material of the insulating layer 600 was investigated.

[0312] (Common conditions) The channel-etch type transistor shown in FIG. 2(B) was fabricated.

[0313] The oxide semiconductor layer 410 is made of In:Ga:Zn in an atomic ratio of 1:1:0.5 (In2O3 The oxide semiconductor target (Ga2O3:ZnO 1:1:1 (molar ratio)) was sputtered. The oxide semiconductor layer formed by etching was etched into an island shape and used as a sample.

[0314] After the step of FIG. 1B is completed, a first heat treatment is performed in an air atmosphere at 350° C. for 1 hour. went.

[0315] After the step of FIG. 2B is completed, a contact hole is formed in the insulating layer 600, and the insulating layer Wiring was formed on 600.

[0316] After the wiring was formed, a second heat treatment was performed in an air atmosphere at 350° C. for 1 hour.

[0317] (Sample 6) The insulating layer 600 was formed by sputtering using a silicon oxide target.

[0318] The film formation conditions were a substrate temperature of 100°C and Ar / O2=40 / 10sccm.

[0319] In addition, an RF power source was used, and the power was set to 1.5 kW.

[0320] The deposition pressure was 0.4 Pa.

[0321] (Sample 7) The insulating layer 600 was formed by sputtering using a silicon oxide target.

[0322] The film was formed under the conditions of a substrate temperature of 250°C and Ar / O2=40 / 10sccm.

[0323] In addition, an RF power source was used, and the power was set to 1.5 kW.

[0324] The deposition pressure was 0.4 Pa.

[0325] (Sample 8) The insulating layer 600 was formed by sputtering using a silicon oxide target.

[0326] The film was formed under the conditions of a substrate temperature of 100°C and Ar / H2=46 / 4sccm.

[0327] In addition, an RF power source was used, and the power was set to 1.5 kW.

[0328] The deposition pressure was 0.4 Pa.

[0329] (Sample 9) The insulating layer 600 was formed by a plasma CVD method.

[0330] The film formation conditions were a substrate temperature of 200°C and SiH4 / N2O=25 / 1000sccm.

[0331] (Sample 10) The insulating layer 600 was formed by a plasma CVD method.

[0332] The film formation conditions were a substrate temperature of 325°C and SiH4 / N2O=27 / 1000sccm.

[0333] (Sample 11) The insulating layer 600 was made of a siloxane film.

[0334] (Sample 12) The insulating layer 600 was made of an acrylic film.

[0335] (Sample 13) The insulating layer 600 was made of a polyimide film.

[0336] (Consideration) Samples 8 to 13 have a lower threshold voltage Vt h had shifted to the negative side.

[0337] Here, the insulating layer 600, which uses a substance containing hydrogen as a sputtering gas, is made of hydrogen. Contains elements.

[0338] Then, the insulating layer 600 containing hydrogen comes into contact with the back channel.

[0339] Moreover, the insulating layer 600 formed by the plasma CVD method contains hydrogen and nitrogen.

[0340] Then, the insulating layer 600 containing hydrogen comes into contact with the back channel.

[0341] In addition, siloxane films, acrylic films, and polyimide films are prone to absorbing moisture and releasing moisture. It has an easy-to-discharge property.

[0342] Then, the moisture releasing insulating layer 600 comes into contact with the back channel.

[0343] Here, computational science (although technically it is sometimes called simulation) We calculated how the back channel behaves when a donor is present. It was found that the presence of donors shifts the threshold voltage to the negative side.

[0344] Therefore, the insulating layer 600 formed under conditions in which hydrogen is not used as a sputtering gas is used. It was found that this can prevent a negative shift in the threshold voltage.

[0345] In addition, an insulating film with excess oxygen was fabricated using a silicon oxide target and oxygen as a sputtering gas. When the layer 600 was used (samples 6 and 7), oxygen was absorbed by the second heat treatment. It is considered that oxygen vacancies in the back channel were reduced by oxygen being supplied to the back channel.

[0346] In this embodiment, the second heat treatment was performed at 350° C. for 1 hour.

[0347] Here, in the case where an insulating layer containing excess oxygen is used as the insulating layer 600, the second heat treatment Sample A was not subjected to the second heat treatment, and sample B was subjected to the second heat treatment at 250°C for 1 hour. As a result of comparing sample A and sample B, the second Sample B, which was heated at 250°C for 1 hour, had a higher transistor density. The electrical properties were excellent.

[0348] In addition, an insulating layer was formed using a silicon target and oxygen only as a sputtering gas. A transistor using 600 was fabricated separately.

[0349] An insulating layer 600 formed using a silicon target and oxygen only as a sputtering gas. When forming the film, the substrate temperature was set to 100°C and 200°C. The results of the gate BT stress test were better when the substrate temperature was set to 200°C. Ta.

[0350] The reason why the results of the gate BT stress test were excellent is that the substrate temperature during the formation of the insulating layer 600 was It is considered that this is because the moisture on the surface of the back channel could be removed by raising the temperature.

[0351] Therefore, the substrate temperature during the formation of the insulating layer 600 is preferably 200° C. or higher. Not applicable, but below 300℃, below 400℃, below 500℃, below 600℃, below 700℃ You can choose from.) EXAMPLES

[0352] The channel-etched transistor (In-Ga-Zn-O-based transistor) shown in FIG. In addition, the insulating layer 600 was not formed.

[0353] Then, the substrate on which the transistors were formed was immersed in water.

[0354] Characteristics of the substrate with the transistors formed before and after it was submerged in water When comparing the characteristics of the transistor immediately after it was submerged with those immediately after it was submerged, Compared to before the immersion of the transistor, the threshold voltage shifted to the negative side and the off-current also increased. Ta.

[0355] Next, the water-soaked substrate was dried by heating it in air at 120°C for 3 minutes. The transistor characteristics were restored.

[0356] Next, the substrate was dried for 3 minutes and then heated at 120°C for 10 minutes in air (a total of 13 minutes), and the transistor characteristics were also restored.

[0357] Next, the substrate was dried for 13 minutes and then heated in air at 120°C for 40 minutes (a total of 5 3 minutes), the transistor characteristics were almost the same as before it was submerged.

[0358] Therefore, if moisture adheres to the surface of the back channel, it will affect the characteristics of the transistor. It was discovered that...

[0359] In addition, if the moisture is only on the surface of the back channel, it can be dried at 120℃ or higher for 53 minutes or more. It was found that it could be removed by heating.

[0360] It is clear that if the temperature is increased, the drying time can be shortened as long as the moisture can evaporate. It is clear. EXAMPLES

[0361] The effect of heat treatment on the oxide semiconductor layer was investigated using thermal desorption spectroscopy (TDS). The results were investigated using 1 / 2-dichloro-2-pyridine desorption spectroscopy.

[0362] Thermal Desorption Spectroscopy (TDS) Gas emission spectroscopy is a method for analyzing the gas released as the temperature of a sample is increased.

[0363] In this example, the release of water vapor was investigated.

[0364] (Sample 14) As sample 14, a glass substrate was prepared.

[0365] (Sample 15) Sample 15 was prepared by depositing In:Ga:Zn at a ratio of 1:1:0.5 (atomic ratio) on a glass substrate. The oxide semiconductor target is In2O3:Ga2O3:ZnO (1:1:1 (molar ratio)). A sample having an oxide semiconductor layer formed by sputtering was prepared.

[0366] Sample 15 was not heat-treated (as-depo).

[0367] (Sample 16) Another sample identical to Sample 15 was prepared and designated Sample 16.

[0368] (Sample 17) Sample 17 was prepared by depositing In:Ga:Zn at a ratio of 1:1:0.5 (atomic ratio) on a glass substrate. The oxide semiconductor target is In2O3:Ga2O3:ZnO (1:1:1 (molar ratio)). A sample having an oxide semiconductor layer formed by sputtering was prepared.

[0369] After the oxide semiconductor layer was formed, heat treatment was performed at 250° C. for 1 hour in a nitrogen atmosphere.

[0370] (Sample 18) Sample 18 was prepared by depositing In:Ga:Zn at a ratio of 1:1:0.5 (atomic ratio) on a glass substrate. The oxide semiconductor target is In2O3:Ga2O3:ZnO (1:1:1 (molar ratio)). A sample having an oxide semiconductor layer formed by sputtering was prepared.

[0371] After the oxide semiconductor layer was formed, heat treatment was performed at 350° C. for 1 hour in a nitrogen atmosphere.

[0372] (Sample 19) Sample 19 was prepared by depositing In:Ga:Zn at a ratio of 1:1:0.5 (atomic ratio) on a glass substrate. The oxide semiconductor target is In2O3:Ga2O3:ZnO (1:1:1 (molar ratio)). A sample having an oxide semiconductor layer formed by sputtering was prepared.

[0373] After the oxide semiconductor layer was formed, heat treatment was performed at 450° C. for 1 hour in a nitrogen atmosphere.

[0374] (Consideration) The results of thermal desorption spectrometry for Sample 14 and Sample 15 are shown in FIG. 14(A).

[0375] In FIG. 14A, graph 1414 is the graph of sample 14 (glass substrate only). Graph 1415 corresponds to the rough graph, and graph 1416 corresponds to the sample 15 (glass substrate and oxide semiconductor layer (as- depo)) graph.

[0376] In FIG. 14(A), there is a moisture peak 1401 near 50° C., a moisture peak 1402 near 100° C. It can be seen that there is a peak 1402 of moisture at about 300° C. and a peak 1403 of moisture at about 300° C.

[0377] Sample 14, which is made of only a glass substrate, has a moisture peak at around 50°C and a moisture peak at around 100°C. There is only a moisture peak 1402 at 300°C, and no moisture peak 1403 at around 300°C. .

[0378] On the other hand, in Sample 15 having an oxide semiconductor layer, the moisture peak 1401 at around 50° C. There is a moisture peak 1402 near 100° C. and a moisture peak 1403 near 300° C. There is.

[0379] Therefore, the moisture peak 1403 at around 300° C. is a moisture peak specific to the oxide semiconductor layer. It is.

[0380] Therefore, when the moisture peak 1403 at around 300° C. is detected, it is determined that moisture is present in the oxide semiconductor layer. It can be determined that minutes are included.

[0381] The comparison results of Samples 16 to 19 are shown in FIG. 14(B).

[0382] In FIG. 14B, graph 1416 is the graph of sample 16 (as-depo). Graph 14 corresponds to the rough graph, graph 14 corresponds to the graph of sample 17 (250°C), and graph 1 Graph 418 corresponds to the graph of sample 18 (350°C), and graph 1419 corresponds to the graph of sample 19 ( 450℃)

[0383] In sample 17 (250°C) and sample 18 (350°C), the moisture peak was around 300°C. The link 1403 was confirmed.

[0384] In addition, in sample 17 (250°C) and sample 18 (350°C), the water temperature was around 300°C. The counts of peak 1403 at 1 min were lower than those of sample 16 (as-depo). Ta.

[0385] This indicates that the heat treatment reduces moisture to a certain extent.

[0386] Furthermore, in sample 19 (450°C), there is a moisture peak 1403 near 300°C. Not yet.

[0387] Therefore, it can be said that moisture is completely removed by heat treatment at 450℃ or higher for 1 hour or more. do.

[0388] (Sample 20) Sample 20 was prepared by depositing In:Ga:Zn at a ratio of 1:1:0.5 (atomic ratio) on a glass substrate. Ratio) (In2O3:Ga2O3:ZnO is 1:1:1 (molar ratio)) oxide semiconductor target A sample having an oxide semiconductor layer formed by sputtering a SiO 2 film was prepared.

[0389] Sample 20 was then heat-treated at 650°C for 3 minutes in a nitrogen atmosphere using a gas RTA device. was carried out.

[0390] In sample 20 (650°C), there was no moisture peak near 300°C.

[0391] Therefore, it can be said that moisture can be completely removed by performing heat treatment at 650℃ or higher for 3 minutes or more. .

[0392] In addition, a 1:1:1 (atomic ratio) mixture of In:Ga:Zn (In2O3:Ga2 The oxide semiconductor target (O3:ZnO 1:1:2 (molar ratio)) was sputtered. A sample with an oxide semiconductor layer formed on it was prepared and subjected to the same experiment (as-depo, 250℃ As a result of the comparison of heat treatment at 450°C for 1 hour in a nitrogen atmosphere, The only sample that did not have a moisture peak near 300°C.

[0393] In addition, a 1:1:4 (atomic ratio) In:Ga:Zn (In2O3:Ga2 The oxide semiconductor target (O3:ZnO 1:1:8 (molar ratio)) was sputtered to form the A sample with an oxide semiconductor layer formed on it was prepared and subjected to the same experiment (as-depo, 250℃ As a result of the comparison of heat treatment at 450°C for 1 hour in a nitrogen atmosphere, The only sample that did not have a moisture peak near 300°C.

[0394] Therefore, oxides that do not have a moisture peak around 300°C in thermal desorption spectrometry Semiconductor layer (100°C or more and 400°C or less (preferably 250°C or more and 300°C or less) The count is 2 x 10 -11 or less) is 450°C or more and 1 hour or more, or 65 It can be said that the oxide semiconductor layer is heated at 0° C. or higher for 3 minutes or longer.

[0395] The absence of a moisture peak around 300°C in thermal desorption spectrometry means that In thermal desorption spectrometry, there is no moisture peak between 100℃ and 400℃. I can say.

[0396] The absence of a moisture peak around 300°C in thermal desorption spectrometry means that It can also be said that there is no moisture peak due to the oxide semiconductor layer.

[0397] In addition, a transistor having the structure shown in FIG. 2(A) was manufactured by changing the conditions of only the first heat treatment. However, oxide semiconductors that have a moisture peak around 300°C in thermal desorption spectrometry have The transistor using the dielectric layer (250℃, 350℃) showed a thermal desorption spectroscopy of 30 A transistor using an oxide semiconductor layer that does not have a moisture peak around 0°C (450°C) The threshold voltage is shifted to the negative side compared to the conventional method. The deterioration was significant.

[0398] The oxide semiconductor layer is made of In:Ga:Zn with an atomic ratio of 1:1:0.5 (In2O3 The oxide semiconductor target (Ga2O3:ZnO 1:1:1 (molar ratio)) was sputtered. An oxide semiconductor layer formed by the above process was used.

[0399] In addition, before the oxide semiconductor layer is formed, leakage from the deposition chamber is reduced, and nitrogen is reduced on the inner wall of the deposition chamber. The influence of nitrogen was thoroughly eliminated by performing film formation on a dummy substrate.

[0400] Therefore, it was found that moisture in the oxide semiconductor layer affects the electrical characteristics of the transistor. I understand. EXAMPLES

[0401] Thermal Desorption Spectroscopy (TDS) The outgassing (moisture) of the following samples was measured using optical spectroscopy.

[0402] (Sample 21) On a glass substrate, In:Ga:Zn is mixed in an atomic ratio of 1:1:0.5 (In2O3:Ga2O 3: ZnO was formed by sputtering an oxide semiconductor target with a molar ratio of 1:1:1. An oxide semiconductor layer is formed, and a silicon oxide film is formed on the oxide semiconductor layer by a sputtering method. A sample was prepared.

[0403] The silicon oxide film was formed by depositing silicon oxide as a target under a gas flow of Ar / O2=40 / 10sccm. The film was formed in an amount of 1000g.

[0404] Sample 21 was not heat treated.

[0405] (Sample 22) On a glass substrate, In:Ga:Zn is mixed in an atomic ratio of 1:1:0.5 (In2O3:Ga2O 3: ZnO was formed by sputtering an oxide semiconductor target with a molar ratio of 1:1:1. An oxide semiconductor layer is formed, and a silicon oxide film is formed on the oxide semiconductor layer by a sputtering method. A sample was prepared.

[0406] The silicon oxide film was formed by depositing silicon oxide as a target under a gas flow of Ar / O2=40 / 10sccm. The film was formed using oxygen as the sputtering gas.

[0407] Thereafter, a heat treatment (furnace) was performed in a nitrogen atmosphere at 250° C. for 1 hour.

[0408] (Sample 23) On a glass substrate, In:Ga:Zn is mixed in an atomic ratio of 1:1:0.5 (In2O3:Ga2O 3: ZnO was formed by sputtering an oxide semiconductor target with a molar ratio of 1:1:1. An oxide semiconductor layer is formed, and a silicon oxide film is formed on the oxide semiconductor layer by a sputtering method. A sample was prepared.

[0409] The silicon oxide film was formed by depositing silicon oxide as a target under a gas flow of Ar / O2=40 / 10sccm. (Oxygen was used as the sputtering gas.)

[0410] Thereafter, a heat treatment (furnace) was performed in a nitrogen atmosphere at 350° C. for 1 hour.

[0411] (Sample 24) On a glass substrate, In:Ga:Zn is mixed in an atomic ratio of 1:1:0.5 (In2O3:Ga2O 3: ZnO was formed by sputtering an oxide semiconductor target with a molar ratio of 1:1:1. An oxide semiconductor layer is formed, and a silicon oxide film is formed on the oxide semiconductor layer by a sputtering method. A sample was prepared.

[0412] The silicon oxide film was formed by depositing silicon oxide as a target under a gas flow of Ar / O2=40 / 10sccm. (Oxygen was used as the sputtering gas.)

[0413] Thereafter, heat treatment (furnace) was performed in a nitrogen atmosphere at 450° C. for 1 hour.

[0414] (Consideration) Thermal Desorption Spectroscopy (TDS) When the samples were measured by oscopy, a moisture peak was observed around 300°C. was not measured.

[0415] From the results of Example 5, it was found that the moisture content was not completely removed by heating at least at 350°C or less. stomach.

[0416] In other words, in Sample 23 and Sample 24, a moisture peak was observed around 300°C. However, the moisture peak around 300°C was not confirmed.

[0417] The reason for this is that the silicon oxide film made using oxygen as the sputtering gas (silicon oxide film with excess oxygen) It was speculated that this was due to blocking the release of moisture.

[0418] Therefore, for silicon oxide films using oxygen as a sputtering gas (silicon oxide films with excess oxygen), was found to prevent the diffusion of moisture.

[0419] In other words, it was found that the silicon oxide film containing excess oxygen has a water blocking effect.

[0420] On the other hand, when an oxide semiconductor layer is heated by the first heat treatment to release moisture, the oxide semiconductor layer is heated to a temperature of 1000.degree. By forming a silicon oxide film, it is possible to prevent moisture from entering from the outside. do. EXAMPLES

[0421] From Example 5, it was found that moisture was completely removed by heating at 450°C or higher for 1 hour or more. Ta.

[0422] Therefore, the hydrogen concentration of the samples heated at temperatures higher than 450°C was examined using secondary ion mass spectrometry. Secondary Ion Mass Spectrometer (SIMS) y) was used to investigate.

[0423] First, a mixture of In:Ga:Zn (In2O3:G) with an atomic ratio of 1:1:0.5 was deposited on a glass substrate. A semiconductor oxide target with a molar ratio of 1:1:1 (Al2O3:ZnO) was sputtered. A plurality of samples each having an oxide semiconductor layer formed thereon were prepared.

[0424] In addition, a 1:1:1 (atomic ratio) mixture of In:Ga:Zn (In2O3:Ga2 The oxide semiconductor target (O3:ZnO 1:1:2 (molar ratio)) was sputtered. A plurality of samples each having an oxide semiconductor layer formed thereon were prepared.

[0425] Note that before the oxide semiconductor layer is formed, leakage from a deposition chamber and nitrogen on an inner wall of the deposition chamber are reduced. Then, the deposition on the dummy substrate is sufficiently performed to thoroughly prevent nitrogen from being mixed into the oxide semiconductor layer. Removed.

[0426] The sputtering gas was Ar / O2=30 / 15sccm (O2 ratio 33.3%). .

[0427] Then, the heat treatment was performed at 450℃, 550℃, 600℃, and 650℃. The heating time for the samples was one hour.

[0428] The atmosphere for the heat treatment was selected from the nitrogen atmosphere, oxygen atmosphere, and atmosphere containing nitrogen and oxygen (dr We prepared samples under different conditions: y Air (an atmosphere with nitrogen:oxygen = 4:1).

[0429] The comparison results are shown in Table 1.

[0430] [Table 1]

[0431] In Table 1, secondary ion mass spectrometry (SIMS) The values ​​of ss Spectrometry were average values ​​over the effective range of SIMS.

[0432] As can be seen from Table 1, when heating was performed at 550° C. or higher for 1 hour or longer, the hydrogen concentration in the oxide semiconductor layer was found to be significantly reduced.

[0433] In other words, the hydrogen concentration is 6×10 18 atoms / cm 3 The following oxide semiconductor layers are It can be said that the oxide semiconductor layer is an oxide semiconductor layer that has been heated at a temperature of 50° C. or higher for 1 hour or longer.

[0434] Note that a transistor having the structure shown in FIG. 2A was manufactured by changing only the conditions of the first heat treatment. By the way, 1×10 19 atoms / cm 3 The above-mentioned oxide semiconductor layer containing hydrogen was used Transistor (450℃) is 1×10 19 atoms / cm 3 Acids containing less than Transistors using oxide semiconductor layers (550°C, 600°C, 65 0℃), the threshold voltage is shifted to the negative side, and the gate BT stress test The deterioration in

[0435] The oxide semiconductor layer is made of In:Ga:Zn with an atomic ratio of 1:1:0.5 (In2O3 The oxide semiconductor target (Ga2O3:ZnO 1:1:1 (molar ratio)) was sputtered. An oxide semiconductor layer formed by the above process was used.

[0436] In addition, before the oxide semiconductor layer is formed, leakage from the deposition chamber is reduced, and nitrogen is reduced on the inner wall of the deposition chamber. The influence of nitrogen was thoroughly eliminated by performing film formation on a dummy substrate.

[0437] Therefore, it was found that hydrogen in the oxide semiconductor layer affects the electrical characteristics of the transistor. I understand. EXAMPLES

[0438] FIG. 16 shows a cross section of a thin-film transistor using an In-Ga-Zn-O oxide semiconductor. Observation with a transmission electron microscope (TEM, Hitachi H-9000NAR, 300 kV) This is the photo.

[0439] The thin film transistor shown in FIG. After forming an O-based oxide semiconductor layer with a thickness of 50 nm, the first heat treatment (650° C.) was performed in a nitrogen atmosphere. After that, a titanium layer 1604 was formed as a metal film with a thickness of 150 nm, and then a nitrogen layer was formed. This is a sample that was subjected to a second heat treatment (250° C., 1 hour) in a nitrogen atmosphere.

[0440] In FIG. 16, indium is deposited at the interface between an oxide semiconductor layer 1601 and a titanium layer 1604. The multi-layer 1602 and titanium oxide layer 1603 can be seen.

[0441] The indium-rich layer 1602 and the titanium oxide layer 1603 were confirmed by FFTM. (Fast Fourier Transform Mapping) method was used. .

[0442] A second heat treatment is performed in the state where the titanium layer 1604 and the oxide semiconductor layer 1601 are in contact with each other. As a result, oxygen is extracted from the oxide semiconductor layer, and a titanium oxide layer 1603 is formed. It was considered that this was the case.

[0443] In addition, indium crystals are formed in the portions of the oxide semiconductor layer 1601 from which oxygen is extracted. It is considered that the deposited indium-rich layer 1602 was formed.

[0444] In this manner, in the state where the titanium layer 1604 and the oxide semiconductor layer 1601 are in contact with each other, A titanium oxide layer 1603 can be formed by performing heat treatment.

[0445] In this embodiment, the reaction is between oxygen and titanium (Ti), so In-Ga-Zn- It is clear that a similar reaction occurs in layers other than the O-based oxide semiconductor layer.

[0446] Therefore, it is preferable to carry out the second heat treatment at 250° C. or higher. (The upper limit is not limited.) However, from 300℃ or less, 400℃ or less, 500℃ or less, 600℃ or less, and 700℃ or less You can choose.)

[0447] In addition, a low resistance material (a film mainly composed of aluminum, a film mainly composed of copper) is formed on the titanium layer 1604. It is preferable to form a film having a thickness of 100 nm or more (such as a film having a thickness of 100 nm or more) since the wiring resistance can be reduced. [Explanation of symbols]

[0448] 100 Substrates 200 Gate electrode 300 Gate insulation layer 400 Oxide semiconductor layer 410 Oxide semiconductor layer 500 Conductive layer 510 Contact electrode 520 Contact Electrode 600 Insulation Layer 700 Channel Protection Layer 810 Wiring 820 Wiring 830 Wiring 900 Undercoat insulation layer 1401 Peak 1402 Peak 1403 Peak 1414 Graph 1415 Graph 1416 Graph 1417 Graph 1418 Graph 1419 Graph 1601 Oxide semiconductor layer 1602 Indium-rich layer 1603 Titanium oxide layer 1604 Titanium layer 2001 Film formation room 2002 lid 2003 Target 2004 Pump 2005 O-ring 2006 O-ring 2007 Metal Gasket 2008 Metal Gasket 3001 Dotted Line 3002 Thick solid line 3003 Thin solid line 8000 dashed line

Claims

[Claim 1] a gate electrode, an oxide semiconductor layer having a channel formation region, and a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer; The nitrogen concentration in the channel formation region is 1×10 ２０ atoms / cm ３ A semiconductor device characterized in that:

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