Method for manufacturing semiconductor module and semiconductor module

Abstract

To discharge, even when a semiconductor chip is placed on a sintered metal paste in a state where a solvent remains and the semiconductor chip is bonded by sintering while components of the solvent is discharged by heating, the solvent in a short time and suppress scattering and protrusion of the sintered metal.SOLUTION: A method for manufacturing a semiconductor module in which a semiconductor chip is bonded by sintering onto a wiring layer includes: a rough surface formation step of forming a continuous rough surface in at least a partial area on a surface of the wiring layer; a paste placement step of placing a sintered metal paste containing metal particles and a solvent so as to overlap part of the continuous rough surface; a semiconductor chip placement step of placing the semiconductor chip on the sintered metal paste in a state where the solvent remains; and a sintering step of bonding the semiconductor chip by sintering while discharging components of the solvent by heating. The wiring layer is a hydrophilic surface to the solvent, and the continuous rough surface inside the area where the sintered metal paste is placed is connected to the continuous rough surface outside the area where the sintered metal paste is placed.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor module and a semiconductor module. [Background technology]

[0002] There is a need to improve the power cycle life of high-heat-resistant power semiconductor modules used in electric railways, EVs, and industrial applications. To meet this need, an effective solution would be to use sintered bonding, which has excellent heat resistance, to bond the semiconductor chip and substrate instead of the conventional solder bonding.

[0003] Techniques relating to sinter bonding are disclosed in, for example, Patent Document 1 and Patent Document 2.

[0004] FIG. 5 and paragraphs 0040 to 0044 of Patent Document 1 describe a technique in which a laser is used to form dimples on the surface of a substrate that have an anchor effect, then a paste-like sinterable metal bonding material is printed, the sinterable metal bonding material is dried, a semiconductor element is mounted on the sinterable metal bonding material and temporarily fixed thereon, and then heating is performed while applying pressure to bond the substrate and semiconductor element using the sinterable metal bonding material.

[0005] Also, in FIG. 4 and paragraphs 0040 to 0045 of Patent Document 2, a technology is described in which a sintered copper paste is printed on a metal wiring on an insulating substrate, a semiconductor chip is then mounted on the sintered copper paste, and then the organic solvent is removed by heating while applying pressure, after which the copper particles are sintered together to form a sintered copper layer. Also, in paragraph 0060 of Patent Document 2, it is described that sintering without pressure is possible depending on the sintered paste. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2019 / 087920 [Patent Document 2] JP 2022-35179 A Summary of the Invention [Problem to be solved by the invention]

[0007] A common technique for sinter bonding is to pre-dry the sintered metal paste before mounting the semiconductor chip, as in Patent Document 1, but it is also possible to omit the pre-drying and mount the semiconductor chip on the sintered metal paste, as in Patent Document 2.

[0008] However, if a semiconductor chip is mounted without pre-drying in a state where the sintered metal paste contains a large amount of solvent components, and sintering is performed while removing the solvent by heating, the semiconductor chip covers the sintered metal paste, blocking most of the solvent exhaust path, which causes a problem that it takes a long time to dry the solvent. In addition, the side of the sintered metal paste becomes the solvent exhaust path, but since the exhaust path is narrow, the internal pressure inside the sintered metal paste is likely to increase, which causes the sintered metal powder to be blown away and scattered from the side, and there is a problem that it becomes a conductive foreign body.

[0009] Furthermore, if a semiconductor chip is mounted in a sintered metal paste that contains a large amount of solvent components and pressure is applied in this state, there is a risk that the sintered metal paste will overflow from the semiconductor chip and ride up onto the semiconductor chip, shorting out the electrodes on the front and back sides of the semiconductor chip, or will overflow into the gap between the wiring layer to which the semiconductor chip is joined and the adjacent wiring layer, shorting out the two.

[0010] The problem that the present invention aims to solve is to provide a semiconductor module manufacturing method and a semiconductor module that can expel the solvent in a short time and suppress the scattering and overflow of the sintered metal, even when a semiconductor chip is placed on a sintered metal paste with residual solvent remaining therein and the semiconductor chip is sinter-bonded while being heated to expel the solvent components. [Means for solving the problem]

[0011] In order to solve the above-mentioned problems, the manufacturing method of a semiconductor module of the present invention is a manufacturing method of a semiconductor module in which a semiconductor chip is sinter-bonded onto a wiring layer, and includes a rough surface forming process for forming a continuous rough surface in at least a portion of the surface of the wiring layer, a paste placement process for placing a sintered metal paste containing metal particles and a solvent so as to overlap a portion of the continuous rough surface, a semiconductor chip placement process for placing the semiconductor chip on the sintered metal paste with the solvent remaining, and a sintering process for sinter-bonding the semiconductor chip while removing the components of the solvent by heating, wherein the wiring layer has a hydrophilic surface with respect to the solvent, and the continuous rough surface inside the region in which the sintered metal paste is placed is connected to the continuous rough surface outside the region in which the sintered metal paste is placed.

[0012] The semiconductor module of the present invention further comprises a wiring layer, a semiconductor chip, a sintered metal layer joining the wiring layer and the semiconductor chip, and a continuous rough surface formed on at least a portion of the surface of the wiring layer, wherein the continuous rough surface inside the region in which the sintered metal layer is arranged is connected to the continuous rough surface outside the region in which the sintered metal layer is arranged. Effect of the Invention

[0013] According to the present invention, even when a semiconductor chip is placed on a sintered metal paste with residual solvent remaining therein and the semiconductor chip is sinter-bonded while being heated to drive off the solvent components, it is possible to realize a semiconductor module manufacturing method and a semiconductor module that can drive off the solvent in a short time and prevent the sintered metal from scattering or spilling out. [Brief description of the drawings]

[0014] [Figure 1] 1 is a cross-sectional view showing an example of the structure of a semiconductor module according to a first embodiment. [Diagram 2]2A and 2B are a flowchart and cross-sectional views showing an example of a method for manufacturing the semiconductor module of the first embodiment. [Diagram 3] 1 is a plan view photograph showing an example of a flat surface and a continuous rough surface of Example 1. [Figure 4] FIG. 1 is a cross-sectional view illustrating the phenomenon explained by Wenzel's formula. [Diagram 5] 4A to 4C are top views showing an example of a manufacturing method for the semiconductor module of the first embodiment. [Figure 6] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 7] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 8] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 9] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 10] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 11] 11A and 11B are top views showing an example of a manufacturing method for a semiconductor module according to a second embodiment. [Figure 12] 11 is a cross-sectional photograph showing an example of the structure of a semiconductor module according to Example 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing and each embodiment, the same or similar components are designated by the same reference numerals, and duplicated explanations will be omitted. EXAMPLES

[0016] FIG. 1 is a cross-sectional view showing an example of the structure of a semiconductor module according to a first embodiment.

[0017] The semiconductor module 20 of this embodiment includes, for example, a semiconductor chip 1, a sintered metal layer 2, a substrate 3, a base plate 4, a sintered metal layer 5 under the substrate, wires 6, terminals 7, a case 8, and a sealing resin 9. Note that a continuous rough surface 10, which will be described later, is not shown in FIG.

[0018] The substrate 3 includes an insulating substrate 3c, a wiring layer 3a provided on the front side of the insulating substrate 3c, and a back metal layer 3b provided on the back side of the insulating substrate 3c. The wiring layer 3a is composed of a plurality of wiring patterns. The wiring layer 3a may be made of a conductive metal such as copper. The back metal layer 3b may be made of copper.

[0019] The semiconductor chip 1 is bonded to the wiring layer 3a via the sintered metal layer 2. The semiconductor chip 1 may be, for example, a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a diode. The sintered metal layer 2 may be, for example, a sintered copper layer or a sintered silver layer.

[0020] The base plate 4 functions as a heat dissipation member. The base plate 4 and the rear metal layer 3b of the substrate 3 are joined via the under-substrate sintered metal layer 5. The case 8 is adhered to the base plate 4, for example, via an adhesive (not shown).

[0021] The wires 6 are conductive wires that electrically connect the semiconductor chips 1 to each other, the wiring layers 3a to each other, or between the semiconductor chip 1 and the wiring layer 3a. The terminals 7 are connected to the wiring layers 3a, and a portion of each terminal is drawn out to the outside of the case 8 to function as an external connection terminal. The sealing resin 9 can be, for example, silicone gel or epoxy resin.

[0022] FIG. 2 is a flow chart and cross-sectional views illustrating an example of a method for manufacturing the semiconductor module of the first embodiment.

[0023] Step S1 is a rough surface forming step, in which a continuous rough surface 10 is formed on at least a partial region of the surface of the wiring layer 3a.

[0024] Step S2 is a paste placement step, in which a sintered metal paste 11 containing metal particles 11a and a solvent 11b is placed so as to overlap a part of the continuous rough surface 10. As a placement method, for example, a coating process using a dispenser or printing can be used.

[0025] Step S3 is a semiconductor chip placement step, in which the semiconductor chip 1 is placed on the sintered metal paste 11 with the solvent 11b remaining thereon.

[0026] Step S4 is a sintering step, in which the semiconductor chip 1 is sintered while the components of the solvent 11b are discharged by heating. The temperature of the sintering step is, for example, 300 to 400°C. The sintering step may be performed without applying pressure, or may be performed while applying a slight pressure of 0.01 to 1.00 MPa to the semiconductor chip 1. In a typical sintering step having a preliminary drying step, sintering is often performed while applying a pressure of 10 to 20 MPa, but in this embodiment, the pressure can be made smaller than that, so the cost of the pressurizing device can be reduced. In the sintering step, the solvent 11b expands, so it is illustrated larger than in other steps. After the sintering step is completed, the metal particles 11a are sintered to become the sintered metal layer 2 shown in FIG. 1.

[0027] In this embodiment, the wiring layer 3a has a hydrophilic surface with respect to the solvent 11b, and the continuous rough surface 10 inside the region where the sintered metal paste 11 is disposed is connected to the continuous rough surface 10 outside the region where the sintered metal paste 11 is disposed. The continuous rough surface 10 formed on the hydrophilic surface improves the wettability of the solvent 11b compared to a flat surface, and the solvent 11b is discharged in a short time because the discharge force of the solvent 11b in the direction indicated by the arrow in the sintering process of FIG. 2 is increased. In addition, the increase in the discharge force of the solvent 11b can be suppressed, and the scattering of the metal particles 11a of the sintered metal can be suppressed. Furthermore, the movement of the metal particles 11a is suppressed by the continuous rough surface 10, so that the protrusion of the sintered metal can be suppressed.

[0028] FIG. 3 is a plan view photograph showing an example of the flat surface and the continuous rough surface of Example 1.

[0029] The continuous rough surface 10 can be formed by processing at least a part of the surface of the wiring layer 3a to have a fine uneven shape. The continuous rough surface 10 can be formed by laser irradiation, oxidation-reduction, etching, blasting, roughening plating, mechanical indentation, and other methods. Among these, the laser irradiation is generally used for printing barcodes for product traceability management, and is therefore desirable because it allows existing equipment to be diverted and reduces costs. The left side of FIG. 3 shows the untreated state of the wiring layer 3a, where no unevenness has been made on the surface, and the surface is flat. The right side of FIG. 3 shows the state in which the laser irradiation process has been performed on the surface of the wiring layer 3a to form the continuous rough surface 10.

[0030] FIG. 4 is a cross-sectional view illustrating the phenomenon explained by Wenzel's equation.

[0031] In general, a rough surface has a property of enhancing wettability more than a flat surface. This can be expressed by the Wenzel equation shown in formula (1).

[0032] cosθw=r cosθ (1) θw: contact angle on rough surface, θ: contact angle on flat surface, r: area ratio of rough surface to flat surface As shown in the upper part of Figure 4, a hydrophilic surface with good wettability (θ<90°) has a smaller contact angle (θw<θ) on the rough surface on the right side than on the flat surface on the left side, making the rough surface more likely to wet. On the other hand, as shown in the lower part of Figure 4, a hydrophobic surface with poor wettability (θ>90°) has a larger contact angle (θw>θ) on the rough surface on the right side than on the flat surface on the left side, making the rough surface less likely to wet.

[0033] Taking advantage of this property, in the first embodiment, the solvent 11b to be dried and the wiring layer 3a forming the continuous rough surface 10 are combined with materials that are easily wetted. As a result, the solvent 11b, which was previously gasified when heated and escaped through the gaps between the metal particles 11a, is actively discharged outside the bonding surface along the surface of the wiring layer 3a while remaining liquid, so that the solvent 11b can be discharged and drying can be completed in a shorter time than with a flat surface. In addition, the surface of the wiring layer 3a takes away the components of the solvent 11b of the supplied sintered metal paste 11, reducing the fluidity of the sintered metal paste 11 and making it difficult for it to overflow. In addition, when the solvent 11b dries, a new discharge force, the wettability of the surface of the wiring layer 3a, is added, so that the solvent dries more smoothly and the internal pressure is less likely to increase, thereby reducing the amount of metal particles 11a scattering.

[0034] When copper is used for the wiring layer 3a, the solvent 11b having good wettability with copper can be, for example, diethylene glycol monobutyl ether, diethylene glycol diethyl ether, ethylene glycol monobutyl ether, or the like. However, the present invention is not limited to this, and any combination of the wiring layer 3a and the solvent 11b that makes the wiring layer 3a have a hydrophilic surface with respect to the solvent 11b may be used. A laminated film may also be used for the wiring layer 3a. For example, a laminated film having a surface coated with nickel plating or the like may be used for the wiring layer 3a, or a laminated film having a sintered silver layer as the sintered metal layer 2 and a silver plating layer coated on the surface of the wiring layer 3a may be used. When a laminated film is used for the wiring layer 3a, in order to make the wiring layer 3a have a hydrophilic surface with respect to the solvent 11b, a combination of a material of the surface of the wiring layer 3a and the solvent 11b that have hydrophilicity may be used.

[0035] The size of the unevenness of the continuous rough surface 10 is preferably as small as possible, since the value of r in the Wenzel formula can be made larger. For example, it is particularly effective if the arithmetic mean height Ra is 0.01 to 0.6 um and / or the average length RSm of the unevenness is 4.0 um or less. It was also found that if the arithmetic mean height Ra is as large as 1.5 um or more, under the condition of no pressure or slight pressure as described in step S4 of FIG. 2, pressure is not evenly transmitted to the interface between the sintered metal material and the surface of the wiring layer 3a, and peeling is likely to occur. This can be said to be because, unlike solder, which can melt and flow along the unevenness, sintering is a solid-phase bonding method, making it difficult to ensure adhesion.

[0036] In order to discharge the solvent 11b, the rough surfaces must be connected, and so a continuous rough surface 10 is required. Therefore, for example, a surface in which dimples are formed discretely to obtain an anchor effect differs from a continuous rough surface 10 because flat surfaces are interposed between the dimples.

[0037] Fig. 5 is a top view showing an example of a manufacturing method of the semiconductor module of Example 1. For convenience of explanation, Fig. 5 shows the continuous rough surface 10 even in the area hidden by the semiconductor chip 1 and the sintered metal layer 2. Also, other elements such as the shape of the wiring layer 3a are omitted from the illustration.

[0038] The continuous rough surface 10 of this embodiment is formed from the region overlapping the semiconductor chip 1 to a region outside the outer periphery of the semiconductor chip 1. Since the continuous rough surface 10 is formed to a region outside the outer periphery of the semiconductor chip 1, the solvent 11b can be discharged to a region not covered by the semiconductor chip 1, and the solvent 11b can be easily dried. Note that, although an example in which the continuous rough surface 10 is formed over the entire region overlapping the semiconductor chip 1 is shown in FIG. 5, the present invention is not limited to this.

[0039] Silver or copper is generally used as the metal particles 11a of the sintered metal paste 11. Copper is more preferable. Sintered copper has superior mechanical properties compared to sintered silver. In addition, since silver has a fast diffusion rate, sintering easily progresses during operation of the semiconductor module 20. If sintering progresses during operation of the semiconductor module 20, the inside of the sintered metal layer 2 becomes clearly divided into dense and sparse parts, making it difficult to dissipate heat in the sparse parts, and reliability may decrease. To prevent this, it is necessary to apply a large pressure in the sintering process to reduce voids as much as possible and increase the sintering density. On the other hand, in the case of copper, since the diffusion rate is small, sintering progress due to self-heating during operation of the semiconductor module 20 is unlikely to occur, so reliability can be maintained even if the sintering density at the time of completion of bonding is small. Therefore, it is possible to reduce the pressure applied to sintered copper compared to sintered silver, and the sintering process can be performed under conditions of no pressure or slight pressure.

[0040] In the semiconductor chip placement process, it is desirable to place the semiconductor chip 1 on the sintered metal paste 11 in a state in which 30 to 60 vol % of the solvent 11b remains. The solvent 11b is used here as a general term for the liquid components contained in the sintered metal paste 11, and is mixed for the purpose of, for example, dispersion medium, dispersion stabilization, viscosity adjustment, etc. By making the solvent component contain 30 to 60 vol %, the sintered metal paste 11 itself is soft and exhibits high fluidity, so that it is possible to ensure adhesion even with a smaller pressure, and for example, bonding is possible even with 1 MPa or less. At this time, if the solvent component is less than 30 vol %, the sintered metal paste 11 may become too hard and may not be able to adhere with a weak pressure, and conversely, if the solvent component is too much, the amount of solvent component that needs to be dried becomes unnecessarily large, and drying takes a long time.

[0041] 2, it is preferable to perform the semiconductor chip placement step in step S3 without pre-drying the sintered metal paste 11. This makes it possible to omit the pre-drying step. However, it is also possible to perform a pre-drying step for pre-drying the sintered metal paste 11 for a short period of time after the paste placement step in step S2, to obtain the sintered metal paste 11 in a state in which 30 to 60 vol % of the solvent 11b remains, and then perform the semiconductor chip placement step in step S3.

[0042] As the solvent 11b, for example, alcohols having a boiling point of 350°C or less can be used. The reason why the boiling point is set to 350°C or less is that the sintering temperature of sintered metal is generally about 200 to 400°C, and if the boiling point is too high, it takes too long to evaporate. However, organic substances such as alcohols having a boiling point above that temperature are not absolutely unsuitable, so it is of course possible to use such organic substances depending on the application. In addition, it is preferable to use a glycol-based solvent as the solvent 11b. This is because glycol-based solvents are inexpensive and have low toxicity to the human body. Furthermore, since alcohol-based solvents can act not only as a solvent but also as a reducing agent for oxidized metal, they can be used in an appropriate amount as a reducing agent for the amount of metal particles 11a. In addition, organic substances containing carboxylic acid, amine, aldehyde group, ester group, sulfanyl group, ketone group, etc. can be used, not limited to organic substances containing alcohol groups. Furthermore, organic substances containing toluene or only hydrocarbons that do not have the above-mentioned functional groups may be used, and examples of such organic substances include hexane and cyclohexane. The organic solvent used in this manner may be not only one of these, but also a mixture of two or more of these. EXAMPLES

[0043] 6 to 11 are top views showing an example of a manufacturing method for a semiconductor module of Example 2. For convenience of explanation, in Fig. 6 to 11, similar to Fig. 5, the continuous rough surface 10 is also shown in the region hidden by the semiconductor chip 1 and the sintered metal layer 2. Also, other elements such as the shape of the wiring layer 3a are not shown.

[0044] Example 2 is a modified example of the shape of the region forming the continuous rough surface 10 when viewed from above.

[0045] When the continuous rough surface 10 is used to discharge the solvent 11b, it is desirable that the discharge path is as short as possible. Therefore, as shown in FIG. 6, for example, by forming a plurality of strip-shaped continuous rough surfaces 10 extending in the short side direction of the semiconductor chip 1 (vertical direction in FIG. 6), the solvent 11b can be efficiently discharged. The interval between adjacent strip-shaped continuous rough surfaces 10 (interval in the horizontal direction in FIG. 6) is desirably greater than 0 mm and 0.3 mm or less, but is not limited thereto. Also, as shown in FIG. 7, the continuous rough surfaces 10 may extend radially outward from the position where they overlap with the semiconductor chip 1. Also, by forming a plurality of strip-shaped continuous rough surfaces 10, the time required for the process of forming the continuous rough surfaces 10 by laser irradiation processing can be shortened compared to the case of forming the continuous rough surfaces 10 on the entire surface.

[0046] In addition, since the solvent 11b can be dried more efficiently if it is carried out to the outside of the bonding surface to some extent, it is preferable that the continuous rough surface 10 is large enough to extend beyond the semiconductor chip 1. For example, if the continuous rough surface 10 is formed to be larger than the outer periphery of the semiconductor chip 1 by 0.15 mm or more, it can fully cover the mounting accuracy of the chip mounter, which is ±0.1 mm. In addition, it is preferable that the continuous rough surface 10 is formed to be larger than the outer periphery of the semiconductor chip 1 by 0.5 mm or more. This ensures a sufficiently exposed uneven surface even if the sintered metal paste 11 extends beyond the outer periphery of the semiconductor chip 1 and extends outside the bonding surface. Note that if the continuous rough surface 10 is not connected to the area directly under the semiconductor chip 1, a sufficient solvent discharge effect cannot be obtained, so it is preferable that at least a part of the area has the continuous rough surface 10 formed to be 0.15 mm or more inside the outer periphery of the semiconductor chip 1, taking into account the mounting accuracy of the chip mounter, which is ±0.1 mm.

[0047] In addition, by forming the continuous rough surface 10, there is a risk that the adhesion of the sintered interface decreases and peeling becomes easy. Therefore, as shown in FIG. 8, the continuous rough surface 10 may be formed in a frame shape overlapping the terminal area of ​​the semiconductor chip 1. The semiconductor chip 1 has an active area in which a semiconductor element is formed, and a terminal area surrounding the active area. The terminal area is provided with a terminal structure such as a field limiting ring (FLR) to ensure pressure resistance. Since heat is generated in the active area, it is desirable that the thermal resistance of the portion overlapping the active area is small. On the other hand, heat is not generated in the terminal area. Therefore, as shown in FIG. 8, by forming the continuous rough surface 10 in a frame shape avoiding the active area, even if peeling occurs, the effect on the thermal resistance of the portion overlapping the active area can be suppressed. In addition, as shown in FIG. 9, the continuous rough surface 10 may be formed in a mesh shape. This allows the effect on the thermal resistance of the portion overlapping the active area to be suppressed even if peeling occurs.

[0048] In addition, since the outer periphery and corners of the semiconductor chip 1 are subject to the most severe thermal stress, a continuous rough surface 10 may be formed to avoid a part of the outer periphery and corners of the semiconductor chip 1, as shown in Figures 10 and 11. This makes it possible to suppress peeling.

[0049] In addition, unlike soldering, sintering, which is a solid-phase joining method, is relatively difficult to follow and adhere when warping occurs. When forming the continuous rough surface 10 by heat treatment such as laser irradiation treatment, if the heat input is large, the warping becomes large, and there is a risk that adhesion during sintering cannot be ensured. Therefore, warping can be suppressed and adhesion can be ensured by reducing the surface roughness of the continuous rough surface 10 or by making the continuous rough surface 10 into a band or mesh shape to reduce the heat input as much as possible.

[0050] FIG. 12 is a cross-sectional photograph showing an example of the structure of the semiconductor module of the second embodiment.

[0051] In order to improve wettability, it is desirable that the surface of the wiring layer 3a be porous, as shown in Fig. 12. In Fig. 12, it can be seen that a plurality of holes 12 are formed between the sintered metal layer 2 and the wiring layer 3a. In order to make the surface porous, it is desirable to process the surface while locally melting it using a laser irradiation process or the like, rather than mechanically indenting the surface.

[0052] Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each embodiment may be combined and applied. [Explanation of symbols]

[0053] 1. Semiconductor chip 2 Sintered metal layer 3. Substrate 3a wiring layer 3b Back metal layer 3c Insulating substrate 4 Base plate 5. Sintered metal layer under the substrate 6 Wire 7 Terminal 8 Cases 9 Sealing resin 10 Continuously rough surface 11 Sintered metal paste 11a Metal particles 11b Solvent 12 holes 20 Semiconductor Module

Claims

1. A method for manufacturing a semiconductor module by sinter-bonding a semiconductor chip onto a wiring layer, comprising the steps of: a rough surface forming step of forming a continuous rough surface on at least a partial region of a surface of the wiring layer; a paste placement step of placing a sintering metal paste containing metal particles and a solvent so as to overlap a portion of the continuous rough surface; a semiconductor chip placement step of placing the semiconductor chip on the sintered metal paste with the solvent remaining thereon; a sintering step of sintering and bonding the semiconductor chip while discharging the solvent component by heating, the wiring layer has a hydrophilic surface with respect to the solvent; A method for manufacturing a semiconductor module, characterized in that the continuous rough surface inside the area in which the sintered metal paste is disposed is connected to the continuous rough surface outside the area in which the sintered metal paste is disposed.

2. In claim 1, A method for manufacturing a semiconductor module, wherein the continuous rough surface is formed in a plurality of bands.

3. In claim 1, 2. A method for manufacturing a semiconductor module, wherein the continuous rough surface extends in a direction parallel to a short side of the semiconductor chip.

4. In claim 1, A method for manufacturing a semiconductor module, wherein the continuous rough surface extends radially outward from a position overlapping the semiconductor chip.

5. In claim 1, The semiconductor chip has an active area in which a semiconductor element is formed and a termination area surrounding the active area, 4. A method for manufacturing a semiconductor module, comprising the steps of: forming the continuous rough surface into a frame shape that overlaps the termination region of the semiconductor chip;

6. In claim 1, 4. A method for manufacturing a semiconductor module, comprising the steps of: forming the continuous rough surface so as to avoid a portion of the outer periphery of the semiconductor chip;

7. In claim 1, 4. A method for manufacturing a semiconductor module, comprising the steps of: forming a continuous rough surface so as to avoid corners of the semiconductor chip;

8. In claim 1, 4. A method for manufacturing a semiconductor module, comprising the steps of: forming the continuous rough surface to an area 0.15 mm or more outside the outer periphery of the semiconductor chip;

9. In claim 1, 4. A method for manufacturing a semiconductor module, comprising the steps of: forming the continuous rough surface to a depth of 0.15 mm or more inside the outer periphery of the semiconductor chip;

10. In claim 1, A method for manufacturing a semiconductor module, wherein the continuous rough surface has an arithmetic mean height Ra of 0.01 to 0.6 μm.

11. In claim 1, A method for manufacturing a semiconductor module, wherein the continuous rough surface has an average length RSm of 4.0 um or less.

12. In claim 1, A method for manufacturing a semiconductor module, wherein the continuous rough surface is porous.

13. In claim 1, A method for manufacturing a semiconductor module, wherein the semiconductor chip placement step is a step of placing the semiconductor chip on the sintered metal paste in a state in which 30 to 60 vol % of the solvent remains.

14. In claim 1, A method for manufacturing a semiconductor module, comprising the steps of: after the paste placement step, carrying out the semiconductor chip placement step without pre-drying the sintered metal paste;

15. In claim 1, 4. A method for manufacturing a semiconductor module, comprising the steps of: sintering the semiconductor module;

16. In claim 1, A method for manufacturing a semiconductor module, wherein the sintering step is carried out while applying a slight pressure of 0.01 to 1.00 MPa to the semiconductor chip.

17. In claim 1, The method for manufacturing a semiconductor module, wherein the metal particles are copper.

18. A wiring layer; A semiconductor chip; a sintered metal layer that bonds the wiring layer and the semiconductor chip; a continuous rough surface formed on at least a partial area of ​​the surface of the wiring layer; A semiconductor module, characterized in that the continuous rough surface inside the area in which the sintered metal layer is arranged is connected to the continuous rough surface outside the area in which the sintered metal layer is arranged.

19. In claim 18, A semiconductor module, characterized in that the continuous rough surface is formed in a plurality of bands.

20. In claim 18, A semiconductor module, wherein the continuous rough surface extends in a direction parallel to a short side of the semiconductor chip.

21. In claim 18, A semiconductor module, wherein the continuous rough surface extends radially outward from a position overlapping the semiconductor chip.

22. In claim 18, The semiconductor chip has an active area in which a semiconductor element is formed and a termination area surrounding the active area, A semiconductor module, characterized in that the continuous rough surface is formed in a frame shape overlapping the termination region of the semiconductor chip.

23. In claim 18, 2. A semiconductor module comprising: a semiconductor chip; a first insulating layer formed on the first insulating layer; a second insulating layer formed on the second insulating layer;

24. In claim 18, 2. A semiconductor module, comprising: a semiconductor chip; a first insulating layer formed on the first insulating layer; a second insulating layer formed on the first insulating layer;

25. In claim 18, A semiconductor module, wherein the continuous rough surface is formed to an extent of 0.15 mm or more outside the outer periphery of the semiconductor chip.

26. In claim 18, A semiconductor module, wherein the continuous rough surface is formed to an extent of 0.15 mm or more inside the outer periphery of the semiconductor chip.

27. In claim 18, The semiconductor module is characterized in that the continuous rough surface has an arithmetic mean height Ra of 0.01 to 0.6 μm.

28. In claim 18, A semiconductor module, wherein the continuous rough surface has an average length RSm of 4.0 um or less.

29. In claim 18, The semiconductor module, wherein the continuous rough surface is porous.

30. In claim 18, The semiconductor module, wherein the sintered metal layer is a sintered copper layer.

Images