Semiconductor device and method for manufacturing semiconductor device
By using a dummy wire with lower tensile strength than the main wire in semiconductor devices, the issue of wire breakage due to high viscosity resins is addressed, allowing for effective detection of potential failures in the main wire.
Patent Information
- Application Number
- JP2023166799
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-28
- Publication Date
- 2025-04-09
- Estimated Expiration
- 2043-09-28
AI Technical Summary
During the manufacturing process of semiconductor devices, high viscosity molding resins can cause wires connected to terminals to break due to viscous resistance, making it difficult to visually confirm if the wires are about to break after sealing with resin.
Incorporating a dummy wire with a tensile strength lower than the main wire, which is connected to the same terminals as the main wire, allowing the dummy wire to break under viscous resistance during molding, thus indicating potential issues with the main wire.
This configuration enables the determination of whether the main wire is about to break by measuring the voltage or resistance of both the main and dummy wires after the resin has been applied, facilitating early detection and prevention of wire failures.
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Figure 2025057124000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]
[0002] Various techniques have been proposed for detecting the state of wires in semiconductor devices such as power semiconductor devices. For example, Patent Document 1 proposes a technique for detecting the connection strength between a wire of a dummy wiring and a terminal in order to prevent peeling due to aging deterioration. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2005-286009 A Summary of the Invention [Problem to be solved by the invention]
[0004] In a molding process for molding a sealing resin in a manufacturing process for a semiconductor device, when a molten, highly viscous molding resin is injected into a mold, viscous resistance is applied to wires connected to terminals, etc., and the wires may be on the verge of breaking. However, since the wires covered with the sealing resin cannot be visually confirmed after the molding process, there is a problem in that it is difficult to determine whether the wires are on the verge of breaking.
[0005] Therefore, the present disclosure has been made in consideration of the above-mentioned problems, and has an object to provide a technique capable of determining whether or not a wire is on the verge of breaking. [Means for solving the problem]
[0006] The semiconductor device according to the present disclosure comprises a semiconductor element, a terminal, a main wire electrically connected between the semiconductor element and the terminal, a dummy wire having both ends connected to a portion where both ends of the main wire are connected and having a tensile strength lower than the tensile strength of the main wire itself, and a sealing resin covering the semiconductor element, the main wire, and the dummy wire. Effect of the Invention
[0007] According to the present disclosure, a dummy wire having a tensile strength lower than that of the main wire is provided, which makes it possible to determine whether the wire is about to break. [Brief description of the drawings]
[0008] [Figure 1] 1 is a plan view showing a configuration of a semiconductor device according to a first embodiment. [Diagram 2] 1 is a circuit diagram showing a configuration of a semiconductor device according to a first embodiment. [Diagram 3] 4 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a plan view for explaining an inspection step according to the first embodiment. [Diagram 5] FIG. 2 is a diagram for explaining an inspection process according to the first embodiment. [Figure 6] FIG. 11 is a plan view showing a configuration of a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, the embodiments will be described with reference to the accompanying drawings. The features described in each of the following embodiments are merely examples, and not all features are necessarily required. In addition, in the following description, similar components in multiple embodiments are given the same or similar reference numerals, and different components are mainly described. In addition, in the following description, specific positions and directions such as "upper", "lower", "left", "right", "front" or "back" do not necessarily correspond to positions and directions in actual implementation.
[0010] <Embodiment 1> Fig. 1 is a plan view showing the configuration of a semiconductor device according to the present embodiment 1, and Fig. 2 is a circuit diagram showing the configuration. As shown in Fig. 1, the semiconductor device according to the present embodiment 1 includes a semiconductor switching element 1 which is a semiconductor element, a diode 2, a control IC (Integrated Circuit) 3, a control wire 4, a lead frame 5, a main wire 6, a dummy wire 7, a heat sink (not shown), and a sealing resin 8 which is a mold resin.
[0011] The semiconductor switching element 1, the diode 2, and the control IC 3 are composed of semiconductor chips. The semiconductor chip may be composed of, for example, normal silicon (Si), or may be composed of a wide band gap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), or diamond. When the semiconductor chip is composed of a wide band gap semiconductor, stable operation of the semiconductor chip under high temperature and high voltage conditions and high switching speed can be achieved.
[0012] The semiconductor switching element 1 has a control terminal (not shown) and turns on and off the current between both ends of the semiconductor switching element 1 based on a control signal input to the control terminal. The semiconductor switching element 1 includes, for example, at least one of an IGBT (Insulated Gate Bipolar Transistor) and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). In this specification, for example, at least one of A, B, C, ..., and Z means any one of all combinations of one or more types extracted from the group of A, B, C, ..., and Z.
[0013] As shown in Fig. 2, the diode 2 is connected in parallel with the semiconductor switching element 1. The diode 2 includes at least one of an SBD (Schottky Barrier Diode) and a PND (PN junction diode). The diode 2 may be provided on one semiconductor chip together with the semiconductor switching element 1, such as an RC-IGBT (Reverse Conducting-IGBT). Fig. 1 shows a configuration in which the semiconductor switching element 1 and the diode 2 are provided on one semiconductor chip, and the following description will be mainly based on this configuration.
[0014] The control IC 3 generates a control signal for controlling the energization of the semiconductor switching element 1. The control IC 3 will be described in detail later.
[0015] The control wire 4 is electrically connected between the semiconductor switching element 1 and the control IC 3, and transmits a control signal for controlling the energization of the semiconductor switching element 1 from the control IC 3 to a control terminal of the semiconductor switching element 1.
[0016] The lead frame 5, together with the control wires 4 and the main wires 6, constitutes the wiring inside the sealing resin 8. The lead frame 5 is made of a conductive material, and includes multiple parts obtained by dividing a conductive member such as a metal plate by pressing or the like according to the circuit configuration.
[0017] At least one of the semiconductor chips of the semiconductor switching element 1 and the diode 2 and the semiconductor chip of the control IC 3 is mounted on the lead frame 5 and bonded with a bonding material such as solder or resin. The portion of the lead frame 5 to which the semiconductor switching element 1 is bonded is used as the die pad 5a, and the portions outside the sealing resin 8 are used as the terminals 5b to 5e. Note that the die pad 5a bonded to the semiconductor chip may be provided with a bonding material flow prevention structure surrounding the semiconductor chip to prevent the bonding material from spreading excessively.
[0018] The semiconductor device according to the first embodiment is a semiconductor device having three phases, namely, a U phase, a V phase, and a W phase. Therefore, the die pad 5a includes a U-phase die pad, a V-phase die pad, a W-phase die pad, and a P-side die pad.
[0019] The U-phase die pad is connected to terminal 5b which is a U terminal, the V-phase die pad is connected to terminal 5b which is a V terminal, the W-phase die pad is connected to terminal 5b which is a W terminal, and the P-side die pad is connected to terminal 5c which is a P terminal. One semiconductor switching element 1 is mounted on each of the U-phase, V-phase, and W-phase die pads, and three semiconductor switching elements 1 are mounted in parallel on the P-side die pad.
[0020] The main wire 6 is electrically connected between any one of the three semiconductor switching elements 1 mounted on the P-side die pad and any one of the terminals (terminal 5b) of the U-terminal, V-terminal, and W-terminal. Another main wire 6 is electrically connected between one semiconductor switching element 1 mounted on any one of the die pads of the U-phase, V-phase, and W-phase and any one of the terminals (terminal 5d) of the NU-terminal, NV-terminal, and NW-terminal.
[0021] Both ends of the dummy wire 7 are connected to the portion where both ends of the main wire 6 are connected, and the dummy wire 7 is provided in parallel with the main wire 6. Note that while the dummy wire 7 is shown by a thin line in Fig. 1, the portion corresponding to the dummy wire 7 is shown by a thick line in Fig. 2.
[0022] The tensile strength of the dummy wire 7 itself is lower than that of the main wire 6. Therefore, when the molten sealing resin 8 with high viscosity is injected into a mold in the molding process, the dummy wire 7 is more likely to break than the main wire 6 due to the viscous resistance of the sealing resin 8.
[0023] In order to make the tensile strength of the dummy wire 7 itself lower than that of the main wire 6 itself, the dummy wire 7 may differ from the main wire 6 in diameter, height, length, and material. For example, if the diameter of the dummy wire 7 is smaller than that of the main wire 6 and the height, length, and material of these wires are the same, the tensile strength of the dummy wire 7 itself will be lower than the tensile strength of the main wire 6 itself.
[0024] The bending strength of the dummy wire 7 itself may be lower than the bending strength of the main wire 6 itself. Note that the mechanical strength of the wire itself, such as the tensile strength and bending strength, is different from the strength determined not only by the wire but also by members other than the wire, such as the connection strength between the wire and a member other than the wire (e.g., the semiconductor switching element 1 or the terminal 5b). In addition, the two are different from the viewpoint that the smaller the diameter of the wire, the lower the tensile strength of the wire, but the higher the connection strength between the wire and a member other than the wire.
[0025] In addition, taking into consideration the susceptibility of the dummy wires 7 to breakage due to the molten sealing resin 8 in the molding process, the distance of the dummy wires 7 from the injection port of the molten sealing resin 8 and the angle of the extending direction of the dummy wires 7 with respect to the flow direction of the molten sealing resin 8 may be set. The position of the injection port of the molten sealing resin 8 corresponds to the position of the convex-shaped resin injection mark 8a on the completed sealing resin 8 in FIG. 1.
[0026] It is preferable that the dummy wire 7 is provided as close as possible to the injection port of the molten sealing resin 8 (i.e., the resin injection mark 8a). For this reason, in the example of Fig. 1, the dummy wire 7 is provided in parallel with the main wire 6 that is closest to the resin injection mark 8a. However, the position of the dummy wire 7 is not limited to this, and the dummy wire 7 may be provided in parallel with other main wires 6.
[0027] Moreover, it is preferable that the dummy wire 7 is provided in a portion that does not affect the operation of the semiconductor device. In a configuration in which the dummy wire 7 is connected in parallel to the main wire 6 as in Fig. 1, even if the dummy wire 7 is broken and comes into contact with the main wire 6, the main wire 6 and the dummy wire 7 are originally electrically connected to each other, so that the function of the circuit can be substantially maintained.
[0028] 1 and 2, in the first embodiment, the control IC 3 includes a high-voltage HVIC 3a and a low-voltage LVIC 3b. Each of the HVIC 3a and the LVIC 3b receives signals from outside the semiconductor device and transmits internal information to the outside. Signals are transmitted and received between the HVIC 3a or the LVIC 3b and the outside via a terminal 5e.
[0029] The multiple terminals 5e are electrically independent from one another, and the terminals 5e are electrically connected to the HVIC 3a or the LVIC 3b via the lead frame 5 and wires (not shown). As shown in Fig. 1, the control terminals such as the terminal 5e may be provided on the opposite side of the semiconductor switching element 1 to the power terminals such as the terminals 5b to 5d. With this configuration, the distance and insulation between the terminals can be easily ensured.
[0030] The conduction of the semiconductor switching element 1 mounted on the P-side die pad is controlled based on a control signal transmitted from the HVIC 3a to the semiconductor switching element 1 by a control wire 4. The conduction of the semiconductor switching element 1 mounted on any of the U-phase, V-phase, and W-phase die pads is controlled based on a control signal transmitted from the LVIC 3b to the semiconductor switching element 1 by the control wire 4.
[0031] Generally, the current passing through the control wire 4 is smaller than the current passing through the main wire 6. Therefore, the control wire 4 of the HVIC 3a and the LVIC 3b may have a smaller diameter than the main wire 6. With this configuration, a relatively low-cost wire can be used for the control wire 4. Furthermore, the control wire 4 may have a larger diameter than the dummy wire 7. With this configuration, when a molten sealing resin with high viscosity is injected into a mold in the molding process, it is possible to prevent the control wire 4 from breaking due to viscous resistance.
[0032] The heat sink (not shown) is a thermally conductive member for dissipating heat from the semiconductor switching element 1 to the outside of the sealing resin 8.
[0033] The sealing resin 8 has insulating properties and covers the semiconductor switching element 1, the control IC 3, the control wire 4, the lead frame 5 except for the terminals 5b to 5e, the main wires 6, the dummy wires 7, and the heat sink. The terminals 5b to 5e are exposed from the sealing resin 8, and therefore can be electrically connected to the outside of the semiconductor device.
[0034] <Manufacturing method> Fig. 3 is a flowchart showing a method for manufacturing a semiconductor device according to the present embodiment 1. As a preparation step prior to the manufacturing steps of Fig. 3, a conductive member such as a metal plate is pressed to create a lead frame 5. At this point, multiple components of the lead frame 5 are integrated by tie bars and a frame.
[0035] In a power die bonding process of step S1, the semiconductor switching element 1 is bonded to a lead frame 5 with a bonding material. In an IC die bonding process of step S2, the control IC 3 is bonded to the lead frame 5 with a bonding material. If the diode 2 is not integrated with the semiconductor switching element 1, the diode 2 is bonded to the lead frame 5 with a bonding material in a diode die bonding process of step S3. The order of steps S1 to S3 may be changed, and at least two or more of steps S1 to S3 may be performed in parallel. For example, in a configuration in which the semiconductor switching element 1 and the diode 2 are provided on one semiconductor chip as shown in FIG. 1, steps S1 and S3 are performed in parallel.
[0036] In the wire bonding process of step S4, the main wire 6 is electrically connected between the semiconductor switching element 1 and the terminals 5b, 5e, and both ends of the dummy wire 7 are connected to the portion to which both ends of the main wire 6 are connected. In addition, the control wire 4 is electrically connected between the semiconductor switching element 1 and the control IC 3.
[0037] In the molding process of step S5, molten sealing resin 8 is injected into the space of the mold in which the lead frame 5 is set, and then the sealing resin 8 is hardened. As a result, the semiconductor switching elements 1, the control wires 4, the main wires 6, and the dummy wires 7 are covered with the sealing resin 8.
[0038] In a tie bar cutting process of step S6, the tie bars and frame outside the sealing resin 8 are cut to separate a plurality of components of the lead frame 5 such as the terminals 5b to 5e. In a lead cutting and forming process of step S7, the terminals 5b to 5e are partially cut and bent.
[0039] In the inspection process of step S8, an inspection device described below performs an electrical test and analyzes the wires based on the results. Specifically, the inspection device passes a current through the main wire 6 and the dummy wire 7 and measures the voltage or resistance values of the main wire 6 and the dummy wire 7. Note that, although the case where the voltage value is used will be described below, the explanation for the case where the resistance value is used is similar to the explanation for the case where the voltage value is used, since the voltage value and the resistance value are roughly proportional to each other. The inspection device determines the break state of the main wire 6 and the break state of the dummy wire 7 based on the measurement results of the voltage values of the main wire 6 and the dummy wire 7.
[0040] <Inspection process> Next, the inspection process of step S8 will be described in detail. In Fig. 4, the path through which the current flows in the inspection process is indicated by arrows. As shown in Fig. 4, the inspection device 21 measures the voltage values of the main wire 6 and the dummy wire 7 by passing a current between the terminal 5b and the terminal 5c to which the dummy wire 7 is connected while the semiconductor switching element 1 to which the dummy wire 7 is connected is turned on.
[0041] 5 is a histogram showing the relationship between the number of completed semiconductor devices and the voltage values of the main wires 6 and the dummy wires 7. If the dummy wires 7 are about to break or have broken, the voltage values of the main wires 6 and the dummy wires 7 will be greater than the upper standard value in FIG. 5. Therefore, the inspection device 21 determines that the dummy wires 7 are about to break or have broken when the voltage values of the main wires 6 and the dummy wires 7 are greater than the upper standard value. When a manufacturing worker receives such a determination result from the inspection device 21, the manufacturing worker can determine that there is a possibility that the main wires 6 are about to break.
[0042] Furthermore, the inspection device 21 determines that the main wire 6 is about to break or has broken when the voltage values of the main wire 6 and the dummy wire 7 are greater than another threshold value that is greater than the upper limit of the standard. When a manufacturing worker receives such a determination result from the inspection device 21, the manufacturing worker can determine that the main wire 6 is in a worse state than the state of being about to break, that is, that there is a possibility that the main wire 6 has broken.
[0043] <Summary of the first embodiment> The semiconductor device according to the first embodiment as described above includes the dummy wires 7, the tensile strength of which is lower than that of the main wires 6. With this configuration, after the sealing resin 8 is formed, it is possible to determine whether the main wires 6 and the dummy wires 7 are broken based on the measurement results of the voltage values or resistance values of the main wires 6 and the dummy wires 7. With this configuration, a manufacturing worker can easily determine whether the main wires 6 are about to break or have already broken due to a molding process or the like.
[0044] <Embodiment 2> 6 is a plan view showing a configuration of a semiconductor device according to the second embodiment. In the first embodiment, the dummy wire 7 is provided in parallel with the main wire 6, and is electrically connected between the semiconductor switching element 1 and the terminal 5b. In contrast, in the second embodiment, the main wire 6 is electrically connected between the semiconductor switching element 1 and the terminal 5b, which is a first terminal, and the dummy wire 7 is electrically connected between the terminal 5c, which is a second terminal, and the floating terminal 5f, which is a third terminal. The floating terminal 5f is a terminal that has a floating potential independent of the circuit of the semiconductor device.
[0045] Next, the method for manufacturing a semiconductor device according to the second embodiment will be mainly described with respect to the differences from the method for manufacturing a semiconductor device according to the first embodiment.
[0046] In the wire bonding process of step S4, a dummy wire 7 is electrically connected between the terminal 5c and the floating terminal 5f.
[0047] In the inspection process of step S8, inspection device 21 measures the voltage value or resistance value of main wire 6 and the voltage value or resistance value of dummy wire 7. In the configuration according to the second embodiment as shown in FIG. 6, it is possible to measure the voltage value or resistance value of main wire 6 and the voltage value or resistance value of dummy wire 7 separately. Inspection device 21 determines the break state of the dummy wire based on the measurement result of the voltage value or resistance value of dummy wire 7, and determines the break state of main wire 6 based on the measurement result of the voltage value or resistance value of main wire 6.
[0048] <Summary of the second embodiment> According to the semiconductor device of the second embodiment as described above, similarly to the first embodiment, a manufacturing worker can easily determine whether the main wire 6 is about to break or has already broken during a molding process or the like. Moreover, since the dummy wire 7 is electrically connected to the floating terminal 5f, it is possible to prevent the circuit configuration from becoming complicated.
[0049] In the above description, the first terminal is the terminal 5b, the second terminal is the terminal 5c, and the third terminal is the floating terminal 5f, but this is not limited to the above. For example, both the second terminal and the third terminal may be floating terminals. Also, as long as the potential of the second terminal and the potential of the third terminal are the same, for example, the second terminal and the third terminal may be the same terminal.
[0050] <Modification> In the above description, the lead frame 5 is used as the die pad 5a, but the present invention is not limited to this. For example, although not shown, an insulating substrate having a conductive circuit pattern on one surface may be used as the die pad instead of the lead frame 5. In such a configuration, the circuit pattern that is not electrically connected to the semiconductor switching element 1 may be connected to a wire or terminal by ultrasonic waves, or may be connected to a wire or terminal by soldering.
[0051] It should be noted that the embodiments and modifications may be freely combined, and the embodiments and modifications may be modified or omitted as appropriate.
[0052] Various aspects of the present disclosure are summarized below as appendices.
[0053] (Appendix 1) A semiconductor element; The terminals and a main wire electrically connected between the semiconductor element and the terminal; a dummy wire having both ends connected to a portion to which both ends of the main wire are connected and having a tensile strength lower than that of the main wire; a sealing resin that covers the semiconductor element, the main wires, and the dummy wires; A semiconductor device comprising:
[0054] (Appendix 2) A semiconductor element; A first terminal, a second terminal, and a third terminal; a main wire electrically connected between the semiconductor element and the first terminal; a dummy wire electrically connected between the second terminal and the third terminal, the dummy wire having a tensile strength lower than that of the main wire; a sealing resin that covers the semiconductor element, the main wires, and the dummy wires; A semiconductor device comprising:
[0055] (Appendix 3) The semiconductor device according to claim 1 or 2, The semiconductor device further comprises a control wire that transmits a control signal for controlling energization of the semiconductor element and has a smaller diameter than the main wire.
[0056] (Appendix 4) 4. The semiconductor device according to claim 3, The control wire has a diameter larger than that of the dummy wire.
[0057] (Appendix 5) electrically connecting main wires between the semiconductor device and the terminals; a step of connecting both ends of a dummy wire, the dummy wire having a tensile strength lower than that of the main wire itself, to a portion where both ends of the main wire are connected; covering the semiconductor element, the main wires, and the dummy wires with a sealing resin; determining a breakage state of the dummy wire based on the measurement results of the voltage value or the resistance value of the main wire and the dummy wire; A manufacturing method of a semiconductor device comprising:
[0058] (Appendix 6) A method for manufacturing the semiconductor device according to claim 5, comprising the steps of: The method for manufacturing a semiconductor device further comprises the step of determining a break state of the main wire based on the measurement result.
[0059] (Appendix 7) electrically connecting a main wire between the semiconductor device and the first terminal; electrically connecting a dummy wire between a second terminal and a third terminal, the dummy wire having a tensile strength lower than that of the main wire; covering the semiconductor element, the main wires, and the dummy wires with a sealing resin; determining a breakage state of the dummy wire based on a measurement result of a voltage value or a resistance value of the dummy wire; A manufacturing method of a semiconductor device comprising:
[0060] (Appendix 8) A method for manufacturing the semiconductor device according to claim 7, comprising the steps of: The method for manufacturing a semiconductor device further comprises the step of determining a break state of the main wire based on a measurement result of a voltage value or a resistance value of the main wire. [Explanation of symbols]
[0061] 1 semiconductor switching element, 4 control wire, 5b to 5e terminals, 5f floating terminal, 6 main wire, 7 dummy wire, 8 sealing resin.
Claims
1. A semiconductor element; The terminals and a main wire electrically connected between the semiconductor element and the terminal; a dummy wire having both ends connected to a portion to which both ends of the main wire are connected and having a tensile strength lower than that of the main wire; a sealing resin that covers the semiconductor element, the main wires, and the dummy wires; A semiconductor device comprising:
2. A semiconductor element; a first terminal, a second terminal, and a third terminal; a main wire electrically connected between the semiconductor element and the first terminal; a dummy wire electrically connected between the second terminal and the third terminal, the dummy wire having a tensile strength lower than that of the main wire; a sealing resin that covers the semiconductor element, the main wires, and the dummy wires; A semiconductor device comprising:
3. 3. The semiconductor device according to claim 1, The semiconductor device further comprises a control wire that transmits a control signal for controlling energization of the semiconductor element and has a smaller diameter than the main wire.
4. 4. The semiconductor device according to claim 3, The control wire has a diameter larger than that of the dummy wire.
5. electrically connecting main wires between the semiconductor device and the terminals; a step of connecting both ends of a dummy wire, the dummy wire having a tensile strength lower than that of the main wire itself, to a portion where both ends of the main wire are connected; covering the semiconductor element, the main wires, and the dummy wires with a sealing resin; determining a breakage state of the dummy wire based on the measurement results of the voltage value or the resistance value of the main wire and the dummy wire; A manufacturing method of a semiconductor device comprising:
6. 6. The method for manufacturing a semiconductor device according to claim 5, The method for manufacturing a semiconductor device further comprises the step of determining a break state of the main wire based on the measurement result.
7. electrically connecting a main wire between the semiconductor device and the first terminal; electrically connecting a dummy wire between a second terminal and a third terminal, the dummy wire having a tensile strength lower than that of the main wire; covering the semiconductor element, the main wires, and the dummy wires with a sealing resin; determining a breakage state of the dummy wire based on a measurement result of a voltage value or a resistance value of the dummy wire; A manufacturing method of a semiconductor device comprising:
8. 8. The method of manufacturing a semiconductor device according to claim 7, The method for manufacturing a semiconductor device further comprises the step of determining a break state of the main wire based on a measurement result of a voltage value or a resistance value of the main wire.
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