Display device

Abstract

To provide a display device capable of having higher display quality.SOLUTION: A display device includes a display panel PNL. The second substrate SUB2 of the display panel PNL includes a transparent base material 20, a transparent conductive layer TL, a metal wire ML1, and an optical layer OP. The transparent conductive layer TL exists between the main surface Sf1 of the base material 20 and a liquid crystal layer 30. The metal wire ML1 exists between the main surface Sf1 and the transparent conductive layer TL, and is in contact with the transparent conductive layer TL. The optical layer OP exists between the main surface Sf1 and the transparent conductive layer TL, is made to overlap the metal wire ML1, and has a lower refractive index than that of the base material 20.SELECTED DRAWING: Figure 15

Description

[Technical field]

[0001] The present embodiment relates to a display device. [Background technology]

[0002] In recent years, display devices have been proposed that include a polymer dispersed liquid crystal (hereinafter sometimes referred to as "PDLC") panel that can switch between a diffusion state that diffuses incident light and a transmission state that transmits the incident light, and that can display an image while allowing the background to be seen through. In such display devices, one frame period has multiple subframe periods, and a multi-color display is achieved by displaying an image while switching the display color for each subframe period. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2019-174531 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present embodiment provides a display device capable of improving the display quality. [Means for solving the problem]

[0005] A display device according to an embodiment includes: a display panel having a first substrate, a second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate and including stripes of polymer and liquid crystal molecules; The second substrate is a transparent first substrate having a first major surface facing the liquid crystal layer, a second major surface opposite to the first major surface, and a first side surface located between the first major surface and the second major surface; a transparent conductive layer located between the first major surface and the liquid crystal layer; a metal wiring located between the first main surface and the transparent conductive layer, the metal wiring being made of a metal and in contact with the transparent conductive layer; a first optical layer located between the first main surface and the transparent conductive layer, overlapping the metal wiring, and having a refractive index lower than that of the first substrate. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a plan view showing an example of the configuration of a display device according to a first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view showing the display device of FIG. 1 in an exploded state. [Diagram 3] FIG. 3 is a diagram showing the main components of the display device of FIG. [Figure 4A] FIG. 4A is a diagram showing a part of a display panel of the display device, and is a diagram showing a schematic view of a liquid crystal layer in a transparent state. [Figure 4B] FIG. 4B is a diagram showing a part of the display panel, and is a diagram showing a schematic diagram of a liquid crystal layer in a scattering state. [Figure 5A] FIG. 5A is a developed cross-sectional view of a display panel and a transparent substrate when the liquid crystal layer is in a transparent state, and also shows light-emitting elements. [Figure 5B] FIG. 5B is a developed cross-sectional view of the display panel and the transparent substrate when the liquid crystal layer is in a scattering state, and also shows light-emitting elements. [Figure 6] FIG. 6 is a graph showing the scattering characteristics of a liquid crystal layer. [Figure 7A] FIG. 7A is a diagram showing an overview of one-line inversion driving. [Figure 7B] FIG. 7B is a diagram showing an overview of two-line inversion driving. [Figure 7C] FIG. 7C is a diagram illustrating an overview of frame inversion driving. [Figure 8] FIG. 8 is a diagram showing an example of a common voltage and a source line voltage in display driving. [Figure 9] FIG. 9 is a diagram showing an example of a common voltage and a source line voltage in transparent driving. [Figure 10] FIG. 10 is a diagram showing another example of the common voltage and the source line voltage in the transparent driving mode. [Figure 11] FIG. 11 is a diagram illustrating an example of a configuration of the timing controller illustrated in FIG. [Figure 12] FIG. 12 is an exploded perspective view showing the display panel and cover panel of the display device, illustrating the state before the display panel is adhered to the cover panel. [Figure 13] FIG. 13 is a cross-sectional view showing the display device. [Figure 14] FIG. 14 is a cross-sectional view showing the display device in an expanded state, illustrating a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 15] FIG. 15 is an enlarged cross-sectional view showing a part of the display panel, illustrating a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 16] FIG. 16 is an enlarged plan view of a portion of the display panel, showing a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 17] FIG. 17 is an enlarged plan view of a part of a display panel according to Modification 1 of the first embodiment, showing a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 18] FIG. 18 is an enlarged cross-sectional view showing a part of a display panel of a display device according to a second embodiment, showing a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 19] FIG. 19 is an enlarged plan view showing a part of the display panel according to the second embodiment, showing a plurality of metal wirings, a plurality of optical layers, and the like. [Figure 20] FIG. 20 is a plan view showing a display panel and a first light source unit according to the third embodiment. [Figure 21] FIG. 21 is an enlarged plan view showing a first pixel among a plurality of pixels of the display panel according to the third embodiment. [Figure 22] FIG. 22 is an enlarged plan view showing a second pixel among the plurality of pixels of the display panel according to the third embodiment. [Figure 23] FIG. 23 is an enlarged plan view showing a third pixel among the plurality of pixels of the display panel according to the third embodiment. [Figure 24] FIG. 24 is an enlarged plan view showing a fourth pixel among the plurality of pixels of the display panel according to the third embodiment. [Diagram 25] FIG. 25 is an enlarged plan view showing a second pixel of a display panel according to Modification 1 of the third embodiment. [Figure 26] FIG. 26 is an enlarged plan view showing a third pixel of a display panel according to Modification 1 of the third embodiment. [Figure 27] FIG. 27 is an enlarged plan view showing a second pixel of a display panel according to Modification 2 of the third embodiment. [Figure 28] FIG. 28 is an enlarged plan view showing a third pixel of a display panel according to Modification 2 of the third embodiment. [Figure 29] FIG. 29 is an enlarged plan view showing a second pixel of a display panel according to Modification 3 of the third embodiment. [Diagram 30] FIG. 30 is an enlarged plan view showing a third pixel of a display panel according to Modification 3 of the third embodiment. [Diagram 31] FIG. 31 is a cross-sectional view showing a display device according to Modification 4 of the third embodiment, showing a plurality of metal wirings, a plurality of optical layers, and the like. [Diagram 32] FIG. 32 is a plan view showing a display panel, a first light source unit, and a second light source unit according to the fourth modification. [Diagram 33] FIG. 33 is an enlarged plan view showing a sixth pixel of the display panel according to the fourth modification. [Diagram 34] FIG. 34 is an enlarged plan view showing a seventh pixel of the display panel according to the fourth modification. [Diagram 35] FIG. 35 is a cross-sectional view showing a display device according to a fourth embodiment, illustrating a plurality of metal wirings, a plurality of optical layers, and the like. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that the disclosure is merely an example, and those who are skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, in order to make the explanation clearer, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each figure, elements similar to those described above with respect to the previous figures may be given the same reference numerals, and detailed explanations may be omitted as appropriate.

[0008] In each embodiment, a display device to which a polymer dispersed liquid crystal is applied will be described as an example of the display device.

[0009] (First embodiment) FIG. 1 is a plan view showing an example of the configuration of a display device DSP in this embodiment. As shown in FIG. 1, the first direction X and the second direction Y intersect with each other, and the third direction Z intersects with the first direction X and the second direction Y. The first direction X corresponds to the row direction, and the second direction Y corresponds to the column direction. In one example, the first direction X, the second direction Y, and the third direction Z are perpendicular to each other, but may intersect with each other at an angle other than 90 degrees. In this specification, the direction toward the tip of the arrow indicating the third direction Z is referred to as upward (or simply upward), and the direction in the opposite direction from the tip of the arrow is referred to as downward (or simply downward).

[0010] The display device DSP includes a display panel PNL and wiring boards F1, F2, F4, and F5. The display panel PNL includes a display area DA for displaying an image, and a frame-shaped non-display area NDA surrounding the display area DA. The display area DA includes n gate lines G (G1 to Gn), m source lines S (S1 to Sm), and the like. Note that both n and m are positive integers, and n may be equal to m or may be different from m. The gate lines G each extend in a first direction X and are arranged at intervals in a second direction Y. In other words, the gate lines G extend in the row direction. The source lines S each extend in the second direction Y and are arranged at intervals in the first direction X. The display panel PNL has ends E1 and E2 along the first direction X and ends E3 and E4 along the second direction Y.

[0011] The wiring board F1 includes a gate driver GD. A plurality of gate lines G are connected to the gate driver GD. The wiring board F2 includes a source driver SD. A plurality of source lines S are connected to the source driver SD. The wiring boards F1 and F2 are connected to the display panel PNL and the wiring board F4, respectively. The wiring board F5 includes a timing controller TC, a power supply circuit PC, and the like. The wiring board F4 is connected to the connector CT of the wiring board F5. The wiring boards F1 and F2 may be replaced with a single wiring board. Alternatively, the wiring boards F1, F2, and F4 may be replaced with a single wiring board. The gate driver GD, the source driver SD, and the timing controller TC described above constitute the control unit CON of this embodiment, and the control unit CON is configured to control the driving of the plurality of gate lines G, the plurality of source lines S, the plurality of pixel electrodes described later, the common electrode described later, and the light source unit described later.

[0012] Fig. 2 is a cross-sectional view showing an expanded display device DSP of Fig. 1. Here, only a part of the configuration is described in a cross section of the display device DSP in a YZ plane defined by the second direction Y and the third direction Z. Note that Fig. 2 does not show an optical layer, metal wiring, etc., which will be described later.

[0013] As shown in Fig. 2, the display device DSP includes a cover panel CO1. The cover panel CO1 includes a transparent substrate ME1. The transparent substrate ME1 is a cover glass and is made of glass. The transparent substrate ME1 is a non-flexible substrate. The transparent substrate ME1 overlaps at least the entire display area DA.

[0014] The transparent substrate ME1 has a main surface Sa1, a main surface Sa2, a side surface Sb1, and a side surface Sb2. The main surface Sa1 functions as a seventh main surface, the main surface Sa2 functions as an eighth main surface, and the side surface Sb1 functions as a third side surface. The main surface Sa2 is located on the opposite side to the main surface Sa1. The side surface Sb1 is located between the main surface Sa1 and the main surface Sa2. The side surface Sb1 is a first light entrance surface. The side surface Sb2 is located between the main surface Sa1 and the main surface Sa2, and is located on the opposite side to the side surface Sb1. In this embodiment, the side surface Sb1 and the side surface Sb2 are located in the non-display area NDA. The angle between the main surface Sa1 and the side surface Sb1 is θ1. In this embodiment, the angle θ1 is 90°.

[0015] The display panel PNL has a display area DA that displays an image and transmits external light. The display panel PNL faces the main surface Sa1 of the transparent substrate ME1. The display panel PNL is flexible. The display panel PNL includes a first substrate SUB1, a second substrate SUB2, a liquid crystal layer 30 as a display function layer, and the like. The first substrate SUB1 includes a transparent substrate 10, a pixel electrode 11, an alignment film 12, and the like. The pixel electrode 11 is located between the substrate 10 and the liquid crystal layer 30. The second substrate SUB2 includes a transparent substrate 20, a common electrode 21, an alignment film 22, and the like. The substrate 20 functions as a first substrate, and the substrate 10 functions as a second substrate.

[0016] The substrate 20 has a main surface Sf1, a main surface Sf2, a side surface Sc1, and a side surface Sc2. The main surface Sf1 faces the liquid crystal layer 30. The side surface Sc1 is located between the main surfaces Sf1 and Sf2. The side surface Sc2 is located between the main surfaces Sf1 and Sf2. In the substrate 20, the side surface Sc2 is located on the opposite side to the side surface Sc1. The main surface Sf1 functions as a first main surface, the main surface Sf2 functions as a second main surface, and the side surface Sc1 functions as a first side surface.

[0017] The substrate 20 is located between the substrate 10 and the transparent substrate ME1. The pixel electrodes 11 and the common electrode 21 are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The liquid crystal layer 30 is located at least in the display area DA.

[0018] The liquid crystal layer 30 is located between the substrate 10 (first substrate SUB1) and the substrate 20 (second substrate SUB2). More specifically, the liquid crystal layer 30 is located between the alignment film 12 and the alignment film 22. The liquid crystal layer 30 contains polymer dispersed liquid crystal. The liquid crystal layer 30 of this embodiment uses reverse mode polymer dispersed liquid crystal (R-PDLC). The liquid crystal layer 30 maintains the parallelism of incident light when a low voltage is applied, and scatters incident light when a high voltage is applied. The first substrate SUB1 and the second substrate SUB2 are bonded together by a seal material 40. The first substrate SUB1 has an extension EX extending in the second direction Y beyond the side surface Sc1 of the substrate 20.

[0019] The adhesive sheet AD1 is located between the transparent substrate ME1 and the display panel PNL, and adheres the display panel PNL to the transparent substrate ME1. The adhesive sheet AD1 is in contact with and adheres to the transparent substrate ME1 on one side, and in contact with and adheres to the display panel PNL on the other side. The adhesive sheet AD1 overlaps at least the entire display area DA. The adhesive sheet AD1 is formed of an optically clear adhesive (OCA) as a solid adhesive. However, the adhesive sheet AD1 may be formed of a material other than OCA, for example, an optically clear resin (OCR). Furthermore, the display panel PNL and the transparent substrate ME1 may be bonded together. That is, the present embodiment includes a structure in which the display panel PNL and the transparent substrate ME1 are fixed together. Therefore, the adhesive sheet AD1 is also called a fixing member. It is also preferable that no air layer is located between the display panel PNL and the transparent substrate ME1.

[0020] The wiring boards F1 and F2 are connected to the extending portion EX of the first substrate SUB1. The first light source unit LU1 is located in the non-display area NDA outside the display area DA. The first light source unit LU1 includes a light-emitting element LS, a wiring board F6, and the like. The light-emitting element LS is connected to the wiring board F6 and is located on the extension portion EX. The light-emitting element LS is located closer to the side surface Sc1 (side surface Sb1) than the display area DA in the second direction Y, and can irradiate light toward the display area DA. The light-emitting element LS faces the side surface Sb1 and has a light-emitting portion (light-emitting surface) EM that irradiates light to the side surface Sb1.

[0021] As described below, the illumination light emitted from the light-emitting unit EM is incident on the side surface Sb1 and propagates through the transparent substrate ME1 (cover panel CO1), the adhesive sheet AD1, and the display panel PNL. In this embodiment, the light-emitting unit EM also faces the side surface Sc1 of the base material 20, and further irradiates the side surface Sc1 with light.

[0022] The substrate 10 and the substrate 20 are each formed of glass. The substrate 10 has a thickness Tb1, and the substrate 20 has a thickness Tb2. The thicknesses Tb1 and Tb2 are each 0.2 mm or less. More specifically, the thicknesses Tb1 and Tb2 are each 0.1 to 0.2 mm. In this embodiment, the thicknesses Tb1 and Tb2 are each 0.15 mm. By forming the substrate 10 and the substrate 20 thin, it is possible to provide flexibility to the display panel PNL.

[0023] Here, in the direction in which the transparent substrate ME1 and the display panel PNL are aligned, the transparent substrate ME1 has a thickness Ta, and the display panel PNL has a thickness Tb. The thickness Tb includes thickness Tb1, thickness Tb2, the thickness of the liquid crystal layer 30, and the like. It is desirable that the thickness Ta of the transparent substrate ME1 be larger than the thickness Tb of the display panel PNL. In this embodiment, the thickness Ta of the transparent substrate ME1 is larger than the thickness Tb of the display panel PNL. The thickness Ta is 0.7 to 3.0 mm.

[0024] As described above, even if the thickness Tb2 of the base material 20 is reduced, the transparent substrate ME1 has a thickness Ta that is greater than the thickness Tb2. The first light source unit LU1 can irradiate light onto the side surface Sb1 of the transparent substrate ME1. Therefore, compared to the case where the first light source unit LU1 irradiates light onto the side surface Sc1 of the base material 20, the user can better view the display image of the display device DSP. For example, the contrast ratio of the display device DSP can be increased.

[0025] In this embodiment, the first light source unit LU1 irradiates light not only to the side surface Sb1 but also to the side surface Sc1, allowing the user to more clearly view the image displayed on the display device DSP. However, unlike this embodiment, the light emitting element LS may face only the side surface Sb1 and irradiate light only to the side surface Sb1.

[0026] In this embodiment, the transparent substrate ME1 and the display panel PNL are curved. However, the transparent substrate ME1 and the display panel PNL do not have to be curved. In that case, as shown in FIG. 2, the main surface Sa1, the main surface Sf1, etc. only need to be parallel to the XY plane.

[0027] FIG. 3 is a diagram showing the main components of the display device DSP shown in FIG. 3, the display device DSP includes a controller CNT indicated by a dashed line in the figure. The controller CNT includes a timing controller TC, a gate driver GD, a source driver SD, a Vcom circuit VC, a light source driver LSD, and the like.

[0028] The timing controller TC generates various signals based on image data and synchronization signals input from the outside. In one example, the timing controller TC performs predetermined signal processing based on the image data and outputs a video signal generated to the source driver SD. The timing controller TC also outputs control signals generated based on the synchronization signal to the gate driver GD, the source driver SD, the Vcom circuit VC, and the light source driver LSD. The timing controller TC will be described in detail later.

[0029] A plurality of pixels PX are arranged in a display area DA indicated by a two-dot chain line in the figure. Each pixel PX includes a switching element SW and a pixel electrode 11. The switching element SW is formed of, for example, a thin film transistor. The switching element SW is electrically connected to a gate line G and a source line S. A plurality of pixel electrodes 11 are located in the display area DA and are arranged in a matrix. Therefore, for example, a plurality of pixel electrodes 11 are arranged in a plurality of rows. The pixel electrodes 11 are connected to the source line S via the switching element SW. A common electrode 21 is located in the display area DA. The common electrode 21 faces the plurality of pixel electrodes 11. Unlike this embodiment, the common electrode 21 may be divided into at least one pixel PX, each of which is connected to a common line and a common common voltage is applied to the common electrodes 21.

[0030] A gate signal is supplied to each of the gate lines G from the gate driver GD. A video signal (image signal) is supplied to each of the source lines S from the source driver SD. A common voltage Vcom is supplied to the common electrode 21 from the Vcom circuit VC. The video signal supplied to the source line S is applied to the pixel electrode 11 connected to the switching element SW during a period in which the switching element SW is in a conductive state based on the gate signal supplied to the gate line G. In the following description, applying a video signal to the pixel electrode 11 to form a potential difference between the pixel electrode 11 and the common electrode 21 may be described as writing a video signal to the pixel PX including the pixel electrode 11 (or applying a voltage).

[0031] The first light source unit LU1 is configured to irradiate the liquid crystal layer 30 with light. In this embodiment, the first light source unit LU1 is configured to irradiate the liquid crystal layer 30 with light of a color other than achromatic colors. The first light source unit LU1 includes light-emitting elements LS of multiple colors. For example, the first light source unit LU1 includes a light-emitting element (first light-emitting element) LSR that irradiates the liquid crystal layer 30 with light of a first color, a light-emitting element (second light-emitting element) LSG that irradiates the liquid crystal layer 30 with light of a second color, and a light-emitting element (third light-emitting element) LSB that irradiates the liquid crystal layer 30 with light of a third color. It goes without saying that the first color, the second color, and the third color are different from each other. In this embodiment, the first color is red, the second color is green, and the third color is blue.

[0032] The light source driver LSD controls the lighting periods of these light emitting elements LSR, LSG, and LSB. As will be described in detail later, in a driving method in which one frame period has multiple subframe periods, at least one of the three light emitting elements LSR, LSG, and LSB lights up in each subframe, and the color of the illumination light is switched for each subframe.

[0033] An example of the configuration of a display device including a liquid crystal layer 30 that is a polymer dispersed liquid crystal layer will be described below. FIG. 4A is a diagram showing a part of the display panel PNL, and is a diagram showing a schematic view of the liquid crystal layer 30 in a transparent state.

[0034] As shown in FIG. 4A, the liquid crystal layer 30 includes a liquid crystal polymer 31, which is a streaky polymer, and liquid crystal molecules 32. The liquid crystal polymer 31 is obtained, for example, by polymerizing a liquid crystal monomer in a state where the liquid crystal monomer is aligned in a predetermined direction by the alignment restraining force of the alignment films 12 and 22. The liquid crystal molecules 32 are dispersed in the liquid crystal monomer, and are aligned in a predetermined direction depending on the alignment direction of the liquid crystal monomer when the liquid crystal monomer is polymerized. In this embodiment, the alignment films 12 and 22 are horizontal alignment films that initially align the liquid crystal monomer and the liquid crystal molecules 32 along the XY plane defined by the first direction X and the second direction Y. The liquid crystal molecules 32 are positive-type liquid crystal molecules having a positive dielectric anisotropy. However, unlike this embodiment, the alignment films 12 and 22 may be vertical alignment films that initially align the liquid crystal monomer and the liquid crystal molecules 32 along the third direction Z. In addition, the liquid crystal molecules 32 may be negative type liquid crystal molecules having negative dielectric anisotropy.

[0035] The liquid crystal polymer 31 and the liquid crystal molecules 32 have the same optical anisotropy. Alternatively, the liquid crystal polymer 31 and the liquid crystal molecules 32 have approximately the same refractive index anisotropy. That is, the liquid crystal polymer 31 and the liquid crystal molecules 32 have approximately the same ordinary refractive index and extraordinary refractive index. The ordinary refractive index and extraordinary refractive index of the liquid crystal polymer 31 and the liquid crystal molecules 32 do not have to be completely the same, and deviations due to manufacturing errors and the like are allowed. In addition, the responsiveness of the liquid crystal polymer 31 and the liquid crystal molecules 32 to an electric field is different. That is, the responsiveness of the liquid crystal polymer 31 to an electric field is lower than that of the liquid crystal molecules 32 to an electric field.

[0036] The example shown in Figure 4A corresponds to, for example, a state in which no voltage is applied to the liquid crystal layer 30 (a state in which the potential difference between the pixel electrode 11 and the common electrode 21 is zero), or a state in which a second transparent voltage described later is applied to the liquid crystal layer 30.

[0037] 4A, the optical axis Ax1 of the liquid crystal polymer 31 and the optical axis Ax2 of the liquid crystal molecule 32 are parallel to each other. In the illustrated example, both the optical axis Ax1 and the optical axis Ax2 are parallel to the first direction X. The optical axis here corresponds to a line parallel to the traveling direction of a light ray whose refractive index has one value regardless of the polarization direction.

[0038] As described above, the liquid crystal polymer 31 and the liquid crystal molecules 32 have substantially the same refractive index anisotropy, and the optical axes Ax1 and Ax2 are parallel to each other, so that there is almost no difference in refractive index between the liquid crystal polymer 31 and the liquid crystal molecules 32 in all directions including the first direction X, the second direction Y, and the third direction Z. Therefore, the light L1 incident on the liquid crystal layer 30 in the third direction Z is transmitted through the liquid crystal layer 30 without being substantially scattered. The liquid crystal layer 30 can maintain the parallelism of the light L1. Similarly, the light L2 and L3 incident in an oblique direction inclined to the third direction Z are hardly scattered in the liquid crystal layer 30. Therefore, high transparency is obtained. The state shown in FIG. 4A is called a "transparent state".

[0039] FIG. 4B is a diagram showing a part of the display panel PNL, and is a diagram showing a schematic view of the liquid crystal layer 30 in a scattering state. As shown in FIG. 4B, as described above, the responsiveness of the liquid crystal polymer 31 to the electric field is lower than that of the liquid crystal molecules 32 to the electric field. Therefore, in a state where a voltage (scattering voltage described later) higher than each of the second transparent voltage and the first transparent voltage described later is applied to the liquid crystal layer 30, the alignment direction of the liquid crystal polymer 31 hardly changes, whereas the alignment direction of the liquid crystal molecules 32 changes according to the electric field. That is, as shown in the figure, the optical axis Ax1 is almost parallel to the first direction X, whereas the optical axis Ax2 is inclined with respect to the first direction X. Therefore, the optical axes Ax1 and Ax2 intersect with each other. Therefore, a large refractive index difference occurs between the liquid crystal polymer 31 and the liquid crystal molecules 32 in all directions including the first direction X, the second direction Y, and the third direction Z. As a result, the light L1 to L3 incident on the liquid crystal layer 30 is scattered within the liquid crystal layer 30. The state shown in FIG. 4B is called a "scattering state". The control unit CON switches the liquid crystal layer 30 to at least one of a transparent state and a scattering state.

[0040] 5A is a cross-sectional view showing the display panel PNL and the transparent substrate ME1 in an expanded state when the liquid crystal layer 30 is in a transparent state, and also shows the light-emitting element LS. As shown in FIG. 5A, the base material 10 has a lower surface 10B, and the base material 20 has an upper surface 20T. Illumination light emitted from the light-emitting element LS enters the cover panel CO1 and the display panel PNL from the side surface Sb1 of the transparent substrate ME1 and the side surface Sc1 of the base material 20.

[0041] For example, illumination light L11 emitted from the light-emitting element LS and incident on the side surface Sb1 of the transparent substrate ME1 propagates through the transparent substrate ME1, the adhesive sheet AD1, the base material 20, the liquid crystal layer 30, the base material 10, etc. When the liquid crystal layer 30 is in a transparent state, the illumination light L11 is hardly scattered by the liquid crystal layer 30, and therefore hardly leaks out from the lower surface 10B of the base material 10 and the main surface Sa2 of the transparent substrate ME1 to the outside.

[0042] External light L12 incident on the display panel PNL is transmitted through the liquid crystal layer 30 with almost no scattering. That is, external light incident on the display panel PNL from the lower surface 10B is transmitted through the main surface Sa2 of the transparent substrate ME1, and external light incident from the main surface Sa2 is transmitted through the lower surface 10B. Therefore, when the display device DSP is observed from the main surface Sa2 side, the user can see the background on the lower surface 10B side through the display panel PNL. Similarly, when the display device DSP is observed from the lower surface 10B side, the user can see the background on the main surface Sa2 side through the display panel PNL.

[0043] 5B is a cross-sectional view showing the display panel PNL and the transparent substrate ME1 in an expanded state when the liquid crystal layer 30 is in a scattering state, and also showing the light-emitting element LS. As shown in FIG. 5B, illumination light emitted from the light-emitting element LS is incident on the cover panel CO1 and the display panel PNL from the side surface Sb1 of the transparent substrate ME1 and the side surface Sc1 of the base material 20.

[0044] For example, illumination light L21 emitted from the light-emitting element LS and incident on the side surface Sb1 of the transparent substrate ME1 propagates through the transparent substrate ME1, the adhesive sheet AD1, the base material 20, the liquid crystal layer 30, the base material 10, etc. In the illustrated example, the liquid crystal layer 30 between the pixel electrode 11α and the common electrode 21 (the liquid crystal layer to which the voltage applied between the pixel electrode 11α and the common electrode 21 is applied) is in a transparent state, so that the illumination light L21 is hardly scattered in the region of the liquid crystal layer 30 facing the pixel electrode 11α.

[0045] On the other hand, since the liquid crystal layer 30 between the pixel electrode 11β and the common electrode 21 (the liquid crystal layer to which the voltage is applied between the pixel electrode 11β and the common electrode 21) is in a scattering state, the illumination light L21 is scattered in a region facing the pixel electrode 11β of the liquid crystal layer 30. Of the illumination light L21, a part of the scattered light L211 is emitted to the outside from the principal surface Sa2, and a part of the scattered light L212 is emitted to the outside from the lower surface 10B.

[0046] At the position overlapping with the pixel electrode 11α, the external light L22 incident on the display panel PNL is transmitted through without being scattered by the liquid crystal layer 30, similar to the external light L12 shown in Fig. 5A. At the position overlapping with the pixel electrode 11β, the external light L23 incident from the lower surface 10B is partially transmitted through the principal surface Sa2 after being scattered by the liquid crystal layer 30, at a portion L231. Moreover, the external light L24 incident from the principal surface Sa2 is partially transmitted through the lower surface 10B after being scattered by the liquid crystal layer 30, at a portion L241.

[0047] Therefore, when the display device DSP is observed from the main surface Sa2 side, the color of the illumination light L21 can be visually recognized at the position overlapping with the pixel electrode 11β. In addition, since a part of the external light L231 passes through the display panel PNL, the background on the lower surface 10B side can also be visually recognized through the display panel PNL. Similarly, when the display device DSP is observed from the lower surface 10B side, the color of the illumination light L21 can be visually recognized at the position overlapping with the pixel electrode 11β. In addition, since a part of the external light L241 passes through the display panel PNL, the background on the main surface Sa2 side can also be visually recognized through the display panel PNL. Note that at the position overlapping with the pixel electrode 11α, since the liquid crystal layer 30 is in a transparent state, the color of the illumination light L21 is hardly visually recognized, and the background can be visually recognized through the display panel PNL.

[0048] FIG. 6 is a graph showing the scattering characteristics of the liquid crystal layer 30, and represents the relationship between the voltage VLC applied to the liquid crystal layer 30 and the luminance. The luminance here corresponds to the luminance of the scattered light L211 obtained when the illumination light L21 emitted from the light emitting element LS is scattered by the liquid crystal layer 30, as shown in FIG. 5B for example. From another viewpoint, this luminance represents the degree of scattering of the liquid crystal layer 30.

[0049] As shown in FIG. 6, when the voltage VLC is increased from 0V, the luminance sharply increases from about 8V and saturates at about 20V. Note that even when the voltage VLC is between 0V and 8V, the luminance slightly increases. In this embodiment, the voltage in the region surrounded by the two-dot chain line, that is, the range of 8V to 16V, is used for the gradation expression (for example, 256 gradations) of each pixel PX. Hereinafter, the voltage of 8V < VLC ≤ 16V is referred to as the'scattering voltage'. In addition, in this embodiment, the voltage in the region surrounded by the one-dot chain line, that is, 0V ≤ VLC ≤ 8V, is referred to as the 'transparent voltage'. The transparent voltage VA includes the first transparent voltage VA1 and the second transparent voltage VA2 described above. Note that the lower limit value and the upper limit value of the scattering voltage VB and the transparent voltage VA are not limited to this example, and can be appropriately determined according to the scattering characteristics of the liquid crystal layer 30.

[0050] Here, the degree of scattering when the degree of scattering of light incident on the liquid crystal layer 30 is highest when a scattering voltage VB is applied to the liquid crystal layer 30 is set to 100%. Here, the degree of scattering when a scattering voltage VB of 16V is applied to the liquid crystal layer 30 is set to 100%. For example, the transparent voltage VA can be defined as the range of voltage VLC where the degree of scattering (brightness) is less than 10%. Alternatively, the transparent voltage VA can be defined as a voltage VLC equal to or lower than the voltage corresponding to the lowest grayscale (8V in the example of FIG. 6). Furthermore, the transparent voltage VA (the first transparent voltage VA1 and the second transparent voltage VA2) may be different from the example shown in Fig. 6. For example, the first transparent voltage VA1 may be a voltage that results in a scattering degree in the range of 10% to 50%. Furthermore, the second transparent voltage VA2 may be a voltage that results in a scattering degree in the range of less than 10%.

[0051] 6 is applicable to cases where the polarity of the voltage applied to the liquid crystal layer 30 is positive (+) or negative (-). In the latter case, the voltage VLC is the absolute value of the negative voltage.

[0052] The display device DSP can employ polarity inversion driving that inverts the polarity of the voltage applied to the liquid crystal layer 30. Figures 7A, 7B, and 7C are diagrams showing an overview of polarity inversion driving. 7A shows one-line inversion driving in which the voltage applied to the liquid crystal layer 30 (voltage written to the pixels PX) is inverted between positive polarity (+) and negative polarity (-) for each group of pixels PX (one line) connected to one gate line G. In such a driving method, for example, the polarity of the common voltage supplied to the common electrode 21 and the polarity of the video signal supplied from the source driver SD to the source line S (polarity of the source line voltage) are inverted for each horizontal period in which the gate driver GD supplies a gate signal to the gate line G. In the same horizontal period, the polarity of the common voltage and the polarity of the video signal are, for example, opposite to each other.

[0053] 7B shows two-line inversion driving in which the voltage applied to the liquid crystal layer 30 is inverted between positive polarity (+) and negative polarity (-) every two lines. The example is not limited to that shown in FIG. 7A and FIG. 7B, and the polarity may be inverted every three or more lines.

[0054] 7C shows frame inversion driving in which the voltage applied to the liquid crystal layer 30 is inverted between positive (+) and negative (-) polarities for each frame period in which an image corresponding to one piece of image data is displayed. In such a driving method, for example, the polarity of the common voltage and the polarity of the video signal are inverted for each frame period. In the same frame period, the polarity of the common voltage and the polarity of the video signal are, for example, opposite to each other.

[0055] FIG. 8 is a diagram showing an example of a common voltage Vcom supplied to the common electrode 21 and a source line voltage Vsig supplied to the source line S (or pixel electrode 11) in a display drive that applies the one-line inversion drive shown in FIG. 7A.

[0056] As shown in FIG. 8, for the source line voltage Vsig, a waveform corresponding to the maximum value (max) of the gradation and a waveform corresponding to the minimum value (min) of the gradation are shown. Here, the waveform of the source line voltage Vsig(min) is shown by a solid line, the waveform of the common voltage Vcom is shown by a two-dot chain line, and the waveform of the source line voltage Vsig(max) is shown by a dashed line. In the example of this figure, the common voltage Vcom and the source line voltage Vsig (see the maximum value waveform) are inverted in polarity every frame period Pf. The reference voltage Vsig-c is, for example, 8V. For each of the common voltage Vcom and the source line voltage Vsig, the lower limit is 0V and the upper limit is 16V. However, when the frame period Pf includes multiple subframe periods, the polarity of the common voltage Vcom and the polarity of the source line voltage Vsig may be inverted every frame period Pf, or may be inverted every field period.

[0057] 8, and focusing on polarity inversion driving including the example of FIG. 9 described later, when the driving voltage (voltage written to pixel PX) applied to the liquid crystal layer 30 is positive, the difference (Vsig-Vcom) between the source line voltage Vsig and the common voltage Vcom is 0V or a positive voltage value. On the other hand, when the driving voltage (voltage written to pixel PX) applied to the liquid crystal layer 30 is negative, the difference (Vsig-Vcom) between the source line voltage Vsig and the common voltage Vcom is 0V or a negative voltage value.

[0058] 8, in a period in which a positive voltage is written to the pixel PX, the common voltage Vcom is 0V, and the source line voltage Vsig has a voltage value in the range of 8V or more and 16V or less according to the gradation indicated by the image data. On the other hand, in a period in which a negative voltage is written to the pixel PX, the common voltage Vcom is 16V, and the source line voltage Vsig has a voltage value in the range of 0V or more and 8V or less according to the gradation indicated by the image data. That is, in either case, a voltage in the range of 8V or more and 16V or less is applied between the common electrode 21 and the pixel electrode 11.

[0059] 6, even if the voltage VLC applied to the liquid crystal layer 30 is 8 V, in other words, even if the first transparent voltage VA1 is applied to the liquid crystal layer 30, the liquid crystal layer 30 has a scattering degree of about 0 to 10%. Therefore, even if the source line voltage Vsig is set to the minimum grayscale value, the external light incident on the display panel PNL is slightly scattered, which may reduce the visibility of the background of the display panel PNL. Therefore, by incorporating transparent driving, which makes the voltage between the pixel electrode 11 and the common electrode 21 smaller than the lower limit of the gradation, into the image display sequence, the visibility of the background of the display panel PNL can be improved.

[0060] Here, the relationship between the output of the source driver SD and the common voltage Vcom will be described. When the withstand voltage of the source driver SD is low, the common voltage Vcom is inverted to increase the liquid crystal application voltage. At this time, the source driver SD can only output either a positive source line voltage Vsig (e.g., reference voltage Vsig-c to 16V) or a negative source line voltage Vsig (e.g., 0V to reference voltage Vsig-c) at the same time. The polarity of the common voltage Vcom is opposite to that of the output of the source driver SD.

[0061] However, when a high-voltage source driver SD is used, the relationship between the source line voltage Vsig and the common voltage Vcom may be as described above, or may be as follows: The common voltage Vcom is fixed at 0V, and the source line voltage Vsig output by the source driver SD is 0 to +16V when positive and -16 to 0V when negative.

[0062] 9 is a diagram showing an example of the common voltage Vcom and the source line voltage Vsig in transparent driving, in which the waveform of the source line voltage Vsig is shown by a solid line, and the waveform of the common voltage Vcom is shown by a two-dot chain line. As shown in FIG. 9, like the example in FIG. 8, the common voltage Vcom alternates between 0V and 16V for each frame period Pf. In transparent driving, the voltage value of the source line voltage Vsig coincides with the common voltage Vcom for each frame period Pf (Vsig=Vcom=0V or Vsig=Vcom=16V). In FIG. 9, the source line voltage Vsig and the common voltage Vcom are shown slightly offset from each other for the sake of illustration. Therefore, 0V is applied to the liquid crystal layer 30. In other words, a second transparent voltage VA2 is applied to the liquid crystal layer 30.

[0063] However, the source line voltage Vsig in transparent driving is not limited to the example shown in FIG. 9. For example, during a period when the common voltage Vcom is 0 V, the source line voltage Vsig may exceed 0 V and be less than 8 V (0 V < Vsig < 8 V). During a period when the common voltage Vcom is 16 V, the source line voltage Vsig may exceed 8 V and be less than 16 V (8 V < Vsig < 16 V). In any case, according to transparent driving, the absolute value of the difference between the source line voltage Vsig and the common voltage Vcom is less than 8 V, and the parallelism of the light transmitted through the liquid crystal layer 30 increases. In other words, the second transparent voltage VA2 is not limited to 0 V, and the absolute value of the second transparent voltage VA2 may be less than 8 V.

[0064] Note that in transparent driving, it is sufficient that the voltage applied to the liquid crystal layer 30 is less than the lower limit value of the gradation (for example, 8 V), and the source line voltage Vsig does not have to exactly match the common voltage Vcom. As described above, when the scattering voltage VB is applied to the liquid crystal layer 30, the scattering degree when the scattering degree of the light incident on the liquid crystal layer 30 is the highest is set to 100%. For example, it is desirable that the second transparent voltage VA2 is a voltage at which the scattering degree is less than 10%.

[0065] FIG. 10 is a diagram showing another example of the common voltage Vcom and the source line voltage Vsig in transparent driving. Here, the waveform of the source line voltage Vsig is shown by a solid line, and the waveform of the common voltage Vcom is shown by a two-dot chain line. As shown in FIG. 10, in this example, in transparent driving, the polarity inversion of the common voltage Vcom and the source line voltage Vsig is stopped. Further, the common voltage Vcom and the source line voltage Vsig match at 8 V (the above-mentioned reference voltage Vsig-c). Note that the common voltage Vcom and the source line voltage Vsig may match at a voltage other than the reference voltage Vsig-c, such as 0 V. Also, similar to the case shown in FIG. 9, it is desirable that the second transparent voltage VA2 is a voltage at which the scattering degree is less than 10%. As described above, transparent driving has been described by taking 1-line inversion driving as an example, but the same transparent driving can also be applied to 2-line or more line inversion driving and frame inversion driving.

[0066] Next, a configuration example of the timing controller TC will be described. In this case, a driving method in which one frame period has a plurality of subframe (field) periods is applied to the display device DSP. Such a driving method is called, for example, a field sequential method. In each subframe period, red, green, and blue images are displayed respectively. The images of each color displayed in this time division manner are combined and visually recognized by the user as a multi-color display image.

[0067] FIG. 11 is a diagram showing an example of the configuration of the timing controller TC shown in FIG. As shown in FIG. 11, the timing controller TC includes a timing generation unit 50, a frame memory 51, line memories 52R, 52G, and 52B, a data conversion unit 53, a light source control unit 54, and a detection unit 55 which is an address detection unit.

[0068] Frame memory 51 stores one frame's worth of image data input from the outside. Line memories 52R, 52G, and 52B store red, green, and blue subframe data, respectively. Each subframe data represents a red, green, or blue image (e.g., the gradation value of each pixel PX) to be displayed in a time-division manner in each pixel PX. The subframe data of each color stored in line memories 52R, 52G, and 52B corresponds to the previous frame of image data stored in frame memory 51.

[0069] The data conversion unit 53 performs various data conversion processes such as gamma correction on the subframe data of each color stored in the line memories 52R, 52G, and 52B to generate a video signal, and outputs it to the above-mentioned source driver SD. The timing controller TC may be configured so that the frame memory 51 divides the data into RGB data and sends the RGB data to the data conversion unit 53. In this case, it is also possible to configure the timing controller TC without the line memories 52R, 52G, and 52B.

[0070] The light source control unit 54 outputs a light source control signal to the light source driver LSD described above. The light source driver LSD drives the light emitting elements LSR, LSG, and LSB based on the light source control signal. The light emitting elements LSR, LSG, and LSB can be driven by, for example, PWM (Pulse Width Modulation) control. That is, the light source driver LSD can adjust the luminance of each of the light emitting elements LSR, LSG, and LSB depending on the duty ratio of the signal output to the light emitting elements LSR, LSG, and LSB.

[0071] The timing generation unit 50 controls the operation timings of the frame memory 51, the line memories 52R, 52G, 52B, the data conversion unit 53, and the light source control unit 54 in synchronization with a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync input from the outside. The timing generation unit 50 also controls the source driver SD by outputting a source driver control signal, controls the gate driver GD by outputting a gate driver control signal, and outputs a Vcom control signal.

[0072] The detection unit 55 is configured to detect the address of the image data when the image data of one frame input from the outside includes the image data. The image is a character displayed in a part of the display area DA. The character may be a symbol including a letter, a figure, an icon, or the like. The case where the image data includes character data is a case where at least one of all bits of the digital data includes data other than 0. The address information of the image data is given to the data conversion unit 53. Therefore, when the image data input from the outside includes the image data, the timing controller TC can generate a processed video signal and output it to the source driver SD in order to adjust the degree of scattering (transparency) of the area other than the area where the image is displayed. The processed video signal can be generated by calculation by the data conversion unit 53 or by using data stored in a table 56 of the timing controller TC.

[0073] Next, a process of adhering the display panel PNL to the cover panel CO1 in the manufacturing method of the display device DSP of this embodiment will be described. Fig. 12 is an exploded perspective view showing the display panel PNL and the cover panel CO1 of the display device DSP, showing the state before the display panel PNL is adhered to the cover panel CO1.

[0074] As shown in Fig. 12, a cover panel CO1 is prepared. The transparent substrate ME1 of the cover panel CO1 is formed to be curved. The transparent substrate ME1 is formed to be curved so that the main surface Sa2 side is convex. However, the transparent substrate ME1 may be formed to be curved so that the main surface Sa1 side is convex.

[0075] The transparent substrate ME1 further includes a side surface Sb3 and a side surface Sb4. The side surface Sb1 and the side surface Sb2 each extend in a straight line. More specifically, the long side SI1 of the side surface Sb1 and the long side SI2 of the side surface Sb2 are straight lines. On the other hand, the side surfaces Sb3 and Sb4 each extend in a curved manner. More specifically, the long side SI3 of the side surface Sb3 and the long side SI4 of the side surface Sb4 are curved lines. From the above, the side surface Sb1 facing the light-emitting element LS is a non-curved surface. The cross section of the transparent substrate ME1 on the YZ plane is not curved, but the cross section of the transparent substrate ME1 on the XZ plane is curved.

[0076] Next, the display panel PNL is adhered to the cover panel CO1. At that time, the adhesive sheet AD1 is adhered to one of the display panel PNL and the cover panel CO1. Here, the adhesive sheet AD1 is adhered to the display panel PNL. Then, the display panel PNL and the cover panel CO1 are arranged facing each other. Before adhering the display panel PNL to the cover panel CO1, the display panel PNL is not curved. Then, the display panel PNL is pressed against the cover panel CO1, and the display panel PNL is adhered to the cover panel CO1. As a result, the display panel PNL is curved in accordance with the cover panel CO1.

[0077] Fig. 13 is a cross-sectional view showing a display device DSP according to this embodiment. In Fig. 13, only the base material 10 and the base material 20 of the display panel PNL are shown. As shown in FIG. 13, in a cross section of the display device DSP on a virtual plane parallel to the YZ plane, the cover panel CO1 (transparent substrate ME1), adhesive sheet AD1, and display panel PNL are curved so that the main surface Sa2 side is convex.

[0078] The light-emitting element LS is formed of a light-emitting diode. However, the light-emitting element LS may be a laser or a laser diode. In that case, it is preferable to provide a lens between the light-emitting element LS and the side surfaces Sb1 and Sc1, and to expand the light emitted by the light-emitting element LS in the XY plane direction before it is incident on the side surfaces Sb1 and Sc1.

[0079] The light-emitting element LS can irradiate light onto the side surface Sb1 of the transparent substrate ME1 having a thickness Ta. Since the size of the light-emitting element LS arranged opposite the side surface Sb1 can be increased, the luminance level of the light irradiated by the light-emitting element LS can be increased in proportion to the size. Therefore, the user can clearly view the display image of the display device DSP.

[0080] In this embodiment, it is desirable that the side surface Sb1 and the side surface Sc1 are located on the same plane. Due to the intersection of cutting and lamination during manufacturing, the side surface Sb1 and the side surface Sc1 may not be on the same plane, but may be shifted from the same plane. Furthermore, the light-emitting element LS faces not only the side surface Sb1 of the transparent substrate ME1 but also the side surface Sc1 of the base material 20. The size of the light-emitting element LS can be further increased, and the brightness level of the light emitted by the light-emitting element LS can be further increased. As a result, the user can view the display image of the display device DSP even better.

[0081] FIG. 14 is a cross-sectional view showing a display device DSP according to this embodiment in an expanded form, illustrating a plurality of metal wirings ML1, a plurality of optical layers OP, and the like. 14, the common electrode 21 has a transparent conductive layer TL and a plurality of metal wirings ML1. The transparent conductive layer TL is located between the main surface Sf1 of the substrate 20 and the liquid crystal layer 30. The transparent conductive layer TL is made of a transparent conductive material such as ITO or IZO.

[0082] The metal wiring ML1 is located between the main surface Sf1 and the transparent conductive layer TL and is made of metal. The metal wiring ML1 is in contact with the transparent conductive layer TL. By including the metal wiring ML1 in the common electrode 21, the resistance of the common electrode 21 can be reduced. The second substrate SUB2 includes a plurality of optical layers OP. In this embodiment, the optical layers OP function as first optical layers. The optical layers OP are located between the main surface Sf1 of the base material 20 and the transparent conductive layer TL, and overlap the corresponding metal wirings ML1.

[0083] The substrate 20 and the transparent substrate ME1 are each formed of glass. The refractive index of the substrate 20 and the refractive index of the transparent substrate ME1 are each 1.51. The adhesive sheet AD1 is formed of OCA. The refractive index of the adhesive sheet AD1 is equivalent to that of the substrate 20. Here, "equivalent" does not necessarily mean that the refractive index difference is zero, but also includes the case where the refractive index difference is, for example, less than 0.05. The transparent conductive layer TL is formed of ITO. The refractive index of the transparent conductive layer TL is equivalent to that of the substrate 20. The optical layer OP is formed of an organic material such as a siloxane-based resin or a fluorine-based resin. The refractive index of the optical layer OP is substantially 1.0 to 1.48.

[0084] The refractive index of the optical layer OP is lower than that of the substrate 20. Here, the refractive index of the optical layer OP being lower than that of the substrate 20 includes the case where the difference in refractive index between the optical layer OP and the substrate 20 is 0.03 or more. The optical reflectance at the interface between the substrate 20 and the optical layer OP is higher than the optical reflectance at the interface between the substrate 20 and the transparent conductive layer TL.

[0085] Light is unlikely to escape from the base material 20 to the optical layer OP. Inside the base material 20 and the transparent substrate ME1, the light incident from the side surface Sb1 and the side surface Sc1 can be smoothly propagated to the side surface Sb2 and the side surface Sc2. Therefore, it is possible to prevent the brightness of the image displayed by the display device DSP from differing between the side surface Sc1 and the side surface Sc2.

[0086] The optical layer OP is overlaid on the metal wiring ML1. The optical layer OP can suppress scattering (reflection) of light caused by the metal wiring ML1. Undesired bright spots are less likely to occur in the display area DA, and the contrast ratio of the display device DSP can be increased.

[0087] Fig. 15 is an enlarged cross-sectional view of a portion of the display panel PNL according to this embodiment, showing a plurality of metal wirings ML1, a plurality of optical layers OP, etc. Fig. 16 is an enlarged plan view of a portion of the display panel PNL according to this embodiment, showing a plurality of metal wirings ML1, ML2, a plurality of optical layers OP, etc. With regard to the display panel PNL, Figs. 15 and 16 show only the main parts necessary for explanation. Note that in Fig. 16, a dot pattern is added to the optical layer OP.

[0088] 15 and 16, the common electrode 21 further includes a plurality of metal wirings ML2 and a plurality of metal layers ML3. The plurality of metal wirings ML1 each extend in a first direction X and are arranged at intervals in a second direction Y. The metal wirings ML1 overlap the corresponding gate lines G. The plurality of metal wirings ML2 each extend in the second direction Y and are arranged at intervals in the first direction X. The metal wirings ML2 overlap the corresponding source lines S. The metal layer ML3 is located near an intersection between the corresponding gate lines G and the corresponding source lines S, and overlaps the corresponding switching elements SW.

[0089] The multiple metal wirings ML1, the multiple metal wirings ML2, and the multiple metal layers ML3 are formed in the same layer using the same material. The multiple metal wirings ML1, the multiple metal wirings ML2, and the multiple metal layers ML3 are integrally formed. The multiple metal wirings ML1, the multiple metal wirings ML2, and the multiple metal layers ML3 function as a black matrix and form multiple apertures AP for multiple pixels PX. The multiple optical layers OP are provided in a matrix shape in the first direction X and the second direction Y. The multiple optical layers OP correspond one-to-one to the pixels PX and are provided physically independent of one another.

[0090] The metal wiring ML1, the metal wiring ML2, and the metal layer ML3 are in contact with the main surface Sf1 of the substrate 20. The optical layer OP is located between the metal wiring ML1 and the transparent conductive layer TL, and is in contact with the main surface Sf1 of the substrate 20 and the metal wiring ML1. The optical layer OP is located closer to the transparent conductive layer TL than the metal wiring ML1. The transparent conductive layer TL is in contact with a portion of the metal wiring ML1 that is not in contact with the substrate 20 and the optical layer OP.

[0091] As shown in FIG. 15, the metal wiring ML1 has a main surface Sg1, a main surface Sg2, a side surface Sh1, and a side surface Sh2. The main surface Sg1 is in contact with the main surface Sf1 of the substrate 20. The main surface Sg2 is located on the opposite side to the main surface Sg1. The side surface Sh1 is located between the main surface Sg1 and the main surface Sg2. In the metal wiring ML1, the side surface Sh1 is located on the side of the side surface Sc1. The side surface Sh2 is located between the main surface Sg1 and the main surface Sg2. In the metal wiring ML1, the side surface Sh2 is located on the opposite side to the side surface Sc1. The main surface Sg1 functions as a third main surface, the main surface Sg2 functions as a fourth main surface, and the side surface Sh1 functions as a second side surface.

[0092] The optical layer OP has a side surface Sk1 and a side surface Sk2. In the optical layer OP, the side surface Sk1 is located on the side of the side surface Sc1. In the optical layer OP, the side surface Sk2 is located on the opposite side to the side surface Sk1.

[0093] The optical layer OP has a thickness Top. The thickness Top is the height in the third direction Z from the surface in contact with the main surface Sf1 to the surface in contact with the transparent conductive layer TL in a region not overlapping the metal wiring ML1. The metal wiring ML1 has a thickness Tml. The thickness Tml is the height in the third direction Z from the main surface Sg1 to the main surface Sg2.

[0094] The thickness Top of the optical layer OP is greater than the thickness Tml of the metal wiring ML1. The optical layer OP can cover the entire side surface Sh1 of the metal wiring ML1. Therefore, the optical layer OP can suppress the incidence of light on the side surface Sh1.

[0095] The optical layer OP is in contact with a portion of the main surface Sf1 of the base material 20 closer to the side surface Sc1 than the metal wiring ML1, the side surface Sh1 of the metal wiring ML1, and the main surface Sg2 of the metal wiring ML1. The side surface Sh1 faces the side surface Sc1 (light-emitting element LS) and is therefore more easily hit by light than the side surface Sh2. The optical layer OP can cover the side surface Sh1 facing the side surface Sc1 (light-emitting element LS). This can suppress scattering (reflection) of light at the side surface Sh1. In the direction in which the first light source unit LU1 (light-emitting element LS) emits light (the opposite direction to the second direction Y), the width Wop of the optical layer OP is larger than the width Wml of the metal wiring ML1.

[0096] The metal wiring ML1, the metal wiring ML2, and the metal layer ML3 each have a first metal layer MLa and a second metal layer MLb. The first metal layer MLa is in contact with the main surface Sf1 of the substrate 20. The second metal layer MLb is located closer to the transparent conductive layer TL than the first metal layer MLa, and is laminated on the first metal layer MLa.

[0097] The first metal layer MLa is made of, for example, aluminum (Al). The second metal layer MLb is made of, for example, molybdenum-tungsten (MoW). The second metal layer MLb may be made of molybdenum (Mo), tungsten (W), or chromium (Cr).

[0098] The optical reflectance of the first metal layer MLa is higher than that of the second metal layer MLb. Compared to when the second metal layer MLb is located closer to the base material 20 than the first metal layer MLa, optical absorption in the first metal layer MLa can be suppressed. Light can be effectively propagated through the base material 20, the transparent substrate ME1, etc. The electrical conductivity of the first metal layer MLa is higher than that of the second metal layer MLb. This allows the resistance of the common electrode 21 to be further reduced.

[0099] Although the metal wiring ML1, the metal wiring ML2, and the metal layer ML3 each have a two-layer laminated structure, they may each have a three-layer laminated structure, or each may be formed of a single metal layer.

[0100] According to the display device DSP according to the first embodiment configured as described above, the display device DSP includes a display panel PNL. The display panel PNL has a first substrate SUB1, a second substrate SUB2, and a liquid crystal layer 30. The second substrate SUB2 has a base material 20, a transparent conductive layer TL, metal wiring ML1, and an optical layer OP. When light is incident on the metal wiring ML1, the light is scattered by the metal wiring ML1, resulting in undesired bright spots being generated in the display area DA.

[0101] Therefore, the second substrate SUB2 includes an optical layer OP. The optical layer OP is located between the main surface Sf1 and the transparent conductive layer TL, overlaps the metal wiring ML1, and has a refractive index lower than that of the base material 20. The optical layer OP can suppress scattering (reflection) of light caused by the metal wiring ML1. Undesired bright spots are less likely to occur in the display area DA, and the contrast ratio of the display device DSP can be increased. In addition, the user can easily view the image (character) displayed on the display device DSP. Therefore, it is possible to obtain a display device DSP that can improve the display quality.

[0102] The optical layer OP is provided between the substrate 20 and the liquid crystal layer 30. Compared to the case where the optical layer OP is provided between the transparent substrate ME1 and the substrate 20, the distance in the third direction Z from the optical layer OP to the liquid crystal layer 30 is short. However, in this embodiment, the optical layer OP is provided for each pixel PX. Since the amount of light incident on the liquid crystal layer 30 can be made uniform throughout the entire display area DA, this can contribute to further improving the display quality. In addition to the above, various other preferable effects can be obtained from this embodiment.

[0103] (Modification 1 of the first embodiment) Next, a first modified example of the first embodiment will be described. The display device DSP is configured similarly to the display device DSP of the first embodiment, except for the configuration described in this first modified example. Fig. 17 is an enlarged plan view of a part of the display panel PNL according to the first modified example, showing a plurality of metal wirings ML1, ML2, a plurality of optical layers OP, etc. In Fig. 17, a dot pattern is applied to the optical layer OP.

[0104] 17, the optical layer OP may extend continuously in the first direction X. One optical layer OP is shared by a plurality of pixels PX aligned in the first direction X. In the present modified example 1, the same effects as those of the first embodiment can be obtained.

[0105] Second embodiment Next, the second embodiment will be described. The display device DSP is configured similarly to the display device DSP of the first embodiment, except for the configuration described in the second embodiment. FIG. 18 is a cross-sectional view showing an enlarged portion of the display panel PNL of the display device DSP according to the second embodiment, and is a diagram showing a plurality of metal wirings ML1, a plurality of optical layers OP, etc. FIG. 19 is a plan view showing an enlarged portion of the display panel PNL according to the second embodiment, and is a diagram showing a plurality of metal wirings ML1, a plurality of optical layers OP, etc. In the second embodiment, the display device DSP is not curved. With respect to the display panel PNL, FIG. 18 and FIG. 19 show only the main parts necessary for the description. In FIG. 19, a dot pattern is added to the optical layer OP.

[0106] 18 and 19, the second substrate SUB2 includes a plurality of optical layers OP1 and a plurality of optical layers OP2 instead of the plurality of optical layers OP. The physical properties of the optical layers OP1 and OP2 are the same as the physical properties of the optical layer OP described above. In this embodiment, the optical layer OP1 functions as the first optical layer.

[0107] The multiple optical layers OP1 each extend in a first direction X and are arranged at intervals in a second direction Y. The optical layers OP1 overlap the corresponding gate lines G and also function as a base for the gate lines G. The multiple optical layers OP2 each extend in the second direction Y and are arranged at intervals in the first direction X. The optical layers OP2 overlap the corresponding source lines S and also function as a base for the source lines S. The multiple optical layers OP1 and the multiple optical layers OP2 are formed in the same layer using the same material. The multiple optical layers OP1 and the multiple optical layers OP2 intersect with each other and are formed integrally.

[0108] The optical layer OP1 and the optical layer OP2 are in contact with the main surface Sf1 of the substrate 20. The metal wiring ML1 is located between the optical layer OP1 and the transparent conductive layer TL, and is in contact with the optical layer OP1. The metal wiring ML1 is located on the transparent conductive layer TL side of the optical layer OP1. Similarly, the metal wiring ML2 is located between the optical layer OP2 and the transparent conductive layer TL, and is in contact with the optical layer OP2. The metal wiring ML2 is located on the transparent conductive layer TL side of the optical layer OP2.

[0109] The transparent conductive layer TL is in contact with a portion of the metal wiring ML1 that is not in contact with the optical layer OP1, and the transparent conductive layer TL is in contact with a portion of the metal wiring ML2 that is not in contact with the optical layer OP2.

[0110] In the direction in which the first light source unit LU1 (light-emitting element LS) emits light (the opposite direction to the second direction Y), the width Wop of the optical layer OP1 is larger than the width Wml of the metal wiring ML1. The optical layer OP1 tends to suppress light passing through the main surface Sf1 of the base material 20 and traveling toward the metal wiring ML1, and therefore can suppress scattering (reflection) of light at the metal wiring ML1 (for example, the side surface Sh1). Similarly, the width of the optical layer OP2 is greater than the width of the metal wiring ML2 in the first direction X. The optical layer OP2 can suppress scattering (reflection) of light at the metal wiring ML2 (for example, the side surface of the metal wiring ML2).

[0111] As shown in FIG. 18, the optical layer OP1 has a main surface Sj1 and a main surface Sj2. The main surface Sj1 is in contact with the main surface Sf1 of the base material 20. The main surface Sj2 is located on the opposite side to the main surface Sj1. The main surface Sj1 functions as a fifth main surface, and the main surface Sj2 functions as a sixth main surface. The main surface Sj2 has a contact area CA and a non-contact area NCA. In the second direction Y, the non-contact area NCA is located closer to the side surface Sc1 than the contact area CA. The metal wiring ML1 is in contact with the contact area CA of the main surface Sj2. Since the light passing through the main surface Sf1 of the base material 20 is less likely to hit the side surface Sh1 of the metal wiring ML1, scattering of the light at the side surface Sh1 can be suppressed.

[0112] The optical layer OP1 has a thickness Top. The thickness Top is the height in the third direction Z from the principal surface Sj1 to the principal surface Sj2. The metal wiring ML1 has a thickness Tml. The thickness Tml is the height in the third direction Z from the principal surface Sg1 to the principal surface Sg2. The thickness Top of the optical layer OP1 is greater than the thickness Tml of the metal wiring ML1. Therefore, the optical layer OP1 can further suppress the incidence of light on the side surface Sh1.

[0113] The metal wiring ML1, the metal wiring ML2, and the metal layer ML3 each have a first metal layer MLa and a second metal layer MLb. Focusing on the metal wiring ML1, the first metal layer MLa of the metal wiring ML1 is in contact with the main surface Sj2 of the optical layer OP1. The second metal layer MLb is located closer to the transparent conductive layer TL than the first metal layer MLa, and is laminated on the first metal layer MLa. The first metal layer MLa is made of, for example, Al. The second metal layer MLb is made of, for example, MoW.

[0114] The optical reflectance of the first metal layer MLa is higher than that of the second metal layer MLb. Compared with the case where the second metal layer MLb is located closer to the base material 20 than the first metal layer MLa, the optical absorption in the first metal layer MLa can be suppressed. Even if light passes through the optical layer OP1 and enters the first metal layer MLa, the first metal layer MLa can reflect the light well toward the base material 20, and the light can be well propagated through the base material 20, the transparent substrate ME1, etc. The electrical conductivity of the first metal layer MLa is higher than that of the second metal layer MLb. This can further reduce the resistance of the common electrode 21.

[0115] Although the metal wiring ML1, the metal wiring ML2, and the metal layer ML3 each have a two-layer laminated structure, they may each have a three-layer laminated structure, or each may be formed of a single metal layer.

[0116] In the display device DSP according to the second embodiment configured as above, the same effects as those of the first embodiment can be obtained, and a display device DSP capable of improving display quality can be obtained.

[0117] (Third embodiment) Next, a third embodiment will be described. The display device DSP is configured similarly to the display device DSP of the first embodiment, except for the configuration described in this third embodiment. Fig. 20 is a plan view showing a display panel PNL and a first light source unit LU1 according to this third embodiment. In Fig. 20, a dot pattern is applied to the optical layer 60.

[0118] Fig. 21 is an enlarged plan view showing a first pixel PX1 of the pixels PX of the display panel PNL according to the third embodiment. Fig. 22 is an enlarged plan view showing a second pixel PX2 of the pixels PX of the display panel PNL according to the third embodiment. Fig. 23 is an enlarged plan view showing a third pixel PX3 of the pixels PX of the display panel PNL according to the third embodiment. Fig. 24 is an enlarged plan view showing a fourth pixel PX4 of the pixels PX of the display panel PNL according to the third embodiment.

[0119] In Fig. 21 to Fig. 23, a dot pattern is applied to the optical layer OP. In the third embodiment, the display device DSP is not curved. Regarding the display panel PNL, Fig. 20 to Fig. 24 show only the main parts necessary for the explanation. In Fig. 20, the base material 10 and the like are omitted.

[0120] 20, the pixels PX include a first pixel PX1, a second pixel PX2, a third pixel PX3, and a fourth pixel PX4. The second pixel PX2 is located between the first pixel PX1 and a side surface Sc2 of the substrate 20. The third pixel PX3 is located between the second pixel PX2 and the side surface Sc2. The fourth pixel PX4 is located between the third pixel PX3 and the side surface Sc2.

[0121] The second substrate SUB2 further includes an optical layer 60. The optical layer 60 is located in the non-display area NDA and is formed in a rectangular frame shape. The optical layer 60 and the optical layer OP are formed simultaneously from the same material. The physical properties of the optical layer 60 and the optical layer OP are the same as each other.

[0122] 20 and 21, the first pixel PX1 includes a first pixel electrode 11a of the plurality of pixel electrodes 11, an optical layer OPa of the plurality of optical layers OP, and an opening APa of the plurality of openings AP. The plurality of pixel electrodes 11 are formed under the same conditions. The plurality of openings AP are formed under the same conditions. The plurality of optical layers OP are formed under different conditions depending on the position of the pixel PX.

[0123] The first pixel electrode 11a overlaps at least the entire area of ​​the aperture APa. The optical layer OPa faces the first pixel electrode 11a. In this embodiment, the optical layer OPa faces the entire first pixel electrode 11a. In addition, the optical layer OPa overlaps the entire area of ​​the aperture APa. The optical layer OPa has a width Wopa in the second direction Y. In this embodiment, the optical layer OPa functions as a first optical layer.

[0124] 20 and 22, the second pixel PX2 includes a second pixel electrode 11b of the plurality of pixel electrodes 11, an optical layer OPb of the plurality of optical layers OP, and an aperture APb of the plurality of apertures AP. The first pixel electrode 11a is located between the side surface Sc1 of the base material 20 and the second pixel electrode 11b.

[0125] The optical layer OPb faces the second pixel electrode 11b. In this embodiment, the optical layer OPb faces a part of the second pixel electrode 11b. In addition, the optical layer OPb overlaps a part of the area of ​​the opening APb. For example, the optical layer OPb overlaps 75% of the second pixel electrode 11b. In this embodiment, the optical layer OPb functions as a second optical layer. The optical layer OPb has a width Wopb in the second direction Y. In this embodiment, the width Wopb is smaller than the width Wopa. In a plan view, the size of the optical layer OPa is larger than the size of the optical layer OPb.

[0126] 20 and 23, the third pixel PX3 includes a third pixel electrode 11c among the plurality of pixel electrodes 11, an optical layer OPc among the plurality of optical layers OP, and an aperture APc among the plurality of apertures AP. The second pixel electrode 11b is located between the first pixel electrode 11a and the third pixel electrode 11c.

[0127] The optical layer OPc faces the third pixel electrode 11c. In this embodiment, the optical layer OPc faces a part of the third pixel electrode 11c. In addition, the optical layer OPc overlaps a part of the area of ​​the opening APc. For example, the optical layer OPc overlaps 50% of the third pixel electrode 11c. The optical layer OPc has a width Wopc in the second direction Y. In this embodiment, the width Wopc is smaller than the width Wopb. In a plan view, the size of the optical layer OPb is larger than the size of the optical layer OPc.

[0128] 20 and 24, the fourth pixel PX4 includes a fourth pixel electrode 11d among the plurality of pixel electrodes 11 and an aperture APd among the plurality of apertures AP. The third pixel electrode 11c is located between the second pixel electrode 11b and the fourth pixel electrode 11d. The fourth pixel PX4 does not include an optical layer OP.

[0129] The display device DSP according to the third embodiment configured as above can also obtain the same effects as those of the first embodiment, and can obtain a display device DSP capable of improving display quality. In the display area DA, the optical layers OP are arranged at uniform intervals, but the size of the optical layers OP decreases as they move away from the light emitting elements LS. The amount of light incident on the liquid crystal layer 30 can be made more uniform throughout the display area DA.

[0130] (Modification 1 of the third embodiment) Next, a first modified example of the third embodiment will be described. The display device DSP is configured similarly to the display device DSP of the third embodiment, except for the configuration described in this first modified example. Fig. 25 is an enlarged plan view showing a second pixel PX2 of the display panel PNL according to this first modified example. Fig. 26 is an enlarged plan view showing a third pixel PX3 of the display panel PNL according to this first modified example. Note that in Figs. 25 and 26, a dot pattern is applied to the optical layer OP.

[0131] 20, 25, and 26, when the sizes of the optical layers OP are made different, the width of the optical layers OP in the first direction X may be adjusted. Note that the widths of the multiple optical layers OP in the second direction Y are the same.

[0132] As shown in FIGS. 20, 21, and 25, in the first direction X, the width of the optical layer OPb is smaller than the width of the optical layer OPa. As shown in FIGS. 20, 25, and 26, in the first direction X, the width of the optical layer OPc is smaller than the width of the optical layer OPb. In the present modified example 1 as well, the same effects as those of the third embodiment can be obtained.

[0133] (Modification 2 of the third embodiment) Next, a second modification of the third embodiment will be described. The display device DSP is configured similarly to the display device DSP of the third embodiment, except for the configuration described in this second modification. Fig. 27 is an enlarged plan view showing a second pixel PX2 of the display panel PNL according to this second modification. Fig. 28 is an enlarged plan view showing a third pixel PX3 of the display panel PNL according to this second modification. Note that in Figs. 27 and 28, a dot pattern is applied to the optical layer OP.

[0134] As shown in FIGS. 20, 27, and 28, when the size of the optical layer OP is varied, both the width in the first direction X and the width in the second direction Y of the optical layer OP may be adjusted. 20, 21, and 27, the center of gravity of the optical layer OPb is located at the center of the opening APb. In the first direction X, the width of the optical layer OPb is smaller than the width of the optical layer OPa. In addition, in the second direction Y, the width of the optical layer OPb is smaller than the width of the optical layer OPa. The side surface Sk1 of the optical layer OPb is parallel to the first direction X.

[0135] 20, 27, and 28, the center of gravity of the optical layer OPc is located at the center of the opening APc. In the first direction X, the width of the optical layer OPc is smaller than the width of the optical layer OPb. In addition, in the second direction Y, the width of the optical layer OPc is smaller than the width of the optical layer OPb. The side surface Sk1 of the optical layer OPc is parallel to the first direction X. In the present modified example 2 as well, the same effects as those of the above-described third embodiment can be obtained.

[0136] (Modification 3 of the third embodiment) Next, Modification 3 of the third embodiment will be described. The display device DSP is configured similarly to the display device DSP of Modification 2, except for the configuration described in Modification 3. Fig. 29 is an enlarged plan view showing a second pixel PX2 of the display panel PNL according to Modification 3. Fig. 30 is an enlarged plan view showing a third pixel PX3 of the display panel PNL according to Modification 3. Note that in Figs. 29 and 30, a dot pattern is applied to the optical layer OP.

[0137] 29 and 30, the side surface Sk1 of the optical layer OP may be inclined from the first direction X. In the present modification 3, the side surface Sk1 is inclined from the first direction X by 45°.

[0138] In the present modified example 3, the same effect as in the third embodiment can be obtained. The side surface Sk1 of the optical layer OP is not parallel to the first direction X. Therefore, it is possible to suppress scattering of light at the edge of the optical layer OP, such as the side surface Sk1.

[0139] (Modification 4 of the third embodiment) Next, a fourth modified example of the third embodiment will be described. The display device DSP is configured similarly to the display device DSP of the third embodiment, except for the configuration described in this fourth modified example. Fig. 31 is a cross-sectional view showing the display device DSP according to the fourth modified example, and shows a plurality of metal wirings ML1, a plurality of optical layers OP, and the like.

[0140] As shown in Fig. 31, the display device DSP includes a second light source unit LU2. The first light source unit LU1 and the second light source unit LU2 can irradiate light from both sides of the transparent substrate ME1 and the base material 20. The light-emitting element LS of the second light source unit LU2 is located closer to the side surface Sc2 (side surface Sb2) than the display area DA in the second direction Y, and can irradiate light toward the display area DA. The light-emitting element LS of the second light source unit LU2 faces the side surface Sb2 and has a light-emitting portion (light-emitting surface) EM that irradiates light to the side surface Sb2.

[0141] The illumination light emitted from the light-emitting unit EM is incident on the side surface Sb2 and propagates through the transparent substrate ME1 (cover panel CO1), the adhesive sheet AD1, and the display panel PNL. In this fourth modification, the light-emitting unit EM also faces the side surface Sc2 of the base material 20, and further irradiates the side surface Sc2 with light.

[0142] Fig. 32 is a plan view showing the display panel PNL, the first light source unit LU1, and the second light source unit LU2 according to Modification 4. Note that in Fig. 32, a dot pattern is provided on the optical layer 60. As shown in FIG. 32, the pixels PX include a first pixel PX1, a second pixel PX2, a third pixel PX3, and a fourth pixel PX4, as well as a fifth pixel PX5, a sixth pixel PX6, a seventh pixel PX7, and an eighth pixel PX8. The fifth pixel PX5 is located between the side surface Sc2 of the substrate 20 and the sixth pixel PX6. The sixth pixel PX6 is located between the fifth pixel PX5 and the seventh pixel PX7. The seventh pixel PX7 is located between the sixth pixel PX6 and the eighth pixel PX8. The eighth pixel PX8 is located between the seventh pixel PX7 and the fourth pixel PX4. The fifth pixel PX5 is configured similarly to the first pixel PX1 in FIG. 21. The eighth pixel PX8 is configured similarly to the fourth pixel PX4 in FIG. 24.

[0143] Fig. 33 is an enlarged plan view showing a sixth pixel PX6 of the display panel PNL according to Modification 4. Fig. 34 is an enlarged plan view showing a seventh pixel PX7 of the display panel PNL according to Modification 4. Note that in Figs. 33 and 34, dot patterns are applied to the optical layers OPf and OPg. As shown in FIGS. 32 and 33, the sixth pixel PX6 includes a sixth pixel electrode 11f among the plurality of pixel electrodes 11, an optical layer OPf among the plurality of optical layers OP, and an aperture APf among the plurality of apertures AP.

[0144] The optical layer OPf faces the sixth pixel electrode 11f. In this fourth modification, the optical layer OPf faces a part of the sixth pixel electrode 11f. The optical layer OPf also overlaps a part of the area of ​​the opening APf. For example, the optical layer OPf overlaps 75% of the sixth pixel electrode 11f. The optical layer OPf has a width Wopf in the second direction Y. In this fourth modification, the width Wopf is smaller than the width Wopa in FIG. 21. In a plan view, the size of the optical layer OPa is larger than the size of the optical layer OPg.

[0145] As shown in FIGS. 32 and 34, the seventh pixel PX7 includes a seventh pixel electrode 11g of the multiple pixel electrodes 11, an optical layer OPg of the multiple optical layers OP, and an aperture APg of the multiple apertures AP.

[0146] The optical layer OPg faces the seventh pixel electrode 11g. In this fourth modification, the optical layer OPg faces a part of the seventh pixel electrode 11g. In addition, the optical layer OPg overlaps a part of the area of ​​the opening APg. For example, the optical layer OPg overlaps 50% of the seventh pixel electrode 11g. The optical layer OPg has a width Wopg in the second direction Y. In this fourth modification, the width Wopg is smaller than the width Wopf. In a planar view, the size of the optical layer OPg is larger than the size of the optical layer OPf.

[0147] 31, 33, and 34, the optical layers OPf and OPg can cover the entire side surface Sh2 of the metal wiring ML1. The optical layers OPf and OPg are in contact with a portion of the main surface Sf1 of the base material 20 that is closer to the side surface Sc2 than the metal wiring ML1, the side surface Sh2 of the metal wiring ML1, and the main surface Sg2 of the metal wiring ML1, respectively.

[0148] In the sixth pixel PX6, the seventh pixel PX7, etc., the light emitted by the second light source unit LU2 is more likely to hit the metal wiring ML1 than the light emitted by the first light source unit LU1. Since the side surface Sh2 faces the side surface Sc2 (light-emitting element LS of the second light source unit LU2), the light emitted by the second light source unit LU2 is more likely to hit the side surface Sh2. The optical layers OPf and OPg can cover the side surface Sh2. Therefore, scattering (reflection) of light at the side surface Sh2 can be suppressed.

[0149] In this fourth modified example, the same effect as in the third embodiment can be obtained. Furthermore, the size of the optical layer OP is made smaller as the optical layer OP is farther away from the first light source unit LU1 and the second light source unit LU2. When light is irradiated onto both side surfaces of the transparent substrate ME1, more light can be made to reach the center of the display area DA of the display panel PNL. Therefore, a decrease in the luminance level in the center of the display device DSP can be suppressed.

[0150] (Fourth embodiment) Next, a fourth embodiment will be described. The display device DSP is configured similarly to the display device DSP of the first embodiment, except for the configuration described in this fourth embodiment. FIG. 35 is a cross-sectional view showing the display device DSP according to this fourth embodiment, and shows a plurality of metal wirings ML1, a plurality of optical layers OP, and the like. Note that in this fourth embodiment, the display device DSP is not curved. Regarding the display panel PNL, FIG. 35 shows only the main parts necessary for explanation.

[0151] 35, the display device DSP is formed without a transparent substrate ME1 and an adhesive sheet AD1. The light-emitting element LS of the first light source unit LU1 faces only the side surface Sc1 of the base material 20.

[0152] The display device DSP according to the fourth embodiment configured as described above can also obtain the same effects as those of the first embodiment, and can obtain a display device DSP capable of improving display quality. Since there is no need to attach the display panel PNL to the transparent substrate ME1, it is possible to suppress or prevent foreign matter from entering the display device DSP. When the display panel PNL is attached to the transparent substrate ME1, there is a risk that foreign matter may enter between the transparent substrate ME1 and the display panel PNL. If foreign matter enters, the foreign matter may scatter light, which may cause bright spots.

[0153] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims.

[0154] For example, the first color, the second color, and the third color are not limited to red, green, and blue, respectively. The light source unit LU may include light-emitting elements LS of two or less colors, or may include light-emitting elements LS of four or more colors. Alternatively, the light source unit LU may include white light-emitting elements LS. The number of line memories, subframe data, and subframe periods may be increased or decreased depending on the number of types (number of colors) of the light-emitting elements LS.

[0155] A normal type polymer dispersed liquid crystal may be used for the liquid crystal layer 30. The liquid crystal layer 30 maintains the parallelism of incident light when a high voltage is applied, and scatters the incident light when a low voltage is applied.

[0156] The substrate 10 and the substrate 20 of the display panel PNL may each be formed of a resin. In that case, it is preferable that the substrate 10 and the substrate 20 are each formed of an amorphous resin. An example of the amorphous resin is cycloolefin polymer (COP). By forming the substrate 10 and the substrate 20 from an amorphous resin, scattering of light inside the substrate 10 and the substrate 20 can be suppressed, and light can be guided well.

[0157] The base material 10 and the base material 20 may each be formed of a crystalline resin. An example of the crystalline resin is polyethylene terephthalate (PET). The second substrate SUB2 may further include a transparent insulating layer located between the base material 20 and the optical layer OP. The refractive index of the insulating layer is equal to that of the base material 20.

[0158] Each optical layer OP may correspond to two or more pixels PX. For example, one optical layer OP may be provided for four pixels PX located in two consecutive rows and two consecutive columns. Or, one optical layer OP may be provided for nine pixels PX located in three consecutive rows and three consecutive columns. The first substrate SUB1 may include the optical layer OP instead of the second substrate SUB2, or both the second substrate SUB2 and the first substrate SUB1 may include the optical layer OP. [Explanation of symbols]

[0159] DSP: display device, PNL: display panel, SUB1: first substrate, SUB2: second substrate, 10, 20... substrate, 30... liquid crystal layer, 31... liquid crystal polymer, 32... liquid crystal molecule, PX...pixel, SW...switching element, G...gate line, S...source line, 11...pixel electrode, 21...Common electrode, TL...Transparent conductive layer, ML1,ML2...Metal wiring, ML3...Metal layer, MLa...first metal layer, MLb...second metal layer, AP...opening, OP...optical layer, CO1: Cover panel, ME1: Transparent substrate, AD1: Adhesive sheet, LU1: first light source unit; LU2: second light source unit; LS: light emitting element; Sa,Sf,Sg,Sj...main surface, Sb,Sc,Sh,Sk...side surface, Top, Tml...thickness, Wop, Wml...width, DA...display area, NDA...hidden area, CA...contact area, NCA...non-contact area, X...first direction, Y...second direction, Z...third direction.

Claims

1. a display panel having a first substrate, a second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate and including stripes of polymer and liquid crystal molecules; The second substrate is a transparent first substrate having a first major surface facing the liquid crystal layer, a second major surface opposite to the first major surface, and a first side surface located between the first major surface and the second major surface; a transparent conductive layer located between the first major surface and the liquid crystal layer; a metal wiring located between the first main surface and the transparent conductive layer, the metal wiring being made of a metal and in contact with the transparent conductive layer; a first optical layer located between the first main surface and the transparent conductive layer, overlaid on the metal wiring, and having a refractive index lower than that of the first substrate; Display device.

2. The metal wiring is in contact with the first main surface, the first optical layer is located between the metal wiring and the transparent conductive layer and in contact with the first main surface and the metal wiring; the transparent conductive layer is in contact with a portion of the metal wiring that is not in contact with the first base material and the first optical layer; The display device according to claim 1 .

3. The thickness of the first optical layer is greater than the thickness of the metal wiring. The display device according to claim 2 .

4. Further comprising a light source unit, the display panel has a display area for displaying an image; the light source unit is located on the first side surface side of the display area and emits light toward the display area; The first base material propagates the light emitted by the light source unit, the metal wiring has a third main surface in contact with the first main surface, a fourth main surface opposite to the third main surface, and a second side surface located between the third main surface and the fourth main surface; the second side surface of the metal wiring is located on the first side surface side, The first optical layer is in contact with a portion of the first main surface that is closer to the first side surface than the metal wiring, the second side surface of the metal wiring, and the fourth main surface of the metal wiring. The display device according to claim 2 .

5. the metal wiring has a first metal layer in contact with the first main surface, and a second metal layer located closer to the transparent conductive layer than the first metal layer and stacked on the first metal layer, The light reflectance of the first metal layer is higher than the light reflectance of the second metal layer. The display device according to claim 2 .

6. The first optical layer is in contact with the first major surface, the metal wiring is located between the first optical layer and the transparent conductive layer and in contact with the first optical layer; the transparent conductive layer is in contact with a portion of the metal wiring that is not in contact with the first optical layer; The display device according to claim 1 .

7. The width of the first optical layer is greater than the width of the metal wiring. The display device according to claim 6.

8. Further comprising a light source unit, the display panel has a display area for displaying an image; the light source unit is located on the first side surface side of the display area and emits light toward the display area; The first base material propagates the light emitted by the light source unit, In a direction in which the light source unit emits light, a width of the first optical layer is larger than a width of the metal wiring. The display device according to claim 7.

9. the first optical layer has a fifth major surface in contact with the first major surface and a sixth major surface opposite to the fifth major surface, the sixth main surface has a contact region and a non-contact region located closer to the first side surface than the contact region, the metal wiring is in contact with the contact region of the sixth main surface; The display device according to claim 8.

10. The thickness of the first optical layer is greater than the thickness of the metal wiring. The display device according to claim 9.

11. the metal wiring includes a first metal layer in contact with the first optical layer, and a second metal layer located closer to the transparent conductive layer than the first metal layer and stacked on the first metal layer; The light reflectance of the first metal layer is higher than the light reflectance of the second metal layer. The display device according to claim 6.

12. Further comprising a light source unit, the display panel has a display area for displaying an image, and a first pixel and a second pixel located in the display area; the light source unit is located on the first side surface side of the display area and emits light toward the display area; The first substrate is A transparent second substrate; a first pixel electrode located between the second substrate and the liquid crystal layer; a second pixel electrode located between the second substrate and the liquid crystal layer; the first pixel electrode is located between the first side surface and the second pixel electrode, The second substrate is a second optical layer located between the first main surface and the transparent conductive layer, facing the second pixel electrode, and having a refractive index lower than that of the first substrate; the first optical layer faces the first pixel electrode, In a plan view, the size of the first optical layer is larger than the size of the second optical layer. The display device according to claim 1 .

13. a transparent substrate having a seventh main surface facing the second substrate, an eighth main surface opposite to the seventh main surface, and a third side surface located between the seventh main surface and the eighth main surface; a fixing member positioned between the transparent substrate and the display panel, the fixing member fixing the display panel to the transparent substrate; a light source unit facing the third side surface of the transparent substrate and irradiating the third side surface with light, The display device according to claim 1 .

14. The light source unit further faces the first side surface of the first base material and further irradiates light onto the first side surface. The display device according to claim 13.

15. a display panel including a first substrate, a second substrate, and a liquid crystal layer located between the first substrate and the second substrate; The second substrate is a transparent first substrate having a first major surface facing the liquid crystal layer, a second major surface opposite to the first major surface, and a first side surface located between the first major surface and the second major surface; a transparent conductive layer located between the first major surface and the liquid crystal layer; a metal wiring located between the first main surface and the transparent conductive layer, the metal wiring being made of a metal and in contact with the transparent conductive layer; a first optical layer located between the first main surface and the transparent conductive layer, overlaid on the metal wiring, and having a refractive index lower than a refractive index of the first substrate; a side of the first substrate opposite to the liquid crystal layer is visible through the display panel from the second main surface; Display device.

16. The metal wiring is in contact with the first main surface, the first optical layer is located between the metal wiring and the transparent conductive layer and in contact with the first main surface and the metal wiring; the transparent conductive layer is in contact with a portion of the metal wiring that is not in contact with the first base material and the first optical layer; The display device according to claim 15.

17. The thickness of the first optical layer is greater than the thickness of the metal wiring. The display device according to claim 16.

18. a transparent substrate having a seventh main surface facing the second substrate, an eighth main surface opposite to the seventh main surface, and a third side surface located between the seventh main surface and the eighth main surface; a fixing member positioned between the transparent substrate and the display panel, the fixing member fixing the display panel to the transparent substrate; a light source unit facing the third side surface of the transparent substrate and irradiating the third side surface with light, The display device according to claim 15.

19. The light source unit further faces the first side surface of the first base material and further irradiates light onto the first side surface. The display device according to claim 18.

Images