Printing method and printer

Abstract

To provide a printing method and a printer, which can change an output voltage value of a drive power supply circuit while maintaining printing quality.SOLUTION: A printing method using a printer is provided. The printer includes: a liquid discharge head which has a flow passage substrate formed with an individual flow passage therein and a piezoelectric actuator having an individual electrode, a high potential electrode, and a low potential electrode and applying pressure to liquid in the individual flow passage; a drive power supply circuit which is electrically connected to the individual electrode; a high potential power supply circuit which is electrically connected to the high potential electrode; and a conveying mechanism which conveys a medium. The printing method includes: printing an image on the medium by discharging liquid from the liquid discharge head to the medium conveyed by the conveying mechanism; and changing output voltage values of the drive power supply circuit and the high potential power supply circuit during printing of the image on the medium.SELECTED DRAWING: Figure 11

Description

[Technical field]

[0001] The present invention relates to a printing method using a printing device, and to a printing device. [Background technology]

[0002] Conventionally, there is known a liquid ejection device that includes an inkjet head having a drive element, and a substrate having a drive power supply circuit and a high-potential power supply circuit, the drive power supply circuit and the high-potential power supply circuit being electrically connected to the drive element (see Patent Document 1). In this liquid ejection device, when it becomes necessary to change the output voltage value of the drive power supply circuit and the difference between the output voltage value of the drive power supply circuit and a target voltage value is greater than a predetermined value, the output voltage value of the drive power supply circuit is changed in stages up to the target voltage value. This allows the output voltage value of the drive power supply circuit to be stabilized in a short time at each stage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-171853 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the liquid ejection device described in Patent Document 1, when only the output voltage value of the drive power supply circuit is changed, the difference between the output voltage value of the drive power supply circuit and the output voltage value of the high potential power supply circuit changes before and after the output voltage value of the drive power supply circuit is changed. As a result, the behavior of the piezoelectric actuator changes before and after the output voltage value of the drive power supply circuit is changed, which may cause unstable print quality.

[0005] The present invention has been made to solve the above-mentioned problems, and has an object to provide a printing method and printing apparatus that are capable of changing the output voltage value of a drive power supply circuit while maintaining print quality. [Means for solving the problem]

[0006] According to a first aspect of the present invention, there is provided a printing method using a printing device, comprising the steps of: The printing device includes: a liquid ejection head including a flow path substrate in which individual flow paths are formed, and a piezoelectric actuator having an individual electrode, a high potential electrode, and a low potential electrode, and applying pressure to liquid in the individual flow paths; a power supply circuit board having a drive power supply circuit electrically connected to the individual electrodes and a high potential power supply circuit electrically connected to the high potential electrode; a transport mechanism for transporting the medium; The printing method includes: ejecting liquid from the liquid ejection head onto the medium while transporting the medium by the transport mechanism; changing output voltage values ​​of the drive power supply circuit and the high potential power supply circuit while discharging the liquid from the liquid discharge head onto the medium transported by the transport mechanism.

[0007] According to a second aspect of the present invention, there is provided a liquid ejection head including: a flow path substrate in which individual flow paths are formed; and a piezoelectric actuator having an individual electrode, a high potential electrode, and a low potential electrode, and applying pressure to liquid in the individual flow paths; a power supply circuit board having a drive power supply circuit electrically connected to the individual electrodes and a high potential power supply circuit electrically connected to the high potential electrode; a transport mechanism for transporting the medium; a controller for controlling the liquid ejection head and the transport mechanism, The controller: controlling the transport mechanism to transport the medium, while controlling the liquid ejection head to eject liquid onto the medium; There is provided a printing device in which output voltage values ​​of the drive power supply circuit and the high potential power supply circuit are changed while the liquid is discharged from the liquid discharge head onto the medium transported by the transport mechanism. Effect of the Invention

[0008] According to the first and second aspects of the present invention, there is provided a printing method and a printing apparatus capable of changing the output voltage value of a drive power supply circuit while maintaining print quality. [Brief description of the drawings]

[0009] [Figure 1] FIG. 2 is a plan view illustrating an example of a configuration of a main part of the printing device according to the present embodiment. [Diagram 2] FIG. 2 is a bottom view showing an example of a head according to the present embodiment. [Diagram 3] 4 is a block diagram showing an example of the configuration of a second substrate included in the head of the present embodiment and a flexible circuit board connected to the second substrate. FIG. [Figure 4] FIG. 2 is a diagram showing an example of a circuit configuration of a driver IC. [Diagram 5] 4 is a circuit diagram showing an example of the configuration of a waveform generating circuit included in the head of the present embodiment. FIG. [Figure 6] 4 is a diagram showing an example of the configuration of a power supply circuit included in a second substrate. FIG. [Figure 7] FIG. 2 is a cross-sectional view of the head of the present embodiment. [Figure 8] FIG. 2 is a partial cross-sectional view of the head of the present embodiment. [Figure 9] 9A and 9B are diagrams illustrating the operation of the driving element in the cross section of FIG. 8. [Figure 10] 9A and 9B are diagrams illustrating the operation of the driving element in the cross section of FIG. 8. [Figure 11] FIG. 2 is a diagram showing an outline of a printing flow using the printing device of the present embodiment. [Figure 12] 1A is a table showing an example of voltage values ​​when the output voltage value of each power supply circuit is increased, and FIG. 1B is a diagram showing how the output voltage value of each power supply circuit is increased over time. [Figure 13] 1A is a table showing an example of voltage values ​​when the output voltage value of each power supply circuit is reduced, and FIG. 1B is a diagram showing how the output voltage value of each power supply circuit is reduced over time. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] A printing apparatus according to an embodiment of the present invention will now be described with reference to FIGS. 1 to 13(b).

[0011] In Fig. 1, the upstream side in the transport direction of medium M is defined as the front of the printing device 1, and the downstream side in the transport direction is defined as the rear of the printing device 1. In addition, the direction parallel to the plane along which medium M is transported (the plane parallel to the paper surface of Fig. 1) and perpendicular to the transport direction is defined as the width direction. The left side of the figure is the left of the printing device 1, and the right side of the figure is the right of the printing device 1. Furthermore, the direction perpendicular to the transport plane of medium M (the direction perpendicular to the paper surface of Fig. 1) is defined as the up-down direction of the printing device 1. In Fig. 1, the front side of the paper surface is the top, and the back side of the paper surface is the bottom. In the following explanation, front-back, left-right, up-down will be used as appropriate.

[0012] As shown in FIG. 1, the printing apparatus 1 includes a platen 3 housed in a housing 2, four line heads 4, two transport rollers 5A and 5B, and a controller .

[0013] A medium M such as a recording paper is placed on the upper surface of the platen 3. The four line heads 4 are positioned above the platen 3 so as to face the platen 3. The four line heads 4 are arranged in the front-to-rear direction. The two transport rollers 5A, 5B are positioned in front and rear of the platen 3, respectively. The two transport rollers 5A, 5B are each driven by a motor (not shown) and transport the medium M on the platen 3 downstream (rear) in the transport direction. Note that, although the present embodiment is configured to include four line heads 4, the number of line heads 4 is not limited to four. The two transport rollers 5A, 5B are an example of a transport mechanism of the present invention.

[0014] As shown in FIG. 3, the controller 7 includes a first substrate 71. The first substrate 71 includes a field programmable gate array (FPGA) 711, a read only memory (ROM) (not shown), a random access memory (RAM) (not shown), an EEPROM (registered trademark) 712, and the like. The controller 7 can communicate with an external device 9 such as a personal computer. The controller 7 controls the operation of each line head 4 and the transport rollers 5A and 5B according to a program stored in the ROM in response to an instruction from the external device 9 or an operation unit (not shown) included in the printing device 1. Note that a central processing unit (CPU) or a microprocessor unit (MPU) may be used instead of the FPGA 711.

[0015] For example, the controller 7 controls a motor that drives the transport rollers 5A, 5B to cause the transport rollers 5A, 5B to transport the medium M in the transport direction. The controller 7 also controls each line head 4 to eject ink toward the medium M. This causes an image to be printed on the medium M. The medium M may be a roll-shaped sheet.

[0016] Four head holding parts 8 are attached to the housing 2 corresponding to the four line heads 4. The four head holding parts 8 are arranged in a front-to-back arrangement above the platen 3 and between the transport rollers 5A and 5B. Each head holding part 8 holds one line head 4.

[0017] The four line heads 4 eject ink of four colors, cyan (C), magenta (M), yellow (Y), and black (K), respectively. Each line head 4 is supplied with ink of a corresponding color from an ink tank (not shown).

[0018] 2, each line head 4 of this embodiment includes nine heads 11. The nine heads 11 are arranged in two rows in a staggered manner along the width direction. One color of ink is supplied to one line head 4, and therefore the nine heads 11 included in that one line head 4 eject ink of that one color. Note that, although the line head 4 includes nine heads 11 in this embodiment, the number of heads 11 is not limited to nine.

[0019] In this embodiment, 1680 nozzles 11a are opened on the bottom surface of each head 11, and the 1680 nozzles 11a form a plurality of nozzle rows arranged in the width direction. That is, the head 11 has a plurality of nozzles 11a. Each nozzle row is formed by a plurality of nozzles 11a arranged in the transport direction. In this embodiment, each head 11 is configured to have 1680 nozzles 11a, but the number of nozzles 11a is not limited to 1680.

[0020] Each head 11 is provided with the same number of driving elements 111 (see FIG. 7) as the nozzles 11a, and the second substrate 50 and the flexible circuit board 60 shown in FIG. 3. The printing device 1 of this embodiment is provided with four line heads 4, and each line head 4 is provided with nine heads 11, so that the printing device 1 is provided with 36 heads 11. Therefore, the number of second substrates 50 is also 36, and the number of flexible circuit boards 60 connected to the second substrates 50 is also 36. As shown in FIG. 3, the first substrate 71 of the controller 7 is connected to 36 second substrates 50. Note that in FIG. 3, for convenience, only one second substrate 50 and one flexible circuit board 60 are shown.

[0021] As shown in Fig. 3, the second substrate 50 includes an FPGA 51, a non-volatile memory 52 such as an EEPROM, a DRAM 53 for temporarily storing raster data received from the controller 7, a D / A converter 20, and power supply circuits 21-26. In this embodiment, the second substrate 50 includes six power supply circuits 21-26, but the number of power supply circuits is not limited to six. The power supply circuits 21-25 are an example of the driving power supply circuit of the present invention, and the power supply circuit 26 is an example of the high-potential power supply circuit of the present invention. The flexible circuit substrate 60 includes a non-volatile memory 62 such as an EEPROM, a driver IC 27, and the like.

[0022] Under the control of the FPGA 711 provided on the first board 71, the FPGA 51 outputs to the D / A converter 20 a digital setting signal for setting the output voltage values ​​of the power supply circuits 21-26.

[0023] The D / A converter 20 converts the digital setting signal output by the FPGA 51 into an analog setting signal and outputs it to the power supply circuits 21-26.

[0024] The power supply circuits 21-26 may be DC / DC converters configured with a plurality of electronic components such as FETs, inductors, resistors, and electrolytic capacitors. Each of the power supply circuits 21-26 outputs a voltage (drive voltage) designated by a setting signal to the driver IC 27. That is, the FPGA 51 adjusts the output voltage value of each of the power supply circuits 21-26. In this embodiment, different output voltage values ​​are set in advance for the power supply circuits 21-26. The detailed configuration of the power supply circuits 21-26 will be described later.

[0025] The driver IC 27 is connected to the power supply circuits 21 to 25 via wiring VDD1 to VDD5, respectively, and is connected to the power supply circuit 26 via wiring HVDD. The power supply circuit 26 is connected to a driving element 111 (see FIG. 7) described below via wiring VCOM. The wiring HVDD and wiring VCOM are formed by branching a wiring drawn from the power supply circuit 26 into two wirings midway along the path.

[0026] The power supply circuit 26 can be used as a power supply voltage for VCOM of the driving element 111, or HVDD (high-side backgate voltage) of PMOS transistors 311 to 315 (see FIG. 5) which will be described later.

[0027] The driver IC 27 is connected to n (n is a natural number of 2 or more, and in this embodiment, n is equal to the number of drive elements 111 in the head 11, i.e., 1680) signal lines 34(1) to 34(n). The driver IC 27 is connected to the n drive elements 111 via the n signal lines 34(1) to 34(n). Each signal line 34 is connected to an individual electrode of the drive element 111.

[0028] The non-volatile memory 52 stores a nozzle ID for identifying each nozzle 11a. The non-volatile memory 52 also stores, for example, a correspondence relationship between the n nozzles 11a and the five power supply circuits 21-25. That is, each of the multiple nozzles 11a is associated with one of the multiple power supply circuits 21-25. These correspondence relationships may be stored in a non-volatile memory 62 provided on the flexible circuit board 60, instead of in the non-volatile memory 52.

[0029] The driver IC 27 is connected to the FPGA 51 via n control lines 33(1) to 33(n) and a control line 40.

[0030] The control lines 33(1) to 33(n) are provided corresponding to n waveform generating circuits 30(1) to 30(n) (see FIG. 4) described later that are included in the driver IC 27. A signal for controlling an FET included in each waveform generating circuit 30 is transmitted to each control line 33. In response to this signal, the waveform generating circuit 30 generates a drive signal for driving the driving element 111, and outputs the generated drive signal to the driving element 111 via a signal line 34.

[0031] In addition, a control signal for controlling n selectors 90(1) to 90(n) (see FIG. 4) described later, which are included in the driver IC 27, is transmitted to the control line 40. The FPGA 51 selects a power supply circuit for generating a drive signal to be output to each signal line 34 by controlling the n selectors 90(1) to 90(n).

[0032] Next, an example of a circuit configuration of the driver IC 27 will be described with reference to Fig. 4. As shown in Fig. 4, the driver IC 27 includes n waveform generating circuits 30(1) to 30(n) and n selectors 90(1) to 90(n).

[0033] The waveform generating circuits 30(1)-30(n) are provided corresponding to the n driving elements 111 of each head 11. That is, the waveform generating circuits 30(1)-30(n) are provided corresponding to the n nozzles 11a of each head 11. Also, the selectors 90(1)-90(n) are provided corresponding to the waveform generating circuits 30(1)-30(n). That is, the selectors 90(1)-90(n) correspond to the n driving elements 111. Each selector 90 is a hardware component constituted by a plurality of FETs formed inside the driver IC 27.

[0034] The driver IC 27 has n circuit configurations, the same as the number of nozzles. Since the n circuit configurations have the same configuration, the following describes the circuit configuration provided between the control line 33(1) and the signal line 34(1). In the driver IC 27, a selector 90(1) and a waveform generating circuit 30(1) are formed between the control line 33(1) and the signal line 34(1).

[0035] A control line 33(1) from the FPGA 51 is connected to the selector 90(1). The control line 33(1) branches off midway along the path connecting the FPGA 51 and the selector 90(1), and a control line SB(1) branching off from the control line 33(1) is connected to the waveform generating circuit 30(1).

[0036] The selector 90(1) and the waveform generating circuit 30(1) are connected by five control lines S1(1) to S5(1). The selector 90(1) connects one of the five control lines S1(1) to S5(1) to the control line 33(1) in accordance with an instruction from the FPGA 51.

[0037] The waveform generating circuit 30(1) is connected to five wirings connected to the above-mentioned wirings VDD1 to VDD5, a wiring connected to the wiring HVDD, and a wiring connected to the wiring GND. In other words, the waveform generating circuit 30(1) is connected to the power supply circuits 21 to 25 via the wirings VDD1 to VDD5, and is connected to the power supply circuit 26 via the wiring HVDD.

[0038] Next, an example of the configuration of the waveform generating circuits 30(1) to 30(n) included in the head 11 of this embodiment will be described with reference to FIG. 5. Since the waveform generating circuits 30(1) to 30(n) have the same configuration, the waveform generating circuit 30(1) will be described below. The waveform generating circuit 30(1) includes five PMOS (P-type Metal Oxide Semiconductor) transistors 311 to 315 (only two are shown in FIG. 5), one NMOS (N-type Metal Oxide Semiconductor) transistor 32, a resistor 35, and the like. The waveform generating circuit 30(1) is connected to an individual electrode of the driving element 111 via a signal line 34(1).

[0039] 8, the driving element 111 of this embodiment is a piezoelectric element that includes, for one pressure chamber 145, a first active portion 138 that is sandwiched between the individual electrode 134 and the high potential electrode 135, and a second active portion 139 that is sandwiched between the individual electrode 134 and the low potential electrode 136. For this reason, as shown in Fig. 5 and Fig. 8, the driving element 111 includes a capacitor 111b' and a capacitor 111b.

[0040] Wires VDD1 to VDD5 are connected to the five source terminals 311a to 315a of the five PMOS transistors 311 to 315, respectively. The source terminal 32a of the NMOS transistor 32 is connected to the ground. In other words, the PMOS transistors 311 to 315 are connected to the power supply circuits 21 to 25 via the wires VDD1 to VDD5, respectively.

[0041] Control lines S1(1) to S5(1) are connected to the gate terminals 311c to 315c, respectively, of the PMOS transistors 311 to 315. In addition, a control line SB(1) is connected to the gate terminal 32c of the NMOS transistor 32.

[0042] Moreover, the drain terminals 311b to 315b of the five PMOS transistors 311 to 315 are connected to one end of a resistor 35. Moreover, the drain terminal 32b of the NMOS transistor 32 is connected to one end of the resistor 35. The other end of the resistor 35 is connected to an individual electrode 134 of the driving element 111 (the other end of the capacitor 111b' and one end of the capacitor 111b). The high potential electrode 135 (one end of the capacitor 111b') of the driving element 111 is connected to VCOM, and the low potential electrode 136 (the other end of the capacitor 111b) of the driving element 111 is connected to the ground.

[0043] When the FPGA 51 outputs a low level ("L") signal to the control line 33(1), one of the PMOS transistors 311-315 connected to the signal line selected by the above-mentioned selector 90(1) is turned on. The capacitor 111b is charged by a voltage supplied from one of the power supply circuits 21-25, and the capacitor 111b' is discharged. On the other hand, when the FPGA 51 outputs a high level ("H") signal to the control line 33(1), the NMOS transistor 32 is turned on, and the capacitor 111b' is charged by a voltage output from one of the power supply circuits 21-25, and the capacitor 111b is discharged. The capacitors 111b and 111b' are alternately charged and discharged, whereby the drive element 111 is deformed, and ink is ejected from the ejection port of the nozzle 11a.

[0044] That is, a drive signal that drives drive element 111 is output to signal line 34(1). Selector 90(1) selects one of five control lines S1(1) to S5(1) to connect, thereby making it possible to select a power supply circuit that generates a drive signal from among power supply circuits 21 to 25.

[0045] Next, the configuration of the power supply circuits 21 to 26 will be described with reference to FIG. 6. The power supply circuit 26 includes a power supply IC 26a. The power supply IC 26a includes two FETs 26b, an input terminal 26c, an output terminal 26d, and the like. The output terminal 26d is connected to a first output terminal 50b of the second board 50 via a first line 54. In the first line 54, a coil 26e is connected in series between the output terminal 26d and the first output terminal 50b. In the first line 54, one end of a capacitor 26f is connected between the coil 26e and the first output terminal 50b. The other end of the capacitor 26f is connected to the ground. The input terminal 26c of the power supply IC 26a is connected to an input power supply IPS via an input terminal 50a of the second board 50. The input power supply IPS and the input terminal 50a of the second board 50 are connected to each other via a power cable 13.

[0046] The power supply circuit 21 includes a power supply IC 21a. The power supply IC 21a includes two FETs 21b, an input terminal 21c, an output terminal 21d, and the like. The output terminal 21d is connected to the second output terminal 50c of the second substrate 50 via a second line 56. In the second line 56, a coil 21e is connected in series between the output terminal 21d and the second output terminal 50c. In the second line 56, one end of a capacitor 21f is connected between the coil 21e and the second output terminal 50c. The other end of the capacitor 21f is connected to ground. In the second line 56, one end of a resistor 21g is connected between one end of the capacitor 21f and the second output terminal 50c. The other end of the resistor 21g is connected to ground.

[0047] Between the first output terminal 50b and one end of the capacitor 26f, a branch line 55 branches off from the first line 54 and is connected to the input terminal 21c of the power supply circuit 21. That is, the voltage on the output side of the power supply circuit 26 is input to the power supply circuit 21. Each of the power supply circuits 22-25 includes a power supply IC, similar to the power supply circuit 21, and the power supply IC includes two FETs, an input terminal, an output terminal, and the like. Each of the output terminals of the power supply circuits 22-25 is connected to a corresponding output terminal of the second substrate 50, similar to the power supply circuit 21, and a capacitor and a resistor are connected between each of the output terminals of the power supply circuits 22-25 and the corresponding output terminal of the second substrate 50. Also, each of the input terminals of the power supply circuits 22-25 is connected between the first output terminal 50b and one end of the capacitor 26f. That is, the input terminals of the power supply ICs of the five power supply circuits 21-25 are connected in parallel between the first output terminal 50b and one end of the capacitor 26f. The voltage on the output side of the power supply circuit 26 is also input to the input terminals of the four power supply circuits 22 to 25, similar to the power supply circuit 21. That is, the input terminals and the first output terminal 50b of the five power supply circuits 21 to 25 are connected in parallel to the output terminal 26d of the power supply circuit 26 via the first line 54.

[0048] The six power supply circuits 21 to 26 are, for example, switching regulators. The maximum output wattage of each of the five power supply circuits 21 to 25 is smaller than the output wattage of the power supply circuit 26. The maximum output current of the power supply IC of each of the five power supply circuits 21 to 25 is smaller than the maximum output current of the power supply IC 26a of the power supply circuit 26. The withstand voltage of the power supply IC of each of the five power supply circuits 21 to 25 may be lower than the withstand voltage of the power supply IC 26a of the power supply circuit 26. That is, a power supply circuit with a smaller output wattage can be used, a power supply IC with a smaller maximum output current can be used, and a power supply IC with a lower withstand voltage can be used. The withstand voltage of the FET 21b of the power supply circuit 21, i.e., the switching element, may be lower than the withstand voltage of the FET 26b of the power supply circuit 26.

[0049] Next, a description will be given of the relationship between the power supply circuit 21 and the flexible circuit board 60. A description of the relationship between the power supply circuits 22 to 25, which have the same configuration as the power supply circuit 21, and the flexible circuit board 60 will be omitted.

[0050] The flexible circuit board 60 includes a diode 60a, a resistor 60b, and a plurality of capacitors 60c. An input terminal of the diode 60a is connected to a first output terminal 50b of the second board 50 via a wiring. An output terminal of the diode 60a is connected to the driver IC 27 via a wiring HVDD. A wiring VCOM branched from the wiring HVDD is connected to the high potential electrode 135 of the driving element 111 without passing through the driver IC 27. That is, the power supply circuit 26 is connected to the high potential electrode 135 of the driving element 111 via the first output terminal 50b, the diode 60a, and the wiring VCOM.

[0051] One end of the resistor 60b is connected between the output terminal of the diode 60a and the driver IC 27. The other end of the resistor 60b is connected to ground. One end of each of the plurality of capacitors 60c is connected in parallel between one end of the resistor 60b and the driver IC 27. The other end of each of the plurality of capacitors 60c is connected to ground. The diode 60a and the resistor 60b may be provided on the second substrate 50. Also, an intermediate substrate may be provided between the second substrate 50 and the flexible circuit substrate 60, and the diode 60a and the resistor 60b may be provided on the intermediate substrate.

[0052] The flexible circuit board 60 includes a resistor 60d and a plurality of capacitors 60e. The second output terminal 50c of the second board 50 is connected to the driver IC 27 via a wiring VDD1. One end of the resistor 60d is connected between the second output terminal 50c and the driver IC 27. The other end of the resistor 60d is connected to ground. One end of each of the plurality of capacitors 60e is connected in parallel between one end of the resistor 60d and the driver IC 27. The other end of each of the plurality of capacitors 60e is connected to ground.

[0053] Next, a description will be given of the structure of the head 11. As shown in FIG.

[0054] (flow channel substrate 120) The flow path substrate 120 is formed with a plurality of nozzles 11a, individual flow paths 143 (see FIG. 7) each communicating with the plurality of nozzles 11a, and a manifold 142 (see FIG. 7) commonly communicating with the plurality of individual flow paths 143. The flow path substrate 120 is composed of an ink sealing film 121 and metal plates 122 to 126 stacked in the vertical direction.

[0055] The plate 122 has through holes that define a plurality of pressure chambers 145. As shown in FIG. 7, the plate 123 has through holes that define communication passages 144 and 146 that are provided for each pressure chamber 145. The communication passages 144 and 146 overlap one end and the other end of the corresponding pressure chamber 145 in the front-rear direction in the up-down direction. The plate 124 has through holes that define communication passages 147 that are provided for each communication passage 146. The plate 125 has through holes that define communication passages 148 that are provided for each communication passage 147. The communication passages 147 and 148 overlap the corresponding communication passages 146 in the up-down direction. The nozzle plate 126 has through holes that define each nozzle 11a. Each nozzle 11a overlaps the communication passage 148 in the up-down direction. Each individual flow path 143 is composed of a communication passage 144, a pressure chamber 145, communication passages 146 to 148, and a nozzle 11a.

[0056] Further, the plate 124 is formed with through holes that define the manifold 142. The communication paths 144 of the individual flow paths 143 overlap with the manifold 142 in the vertical direction. As a result, each individual flow path 143 communicates with the manifold 142. An ink supply port (not shown) is formed in an area on the upper surface of the plate 122 where the ink sealing film 121 and the piezoelectric actuator 130 are not formed. The ink supply port communicates with the manifold 142 via a through hole that penetrates the plates 122 and 123.

[0057] The ink sealing film 121 is made of a material with low ink permeability, such as stainless steel, etc. The ink sealing film 121 is adhered to the upper surface of the plate 122, and seals all of the pressure chambers 145 formed in the plate 122.

[0058] In the flow path substrate 120 having the above-mentioned configuration, ink in an ink tank (not shown) is supplied to the manifold 142 through an ink supply port. The ink supplied to the manifold 142 is then supplied to each individual flow path 143. Then, as described below, the piezoelectric actuator 130 is driven to apply pressure to the ink in each individual flow path 143, causing ink droplets to be ejected from the nozzles 11a.

[0059] (Piezoelectric actuator 130) The piezoelectric actuator 130 has a plurality of driving elements 111, each of which is composed of three piezoelectric layers 131-133, a plurality of individual electrodes 134, a high potential electrode 135, and a low potential electrode 136. The plurality of driving elements 111 correspond to the plurality of individual flow paths 143, respectively.

[0060] Each of the three piezoelectric layers 131 to 133 is made of a piezoelectric material mainly composed of lead zirconate titanate, etc. As shown in Figures 7 and 8, the three piezoelectric layers 131 to 133 are stacked in the vertical direction. The piezoelectric layer 131 is adhered to the upper surface of the ink sealing film 121 with an adhesive.

[0061] As shown in FIGS. 7 and 8, the individual electrodes 134, the high potential electrode 135 and the low potential electrode 136 are located on the opposite side of the piezoelectric layer 131 to the ink sealing film 121.

[0062] 7 and 8, each individual electrode 134 is formed on the upper surface of the piezoelectric layer 133 in correspondence with the pressure chamber 145. As described above, each individual electrode 134 is connected to the waveform generating circuit 30 of the driver IC 27 via the signal line 34. Either a high potential (VDD potential) or a low potential (GND potential) is selectively applied to each individual electrode 134 via the signal line 34.

[0063] 7 and 8, the high potential electrode 135 is formed on the upper surface of the piezoelectric layer 132. The high potential electrode 135 corresponds to the pressure chamber 145 and the individual electrode 134. The high potential electrode 135 overlaps in the vertical direction with the left-right central portion of the corresponding pressure chamber 145 and the corresponding individual electrode 134. The high potential electrode 135 is connected to the power supply circuit 26 via a through electrode (not shown) that vertically penetrates the piezoelectric layer 133 and the above-mentioned wirings VCOM and HVDD. A constant potential (VCOM potential) slightly higher than the VDD potential is applied to the high potential electrode 135 from the power supply circuit 26.

[0064] 7 and 8, the low potential electrode 136 is formed on the upper surface of the piezoelectric layer 131. As shown in FIG. 8, the low potential electrodes 136 are located to the left and right of one pressure chamber 145. The right end of the left low potential electrode 136 overlaps in the vertical direction with the left end of the pressure chamber 145 and the left end of the individual electrode 134. The left end of the right low potential electrode 136 overlaps in the vertical direction with the right end of the pressure chamber 145 and the right end of the individual electrode 134. As described above, the low potential electrode 136 is connected to ground.

[0065] 8, a portion of the piezoelectric layer 133 sandwiched between the individual electrode 134 and the high potential electrode 135 in the vertical direction is referred to as a first active portion 138. A portion of the piezoelectric layers 132, 133 sandwiched between the individual electrode 134 and the low potential electrode 136 in the vertical direction is referred to as a second active portion 139. The first active portion 138 is mainly polarized upward, and the second active portion 139 is mainly polarized downward. The piezoelectric actuator 130 includes one first active portion 138 and two second active portions 139 sandwiching the first active portion 138 in the horizontal direction for each pressure chamber 145.

[0066] Here, with reference to FIGS. 9 and 10, the operation of the drive element 111 corresponding to one nozzle 11a will be described by taking as an example a case where an ink droplet is ejected from that nozzle 11a.

[0067] Before the printer 1 starts printing, as shown in Fig. 9, a low potential (GND potential) is applied to each individual electrode 134. At this time, due to the potential difference between the individual electrode 134 and the high potential electrode 135A2, an upward electric field equal to the polarization direction is generated in the first active section 138, and the first active section 138 contracts in the planar direction (directions along the left-right direction and the front-back direction). As a result, the portion of the laminate made up of the piezoelectric layers 131 to 133 that overlaps with the pressure chamber 145 in the vertical direction is bent so as to be convex (downward) toward the pressure chamber 145. At this time, the volume of the pressure chamber 145 is smaller than when the laminate is flat.

[0068] When the printer 1 starts printing and ejects ink from the nozzle 11a, first, as shown in FIG. 10, the potential of the individual electrode 134 corresponding to the nozzle 11a is switched from a low potential (GND potential) to a high potential (VDD potential). At this time, the potential difference between the individual electrode 134 and the high potential electrode 135 is reduced, so that the contraction of the first active section 138 is reduced. Meanwhile, the potential difference between the individual electrode 134 and the low potential electrode 136 generates a downward electric field equal to the polarization direction in the two second active sections 139, and the two second active sections 139 contract in the planar direction. As a result, the portion of the laminate made up of the piezoelectric layers 131 to 133 that overlaps with the pressure chamber 145 in the vertical direction is bent so as to be convex (upward) in the direction away from the pressure chamber 145. As a result, the volume of the pressure chamber 145 becomes larger than that in FIG. 9, and ink is drawn into the pressure chamber 145 from the manifold 142.

[0069] 9, the potential of the individual electrode 134 corresponding to the nozzle 11a is switched from high potential (VDD potential) to low potential (GND potential). At this time, the potential difference between the individual electrode 134 and the low potential electrode 136 disappears, and the contraction of the second active section 139 is eliminated. Meanwhile, the potential difference between the individual electrode 134 and the high potential electrode 135 generates an upward electric field equal to the polarization direction in the first active section 138, and the first active section 138 contracts in the planar direction. As a result, the portion of the laminate made up of the piezoelectric layers 131 to 133 that overlaps with the pressure chamber 145 in the vertical direction is bent so as to be convex (downward) toward the pressure chamber 145. At this time, the volume of the pressure chamber 145 is greatly reduced, and a large pressure is applied to the ink in the pressure chamber 145, and the ink drawn from the manifold 142 into the pressure chamber 145 is ejected as an ink droplet from the nozzle 11a.

[0070] Next, an example of a printing flow using the printing device 1 of this embodiment will be described with reference to FIG.

[0071] When the printing device 1 receives print data from the external device 9 (step S1), it analyzes the received print data (step S2) and executes a print process based on the analysis result (step S3).

[0072] In the printing process (step S3), the controller 7 of the printing device 1 controls the motor that drives the transport rollers 5A and 5B to transport the medium M in the transport direction by the transport rollers 5A and 5B. The controller 7 also controls each head 11 of each line head 4 to eject ink toward the medium M transported by the transport rollers 5A and 5B. This causes an image to be printed on the medium M. As described above, in each driving element 111 included in each head 11, the high potential electrode 135 is connected to the power supply circuit 26, and the individual electrode 134 is connected to one of the power supply circuits 21 to 25. That is, the high potential electrode 135 receives an output voltage value set in the power supply circuit 26, and the individual electrode 134 receives an output voltage value set in one of the power supply circuits 21 to 25 to which it is connected.

[0073] Here, the controller 7 changes the transport speed of the medium M at various times during the printing process. For example, the controller 7 increases the transport speed of the medium M from zero to a predetermined speed immediately after the start of the printing process, and decreases the transport speed of the medium M from the predetermined speed to zero immediately before the end of the printing process. In addition, if the user needs to check the print quality while the medium M is being transported at a predetermined speed, the controller 7 temporarily decreases the transport speed based on an instruction from the user. When the transport speed of the medium M is changed during the printing process, in order to maintain the desired print quality, it is necessary to change the ink droplet ejection frequency according to the transport speed. Here, if the drive waveform for driving each drive element 111 is the same before and after the change in the ink droplet ejection frequency, the size of the ink droplets that land on the medium M will differ. For this reason, when changing the ink droplet ejection frequency, it is necessary to change the drive waveform so that the size of the ink droplets that land on the medium M does not change. Here, the drive waveform can be changed, for example, by changing the output voltage values ​​of the power supply circuits 21 to 25, respectively. In other words, when the size of ink droplets landing on the medium M becomes smaller by changing the ink droplet ejection frequency in response to the transport speed, the output voltage value of the power supply circuits 21-25 is increased to change the drive waveform, thereby making it possible to increase the size of ink droplets landing on the medium M. On the other hand, when the size of ink droplets landing on the medium M becomes larger by changing the ink droplet ejection frequency in response to the transport speed, the output voltage value of the power supply circuits 21-25 is decreased to change the drive waveform, thereby making it possible to reduce the size of ink droplets landing on the medium M. This makes it possible to maintain the desired print quality before and after the transport speed is changed.

[0074] Therefore, in this embodiment, the controller 7 judges whether it is necessary to change the output voltage value of each of the power supply circuits 21 to 25 based on the transport speed of the medium M (step S4). For example, the controller 7 calculates the transport speed of the medium M based on a signal output from an encoder (not shown) of the transport roller 5A, and compares the peak value of the drive waveform corresponding to the ejection frequency calculated from the transport speed with the peak value of the current drive waveform to judge whether it is necessary to change the output voltage value of each of the power supply circuits 21 to 25. Specifically, if the peak value of the drive waveform corresponding to the ejection frequency calculated from the transport speed is different from the peak value of the current drive waveform, it is judged that it is necessary to change the output voltage value of each of the power supply circuits 21 to 25 (step S4: YES). On the other hand, if the peak value of the drive waveform corresponding to the ejection frequency calculated from the transport speed is the same as the peak value of the current drive waveform, it is judged that it is not necessary to change the output voltage value of each of the power supply circuits 21 to 25 (step S4: NO).

[0075] When it is determined that the output voltage value of each of the power supply circuits 21-25 needs to be changed (step S4: YES), the controller 7 determines whether the output voltage value of each of the power supply circuits 21-25 needs to be increased (step S41). For example, in step S4, when the peak value of the drive waveform corresponding to the ejection frequency calculated from the transport speed is higher than the peak value of the current drive waveform, the controller 7 determines that the output voltage value of each of the power supply circuits 21-25 needs to be increased (step S41: YES). On the other hand, in step S4, when the peak value of the drive waveform corresponding to the ejection frequency calculated from the transport speed is lower than the current peak value, the controller 7 determines that the output voltage value of each of the power supply circuits 21-25 needs to be decreased (step S41: NO).

[0076] When it is determined that it is necessary to increase the output voltage value of each of the power supply circuits 21 to 25 (step S41: YES), the controller 7 first increases the output voltage value of the power supply circuit 26 (step S4). Then, after increasing the output voltage value of the power supply circuit 26, the controller 7 increases the output voltage value of each of the power supply circuits 21 to 25 (step S43). That is, after the difference in the output voltage value between the power supply circuit 26 and each of the power supply circuits 21 to 25 widens (step S42), the controller 7 changes the output voltage values ​​of the power supply circuit 26 and each of the power supply circuits 21 to 25 so as to return to the original difference (step S43). Then, after increasing the output voltage value of each of the power supply circuits 21 to 25, the controller 7 returns the process to step S3. As described above, the output voltage values ​​of the power supply circuits 21 to 26 can be changed by the FPGA 51 and the D / A converter 20.

[0077] Here, if only the output voltage value of each of the power supply circuits 21 to 25 is increased without increasing the output voltage value of the power supply circuit 26, the potential difference between each individual electrode 134 and the high potential electrode 135 becomes small, and the operation of each driving element 111 changes before and after only the output voltage value of each of the power supply circuits 21 to 25 is increased. Also, each driving element 111 has the above-mentioned structure (see Figs. 8 to 10), and it is necessary that a potential higher than that of each individual electrode 134 is always applied to the high potential electrode 135. If the output voltage value of each of the power supply circuits 21 to 25 is increased before the output voltage value of the power supply circuit 26, the difference with the output voltage value of the power supply circuit 26 becomes smaller compared to before the increase, and therefore the output voltage value of each of the power supply circuits 21 to 25 may temporarily exceed the output voltage value of the power supply circuit 26. Also, as shown in Fig. 6, the power supply circuits 21 to 25 and the power supply circuit 26 share the input power source IPS. Therefore, immediately after increasing the output voltage value of each of the power supply circuits 21 to 25, not only the output voltage value of the power supply circuits 21 to 25 but also the output voltage value of the power supply circuit 26 may become unstable, and the output voltage value of each of the power supply circuits 21 to 25 may temporarily exceed the output voltage value of the power supply circuit 26. At this time, a higher potential than that of the high potential electrode 135 may be applied to each individual electrode 134, and the operation of each driving element 111 may temporarily change. Therefore, in this embodiment, when it is necessary to increase the output voltage value of each of the power supply circuits 21 to 25, the output voltage value of the power supply circuit 26, whose output voltage value is set higher than that of the power supply circuits 21 to 25, is first increased (step S42), and then the output voltage value of each of the power supply circuits 21 to 25 is increased (step S43). As a result, the output voltage value of each of the power supply circuits 21 to 25 can be increased while maintaining the state in which the output voltage value of the power supply circuit 26 is higher than the output voltage value of each of the power supply circuits 21 to 25, and the potential difference between each individual electrode 134 and the high potential electrode 135 can be kept constant before and after the output voltage value of each of the power supply circuits 21 to 26 is changed. As a result, the operation of each drive element 111 becomes stable, and the desired print quality can be maintained. As described above, the input terminals of the power supply circuits 21 to 25 are connected in parallel to the output terminal 26d of the power supply circuit .In this embodiment, by increasing the output voltage value of power supply circuit 26 and then increasing the output voltage value of each of power supply circuits 21 to 25, it is possible to increase the output voltage value of each of power supply circuits 21 to 25 while keeping the output voltage value of power supply circuit 26 stable.

[0078] On the other hand, when it is determined that the output voltage value of each of the power supply circuits 21-25 needs to be reduced (step S41: NO), the controller 7 first reduces the output voltage value of each of the power supply circuits 21-25 (step S44). Then, after reducing the output voltage value of each of the power supply circuits 21-25, the controller 7 reduces the output voltage value of the power supply circuit 26 (step S45). That is, after the difference between the output voltage value of the power supply circuit 26 and each of the power supply circuits 21-25 widens (step S44), the controller 7 changes the output voltage value of each of the power supply circuits 21-25 and the output voltage value of the power supply circuit 26 so as to return to the original difference (step S45). Then, after reducing the output voltage value of the power supply circuit 26, the controller 7 returns the process to step S3.

[0079] Here, if only the output voltage value of each of the power supply circuits 21 to 25 is lowered without lowering the output voltage value of the power supply circuit 26, the potential difference between each individual electrode 134 and the high potential electrode 135 will be large, and the operation of each driving element 111 will change before and after only the output voltage value of each of the power supply circuits 21 to 25 is lowered. Also, as described above, a potential higher than that of each individual electrode 134 must be constantly applied to the high potential electrode 135. If the output voltage value of the power supply circuit 26 is lowered before the output voltage value of each of the power supply circuits 21 to 25, the difference between the output voltage value of each of the power supply circuits 21 to 25 and the output voltage value of the power supply circuit 26 will be smaller than before the lowering, and therefore the output voltage value of the power supply circuit 26 may temporarily fall below the output voltage value of each of the power supply circuits 21 to 25. Also, as shown in FIG. 6, the power supply circuits 21 to 25 and the power supply circuit 26 share the input power supply IPS. Therefore, immediately after the output voltage value of the power supply circuit 26 is lowered, not only the output voltage value of the power supply circuit 26 but also the output voltage value of each of the output voltage power supply circuits 21 to 25 may become unstable, and the output voltage value of the power supply circuit 26 may temporarily fall below the output voltage value of each of the power supply circuits 21 to 25. At this time, a potential higher than that of the high potential electrode 135 may be applied to each individual electrode 134, and the operation of each driving element 111 may temporarily change. Therefore, in this embodiment, when it is necessary to lower the output voltage value of each of the power supply circuits 21 to 25, the output voltage value of each of the power supply circuits 21 to 25 is first lowered (step S44), and then the output voltage value of the power supply circuit 26, whose output voltage value is set higher than that of the power supply circuits 21 to 25, is lowered (step S45). As a result, the output voltage value of each of the power supply circuits 21 to 25 can be lowered while maintaining the state in which the output voltage value of the power supply circuit 26 is higher than the output voltage value of each of the power supply circuits 21 to 25, and the potential difference between each individual electrode 134 and the high potential electrode 135 can be kept constant before and after the output voltage value of each of the power supply circuits 21 to 26 is changed. As a result, the operation of each drive element 111 becomes stable, and the desired print quality can be maintained. In addition, by lowering the output voltage value of each of the power supply circuits 21-25 before lowering the output voltage value of the power supply circuit 26, it is possible to lower the output voltage value of each of the power supply circuits 21-25 while the output voltage value of the power supply circuit 26 is stable.

[0080] Then, in step S4, if it is determined that there is no need to change the output voltage values ​​of the power supply circuits 21-25 (step S4: NO), the controller 7 determines whether the print process based on the print data has ended (step S5). If it is determined that the print process based on the print data has not ended (step S5: NO), the controller 7 returns the process to step S3. On the other hand, if it is determined that the print process based on the print data has ended (step S5: YES), the printing sequence ends.

[0081] Next, the processes in steps S42 to S45 will be specifically described using an example shown in FIGS. 12(a), 12(b) and 13(a) and 13(b).

[0082] First, as shown in FIG. 12(a), a case where the output voltage value of each of the power supply circuits 21 to 26 is increased will be described. The output voltage values ​​of the power supply circuits 21 to 26 are preset to 20.1V, 20.3V, 20.0V, 19.8V, 19.7V, and 23.3V, respectively. That is, the output voltage value of the power supply circuit 26 is set higher than the output voltage value of the power supply circuit 22, which is the highest among the power supply circuits 21 to 25. Then, it is assumed that it becomes necessary to increase the output voltage value to each target value with an increase in the conveying speed. Specifically, it is assumed that it becomes necessary to increase the output voltage values ​​of the power supply circuits 21 to 26 to 20.4V, 20.7V, 20.3V, 20.2V, 19.9V, and 23.7V, respectively. Note that these target values ​​of the output voltage are values ​​that are determined in advance based on actual measurements, and are stored in, for example, the non-volatile memory 52. Even after the change (target value), the output voltage value of the power supply circuit 26 is set higher than the output voltage value of the power supply circuit 22, which is the highest among the power supply circuits 21-25.

[0083] In this case, as shown in FIG. 12(b), the controller 7 first increases the output voltage value of the power supply circuit 26 by ΔV every time ΔT, thereby increasing it from 23.3V to 23.7V (step S42). Then, after the output voltage value of the power supply circuit 26 reaches the target value of 23.7V and time ΔT has elapsed, the controller 7 simultaneously starts changing the output voltage values ​​of the power supply circuits 21-25. Specifically, the output voltage values ​​of the power supply circuits 21-25 are increased by ΔV every time ΔT, as in the case of the power supply circuit 26, until they each reach the target value (step S43). In FIG. 12(b), for example, ΔT=10 ms and ΔV=0.1V can be used.

[0084] Next, as shown in FIG. 13(a), a case where the output voltage value of each of the power supply circuits 21 to 26 is reduced will be described. The output voltage values ​​of the power supply circuits 21 to 26 are set to 20.1V, 20.3V, 20.0V, 19.8V, 19.7V, and 23.3V, respectively. That is, the output voltage value of the power supply circuit 26 is set higher than the output voltage value of the power supply circuit 22, which is the highest among the power supply circuits 21 to 25. Then, it is assumed that the output voltage value needs to be reduced to each target value due to a drop in the conveying speed. Specifically, it is assumed that the output voltage values ​​of the power supply circuits 21 to 26 need to be reduced to 20.1V, 20.3V, 20.0V, 19.8V, 19.7V, and 23.3V, respectively. The target values ​​of these output voltages are also values ​​that are determined in advance based on actual measurements, and are stored in, for example, the non-volatile memory 52. Even after the change (target value), the output voltage value of the power supply circuit 26 is set higher than the output voltage value of the power supply circuit 22, which is the highest among the power supply circuits 21-25.

[0085] In this case, as shown in Fig. 13(b), the controller 7 first starts changing the output voltage values ​​of the power supply circuits 21 to 25 simultaneously. Specifically, the output voltage value of each of the power supply circuits 21 to 25 is lowered by ΔV every time ΔT until it reaches the target value (step S44). Then, after the output voltage values ​​of the power supply circuits 22 and 24, which have the largest difference between the output voltage values ​​before and after the change, reach the target values ​​(20.3V, 19.8V), respectively, and time ΔT has elapsed, the output voltage value of the power supply circuit 26 is raised from 23.7V to 23.3V by lowering by ΔV every time ΔT (step S45). Note that, in Fig. 13(b), for example, ΔT=10ms and ΔV=0.1V can also be used.

[0086] As described above, in this embodiment, when the controller 7 changes the output voltage value of each of the power supply circuits 21 to 26, it changes it step by step by ΔV every time ΔT. This allows the voltage value of each of the power supply circuits 21 to 26 to be stabilized in a short time every time it is changed by ΔV. Furthermore, even when the output voltage values ​​of the power supply circuits 21 to 26 are changed simultaneously for the multiple heads 11 included in each line head 4, it is possible to suppress the load fluctuation on the input power source IPS of the line head 4. Furthermore, since the driving state of the driving element 111 changes step by step, the ejection state of the ink droplets also changes step by step, and it is possible to suppress the deterioration of the print quality due to the sudden change in the ejection state of the ink droplets. Note that, from the viewpoint of stabilizing the voltage value of each of the power supply circuits 21 to 26 in a short time and from the viewpoint of suppressing the load fluctuation on the input power source IPS of the line head 4, ΔV is preferably 0.5V or less, more preferably 0.1V or less. Furthermore, from the viewpoint of preventing a sudden change in the output voltage value of the power supply circuits 21 to 26, ΔT is preferably 2ms or more.

[0087] Although the embodiment and modifications of the present invention have been described above, the present invention is not limited to these, and various design modifications are possible within the scope of the claims.

[0088] When changing the output voltage value of each of the power supply circuits 21 to 25 in step S43 and step S44 in the above embodiment, in the example shown in FIG. 12(b) and FIG. 13(b), the controller 7 starts changing the output voltage value of all of the power supply circuits 21 to 25 at the same time, but this is not limited to this. For example, the timings at which the change of the output voltage value of the power supply circuits 21 to 25 starts may all be different. Alternatively, the change of the output voltage value of some of the power supply circuits 21 to 25 may start at the same time, and the change of the output voltage value of the remaining power supply circuits may start at a different timing. From the viewpoint of stabilizing the output voltage value of the power supply circuit 26, it is preferable to start changing the output voltage value of some of the power supply circuits 21 to 25 at the same time, and start changing the output voltage value of the remaining power supply circuits at a different timing, rather than starting the change of the output voltage value of all of the power supply circuits 21 to 25 at different timings.

[0089] In the above embodiment, the controller 7 judges whether the output voltage value of the power supply circuits 21-25 needs to be changed based on the transport speed of the medium M, but this is not limited thereto. For example, the printing device 1 may be provided with a densitometer that measures the density of an image printed on the medium M, and the controller 7 may judge whether the output voltage value of the power supply circuits 21-25 needs to be changed based on the density of the image measured by the densitometer. For example, when the density of the image becomes darker than a predetermined density, the output voltage value of the power supply circuits 21-26 may be lowered so that the image density becomes lighter, and when the density of the image becomes lighter than the predetermined density, the output voltage value of the power supply circuits 21-26 may be increased so that the image density becomes darker. Alternatively, the controller 7 may judge whether the output voltage value of the power supply circuits 21-25 needs to be changed based on the transport speed of the medium M and the density of the image measured by the densitometer.

[0090] In the above embodiment and modified examples, the printing device 1 prints on the medium M using a so-called line head method in which ink is ejected from a line head 4 that is long in the width direction and is fixed to the printing device 1. However, the printing device 1 may also print on the medium M using a so-called serial head method in which an inkjet head 11 is moved in the sheet width direction by a carriage.

[0091] In the above embodiment and modified examples, the present invention is applied to the head 11 that ejects ink from the nozzles 11a, but the present invention is not limited to this. The present invention can also be applied to a head other than an inkjet head that ejects a liquid other than ink from the nozzles 11a. [Explanation of symbols]

[0092] 1 Printing device 4 Line Head 5A, 5B Conveyor rollers 7 Controller 11 Head 11a Nozzle 21~26 Power supply circuit 27 Driver IC 50 Second board 51 FPGA 52 Non-volatile memory 60 Flexible Circuit Board 62 Non-volatile memory 71 First board 111 Drive element 120 Flow Channel Substrate 130 Piezoelectric Actuator 143 Individual Channel 711 FPGA 712 EEPROM

Claims

1. A printing method using a printing device, comprising: The printing device includes: a liquid ejection head including a flow path substrate in which individual flow paths are formed, and a piezoelectric actuator having an individual electrode, a high potential electrode, and a low potential electrode, and applying pressure to liquid in the individual flow paths; a drive power supply circuit electrically connected to the individual electrodes; a high potential power supply circuit electrically connected to the high potential electrode; a transport mechanism for transporting the medium; The printing method includes: ejecting liquid from the liquid ejection head onto the medium transported by the transport mechanism to print an image on the medium; changing output voltage values ​​of the drive power supply circuit and the high potential power supply circuit while the image is being printed on the medium.

2. 2. The printing method according to claim 1, wherein when changing the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit, the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit are increased, or the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit are decreased, respectively.

3. The printing method according to claim 1 , wherein the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit are changed at different times.

4. 4. The printing method according to claim 3, further comprising the step of: completing the change in the output voltage value of one of the drive power supply circuit and the high potential power supply circuit, and then starting the change in the output voltage value of the other of the drive power supply circuit and the high potential power supply circuit.

5. 3. The printing method according to claim 1, further comprising changing the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit so that after a difference in output voltage values ​​between the drive power supply circuit and the high potential power supply circuit widens, the difference in the output voltage values ​​returns to its original value.

6. 6. The printing method according to claim 5, further comprising increasing the output voltage value of said drive power supply circuit after increasing the output voltage value of said high potential power supply circuit.

7. The printing method according to claim 5 , further comprising the step of lowering the output voltage value of the high potential power supply circuit after lowering the output voltage value of the drive power supply circuit.

8. 3. The printing method according to claim 1, wherein the output voltage value of the high potential power supply circuit before the change is higher than the output voltage value of the drive power supply circuit before the change, and the output voltage value of the high potential power supply circuit after the change is higher than the output voltage value of the drive power supply circuit after the change.

9. a plurality of drive power supply circuits each having a different output voltage value, The printing method according to claim 8 , wherein the output voltage value of the high potential power supply circuit is higher than the highest output voltage value among the output voltage values ​​of the plurality of drive power supply circuits.

10. The printing method according to claim 9 , wherein when changing the output voltage values ​​of the plurality of drive power supply circuits, the change is started simultaneously for the plurality of drive power supply circuits.

11. 3. The printing method according to claim 1, wherein the output voltage values ​​of the drive power supply circuit and the high potential power supply circuit are changed by a predetermined value each time a predetermined time elapses up to a target value.

12. a liquid ejection head including a flow path substrate in which individual flow paths are formed, and a piezoelectric actuator having an individual electrode, a high potential electrode, and a low potential electrode, and applying pressure to liquid in the individual flow paths; a drive power supply circuit electrically connected to the individual electrodes; a high potential power supply circuit electrically connected to the high potential electrode; a transport mechanism for transporting the medium; a controller for controlling the liquid ejection head and the transport mechanism, The controller: ejecting liquid from the liquid ejection head onto the medium transported by the transport mechanism to print an image on the medium; A printing apparatus that changes output voltage values ​​of the drive power supply circuit and the high potential power supply circuit while the image is being printed on the medium.

Images