Display device

Abstract

To provide a semiconductor device using an oxide semiconductor and having a large On-state current.SOLUTION: A semiconductor device has a first transistor provided in a drive circuit section and a second transistor provided in a pixel section. Structures of the first transistor and the second transistor are different. The first transistor and the second transistor are transistors of a top gate structure, and in an oxide semiconductor film, an impurity element is included in a region not overlapped with a gate electrode. In the oxide semiconductor film, a region including the impurity element has a function as a low resistance region. In the oxide semiconductor film, the region including the impurity element is in contact with a film containing hydrogen. The first transistor provided in the drive circuit section may have an oxide semiconductor film in which a first film and a second film are laminated, and the second transistor provided in the pixel section may have an oxide semiconductor film in which an atomic ratio of a metal element is different from that of the first film.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding the device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. process, machine, manufacture, or composition of matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called thin-film transistors (TFTs)) is attracting attention. It is widely used in electronic devices such as integrated circuits (ICs) and image display devices (display devices). Semiconductor materials such as silicon are widely known as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as another material.

[0005] For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. Patent Document 1 discloses a technique for fabricating a transistor using this method. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2006-165529 A Summary of the Invention [Problem to be solved by the invention]

[0007] As a transistor using an oxide semiconductor film, for example, an inverted staggered type (bottom gate structure) The oxide semiconductor is a planar type (also called a top gate structure) or a planar type (also called a top gate structure). When a transistor using a conductor film is applied to a display device, it is more effective than a planar type transistor. However, the manufacturing process of the inverted staggered transistor is relatively simple and the manufacturing cost can be reduced. However, as the screen size of display devices increases, High definition image quality of the device (for example, 4k x 2k (horizontal pixel count = 3840 pixels, vertical pixel count = 3840 pixels) Prime number = 2160 pixels) or 8k x 4k (horizontal pixels = 7680 pixels, vertical pixels As the development of high-resolution display devices (represented by displays with 4320 pixels) progresses, the use of inverted staggered transistors In the case of a transistor, there is a parasitic capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode. There is a problem in that signal delays and the like increase depending on the capacitance, deteriorating the image quality of the display device. In addition, in the case of an inverted staggered transistor, the transistor Therefore, a transistor using an oxide semiconductor film is used. The structure of the Renner-type transistor has stable semiconductor characteristics and high reliability. Furthermore, there is a demand for the development of a transistor that can be formed through a simple manufacturing process.

[0008] In view of the above problems, one embodiment of the present invention provides a novel semiconductor device including an oxide semiconductor. In particular, a planar semiconductor device using an oxide semiconductor is provided. To provide a semiconductor device using a conductor and having a large on-state current, or to provide an off-state current using an oxide semiconductor To provide a semiconductor device with a small current, or to provide a semiconductor device with a small occupancy area using an oxide semiconductor To provide a semiconductor device using an oxide semiconductor and having stable electrical characteristics. To provide a highly reliable semiconductor device using an oxide semiconductor, or to provide a novel semiconductor One of the objects is to provide a semiconductor device or to provide a novel display device.

[0009] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above may be solved by the specification. The above problems are obvious from the description of the specification, etc., and problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0010] One embodiment of the present invention is a transistor including a first transistor provided in a driver circuit portion and a A semiconductor device having a first transistor and a second transistor. The first and second transistors have different structures. In the transistors, a gate structure is provided, The oxide semiconductor film includes an impurity element in a region that does not overlap with the gate electrode. The region having impurities functions as a low-resistance region. The region having the metal element is in contact with the film containing hydrogen. and a region having an impurity element, and functions as a source electrode and a drain electrode. A conductive film may be provided.

[0011] One embodiment of the present invention is a transistor including a first transistor provided in a driver circuit portion and a A semiconductor device having a second transistor and a third transistor, The second and third transistors have different structures. The first to third transistors are top-gate transistors, and each of the transistors The oxide semiconductor film of the transistor contains an impurity element in a region that does not overlap with a gate electrode. In addition, in the oxide semiconductor film, a region containing the impurity element is in contact with a film containing hydrogen. In addition, the source electrode and the region having the impurity element in the opening of the hydrogen-containing film are A conductive film having a function as a drain electrode may be provided.

[0012] Note that the first transistor provided in the driver circuit portion overlaps with an oxide semiconductor film therebetween. It may have two gate electrodes.

[0013] Note that the first transistor provided in the driver circuit portion and the third transistor provided in the pixel portion The transistor may have two gate electrodes overlapping with each other with an oxide semiconductor film interposed therebetween.

[0014] The first transistor provided in the driver circuit section has a first film and a second film stacked thereon. a second transistor provided in a pixel portion and a first film The second transistor may have an oxide semiconductor film having a different atomic ratio of elements. The oxide semiconductor film included in the first transistor is a second film included in the oxide semiconductor film of the first transistor. The atomic ratio of the metal elements may be the same.

[0015] The third transistor provided in the pixel portion is a transistor in which a first film and a second film are stacked. The second transistor provided in the pixel portion includes an oxide semiconductor film and a first film and a metal element. The second transistor may have an oxide semiconductor film having a different atomic ratio. The oxide semiconductor film to be formed is a second film and a metal film included in the oxide semiconductor film of the third transistor. The atomic ratio of the elements may be the same.

[0016] In addition, the first transistor provided in the driver circuit portion and the third transistor provided in the pixel portion Each of the transistors has an oxide semiconductor film in which a first film and a second film are stacked. The atomic ratio of the metal elements in the first film and the second film may be different.

[0017] Impurity elements include hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, and lithium. These include fluorine, chlorine, or rare gas elements.

[0018] In the oxide semiconductor film, hydrogen, a rare gas element, boron, carbon, nitrogen, fluorine, aluminum, By containing at least one impurity element selected from the group consisting of nium, silicon, phosphorus, and chlorine, the conductive Therefore, in the oxide semiconductor film, a region containing the impurity element is The region having the impurity element is a source electrode and a drain electrode. By contacting the transistor with the This results in a transistor with a high on-state current. Effect of the Invention

[0019] According to one embodiment of the present invention, a novel semiconductor device including an oxide semiconductor can be provided. In particular, a planar semiconductor device using an oxide semiconductor can be provided. Alternatively, a semiconductor device which uses an oxide semiconductor and has a large on-state current can be provided. A semiconductor device including an oxide semiconductor and having a low off-state current can be provided. It is possible to provide a semiconductor device which uses an oxide semiconductor and occupies a small area. It is possible to provide a semiconductor device using an oxide semiconductor and having stable electrical characteristics. In addition, a highly reliable semiconductor device using an oxide semiconductor can be provided. A novel semiconductor device can be provided. Alternatively, a novel display device can be provided. .

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0021] [Figure 1] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Diagram 2] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 3] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 7] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 8] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 9] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 10] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 11] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 12] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 13] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 14] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 15] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 16] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 17] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 18] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 19] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 20] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 21] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 22] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 23] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 24] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Diagram 25] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 26] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 27] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 28] 1A and 1B are diagrams illustrating band structures of a transistor according to one embodiment of the present invention. [Figure 29] 1 is a cross-sectional view illustrating a structure of a transistor. [Diagram 30] 1 is a cross-sectional view illustrating a structure of a transistor. [Diagram 31] 1 is a cross-sectional view illustrating a structure of a transistor. [Diagram 32] 1 is a cross-sectional view illustrating a structure of a transistor. [Diagram 33] 1 is a cross-sectional view illustrating a structure of a transistor. [Diagram 34] 1A to 1C are cross-sectional views illustrating a manufacturing process of a transistor. [Diagram 35] FIG. 1 is a diagram for explaining a computational model. [Diagram 36] FIG. 1 is a diagram for explaining an initial state and a final state. [Figure 37] FIG. 1 is a diagram illustrating the activation barrier. [Figure 38] FIG. 1 is a diagram for explaining an initial state and a final state. [Figure 39] FIG. 1 is a diagram illustrating the activation barrier. [Diagram 40] FIG. 2 is a diagram for explaining the transition levels of VOH. [Diagram 41] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Diagram 42] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 43] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 44] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 45] 1 is a cross-sectional view illustrating a structure of a pixel portion of a light-emitting device. [Diagram 46] FIG. 2 is a diagram illustrating a display module. [Figure 47] 1A to 1C are diagrams illustrating electronic devices. [Figure 48] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Figure 49] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 50] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 51] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 52] Electron diffraction patterns of CAAC-OS. [Diagram 53] FIG. 2 is a diagram for explaining changes in crystal parts of an In-Ga-Zn oxide due to electron irradiation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, embodiments of the present invention disclosed in this specification will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and any deviation from the spirit and scope of the present invention is not permitted. It will be easily understood by those skilled in the art that the form and details of the present invention may be modified in various ways. Therefore, the present invention should not be construed as being limited to the description of the following embodiments. .

[0023] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily shown in order to facilitate understanding. The actual position, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0024] In this specification, ordinal numbers such as "first," "second," and "third" refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0025] In this specification, the terms "above" and "below" refer to the positional relationship of components "directly above" or "below." For example, the term "gate electrode on a gate insulating film" does not necessarily mean "directly under" the gate insulating film. If the expression "gate electrode" is used, it excludes those that include other components between the gate insulating film and the gate electrode. do not.

[0026] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not intended to be limiting. For example, an "electrode" may be used as a part of a "wire." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the wiring is formed integrally.

[0027] In addition, the functions of "source" and "drain" may differ when using transistors with different polarities. In some cases, such as when the direction of the current changes during circuit operation, the two may be interchanged. Therefore, in this specification and the like, the terms "source" and "drain" are used interchangeably. It is assumed that this is possible.

[0028] In this specification, "electrically connected" means "something that has some kind of electrical effect" This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0029] (Embodiment 1) In this embodiment mode, one embodiment of a semiconductor device and a manufacturing method thereof will be described with reference to FIGS. This will be explained using:

[0030] <Configuration 1 of Semiconductor Device> 1 and 2 show a top-gate structure transistor as an example of a transistor included in a semiconductor device. Here, a display device will be described as an example of a semiconductor device. In addition, the structure of a transistor provided in each of a driver circuit portion and a pixel portion of a display device will be described. In this embodiment, a transistor provided in a driver circuit portion and a The transistors have different structures of oxide semiconductor films.

[0031] In FIG. 1, a transistor 100g provided in a driver circuit portion and a transistor FIG. 2 shows a top view of transistors 100g and 100h. FIG. 1A is a top view of a transistor 100g, and FIG. 1B is a top view of a transistor 100h. FIG. 2(A) is a cross-sectional view taken along the dashed line AB in FIG. 1(A), and FIG. FIG. 2(B) is a cross-sectional view taken along dashed line GH in FIG. 1(A). 1(B) and a cross-sectional view taken along dashed line IJ in FIG. 1(B). Therefore, the substrate 101, the insulating film 104, the insulating film 126, the insulating film 127, etc. are omitted. FIG. 2A is a cross-sectional view of the transistors 100g and 100h in the channel length direction. FIG. 2B is a cross-sectional view of the transistors 100g and 100h in the channel width direction. do.

[0032] In the top view of the transistor, the transistor 100g is also shown in the following drawings. As with the transistor 100h, some of the components may be omitted in the drawings. The dashed line AB direction and dashed line CD direction are the channel length direction, and the dashed line GH direction The direction of the dashed dotted line IJ may be referred to as the channel width direction.

[0033] The transistor 100g shown in FIG. 2 is a multilayer structure on an insulating film 104 formed on a substrate 101. The multilayer film 107 is connected to an insulating film 116, and the multilayer film 107 is connected to the insulating film 116. The conductive film 119 overlaps with the gate electrode. The conductive film 119 functions as a gate electrode. The insulating film 116 functions as a gate insulating film. The semiconductor device has a region 107a and low resistance regions 107b and 107c. The semiconductor device has a channel region 107 a denotes a channel region 105a in contact with the insulating film 104 and a channel The low resistance region 107b is a low resistance region in contact with the insulating film 104. The low resistance region 105b is in contact with the low resistance region 105b, and the low resistance region 106b is in contact with the low resistance region 105b. 7c is a low resistance region 105c in contact with the insulating film 104 and a low resistance region 7c in contact with the low resistance region 105c. Although not shown in FIG. 2, the channel region 105a and the low resistance region 106c are The oxide semiconductor film having the low-resistance region 105b and the low-resistance region 105c is called the oxide semiconductor film 105. The oxide semiconductor layer has a channel region 106a, a low resistance region 106b, and a low resistance region 106c. The multilayer film 107 is an oxide semiconductor film 106. The oxide semiconductor film 105 and the oxide semiconductor film 106 are stacked.

[0034] Note that in the top view, the oxide semiconductor film 106 is located outside the edge of the oxide semiconductor film 105. That is, the oxide semiconductor film 106 is located on the upper surface of the oxide semiconductor film 105 and the Cover the sides.

[0035] In addition, in the transistor 100g, the insulating film in contact with the low resistance regions 107b and 107c An insulating film 126 may be provided over the insulating film 126. In the openings 128 and 129 of the film 126 and the insulating film 127, the low resistance region of the multilayer film 107 Conductive films 134 and 135 are provided in contact with 107b and 107c.

[0036] The transistor 100h is a transistor including an oxide semiconductor film on an insulating film 104 formed on a substrate 101. 108, an insulating film 117 in contact with the oxide semiconductor film 108, and an oxide semiconductor film A conductive film 120 overlaps with the semiconductor film 108 .

[0037] The conductive film 120 functions as a gate electrode. The insulating film 117 functions as a gate insulator. It functions as a veneer.

[0038] The oxide semiconductor film 108 has a channel region 108 a overlapping with the conductive film 120 and a channel region The low resistance region 108a is sandwiched between low resistance regions 108b and 108c.

[0039] In the transistor 100h, the insulating film in contact with the low-resistance regions 108b and 108c An insulating film 126 may be provided over the insulating film 126. In the openings 130 and 131 in the insulating film 126 and the insulating film 127, the oxide semiconductor film 108 is Conductive films 136 and 137 are provided in contact with the resistance regions 108b and 108c.

[0040] A nitride insulating film 162 is provided so as to cover the conductive films 134, 135, 136, and 137. The nitride insulating film 162 is preferably provided to prevent diffusion of impurities from the outside. It is possible.

[0041] In the transistor 100g and the transistor 100h, the acid contained in the multilayer film 107 The compound semiconductor film 105 and the oxide semiconductor film 108 have different compositions. The oxide semiconductor film 106 and the oxide semiconductor film 108 have the same composition. The oxide semiconductor film 105 and the oxide semiconductor film 108 are formed in separate steps. The oxide semiconductor film 106 and the oxide semiconductor film 108 are formed in the same process.

[0042] In the transistor 100g, a channel is formed in the oxide semiconductor film 105. The oxide semiconductor film 105 is thicker than the oxide semiconductor film 106 .

[0043] The thickness of the oxide semiconductor film 105 is 3 nm to 200 nm, or 10 nm to 50 The oxide semiconductor films 106 and 108 have a thickness of 20 nm or more and 35 nm or less. The thickness is 3 nm to 200 nm, or 3 nm to 100 nm, or 10 nm or less. The thickness is at most 100 nm, or at least 30 nm and at most 50 nm.

[0044] The oxide semiconductor films 105, 106, and 108 are formed of a metal oxide containing at least In. Representative examples include In-Ga oxide and In-M-Zn oxide (wherein M is Mg, Al, Ti, The oxide semiconductor film is formed of, for example, Ga, Y, Zr, La, Ce, Nd, or Hf. Since the indium content of the oxide semiconductor film 105 is higher than that of the oxide semiconductor film 106, the In the band structure described below, For this purpose, the fluctuation in the threshold voltage of the transistor 100g is reduced. It is possible to reduce the channel resistance.

[0045] The oxide semiconductor film 105 is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, The ratio of the number of In atoms to the number of Nd atoms or Hf atoms is large. -Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf In the case of ), the metal element is contained in a target used for depositing the oxide semiconductor film 105. If the atomic ratio of In:M:Zn is x1:y1:z1, then x1 / y1 is greater than 1. The atomic ratio of the metal elements in the target is preferably 6 or less. Representative examples of the atomic ratio of the metal elements in the target are In :M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2: 1:3, In:M:Zn=3:1:2, In:M:Zn=3:1:3, In:M:Zn= For example, 3:1:4.

[0046] The oxide semiconductor films 106 and 108 are made of M (M is Mg, Al, Ti, Ga, Y, Zr, L The atomic ratio of In to the number of elements (a, Ce, Nd, or Hf) is the same or smaller. Oxide semiconductor The films 106 and 108 are In-M-Zn oxides (wherein M is Mg, Al, Ti, Ga, Y, Zr, In the case of La, Ce, Nd, or Hf, the oxide semiconductor films 106 and 108 are formed using In the target used, the atomic ratio of metal elements is In:M:Zn=x2:y2:z2. In this case, it is preferable that x2 / y2 is 1 / 6 or more and 1 or less. Also, z2 / y2 is It is preferable that z2 / y2 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When the content of the oxide semiconductor films 106 and 108 is 6 or more, the oxide semiconductor films 106 and 108 can have a CAAC-OS (CA xis Aligned Crystalline Oxide Semiconductor A typical example of the atomic ratio of the metal elements in the target is as follows: In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1: 3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn= 1:3:8, In:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Z n=1:4:6, In:M:Zn=1:4:7, In:M:Zn=1:4:8, In:M :Zn=1:5:5, In:M:Zn=1:5:6, In:M:Zn=1:5:7, In :M:Zn=1:5:8, In:M:Zn=1:6:8, etc.

[0047] The transistor 100g is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce). A channel is formed in the oxide semiconductor film 105 having a large atomic ratio of In to Nd (Nd, Nd, or Hf). The field effect mobility is high because of the formation of the electrons. Typically, the field effect mobility is 10 cm 2 / V Larger than s, 60cm 2 / Vs, preferably less than 15cm 2 / Vs or more 50cm 2 / Vs However, when light is irradiated, the current in the off state increases. Therefore, by providing a light-shielding film in the driving circuit section, the field effect mobility is high, In addition, the current in the off state is low. As a result, the driving A circuit portion can be fabricated.

[0048] On the other hand, the transistor 100h is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La The atomic ratio of In to In (Ce, Nd, or Hf) is the same or smaller. Since a channel is formed, even if the oxide semiconductor film is irradiated with light, the increase in off-state current is small. Therefore, the pixel area is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce). , Nd, or Hf) has an oxide semiconductor film having an atomic ratio of In equal to or smaller than that of By providing a transistor, it is possible to manufacture a pixel section with excellent display quality and with less deterioration due to light exposure. It is possible.

[0049] In addition, in the display device, the channel length of the transistors included in the driver circuit portion and the pixel portion is It may be different.

[0050] Typically, the channel length of the transistor 100g included in the driving circuit section is set to less than 2.5 μm. On the other hand, the thickness of the pixel portion may be less than 1.45 μm or less than 2.2 μm. The channel length of the transistor 100h is 2.5 μm or more, or 2.5 μm or more and 20 μm or less. It can be said that:

[0051] The channel length of the transistor 100g included in the driving circuit section is set to less than 2.5 μm, preferably By making the thickness of the pixel portion 10 smaller than or equal to 1.45 μm and smaller than or equal to 2.2 μm, Compared to 0h, it is possible to increase the field effect mobility and increase the on-current. As a result, a driver circuit section capable of high speed operation can be manufactured.

[0052] In the multilayer film 107, in the region not overlapping with the conductive film 119, an element that forms an oxygen vacancy is In addition, in a region of the oxide semiconductor film 108 that does not overlap with the conductive film 120, The element that forms oxygen vacancies is added to the oxide semiconductor film. Elements that form oxygen vacancies in the membrane are referred to as impurity elements. Representative examples of impurity elements are as follows: These include hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, and rare earth elements. Representative examples of rare gas elements are helium, neon, argon, krypton, etc. ton and xenon.

[0053] The insulating film 126 is a film containing hydrogen, and is typically a nitride insulating film. Examples of the insulating film include a silicon nitride film and an aluminum nitride film. When the insulating film 126 is in contact with the oxide semiconductor film 107 and the oxide semiconductor film 108, hydrogen contained in the insulating film 126 is condensed into multiple layers. As a result, the multilayer film 107 and the oxide semiconductor film 108 The region of the solid film 108 that contacts the insulating film 126 contains a large amount of hydrogen.

[0054] When an impurity element is added to an oxide semiconductor, the metal element and oxygen in the oxide semiconductor bond The oxygen vacancies are formed by the addition of impurity elements. When hydrogen is added to a semiconductor, hydrogen enters the oxygen vacancy site, and a donor level appears near the conduction band. As a result, an oxide conductor is formed. Therefore, the oxide conductor has light-transmitting properties. An oxide semiconductor is called an oxide conductor.

[0055] An oxide conductor is a degenerate semiconductor in which the conduction band edge and the Fermi level coincide or nearly coincide. Therefore, it is presumed that the oxide conductor film and the source and drain electrodes The contact with the conductive film having the function is an ohmic contact, and the oxide conductive film and the source electrode and The contact resistance with the conductive film functioning as the drain electrode can be reduced.

[0056] That is, the low resistance regions 107b, 107c, 108b, and 108c are the source and drain regions. It functions as a transcription region.

[0057] The conductive films 134, 135, 136, and 137 are made of tungsten, titanium, or aluminum. Conductive materials that easily bond with oxygen, such as copper, molybdenum, chromium, or tantalum alone or alloys When the conductive film 134 or 135 is formed using the above material, oxygen contained in the oxide semiconductor film and the conductive film 134 or 135 are The conductive materials contained in 136 and 137 are bonded to the multilayer film 107 and the oxide semiconductor film 108 In addition, oxygen vacancies are formed in the multilayer film 107 and the oxide semiconductor film 108. When some of the constituent elements of the conductive materials forming the films 134, 135, 136, and 137 are mixed in As a result, the low resistance region 10 in contact with the conductive films 134, 135, 136, and 137 7b, 107c, 108b, and 108c are electrically conductive and form source and drain regions. It has the function as follows.

[0058] The impurity element is a rare gas element, and the multilayer film 107 and the oxide semiconductor film 108 are formed by sputtering. When the low resistance regions 107b, 107c, 108b, and 108c are formed by the ring method, Each of the regions contains a rare gas element, and is a low resistance region 107a, 108a compared to the channel regions 107a, 108a. The concentrations of rare gas elements are higher in 07b, 107c, 108b, and 108c. This is because the multilayer film When the oxide semiconductor film 107 and the oxide semiconductor film 108 are formed by a sputtering method, Since a rare gas is used as the gas, the rare gas is contained in the multilayer film 107 and the oxide semiconductor film 108. In addition, oxygen deficiency occurs in the low resistance regions 107b, 107c, 108b, and 108c. This is because rare gases are intentionally added to form the low resistance region 1 In the channel regions 107b, 107c, 108b, and 108c, The rare gas element may be added.

[0059] In addition, since the low resistance regions 107b and 107c are in contact with the insulating film 126, the channel region 10 The hydrogen concentration is higher in the low-resistance regions 108b and 108c than in the insulating film 12. 6, the hydrogen concentration is higher than that in the channel region 108a.

[0060] In the low resistance regions 107b, 107c, 108b, and 108c, secondary ion mass spectrometry is performed. The concentration of hydrogen obtained by 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 or more, or 5 x 10 20 atoms / cm 3 It can be more than The hydrogen concentration of the channel regions 107a and 108a obtained by secondary ion mass spectrometry is Degrees are 5 x 10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 below , or 5 × 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 below , or 5 × 10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 below It can be said that:

[0061] Compared to the channel regions 107a and 108a, the low resistance regions 107b, 107c, and 108 In the samples of b and c, the hydrogen concentration is high and the amount of oxygen deficiency is large due to the addition of rare gas elements. Therefore, the conductivity is high and the region functions as a source region and a drain region. is the resistivity of the low resistance regions 107b, 107c, 108b, and 108c, which is 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It can be said that:

[0062] In the low resistance regions 107b, 107c, 108b, and 108c, the amount of hydrogen is If the amount of the vacancies is equal to or less than that of the oxygen vacancies, hydrogen is easily captured by the oxygen vacancies, and the channel region 107a As a result, a transistor having normally-off characteristics can be fabricated. This can be done.

[0063] In addition, in the low resistance regions 107b, 107c, 108b, and 108c, the amount of hydrogen is compared When the amount of oxygen vacancies is large, the amount of hydrogen is controlled to form low resistance regions 107b and 107 Alternatively, the carrier density of the low resistance region 10c, 108b, and 108c can be controlled. In 7b, 107c, 108b, and 108c, the amount of hydrogen is large compared to the amount of oxygen vacancy. In this case, the amount of oxygen vacancies is controlled to form low resistance regions 107b, 107c, 108b, and 10 The carrier density of the low resistance regions 107b, 107c, and 108c can be controlled. The carrier density of 08b and 108c is 5×10 18 pieces / cm 3 or more, or 1×10 19 pieces / cm 3 or more, or 1×10 20 pieces / cm 3 By doing so, the channel region and the source electrode and between the conductive films 134, 135, 136, and 137 that function as drain electrodes. It is possible to manufacture a transistor with low resistance and large on-state current.

[0064] The transistors 100g and 100h shown in this embodiment each have a channel region and a source electrode and between the conductive films 134, 135, 136, and 137 functioning as drain electrodes. , the parasitic resistance is small because of the low resistance regions 107b, 107c, 108b, and 108c.

[0065] In the transistor 100g, the conductive film 119 and the conductive films 134 and 135 overlap each other. Therefore, in order to reduce the parasitic capacitance between the conductive film 119 and the conductive films 134 and 135, In the transistor 100h, the conductive film 120 and the conductive film 1 Therefore, the conductive film 120 and the conductive films 136 and 137 do not overlap each other. As a result, it is possible to reduce the parasitic capacitance of the substrate 101. In this case, the signal delay in the conductive films 119, 120, 134, 135, 136, and 137 is reduced. It is possible to reduce

[0066] Therefore, the transistors 100g and 100h have a large on-state current and a low field effect mobility. expensive.

[0067] In addition, in the transistor 100g, a conductive film 119 is used as a mask to add a large amount of impurity elements. The conductive film 120 of the transistor 100h is masked with a In other words, the impurity element is added to the oxide semiconductor film 108 in a self-aligned state. A low resistance region can be formed.

[0068] The transistor 100g included in the driver circuit has a large on-state current and high field-effect mobility. Therefore, a display device in which the area occupied by the driver circuit portion is small can be manufactured.

[0069] In addition, by using a transistor with high field effect mobility, It is possible to form a demultiplexer circuit in the signal line driver circuit. A circuit distributes one input signal to one of multiple outputs, so It is possible to reduce the number of input terminals. For example, if one pixel has a red sub-pixel and a green sub-pixel, The pixel has a blue pixel and a blue sub-pixel, and each pixel is provided with a demultiplexer circuit. Since the input signal input to each sub-pixel can be distributed by a demultiplexer circuit, This makes it possible to reduce the number of input terminals to one-third.

[0070] In addition, by providing a transistor 100h with a large on-state current in the pixel area, Even if the number of wirings increases in devices and high-definition display devices, the signal delay in each wiring can be reduced. It is possible to suppress display unevenness.

[0071] For these reasons, the driver circuit section is fabricated using transistors capable of high-speed operation. In addition, by using transistors with low parasitic capacitance and parasitic resistance in the pixel area, high precision can be achieved. It is possible to manufacture a display device that is thin and capable of double-speed driving.

[0072] The configuration shown in FIG. 1 will be described in detail below.

[0073] Various substrates can be used as the substrate 101, and it is not limited to a specific one. Examples of the substrate include a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SOI Substrate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil A substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminoborose glass. The materials used are fluoride glass, soda lime glass, etc. Flexible substrates, laminated films, substrates Examples of material films include the following: Polyethylene naphthalate (PET), Polyethylene naphthalate (PEN), Polyethersulfone ( Plastics such as PES are also available. For example, synthetic resins such as acrylic. Or, for example, polypropylene, polyvinyl fluoride, or polyvinyl chloride. Examples of the material include polyester, polyamide, polyimide, and aramide. In particular, semiconductor substrates and single crystal substrates. By manufacturing transistors using a SOI substrate, etc., the characteristics, size, The purpose of this method is to manufacture transistors that have little variation in shape, high current capacity, and small size. When a circuit is constructed using such transistors, the circuit can consume less power. It is possible to achieve a higher integration of the circuits.

[0074] In addition, a flexible substrate is used as the substrate 101, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 101 and the transistor. After a semiconductor device is partially or entirely completed thereon, the semiconductor device is separated from the substrate 101 and then attached to another substrate. In this case, the transistors are mounted on substrates with poor heat resistance or flexible substrates. The above-mentioned release layer may be, for example, a tungsten film and a silicon oxide film. The laminated structure of inorganic films with composite films, and organic resin films such as polyimide films formed on the substrate Configurations etc. can be used.

[0075] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Rubber substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, (including recycled polyester), leather substrates, or rubber substrates. By using this, it is possible to form transistors with good characteristics and transistors with low power consumption. It is possible to manufacture devices that are less likely to break, have heat resistance, and are lighter or thinner.

[0076] The insulating film 104 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics between the multilayer film 107 and the oxide semiconductor film 108, At least the region of the insulating film 104 that is in contact with the multilayer film 107 and the oxide semiconductor film 108 is an oxide semiconductor film. It is preferable to form the insulating film 104 from a compound insulating film that releases oxygen when heated. By using an oxide insulating film having such a structure, oxygen contained in the insulating film 104 can be removed by heat treatment. The insulating film 104 can be transferred to the oxide semiconductor film 107 and the oxide semiconductor film 108. By forming the region in contact with the substrate 101 with a nitride insulating film, It is possible to prevent the element from moving to the multilayer film 107 and the oxide semiconductor film 108. ,preferable.

[0077] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 2 By making the insulating film 104 thick, the insulating film 104 can be formed to have a thickness of 00 nm or more and 1000 nm or less. The amount of oxygen released from the insulating film 104 can be increased, and the insulating film 104 and the multilayer film 107 can be and the interface state density at the interface with the oxide semiconductor film 108, and the interface state density at the interface with the oxide semiconductor film 107. a channel region 107 a included in the oxide semiconductor film 108 and a channel region 108 a included in the oxide semiconductor film 108 It is possible to reduce the oxygen vacancies that occur.

[0078] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitrogen. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide Any of the above may be used, and the film may be provided as a single layer or a multilayer.

[0079] Here, the insulating film 104 is formed by stacking an insulating film 104a and an insulating film 104b. By using a nitride insulating film as the insulating film 104a, the elements contained in the substrate 101 can be prevented from being damaged. In addition, by using an oxide insulating film as the insulating film 104b, In addition, the interface state density at the interface between the multilayer film 107 and the oxide semiconductor film 108 can be reduced. This can be done.

[0080] In the multilayer film 107 and the oxide semiconductor film 108, silicon, which is one of the Group 14 elements, is used. When the multilayer film 107 and the oxide semiconductor film 108 contain oxygen or carbon, oxygen vacancies are increased. Therefore, the multilayer film 107 and the oxide semiconductor film 108, in particular, In the channel regions 107a and 108a, the concentrations of silicon and carbon (secondary ion mass distribution) The concentration obtained by the analytical method is 2 x 10 18 atoms / cm 3 or less, or 2 x 10 17 atoms / cm 3 As a result, the transistor has a threshold voltage is positive (also called normally-off characteristic).

[0081] In addition, in the multilayer film 107 and the oxide semiconductor film 108, particularly the channel region 107a, In 108a, an alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry The metal concentration is 1×10 18 atoms / cm 3 or less, or 2 x 10 16 atoms / c m 3 The alkali metal and the alkaline earth metal can be bonded to the oxide semiconductor. When the transistor is combined with a junction, carriers may be generated, increasing the off-state current of the transistor. Therefore, the alkali metal or alkaline earth metal in the channel regions 107a and 108a It is preferable to reduce the concentration of the metal. As a result, the transistor has a threshold voltage of + The device has electrical characteristics (also called normally-off characteristics).

[0082] In addition, in the multilayer film 107 and the oxide semiconductor film 108, particularly the channel region 107a, When nitrogen is contained in 108a, electrons that act as carriers are generated, and the carrier density increases. As a result, the transistor using the oxide semiconductor film containing nitrogen may become n-type. Therefore, the oxide semiconductor film, particularly In the channel regions 107a and 108a, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atom s / cm 3 It can be the following:

[0083] The multilayer film 107 and the oxide semiconductor film 108, particularly the channel regions 107a and 108 In the method of (a), the carrier density of the oxide semiconductor film is reduced by reducing the impurity element. Therefore, the multilayer film 107 and the oxide semiconductor film 108, in particular, the channel In the regions 107a and 108a, the carrier density is set to 1×10 17 pieces / cm 3 The following, or 1×10 15 pieces / cm 3 or less, or 1×10 13 pieces / cm 3 or less, or 8 x 10 11 pieces / cm 3 or less, or 1×10 11 pieces / cm 3 Less than or equal to 1×10 10 pieces / cm 3 less than and 1 × 10 -9 pieces / cm 3 It can be more than that.

[0084] The multilayer film 107 and the oxide semiconductor film 108 have a low impurity concentration and a low density of defect states. By using a thin oxide semiconductor film, a transistor with better electrical characteristics can be manufactured. Here, the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). ) is called high purity authentic or substantially high purity authentic. High purity authentic or substantially high purity authentic Since the oxide semiconductor has few carrier generation sources, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be formed. The threshold voltage tends to be positive (also called normally-off characteristic). In addition, a highly-purified intrinsic or substantially highly-purified intrinsic oxide semiconductor film has a low density of defect states. Since the concentration of the trap level is low, the trap level density may also be low. The oxide semiconductor film, which is highly intrinsic, has a significantly small off-state current and When the drain voltage is in the range of 1V to 10V, the off-state current is below the measurement limit of the analyzer, i.e. 1×10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has low electrical characteristics. In some cases, the variation in characteristics is small, resulting in a highly reliable transistor.

[0085] In addition, the oxide semiconductor films 105 and 106 constituting the multilayer film 107 and the oxide semiconductor film 1 For example, the non-single crystal structure may be, for example, CAAC-O S, polycrystalline structure, microcrystalline structure described later, or amorphous structure. In the non-single crystal structure, The amorphous structure has the highest density of defect states, and the CAAC-OS has the lowest density of defect states.

[0086] The oxide semiconductor films 105 and 106 and the oxide semiconductor film 107 are 08 is the amorphous structure region, the microcrystalline structure region, the polycrystalline structure region, and the CAAC-OS region. The mixed film may be a film having two or more types of regions, a region having a single crystal structure, and a region having a single crystal structure. Crystalline structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal In some cases, the mixed film has a single layer structure having two or more regions of the above structure. For example, there are regions with an amorphous structure, a microcrystalline structure, a polycrystalline structure, and a CAAC-OS region. In some cases, the structure may be a laminate of two or more of the regions of a single crystal structure.

[0087] In the multilayer film 107, the channel region 107a and the low resistance regions 107b and 107 In addition, in the oxide semiconductor film 108, the crystallinity of the channel region c may be different from that of the oxide semiconductor film 108. The crystallinity of the low-resistance regions 108a and 108b and 108c may differ. When impurity elements are added to the resistive regions 107b, 107c, 108b, and 108c, the resistive regions 107b, 107c, 108b, and 108c have low resistance. The resistive regions 107b, 107c, 108b, and 108c are damaged, resulting in low crystallinity. This is to lower it.

[0088] The insulating films 116 and 117 are formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that the characteristics of the interface between the multilayer film 107 and the oxide semiconductor film 108 can be improved. Therefore, in the insulating films 116 and 117, at least the multilayer film 107 and the oxide semiconductor film 108 The insulating films 116 and 117 are preferably formed using an oxide insulating film. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide Aluminum, hafnium oxide, gallium oxide, Ga-Zn oxide, etc. may be used. , it can be provided as a single layer or a laminate.

[0089] The insulating films 116 and 117 are made of insulating material having a blocking effect against oxygen, hydrogen, water, etc. By providing the insulating film, the diffusion of oxygen from the multilayer film 107 and the oxide semiconductor film 108 to the outside can be prevented. This can prevent hydrogen, water, and the like from entering the multilayer film 107 and the oxide semiconductor film 108 from the outside. As an insulating film having a blocking effect against oxygen, hydrogen, water, etc., aluminum oxide is Aluminum oxide, aluminum nitride, gallium oxide, gallium oxide nitride, yttrium oxide, Examples include yttrium nitride, hafnium oxide, and hafnium oxynitride.

[0090] The insulating films 116 and 117 are made of hafnium silicate (HfSiO x ), nitrogen Doped hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium Aluminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of hk materials can reduce gate leakage of transistors.

[0091] As the insulating films 116 and 117, an oxide insulating film which releases oxygen by heating is used. By this heat treatment, oxygen contained in the insulating films 116 and 117 is removed by the heat treatment. The ions can be transferred to the semiconductor film 108.

[0092] The thickness of the insulating films 116 and 117 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. m or less, or from 10 nm to 250 nm.

[0093] The conductive films 119 and 120 are made of aluminum, chromium, copper, tantalum, titanium, or molybdenum. , nickel, iron, cobalt, tungsten, or the above-mentioned metal elements. The alloy may be formed by using an alloy containing the above-mentioned metal elements or an alloy combining the above-mentioned metal elements. In addition, the present invention uses a metal element selected from one or more of manganese and zirconium. The conductive films 119 and 120 may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a single layer structure of a copper film containing manganese, A two-layer structure in which a titanium film is laminated on an aluminum film, and a titanium film is laminated on a titanium nitride film a two-layer structure in which a tungsten film is laminated on a titanium nitride film; a two-layer structure in which a tantalum nitride film is laminated on a titanium nitride film; Or a two-layer structure in which a tungsten film is laminated on a tungsten nitride film, or a copper film containing manganese A two-layer structure in which a copper film is laminated on top of a titanium film, and an aluminum film is laminated on top of the titanium film, A three-layer structure is formed by forming a titanium film on top of the titanium film, laminating a copper film on a copper film containing manganese, and There are three-layer structures, such as a copper film containing manganese on top of the aluminum. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of the above elements may be used.

[0094] The conductive films 119 and 120 are made of indium tin oxide or indium containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide A light-transmitting conductive material such as indium tin oxide containing 1,4-dichloro-1,5-trimethylsilyl 1,5-dichloro-1,6 ... Alternatively, the conductive material having light-transmitting properties and the metal element may be laminated together.

[0095] The thickness of the conductive films 119 and 120 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. 00 nm or less.

[0096] The conductive films 134, 135, 136, and 137 function as source and drain electrodes. The conductive films 134, 135, 136, and 137 are made of the same material as that of the conductive films 119 and 120. and structures can be used as appropriate.

[0097] The insulating film 127 can be formed of a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that an oxide insulating film which releases oxygen by heating can be used as the insulating film 127. The heat treatment is performed to remove oxygen from the insulating film 127 and the multilayer film 107 and the oxide semiconductor film 10 It can be moved to 8.

[0098] The insulating film 127 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitrogen. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide Any of the above may be used, and the film may be provided as a single layer or a multilayer.

[0099] The thickness of the insulating film 127 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. It can be as follows:

[0100] <Configuration 2 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIG. A transistor 100i formed in the pixel portion, a transistor 100j formed in the pixel portion, In this case, the conductive films 119 and 120 functioning as gate electrodes have a laminated structure. FIG. 3A shows transistors 100i and 100 3(A) shows a cross-sectional view of the transistors 100i and 100j in the channel width direction. A cross-sectional view is shown.

[0101] The conductive film 119 includes a conductive film 119a in contact with the insulating film 116 and a conductive film 119b in contact with the insulating film 116. The conductive film 119a has an end portion outside the end portion of the conductive film 119b. That is, the conductive film 119a protrudes from the conductive film 119b.

[0102] In addition, the end of the insulating film 116 is located outside the end of the conductive film 119a. The insulating film 116 has a shape protruding from the conductive film 119a. The sides may be curved.

[0103] The conductive film 120 includes a conductive film 120a in contact with the insulating film 117 and a conductive film 120b in contact with the insulating film 117. The conductive film 120a has an end portion outside the end portion of the conductive film 120b. That is, the conductive film 120a protrudes from the conductive film 120b.

[0104] In addition, the end of the insulating film 117 is located outside the end of the conductive film 120a. The insulating film 117 has a shape protruding from the conductive film 120a. The sides may be curved.

[0105] The conductive films 119a and 120a are made of titanium, tantalum, molybdenum, or tungsten. or alloys, or titanium nitride, tantalum nitride, molybdenum nitride, tungsten nitride, etc. Alternatively, the conductive films 119a and 120a can be formed using a Cu-X alloy (X The alloy may be formed using Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti. can.

[0106] The conductive films 119b and 120b are formed using a low resistance material. b) Copper, aluminum, gold, silver, tungsten, etc., or alloys thereof It can be formed using a compound having the main component.

[0107] The conductive films 119a and 120a are made of a Cu-X alloy (X is Mn, Ni, Cr, Fe When a material such as a ferroelectric material (Co, Mo, Ta, or Ti) is used, the area in contact with the insulating film is covered by heat treatment. A coating may be formed. The coating is formed of a compound containing X. Compound containing X Examples of the oxides of X include oxides of X and nitrides of X. The coating film formed acts as a blocking film, and the Cu in the Cu-X alloy film is Therefore, it is possible to prevent the foreign matter from entering the oxide semiconductor film.

[0108] The copper concentration in the channel region of the multilayer film 107 and the oxide semiconductor film 108 is set to 1× 10 18 atoms / cm 3 By setting the following, an insulating film having a function as a gate insulating film is formed. Electron traps at the interfaces of the films 116 and 117 with the multilayer film 107 and the oxide semiconductor film 108 It is possible to reduce the level density. As a result, the subthreshold swing value (S value It is possible to fabricate excellent transistors with a

[0109] As shown in the transistors 100i and 100j, the conductive film 119 having the shape shown in FIG. , 120 and the insulating films 116, 117, the electric potential of the drain region of the transistor is Therefore, the threshold voltage of the transistor due to the electric field in the drain region can be reduced. It is possible to reduce deterioration such as voltage fluctuations.

[0110] <Configuration 3 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS. The transistor 100k formed in the operating circuit section is a transistor having a dual gate structure. FIG. 7A is a top view of the transistor 100k, and FIG. 8(A) is a top view of the transistor 100z, taken along the dashed line AB in FIG. FIG. 8(B) is a plan view of FIG. 7(A) and a cross-sectional view taken along dashed line CD in FIG. 7B is a cross-sectional view taken along dashed dotted line GH, and a cross-sectional view taken along dashed dotted line IJ in FIG.

[0111] The transistor 100k shown in FIG. 8 includes a conductive film 102 on a substrate 101 and a The insulating film 104 on the conductive film 102, the multilayer film 107 on the insulating film 104, and the multilayer film 107 and a conductive film 119 overlapping the multilayer film 107 via the insulating film 116. The structure of the multilayer film 107 is the same as that of the multilayer film 107 shown in <Structure 1 of the semiconductor device>. Therefore, detailed description will be omitted.

[0112] The conductive film 102 and the conductive film 119 function as gate electrodes. The transistor 100k is a transistor having a dual gate structure. The insulating film 116 functions as a gate insulating film.

[0113] Although not shown, the conductive film 102 may overlap the entire area of ​​the multilayer film 107. .

[0114] It is preferable to provide a nitride insulating film 161 on the substrate 101. The nitride insulating film 161 and the insulating film 162 are silicon nitride films, aluminum nitride films, etc. By covering the conductive film 102 with the insulating film 104a, the diffusion of the metal elements contained in the conductive film 102 is prevented. It is possible and preferable to do so.

[0115] In the transistor 100k, the conductive film 102 and the conductive film 119 are not connected. By applying different potentials, the threshold voltage of the transistor 100k can be controlled. Alternatively, as shown in FIG. 8B, the conductive film 102 and the conductive film 119 are connected to each other and the same potential is applied. By applying a bias voltage, the initial characteristic variation is reduced, and Suppression of degradation during stress testing and on-state degradation at different drain voltages It is possible to suppress the fluctuation of the voltage at the start of the current. As shown in FIG. 1B, the conductive film 102 and the conductive film 119 are connected to each other, so that the conductive films 102 and 11 Since the electric field of the multilayer film 107 affects the top and side surfaces of the multilayer film 107, the capacitance is increased throughout the multilayer film 107. That is, the area through which the carriers flow becomes larger in the film thickness direction, so the carriers As a result, the on-current of the transistor 100k increases. The field effect mobility is increased by 1.5 times the channel length of the transistor. By setting the thickness to 45 μm or more and 2.2 μm or less, the on-current is further increased and the field effect is In addition, the on-current of the transistor 100k is large, As a result, the area occupied by the driving circuit section can be reduced. Small, narrowly framed displays can be made.

[0116] The transistor 100z is the same as the transistor 100h shown in <Configuration 1 of the semiconductor device>. Therefore, detailed description will be omitted.

[0117] In the display device described in this embodiment, the transistors in the driver circuit portion and the pixel portion are The transistors included in the driving circuit section have a dual gate structure. In contrast, the driver circuit portion has a transistor with a higher field effect mobility than the pixel portion. As a result, a driver circuit section capable of high speed operation can be manufactured. The driving circuit is made of a transistor with low parasitic capacitance and resistance. By using a transistor to create a pixel section, a high-definition display device capable of double-speed driving can be manufactured. It is possible.

[0118] <Configuration 4 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIG. A transistor 100m formed in the pixel portion, a transistor 100n formed in the pixel portion, In this case, the conductive films 119 and 120 functioning as gate electrodes have a laminated structure. FIG. 9(A) shows transistors 100m and 100 9(A) shows a cross-sectional view of the transistors 100m and 100n in the channel width direction, and FIG. A cross-sectional view is shown.

[0119] The conductive films 119 and 120 are the same as those in the conductive film 119 shown in <Structure 2 of the semiconductor device> of this embodiment. , 120 has a laminate structure similar to that of the first embodiment.

[0120] The insulating films 116 and 117 are the insulating films shown in <Configuration 2 of the semiconductor device> of this embodiment. It has a similar structure to 116 and 117.

[0121] As shown in the transistors 100m and 100n, the conductive films 119 and 12 having the shapes shown in FIG. 0 and the insulating films 116 and 117, the electric field in the drain region of the transistor is reduced. Therefore, the threshold voltage of the transistor due to the electric field in the drain region is It is possible to reduce deterioration such as fluctuations.

[0122] <Configuration 5 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIG. The transistors 111w and 111x formed in the pixel portion and the transistors 111w and 111x formed in the pixel portion 111y has a multilayer film. Note that FIG. 10(A) shows the structure of the channel length direction. FIG. 10(B) shows a cross-sectional view of the transistors 111w and 111h in the channel length direction. 4 shows cross-sectional views of transistors 111x and 111y.

[0123] The multilayer film 107 included in the transistor 111w shown in FIG. The channel region 107a has a first resistance region 107b and a second resistance region 107c. A channel region 142a in contact with the insulating film 104 and a channel region 142a in contact with the channel region 142a The semiconductor device has a region 105a and a channel region 106a in contact with the channel region 105a. The region 107b is a low resistance region 142b that is in contact with the insulating film 104 and a low resistance region 142b that is in contact with the insulating film 104. and a low resistance region 106b in contact with the low resistance region 105b. The low resistance region 107c is a low resistance region 142c in contact with the insulating film 104 and a low resistance region 142 and a low resistance region 106c in contact with the low resistance region 105c. Although not shown in FIG. 10, the channel region 142a, the low resistance region 142b, and The oxide semiconductor film having the low-resistance region 142c is referred to as an oxide semiconductor film 142. The multilayer film 107 includes an oxide semiconductor film 142, an oxide semiconductor film 105, and an oxide semiconductor film 1 06 are stacked in order.

[0124] The multilayer film 107 included in the transistor 111x shown in FIG. The channel region 107a has a first resistance region 107b and a second resistance region 107c. A channel region 142a in contact with the insulating film 104 and a channel region 142a in contact with the channel region 142a A region 105a, a channel region 106a in contact with the channel region 105a, and a channel region The low resistance region 107b is formed by insulating film 106a and a channel region 143a. 4, a low resistance region 142b in contact with the low resistance region 105b, A low resistance region 106b in contact with the low resistance region 105b and a low resistance region 106b in contact with the low resistance region 106b The low resistance region 107c is a low resistance region 143b in contact with the insulating film 104. 2c, a low resistance region 105c in contact with the low resistance region 142c, and and a low resistance region 143c in contact with the low resistance region 106c. Although not shown in FIG. 10, the channel region 143a, the low resistance region 143b, and the low resistance The oxide semiconductor film having the region 143c is referred to as an oxide semiconductor film 143. The oxide semiconductor film 142, the oxide semiconductor film 105, the oxide semiconductor film 106, and the oxide semiconductor film 107 are An oxide semiconductor film 143 is stacked in this order.

[0125] The multilayer film 110 included in the transistor 111y shown in FIG. The channel region 110a has a first resistance region 110b, and a second resistance region 110c. A channel region 108a in contact with the insulating film 104 and a channel region 108b in contact with the channel region 108a The low resistance region 110b is a low resistance region 10 8b and a low resistance region 144b in contact with the low resistance region 108b. c is a low-resistance region 108c in contact with the insulating film 104 and a low-resistance region 108c in contact with the low-resistance region 108c. 10, the channel region 144a and the low resistance region 144c are The oxide semiconductor film having the region 144b and the low-resistance region 144c is formed as the oxide semiconductor film 144 That is, the multilayer film 110 includes the oxide semiconductor film 108 and the oxide semiconductor film 144. They are layered in order.

[0126] The oxide semiconductor films 142, 143, and 144 are the same as the oxide semiconductor films 105, 106, and 108. In comparison, it is preferable that the energy gap is large, the electron affinity is small, and the insulating property is high. In addition, the oxide semiconductor films 142, 143, and 144 are the same as the oxide semiconductor films 105 and 106. In addition, the oxide semiconductor The films 142, 143, and 144 preferably have a function of blocking impurities from the outside. Such oxide semiconductor films include M (M is Mg, Al, Ti, Ga, Y, Zr, The atomic ratio of In to La, Ce, Nd, or Hf is small. , 143, 144 are In-M-Zn oxides (M is Mg, Al, Ti, Ga, Y, Zr, In the case of La, Ce, Nd, or Hf, oxide semiconductor films 142, 143, and 144 are formed. The atomic ratio of the metal elements in the target used for the ion implantation is In:M:Zn=x3:y3. If you set it to :z3, 、 It is preferable that x3 / y3 is equal to or greater than 1 / 6 and less than 1. It is preferable that y3 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When y3 is 1 or more and 6 or less, the oxide semiconductor films 142, 143, and 144 can be formed by CAA The C-OS film is easily formed. The typical atomic ratio of the metal elements in the target is as follows: In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3: 6, In:M:Zn=1:3:8, In:M:Zn=1:4:4, In:M:Zn=1: 4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, In:M:Zn= 1:4:8, In:M:Zn=1:5:5, In:M:Zn=1:5:6, In:M:Z Examples include n=1:5:7, In:M:Zn=1:5:8, In:M:Zn=1:6:8, etc.

[0127] In the transistor 111w illustrated in FIG. 10A, the oxide semiconductor film 142 is an oxide semiconductor Compared to the film 105, the energy gap is larger and the electron affinity is smaller, so the channel is formed in the oxide semiconductor film 105. That is, a buried channel structure is formed. The oxide semiconductor film 106 containing one or more metal elements constituting the oxide semiconductor film 105 and the oxide Since the oxide semiconductor film 105 and the oxide semiconductor film 106 are and an interface between the oxide semiconductor film 105 and the oxide semiconductor film 142. Therefore, by providing the oxide semiconductor film 106 and the oxide semiconductor film 142, This makes it possible to reduce variations and fluctuations in electrical characteristics such as the threshold voltage of transistors. do.

[0128] Similarly, the transistor 111x illustrated in FIG. 10B also has the oxide semiconductor film 142 and the The oxide semiconductor film 43 has a larger energy gap than the oxide semiconductor films 105 and 106. Since the affinity is small, a channel is formed in the oxide semiconductor film 105. In addition, the multilayer film 107 having the oxide semiconductor films 142 and 143 is formed. As a result, the interface between the oxide semiconductor film 142 and the oxide semiconductor film 105 and the oxide semiconductor film 10 5 and the oxide semiconductor film 106, and the interface between the oxide semiconductor film 106 and the oxide semiconductor film 143 As a result, the threshold voltage of the transistor, etc. This can reduce the variation and fluctuation in the electrical characteristics of the semiconductor device.

[0129] Similarly, a transistor 111y illustrated in FIG. 10B also includes an oxide semiconductor film 144. By forming the multilayer film 110, the oxide semiconductor film 144 and the oxide semiconductor film 108 are As a result, the voltages such as the threshold voltage of the transistor are reduced. This can reduce variation and fluctuation in electrical characteristics.

[0130] <Band structure> Next, as a typical example of the transistor described in this embodiment, a transistor 10 shown in FIG. We explain the band structure at an arbitrary cross section of 0k.

[0131] FIG. 28(A) shows an OP including the channel region of the transistor 100k shown in FIG. The band structure in the cross section is shown. Note that the channel region 106a is larger than the channel region 105a. The energy gap is slightly larger than that of the insulating film 104a, the insulating film 104b, and the The insulating film 116 is more resistant to the channel region 106a and the channel region 105a. In addition, the energy gap between the channel region 106a and the channel region 105a is large. The Fermi levels (Ef) of the insulating films 104a, 104b, and 116 .) is approximately equal to the intrinsic Fermi level (denoted as Ei). The work functions of the film 102 and the conductive film 119 are set to be approximately equal to the Fermi level.

[0132] When the gate voltage is set to be equal to or higher than the threshold voltage of the transistor, the channel region 106a and the Due to the difference in energy between the conduction band minimum and the channel region 105a, electrons flow into the channel region 105b. In other words, it is assumed that electrons are embedded in the channel region 105a. The energy at the bottom of the conduction band is denoted as Ec, and the energy at the top of the valence band is denoted as - is written as Ev.

[0133] Therefore, the transistor according to one embodiment of the present invention has an interface scattering caused by the embedding of electrons. Therefore, the transistor according to one embodiment of the present invention has a reduced channel resistance. The resistance is small.

[0134] Next, in FIG. 28(B), the source region or drain of the transistor 100k shown in FIG. The band structure in the QR cross section including the rain region is shown. The low resistance regions 105b, 105c, 106b, and 106c are in a degenerated state. , 106b, 106c, the Fermi level Ef is approximately equal to the conduction band edge energy Ec. In the low resistance region 105b, the energy of the conduction band minimum is set to be equal to that of the channel region. The Fermi level of the low-resistance region 106b is set to be approximately equal to the Fermi level of the low-resistance region 105a. The energy of the edge is set to be approximately the same as the Fermi level of the channel region 106a. The same is true for 5c and low resistance region 106c.

[0135] At this time, the energy barrier between the conductive film 134 and the low-resistance region 106b is sufficiently small. Therefore, the low resistance region 106b and the low resistance region 105b are in ohmic contact. Similarly, the conductive film 135 and the low resistance region 106c form an energy barrier. The wall is small enough to provide an ohmic contact. Therefore, the conductive film 134 and the conductive film 135 are in ohmic contact with each other. Electrons are smoothly exchanged between the channel region 106a and the channel region 105a. It can be seen that this is carried out in

[0136] As described above, the transistor according to one embodiment of the present invention has a source electrode and a drain electrode. The electron exchange between the gate electrode and the channel region is smooth, and the channel resistance is low. It is a small transistor, i.e. a transistor with excellent switching characteristics. It can be seen that.

[0137] <Method 1 for manufacturing semiconductor device> Next, a method for fabricating the transistors 100g and 100h shown in FIG. 4 to 6.

[0138] Films constituting the transistors 100g and 100h (insulating film, oxide semiconductor film, conductive film, etc.) The methods include sputtering, chemical vapor deposition (CVD), vacuum deposition, and pulsed laser deposition ( It can be formed by using the PLD method. Alternatively, it can be formed by coating or printing. The deposition method includes sputtering and plasma enhanced chemical vapor deposition (PECVD). is a typical example, but thermal CVD may also be used. An example of the thermal CVD method is MOCVD (metal organic chemical vapor deposition). Chemical vapor deposition (CVD) and ALD (Atomic Layer Deposition) methods may also be used.

[0139] In the thermal CVD method, the pressure in the chamber is set to atmospheric pressure or reduced pressure, and the source gas and the oxidizing agent are simultaneously The reaction is carried out near or on the substrate, and the film is deposited on the substrate. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that no defects are created by the image.

[0140] In the ALD method, the pressure in the chamber is set to atmospheric pressure or reduced pressure, and the source gas for the reaction is sequentially Next, the gas is introduced into the chamber, and the gas introduction sequence is repeated to form a film. For example, By switching each switching valve (also called high-speed valve), two or more kinds of raw materials can be The gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the multiple source gases. At the same time or after this, an inert gas (argon, nitrogen, etc.) is introduced to If an inert gas is introduced at the same time, the inert gas is introduced as a carrier gas. In addition, an inert gas may be introduced at the same time as the second source gas is introduced. Instead of introducing an inert gas, the first source gas is discharged by evacuation, and then the second source gas is introduced. A source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first monoatomic layer. The first monolayer is then reacted with the second source gas introduced later, and the second monolayer is formed on the first monolayer. The layers are then stacked together to form a thin film.

[0141] This gas introduction sequence is controlled and repeated several times until the desired thickness is achieved. The thickness of the thin film increases depending on the number of times the gas introduction sequence is repeated. This allows precise film thickness control, making it possible to fabricate minute transistors. It is suitable for fabrication.

[0142] As shown in FIG. 4A, an insulating film 104 is formed on a substrate 101. Next, a driving circuit section An oxide semiconductor film 105 is formed over the insulating film 104 .

[0143] The insulating film 104 is formed by a method such as sputtering, CVD, vapor deposition, or pulsed laser deposition (PLD). The insulating film 101 may be formed by using a suitable method such as a printing method or a coating method. After the film is formed, oxygen can be added to the insulating film to form the insulating film 104. The oxygen added to the insulating film can be oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions. The doping method includes ion doping, ion implantation, plasma treatment, etc. In addition, a film that suppresses oxygen desorption is formed on the insulating film, and then the insulating film is Oxygen may be added to the membrane.

[0144] In addition, the substrate placed in the evacuated processing chamber of the plasma CVD device is heated to 180°C or higher. The temperature is kept at 280°C or lower, or at 200°C to 240°C, and the raw material gas is introduced into the treatment chamber. The pressure in the treatment chamber is set to 100 Pa or more and 250 Pa or less, or 100 Pa or more and 200 Pa or less. The electrode in the treatment chamber is set at 0.17 W / cm 2 More than 0.5W / cm 2 Below, again is 0.25W / cm 2 More than 0.35W / cm 2 Under the following conditions for supplying high frequency power, A silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment is used as an insulating film. It can be formed as a membrane 104 .

[0145] Here, the insulating film 104a and the insulating film 104b are formed by laminating them. For example, a silicon nitride film having a thickness of 100 nm may be formed as the insulating film 104a by plasma CVD. The insulating film 104b is a silicon oxynitride film having a thickness of 300 nm. The film is formed using the CVD method.

[0146] A method for forming the oxide semiconductor film 105 is described below. Ring method, coating method, pulsed laser deposition method, laser ablation method, thermal CVD method, etc. Next, a mask is formed on the oxide semiconductor film by a lithography process. After the mask is formed, part of the oxide semiconductor film is etched using the mask. As shown in FIG. 1A, the oxide semiconductor film 105 can be formed. After that, the mask is Note that the oxide semiconductor film 105 is formed by etching part of the oxide semiconductor film. After that, a heat treatment may be carried out.

[0147] Alternatively, the oxide semiconductor film 105 may be formed by a printing method, so that the oxide semiconductor film 105 is formed by element separation. The conductive film 105 can be formed directly.

[0148] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like. The CAAC-OS film can be formed by using an AC power supply or a DC power supply. In addition, it is possible to form an oxide semiconductor film by a sputtering method using an RF power supply. In addition, an oxide semiconductor film is formed by sputtering using an AC power supply or a DC power supply. This is preferable because it results in a uniform distribution of the film thickness, the film composition, or the crystallinity.

[0149] The sputtering gas is a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen. In the case of a mixture of rare gas and oxygen, the amount of oxygen gas is appropriately adjusted relative to the amount of rare gas. A higher ratio is preferred.

[0150] In addition, if the atomic ratio of metal elements is In:M:Zn=x1:y1:z1, then x1 / y1 is In-M-Zn oxide (where M is Mg, Al, Ti, Ga, The oxide semiconductor film 105 is formed using a target of Y, Zr, La, Ce, Nd, or Hf. Complete.

[0151] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is set to 150°C or higher and 750°C or lower, or 150°C or higher and 450°C or lower, or 200°C or higher and 3 The oxide semiconductor film is formed at a temperature of 50° C. or lower to form a CAAC-OS film. In addition, by setting the substrate temperature to 25° C. or higher and lower than 150° C., A film can be formed.

[0152] In order to form a CAAC-OS film, which will be described later, it is preferable to apply the following conditions: It is.

[0153] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of -80°C or lower or -100°C or lower is used.

[0154] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. It is preferable that the oxygen ratio in the deposition gas is 30% by volume or more, or 100% by volume. Let us assume that.

[0155] In addition, after the oxide semiconductor film is formed, heat treatment is performed to dehydrogenate or The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, or The temperature is 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0156] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. The heating is performed in an inert gas atmosphere containing oxygen. Alternatively, the heating is performed in an inert gas atmosphere, and then in an oxygen atmosphere. Heating may be performed. Note that the inert atmosphere and oxygen atmosphere should not contain hydrogen, water, etc. The treatment time is preferably from 3 minutes to 24 hours.

[0157] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0158] The oxide semiconductor film is formed while being heated, and after the oxide semiconductor film is formed, By performing heat treatment, the oxide semiconductor film is The hydrogen concentration is 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 Below Down, or 5×10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 Below It can be below.

[0159] The deposition equipment using ALD can be used to form oxide semiconductor films, such as InGaZnO X (X>0) When forming a film, In(CH3)3 gas and O3 gas are introduced in sequence and repeatedly to form InO Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gas are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, the InGaO2 layer InZnO2 layer, GaInO layer, ZnInO layer, GaZnO layer, etc. Alternatively, instead of O3 gas, H2O gas bubbled with an inert gas such as Ar may be used. However, it is preferable to use O3 gas that does not contain H. In(CH3) Instead of the gas In(C2H5)3, gas Ga(CH3)3 may be used. Ga(C2H5)3 gas may be used instead of Zn(CH3)2 gas. Alternatively, Zn(C2H5)2 gas may be used.

[0160] Here, an oxide semiconductor film having a thickness of 35 nm is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this way, the oxide semiconductor film 105 is formed. An In-Ga-Zn oxide film with an n:Ga:Zn ratio of 3:1:2 is formed.

[0161] Next, as shown in FIG. 4B, an oxide semiconductor film 105 is formed on the driver circuit portion. A semiconductor film 106 is formed, and an oxide semiconductor film 108 is formed in the pixel portion. A multilayer film 107 is formed by sequentially stacking a dielectric film 105 and an oxide semiconductor film 106 .

[0162] In this step, the oxide semiconductor film 105 is formed by depositing an oxide semiconductor The conductive film 106 is formed to function as a source electrode and a drain electrode later. In the step of forming the conductive film, the oxide semiconductor film 105 is not etched. This is because the variation in length of the oxide semiconductor film 105 in the channel width direction of the transistor can be reduced. preferable.

[0163] Here, an oxide semiconductor film having a thickness of 20 nm is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this manner, the oxide semiconductor films 106 and 108 are formed. As the substrate 108, an In-Ga-Zn oxide film having a ratio of In:Ga:Zn=1:1:1.2 is formed. do.

[0164] Next, heat treatment is performed so that oxygen contained in the insulating film 104 is transferred to the oxide semiconductor film. Note that the heat treatment was performed to form the oxide semiconductor films 106 and 108. After that, the oxide semiconductor film is etched to form the oxide semiconductor films 106 and 108. You may do so beforehand.

[0165] The heat treatment should be performed at a temperature between 350℃ and 650℃, or between 450℃ and 600℃. By doing so, the CAAC conversion rate described below will be 60% or more but less than 100%, or 80% or more but less than 100%. %, or 90% or more and less than 100%, or 95% or more and 98% or less. In addition, it is possible to obtain an oxide semiconductor film in which the content of hydrogen, water, and the like is reduced. That is, it is possible to form an oxide semiconductor film having a low impurity concentration and a low density of defect states. It is possible.

[0166] Next, as shown in FIG. 4C, the insulating film 104, the multilayer film 107, and the oxide semiconductor film 10 An insulating film 115 is formed on the insulating film 8. Next, conductive films 119 and 120 are formed on the insulating film 115. do.

[0167] When a low-resistance material is used for the conductive films 119 and 120, for example, the oxide semiconductor film is provided with a low-resistance material. If the material is mixed in, the electrical characteristics of the transistor may be deteriorated. By forming the insulating film 115 before forming the conductive films 119 and 120, the oxide semiconductor film 1 Since the channel regions of the transistors 105 and 108 are not in contact with the conductive films 119 and 120, This makes it possible to suppress the amount of variation in the electrical characteristics, typically the threshold voltage.

[0168] As the insulating film 115, a silicon oxide film or a silicon oxynitride film is formed by using a CVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, and the like. Examples of oxidizing gases include oxygen, ozone, and monoxide. Examples include dinitrogen and nitrogen dioxide.

[0169] In addition, the insulating film 115 is formed by mixing an oxidizing gas with a deposition gas that is 20 times or more and 100 times or less. 100 Pa or less, or between 40 and 80 times, and the pressure in the treatment chamber is less than 100 Pa, or 50 Pa or less. By using a CVD method with a thickness of 0.1 to 1.0 mm, a silicon oxynitride film with fewer defects can be formed. This can be done.

[0170] In addition, the substrate placed in the evacuated processing chamber of the plasma CVD device is heated to 280°C or higher. The temperature is kept at 400°C or less, and the raw material gas is introduced into the processing chamber to reduce the pressure in the processing chamber to 20 Pa or less. The pressure in the processing chamber is set to 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. Depending on the conditions for supplying high frequency power to the electrodes, a dense oxide film is formed as the insulating film 115. A silicon film or a silicon oxynitride film can be formed.

[0171] The insulating film 115 may be formed by a plasma CVD method using microwaves. Yes, microwaves refer to the frequency range from 300MHz to 300GHz. The electron temperature is low and the electron energy is small. Also, the electron acceleration is The proportion of the ionized gas used for dissociation and ionization of a larger number of molecules is reduced. This allows for the excitation of high density plasma. To form an insulating film 115 with few defects by reducing plasma damage to the surface and deposits. can be done.

[0172] The insulating film 115 can be formed by a CVD method using an organic silane gas. The organic silane gas is ethyl silicate (TEOS: chemical formula Si(OC2H5)4), Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexa Methyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tri Silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) are used. By using the CVD method with organic silane gas, it is possible to obtain insulating films with high coating properties. A membrane 115 can be formed.

[0173] In addition, when a gallium oxide film is formed as the insulating film 115, it is formed by using the MOCVD method. It is possible.

[0174] The insulating film 115 is formed by oxidizing a thermal CVD method such as MOCVD or ALD. In the case of forming a hafnium film, a liquid containing a solvent and a hafnium precursor compound (hafnium alkoxide solution, typically tetrakisdimethylamidohafnium (TDMAH) Two types of gases are used: the raw material gas made by vaporizing and ozone (O3) as an oxidizing agent. The chemical formula for tetrakisdimethylamidohafnium is Hf[N(CH3)2]4. Also Other liquid materials include tetrakis(ethylmethylamido)hafnium.

[0175] The insulating film 115 is formed by oxidizing a thermal CVD method such as MOCVD or ALD. In the case of forming an aluminum film, a liquid containing a solvent and an aluminum precursor compound (e.g., The raw gas is made of vaporized methylaluminum (TMA) and 2H2O as an oxidizer. The chemical formula for trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutyl Aluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptane) By forming the film using the ALD method, the film has high coverage and a thin thickness. An insulating film 115 can be formed.

[0176] The insulating film 115 is formed by oxidizing a thermal CVD method such as MOCVD or ALD. When forming a silicon film, hexachlorodisilane is adsorbed onto the surface to be formed, and the adsorbed material It removes the chlorine contained in the water and supplies radicals of oxidizing gases (O2, nitrous oxide) to adsorb the substances. and react with.

[0177] Here, the insulating film 115 is a 100 nm thick oxynitride silicon film formed by plasma CVD. Form a recombinant membrane.

[0178] The conductive films 119 and 120 are formed by sputtering, vacuum deposition, pulsed laser deposition (PL D) method, thermal CVD method, or the like is used to form a conductive film, and a mask is formed on the conductive film by a lithography process. After the mask is formed, an etching process is performed to form the mask.

[0179] In addition, a tungsten film can be formed as a conductive film using a deposition system that uses ALD. In this case, the initial tungsten content can be increased by repeatedly introducing WF6 gas and B2H6 gas in sequence. A tungsten film is formed, and then WF6 gas and H2 gas are introduced simultaneously to form a tungsten film. It should be noted that SiH4 gas may be used in place of B2H6 gas.

[0180] In addition, here, masks 122 and 123 are formed on the conductive film by a lithography process. Thereafter, the conductive film is etched to form conductive films 119 and 120.

[0181] The conductive films 119 and 120 may be formed by electrolytic plating, printing, inkjet printing, or the like instead of the above-mentioned method. It may be formed by an ink jet method or the like.

[0182] Next, as shown in FIG. 5(A), the insulating film 115 is removed while leaving the masks 122 and 123. Etching is performed to form insulating films 116 and 117.

[0183] Next, as shown in FIG. 5(B), the multilayer film 107 and the The impurity element 125 is added to the multilayer film 107 and the oxide semiconductor film 108. The impurity element is introduced into the region of the compound semiconductor film 108 that is not covered by the masks 122 and 123. Note that the addition of the impurity element 125 can improve the thermal conductivity of the multilayer film 107 and the oxide semiconductor film 1 Oxygen vacancies are formed in 08.

[0184] After removing the masks 122 and 123, an impurity element 125 is added to the oxide semiconductor film. A film having a thickness capable of preventing impurities from being generated is formed, typically a nitride insulating film, an oxide insulating film, or the like. The element 125 may be added to the oxide semiconductor film. The thickness that can be added to the film is 0.1 nm to 50 nm, or 1 nm to 10 nm or less.

[0185] The impurity element 125 can be added by ion doping, ion implantation, plasma In the case of plasma treatment, the plasma is heated in a gas atmosphere containing the impurity element to be added. Impurity elements can be added by generating a plasma and performing a plasma treatment. The plasma generating device may be a dry etching device or a plasma CVD device. In addition, when performing plasma treatment, a high density plasma CVD apparatus, etc. can be used. In this case, the substrate is placed on the cathode side of the parallel plate electrodes, and a bias is applied to the substrate 101 side. The RF power may be supplied in such a manner that the power density is, for example, 0.1 W / cm 2 More than 2W / cm 2 As a result, the multilayer film 107 and the oxide semiconductor film It is possible to increase the amount of impurity elements added to the multilayer film 107 and the oxide semiconductor film 108. A large number of oxygen vacancies can be formed in the conductive film 108 .

[0186] The source gas for the impurity element 125 is B2H6, PH3, CH4, N2, NH3 , AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2 and one or more of the rare gases Alternatively, B2H6, PH3, N2, NH3, A diluted with rare gases can be used. One or more of lH3, AlCl3, F2, HF and H2 can be used. Dilution with rare gas The following compounds were added to the mixture: B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF and H2 The impurity element 125 is added to the multilayer film 107 and the oxide semiconductor film 108 by using one or more of the following: The rare gases, hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, and and chlorine can be added to the multilayer film 107 and the oxide semiconductor film 108 at the same time. do.

[0187] Alternatively, a rare gas is added to the multilayer film 107 and the oxide semiconductor film 108, and then B2H6, PH 3, CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF One or more of H2 and H3 may be added to the multilayer film 107 and the oxide semiconductor film 108.

[0188] Or B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4, One or more of Si2H6, F2, HF, and H2 is added to the multilayer film 107 and the oxide semiconductor film 108. After the addition, the rare gas may be added to the multilayer film 107 and the oxide semiconductor film 108.

[0189] The doping of the impurity element 125 is controlled by appropriately setting implantation conditions such as acceleration voltage and dose amount. For example, when argon is added by ion implantation, the acceleration voltage is 10 kV and the doping The amount of deviation is 1×10 13 ions / cm 2 More than 1×10 16 ions / cm 2 Let's say the following: For example, 1×10 14 ions / cm 2 In addition, phosphorus can be implanted by ion implantation. When doping with ions, the acceleration voltage is 30 kV and the dose is 1×10 13 ions / cm 2 Below top 5×10 16 ions / cm 2 For example, 1×10 15 ions / c m 2 This can be done as follows.

[0190] As a result, low resistance regions 107b and 107c can be formed in the multilayer film 107. In addition, low-resistance regions 108b and 108c can be formed in the oxide semiconductor film 108. After that, the masks 122 and 123 are removed.

[0191] Note that when the impurity element 125 is added in a state where the conductive films 119 and 120 are exposed, the conductive films Parts of 119 and 120 peel off and adhere to the side surfaces of the insulating films 116 and 117. As a result, the leakage current of the transistor increases. The multilayer film 107 and the oxide semiconductor film 108 are covered with the conductive films 119 and 120. By adding the element 125, a part of the conductive film 119, 120 is formed on the side surface of the insulating film 116, 117. It is possible to prevent adhesion to the

[0192] After that, a heat treatment is performed to further increase the conductivity of the region to which the impurity element 125 is added. The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, or 250° C. or higher and lower than 450°C, or higher and lower than 300°C and lower than 450°C.

[0193] Next, as shown in FIG. 5C, the insulating film 104, the multilayer film 107, and the oxide semiconductor film 10 8. An insulating film 126 is formed on the insulating films 116 and 117 and the conductive films 119 and 120.

[0194] The insulating film 126 can be formed by a sputtering method, a CVD method, a vacuum deposition method, a pulse deposition method, or the like. Laser deposition (PLD) and other methods are also available. Silane and ammonia, or silane and nitrogen A silicon nitride film containing hydrogen is formed by the plasma CVD method using the above as a raw material gas. In addition, by using the plasma CVD method, the multilayer film 107 and the oxide semiconductor film 1 The multilayer film 107 and the oxide semiconductor film 108 can be damaged by oxidation. A defect can be formed.

[0195] Since the insulating film 126 contains hydrogen, the multilayer film 107 and the oxide semiconductor film 108 In this case, the region to which the impurity element is added is in contact with the insulating film 126, so that the impurity element is included in the insulating film 126. The hydrogen contained in the multilayer film 107 and the oxide semiconductor film 108 is added to the impurity element. The region where the impurity element is added contains oxygen vacancies, so the multilayer A low-resistance region can be formed in the film 107 and the oxide semiconductor film 108.

[0196] Alternatively, an aluminum film or an aluminum oxide film is formed instead of the insulating film 126. Then, heat treatment is performed to remove oxygen from the multilayer film 107 and the oxide semiconductor film 108. The aluminum film or aluminum oxide film reacts with the aluminum oxide to form the insulating film 126. The multilayer film 107 and the low resistance region 10 of the oxide semiconductor film 108 are formed. Oxygen vacancies are formed in the regions 7b, 107c, 108b, and 108c. Therefore, it is possible to increase the conductivity of the low resistance regions 107b, 107c, 108b, and 108c. do.

[0197] Here, a silicon nitride film having a thickness of 100 nm is formed as the insulating film 126 by the plasma CVD method. It is formed using.

[0198] After that, a heat treatment is performed to form the low resistance regions 107b, 107c, 108b, and 108c. The temperature of the heat treatment is typically 150° C. or higher and below the substrate distortion point. or 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0199] Next, as shown in FIG. 6A, an insulating film 127 may be formed. By this, the conductive films 134, 135, 136, and 137 to be formed later and the conductive film 119 , 120 can be reduced.

[0200] Next, openings 128, 129, 130, and 131 are formed in the insulating films 126 and 127, and a low resistance After exposing a portion of the resistive region, conductive films 134, 135, 136, and 137 are formed. Preferably, a nitride insulating film 162 is formed (see FIG. 6(B)).

[0201] The conductive films 134, 135, 136, and 137 are formed in the same manner as the conductive films 119 and 120. The nitride insulating film 162 can be formed by a sputtering method, a CVD method, or the like. It can be formed using.

[0202] Through the above steps, transistors 100g and 100h can be manufactured.

[0203] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 100k and 100z shown in FIG. 8 will be described.

[0204] An insulating film 161 is formed on a substrate 101 of a driving circuit section, and a conductive film 102 is formed on the insulating film 161. The conductive film 102 can be formed by any of the methods for forming the conductive films 119 and 120. .

[0205] Next, the insulating film 104a and the insulating film 104b are laminated on the insulating film 161 and the conductive film 102. Then, the insulating film 104 is formed.

[0206] After that, the multilayer film 107 and the oxide semiconductor film are formed by the steps shown in FIG. 4(A) and FIG. 4(B). Form 108.

[0207] Next, as shown in FIG. 4(C), after forming the insulating film 115, a part of the insulating film 115 is etched. By etching, the opening 113 shown in FIG. 7(A) is formed.

[0208] Next, after forming the conductive films 119 and 120 shown in FIG. 4C, the same process as in FIG. The process allows the production of transistors 100k and 100z.

[0209] The transistor described in this embodiment has a function as a source electrode and a drain electrode. Since the conductive film that functions as a gate electrode does not overlap with the conductive film that functions as a gate electrode, the parasitic capacitance is reduced. In addition, the transistor described in this embodiment has a large on-state current. Since it is possible to stably form a low resistance region, the on-current is improved and the transistor is The variation in the electrical characteristics of the transistor is reduced.

[0210] The configurations and methods described in this embodiment may be the same as those described in other embodiments. can be used in appropriate combination.

[0211] (Embodiment 2) In this embodiment mode, one mode of a semiconductor device and a manufacturing method thereof will be described with reference to FIGS. 7 will be used to explain.

[0212] <Configuration 1 of Semiconductor Device> 11 to 13 show a top gate transistor as an example of a transistor included in a semiconductor device. Here, a display device will be used as an example of a semiconductor device. In addition, the structures of transistors provided in the driver circuit portion and pixel portion of the display device are explain.

[0213] FIG. 11 shows a transistor 100s provided in a driver circuit section and a transistor 100s provided in a pixel section. 12 and 13 show top views of the transistors 100s and 100u. 11A shows a cross-sectional view of the transistor 100 and the transistors 100t and 100u. 11(B) is a top view of a transistor 100t, and FIG. 11(C) is a top view of a transistor 100s. 12 is a top view of the transistor 100u. 11B, and the cross-sectional view taken along dashed line EF in FIG. 11C. FIG. 13 is a cross-sectional view taken along the dashed line GH in FIG. 11(A) and FIG. 11B) is a cross-sectional view between dashed lines IJ, and FIG. 11C is a cross-sectional view between dashed lines KL. .

[0214] The transistor 100s shown in FIGS. 12 and 13 includes an insulating film 104 on a substrate 101 and an insulating film 104 on a substrate 101. A multilayer film 107 on the insulating film 104, an insulating film 116 in contact with the multilayer film 107, and the insulating film 116 The transistor 100s has a conductive film 119 overlapping the multilayer film 107 through an intervening layer. Since the transistor has the same structure as the transistor 100g shown in the first embodiment, the detailed description thereof will be given in the same manner as in the first embodiment. The description of the transistor 100g described above can be used.

[0215] The transistor 100t is a transistor including an oxide semiconductor film on an insulating film 104 formed on a substrate 101. 108, an insulating film 117 in contact with the oxide semiconductor film 108, and an oxide semiconductor film The transistor 100t includes a conductive film 120 overlapping with the semiconductor film 108. Since the transistor 100h has the same structure as that of the transistor 100 shown in FIG. The explanation of Transistor 100h can be used.

[0216] The transistor 100u includes a multilayer film 147 on an insulating film 104 formed on a substrate 101. The insulating film 118 contacts the multilayer film 147, and the conductive film 118 overlaps the multilayer film 147 via the insulating film 118. The transistor 100u has the same structure as the transistor 100s. do.

[0217] The conductive film 121 functions as a gate electrode. The insulating film 118 functions as a gate insulator. It functions as a veneer.

[0218] The multilayer film 147 includes a channel region 147a overlapping the conductive film 121 and a channel region 147b. The channel region 147a has low resistance regions 147b and 147c sandwiching the insulating layer 147a. A channel region 145a in contact with the insulating film 104 and a channel region 145b in contact with the channel region 145a The low resistance region 147b is a low resistance region 145b that is in contact with the insulating film 104. The low resistance region 147c has a low resistance region 146b in contact with the low resistance region 145b. A low resistance region 145c in contact with the insulating film 104 and a low resistance region 1 Although not shown in FIG. 12, the channel region 145a and the low resistance region 146c are The oxide semiconductor film including the low-resistance region 45b and the low-resistance region 145c is referred to as an oxide semiconductor film 145. , an oxide having a channel region 146a, a low resistance region 146b, and a low resistance region 146c. The semiconductor film is referred to as an oxide semiconductor film 146. That is, the multilayer film 147 is an oxide semiconductor film 1 A semiconductor film 45 and an oxide semiconductor film 146 are stacked.

[0219] Note that in the top view, the oxide semiconductor film 146 is formed on the outer side of the edge of the oxide semiconductor film 145. That is, the oxide semiconductor film 146 is located on the upper surface of the oxide semiconductor film 145 and the Cover the sides.

[0220] In addition, in the transistor 100u, the insulating film in contact with the low resistance regions 147b and 147c An insulating film 126 may be provided over the insulating film 126. In the openings 132 and 133 of the film 126 and the insulating film 127, the low resistance region of the multilayer film 147 Conductive films 138 and 139 are provided in contact with 147b and 147c.

[0221] In the multilayer film 147, in the region not overlapping with the conductive film 121, an element that forms an oxygen vacancy is As the element that forms oxygen vacancies, the impurity element shown in Embodiment 1 is used. This can be done.

[0222] The insulating film 126 is a film containing hydrogen, and is typically a nitride insulating film. Examples of the insulating film include a silicon nitride film and an aluminum nitride film. When the insulating film 126 comes into contact with the multilayer film 147, hydrogen contained in the insulating film 126 diffuses into the multilayer film 147. As a result, the multilayer film 147 contains a large amount of hydrogen in the region in contact with the insulating film 126. do.

[0223] When an impurity element is added to an oxide semiconductor, the metal element and oxygen in the oxide semiconductor bond The oxygen vacancies are formed by the addition of impurity elements. When hydrogen is added to a semiconductor, hydrogen enters the oxygen vacancy site, and a donor level appears near the conduction band. As a result, an oxide conductor is formed. Therefore, the oxide conductor has light-transmitting properties.

[0224] An oxide conductor is a degenerate semiconductor in which the conduction band edge and the Fermi level coincide or nearly coincide. Therefore, it is presumed that the oxide conductor film and the source and drain electrodes The contact with the conductive film having the function is an ohmic contact, and the oxide conductive film and the source electrode and The contact resistance with the conductive film functioning as the drain electrode can be reduced.

[0225] That is, the low resistance regions 147b and 147c function as a source region and a drain region. Yes.

[0226] The conductive films 138 and 139 are made of tungsten, titanium, aluminum, copper, or molybdenum. It is formed using a conductive material that easily bonds with oxygen, such as chromium, or tantalum alone or an alloy. In this case, oxygen contained in the oxide semiconductor film and the conductive material contained in the conductive films 138 and 139 are The multilayer film 147 is bonded to the oxygen vacancies. In some cases, some of the constituent elements of the conductive material forming the films 138 and 139 may be mixed in. As a result, the low resistance regions 147b and 147c in contact with the conductive films 138 and 139 have high conductivity. , and function as a source region and a drain region.

[0227] In the case where the impurity element is a rare gas element and the multilayer film 147 is formed by a sputtering method, The low resistance regions 147b and 147c each contain a rare gas element, and the channel region 147 Compared to a, the low resistance regions 147b and 147c have a higher concentration of rare gas elements. This is because When the multilayer film 147 is formed by a sputtering method, a rare gas is used as a sputtering gas. In order to use the multilayer film 147, a rare gas is contained, and the low resistance regions 147b and 147 In c, rare gases are intentionally added to form oxygen vacancies. In the low resistance regions 147b and 147c, a rare gas source different from that in the channel region 147a is used. A base may be added.

[0228] In addition, since the low resistance regions 147b and 147c are in contact with the insulating film 126, the channel region 14 Compared to 7a, the hydrogen concentration is higher.

[0229] In the low resistance regions 147b and 147c, hydrogen is obtained by secondary ion mass spectrometry. The concentration is 8 x 10 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 Below Top, or 5×10 20 atoms / cm 3 The channel region The hydrogen concentration obtained by secondary ion mass spectrometry of 147a is 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 or less, or 5 x 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5 x 10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 It can be as follows:

[0230] Compared to the channel region 147a, the low resistance regions 147b and 147c have a high hydrogen concentration. The amount of oxygen deficiency caused by the addition of rare gas elements is large. Typically, the low resistance regions 147b and 147c function as a source region and a drain region. The resistivity of 7c is 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 It can be less than Ωcm.

[0231] In the low resistance regions 147b and 147c, the amount of hydrogen is equal to or less than the amount of oxygen vacancies. If there is no oxygen vacancy, hydrogen is easily captured by oxygen vacancies and is difficult to diffuse into the channel region 147a. As a result, a transistor having normally-off characteristics can be manufactured.

[0232] In addition, in the low resistance regions 147b and 147c, the amount of oxygen vacancies is greater than the amount of hydrogen. In this case, the amount of hydrogen is controlled to control the carrier density in the low resistance regions 147b and 147c. Alternatively, the amount of oxygen vacancies in the low resistance regions 147b and 147c can be controlled. When the amount of hydrogen is large, the amount of oxygen vacancies is controlled to form low resistance regions 147b and 14 The carrier density of the low resistance regions 147b and 147c can be controlled. Carrier density 5×10 18 pieces / cm 3 or more, or 1×10 19 pieces / cm 3 or more, or 1x 10 20 pieces / cm 3 By the above, the channel region, the source electrode, and the drain electrode are The resistance between the conductive films 138 and 139 having both functions is small, and the transistor has a large on-current. It is possible to create a gistor.

[0233] The transistors 100s, 100t, and 100u shown in this embodiment each include a channel region and Conductive films 134, 135, 136, and 137 functioning as source and drain electrodes 7, 138, and 139, low resistance regions 107b, 107c, 108b, 108c, and The parasitic resistance is small due to the inclusion of 47b and 147c.

[0234] In the transistor 100s, the conductive film 119 and the conductive films 134 and 135 overlap each other. Therefore, in order to reduce the parasitic capacitance between the conductive film 119 and the conductive films 134 and 135, In the transistor 100t, the conductive film 120 and the conductive film 1 Therefore, the conductive film 120 and the conductive films 136 and 137 do not overlap each other. In addition, in the transistor 100u, the parasitic capacitance of the conductive film Therefore, the conductive film 121 does not overlap with the conductive films 138 and 139. As a result, the parasitic capacitance between the substrate 101 and the semiconductor device 102 can be reduced. When a large-area substrate is used, the conductive films 119, 120, 121, 134, 135, 136, It is possible to reduce the signal delays at 137, 138, and 139.

[0235] For this reason, the transistors 100s, 100t, and 100u have a large on-state current and a low field effect. The fruit mobility is high.

[0236] In addition, in the transistor 100s, a conductive film 119 is used as a mask to The conductive film 120 of the transistor 100t is masked. As a result, an impurity element is added to the oxide semiconductor film 108. Then, the conductive film 121 is used as a mask to add an impurity element to the multilayer film 147. A low resistance region can be formed by self-alignment.

[0237] The transistor 100s included in the driver circuit has a large on-state current and high field-effect mobility. Therefore, a display device in which the area occupied by the driver circuit portion is small can be manufactured.

[0238] In addition, by using a transistor with high field effect mobility, It is possible to form a demultiplexer circuit in the signal line driver circuit. A circuit distributes one input signal to one of multiple outputs, so It is possible to reduce the number of input terminals. For example, if one pixel has a red sub-pixel and a green sub-pixel, The pixel has a blue pixel and a blue sub-pixel, and each pixel is provided with a demultiplexer circuit. Since the input signal input to each sub-pixel can be distributed by a demultiplexer circuit, This makes it possible to reduce the number of input terminals to one-third.

[0239] In addition, by providing transistors 100t and 100u with large on-current in the pixel portion, Even if the number of wirings increases in large-size and high-resolution displays, the signal delay in each wiring is minimal. It is possible to reduce the light emitting device and suppress uneven display. The brightness of the EL element is proportional to the current flowing through the transistor that controls the operation of the EL element. For this reason, a transistor such as transistor 100u is used as a transistor for driving an EL element. By using a transistor with a large on-state current and high field-effect mobility, the luminance of the EL element can be improved. In addition, since the transistor 100u has a large on-state current, it is possible to increase the average Since it is possible to reduce the area occupied by the transistor on the surface, This increases the freedom of transistor placement, making it possible to manufacture high-resolution display devices. It is possible.

[0240] For these reasons, the driver circuit section is fabricated using transistors capable of high-speed operation. In addition, by using transistors with low parasitic capacitance and parasitic resistance in the pixel area, high precision can be achieved. It is possible to manufacture a display device that is thin and capable of double-speed driving.

[0241] The details of the configuration shown in FIG. 12 will be described below. Note that the main focus here is on the transistors. The configuration of the data recorder 100s will now be described in detail.

[0242] In the transistor 100s, the oxide semiconductor film 105 and the oxide The compound semiconductor film 106 has a different composition. The oxide semiconductor film 145 and the oxide semiconductor film 146 included in the embodiment 7 have different compositions. The oxide semiconductor film 105 included in the multilayer film 107 and the oxide semiconductor film 1 included in the multilayer film 147 The oxide semiconductor film 106 included in the multilayer film 107 and the oxide semiconductor film 45 have the same composition. The oxide semiconductor film 108 and the oxide semiconductor film 146 included in the multilayer film 147 have the same composition. That is, the oxide semiconductor film 105, the oxide semiconductor film 145, and the oxide semiconductor film The oxide semiconductor film 106, the oxide semiconductor film 108, and the oxide semiconductor film 146 are formed at the same time. .

[0243] In the transistor 100u, a channel is formed in the oxide semiconductor film 145. The oxide semiconductor film 145 is thicker than the oxide semiconductor film 146 .

[0244] The thickness of the oxide semiconductor film 145 is within the range of the thickness of the oxide semiconductor film 105. It can be made thick.

[0245] The oxide semiconductor films 145 and 146 are made of the same material as the oxide semiconductor films 105, 106, and 108. The indium-based oxide semiconductor film 145 can be appropriately used as the oxide semiconductor film 146. Due to the high um content, the transistor 100u forms a buried channel. This makes it possible to reduce the variation in the threshold voltage of the transistor 100u. It is possible to reduce the channel resistance.

[0246] Specifically, the oxide semiconductor film 145 is formed using any of the materials for the oxide semiconductor film 105 as appropriate. It is possible.

[0247] Specifically, the oxide semiconductor film 146 is made of the same material as the oxide semiconductor films 106 and 108. Fees can be used as appropriate.

[0248] The transistor 100u is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, A channel is formed in the oxide semiconductor film 145 having a large atomic ratio of In to Nd (Nd, Nd, or Hf). The field effect mobility is high because of the formation of the electrons. Typically, the field effect mobility is 10 cm 2 / V Larger than s, 60cm 2 / Vs, preferably less than 15cm 2 / Vs or more 50cm 2 / Vs However, when light is irradiated, the current in the off state increases. Therefore, by providing a light-shielding film so as to overlap the transistor 100u, This results in a transistor with high field effect mobility and low current in the off state. Therefore, a transistor capable of high-speed operation can be manufactured.

[0249] In addition, in the multilayer film 147, silicon, carbon, and alkali metals, which are group 14 elements, are It is preferable to reduce the concentrations of metal or alkaline earth metals, nitrogen, impurity elements, etc. The multilayer film 107 includes silicon, which is one of the group 14 elements, carbon, and alkali metals. Or by making the concentration the same as that of alkaline earth metals, nitrogen, impurity elements, etc., The transistor 100u has electrical characteristics in which the threshold voltage is positive (also called normally-off characteristics). ).

[0250] The multilayer film 147 has a channel region 147a, in particular, a channel region 107a and Similarly, by reducing the impurity elements, the carrier density of the oxide semiconductor film can be reduced. can.

[0251] The multilayer film 147 is formed of an oxide semiconductor film having a low impurity concentration and a low density of defect states. By using the above method, a transistor having even better electrical characteristics can be manufactured. The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or real A highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor is called a highly pure intrinsic oxide semiconductor. Since there are fewer carrier generation sources, it may be possible to lower the carrier density. The transistor in which the channel region is formed in the oxide semiconductor film has a threshold voltage of + In addition, the electrical characteristics tend to be such that Since the oxide semiconductor film, which is substantially intrinsic and highly pure, has a low density of defect states, the density of trap states is low. In addition, the degree of oxidation may be reduced. The film has a remarkably small off-state current and a voltage between the source and drain electrodes (drain voltage) In the range of 1V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. Bottom, i.e. 1×10 -13 Therefore, the oxide Transistors in which the channel region is formed in a semiconductor film have small fluctuations in electrical characteristics and are highly reliable. In some cases, the transistor may have a high resistance.

[0252] The oxide semiconductor films 145 and 146 are the same as those shown in the oxide semiconductor films 105, 106, and 108. The crystal structure may be appropriately used.

[0253] In the multilayer film 147, a channel region 147a and low resistance regions 147b and 147 This is because the low-resistance regions 147b and 147c may have different crystallinity from the low-resistance regions 147a and 147b. When the low-resistance regions 147b and 147c are doped, damage occurs, and the crystallinity is reduced. This is because it decreases.

[0254] <Configuration 2 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS. 14 and 15. , a transistor 100v formed in the driver circuit section, a transistor 10 formed in the pixel section, In each of 0w and 100x, a conductive film 119 and a conductive film 100x function as a gate electrode. 20 and 121 are characterized by having a laminated structure. FIG. 15 shows cross-sectional views of transistors 100V, 100W, and 100X in the channel width direction. Cross-sectional views of transistors 100v, 100w, and 100x are shown. Transistor 100v is Since the transistor has the same structure as the transistor 100i described in Embodiment 1, detailed description thereof will not be given. The description of the transistor 100i in the first embodiment can be used. Since the transistor 100j has the same structure as that of the transistor 100j described in the first embodiment, detailed description thereof will not be given. The description of the transistor 100j in the first embodiment can be used. has the same structure as the transistor 100v described in this embodiment.

[0255] The conductive film 121 included in the transistor 100x is a conductive film 121a in contact with the insulating film 118. and a conductive film 121b in contact with the conductive film 121a. , is located outside the end of the conductive film 121b. It has a shape that protrudes from the

[0256] In addition, the end of the insulating film 118 is located outside the end of the conductive film 121a. The insulating film 118 has a shape protruding from the conductive film 121a. The sides may be curved.

[0257] The conductive film 121a can be formed using the same materials as the conductive films 119a and 120a as appropriate. The conductive film 121b can be formed using the same materials as the conductive films 119b and 120b as appropriate.

[0258] The copper concentration in the channel region of the multilayer film 147 is set to the range shown in the multilayer film 107. By adjusting the thickness, it is possible to fabricate transistors with excellent subthreshold swing values ​​(S values). It is possible.

[0259] In addition, the transistor 100x, like the transistors 100v and 100w, is 15, the conductive film 121 and the insulating film 118 are formed in the shape shown in FIG. This allows the electric field in the drain region to be relaxed. This makes it possible to reduce degradation such as fluctuations in the threshold voltage of the transistor.

[0260] <Configuration 3 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS. The transistors 111a and 111d formed in the driver circuit portion and the transistors 111a and 111b formed in the pixel portion are The transistors 111b, 111c, 111e, and 111f are characterized by having a multilayer film. FIG. 16 is a cross-sectional view of the transistors 111a, 111b, and 111c in the channel length direction. FIG. 17 shows cross-sections of transistors 111d, 111e, and 111f in the channel length direction. The surface view is shown.

[0261] The transistor 111a has the same structure as the transistor 111w shown in the first embodiment. Therefore, the detailed description of the transistor 111w in the first embodiment can be used. The transistor 111b has the same structure as the transistor 100h described in Embodiment 1. Therefore, the detailed description of the transistor 100h in the first embodiment can be used. The transistor 111c has the same structure as the transistor 111a in this embodiment. Therefore, the detailed description of the transistor 111w in Embodiment 1 will be referred to. The transistor 111d has the same structure as the transistor 111x described in the first embodiment. Since the structure is the same as that of the transistor 111x in the first embodiment, the detailed description thereof will be referred to. The transistor 111e can be the same as the transistor 111y described in the first embodiment. Since the transistor 111y has the same structure as the transistor 111y of the first embodiment, the detailed description thereof will be referred to. The transistor 111f can be the same as the transistor 111d in this embodiment. Since the transistors have the same structure, the detailed description will be given based on the description of the transistor 111x in Embodiment 1. It can be cited.

[0262] The multilayer film 147 included in the transistor 111c shown in FIG. , and low resistance regions 147b and 147c. The channel region 147a is made of an insulating film. A channel region 148a in contact with the first semiconductor substrate 104 and a channel region 1 in contact with the first semiconductor substrate 104 are shown in FIG. The low resistance region includes a channel region 145a and a channel region 146a in contact with the channel region 145a. 147b is a low resistance region 148b in contact with the insulating film 104 and a low resistance region 148b in contact with the insulating film 104. The low resistance region 145b and the low resistance region 146b are in contact with the low resistance region 145b. The resistance region 147c is made up of a low resistance region 148c in contact with the insulating film 104 and a low resistance region 148c and a low resistance region 146c in contact with the low resistance region 145c. Although not shown in FIG. 16, the channel region 148a, the low resistance region 148b, and The oxide semiconductor film having the low-resistance region 148c is referred to as an oxide semiconductor film 148. The multilayer film 147 includes an oxide semiconductor film 148, an oxide semiconductor film 145, and an oxide semiconductor film 146. are layered in order.

[0263] The multilayer film 147 included in the transistor 111f shown in FIG. , and low resistance regions 147b and 147c. The channel region 147a is made of an insulating film. A channel region 148a in contact with the first semiconductor substrate 104 and a channel region 1 in contact with the first semiconductor substrate 104 are shown in FIG. 45a, a channel region 146a in contact with the channel region 145a, and a channel region 146 The low resistance region 147b is in contact with the insulating film 104. a low resistance region 148b adjacent to the low resistance region 148b; a low resistance region 145b adjacent to the low resistance region 148b; A low resistance region 146b in contact with the region 145b and a low resistance region 146b in contact with the low resistance region 1 The low resistance region 147c has a low resistance region 148c in contact with the insulating film 104. , a low resistance region 145c in contact with the low resistance region 148c, and a low resistance region The low-resistance region 149c is in contact with the low-resistance region 146c. Although not shown in FIG. 17, the channel region 149a, the low resistance region 149b, and the low resistance region 1 The oxide semiconductor film having the multilayer film 147 is referred to as the oxide semiconductor film 149. The oxide semiconductor film 148, the oxide semiconductor film 145, the oxide semiconductor film 146, and the oxide Semiconductor films 149 are laminated in order.

[0264] The oxide semiconductor films 148 and 149 have a lower energy density than the oxide semiconductor films 145 and 146. It is preferable that the material has a large gap, a small electron affinity, and a high insulating property. The oxide semiconductor films 148 and 149 have a higher indium content than the oxide semiconductor films 145 and 146. The oxide semiconductor films 148 and 149 are preferably resistant to external impurities. It is preferable that the oxide semiconductor film has a function of shielding impurities. M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) The oxide semiconductor films 148 and 149 are In-M-Zn oxides (M is M g, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), oxide semiconductor In the target used to form the films 148 and 149, the atomic ratio of metal elements is I Let n:M:Zn=x3:y3:z3. 、 x3 / y3 must be greater than or equal to 1 / 6 and less than 1 In addition, z3 / y3 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z3 / y3 is set to 1 or more and 6 or less, the oxide semiconductor film 148 The CAAC-OS film is easily formed as a result of the atomic ratio of the target metal elements. Representative examples are In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M :Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1:4:4, In :M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, In:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Zn=1:5: 6, In:M:Zn=1:5:7, In:M:Zn=1:5:8, In:M:Zn=1: Examples include 6:8.

[0265] In the transistor 111a illustrated in FIG. 16, the oxide semiconductor film 142 is Compared to 05, the energy gap is larger and the electron affinity is smaller, so the channel is acidic. In other words, a buried channel structure is formed in the oxide semiconductor film 105. The oxide semiconductor film 106 containing one or more metal elements constituting the conductor film 105 and the oxide Since the semiconductor film 142 is provided, the boundary between the oxide semiconductor film 105 and the oxide semiconductor film 106 and an interface between the oxide semiconductor film 105 and the oxide semiconductor film 142. Therefore, by providing the oxide semiconductor film 106 and the oxide semiconductor film 142, It is possible to reduce variation and fluctuation in electrical characteristics such as the threshold voltage of a transistor. The transistor 111c also has the same effect.

[0266] Similarly, in the transistor 111d illustrated in FIG. , the energy gap is larger and the electron affinity is lower than that of the oxide semiconductor films 105 and 106. Since the distance between the oxide semiconductor film 105 and the oxide semiconductor layer 106 is small, a channel is formed in the oxide semiconductor film 105. That is, a buried channel In addition, the multilayer film 107 having the oxide semiconductor films 142 and 143 is formed. The interface between the oxide semiconductor film 142 and the oxide semiconductor film 105, the interface between the oxide semiconductor film 105 and the oxide semiconductor film 105, The interface between the oxide semiconductor film 106 and the oxide semiconductor film 143 As a result, electrical properties such as the threshold voltage of a transistor are reduced. It is possible to reduce the variation and fluctuation of the characteristics. It has a similar effect.

[0267] Similarly, a transistor 111e illustrated in FIG. 17 includes a multi-layer transistor having an oxide semiconductor film 144. By forming the layer film 110, the oxide semiconductor film 144 is formed at the interface between the oxide semiconductor film 108 and the oxide semiconductor film 144. As a result, the electrical characteristics of the transistor, such as the threshold voltage, are deteriorated. This can reduce variation and fluctuation.

[0268] <Configuration 4 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS. , a transistor 111g formed in a driver circuit portion, and a transistor The transistor 111i is characterized by having a dual gate structure. FIG. 18(A) shows FIG. 18(B) is a top view of a transistor 111g, and FIG. 18(B) is a top view of a transistor 111h. FIG. 18C is a top view of the transistor 111i. 18(C) is a cross-sectional view of the dashed line AB in FIG. 18(B), a cross-sectional view of the dashed line CD in FIG. 18(C) FIG. 20 is a cross-sectional view taken along dashed line GH in FIG. 18(A). 18(B) and 18(C) FIG.

[0269] A transistor 111g shown in FIG. 19 and FIG. 20 includes a conductive film 102 on a substrate 101 and a An insulating film 104 on the plate 101 and the conductive film 102, a multilayer film 107 on the insulating film 104, and a multilayer An insulating film 116 contacting the multilayer film 107 and a conductive film 1 overlapping the multilayer film 107 via the insulating film 116. The multilayer film 107 has the same structure as the multilayer film 107 shown in <Structure 1 of the semiconductor device>. Since they are similar, detailed explanations will be omitted.

[0270] The conductive film 102 and the conductive film 119 function as gate electrodes. The transistor 111g is a transistor having a dual gate structure. The insulating film 116 functions as a gate insulating film.

[0271] The transistor 111h is the same as the transistor 100t shown in <Configuration 1 of the semiconductor device>. Therefore, detailed description will be omitted.

[0272] The transistor 111i shown in FIG. 19 and FIG. 20 includes a conductive film 103 over a substrate 101 and a An insulating film 104 on the plate 101 and the conductive film 103, a multilayer film 147 on the insulating film 104, and a multilayer An insulating film 118 contacting the multilayer film 147 and a conductive film 1 overlapping the multilayer film 147 via the insulating film 118. The multilayer film 147 has the same structure as the multilayer film 147 shown in <Structure 1 of the semiconductor device>. Since they are similar, detailed explanations will be omitted.

[0273] It is preferable to provide a nitride insulating film 161 on the substrate 101. The nitride insulating film 161 and the insulating film 162 are silicon nitride films, aluminum nitride films, etc. By covering the conductive films 102 and 103 with the insulating film 104a, the gold contained in the conductive films 102 and 103 is This is preferable because it is possible to prevent diffusion of metal elements.

[0274] The conductive film 103 and the conductive film 121 function as gate electrodes. The transistor 111i is a transistor having a dual gate structure. The insulating film 118 functions as a gate insulating film.

[0275] 19 and 20, the conductive films 102 and 103 are formed on the entire surfaces of the multilayer films 107 and 147. The conductive films 102 and 103 overlap with parts of the multilayer films 107 and 147, respectively. It may be so arranged.

[0276] In the transistor 111g, the conductive film 102 and the conductive film 119 are not connected. By applying different potentials, the threshold voltage of the transistor 111g can be controlled. Alternatively, as shown in FIG. 20, the conductive film 102 and the conductive film 119 are connected to each other and have the same potential. By applying -GBT(-Gate Bias-Temperature Suppression of degradation during stress testing and on-current at different drain voltages In addition, in the multilayer film 107, as shown in FIG. By connecting the conductive film 102 and the conductive film 119 in this manner, the electric field Since the upper and side surfaces of the multilayer film 107 are affected, carriers flow throughout the multilayer film 107. That is, the area through which the carriers flow becomes larger in the film thickness direction, and the carrier As a result, the on-current of the transistor 111g increases and the current The field effect mobility is high. The channel length of the transistor is less than 2.5 μm or 1.45 μm. By setting the thickness to 2.2 μm or more, the on-current is further increased and the field effect mobility In addition, since the transistor 111g has a large on-current, As a result, the area occupied by the driver circuit section is small. Therefore, it is possible to manufacture a display device with a narrow frame.

[0277] Note that in the transistor 111i, the conductive film 103 and the conductive film 121 are connected to each other. Therefore, the same effect as that of the transistor 111g can be obtained. Since the area occupied by the transistors can be reduced, the layout of the transistors in the pixel can be simplified. This increases the degree of freedom, making it possible to manufacture a display device with high resolution.

[0278] In the display device described in this embodiment, a transistor included in a driver circuit portion is a dual-type transistor. In other words, compared to the pixel section, the pixel section drives transistors with a higher field effect mobility. As a result, a driver circuit section capable of high speed operation can be manufactured. In addition, the driver circuit is made using transistors capable of high-speed operation, and parasitic capacitance and By using transistors with low parasitic resistance in the pixel area, high definition and double speed driving are possible. It is possible to manufacture a display device capable of carrying out the above-mentioned operations.

[0279] <Configuration 5 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS. The transistor 111m formed in the pixel portion is a transistor having a dual gate structure. FIG. 21A is a top view of the transistor 111j, and FIG. FIG. 21(C) is a top view of the transistor 111k, and FIG. 21(D) is a top view of the transistor 111m. FIG. 22 is a cross-sectional view taken along the dashed line AB in FIG. 21(A), and a cross-sectional view taken along the dashed line AB in FIG. 21(B). FIG. 23 is a cross-sectional view taken along a line C-D and a cross-sectional view taken along a line E-F in FIG. 21(C). 21(A) is a cross-sectional view between dashed lines GH, FIG. 21(B) is a cross-sectional view between dashed lines IJ, and 21(B) and FIG. 21(C) are cross-sectional views taken along dashed lines KL and KL in FIG.

[0280] The transistor 111j shown in FIG. 22 and FIG. 23 is a transistor shown in <Configuration 1 of the semiconductor device>. Since it has the same single-gate structure as the transistor 100s, a detailed description thereof will be omitted.

[0281] The transistor 111k shown in FIG. 22 and FIG. 23 is a transistor shown in <Configuration 1 of the semiconductor device>. Since it has the same structure as Transistor 100t, detailed explanation will be omitted.

[0282] The transistor 111m shown in FIG. 22 and FIG. 23 is a transistor shown in <Configuration 4 of the semiconductor device>. Since it has the same dual gate structure as the transistor 111i, a detailed description thereof will be omitted.

[0283] In the display device described in this embodiment, transistors 111i and 111b are provided in a pixel portion. 11m has conductive films 103 and 121 that shield the multilayer film 147 from light. The transistors 111i and 111m have high field effect mobility and low current in the off state. Since the area occupied by the transistor in a plane can be reduced, This allows for greater freedom in transistor placement and reduces image degradation. It is possible to manufacture a display device with high image quality and high resolution. By using fewer transistors in the pixel area, a high-resolution display that can be driven at double the speed is possible. A device can be fabricated.

[0284] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 100s, 100t, and 100u shown in FIGS. This will be described with reference to FIGS. 24 to 27.

[0285] Films constituting the transistors 100s, 100t, and 100u (insulating film, oxide semiconductor film, The conductive film and the like can be formed by the method for forming the transistor shown in Embodiment 1 as appropriate. This can be done.

[0286] As shown in FIG. 24(A), an insulating film 104 is formed on a substrate 101 in the same manner as in the first embodiment. Next, an oxide semiconductor film 105 is formed over the insulating film 104 in the driver circuit portion, The oxide semiconductor film 145 is formed over the insulating film 104.

[0287] Here, a silicon oxynitride film having a thickness of 300 nm is formed as the insulating film 104 by plasma CVD. It is formed using the method.

[0288] The oxide semiconductor films 105, 106, 108, 145, and 146 are the same as those of the oxide semiconductor film described in Embodiment 1. The semiconductor films 105, 106, and 108 can be formed in the same manner.

[0289] In addition, as in Embodiment 1, after an oxide semiconductor film is formed, heat treatment is performed. The semiconductor film may be dehydrogenated or dehydrated.

[0290] Here, an oxide semiconductor film having a thickness of 35 nm is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this manner, the oxide semiconductor films 105 and 145 are formed. An In-Ga-Zn oxide film with an In:Ga:Zn ratio of 3:1:2 is formed.

[0291] Next, as shown in FIG. 24B, in the driver circuit portion, an oxide semiconductor film 105 is In the pixel portion, an oxide semiconductor film 108 is formed. The oxide semiconductor film 146 is formed over the semiconductor film 145. The oxide semiconductor film 106 is laminated in order to form a multilayer film 107. A multilayer film 147 is formed by stacking the oxide semiconductor film 45 and the oxide semiconductor film 146 in this order.

[0292] In this step, the oxide semiconductor film 105 is formed by depositing an oxide semiconductor The conductive film 106 is formed to function as a source electrode and a drain electrode later. In the step of forming the conductive film, the oxide semiconductor film 105 is not etched. The oxide semiconductor film 146 is formed so as to cover the upper surface and the side surface of the conductive film 145. In the process of forming a conductive film having a function as a source electrode and a drain electrode, The conductive film 145 is not etched. As a result, the channel width of the transistor is This is preferable because it can reduce variation in length of the oxide semiconductor films 105 and 145 .

[0293] Here, an oxide semiconductor film having a thickness of 20 nm is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this manner, the oxide semiconductor films 106, 108, and 146 are formed. 106, 108, and 146 are In-Ga-Zn with In:Ga:Zn=1:1:1.2 An oxide film is formed.

[0294] Next, heat treatment is performed so that oxygen contained in the insulating film 104 is transferred to the oxide semiconductor film. Note that the heat treatment is performed on the oxide semiconductor films to be the oxide semiconductor films 106, 108, and 146. After the formation of the oxide semiconductor films, the oxide semiconductor films 106 and 108 are etched. , 146 may be formed.

[0295] The heat treatment should be performed at a temperature between 350℃ and 650℃, or between 450℃ and 600℃. By doing so, the CAAC conversion rate described below will be 60% or more but less than 100%, or 80% or more but less than 100%. %, or 90% or more and less than 100%, or 95% or more and 98% or less. In addition, it is possible to obtain an oxide semiconductor film in which the content of hydrogen, water, and the like is reduced. That is, it is possible to form an oxide semiconductor film having a low impurity concentration and a low density of defect states. It is possible.

[0296] Next, as shown in FIG. 25(A), the insulating film 104, the multilayer films 107 and 147, and the oxide semiconductor An insulating film 115 is formed on the conductive film 108 in the same manner as in the first embodiment. Conductive films 119 , 120 , and 121 are formed on an insulating film 115 in the same manner as in Example 1.

[0297] Here, the insulating film 115 is a 100 nm thick oxynitride silicon film formed by plasma CVD. Form a recombinant membrane.

[0298] In addition, masks 122, 123, and 124 are formed on the conductive film by a lithography process. After the formation, the conductive film is etched to form conductive films 119, 120, and 121.

[0299] Next, as shown in FIG. 25(B), masks 122, 123, and 1 The insulating film 115 is etched while leaving the insulating film 24, to form insulating films 116, 117, and 118. Complete.

[0300] Next, as shown in FIG. 26(A), masks 122, 123, and 1 The impurity element 125 is added to the multilayer films 107 and 147 and the oxide semiconductor film 108 while leaving the impurity element 24. As a result, the mask is added to the multilayer films 107 and 147 and the oxide semiconductor film 108. An impurity element is added to the area not covered by 122, 123, and 124. By adding the element 125, oxygen vacancies are formed in the multilayer films 107 and 147 and the oxide semiconductor film 108. is formed.

[0301] As a result, low resistance regions 107b and 107c can be formed in the multilayer film 107. In addition, the low resistance regions 108b and 108c can be formed in the nitride semiconductor film 108. The low resistance regions 147b and 147c can be formed in the layer film 147. After this, the mask Remove 122, 123, and 124.

[0302] When the impurity element 125 is added in a state where the conductive films 119, 120, and 121 are exposed, , a part of the conductive films 119, 120, and 121 is peeled off, and the side surfaces of the insulating films 116, 117, and 118 are peeled off. As a result, the leakage current of the transistor increases. With the conductive films 119, 120, and 121 covered with masks 122, 123, and 124, a multilayer film The impurity element 125 is added to the oxide semiconductor film 107, the oxide semiconductor film 147, and the oxide semiconductor film 108. Part of 119, 120, and 121 adheres to the side surfaces of insulating films 116, 117, and 118. After removing the masks 122, 123, and 124, the multilayer film 107, The impurity element 125 may be added to the oxide semiconductor film 147 and the oxide semiconductor film 108 .

[0303] Thereafter, in the same manner as in the first embodiment, a heat treatment is performed to remove the impurity element 125 from the region. The electrical conductivity of the region may be further increased.

[0304] Next, as shown in FIG. 27(A), similarly to the first embodiment, the insulating film 104 and the multilayer film 10 7 and 147, the oxide semiconductor film 108, the insulating films 116, 117, and 118, the conductive film 119, An insulating film 126 is formed on the layers 120 and 121 .

[0305] Here, a silicon nitride film having a thickness of 100 nm is formed as the insulating film 126 by the plasma CVD method. It is formed using.

[0306] Thereafter, similarly to the first embodiment, a heat treatment is performed to form low resistance regions 107b, 107c, The electrical conductivity of 108b, 108c, 147b, and 147c may be further increased. The temperature is typically from 150° C. to the substrate strain point, or from 250° C. to 450° C., or The temperature must be between 300℃ and 450℃.

[0307] Next, as shown in FIG. 27(A), an insulating film 127 is formed in the same manner as in the first embodiment. By forming the insulating film 127, the conductive films 134, 135, and 136 to be formed later can be formed. , 137, 138, 139 and the conductive films 119, 120, 121. can be reduced.

[0308] Next, similarly to the first embodiment, openings 128, 129, and 130 are formed in the insulating films 126 and 127. , 131, 132, and 133 (see FIG. 21) are formed, and a part of the low resistance region is exposed. , conductive films 134, 135, 136, 137, 138, and 139 are formed. It is preferable to form an insulating film 162 (see FIG. 27(B)).

[0309] The conductive films 134, 135, 136, 137, 138, and 139 are connected to the conductive films 119 and 120. The nitride insulating film 162 can be formed by a sputtering method or a similar method. The film can be formed by appropriately using a CVD method or the like.

[0310] Through the above steps, transistors 100s, 100t, and 100u can be manufactured. do.

[0311] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 111g, 111h, and 111i shown in FIGS. We will explain about the following.

[0312] An insulating film 161 is formed on a substrate 101, and conductive films 102 and 103 are formed on the insulating film 161. The conductive films 102 and 103 can be formed by appropriately using the same method as that for forming the conductive films 119 and 120. Cut.

[0313] Next, the insulating film 104 is formed over the insulating film 161 and the conductive films 102 and 103 .

[0314] After that, the multilayer films 107 and 147 and the oxide semiconductor film 108 are formed by the process shown in FIG. Form.

[0315] Next, as shown in FIG. 25(A), after forming the insulating film 115, a part of the insulating film 115 is By etching, an opening 113 shown in FIG. 18(A) and an opening 114 shown in FIG. 18(C) are formed. Form.

[0316] Next, after forming the conductive films 119, 120, and 121 shown in FIG. 25(A), 26 and 27, transistors 111g, 111h, and 111i are formed. can be produced.

[0317] The transistor described in this embodiment has a function as a source electrode and a drain electrode. Since the conductive film that functions as a gate electrode does not overlap with the conductive film that functions as a gate electrode, the parasitic capacitance is reduced. In addition, the transistor described in this embodiment has a large on-state current. Since it is possible to stably form a low resistance region, the on-current is improved and the transistor is The variation in the electrical characteristics of the transistor is reduced.

[0318] The configurations and methods described in this embodiment may be the same as those described in other embodiments. can be used in appropriate combination.

[0319] (Embodiment 3) Here, modifications of the transistor described in the above embodiment will be described with reference to FIGS. Here, a transistor formed in a pixel portion will be used as the transistor. The following table will be used as an example. The transistor shown in FIG. 29 has an insulating film 104 on a substrate 101. an oxide semiconductor film 108 formed thereon and an insulating film 117 in contact with the oxide semiconductor film 108; and a conductive film 120 which is in contact with the insulating film 117 and overlaps with the oxide semiconductor film 108.

[0320] In addition, the insulating film 126 in contact with the oxide semiconductor film 108 and the insulating film The transistor is provided with an insulating film 126 and an insulating film 127. In the portion, the conductive films 136 and 137 in contact with the oxide semiconductor film 108 are provided in the transistor. It is being done.

[0321] In the transistor illustrated in FIG. 29A, the oxide semiconductor film 108 is A channel region 108a formed in the overlapping region and a non-transparent region The conductive film 13 has regions containing pure elements, i.e., low resistance regions 108b and 108c. 6, 137 contact the low resistance regions 108b, 108c.

[0322] Alternatively, in the transistor illustrated in FIG. 29B, in the oxide semiconductor film 108, The regions 108d and 108e in contact with the conductive films 136 and 137 are not doped with impurity elements. In this case, the regions 108d and 108e in contact with the conductive films 136 and 137 and the channel Between the insulating region 108a and the insulating layer 108b, there are regions having impurity elements, i.e., low resistance regions 108b and 108c. In addition, the regions 108d and 108e are formed by applying a voltage to the conductive films 136 and 137. Since the SiO 2 layer has electrical conductivity, it functions as a source region and a drain region.

[0323] Note that, in the transistor shown in FIG. 29B, after the conductive films 136 and 137 are formed, The film 120 and the conductive films 136 and 137 are used as masks to add an impurity element to the oxide semiconductor film. By doing so, it can be formed.

[0324] The conductive film 120 may have a tapered end. The angle θ1 between the surface where the film 117 and the conductive film 120 are in contact and the side surface of the conductive film 120 is 90°. or 10° to 85° or 15° to 85° or 30° to 8 It may be 5° or less, or between 45° and 85°, or between 60° and 85°. The angle θ1 is set to less than 90°, or to 10° or more and 85° or less, or to 15° or more and 85° or less, Or 30° to 85°, or 45° to 85°, or 60° to 85° By setting the insulating film 126 at the lower side, the insulating film 117 and the conductive film 120 can be covered with the insulating film 126. It is possible to increase it.

[0325] Next, a modified example of the low resistance regions 108b and 108c will be described. 29A to 29F are enlarged views of the oxide semiconductor film 108 and its vicinity shown in FIG. 29A. Here, the channel length L is the distance between a pair of low resistance regions.

[0326] As shown in FIG. 29C, in the cross section in the channel length direction, the channel region 108 a and the boundaries between the low resistance regions 108b and 108c are formed by the insulating film 117 and the conductive film 120. That is, in the top view, the channel region 108a and the The boundaries of the low resistance regions 108b and 108c coincide or approximately coincide with the ends of the conductive film 120. is doing.

[0327] Alternatively, as shown in FIG. 29(D), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the end of the conductive film 120. This region is called an offset region. The length of the offset region in the channel length direction is L off It is shown as follows. If there are multiple offset regions, the length of each offset region is L off That is said. off is included in the channel length L. Also, L off is less than 20% of the channel length L, or less than 10%, or less than 5%, or less than 2%.

[0328] Alternatively, as shown in FIG. 29(E), in the cross section in the channel length direction, The insulating film 117 is disposed between the conductive film 120 and the insulating film 117. The overlap region in the channel length direction functions as an overlap region. The length of L ov L ovis less than 20% of the channel length L, or less than 10%, or is less than 5%, or less than 2%.

[0329] Alternatively, as shown in FIG. 29(F), in the cross section in the channel length direction, A low resistance region 108f is provided between the low resistance region 108a and the low resistance region 108b. The low resistance region 108g is between the low resistance region 108a and the low resistance region 108c. The low-resistance regions 108g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 108b and 108c. Here, the low resistance regions 108f and 108g overlap the insulating film 117. It may overlap the conductive film 120 .

[0330] 29C to 29F, the transistor shown in FIG. As described above, the transistor shown in FIG. 29(B) can also be used in the same manner as in FIG. 29(C) to FIG. The structure of F) can be appropriately applied.

[0331] In the transistor shown in FIG. 30A, an end portion of the insulating film 117 is closer to an end portion of the conductive film 120 than an end portion of the insulating film 117. That is, the insulating film 117 protrudes from the conductive film 120. Since the insulating film 126 can be located away from the channel region 108a, This can prevent the contained nitrogen, hydrogen, etc. from entering the channel region 108a.

[0332] In the transistor shown in FIG. 30B, the insulating film 117 and the conductive film 120 have a tapered shape. In other words, the insulating film 117 and the conductive film 120 are in contact with each other. The angle θ1 between the surface of the oxide semiconductor film 108 and the side surface of the conductive film 120 and the insulating film 11 The angle θ2 between the surface of the insulating film 117 and the side of the insulating film 117 is different from the angle θ2 between the surface of the insulating film 117 and the side of the insulating film 117. It may be less than 0°, or between 30° and 85°, or between 45° and 70°. For example, when the angle θ2 is smaller than the angle θ1, the coverage of the insulating film 126 is improved. If θ2 is greater than the angle θ1, the transistor can be miniaturized.

[0333] Next, modified examples of the low resistance regions 108b and 108c are shown in FIG. 30(C) to FIG. 30(C) to 30(F) are the same as those in FIG. 30(A). 1 is an enlarged view of the vicinity of the semiconductor film 108.

[0334] As shown in FIG. 30C, in the cross section in the channel length direction, the channel region 108 a and the boundaries between the low resistance regions 108b and 108c are formed at the ends of the conductive film 120 and the insulating film 117. That is, in the top view, the channel region 108a The boundaries of the low resistance regions 108b and 108c are aligned or substantially aligned with the ends of the conductive film 120. It is being done.

[0335] Alternatively, as shown in FIG. 30(D), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the conductive film 120. The region is called an offset region. That is, in the top view, the ends of the low resistance regions 108b and 108c are in contact with the insulating film 1. 17 and does not overlap with the end of the conductive film 120.

[0336] Alternatively, as shown in FIG. 30(E), in the cross section in the channel length direction, The insulating film 117 is disposed between the conductive film 120 and the insulating film 117. The regions are called overlap regions. The end of 8c overlaps with the conductive film 120.

[0337] Alternatively, as shown in FIG. 30(F), in the cross section in the channel length direction, A low resistance region 108f is provided between the low resistance region 108a and the low resistance region 108b. The low resistance region 108g is between the low resistance region 108a and the low resistance region 108c. The low-resistance regions 108g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 108b and 108c. Here, the low resistance regions 108f and 108g overlap the insulating film 117. It may overlap the conductive film 120 .

[0338] 30C to 30F, the transistor shown in FIG. As described above, the transistor shown in FIG. 30B can also be used in the same manner as in FIG. The structure of F) can be appropriately applied.

[0339] In the transistor shown in FIG. 31A, the conductive film 120 has a stacked structure. The conductive film 120a is in contact with the conductive film 120b, and the conductive film 120b is in contact with the conductive film 120a. The end of the conductive film 120a is located outside the end of the conductive film 120b. 0a has a shape protruding from the conductive film 120b.

[0340] Next, a modified example of the low resistance regions 108b and 108c will be described. 31(E), 32(A), and 32(B) show the oxide semiconductor shown in FIG. 1 is an enlarged view of the vicinity of the body membrane 108.

[0341] As shown in FIG. 31B, in the cross section in the channel length direction, the channel region 108 a and the boundary between the low resistance regions 108b and 108c are the conductive film 120a included in the conductive film 120. The end of the insulating film 117 is aligned or approximately aligned with the end of the insulating film 117. The boundary between the channel region 108a and the low resistance regions 108b and 108c is the edge of the conductive film 120. It matches or nearly matches the part.

[0342] Alternatively, as shown in FIG. 31(C), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the conductive film 120. The region is called an offset region. That is, in the top view, the ends of the low resistance regions 108b and 108c are in contact with the conductive film 1. It does not overlap with the end of 20.

[0343] Alternatively, as shown in FIG. 31(D), in the cross section in the channel length direction, The regions 108b and 108c overlap with the conductive film 120, here the conductive film 120a. This region is called an overlap region. An end of 08c overlaps with the conductive film 120a.

[0344] Alternatively, as shown in FIG. 31(E), in the cross section in the channel length direction, A low resistance region 108f is provided between the low resistance region 108a and the low resistance region 108b. The low resistance region 108g is between the low resistance region 108a and the low resistance region 108c. Since the electrons pass through 0a and are added to the low resistance regions 108f and 108g, The region 108g has a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 108b and 108c. In this case, the low resistance regions 108f and 108g overlap the conductive film 120a, but It may overlap the film 120a and the conductive film 120b.

[0345] Alternatively, as shown in FIG. 32A, in the cross section in the channel length direction, the conductive film 12 The end of the conductive film 120a is located outside the end of the conductive film 120b, and the conductive film 120a has a tapered shape. That is, the surface where the insulating film 117 and the conductive film 120a are in contact with each other and the conductive film 120 may have a shape similar to that of the insulating film 117. The angle between the sides of a is less than 90°, or 5° to 45°, or 5° to 30° It may be below.

[0346] Furthermore, the end of the insulating film 117 may be located outside the end of the conductive film 120a.

[0347] Furthermore, the side surface of the insulating film 117 may be curved.

[0348] Furthermore, the insulating film 117 may have a tapered shape. The angle between the surface of the insulating film 117 and the side of the insulating film 117 is less than 90°, preferably It may be greater than or equal to 30° and less than 90°.

[0349] The oxide semiconductor film 108 illustrated in FIG. 32A includes a channel region 108a and a 108a is sandwiched between low resistance regions 108f and 108g, and 108a is sandwiched between low resistance regions 108f and 108g. The low resistance regions 108h and 108i and the low resistance regions 10 The impurity element passes through the insulating film 117 and the conductive film 120a. Since the low resistance regions 108f, 108g, 108h, and 108i are doped, the low resistance regions 10 8f, 108g, 108h, and 108i are regions where impurity elements are removed from the low resistance regions 108b and 108c. The concentration of is low and the resistivity is high.

[0350] The oxide semiconductor film 108 illustrated in FIG. 32B includes a channel region 108a and a channel region Low resistance regions 108h and 108i sandwiching 108a, and low resistance regions 108h and 108i sandwiching The impurity elements pass through the insulating film 117 to form the low resistance regions 108b and 108c. Since the low resistance regions 108h and 108i are doped with The region 108 has a lower concentration of impurity elements and a higher resistivity than the regions 108b and 108c.

[0351] In addition, in the channel length direction, the channel region 108a overlaps with the conductive film 120b, and The resistance regions 108f and 108g are connected to the conductive film 120a protruding outside the conductive film 120b. The overlapping low resistance regions 108h and 108i are insulating films protruding outside the conductive film 120a. The low resistance regions 108b and 108c overlap the insulating film 117, and are provided outside the insulating film 117.

[0352] As shown in FIG. 31E and FIG. 32, the oxide semiconductor film 108 has a low-resistance region 108b, Low-resistance regions 108f and 108g have a lower concentration of impurity elements and a higher resistivity than 108c. By providing 108h and 108i, the electric field in the drain region can be relaxed. Reduces degradation such as the shift in threshold voltage of transistors caused by the electric field in the drain region It is possible.

[0353] The transistor shown in FIG. 33A includes a channel region 108a, a low-resistance region 108b, The oxide semiconductor film 108 includes the low-resistance regions 108b and 108c. The low resistance regions 108b and 108c are typically regions having a thickness smaller than that of the low resistance region 108a. 8c has a region whose thickness is 0.1 nm or more and 5 nm or less smaller than that of the channel region 108a. .

[0354] The transistor shown in FIG. 33B includes the insulating film 104 and the oxide semiconductor film 108. At least one of the insulating film 104 and the insulating film 104b has a multi-layer structure. The insulating film 104b is in contact with the insulating film 104a and the oxide semiconductor film 108. The insulating film 117 includes an insulating film 117a in contact with the oxide semiconductor film 108 and an insulating film 117b in contact with the insulating film 117a. The insulating film 117b is formed on the insulating film 117b.

[0355] The insulating films 104b and 117a are oxide insulating films having a low nitrogen oxide content and a low density of defect levels. The oxide insulating film has a low nitrogen oxide content and a low density of defect levels. Specifically, the density of the defect level located between 4.6 eV and 8 eV from the vacuum level is In other words, the density of defect states caused by nitrogen oxides is low. As an oxide insulating film with low nitrogen oxide content and low density of defect states, , a silicon oxynitride film that releases a small amount of nitrogen oxide, or An aluminum oxynitride film or the like can be used. The average film thickness is 0.1 nm or more and 50 nm or less, or 0.5 nm or more and 10 nm or less.

[0356] In addition, the silicon oxynitride film, which emits a small amount of nitrogen oxide, was analyzed by thermal desorption spectrometry (TD In Thermal Desorption Spectroscopy (S), This is a membrane that releases more ammonia than nitrogen oxides, and is typically Output is 1×10 18 pieces / cm 3 5×10 or more 19 pieces / cm 3 The following is the case. The amount of a released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. The amount released due to the following heat treatment is considered.

[0357] The insulating films 104a and 117b are formed using an oxide insulating film which releases oxygen when heated. The insulating films 104a and 117b have an average thickness of 5 nm or more and 1000 nm or less. m or less, or between 10 nm and 500 nm.

[0358] Typical examples of oxide insulating films that release oxygen when heated include silicon oxynitride films and oxide Examples include an aluminum nitride film.

[0359] Nitrogen oxides (NO x , x is 0 or more and 2 or less, preferably 1 or more and 2 or less), typically NO 2 or NO forms a level in the insulating film 104 and the insulating film 117. The level is The nitrogen oxide is formed in the energy gap of the oxide semiconductor film 108. When the insulating film 104 and the oxide semiconductor film 108 are diffused to the interface between the insulating film 104 and the oxide semiconductor film 117, the level Electrons may be trapped on the side of 104 and 117. Since the molecules remain in the vicinity of the interfaces between the insulating films 104 and 117 and the oxide semiconductor film 108, the transistor This causes the threshold voltage of the transistor to shift in the positive direction.

[0360] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating films 104b and 117a are converted into The nitrogen oxides contained in the insulating films 104a and 117b react with the ammonia contained therein. As a result, at the interfaces between the insulating films 104 and 117 and the oxide semiconductor film 108, , electrons are less likely to be trapped.

[0361] The insulating films 104b and 117a are made of oxides having a low content of nitrogen oxides and a low density of defect levels. By using an insulating film, it is possible to reduce the shift in the threshold voltage of a transistor. This makes it possible to reduce fluctuations in the electrical characteristics of the transistor.

[0362] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher but below the substrate distortion point. By the heat treatment, the insulating films 104b and 117a were obtained by measuring the ESR at 100K or less. The first signal in the spectrum has a g value between 2.037 and 2.039, and the second signal has a g value between 2.037 and 2.039. A second signal between .001 and 2.003 and a g value between 1.964 and 1.966 The third signal is observed. Note that the split of the first and second signals The split width of the second and third signals is set to the X-band ESR measurement. The g value is about 5 mT. a second signal with a g value between 2.001 and 2.003, and a g value of 1.964 or greater The sum of the spin densities of the third signals that are less than 1.966 is 1×10 18 spins / cm 3 is less than 1×10 17 spins / cm 3 More than 1×10 18 spi ns / cm 3 is less than.

[0363] In addition, the g value in the ESR spectrum below 100K is 2.037 to 2.039. The first signal has a g value of 2.001 to 2.003, and the second signal has a g value of 1 The third signal, between .964 and 1.966, corresponds to the signal due to nitrogen dioxide. That is, the first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 or more. A second signal with a g value of 2.003 or less and a third signal with a g value of 1.964 to 1.966 or less. The smaller the total spin density of the signal, the more the content of nitroxide in the oxide insulating film. It can be said that the amount is small.

[0364] In addition, the heat treatment in the manufacturing process of the transistor is typically performed at temperatures of 300°C or higher but below the substrate distortion point. After heat treatment, the oxide insulating film with less nitrogen oxide and lower density of defect levels is SI Measured by MS (Secondary Ion Mass Spectrometry) The nitrogen concentration is 6×10 20 atoms / cm 3 The following is the result.

[0365] The substrate temperature is 220°C or higher, 280°C or higher, or 350°C or higher, and silane and By using a plasma CVD method using nitrous oxide and dinitrogen monoxide, the density of defect levels is reduced and the amount of nitrogen oxide is reduced. By forming an oxide insulating film with a low hardness, a dense film with high hardness can be formed. can be done.

[0366] The transistor in FIG. 33C includes the oxide semiconductor film 108, the insulating film 117, and a conductive An insulating film 141 is provided between the film 120 and the insulating film 126. The insulating film 141 is shown in FIG. B) The insulating films 104b and 117a have a small amount of nitrogen oxide and a low density of defect levels. The insulating film can be formed using a nitride insulating film.

[0367] In addition, in the cross-sectional shape in the channel length direction, the channel region 108a and the low resistance region 10 8b, and the channel region 108a and the low resistance region 108c are disposed between the low resistance region 108f and the low resistance region 108c. The low resistance regions 108f and 108g are the low resistance region 108 The concentration of impurity elements is lower than that of 108c and 108b, and the resistivity is higher. The insulating film 117 and the insulating film 141 contacting the side surfaces of the conductive film 120 are overlapped with the insulating film 117 and the conductive film 120. The low resistance regions 108f and 108g are formed by insulating film 126 and insulating film 14. May overlap with 1.

[0368] In the transistor shown in FIG. 33D, the insulating film 117 is formed in the channel of the oxide semiconductor film 108. The insulating layer 108a is in contact with the low resistance regions 108b and 108c. The film 117 has low resistance regions 108b and 108c compared to the region in contact with the channel region 108a. The film thickness in the region in contact with 8c is thin, typically with an average film thickness of 0.1 nm to 50 nm. As a result, the oxide Impurity elements can be added to the semiconductor film 108, and the insulating film 126 can also include The hydrogen can be transferred to the oxide semiconductor film 108 through the insulating film 117. As a result, low resistance regions 108b and 108c can be formed.

[0369] Furthermore, the insulating film 104 has a multi-layer structure of insulating films 104a and 104b, and is heated to remove oxygen. The insulating film 104a is formed using the oxide insulating film that emits nitrogen oxide. The insulating film 104b is formed using an oxide insulating film with a low nitrogen oxide density. The insulating film 117 is formed using an oxide insulating film having a low density of defect states. The oxide semiconductor film 108 is covered with an oxide insulating film having a small amount of oxide and a low density of defect states. As a result, oxygen contained in the insulating film 104a is converted into the oxide semiconductor The oxygen vacancies in the channel region 108a of the oxide semiconductor film 108 are transferred to the film 108. While reducing the capacitance at the interface between the insulating films 104b and 117 and the oxide semiconductor film 108, This reduces the rear traps. As a result, the threshold voltage of the transistor is It is possible to reduce the shift and the variation in the electrical characteristics of the transistor. Cut.

[0370] (Embodiment 4) Here, a film for suppressing oxygen desorption is formed on the insulating film, and then oxygen is introduced into the insulating film through the film. The method of adding the element will be described with reference to FIGS. 34(A) and 34(B).

[0371] As shown in FIG. 34(A), an insulating film 104 is formed on a substrate 101 .

[0372] Next, a film 145d for suppressing oxygen desorption is formed on the insulating film 104. Oxygen 146d is added to the insulating film 104 via the film 5d.

[0373] The film 145d for suppressing oxygen desorption may be made of aluminum, chromium, tantalum, titanium, A metal element selected from molybdenum, nickel, iron, cobalt, and tungsten, or the above-mentioned gold Alloys containing the above metallic elements, alloys combining the above metallic elements, alloys containing the above metallic elements a metal nitride having the above-mentioned metal element; a metal oxide having the above-mentioned metal element; The insulating film is formed using a conductive material such as nitride oxide.

[0374] The thickness of the film 145d for suppressing oxygen desorption is 1 nm or more and 20 nm or less, or 2 nm or more. It can be made 10 nm or less.

[0375] As a method for adding oxygen 146d to the insulating film 104 through the film 145d, ion doping is used. The methods include the ion implantation method, the plasma treatment method, etc. By exposing the film 145d to the plasma generated under the condition where the oxygen concentration is increased, the amount of oxygen added to the insulating film 104 is increased. This is preferable because it is possible to increase the capacity of the plasma processing apparatus. There is an ashing device.

[0376] By providing a film 145d on the insulating film 104 and adding oxygen, the film 145d becomes the insulating film 10 The insulating film 104 functions as a protective film that suppresses oxygen from being released from the insulating film 104. More oxygen can be added.

[0377] In addition, when oxygen is introduced in plasma processing, the oxygen is excited by microwaves to produce high-density oxygen. By generating oxygen plasma, the amount of oxygen introduced into the insulating film 104 can be increased. .

[0378] After that, the film 145d is removed, so that the film 145d is left on the substrate 101 as shown in FIG. The insulating film 104 to which oxygen is added can be formed.

[0379] (Embodiment 5) In this embodiment, the V O Explaining H .

[0380] <(1). V O Ease of formation and stability of H> When the oxide semiconductor film (hereinafter referred to as IGZO) is a perfect crystal, H is dominant at room temperature. During heat treatment at 450°C, H diffuses primarily along the ab plane. In this study, oxygen vacancies in IGZO are O If there is In this case, H is oxygen deficiency V O We performed calculations to see whether it is easy to enter the oxygen vacancy V O The state where there is H in V O It is written as H.

[0381] For the calculation, the InGaZnO4 crystal model shown in Figure 35 was used. Here, V O H in H V O The activation barrier (E a ) to NEB (Nud The calculation conditions are shown in Table 1.

[0382] [Table 1]

[0383] In addition, in the InGaZnO4 crystal model, the difference in the number of metal elements to which oxygen is bonded Therefore, there are oxygen sites 1 to 4 as shown in FIG. V O The calculations were performed for oxygen site 1 and oxygen site 2, which are likely to form

[0384] First, oxygen deficiency V O As oxygen site 1, which is likely to form The calculations were performed for the oxygen sites bonded to the

[0385] The model of the initial state is shown in FIG. 36(A), and the model of the final state is shown in FIG. 36(B). In addition, the calculated activation barrier (E a ) is shown in Figure 37. Here, the initial state is oxygen vacancy V O There is an H inside (V O H) and the final state is is oxygen deficiency V O and the state where oxygen bound to one Ga atom and two Zn atoms is bound to H ( It is a structure having a HO.

[0386] As a result of the calculation, oxygen deficiency V O It takes about 1.52 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V O It takes about 0.46 eV to enter Energy was needed.

[0387] Here, the calculated activation barrier (E a ) and equation 1 to calculate the reaction frequency (Γ) In addition, in the formula 1, k B is the Boltzmann constant and T is the absolute temperature.

[0388]

number

[0389] Frequency factor ν=10 13 [1 / sec] and the reaction frequency at 350°C was calculated. The frequency of H transfer from the model shown in Figure 36(A) to the model shown in Figure 36(B) is 5.5 2×10 0 [1 / sec]. Also, from the model shown in FIG. 36(B), The frequency of H transfer to the model shown in is 1.82×10 9 [1 / sec]. Therefore, H diffusing in IGZO is near the oxygen vacancy V. O There is V O It is easy to form H, Once V O H forms oxygen vacancy V O It is thought that it is difficult to release from

[0390] Next, oxygen deficiency V O The oxygen site 2, which is likely to form a bond with one Ga and two Zn, Calculations were performed for the combined oxygen sites.

[0391] The model of the initial state is shown in FIG. 38(A), and the model of the final state is shown in FIG. 38(B). In addition, the calculated activation barrier (E a ) is shown in Figure 39. Here, the initial state is oxygen vacancy V O There is an H inside (V O H) and the final state is is oxygen deficiency V O and the state where oxygen bound to one Ga atom and two Zn atoms is bound to H ( It is a structure having a HO.

[0392] As a result of the calculation, oxygen deficiency V O It takes about 1.75 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V O It takes about 0.35 eV to enter Energy was needed.

[0393] In addition, the calculated activation barrier (E a ) and the above formula 1, the reaction frequency (Γ) is Calculated.

[0394] Frequency factor ν=10 13 The reaction frequency at 350°C was calculated assuming a reaction rate of 1 / sec. The frequency of H transfer from the model shown in Figure 38(A) to the model shown in Figure 38(B) is 7.5 3×10 -2 [1 / sec]. Also, from the model shown in FIG. 38(B), The frequency of H transfer to the model shown in 10 [1 / sec]. Therefore, for now, V O H forms oxygen vacancy V O It is thought that H is unlikely to be released from

[0395] From the above, it can be seen that H in IGZO is easily diffused during annealing, and oxygen vacancies V O If there is is oxygen deficiency V O Enter V O It was found that it is likely to become H.

[0396] <(2). V O H transition level > Oxygen vacancy in IGZO V O If and H exists, then <(1). V O H formation From the calculation using the NEB method shown in the section on Difficulty and Stability, oxygen vacancies V O and H is V O H shape It is easy to achieve and V O H is considered stable. Therefore, V O H is a career tracker To investigate whether V O The transition levels of H were calculated.

[0397] The calculation was performed using an InGaZnO4 crystal model (112 atoms). V for oxygen site 1 and oxygen site 2 O The H model was created and the transition level was calculated. The calculation conditions are shown in Table 2.

[0398] [Table 2]

[0399] By adjusting the mixing ratio of the exchange terms to obtain a band gap close to the experimental value, The band gap of the new InGaZnO4 crystal model is 3.08 eV, which is lower than the experimental value of 3.1 The result was close to 5 eV.

[0400] The transition level (ε(q / q')) of the model with defect D is calculated by the following formula 2. In addition, ΔE(D q ) is the formation energy of defect D at charge q, calculated from Eq. It is served.

[0401]

number

[0402]

number

[0403] In Formula 2 and Formula 3, E tot (D q ) is the charge q of the model including the defect D. Total energy, E tot (bulk) is the total energy of a defect-free model (perfect crystal), Δn i is the increase or decrease in the number of atoms i related to the defect, μ i is the chemical potential of atom i, ε VBM Missing The energy of the top of the valence band in the defect-free model, ΔV q is related to the electrostatic potential Correction term, E F is the Fermi energy.

[0404] Calculated V O The transition levels of H are shown in Figure 40. The values ​​in Figure 40 indicate the depth from the bottom of the conduction band. From Figure 40, V for oxygen site 1 O The transition level of H is 0.0 below the conduction band edge. 5 eV, and V for oxygen site 2 O The transition level of H is 0.11e below the conduction band edge. V, so each V O H is thought to be involved in electron trapping. , V O It was revealed that H acts as a donor. O IGZO with H It was revealed that the material has electrical conductivity.

[0405] <Oxide conductive film> V O The temperature dependence of resistivity in an oxide conductor film having H was examined using FIG. He explains.

[0406] Here, a sample having an oxide conductor film was prepared. The oxide conductor film (OC_SiN x ) In the doping apparatus, argon is added to the oxide semiconductor film, and the silicon nitride film is The oxide conductive film (OC_Ar doped + SiN x ), or In the plasma processing apparatus, the oxide semiconductor film is exposed to argon plasma, and silicon nitride is The oxide conductive film formed by contacting with the film (OC_Ar plasma + SiN x )of The silicon nitride film contains hydrogen.

[0407] Oxide conductive film (OC_SiN x The method for preparing the sample containing the ZnO film is as follows. A silicon oxynitride film with a thickness of 400 nm was formed on the substrate by plasma CVD, and then oxygen was pumped. By exposing the silicon oxynitride film to plasma and adding oxygen ions to it, the film is heated to release oxygen. Next, a silicon oxynitride film that releases oxygen when heated was formed. A sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2 was placed on the silicon film. A 100 nm thick In-Ga-Zn oxide film was formed by the sputtering method used. After heat treatment in a nitrogen atmosphere at 450°C, it was annealed in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, a silicon nitride film with a thickness of 100 nm was formed by plasma CVD. Next, the substrate was heat-treated at 350° C. in a mixed gas atmosphere of nitrogen and oxygen.

[0408] Oxide conductor film (OC_Ar doped + SiN x The method for preparing the sample containing A 400 nm thick silicon oxynitride film is formed on a glass substrate by plasma CVD. After the formation of the silicon oxynitride film, it is exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film. A silicon oxynitride film that releases oxygen by heating was formed. On the silicon oxynitride film, a sputtering layer with an atomic ratio of In:Ga:Zn=1:1:1.2 was formed. A 100 nm thick In-Ga-Zn oxide was deposited by sputtering using a 100 nm thick target. After forming a nitride film, it was heat-treated in a nitrogen atmosphere at 450°C, and then heated in a mixture of nitrogen and oxygen at 450°C. The substrate was then heat-treated in a mixed gas atmosphere. Next, a doping device was used to dope the In-Ga-Zn oxide The film was irradiated with 5×10 ions at an acceleration voltage of 10 kV. 14 / cm 2 of argon was added. Next, oxygen vacancies were formed in the In-Ga-Zn oxide film by plasma CVD. A silicon nitride film of 00 nm was formed. Next, a nitrogen and oxygen mixed gas atmosphere at 350° C. was used. It was heat treated.

[0409] Oxide conductive film (OC_Ar plasma + SiN x The preparation method of the sample including A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by plasma CVD. After forming the silicon oxynitride film, it is exposed to oxygen plasma to produce a silicon oxynitride film that releases oxygen when heated. Next, a silicon oxynitride film with an atomic ratio of I was formed on the silicon oxynitride film, which releases oxygen when heated. Sputtering method using a sputtering target of n:Ga:Zn=1:1:1.2 A 100 nm thick In-Ga-Zn oxide film was formed by the above method, and then heated at 450°C in a nitrogen atmosphere. After the heat treatment, the plate was heated at 450°C in a mixed gas atmosphere of nitrogen and oxygen. In the Zuma processing device, argon plasma is generated and accelerated argon ions are ionized into In The oxygen vacancies were created by colliding the Zn-Ga oxide film with the Zn-Ga oxide film. A silicon nitride film with a thickness of 100 nm was formed by evaporating the nitrogen and oxygen mixture at 350° C. The heat treatment was carried out in a gas atmosphere.

[0410] Next, the resistivity of each sample was measured and the results are shown in Figure 48. The resistivity was measured using a four-terminal In FIG. 48, the horizontal axis indicates the measurement temperature, and the vertical axis indicates indicates resistivity. Also, the oxide conductor film (OC_SiN x ) are shown with square marks, Oxide conductor film (OC_Ar doped + SiN x The measurement results of oxide conductors are shown with circles. Electrical film (OC_Ar plasma+SiN x ) The measurement results are indicated by triangles.

[0411] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it is considered that the oxide conductor film has a higher resistivity than the oxide semiconductor film. It is clear that it is low.

[0412] As can be seen from FIG. 48, the oxide conductor film (OC_Ar doped + SiN x ) and acid Compound conductor film (OC_Ar plasma+SiN x ) contains oxygen vacancies and hydrogen The resistivity fluctuation is small. Typically, the resistivity fluctuation is small at temperatures between 80K and 290K. The resistivity variation is less than ±20% between 150K and 250K. The rate is less than ±10%. In other words, oxide conductors are degenerate semiconductors, and the conduction band edge and the ferroelectric It is estimated that the luminescence level of the oxide conductor film is equal to or approximately equal to the luminescence level of the oxide conductor film. By using it as the source and drain regions of a transistor, the oxide conductor film and the source The contact with the conductive film that functions as the electrode and drain electrode is an ohmic contact, and the oxide conductive The contact resistance between the conductive film and the conductive film functioning as the source electrode and the drain electrode can be reduced. In addition, since the resistivity of the oxide conductor has low temperature dependence, the oxide conductor film and the source electrode and drain electrode can be easily formed. The variation in contact resistance with the conductive film that functions as the drain electrode is small, resulting in highly reliable transistors. It is possible to create a star.

[0413] (Embodiment 6) In this embodiment, a structure of an oxide semiconductor film included in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail below.

[0414] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to two lines that are arranged at an angle between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0415] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0416] <Structure of oxide semiconductor> The structure of an oxide semiconductor will be described below.

[0417] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, and nc-O S(nanocrystalline oxide semiconductor), pseudo Amorphous-like Oxide Semiconductor (a-like OS) e Semiconductor, and amorphous oxide semiconductor.

[0418] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductor, and nc-OS.

[0419] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. In other words, it is a structure that has discrete order but does not have long-range order.

[0420] On the other hand, in the case of an essentially stable oxide semiconductor, In addition, it cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor, which is not amorphous (for example, has a periodic structure in a microscopic region), is transformed into a completely amorphous oxide. However, a-like OS is a semiconductor that can be used in a small area. Although it has a periodic structure, it has voids and is an unstable structure. In terms of physical properties, it can be said that the semiconductor is close to an amorphous oxide semiconductor.

[0421] <caac-os> First, let me explain about CAAC-OS.

[0422] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0423] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0424] The following describes the CAAC-OS observed by TEM. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0425] An enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 49(A) is shown in Figure 49(B). From Figure 49(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0426] As shown in FIG. 49(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the inclination is about 0.8 nm. The pellets can also be called nanocrystals (nc). AAC-OS, CANC(C-Axis Aligned nanocrystals) ) can also be referred to as an oxide semiconductor.

[0427] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 49(D)). Between the pellets observed in FIG. 49(C), The portion where the inclination occurs corresponds to the area 5161 shown in FIG.

[0428] FIG. 50(A) shows the C s-corrected high-resolution TEM images are shown. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 50(B), Fig. 50(C) and Fig. 50(D), respectively. As shown in Figure 50(D), Figure 50(B), Figure 50(C) and Figure 50(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0429] Next, C was analyzed by X-ray diffraction (XRD). We will explain AAC-OS. For example, CAAC-O with InGaZnO4 crystals When the out-of-plane structural analysis is performed on S, the result is as shown in Figure 51(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal has a c-axis orientation. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0430] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0431] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I It is attributed to the (110) plane of the crystal of nGaZnO4. In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears, as shown in FIG. On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 51(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0432] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm is incident is shown in FIG. 2(B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. In addition, the first ring in FIG. 52(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0433] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0434] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0435] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps and In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0436] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, the carrier density is set to 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0437] <nc-os> Next, we will explain nc-OS.

[0438] In the high-resolution TEM image, the nc-OS is divided into two regions: one where the crystals can be confirmed, and the other where the clear The crystalline parts in nc-OS are In most cases, the size is between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible in the pellets of CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0439] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, the nc-OS may be a pellet with a larger diameter than the pellet. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, the probe diameter is larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction was performed on nc-OS, high brightness regions were observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. There may be cases where this occurs.

[0440] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0441] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0442] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0443] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen, and areas where crystals can be seen. and areas where it is not possible to

[0444] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0445] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0446] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0447] The determination of which part is regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the crystals is 0.28 nm to 0.30 nm are considered to be crystal parts of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0448] Figure 53 shows an example of investigating the average size of the crystal parts (22 to 45 places) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 53, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Figure 53, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0449] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0450] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0451] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0452] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be used in any ratio. By combining single crystals of the desired composition, the density equivalent to that of a single crystal of the desired composition can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0453] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0454] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0455] (Embodiment 7) In this embodiment, a display device in which a semiconductor device according to one embodiment of the present invention can be used will be described. This will be explained with reference to FIG.

[0456] The display device shown in FIG. 41A has a region having pixels of a display element (hereinafter, referred to as a pixel portion 542). ) and a circuit section ( hereinafter referred to as a drive circuit section 544) and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 54 6) and a terminal portion 547. Note that the protection circuit 546 is not provided. This is also fine.

[0457] A part or the whole of the driver circuit portion 544 is formed on the same substrate as the pixel portion 542. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 542 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 544 is made of COG (Chip On Glass) or TAB (T This can be implemented using the ape Automated Bonding.

[0458] The pixel units 542 are arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). A circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 541) is provided. The path portion 544 is a circuit (hereinafter, a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 544a), to provide signals (data signals) for driving the display elements of the pixels. The pixel circuit 544 includes a driver circuit such as a circuit (hereinafter, a source driver 544b).

[0459] The gate driver 544a includes a shift register and the like. A signal for driving the shift register is input via the terminal portion 547, and a signal is output via the terminal portion 547. For example, a start pulse signal, a clock signal, etc. are input to the gate driver 544a. The gate driver 544a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 544a are provided, and the scanning lines GL_1 to Alternatively, the gate driver 544a may control the gates GL_X and GL_X separately. However, the gate driver 54 has a function of supplying 4a may also provide another signal.

[0460] The source driver 544b includes a shift register and the like. Through the terminal portion 547, a signal for driving the shift register as well as a source of a data signal are transmitted. The source driver 544b outputs a pixel circuit based on the image signal. The source driver 544b has a function of generating a data signal to be written to the pixel 541. A data signal is generated according to a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 544b has a function of controlling the output of a data signal. The signal lines DL_1 to DL_Y are connected to the same wiring. Alternatively, the source driver 544b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 544b may supply other signals. It is Noh.

[0461] The source driver 544b is configured using, for example, a plurality of analog switches. The source driver 544b sequentially turns on a plurality of analog switches, The image signal can be time-division-multiplexed and output as a data signal. Also, a shift register, etc. This may be used to configure the source driver 544b.

[0462] Each of the plurality of pixel circuits 541 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input through the line DL, and a data signal is provided through one of the signal lines DL. A data signal is input to each of the pixel circuits 541. 44a controls writing and holding of data of the data signal. For example, The pixel circuit 541 is connected to the gate driver 5 via a scanning line GL_m (m is a natural number equal to or smaller than X). A pulse signal is input from 44a, and a signal line DL_n (n is A data signal is input from the source driver 544b via a corresponding one of the inputs Y (a natural number equal to or less than Y).

[0463] The protection circuit 546 shown in FIG. 41. Alternatively, the protection circuit 546 is connected to the scanning line GL, which is the wiring between the source driver The protection circuit 544b is connected to a signal line DL, which is a wiring between the protection circuit 544b and the pixel circuit 541. The circuit 546 can be connected to a wiring between the gate driver 544a and a terminal unit 547. Alternatively, the protection circuit 546 may be a wiring between the source driver 544b and the terminal unit 547. The terminal unit 547 can be connected to the display device from an external circuit. This refers to the part provided with terminals for inputting control signals and image signals.

[0464] When a potential outside a certain range is applied to the wiring to which the protection circuit 546 is connected, the protection circuit This is a circuit that brings one wire into electrical continuity with another wire.

[0465] As shown in FIG. 41A, a pixel section 542 and a driving circuit section 544 are provided with a protection circuit 54. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrent caused by electrostatic discharge (ESD) and the like. However, the configuration of the protection circuit 546 is not limited to this. For example, A configuration in which a protection circuit 546 is connected, or a protection circuit 546 is connected to a source driver 544b Alternatively, a configuration in which a protection circuit 546 is connected to the terminal portion 547 may be used. It can also be written as:

[0466] In FIG. 41A, the gate driver 544a and the source driver 544b Therefore, although an example in which the driving circuit portion 544 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 544a is formed, and a source driver circuit is formed separately. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is It may also be configured to be equipped with

[0467] In addition, the pixel circuits 541 shown in FIG. 41(A) may have a configuration shown in FIG. It can be said that:

[0468] The pixel circuit 541 shown in FIG. 41B includes a liquid crystal element 570, a transistor 550, and a capacitor. and a capacitance element 560.

[0469] The transistor described in any of the above embodiments can be used as the transistor 550 as appropriate. can.

[0470] The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 541. The alignment state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 in each of the pixel circuits 541. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 541 in each row. A different potential may be applied to one of the electrodes.

[0471] In the pixel circuit 541 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the signal line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the scanning lines GL _m. The transistor 550 is electrically connected to the on-state or the off-state. This has the function of controlling the writing of data of the data signal.

[0472] One of a pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 541. The capacitor 560 functions as a storage capacitor for storing written data.

[0473] For example, in a display device having the pixel circuit 541 shown in FIG. The pixel circuits 541 in each row are sequentially selected by the gate driver 544a shown in FIG. 550 is turned on to write data of the data signal.

[0474] In the pixel circuit 541 in which data has been written, the transistor 550 is turned off. By repeating this process row by row, an image can be displayed.

[0475] In addition, the pixel circuits 541 shown in FIG. 41(A) may have a configuration shown in FIG. It can be said that:

[0476] In addition, the pixel circuit 541 shown in FIG. 41C includes transistors 552 and 554 and a capacitance element. Here, the light-emitting element 572 includes a transistor 552 and a light-emitting element 572. The transistors shown in the above embodiments are appropriately used for either or both of the transistors 554. It is possible.

[0477] A data signal is applied to one of the source and drain electrodes of the transistor 552. The gate voltage of the transistor 552 is electrically connected to the wiring (signal line DL_n). The electrodes are electrically connected to wiring (scanning lines GL_m) to which gate signals are applied.

[0478] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0479] The transistor 552 has electrical characteristics in which the threshold voltage is positive (normally off). It is preferable to use a transistor having a cutoff voltage It is preferable to use a transistor with a reduced current. 100h, 100j, 100z, 100n, 100y, or the transformer shown in embodiment 2 Use Zyster 100t, 100w, 111b, 111e, 111h, and 111k as appropriate. is preferred.

[0480] One of a pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0481] The capacitor 562 functions as a storage capacitor for storing written data.

[0482] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. In addition, the gate electrode of the transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0483] The transistor 554 is turned on or off to allow current to flow to the light emitting element 572. It has the function of controlling the current flowing through the

[0484] The transistor 554 functioning as a driving transistor is configured to generate a sufficient luminance for the light-emitting element 572. In order to obtain this, it is necessary to use transistors with high on-state current. In order to improve the driving frequency of the device and realize smoother video display, For this reason, the transistor 554 is The transistors 100u, 100x, 111c, 111f, and 111i shown in the second embodiment It is preferable to use 111m appropriately.

[0485] By reducing the channel length of a transistor, high field-effect mobility can be obtained, but In some cases, the threshold voltage of the transistor may shift in the negative direction. The channel length of the transistor 554 is set to 0.5 μm or more and 4.5 μm or less, and the transistor shown in the second embodiment is A pair of electrically connected gate electrodes is provided, such as transistors 111i and 111m. By doing so, the on-current and field effect mobility are improved while the threshold voltage is shifted in the negative direction. It is possible to suppress fluctuations in the

[0486] On the other hand, the transistor 552, which functions as a selection transistor, is Since the field effect mobility of the MOSFET is not as high as that of the MOSFET 554, the channel length of the MOSFET 554 is set to be the same as that of the MOSFET 554. By making the length larger than the threshold voltage of the transistor 554, the threshold voltage of the transistor 554 is shifted in the negative direction. This suppresses the shift, thereby achieving high-speed operation and low power consumption of the display device. This becomes possible.

[0487] For example, when the channel length of the transistor 554 is set to 0.5 μm or more and 4.5 μm or less, In this case, the channel length of the transistor 552 can be set to 6 μm. The channel length of transistor 552 is at least as long as the channel length of transistor 554. It is sufficient to set it appropriately depending on the characteristics required for the display device.

[0488] The cutoff current of the transistor 552 is For example, the channel length and channel The L / W ratio of the transistor 552 must be greater than that of the transistor 554. The cutoff current of transistor 552 is set to the cutoff current of transistor 554. The current can be made smaller than the value of the current of the transistor 554 and the transistor 552. If the channel widths are equal, the channel length of transistor 552 is set to be equal to the channel length of transistor 554. By making the length of the transistor 552 larger than the length of the transistor 552, the cutoff current of the transistor 552 can be reduced. This becomes possible.

[0489] The transistor 552 has a pair of gate electrodes that are electrically connected to each other. However, by using a single-gate structure for the transistor 552, This reduces the area required for connecting the transistor electrodes, thereby reducing the area of ​​the transistor. This makes it possible to reduce the size of the display device and suppress the decrease in the aperture ratio of the pixel. In the case of the gated transistor 552 which functions as the selection transistor of the pixel, Since the parasitic capacitance of the gate wiring becomes large, it is effective to use a single gate structure.

[0490] One of the anode and the cathode of the light-emitting element 572 is electrically connected to the potential supply line VL_b. The other one is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0491] The light-emitting element 572 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light-emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0492] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0493] In a display device having the pixel circuit 541 of FIG. 41C, for example, The pixel circuits 541 in each row are sequentially selected by the gate driver 544a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0494] In the pixel circuit 541 in which data has been written, the transistor 552 is turned off. Furthermore, the transistor 554 is in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted with a brightness that corresponds to the flow rate. By performing this process row by row, an image can be displayed.

[0495] In addition, the pixel circuits 541 shown in FIG. 41(A) may have a configuration shown in FIG. It can be said that:

[0496] The pixel circuit 541 shown in FIG. 41(D) is a selection transistor that controls writing of data signals. A transistor 552 functions as a transistor and a transistor 553 functions as a drive transistor. The semiconductor device includes a transistor 554, a transistor 556, a capacitor 562, and a light-emitting element 572. Here, the transistor 552 is the transistor 100t described in Embodiment 2. , 100w, 111b, 111e, 111h, and 111k can be applied as appropriate. The transistor 554 may be the transistors 100u, 100x, and 100f shown in Embodiment 2. 11c, 111f, 111i, and 111m can be applied as appropriate.

[0497] A data signal is applied to one of the source and drain electrodes of the transistor 552. The gate electrode of the transistor 552 is electrically connected to the wiring (signal line DL_n). is electrically connected to a wiring (scanning line GL_m) to which a gate signal is applied.

[0498] The transistor 552 is turned on or off to transmit the data of the data signal. That is, the transistor 552 serves as a selection transistor. It functions as a data recorder.

[0499] One of the source electrode and the drain electrode of the transistor 554 is connected to a wiring ( hereinafter referred to as potential supply line VL_a1), and the source of the transistor 554 The other of the electrode and the drain electrode is electrically connected to one electrode of the light emitting element 572. Furthermore, the gate electrode of the transistor 554 is connected to the source and drain electrodes of the transistor 552. The other electrode is electrically connected to one electrode of the capacitor 562 .

[0500] One of the source and drain electrodes of the transistor 556 is provided with a data reference potential. The other of the source electrode and the drain electrode of the transistor 556 is connected to a wiring ML. , which is electrically connected to one electrode of the light-emitting element 572 and the other electrode of the capacitor 562. Furthermore, the gate electrode of the transistor 556 is connected to the scanning line GL_m is electrically connected to

[0501] The transistor 556 has a function of adjusting a current flowing through the light-emitting element 572. For example, , the threshold voltage or field effect mobility of the transistor 554, or the transistor 5 When the transistor 554 deteriorates, one of the source and drain electrodes of the transistor 556 is connected. By monitoring the current flowing through the wiring ML, the current flowing through the light emitting element 572 is compensated for. The potential applied to the wiring ML can be, for example, The voltage may be equal to or less than a threshold voltage.

[0502] In this embodiment, the channel length of the transistor 556 is, for example, It is preferable that the channel length of the transistor 556 is larger than that of the transistor 54. Alternatively, the transistor may have a double-gate structure, or a dual-gate structure similar to the transistor 554. However, if the transistor 556 has a single gate structure, the first gate electrode and The area for connecting the second gate electrode can be eliminated, so the surface area of ​​the transistor can be reduced. This allows the aperture ratio of the pixel to be increased. ,preferable.

[0503] One of a pair of electrodes of the capacitor 562 is the source electrode and the drain electrode of the transistor 552. The other electrode and the gate electrode of the transistor 554 are electrically connected to a capacitor 562 The other of the pair of electrodes is the other of the source electrode and drain electrode of the transistor 554. The other of the source electrode and drain electrode of the transistor 556 and one electrode of the light emitting element 572 is electrically connected to

[0504] One of a pair of electrodes of the light-emitting element 572 is a source electrode and a drain electrode of the transistor 554. The other electrode of the capacitor 562, the source electrode and the drain electrode of the transistor 556, The other of the pair of electrodes of the light emitting element 572 is electrically connected to It is electrically connected to the potential supply line VL_b which functions as the cathode.

[0505] In addition, a potential supply line VL_a2 is provided, which extends in a direction parallel to the wiring ML. The line VL_a2 is connected to the potential supply line VL_a1 which functions as an anode line, and It is possible to reduce the wiring resistance of the supply lines VL_a1 and VL_a2. In a display device using a laminated substrate, it is possible to reduce the voltage drop in the wiring, This can reduce uneven brightness in the device.

[0506] A high power supply potential is applied to one of the potential supply lines VL_a1 and VL_a2 and the potential supply line VL_b. VDD is applied to one terminal, and a low power supply potential VSS is applied to the other terminal. In this example, a high power supply potential VDD is applied to the potential supply lines VL_a1 and VL_a2, and b is supplied with the low power supply potential VSS.

[0507] In a display device having the pixel circuit 541 of FIG. 41(D), for example, The pixel circuits 541 in each row are sequentially selected by the gate driver 544a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0508] In the pixel circuit 541 in which data has been written, the transistor 552 is turned off. Furthermore, since the transistor 552 is connected to the capacitor 562, The data written in the memory can be held for a long time. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The amount of current that flows through each pixel determines the brightness of the pixel.

[0509] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0510] (Embodiment 8) In this embodiment, a display device using the transistor described in the above embodiment will be described. An example will be described below with reference to FIGS.

[0511] FIG. 42 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 provided on a substrate 701 and a source driver 703 provided on the first substrate 701 are A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, and a a sealant 712 arranged to surround the gate driver circuit section 704 and the gate driver circuit section 706; and a second substrate 705 disposed opposite to the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 are used for sealing. Although not shown in FIG. 42, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0512] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. The flexible printed circuit (FPC) terminal section 708 is electrically connected to the flexible printed circuit (FPC) circuit section 706. In addition, the FPC terminal portion 708 is provided with an FP The pixel section 702 and the source driver circuit section 704 are connected by the FPC 716. Various signals are supplied to the pixel portion 702, the switch portion 703, and the gate driver circuit portion 706. The base driver circuit section 704, the gate driver circuit section 706, and the FPC terminal section 708 are Various signals supplied by the FPC 716 are A pixel section 702, a source driver circuit section 704, a gate driver circuit section 705, and a portion 706, and an FPC terminal portion 708.

[0513] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, COG methods, wire bonding methods, etc. can be used.

[0514] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0515] The display device 700 can also include various elements, such as liquid crystal. Elements, EL (electroluminescence) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) etc.), transistors (transistors that emit light according to current), electron emitters, electron insulators , electrophoretic element, grating light valve (GLV), plasma display (P Display elements using DP, MEMS (Micro-Electro-Mechanical Systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter ), MIRASOL (registered trademark), IMOD (Interference Modulation ) element, shutter type MEMS display element, optical interference type MEMS display element, elect Rougheting element, piezoelectric ceramic display, carbon nanotube display In addition to these, the device has at least one of an electric or magnetic function. The display medium may have a contrast, brightness, reflectance, transmittance, etc. that change depending on the display device. An example of a display device using an EL element is an EL display. An example of a display device using electrons is a field emission display (FED). is a flat panel display using the SED method (SED: Surface-conduction E LCD displays are used in the following applications: An example of the device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). play, reflective LCD, direct-view LCD, projection LCD) An example of a display device using electronic ink or electrophoretic elements is electronic paper. In addition, in order to realize semi-transmissive liquid crystal displays and reflective liquid crystal displays, In this case, a part or the whole of the pixel electrode may be made to function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM can be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0516] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB compose one color element, and two different colors are created by the color element. Alternatively, one or more colors such as yellow, cyan, magenta, etc. may be selected for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used with monochrome displays. The present invention can also be applied to display devices such as those shown in FIG.

[0517] In this embodiment, a liquid crystal element and an EL element are used as display elements. 43 and 44. Note that FIG. 43 shows the area indicated by the dashed line QR in FIG. FIG. 44 is a cross-sectional view of the liquid crystal display device shown in FIG. 42, a cross-sectional view taken along dashed line QR, showing a configuration in which an EL element is used as a display element. It is.

[0518] 43(A) and 44(A) show a structure in which a first substrate 701 and a second substrate 705 are made of glass. The display device 700 using the above-mentioned materials has high mechanical strength. B) is a display device 7 using plastic or the like as a first substrate 701 and a second substrate 705. The first substrate 701 is a flexible substrate. 2. The capacitor element 790 is fixed to the insulating film 719 via an adhesive 720. The second substrate 705 includes an insulating film 739 on which a colored film 736, a light-shielding film 738, etc. are formed. It is fixed via adhesive 740 .

[0519] First, the common parts shown in Figures 43 and 44 will be explained, and then the different parts will be explained. This will be explained below.

[0520] <Explanation of common parts of display device> The display devices 700 and 700a shown in FIGS. 43 and 44 include a wiring portion 711 and a pixel The display device 700 includes a display unit 702, a source driver circuit unit 704, and an FPC terminal unit 708. The wiring portion 711 includes a signal line 710. The pixel portion 702 includes a transistor The source driver circuit portion 704 includes a transistor 750 and a capacitor 790. The sensor 752 has a

[0521] The transistors 750 and 752 are the same as those in the above embodiments. The structure can be used as appropriate.

[0522] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. Therefore, the retention time of electric signals such as image signals can be extended, and the power supply When the write interval is on, it is possible to set it longer. This reduces the frequency of refresh operations. This has the effect of reducing power consumption.

[0523] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of parts can be reduced. By using a register, a high quality image can be provided.

[0524] Also, in FIG. 43 and FIG. 44, a transistor 750, a transistor 752, and a capacitor An insulating film 766 and a planarizing insulating film 770 are provided on the capacitor 790 .

[0525] The insulating film 766 can be formed using a material and a method similar to those of the insulating film 126 in the above embodiment. The planarization insulating film 770 can be formed by a method. Acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide resin, epoxy Heat-resistant organic materials such as epoxy resins can be used. The planarization insulating film 770 may be formed by stacking a plurality of insulating films. The planarizing insulating film 770 does not necessarily have to be provided.

[0526] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed in the same process as the conductive film that functions as the transistor 75. A conductive film serving as a gate electrode of the signal line 710 or 752 may be used. For example, when a material containing copper is used, signal delays caused by wiring resistance are reduced, and large screens can be displayed more clearly. It becomes possible to display in.

[0527] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the drain electrode. The terminal of the PC 716 is electrically connected via an anisotropic conductive film 780 .

[0528] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0529] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0530] In addition, on the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and A colored film 736 that functions as a color filter, a light-shielding film 738 that is in contact with the colored film 736, and An insulating film 734 is provided.

[0531] <Example of the configuration of a display device using a liquid crystal element as a display element> The display devices 700 and 700a shown in FIG. 43 include a liquid crystal element 775. The second liquid crystal layer 776 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. It is provided on the substrate 705 side and functions as a counter electrode. In the liquid crystal display 700a, the voltage applied to the conductive film 772 and the conductive film 774 changes the polarity of the liquid crystal layer 776. By changing the orientation state, light transmission or non-transmission can be controlled, allowing images to be displayed. .

[0532] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode. The conductive film 772 functions as a reflective electrode, that is, one of the electrodes of the display element. The display devices 700 and 700a shown in FIG. 772 reflects light and displays it through the colored film 736, so-called a reflective color liquid crystal display device. It is.

[0533] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a reflectivity can be used. For example, a material containing one of the elements indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed of A conductive film that is reflective in visible light is used.

[0534] In the display devices 700 and 700a shown in FIG. The film 770 has a portion with unevenness. The unevenness is formed by, for example, forming the planarization insulating film 770 with an organic The insulating layer can be formed by forming a resin film or the like and providing a recess or protrusion on the surface of the organic resin film. In addition, the conductive film 772 functioning as a reflective electrode is formed along the above-described unevenness. Therefore, when external light is incident on the conductive film 772, the light is scattered on the surface of the conductive film 772. Reflection is possible, and visibility can be improved.

[0535] The display devices 700 and 700a shown in FIG. 43 are reflective color liquid crystal display devices. However, the present invention is not limited to this. For example, the conductive film 772 may be a light-transmitting film that transmits visible light. A transmissive color liquid crystal display device may be formed by using a certain conductive film. In the case of a liquid crystal display device, the unevenness provided on the planarization insulating film 770 is not provided. This is also fine.

[0536] Although not shown in FIG. 43, the conductive films 772 and 774 on the side in contact with the liquid crystal layer 776 In addition, although not shown in FIG. Optical members (optical substrates) such as optical members, phase difference members, and anti-reflection members may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. Crites, sidelights, etc. may also be used.

[0537] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, For example, a liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, the liquid crystal material can have a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0538] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is used in the liquid crystal layer. It has a short response time, is optically isotropic so no alignment treatment is required, and has little viewing angle dependency. In addition, since there is no need to provide an alignment film, rubbing treatment is also unnecessary. It is possible to prevent electrostatic damage caused by electrostatic discharge, and thus to prevent defects in liquid crystal display devices during the manufacturing process. Damage can be reduced.

[0539] In addition, when liquid crystal elements are used as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero lectric Liquid Crystal) mode, AFLC (AntiFerr Electro-Oelectric Liquid Crystal mode can be used. .

[0540] In addition, normally black type liquid crystal display devices, for example, those using a vertical alignment (VA) mode The liquid crystal display device may be a transmission type liquid crystal display device. There are several types of vertical alignment modes, including: For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV mode, etc. can be used.

[0541] <Display device using light-emitting elements as display elements> The display devices 700 and 700a shown in FIG. 44 include a light-emitting element 782. The display device 7 shown in FIG. In the case of the display device 700 and 700a, an image is formed by emitting light from an EL layer 786 of a light-emitting element 782. can be displayed.

[0542] The conductive film 784 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 784 is connected to a conductive film that functions as a pixel electrode. The conductive film 784 functions as an electrode, that is, one of the electrodes of the display element. In the above, a conductive film that transmits light or a conductive film that reflects visible light can be used. Examples of conductive films that are transparent to visible light include indium (In), zinc (Zn), and ZnO. It is recommended to use a material containing one of the following elements: Zn (Zn) or tin (Sn). The reflective conductive film may be made of a material containing aluminum or silver. stomach.

[0543] In addition, the display devices 700 and 700a shown in FIG. 44 include a planarizing insulating film 770 and a conductive film 7 An insulating film 730 is provided over the conductive film 84. The insulating film 730 covers part of the conductive film 784. The light-emitting element 782 has a top-emission structure. The top electrode 782 has a thickness of 100 nm and transmits light emitted by the EL layer 786. The mission structure is exemplified as follows, but is not limited to this. A bottom emission structure that emits light or a structure that emits light to both the conductive film 784 and the conductive film 788 may be used. It can also be applied to a dual emission structure that outputs

[0544] A colored film 736 is provided at a position overlapping the light emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided at the position where the light-shielding film 738 is to be formed, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display devices 700 and 700a shown in FIG. 1, a colored film 736 is provided. However, the present invention is not limited to this. For example, when the EL layer 786 is formed by coloring, In some cases, the colored film 736 may not be provided.

[0545] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0546] (Embodiment 9) In this embodiment, one embodiment of a light-emitting device using a semiconductor device according to one embodiment of the present invention will be described. In this embodiment, the structure of a pixel portion of a light emitting device will be described with reference to FIG. Reveal.

[0547] In FIG. 45, a plurality of FETs 500 are formed on a first substrate 502. 00 is electrically connected to each light emitting element (504R, 504G, 504B, 504W). Specifically, each FET 500 is electrically connected to a first conductive film 506 of the light emitting element. Each of the light emitting elements (504R, 504G, 504B, 504W) is connected to the first The first conductive film 506, the second conductive film 507, the EL layer 510, and the third conductive film 512 It is composed.

[0548] In addition, at positions facing each of the light emitting elements (504R, 504G, 504B, 504W), Each of the color layers (514R, 514G, 514B, 514W) is provided. The color layers (514R, 514G, 514B, 514W) are in contact with the second substrate 516. A sealing film 518 is provided between the first substrate 502 and the second substrate 516. The sealing film 518 is formed of, for example, a glass material such as glass frit, Two-part resins that cure at room temperature, photocurable resins, thermosetting resins, etc. The resin material can be used.

[0549] In addition, the partition wall 5 is formed so as to cover the ends of the first conductive film 506 and the second conductive film 507 adjacent to each other. A structure 509 is provided on the partition wall 508. The first conductive film 506 functions as a reflective electrode and as an anode of the light-emitting element. In addition, the second conductive film 507 has a function of adjusting the optical path length of each light-emitting element. An EL layer 510 is formed on the second conductive film 507, and a third The third conductive film 512 is formed as a semi-transmissive and semi-reflective electrode. The structure 509 functions as a light-emitting element and as a cathode of the light-emitting element. It is provided between the colored layers and functions as a spacer.

[0550] In addition, the EL layer 510 is formed by applying the same to each of the light-emitting elements (504R, 504G, 504B, 504 The light emitting elements (504R, 504G, 504B) can be used in common. , 504W) are formed by the first conductive film 506 and the third conductive film 512 from the EL layer 510. It has a micro-optical resonator (also called a microcavity) structure that resonates light emission. Even if the EL layer 510 is included, it is possible to narrow the spectrum of light of different wavelengths and extract it. Specifically, each light-emitting element (504R, 504G, 504B, 504W) has an EL layer By adjusting the thickness of the second conductive film 507 provided below 510, The spectrum obtained from the EL layer 510 is a desired emission spectrum, and light emission with good color purity is obtained. Therefore, by using the structure shown in FIG. 45, the EL layer can be painted separately. This eliminates the need for the above steps, making it easier to achieve high definition.

[0551] In addition, the light emitting device shown in FIG. 45 further includes a colored layer (also called a color filter). This is a configuration that emits light with a desired emission spectrum. By combining this structure with a color filter, it is possible to obtain light emission with even better color purity. Specifically, the light path length of the light emitting element 504R is adjusted so as to obtain red light emission. The red light is emitted in the direction of the arrow through the colored layer 514R. The element 504G has an optical path length adjusted so as to obtain green light emission, and the color layer The light emitting element 504B emits blue light in the direction of the arrow. The optical path length of the light emitting element is adjusted so that light can be emitted. The light emitting element 504W emits blue light in the direction of the arrow A. The light emitting element 504W emits white light in the direction of the arrow B. The optical path length of the light-emitting element is adjusted, and white light is emitted in the direction of the arrow through the colored layer 514W. It is served.

[0552] The method of adjusting the optical path length of each light-emitting element is not limited to the above. In the optical element, the thickness of the EL layer 510 may be adjusted to adjust the optical path length.

[0553] The colored layers (514R, 514G, 514B) transmit light of a specific wavelength band. For example, a red (R) color filter that transmits light in the red wavelength range is sufficient. -filter, a green (G) color filter that transmits light in the green wavelength band, and a blue wavelength filter A blue (B) color filter that transmits light in the range of 100 nm can be used. For example, acrylic resin material that does not contain pigments may be used as 514W. The colored layers (514R, 514G, 514B, 514W) are made of various materials. It is formed by a printing method, an inkjet method, an etching method using photolithography technology, etc. It is possible.

[0554] The first conductive film 506 is, for example, a conductive film having a high reflectance (a reflectance of visible light of 40% or more). A metal film having a thickness of 100% or less, preferably 70% or more and 100% or less, can be used. The conductive film 506 is made of aluminum, silver, or an alloy containing these metal materials (e.g., For example, an alloy of silver, palladium, and copper) can be formed as a single layer or a multilayer.

[0555] The second conductive film 507 is formed using, for example, a conductive metal oxide. Conductive metal oxides include indium oxide, tin oxide, zinc oxide, and indium oxide. Indium Tin Oxide (also known as ITO), Indium Zinc Lead oxide (Indium Zinc Oxide) or these metal oxide materials with acid The second conductive film 50 may contain silicon oxide or tungsten oxide. 7 is provided between the EL layer 510 to be formed later and the first conductive film 506. This is advantageous because it can suppress the generation of an insulating film formed on the first conductive film 50. A conductive metal oxide used as the second conductive film 507 may be formed under the layer 6 .

[0556] The third conductive film 512 is made of a conductive material having a reflectivity and a conductive material having a light-transmitting property. The reflectance of visible light is 20% or more and 80% or less, preferably 40% or more. The third conductive film 512 is preferably made of, for example, silver, magnesium, or the like. A thin layer (e.g., 10 nm or less) of a metal or an alloy containing these metal materials is formed, and After that, a conductive metal oxide that can be used for the second conductive film 507 may be formed.

[0557] In the above-described configuration, the structure for extracting light emission on the second substrate 516 side (top end) is used. The light emitting device has a structure of a light emitting diode (mission structure). The first substrate 501 on which the FET 500 is formed is A structure in which light is extracted from the first substrate 501 side (bottom emission structure), or a structure in which light is extracted from the first substrate 501 side and the second substrate 502 side The light emitting device has a structure (dual emission structure) in which light is extracted from both sides of the substrate 516. In the case of a bottom emission structure, for example, the colored layers (514R, 514G, 51 4B, 514W) may be formed below the first conductive film 506. A light-transmitting substrate may be used for the substrate on the light-emitting side, and a transparent substrate may be used for the substrate on the non-light-emitting side. Both light-transmitting and light-shielding substrates can be used.

[0558] In addition, in FIG. 45, the light emitting element has four colors (red (R), green (G), blue (B), and white (W) ) is illustrated, but the present invention is not limited to this. For example, the light emitting element may have three colors (red (R), , green (G), and blue (B).

[0559] (Embodiment 10) In this embodiment, a display module in which the semiconductor device of one embodiment of the present invention can be used The electronic device will be described with reference to FIGS. 46 and 47. FIG.

[0560] The display module 8000 shown in FIG. 46 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight 8007, a frame 8009, and a printed circuit board 801 0, has battery 8011.

[0561] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0562] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0563] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the display panel 006 to make it into an optical touch panel.

[0564] The backlight 8007 has a light source 8008. In FIG. In the above embodiment, the light source 8008 is disposed on the light source 8007, but the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 need not be provided.

[0565] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0566] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0567] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0568] 47(A) to 47(D) are diagrams showing electronic devices. These electronic devices are housed in a housing. Body 600, display unit 601, speaker 603, LED lamp 604, operation keys 605 (power switch or operation switch), connection terminal 606, sensor 607 (force, displacement, position , speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, Hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays 606, which may include a microphone 608, etc.

[0569] FIG. 47(A) shows a mobile computer, which includes, in addition to the above, a switch 609, It may have an infrared port 620, etc. FIG. 47(B) shows a portable In addition to the above, the image reproducing device (for example, a DVD reproducing device) includes a second display unit 47(C) shows a television receiver. In addition to the above, it may have a tuner, an image processor, etc. (D) is a portable television receiver, which, in addition to the above, has a charging port capable of transmitting and receiving signals. It may have an electrical device 627, etc.

[0570] 47(E) to 47(G) show a foldable portable information terminal 610. FIG. 47(E) shows the portable information terminal 610 in an unfolded state. FIG. 47(F) shows the portable information terminal 610 in an unfolded state. The mobile information terminal 610 is shown in a folded state changing from one to the other. 47(G) shows the portable information terminal 610 in a folded state. When folded, it is highly portable, and when unfolded, it has a seamless, large display area. Excellent display visibility.

[0571] The display unit 612 is supported by three housings 615 connected by hinges 613 . The two housings 615 are bent via the hinge 613, forming a portable information terminal 610. The present invention can be applied to a folding device by using a folding method. A display device manufactured by applying the above method can be used for the display portion 612. A display device that can be bent to a diameter of 1 mm or more and 150 mm or less can be applied.

[0572] The electronic devices shown in Figures 47(A) to 47(G) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software (platform A function to control processing by a program, a wireless communication function, and a function to control various Functions for connecting to computer networks, wireless communication functions for transmitting various data, The function of receiving, reading out the program or data recorded on the recording medium and displaying it on the display Furthermore, in an electronic device having multiple display units, In this case, one display section is used mainly to display image information, and the other display section is used mainly to display text information. A function to display images with parallax taken into account on multiple displays to create a stereoscopic effect. Furthermore, in electronic devices having an image receiving unit, These include functions for taking still images, taking videos, and automatically or manually correcting the images. The camera has a function to correct the captured image, a function to save the captured image on a recording medium (external or built-in to the camera), The image displayed on the display unit can have a function of displaying the image. The functions that the electronic device shown in 7(G) can have are not limited to these, and various functions may be possible. It is possible to have.

[0573] The electronic device described in this embodiment has a display unit for displaying some information. Note that the semiconductor device of one embodiment of the present invention is not limited to an electronic device having a display portion. can also be applied to

[0574] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

Claims

[Claim 1] A gate driver and a pixel, the gate driver includes a first transistor; the pixel includes a second transistor; The first transistor is a first gate electrode; a first insulating film on the first gate electrode; a first semiconductor film on the first insulating film; a second insulating film on the first semiconductor film; a second gate electrode having a region on the second insulating film and a region overlapping with the first semiconductor film; a third insulating film having a region in contact with an upper surface of the first semiconductor film, a region in contact with a side surface of the second insulating film, a region in contact with a side surface of the second gate electrode, and a region in contact with an upper surface of the second gate electrode; a first source electrode having a region in contact with the first semiconductor film; a first drain electrode having a region in contact with the first semiconductor film; the second gate electrode has a first conductive film and a second conductive film on the first conductive film; the first gate electrode is always electrically connected to the second gate electrode; the first semiconductor film contains In, Ga, and Zn; the first semiconductor film has a first channel formation region; an end portion of the first conductive film has a region located outside an end portion of the second conductive film in a cross-sectional view of the first transistor in a channel length direction; an end portion of the second insulating film has a region located outside an end portion of the first conductive film in a cross-sectional view of the first transistor in a channel length direction; The second transistor is a second semiconductor film provided on and in contact with the first insulating film; a fourth insulating film provided on and in contact with the second semiconductor film; a third gate electrode having a region on the fourth insulating film and a region overlapping with the second semiconductor film; the third insulating film having a region in contact with an upper surface of the second semiconductor film, a region in contact with a side surface of the fourth insulating film, a region in contact with a side surface of the third gate electrode, and a region in contact with an upper surface of the third gate electrode; a second source electrode having a region in contact with the second semiconductor film; a second drain electrode having a region in contact with the second semiconductor film; the third gate electrode has the same material as the second gate electrode; the third gate electrode has a third conductive film and a fourth conductive film on the third conductive film, the second semiconductor film contains In, Ga, and Zn; the second semiconductor film is a single layer film, the second semiconductor film has a second channel formation region; an end of the third conductive film has a region located outside an end of the fourth conductive film in a cross-sectional view of the second transistor in a channel length direction; an end portion of the fourth insulating film has a region located outside an end portion of the third conductive film in a cross-sectional view of the second transistor in a channel length direction; the third insulating film has a region in contact with an upper surface of the first insulating film, When nanobeam electron diffraction is performed on the first semiconductor film, a spot is observed, a ring-shaped region with high brightness is observed, or a plurality of spots are observed within the ring-shaped region; A display device in which, when nanobeam electron diffraction is performed on the second semiconductor film, a spot is observed, a ring-shaped region of high brightness is observed, or multiple spots are observed within a ring-shaped region.

Images