Array substrate and display device

By installing channel lines in the slope area of ​​the packaging layer and optimizing the channel lines layout around the substrate, the signal line layout and packaging layer design problems in the prior art are solved, and a narrower border design and a more compact display device form are achieved.

JP2025060948AActive Publication Date: 2025-04-10BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
JP2024231981
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2019-11-15
Filing Date
2024-12-27
Publication Date
2025-04-10
Estimated Expiration
2040-10-30

AI Technical Summary

Technical Problem

When existing touch screen display devices realize narrower frame design, they face difficulties in the layout of signal lines and packaging layer design, which makes it difficult to effectively reduce the frame width.

Method used

By installing channel lines in the sloped area of ​​the packaging layer, the width of the edge area is reduced, and first and second type of channel lines are provided around the substrate to optimize the layout of the signal lines and the design of the packaging layer.

Benefits of technology

A narrower border design is achieved, reducing the width of the surrounding area of ​​the display device, and supporting a more compact display device form.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a display device capable of achieving narrow frame design.SOLUTION: An array substrate 100 includes a base substrate 110, a planarization layer 160, a sealing layer 120, a first stop wall 130, and a plurality of first channel lines 140. The first stop wall 130 is located in a peripheral region 114 and includes a first stop wall portion 132 extending along a first direction. The plurality of first channel lines 140 is located in the peripheral region 114 and located at the side of the sealing layer 120 away from the base substrate 110. The sealing layer 120 includes an organic sealing layer 124. The planarization layer 160 incudes a first edge portion 162 extending along the first direction. The first edge portion 162 is located between the first stop wall portion 132 and a display region 112. An orthographic projection of the first edge portion 162 on the base substrate 110 is covered by an orthographic projection of the organic sealing layer 124 on the base substrate 110, and an orthographic projection of at least one of the plurality of first channel lines 140 on the base substrate 110 is located at the side of the first edge portion 162 away from the display region 112.SELECTED DRAWING: Figure 4
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Description

[Technical field]

[0001] This application was filed on November 15, 2019 and bears application number 201911122242. 7, in which the contents disclosed in said Chinese patent application are incorporated herein by reference in their entirety. The entire contents of this application are incorporated by reference.

[0002] The embodiments of the present disclosure relate to an array substrate and a display device. [Background technology]

[0003] With the development of touch technology, smart electronic products such as mobile phones and tablet computers In both cases, a touch panel with touch functionality is integrated. With the rapid development of smart electronic products such as mobile phones, tablet computers, Smart electronic products such as smartphones are gradually moving towards a narrow frame and even frameless design, i.e. "all screen." It adopts a "lean" design, thereby providing users with a better user experience. Summary of the Invention [Means for solving the problem]

[0004] An embodiment of the present disclosure provides an array substrate and a display device. The array substrate includes at least However, by placing some of the channel lines on the sloping surface of the sealing layer, the width of the peripheral area is further reduced. This allows the array substrate to have a narrow frame or a low frame width. It is possible to realize the design of the system.

[0005] At least one embodiment of the present disclosure provides an array substrate, the array substrate comprising: a base substrate including a display region and a peripheral region located around the display region; a flat layer located on a side of the flat layer away from the base substrate; and a sealing layer located on a side of the flat layer away from the base substrate; a first stop wall located in the peripheral region and extending along a first direction; a wall, a portion of the sealing layer located in the peripheral region and on one side of the sealing layer away from the base substrate; and a plurality of first channel lines extending in the first direction, The first channel lines extend along a first direction, and the first channel lines are arranged along a second direction. is substantially perpendicular to the first direction, the sealing layer includes an organic sealing layer, and the flat layer is The first edge extends along a first direction, the first edge being in contact with the first stop wall. and a display region, and a projection of the first edge portion on the base substrate is formed by the organic sealing a layer of the first channel lines, the first channel lines being covered by an orthogonal projection of the layer on the base substrate; An orthogonal projection of at least one first channel line on the base substrate is It is located on the side of the base substrate away from the display area in orthogonal projection.

[0006] For example, in the array substrate according to the embodiment of the present disclosure, the organic sealing layer is a second edge extending along a direction of the first stop, the second edge being spaced apart from the first edge and a wall portion, and at least one first channel of the plurality of first channel lines is disposed between the wall portion and the wall portion. The orthogonal projection of the panel line on the base substrate is located within the orthogonal projection of the second edge on the base substrate. Place it.

[0007] For example, in an array substrate according to an embodiment of the present disclosure, the first channel lines are a plurality of first flat channel lines located on a side of the first edge portion away from the base substrate; a plurality of first inclined channel lines located on a side of the second edge portion away from the base substrate; The interval between two adjacent first inclined channel lines is 1 greater than the spacing between flat channel lines.

[0008] For example, in an array substrate according to an embodiment of the present disclosure, two adjacent first inclined channels The spacing between the channel lines is 1.0 times the spacing between two adjacent first flat channel lines. 5 to 2 times.

[0009] For example, in an array substrate according to an embodiment of the present disclosure, the first plurality of tilt channels The distance between two adjacent first inclined channel lines is It is 1.05 to 2 times the width of the panel line.

[0010] For example, the array substrate according to an embodiment of the present disclosure includes a pixel driving layer disposed on the base substrate. and an organic light-emitting element located on a side of the flat layer away from the pixel driving layer. The planar layer is located on the side of the pixel driving layer away from the base substrate, and the sealing layer is , located on the side of the organic light emitting element that is remote from the base substrate.

[0011] For example, in an array substrate according to an embodiment of the present disclosure, The first channel line, which is the furthest from the display area, is a part of a ground line; and one first channel line among the plurality of first channel lines that is farthest from the display area; The orthogonal projection of the organic sealing layer on the base substrate is a projection of the first A stop wall is located between the orthogonal projection of the stop wall on the base substrate.

[0012] For example, the array substrate according to an embodiment of the present disclosure is located in the display area and has the sealing a plurality of touch drive electrodes located on a side of the layer away from the base substrate; and a plurality of touch sensing elements disposed on a side of the sealing layer away from the base substrate. an electrode; and a touch drive signal connected to each of the touch drive electrodes and extending to the peripheral region. a touch sensing line connected to each of the touch sensing electrodes and extending to the peripheral region; and a first channel signal line. The channel line is a part of the touch driving signal line or the touch sensing signal line.

[0013] For example, in an array substrate according to an embodiment of the present disclosure, the first stop wall is a second stop wall portion extending along the second direction, and the array substrate is the planar layer further includes a plurality of second channel lines extending along the second direction, a third edge extending between the second stop wall and the display area, the third edge being and an orthogonal projection of the third edge of the organic encapsulation layer on the base substrate is At least one of the second plurality of channel lines is covered by an orthogonal projection on a substrate. The orthogonal projection of the second channel line on the base substrate is away from the display area of ​​the third edge. It is located on the side that can be accessed.

[0014] For example, the array substrate according to an embodiment of the present disclosure is located in the display area and has the sealing a plurality of touch drive electrodes located on a side of the layer away from the base substrate; and a plurality of touch sensing elements disposed on a side of the sealing layer away from the base substrate. an electrode; and a touch drive signal connected to each of the touch drive electrodes and extending to the peripheral region. a touch sensing line connected to each of the touch sensing electrodes and extending to the peripheral region; a signal line, and each of the plurality of touch sensing electrodes is aligned in the first direction. The touch sensing electrodes are arranged along the second direction. At least a part of the first channel lines of the plurality of first channel lines is the touch sensing each of the plurality of touch drive electrodes extends along the second direction; The plurality of touch driving electrodes are arranged along the first direction, and the plurality of second channels At least a part of the second channel lines is a part of the touch driving signal line.

[0015] For example, in the array substrate according to the embodiment of the present disclosure, the organic sealing layer is a fourth edge portion extending along a direction of the third edge portion and the second stop portion, and a wall portion, and at least one second channel of the plurality of second channel lines is disposed between the wall portion and the The orthogonal projection of the panel line on the base substrate is located within the orthogonal projection of the fourth edge on the base substrate. Place it.

[0016] For example, in an array substrate according to an embodiment of the present disclosure, the second channel lines are a plurality of second flat channel lines located on a side of the third edge portion away from the base substrate; and a plurality of second inclined channel lines located on a side of the fourth edge portion away from the base substrate; The interval between two adjacent second inclined channel lines is Greater than the spacing between two flat channel lines.

[0017] For example, in an array substrate according to an embodiment of the present disclosure, two adjacent second inclined channels The spacing between the channel lines is 1.0 times the spacing between two adjacent second flat channel lines. 5 to 2 times.

[0018] For example, in an array substrate according to an embodiment of the present disclosure, the plurality of second inclined channels The distance between two adjacent second inclined channel lines is equal to the distance between the first inclined channel lines. The width is 1.05 to 2 times the width of the panel line.

[0019] For example, an array substrate according to an embodiment of the present disclosure is provided on the base substrate. a second stop wall located in the peripheral region, the second stop wall being spaced apart from the first stop wall; The second stop wall is located between the top wall and the display area along the first direction. a third stop wall extending from at least one of the first plurality of channel lines; The orthogonal projection of the first channel line on the base substrate is the base of the third stop wall portion. Located in an orthogonal projection on the substrate.

[0020] For example, an array substrate according to an embodiment of the present disclosure is provided on the base substrate. a second stop wall located in the peripheral region, the second stop wall being spaced apart from the first stop wall; The second stop wall is located between the top wall and the display area along the first direction. a third stop wall extending from the first channel lines; The projection is located on a side of the third stop wall portion closer to the display area than the orthogonal projection on the base substrate. Place it.

[0021] For example, in the array substrate according to an embodiment of the present disclosure, the organic light emitting device is The device includes an anode, a light-emitting layer, and a cathode, which are stacked in this order in a direction away from the substrate. .

[0022] For example, in the array substrate according to an embodiment of the present disclosure, the sealing layer is a first inorganic sealing layer located on a side of the substrate away from the base substrate, and and a second inorganic sealing layer located on the side away from the first inorganic sealing layer, The stopper layer and the second inorganic sealing layer cover the first stopper wall, and the organic sealing layer covers the The first channel lines are disposed between the first inorganic sealing layer and the second inorganic sealing layer. The second inorganic sealing layer is located on a side away from the base substrate.

[0023] An embodiment of the present disclosure further provides an array substrate, the array substrate including a display area and the display. a base substrate including a peripheral region located around a display region; and a pixel region located on the base substrate. A driving layer, an organic light emitting element disposed in the pixel driving layer, and a light emitting element disposed in the organic light emitting element, a sealing layer including a first inorganic sealing layer and an organic sealing layer disposed in the peripheral region; and a plurality of first channels located on a side of the sealing layer away from the base substrate. Each of the first channel lines extends along a first direction, and the first channel lines The lines are arranged along a second direction, the second direction being substantially perpendicular to the first direction, and the periphery In the region, the first inorganic sealing layer is The insulating film includes a first inorganic sealing portion, an inorganic sealing connection portion, and a second inorganic sealing portion that are disposed successively, The inorganic sealing connection portion is configured to connect the first inorganic sealing portion and the second inorganic sealing portion. In the peripheral region, the organic The sealing layer includes a first organic sealing portion and a second organic sealing portion that are disposed successively. The edge of the sealing portion away from the display area is the edge of the organic sealing layer, and the first The orthogonal projection of the inorganic sealing portion on the base substrate is a projection of the first inorganic sealing portion and the base of the inorganic sealing connection portion. The orthogonal projection of the second organic sealing portion on the base substrate overlaps with the orthogonal projection of the second organic sealing portion on the base substrate. 2. The inorganic sealing portion overlaps with the orthogonal projection on the base substrate, and in a direction perpendicular to the base substrate The distance d1 between the first inorganic sealing portion and the base substrate is a distance d2 between the base substrate and at least one of the first channel lines The orthogonal projection of each of the first channel lines on the base substrate is formed on the base substrate of the second inorganic sealing portion. The radiated light is located within an orthogonal projection onto the substrate.

[0024] For example, in the array substrate according to the embodiment of the present disclosure, the first a first stop wall including a first stop wall portion extending along a direction of the pixel drive layer; a flat layer located on a side away from the base substrate, the flat layer being in the first direction a first edge extending along a direction of the first stop wall and the indicia; and a positive electrode of the first inorganic sealing portion and the inorganic sealing connection portion on the base substrate. The shadow overlaps with the orthogonal projection of the first edge portion on the base substrate, and the first inorganic sealing portion and the base substrate are a distance d1 between the second inorganic sealing portion and the base substrate, and a distance d2 between the second inorganic sealing portion and the base substrate. The difference is the thickness of the flat layer that overlaps with the inorganic sealing connection portion in a direction perpendicular to the base substrate. It is equal to or greater than the maximum thickness.

[0025] For example, in an array substrate according to an embodiment of the present disclosure, the planar layer is a first sub-flat layer located on a side away from the base substrate; a second sub-flat layer located on a side away from the pixel driving layer; a distance d1 between the second inorganic sealing portion and the base substrate, and a distance d The difference between the first and second planar layers is that the first planar layer overlaps the inorganic sealing connection portion in a direction perpendicular to the base substrate. the second sub-flat layer is formed on the base substrate in a direction perpendicular to the base substrate; It is equal to or greater than the sum of the maximum thickness of the connection portion and the overlapping portion.

[0026] For example, in an array substrate according to an embodiment of the present disclosure, the first channel lines are A plurality of first flat channels located on a side of the first organic sealing portion away from the base substrate a first inclined chuck located on a side of the second organic sealing portion away from the base substrate; and a distance between two adjacent first inclined channel lines is The distance is greater than the distance between two of the first flat channel lines.

[0027] For example, in an array substrate according to an embodiment of the present disclosure, two adjacent first inclined channels The spacing between the channel lines is 1.0 times the spacing between two adjacent first flat channel lines. 5-21.05~2 times.

[0028] For example, in an array substrate according to an embodiment of the present disclosure, the first plurality of tilt channels The distance between two adjacent first inclined channel lines is It is 1.05 to 2 times the width of the tunnel line.

[0029] An embodiment of the present disclosure further includes a display device including the array substrate according to any one of the above. provide.

[0030] In order to more clearly describe the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments are given below: Briefly, the drawings in the following description are not intended to limit the present disclosure, but to illustrate, by way of example, the present disclosure. This is relevant only to some embodiments of the invention. [Brief description of the drawings]

[0031] [Figure 1] 2 is a schematic cross-sectional view of a peripheral region of an array substrate. FIG. [Diagram 2] 13 is a schematic cross-sectional view of a peripheral region of another array substrate. FIG. [Diagram 3] FIG. 2 is a schematic plan view of an array substrate according to an embodiment of the present disclosure. [Figure 4] 4 is a schematic cross-sectional view of the array substrate according to the embodiment of the present disclosure taken along the direction AA in FIG. 3. [Diagram 5] 4 is a schematic cross-sectional view of the array substrate according to the embodiment of the present disclosure taken along the direction BB in FIG. 3. [Figure 6] FIG. 11 is a schematic plan view of another array substrate according to an embodiment of the present disclosure. [Figure 7] 7 is a schematic cross-sectional view of the array substrate according to the embodiment of the present disclosure taken along the CC direction in FIG. 6. [Figure 8] 7 is a schematic cross-sectional view of the array substrate according to the embodiment of the present disclosure taken along the DD direction in FIG. 6. [Figure 9] FIG. 2 is a schematic plan view of an array substrate according to an embodiment of the present disclosure. [Figure 10] 10 is a schematic cross-sectional view of the array substrate according to the embodiment of the present disclosure taken along the EE direction in FIG. 9. [Figure 11] 10 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the FF direction in FIG. 9. [Figure 12] FIG. 11 is a schematic plan view of another array substrate according to an embodiment of the present disclosure. [Figure 13] 6 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the direction GG in FIG. 5. [Figure 14]6 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the HH direction in FIG. 5. [Figure 15] FIG. 2 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure. [Figure 16] FIG. 1 is a schematic diagram of a structure of a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] In order to more clearly describe the objectives, technical solutions and advantages of the present disclosure, the following examples of the present disclosure are given. The technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings. As such, the described embodiments are only a portion of the present disclosure and are not all of the embodiments. Based on the disclosed embodiments, other embodiments that a person skilled in the art can obtain without creative labor are not All of these are within the scope of protection of this disclosure.

[0033] Unless otherwise defined, technical or scientific terms used in this disclosure are understood by those of ordinary skill in the art. As used in this disclosure, "first," "second," and similar terms have their ordinary meaning in any order. They do not indicate order, quantity or importance, but are merely intended to distinguish different components. Similar words such as "include" and "contain" are used to indicate that the elements or things appearing before this word are included in this word. It is intended to include the elements and articles listed below and their equivalents, but not to include other elements and articles. "Connected" and similar terms such as "connected to each other" refer to physical or mechanical The term "connection" is not limited to a physical connection, but may include electrical connections, whether direct or indirect.

[0034] Currently, in order to realize a thinner design for display devices (e.g., organic light-emitting diode display devices), In addition, the display panel and the touch structure can be integrated into one. (Flexible Multiple Layer On Cell) touch technology is FMLOC touch technology is born according to the need to combine various electrode layers and various touch structures in the sealing layer. The touch structure can be integrated into the display panel by directly fabricating the appropriate wiring. Display devices that use FMLOC touch technology can not only achieve slimmer displays, , flexible display and flexible touch can further be realized.

[0035] In a display device adopting FMLOC touch technology, a touch drive is provided in the peripheral area of ​​the display device. Signal channel lines are installed to connect the moving electrodes (Tx) and the touch sensing electrodes (Rx). FIG. 1 is a schematic cross-sectional view of the peripheral region of the array substrate. As shown in FIG. The sealing layer 20 is provided on the plate 10. The sealing layer 20 is made up of two inorganic sealing layers 21 and two inorganic sealing layers. and an organic encapsulation layer 22 interposed between the layers 21 and 22, the encapsulation layer 20 being spaced apart from the base substrate 10. Signal wiring connected to the touch driving electrode (Tx) or touch sensing electrode (Rx) on the surface The organic sealing layer 22 is subjected to a leveling process, so that the periphery of the array substrate is A sloped portion in which the thickness gradually decreases is formed in the region. In order to avoid this, the signal wiring 30 is generally formed at a position corresponding to the flat portion of the organic sealing layer 22. This results in a large width in the peripheral area, which is disadvantageous in realizing a narrow frame design for the display device. be.

[0036] FIG. 2 is a schematic cross-sectional view of another array substrate. As shown in FIG. 2, the array substrate , a base substrate 10, a sealing layer 20, a signal wiring 30, a pixel driving layer 40, and a flat layer 50. The base substrate 10 includes a display area 11 and an organic light-emitting element 60. The pixel driving layer 40 is disposed on the base substrate 10 and includes a peripheral region 12. The planar layer 50 is located in the display area 11 of the pixel driving layer 40. The organic light emitting element 60 is located on the side of the planar layer 50 away from the pixel driving layer 40. The sealing layer 20 is located on the side of the organic light-emitting element 60 that is farther away from the base substrate 10. The layer 20 includes two inorganic sealing layers 21 and an organic sealing layer 22 interposed between the two inorganic sealing layers 21. The surface of the sealing layer 20 away from the base substrate 10 is provided with a touch drive electrode (Tx) or a touch electrode (Tx). A signal wiring 30 connected to the switch sensing electrode (Rx) is formed. Since the sealing layer 20 on the flat layer 50 is not fixed to the base substrate 10, the distance between the sealing layer 20 on the flat layer 50 and the base substrate 10 is The thickness of the flat layer 50 decreases sharply at the edge thereof, and the organic encapsulation layer 22 undergoes a leveling process. A slope portion is formed in the peripheral region of the array substrate, the thickness of which is gradually decreased. In order to avoid any influence on the wiring 30, the signal wiring 30 is generally placed under the organic sealing layer 22. The flat portion is formed at a position corresponding to the flat portion, i.e., at a position on the flat layer. The width of the frame of the display device using the above method includes the width of the inclined portion and the width of the flat portion, and the width of the flat portion is Because it is large, it is disadvantageous in realizing a narrow frame design.

[0037] On the other hand, with the development of narrow frame designs, the frame of the display device is becoming narrower and narrower. At that time, the only way to reduce the wiring width and wiring spacing is to create a narrow frame design. Therefore, the wiring needs of the display device using the above method are not fully solved.

[0038] In response to this, an embodiment of the present disclosure provides an array substrate and a display device. The pixel driving layer includes a base substrate, a planar layer, an organic light-emitting element, a sealing layer, and a first stop layer. The base substrate includes a display area and a plurality of first channel lines. The pixel driving layer is located on the base substrate. The planar layer is a peripheral area for placing the pixel driving layer. The organic light emitting element is located on the side away from the base substrate. The sealing layer is located on the side of the organic light-emitting element that is farther from the base substrate. The stop wall includes a first stop wall portion located in the peripheral region and extending along a first direction. The first channel lines are located in the peripheral region and on a side of the encapsulation layer away from the base substrate. Each of the plurality of first channel lines extends along a first direction, and the plurality of first channel lines The lines are arranged along a second direction, the second direction being substantially perpendicular to the first direction. The flat layer includes a first edge extending along a first direction, the first edge being a first Located between the first stop wall and the display area, the orthogonal projection of the base substrate at the first edge is an organic encapsulant. the stop layer is covered by a projection of the base substrate, and at least one of the first channel lines is covered by a projection of the stop layer of the base substrate. The orthogonal projection of the first channel line on the base substrate is away from the display area at the first edge. In this way, the array substrate is provided with at least one of the first channel lines. The first channel line is disposed on the side of the first edge away from the display area (i.e., the inclined portion of the sealing layer). ) to reduce the width of the peripheral area, so that the array substrate It is possible to realize a narrow frame or frameless design for the display device to be adopted.

[0039] Hereinafter, an array substrate and a display device according to an embodiment of the present disclosure will be described in detail with reference to the drawings. do.

[0040] FIG. 3 is a schematic plan view of an array substrate according to an embodiment of the present disclosure, and FIG. 4 is a schematic cross-sectional view of the array substrate taken along the direction AA in FIG. As shown, the array substrate 100 includes a base substrate 110, a pixel driving layer 150, and a planar layer 160. an organic light-emitting element 170; a sealing layer 120; a first stop wall 130; and a plurality of first channels. The base substrate 110 includes a display area 112 and a periphery of the display area 112. The pixel driving layer 150 is disposed on the base substrate 110. The planarization layer 160 is located on the side of the pixel driving layer 150 away from the base substrate 110. The light emitting element 170 is located on the side of the planar layer 160 away from the pixel driving layer 150. The first stop 20 is located on the side of the organic light emitting element 170 that is away from the base substrate 110. The wall 130 is a first stop wall portion located in the peripheral region 114 and extending along a first direction. A plurality of first channel lines 140 are located in the peripheral region 114 and are formed on the encapsulation layer 132. 120 on the side away from the base substrate 110, and each first channel line 140 is The first channel lines 140 extend along a direction X, and the first channel lines 140 are arranged along a second direction Y. The second direction is substantially perpendicular to the first direction. A pixel for driving a corresponding organic light emitting element so that the corresponding organic light emitting element performs light emission display. In addition, the second direction being perpendicular to the first direction may include a circuit. When the included angle between the first direction and the second direction is equal to 90 degrees, and when the included angle between the first direction and the second direction is equal to 8 This includes the cases where the temperature is greater than 0 degrees and less than 100 degrees.

[0041] As shown in FIGS. 3 and 4, the sealing layer 120 is directly disposed on the base substrate 110 in some areas. Another film layer structure, such as the above-mentioned film, may be placed between the sealing layer 120 and the base substrate 110. A pixel driving layer 150, a flat layer 160, an organic light emitting element 170, etc. may be provided. encapsulates the pixel driving layer 150 and the organic light emitting element 170 formed on the base substrate 110; Water and oxygen in the external environment corrode the pixel driving layer 150 and the organic light emitting device 170. The first stop wall 130 is disposed on the base substrate 110 and is arranged around the The first stop wall 130 is located in the side region 114. The fluid material in the stop layer 120 can be prevented from flowing out of the first stop wall 130. Cut.

[0042] As shown in FIGS. 3 and 4, the encapsulation layer 120 includes an organic encapsulation layer 124 and a planarization layer 160. The first stop 162 includes a first edge 162 extending along a first direction X. The first edge 162 of the base substrate 110 is located between the wall 132 and the display area 112. The orthogonal projection is covered by the orthogonal projection of the organic sealing layer 124 on the base substrate 110 and includes a plurality of first A base substrate 1 of at least one first channel line 140 of the channel lines 140 The orthogonal projection at 10 is located on the side of the first edge 162 away from the viewing area 112 .

[0043] In the array substrate according to the embodiment of the present disclosure, the flat layer 160 is not provided over the entire layer. Therefore, the distance between the encapsulation layer 120 and the base substrate 110 decreases abruptly at the first edge 162. The organic encapsulation layer 124 also undergoes a leveling process, which causes the periphery region 114 to A first inclined portion 1243 is formed, the thickness of which is gradually decreased, and the first edge 16 of the organic sealing layer 124 is formed. The portion above the first channel 1241 is a first flat portion 1241. At least one first channel line 140 of the panel lines 140 is indicated by a first edge 162. The side away from the area 112 (i.e., the first inclined portion 1243 or the display area of ​​the first inclined portion 1243) By installing the first channel 1241 on the first flat portion 1241 (the side away from the area 112), The number of channel lines can be reduced, and the first channel line can be provided on the first flat portion 1241. This reduces the width of the first flat portion 1241 and further reduces the width of the peripheral region 114. As a result, the array substrate can be used in a display device that employs the array substrate. This helps to realize a narrow frame or frameless design.

[0044] For example, the display area may be the screen display area of ​​the array substrate, i.e., the light-emitting area. The peripheral area is an area where the screen of the array substrate does not display anything, i.e., a non-light-emitting area. The peripheral region may surround the display region or may be located at a portion of the periphery of the display region. good.

[0045] For example, the base substrate 110 may be a flexible base substrate 110, such as polyimide (po lyimide, PI) to form a flexible display device. The material of the flexible base substrate 100 is not limited to polyimide.

[0046] In some examples, as shown in FIGS. 3 and 4, the organic sealing layer 124 is The second edge 1242 includes a second edge 1242 extending from the first edge 162 to the first stop. At least one of the first channel lines 140 is located between the wall portion 132 and the The orthogonal projection of the first channel line 140 on the base substrate 110 is the second edge 1242 of the base substrate 110. The array substrate is located within an orthogonal projection on the plate 110. Thus, the array substrate is provided with a plurality of first channels. At least one of the first channel lines is located on the second edge to form a first flat The number of first channel lines installed on the first flat portion can be reduced, and No channel line is provided, thereby reducing the width of the first flat portion and further reducing the width of the peripheral region. can be reduced.

[0047] In some examples, as shown in FIGS. 3 and 4, the first channel lines 140 include A plurality of first flat channel lines 111 located on the side of the first edge 162 away from the base substrate 110 42 and a plurality of first inclined channels located on the side of the second edge 1242 away from the base substrate 110. A typical channel line includes a first edge of the base substrate and a second edge of the channel line. Since the sensor is installed on the far side, i.e., the first flat portion, the width of the first flat portion in the second direction Y is large. However, the first flat channel line in the array substrate according to the embodiment of the present disclosure is formed on the first edge of the substrate. The first slanted channel line is formed on the side away from the base substrate at the second edge. The first flat portion is formed on the far side of the first channel line that needs to be supported by the first flat portion. The number of the first flat portions can be reduced, thereby reducing the width of the first flat portion in the second direction Y. In addition, the width of the peripheral region of the array substrate in the second direction Y can be reduced. A display device employing the array substrate can have a narrow frame.

[0048] In some examples, as shown in FIG. 3 and FIG. 4, two adjacent first inclined channel lines The spacing between 144 is greater than the spacing between two adjacent first flat channel lines 142. A patterning process is performed on the conductive film layer so that the first slanted channel line is formed on the slanted surface. In the process of forming the first flat channel line and the first inclined channel line, If the performance of is limited, it is easy to cause underexposure of the first inclined channel line on the slope, Furthermore, a short circuit occurs between two adjacent first inclined channel lines. In the substrate, the distance between two adjacent first inclined channel lines is set to be equal to the distance between two adjacent first inclined channel lines. By setting the spacing between the flat channel lines larger than 1, the array substrate has a first tilt Various defects such as short circuits caused by insufficient exposure of the diagonal channel lines can be avoided.

[0049] In some examples, the spacing between two adjacent first inclined channel lines 144 is The distance between the two first flat channel lines 142 is 1.05 to 2 times the distance between the two first flat channel lines 142. The array substrate avoids the exposure problem by forming a first inclined channel line on the first inclined portion. This can avoid various defects due to exposure problems.

[0050] For example, the spacing between two adjacent first inclined channel lines 144 is 1.5 times the spacing between the flat channel lines 142. On the other hand, the array substrate The exposure problem caused by forming the first inclined channel line on the first inclined portion can be avoided, On the other hand, the array substrate further comprises a space between two adjacent first oblique channel lines. Since it can be made smaller, more first inclined channel lines are installed in the first inclined section. .

[0051] Of course, embodiments of the present disclosure include, but are not limited to, two adjacent The distance between the first inclined channel lines is the distance between two adjacent first flat channel lines. For example, the spacing between two adjacent first inclined channel lines may be equal to The distance between the first flat channel lines may be equal to the distance between the first slanted channel lines. The line width is greater than the line width of the first flat channel line. In some examples, the first sloping channel lines In the channel lines 144, the distance between two adjacent first inclined channel lines 144 is The width is 1.05 to 2 times the width of the first inclined channel line 144. Since the interval between the channel lines is set large, the array substrate has a first inclined channel on the first inclined portion. This avoids the exposure problem caused by forming channel lines, Therefore, various defects caused by the above-mentioned problems can be avoided.

[0052] In some examples, as shown in FIGS. 3 and 4, among the first channel lines 140 The first channel line 148, which is the furthest from the display area 112, is a part of the ground line. , and one of the first channel lines 140 that is farthest from the display area 112 The orthogonal projection of the channel lines 148 on the base substrate 110 is the same as that of the organic encapsulation layer 124 on the base substrate 110. 10 and the orthogonal projection of the first stop wall portion 132 on the base substrate 110. That is, the outermost one of the first channel lines is connected to ground. A portion of the wire and a ground wire are disposed between the first stop wall and the organic encapsulation layer. Thereby, the array substrate further utilizes the space between the first stop wall portion and the organic sealing layer. The ground line can be placed by increasing the number of channel lines on the flat portion of the encapsulation layer. Further reducing the width of the peripheral region of the array substrate.

[0053] In some examples, as shown in FIG. 3 and FIG. 4, the array substrate 100 may include a plurality of touch panels. A driving electrode 182, a plurality of touch sensing electrodes 184, and a touch driving signal line 186; The touch driving electrodes 182 and the touch sensing signal lines 188 are connected to each other. The touch sensing electrodes 184 are all located in the display area 112 and are also located in the sealing layer 120. The touch drive signal lines 186 are located on the side away from the base substrate 110. The touch sensing signal line 188 is connected to the pole 182 and extends to the peripheral area 114. is connected to each touch sensing electrode 184 and extends to the peripheral region 114. For example, the touch driving signal line 186 and the touch sensing signal line 188 are both in the peripheral area 1. 14 to the binding region 115 for binding to an external circuit, This allows touch driving, data reception, and data processing to be realized. In the layout substrate, at least some of the first channel lines 140 The panel line 140 is part of the touch drive signal line 186 or the touch sensing signal line 188. do.

[0054] For example, the touch driving electrodes and the touch sensing electrodes are transparent electrodes or metal meshes. The touch driving electrode and the touch sensing electrode may be provided with a capacitor at an overlapping position. When a finger touches the capacitor, it affects the coupling of the capacitor near the touch point. This changes the capacitance of the capacitor near the touch point. The change in capacitance can be used to determine the touch position. For example, the touch layer may include a mutual capacitance type touch structure, a self-capacitance type touch structure, and the like. The touch sensor may include a volumetric touch structure.

[0055] FIG. 5 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the direction BB in FIG. As shown in FIGS. 3, 4 and 5, the first stop wall 130 extends along the second direction. For example, the second stop wall 134 may be Two first stop walls 132 and two second stop walls 134 are connected to the wall 132. are successively connected to form a rectangular first stop wall 130 that surrounds the display area 112 .

[0056] In some examples, as shown in FIG. 5, the array substrate 100 includes a plurality of second channels. Each of the second channel lines 190 extends along a second direction. The layer 160 includes a third edge 164 extending along the second direction. The stop wall 134 is located between the display area 112 and the third edge 164 of the base substrate 11. The orthogonal projection at 0 is covered by the orthogonal projection of the organic sealing layer 124 on the base substrate 110 and overlaps the The base of at least one of the second channel lines 190 The orthogonal projection on the substrate 110 is located on the side of the third edge 164 away from the display area 112. Since the flat layer 160 is not installed over the entire layer, the distance between the sealing layer 120 and the base substrate 110 The thickness of the organic encapsulation layer 124 decreases abruptly at the third edge 164 and the organic encapsulation layer 124 undergoes a leveling process. As a result, a second inclined portion 1247 whose thickness is gradually reduced is formed in the peripheral region 114. The portion of the organic sealing layer 124 above the third edge 164 becomes a second flat portion 1246 . The array substrate includes at least one second channel of the plurality of second channel lines 190. The line 190 is aligned with the side of the third edge 164 that is away from the display area 112 (i.e., the second inclined portion 1247 Or, by installing the second inclined portion 1247 on the side away from the display area 112, The number of second channel lines provided on the support 1246 can be reduced, or the second flat The second channel line is not provided in the second flat portion 1246, thereby reducing the width of the second flat portion 1246. This allows the width of the peripheral region 114 to be further reduced. This helps to realize a narrow frame or frameless design of a display device using the array substrate. 1.

[0057] In some examples, as shown in FIGS. 3, 4 and 5, the array substrate 100 includes a plurality of A touch drive electrode 182, a plurality of touch sensing electrodes 184, and a touch drive signal line 18 6 and a touch sensing signal line 188. The plurality of touch sensing electrodes 184 are all located in the display area 112 and are formed on the sealing layer 1. 20 on the side away from the base substrate 110. The touch drive signal line 186 The touch sensing signal line is connected to the driving electrode 182 and extends to the peripheral region 114. 188 is connected to each touch sensing electrode 184 and extends to the peripheral region 114. For example, the touch driving signal line 186 and the touch sensing signal line 188 are both peripheral The region 114 extends to a binding region 115 for binding to an external circuit. Thus, touch driving, data reception and data processing can be realized. The touch sensing electrode 184 extends along the first direction and includes a plurality of touch sensing electrodes 18 4 is arranged along the second direction, and at least a part of the plurality of first channel lines 140 The first channel line 140 is a part of the touch sensing signal line 188, The touch drive electrode 182 extends along the second direction, and the plurality of touch drive electrodes 182 are At least some of the second channel lines 190 are arranged along the direction The touch line 190 is part of the touch drive signal line 186.

[0058] For example, as shown in FIG. 3, FIG. 4 and FIG. 5, the touch driving signal line 186 is a touch driving voltage A first portion 1861 extending along the extension direction of the electrode 182 and a plurality of touch drive electrodes 182 A second portion 1862 extending along the arrangement direction of the touch drive electrodes 182 and a second portion 1863 extending along the extension direction of the touch drive electrodes 182 The first portion 1861 is connected to the touch drive electrode 182. The second portion 1862 is connected to the first portion 1861, and the third portion 1863 is connected to the 2 part 1862. At that time, the extension direction of each touch drive electrode 182 is a first direction The arrangement direction of the plurality of touch driving electrodes 182 is the second direction Y. The panel line 140 may be a third portion 1863 of the touch drive signal line 186.

[0059] For example, as shown in FIG. 3, FIG. 4 and FIG. 5, the touch sensing signal line 188 A fourth portion 1881 extending along the extension direction of the sensing electrode 184 and a plurality of touch sensors and a fifth portion 1882 extending along the arrangement direction of the sensing electrodes 184. The fifth portion 1881 is connected to the touch sensing electrode 184, and the fifth portion 1882 is connected to the fourth portion 18 81. At this time, the extension direction of each touch sensing electrode 184 is the second direction Y. The arrangement direction of the plurality of touch sensing electrodes 184 is a first direction X. The channel line 140 may be a fifth portion 1882 of the touch sensing signal line 188 . At this time, some of the first channel lines 140 are part of the touch driving signal lines 186, and some The first channel line 140 is part of the touch sensing signal line 188 .

[0060] In some examples, as shown in FIGS. 3, 4, and 5, the organic encapsulation layer 124 is The fourth edge 1245 extends along the third edge 164 and the second edge 1245. At least one of the second channel lines 190 is located between the stop wall 134 and the The orthogonal projection of one second channel line 190 on the base substrate 110 is the base of the fourth edge 1245. The array substrate 110 is located within an orthogonal projection of the second channel lines 19. 10, the orthogonal projection of at least one second channel line 190 on the base substrate 110 is 4. The edge 1245 is placed within an orthogonal projection on the base substrate 110 (i.e., a plurality of second channels). At least one second channel line 190 of the panel lines 190 is provided on the fourth edge 1245. By placing the second flat portion 1246 on the second flat portion 1246, the number of second channel lines placed on the second flat portion 1246 is reduced. , or the second channel line is not provided on the second flat portion 1246, so that the second flat portion 124 6 and further reduce the width of the peripheral region 114. The array substrate realizes a narrow frame or frameless design of a display device that employs the array substrate. It is useful to do so.

[0061] In some examples, as shown in FIGS. 3, 4 and 5, a plurality of second channel lines 190 The second flat channels are located on the side of the third edge 164 away from the base substrate 110. The fourth edge portion 1245 has a plurality of second conductive lines 192 and a second conductive line 193 located on the side of the fourth edge portion 1245 away from the base substrate 110. The typical channel lines are all aligned along the base of the third edge. Since the sensor is installed on the side away from the substrate, i.e., on the second flat portion, the second direction X of the second flat portion The second flat channel line in the array substrate according to the embodiment of the present disclosure has a third edge the second inclined channel line is formed on the side of the base substrate facing away from the fourth edge of the base substrate; A second channel formed on the side away from the plate, which the second flat portion must support. The number of lines can be reduced, thereby reducing the width of the second flat portion in the first direction X; Furthermore, the width of the peripheral region of the array substrate in the first direction X can be reduced. As a result, a display device using this array substrate can have a narrow frame.

[0062] In some cases, as shown in FIGS. 3 and 5, two adjacent second inclined channel lines The spacing between 194 is greater than the spacing between two adjacent second flat channel lines 192. A patterning process is performed on the conductive film layer so that the second slanted channel line is formed on the slanted surface. In the process of forming the second flat channel line and the second inclined channel line, If the performance of is limited, it is easy to cause underexposure of the second inclined channel line on the slope, Furthermore, a short circuit occurs between two adjacent second inclined channel lines. In the substrate, the interval between two adjacent second inclined channel lines is set to the interval between two adjacent second inclined channel lines. By setting the spacing between the flat channel lines larger, the array substrate has a second inclined Various defects such as short circuits caused by insufficient exposure of channel lines can be avoided.

[0063] In some examples, the spacing between two adjacent second inclined channel lines 194 is The distance between the two second flat channel lines 192 is 1.05 to 2 times the distance between the two second flat channel lines 192. The array substrate avoids the exposure problem by forming a second inclined channel line on the second inclined portion. This can avoid various defects due to exposure problems.

[0064] For example, the spacing between two adjacent second inclined channel lines 194 is 1 / 2 the spacing between two adjacent first inclined channel lines 194. The distance between the two flat channel lines 192 is 1.5 times the distance between the two flat channel lines 192. 2. The exposure problem caused by forming the slanted channel line on the second slanted portion can be avoided, On the other hand, the array substrate further comprises a space between two adjacent second oblique channel lines. At the same time, it can be made smaller, so that more second inclined channel lines can be formed in the second inclined section. Install.

[0065] In some examples, the plurality of second inclined channel lines 194 may include adjacent second inclined channel lines 194. The spacing between the inclined channel lines 194 is 1.05 to 2 times the width of the second inclined channel line 194. The distance between the two adjacent second inclined channel lines is set large, so that the The array substrate avoids the exposure problem by forming the second inclined channel line on the second inclined portion. This makes it possible to avoid various defects due to exposure problems.

[0066] In some examples, as shown in FIGS. 3, 4, and 5, the organic light emitting device 170 may include a base An anode 171 and a light-emitting layer 172 are sequentially stacked in a direction away from the substrate 110. The organic light emitting device 170 includes the light emitting layer 172 and the cathode 173. It can emit light.

[0067] In some examples, as shown in FIGS. 3, 4, and 5, the encapsulation layer 120 may be a first inorganic encapsulation material. The first inorganic sealing layer 122 further comprises an organic light emitting element and a second inorganic sealing layer 126. The second inorganic sealing layer 126 is disposed on the side of the first inorganic sealing layer 126 that is away from the base substrate 110 of the semiconductor device 170. The organic sealing layer 124 is disposed on the side of the inorganic sealing layer 122 that is away from the base substrate 110. A first inorganic sealing layer 122 and a second inorganic sealing layer 124 are interposed between the first channel lines 1 40 is located on the side of the second inorganic sealing layer 126 that is away from the base substrate 110. The sealing layer has a strong ability to isolate water and oxygen, thereby sealing out water and oxygen from the external environment. Therefore, the device sealed in the sealing layer can be effectively prevented from being corroded.

[0068] For example, the material of the first inorganic sealing layer and the second inorganic sealing layer may be silicon oxide, silicon nitride or The inorganic material can be selected from one or more silicon oxynitrides. Therefore, it is possible to prevent water, oxygen, etc. from entering the light emitting element and affecting its performance. The material of the organic sealing layer is a polymer resin, such as polyimide or polyacrylic ester. The organic sealing layer has functions such as planarization and stress relaxation.

[0069] In some examples, as shown in FIGS. 3 and 4, in the peripheral region 114, a first inorganic sealant The sealing layer 122 includes a first inorganic sealing portion 1221, a second inorganic sealing portion 1222, and a first inorganic sealing portion 1223. and an inorganic sealing connection portion 1223 that connects the first inorganic sealing portion 1221 and the second inorganic sealing portion 1222. The orthogonal projection of the inorganic sealing portion 1221 on the base substrate 110 is the same as that of the base substrate 110 at the first edge portion 162. That is, the first inorganic sealing portion 1221 is disposed on the first edge portion 162. The second inorganic sealing portion 1222 is disposed on the base substrate 110 and is disposed on the surface of the first edge portion 162. It is located on the side away from the display area 112.

[0070] The organic sealing layer 124 is made up of a first organic sealing portion 1248 and a second organic sealing portion 1249 that are disposed in series. 249, and the edge of the second organic sealing portion 1249 that is away from the display area 112 is an organic sealing The orthogonal projection of the first organic sealing portion 1248 on the base substrate 110 is The first inorganic sealing portion 1221 and the inorganic sealing connection portion 1223 are orthogonally projected and overlapped on the base substrate 110. The orthogonal projection of the second organic sealing portion 1249 on the base substrate 110 is the same as that of the second inorganic sealing portion 122. The first inorganic film is projected on the base substrate 110 in a direction perpendicular to the base substrate 110. The distance d1 between the sealing portion 1221 and the base substrate 110 is The difference between d1 and d2 is larger than the distance d2 between the flat layer 160 and the substrate 110. and at least one first channel of the plurality of first channel lines 140 has a thickness of The orthogonal projection of the panel line 140 on the base substrate 110 is the same as that of the base substrate 110 of the second inorganic sealing portion 1222. It falls within the orthogonal projection at 10.

[0071] In the array substrate according to the embodiment of the present disclosure, the first inorganic sealing portion 1221 and the base substrate 11 0 is greater than the distance d2 between the second inorganic sealing portion 1222 and the base substrate 110. Since the difference between d1 and d2 is large and is equal to or greater than the thickness of the flat layer 160, the first inorganic sealing The organic sealing layer 124 formed on the layer 122 has a thickness that gradually decreases at the position of the second inorganic sealing portion 1222. That is, the second organic sealing portion 1249 is a sloped portion, and the first organic sealing portion 1249 is a sloped portion. The sealing portion 1248 is a flat portion. At least one of the first channel lines 140 is orthogonally projected onto the base substrate 110 by a second optical fiber. In the orthogonal projection of the organic encapsulation portion 1222 on the base substrate 110 (i.e., the second organic encapsulation portion 1249 or By inserting the second organic sealing portion 1249 (the side away from the display region 112), The number of first channel lines disposed on the flat portion of the encapsulation layer 124 can be reduced, or The first channel line is not provided on the flat portion of the organic sealing layer 124, so that the organic sealing layer 124 The width of the flat portion of the periphery region 114 can be reduced, and the width of the peripheral region 114 can be reduced. As a result, the array substrate can be designed to have a narrow frame or even a frameless display device using the array substrate. This helps to achieve the above.

[0072] In some examples, as shown in FIG. 3, FIG. 4 and FIG. 5, the array substrate 100 includes a second The second stop wall 230 is attached to the base substrate 110 and and is located in the peripheral region 114. The second stop wall 230 is labeled as the first stop wall 130. The second stop wall 230 is located between the region 112 and the third stop wall 230 extending along the first direction. 2, including the top wall 232, and a top wall 232 of the first channel lines 140 projected on the base substrate 110. The third stop wall portion 232 is located on the side closer to the display area 112 of the orthogonal projection on the base substrate 110. Of course, embodiments of the present disclosure include, but are not limited to, this.

[0073] In some examples, as shown in FIGS. 3, 4, and 5, the second edge 1 of the organic encapsulation layer 124 242 may be located on the side of the second stop wall 230 closer to the display area 112. At this time, the orthogonal projection of the first channel line 140 located at the second edge on the base substrate 110 is The three-stop wall portion 232 is located on the side of the base substrate 110 close to the display area 112 for orthogonal projection. It should be understood that the present disclosure includes, but is not limited to, the second edge of the organic sealing layer. The portion extends beyond the second stop wall and is located between the second stop wall and the first stop wall. In this case, the first channel line located at the second edge may be positioned so as to contact the second stop wall or the first stop wall. It may be located between the second stop wall and the first stop wall.

[0074] In some examples, the pixel driving layer may include devices such as thin film transistors. For example, the pixel driving layer may be formed by dividing the active layer into two layers, one located on the base substrate and the other separated from the base substrate. A first gate insulating layer located on the side where the active layer is to be exposed and a second gate insulating layer located on the side where the active layer is to be exposed are provided. a gate insulating layer disposed on a side of the gate that is away from the first gate insulating layer; 2. A source and a drain located on the side of the gate insulating layer away from the gate. The active layer can include a source region, a channel region, and a drain region. The orthogonal projection of the gate on the base substrate is at least partially different from the orthogonal projection of the channel region on the base substrate. The source contacts the source region of the active layer, and the drain contacts the drain region of the active layer. Of course, the specific pixel structure in the pixel driving layer may be any of the conventional designs. In total, pixel driving structures such as 2T1C structure, 7T1C structure, etc. can be referred to.

[0075] For example, the base substrate may be a glass substrate, a polyimide substrate, or other substrate.

[0076] For example, the material of the first gate insulating layer and the second gate insulating layer may be silicon oxide, silicon nitride, or the like. and silicon oxynitride.

[0077] For example, the first inorganic sealing layer 122 and the second inorganic sealing layer 126 are and second stop wall 230, thereby providing the sealing layer with strong water and oxygen isolation capabilities. FIG. 6 is a plan view of another array substrate according to an embodiment of the present disclosure. 7 is a schematic diagram of an array substrate according to an embodiment of the present disclosure, taken along the CC direction in FIG. 6 and 7, the array substrate 100 includes a second stop wall. The second stop wall 230 is disposed on the base substrate 110 and is disposed around the periphery of the base substrate 110. The second stop wall 230 is located in the display area 114. 2, the second stop wall 230 is located between the third stop wall 230 extending along the first direction 232, and at least one first channel of the plurality of first channel lines 140 The orthogonal projection of the loop line 140 on the base substrate 110 is the same as that of the third stop wall portion 232 on the base substrate 110. 0. That is, at least one of the first channel lines 140 is located within the orthogonal projection at Another first channel line 140 is installed in the third stop wall portion 232. At least one of the first channel lines is installed on the third stop wall. By this, the width of the peripheral region of the array substrate can be further reduced, thereby This allows the frame width of a display device using the array substrate to be further reduced, Achieves a narrower frame design.

[0078] It should be noted that at least one first channel line of the plurality of first channel lines is a first When installed on a three-stop wall portion, the first inorganic sealing layer and the second inorganic sealing layer of the sealing layer are The stop wall may be disposed on the side of the stop wall away from the base substrate, and the third stop wall may be disposed on the side of the stop wall away from the base substrate. The first channel line may be disposed on a side of the second inorganic sealing layer away from the base substrate.

[0079] In some examples, as shown in FIG. 7, the plurality of first channel lines 140 may include a third stop. The first stop wall includes a plurality of wall channel lines 146 located in the wall portion 232. The orthogonal projection of the first stop wall channel line 146 on the base substrate 110 is This is the orthogonal projection of the wall portion 232 on the base substrate 110. This allows the following to be achieved in a typical design: Since the first channel lines are all installed on the first flat portion, the second direction of the first flat portion Although the width at Y is large, the first flat channel line in the array substrate according to the embodiment of the present disclosure a first flat portion, a first inclined channel line formed in the first inclined portion, and a first stop wall Since the channel line is formed in the third stop wall portion, the first flat portion must support the third stop wall portion. 1. The number of channel lines is significantly reduced, thereby significantly reducing the width of the first flat portion in the second direction Y. and further reducing the width of the peripheral region of the array substrate in the second direction Y. As a result, a display device using the array substrate can have a narrow frame. This can be done.

[0080] FIG. 8 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the DD direction in FIG. As shown in FIG. 8, the second stop wall 230 is a fourth stop wall extending along the second direction. a second channel wall portion 234 and a second channel of at least one of the plurality of second channel lines 190 The orthogonal projection of the channel line 190 on the base substrate 110 is the base substrate of the fourth stop wall portion 234. In other words, the second channel lines 190 are located within an orthogonal projection on the plate 110. At least one second channel line 190 is located at the fourth stop wall portion 234. At this time, at least one second channel line 190 of the plurality of second channel lines 190 is connected to a fourth switch. By mounting on the top wall, the array substrate can further reduce the width of the peripheral area. This allows the frame width of a display device using the array substrate to be further reduced. This allows for a narrow frame design.

[0081] In some examples, as shown in FIG. 8, the plurality of second channel lines 190 may include a fourth stop. The second stop wall includes a plurality of stop wall channel lines 196 located in the stop wall portion 234. The orthogonal projection of the second stop wall channel line 196 on the base substrate 110 is The wall portion 234 is positioned at an orthogonal projection on the base substrate 110. A second flat channel line in the array substrate is formed on the second flat portion, and a second oblique channel is formed on the second flat portion. a second stop wall channel line is formed in the second sloped portion and a second stop wall channel line is formed in the fourth stop wall portion. This significantly reduces the number of second channel lines that the second flat portion needs to support, and This can reduce the width of the second flat portion in the first direction X, and further reduce the width of the array substrate. The width of the peripheral region in the first direction X can be reduced. The display device used may have a narrow frame.

[0082] Another embodiment of the present disclosure further provides an array substrate. 10 is a schematic plan view of an array substrate according to an embodiment of the present disclosure. 9 and 10 are schematic cross-sectional views taken along the EE direction in the array substrate 9. The plate 100 includes a base substrate 110, a sealing layer 120, a first stop wall 130, and a plurality of second stop walls 130. The base substrate 110 includes a display area 112 and a channel line 140. and a peripheral region 114 located around the display region 1. The encapsulation layer 120 may be divided by a peripheral region 114 and a base substrate 110. For example, the encapsulation layer 120 may be directly attached to the base substrate 110 in some areas. In addition, other film layer structures, such as a light-emitting structure and a light-emitting structure, may be provided between the sealing layer 120 and the base substrate 110. The encapsulation layer 120 may include a circuit structure that drives the light emitting structure so that the light emitting structure emits light. The light emitting structure and the circuit structure formed on the base substrate 110 are sealed to prevent damage to the external environment. The first stopper prevents corrosion of the light-emitting structure and the circuit structure caused by water and oxygen. The first stop wall 130 is disposed on the base substrate 110 and is located in the peripheral region 114. The top wall 130 is formed so that the fluid material in the sealing layer 120 flows into the first stop during the formation of the sealing layer 120. The plurality of first channel lines 14 can be prevented from flowing out of the cup wall 130. 0 is located in the peripheral region 114 and on the side of the sealing layer 120 away from the base substrate 110. Place it.

[0083] As shown in FIGS. 9 and 10, each of the first channel lines 140 extends along a first direction X. The first channel lines 140 are arranged along the second direction Y, and the first stop wall 1 30 includes a first stop wall 132 extending along a first direction X. The sealing layer 120 includes: The organic sealing layer 124 includes an organic sealing layer 124, and an edge portion of the organic sealing layer 124 extending along the first direction X is a first Located between the stop wall 132 and the display area 112, the edge has a first flat portion 1241 and The first channel lines 140 include a first inclined portion 1243. At least a portion of the first channel lines 140 It should be noted that the slope of the first flat portion is less than 1 / 50. The first inclined portion has a gradient greater than 1 / 50. At least a part of the first channel lines is located on the first inclined portion. This means that the projection and the orthogonal projection of the first inclined portion on the base substrate overlap at least locally.

[0084] In the array substrate according to the embodiment of the present disclosure, the organic sealing layer undergoes a leveling process. The array substrate includes a first inclined portion having a thickness gradually decreasing in a peripheral region. By placing the channel line at least locally on the first inclined portion, the array substrate has: The width of the peripheral region can be reduced, thereby improving the overall appearance of the display device employing the array substrate. The frame width can be reduced, thereby enabling a narrow frame design.

[0085] In some examples, as shown in FIGS. 9 and 10, the organic sealing layer 124 is The second edge 1242 extends along the first inclined portion 1243. 42 is located between the first edge 162 and the first stop wall 132 and includes a plurality of first channels At least one of the first channel lines 140 is a positive lead on the base substrate 110. The shadow is located within the orthogonal projection of the second edge 1242 on the base substrate 110. The layout substrate includes a plurality of first channel lines at least locally disposed on the second edge portion. Therefore, the number of first channel lines installed on the first flat portion can be reduced, and the first The first channel line is not provided on the flat portion, thereby reducing the width of the first flat portion and further reducing the circumference. The width of the border region can be reduced.

[0086] In some examples, as shown in FIGS. 9 and 10, the first channel lines 140 include: A plurality of first flat channel lines 142 located on the first flat portion 1241 and the first inclined portion 124 3. That is, the plurality of first flat channel lines 144 are disposed at the first flat channel lines 144. The orthogonal projection of the channel line 142 on the base substrate 110 is 10, the orthogonal projection of the first plurality of inclined channel lines 144 on the base substrate 110. The projection is within the orthogonal projection of the first inclined portion 1243 on the base substrate 110. In the typical design, the first channel lines are all installed on the first flat portion. The width of the first flat portion in the second direction Y is large, but the first flat portion in the array substrate according to the embodiment of the present disclosure A flat channel line is formed in the first flat portion and a first inclined channel line is formed in the first inclined portion. This significantly reduces the number of first channel lines that the first flat portion needs to support, and This can reduce the width of the first flat portion in the second direction Y. The width of the peripheral region in the second direction Y can be reduced. The display device used may have a narrow frame.

[0087] In some examples, as shown in FIGS. 9 and 10, two adjacent first inclined channels The spacing between the lines 144 is greater than the spacing between two adjacent first flat channel lines 142. Since the first slanted channel line is formed on the slanted surface, a patterning process is performed on the conductive film layer. In the process of forming the first flat channel line and the first inclined channel line, If the machine's performance is limited, it is easy to cause underexposure of the first inclined channel line on the slope. As a result, a short circuit occurs between two adjacent first inclined channel lines. In the array substrate, the distance between two adjacent first inclined channel lines is set to be equal to or smaller than the distance between two adjacent first inclined channel lines. By setting the spacing between the first planar channel lines larger than the spacing between the first planar channel lines, the array substrate Various defects such as short circuits caused by insufficient exposure of the first gradient channel line can be avoided.

[0088] In some examples, the spacing between two adjacent first inclined channel lines 144 is The distance between the two first flat channel lines 142 is 1.05 to 2 times the distance between the two first flat channel lines 142. The array substrate avoids the exposure problem by forming the first inclined channel line on the first inclined portion. This can avoid various defects due to exposure problems.

[0089] In some examples, as shown in FIGS. 9 and 10, two adjacent first inclined channels The spacing between the lines 144 is 1.5 times the spacing between two adjacent first flat channel lines 142. The distance between two adjacent first inclined channel lines is set to be equal to or greater than the distance between two adjacent first inclined channel lines. By setting the spacing between the flat channel lines at 1.5 times or more, the array substrate 1. The exposure problem caused by forming the inclined channel line on the first inclined portion can be avoided, This makes it possible to avoid various defects caused by exposure problems.

[0090] For example, a first sloped channel line is formed in the first sloped portion, so that the conductive film layer is patterned. The process for forming the first flat channel line and the first inclined channel line is performed as follows: In this case, if the performance of the exposure machine is limited, it may cause insufficient exposure of the first inclined channel line. This causes a short circuit between two adjacent first inclined channel lines. In the array substrate according to the present invention, the distance between two adjacent first inclined channel lines is set to be equal to or larger than the distance between adjacent first inclined channel lines. By setting the distance between the first two flat channel lines to 1.5 times or more, the array The substrate can avoid a short circuit caused by insufficient exposure of the first inclined channel line.

[0091] In some examples, the first inclined channel lines 144 may include adjacent first inclined channel lines 144. The spacing between the inclined channel lines 144 is 1.05 to 2 times the width of the first inclined channel line 144. The distance between the two adjacent first inclined channel lines is set large, so that the The array substrate avoids the exposure problem by forming the first inclined channel line on the first inclined portion. This makes it possible to avoid various defects due to exposure problems.

[0092] In some examples, as shown in FIGS. 9 and 10, among the plurality of first inclined channel lines , the interval between two adjacent first inclined channel lines 144 is The width of the first inclined channel is 1.5 times the width (i.e., line width) of the first inclined channel. By setting the distance between the channel lines large, the first inclined channel line is This avoids the exposure problems caused by forming the Defects can be avoided.

[0093] In some examples, as shown in FIGS. 9 and 10, the first inclined portion 1243 and the first flat portion 1241 are continuously arranged along the second direction Y, and the first inclined portion 1243 is a first flat portion 1241 on the side closer to the first stop wall portion 132. That is, the first inclined portion and the first The flat portion is a first edge extending along a first direction X, the first edge being formed by leveling the organic sealing layer. The two parts are consecutive parts of the same part.

[0094] In some examples, as shown in FIGS. 9 and 10, the first channel lines 140 That is, the first channel line 140 that is the furthest from the display area 112 is the surface of the first inclined portion 1243. 12. The edge of the display area 112 is located at a position above the first inclined portion 1243. All of the first channel lines 140 (i.e., the first inclined channel lines 144) are provided. This allows the width of the peripheral region of the array substrate to be significantly reduced, This helps to realize a narrow frame design.

[0095] In some examples, as shown in FIG. 10, the sealing layer 120 includes a first inorganic sealing layer 122 and a second inorganic sealing layer 123. The first inorganic sealing layer 122 is disposed on the base substrate 110. The second inorganic sealing layer 126 is formed on the side of the first inorganic sealing layer 122 that is away from the base substrate 110. The organic sealing layer 124 is formed by bonding the first inorganic sealing layer 122 and the second inorganic sealing layer 124 together. This allows the sealing layer to have a strong ability to isolate water and oxygen, This effectively prevents water and oxygen from the external environment from corroding the device encapsulated in the encapsulation layer. It is possible.

[0096] For example, the material of the first inorganic sealing layer and the second inorganic sealing layer may be silicon oxide, silicon nitride or The material of the organic sealing layer may be selected from one or more of organic resins, silicon oxynitrides, and silicon oxynitrides. It may be fat.

[0097] In some examples, as shown in FIG. 9 and FIG. 10, the array substrate 100 has a plurality of touch panels. A touch driving electrode 182, a plurality of touch sensing electrodes 184, and a touch driving signal line 186. , and a touch sensing signal line 188. The touch sensing electrodes 184 are all located in the display area 112 and are formed on the sealing layer 120. The touch drive signal line 186 is located on the side away from the base substrate 110. The touch sensing signal line 18 is connected to the electrode 182 and extends to the peripheral region 114. 8 is connected to each touch sensing electrode 184 and extends to the peripheral region 114. For example, the touch driving signal line 186 and the touch sensing signal line 188 are both in the peripheral region. 114 to a binding region 115 for binding to an external circuit, This allows touch driving, data reception and data processing to be realized. In the array substrate, each of the plurality of first channel lines 140 is a touch driving signal line 186 or This is part of the touch sensing signal line 188.

[0098] For example, as shown in FIGS. 9 and 10, the touch drive signal line 186 is 82 and the arrangement of the plurality of touch drive electrodes 182. A second portion 1862 extending along the column direction and a second portion 1863 extending along the extension direction of the touch drive electrode 182 The first portion 1861 is connected to the touch drive electrode 182. The second portion 1862 is connected to the first portion 1861, and the third portion 1863 is connected to the second portion At that time, the extension direction of each touch drive electrode 182 is the first direction X. The arrangement direction of the plurality of touch driving electrodes 182 is the second direction Y. The line 140 may be a third portion 1863 of the touch drive signal line 186.

[0099] For example, as shown in FIG. 9 and FIG. 10, the touch sensing signal line 188 A fourth portion 1881 extending along the extending direction of the touch sensing electrode 184 and a plurality of touch sensing electrodes and a fifth portion 1882 extending along the arrangement direction of the ring electrodes 184. 1 is connected to the touch sensing electrode 184, and the fifth portion 1882 is connected to the fourth portion 1881. At this time, the extension direction of each touch sensing electrode 184 is the second direction Y. The arrangement direction of the plurality of touch sensing electrodes 184 is the first direction X. The touch sensing signal line 188 may be a fifth portion 1882 of the touch sensing signal line 188. At this time, some of the first channel lines 140 are part of the touch driving signal lines 186, and some of the second channel lines 140 are part of the touch driving signal lines 186. The 1 channel line 140 is part of the touch sensing signal line 188 .

[0100] FIG. 11 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the FF direction in FIG. As shown in FIGS. 9, 10, and 11, the first stop wall 130 is For example, the second stop wall 134 may extend beyond the first stop wall 134. Two first stop walls 132 and two second stop walls 132 are connected to the top wall 132. 134 are interconnected to form a rectangular first stop wall 130 that surrounds the display area 112 .

[0101] In some examples, as shown in FIG. 11, the array substrate 100 includes a plurality of second channels. Each of the second channel lines 190 extends along the second direction. The edge of the sealing layer 124 extending along the second direction is connected to the second stop wall 134 and the display area 136. 112. The edge includes a second flat portion 1246 and a second inclined portion 1247. At least a portion of the second channel lines 190 is located on the second inclined portion 1247. That is, the orthogonal projection of the second channel lines 190 on the base substrate 110 is formed at a second inclination. The oblique portion 1247 at least partially overlaps with the orthogonal projection on the base substrate 110. In the array substrate, the organic sealing layer undergoes a leveling process, which causes the peripheral area The second inclined portion is formed on the second channel line. At least a part of the second channel line has the second inclined portion. By being disposed in the portion, the array substrate reduces the width of the peripheral region in the first direction. This allows the frame width of a display device using the array substrate to be reduced, A narrower frame design can be achieved.

[0102] In some examples, as shown in FIG. 11, the plurality of second channel lines 190 may include a second planar a second flat channel line 192 located at a second inclined portion 1247; and a plurality of second inclined channel lines 194. That is, a plurality of second flat channel lines The orthogonal projection of the line 192 on the base substrate 110 is the second flat portion 1246 on the base substrate 110. In the orthogonal projection, the orthogonal projection of the second plurality of inclined channel lines 194 on the base substrate 110 is: The second inclined portion 1247 is projected onto the base substrate 110. In the above, since the plurality of second channel lines are all installed on the second flat portion, The width in the first direction X of the second flat channel line in the array substrate according to the present embodiment is large. A second inclined channel line is formed in the second inclined portion, thereby forming a second The number of secondary channel lines that the flat section must support is greatly reduced, thereby The width of the support portion in the first direction X can be reduced, and the first The width in the direction can be reduced. As a result, the display device using the array substrate can , may have narrow picture frames.

[0103] In some examples, as shown in FIG. 11, two adjacent second inclined channel lines 194 The spacing between the adjacent second flat channel lines 192 is at least 1.5 times the spacing between the adjacent two second flat channel lines 192. The distance between two adjacent second inclined channel lines is set to be equal to the distance between two adjacent second flat channel lines. By setting the distance between the second inclined channels to 1.5 times or more, the array substrate The exposure problem caused by forming the channel line on the second inclined portion can be avoided, thereby This can avoid various defects caused by exposure problems.

[0104] For example, a second sloped channel line is formed in the second sloped portion, so that the conductive film layer is patterned. The process for forming the second flat channel line and the second inclined channel line is performed. In this case, if the performance of the exposure machine is limited, it may cause insufficient exposure of the second inclined channel line. This causes a short circuit between two adjacent second inclined channel lines. In the array substrate according to the present invention, the interval between two adjacent second inclined channel lines is set to be equal to or larger than the interval between adjacent second inclined channel lines. By setting the distance between the two second flat channel lines to 1.5 times or more, the array The substrate can avoid the short circuit phenomenon caused by insufficient exposure of the second inclined channel line.

[0105] In some examples, as shown in FIG. 11, adjacent ones of the plurality of second inclined channel lines The distance between the two second inclined channel lines 194 is the width ( That is, 1.5 times the line width.

[0106] In some examples, as shown in FIG. 11, the second inclined portion 1247 and the second flat portion 1246 are continuously arranged along the first direction X, and the second inclined portion 1247 is The second inclined portion and the second flat portion are located on the side closer to the second stop wall portion 134. A second edge portion extending along the second direction X is formed by leveling the organic sealing layer. It has two essential parts.

[0107] In some examples, as shown in FIG. 11, the display area of ​​the second channel lines 190 is The second channel line 190, which is the furthest from the display area 112, is located at the second inclined portion 1247. 2. In other words, the upper position of the second inclined portion 1247 is To install the second channel line 190 (i.e., the second inclined channel line 194), This allows the width of the peripheral area of ​​the array substrate to be significantly reduced, This helps to achieve a narrower frame design.

[0108] In some examples, as shown in FIGS. 9 and 11, the touch drive signal lines 186 A first portion 1861 extending along the extension direction of the drive electrode 182 and a plurality of touch drive electrodes A second portion 1862 extending along the arrangement direction of the touch drive electrodes 182 and a second portion 1863 extending along the arrangement direction of the touch drive electrodes 182 The first portion 1861 includes a third portion 1863 extending along the touch drive electrode 1861. 82, the second portion 1862 is connected to the first portion 1861, and the third portion 1863 is connected to the second portion 1862. At that time, the extension direction of each touch drive electrode 182 is The direction of the touch driving electrodes 182 is the first direction X, and the direction of arrangement of the touch driving electrodes 182 is the second direction Y. The channel line 190 may be a second portion 1862 of the touch drive signal line 186.

[0109] It should be noted that in the array substrate shown in FIG. 9, FIG. 10 and FIG. The extension direction of the channel lines (i.e., the first direction) is the extension direction of the touch drive signal lines, and the second The extension direction of the channel lines (i.e., the second direction) is the extension direction of the touch sensing signal lines. However, the above-mentioned Figs. 9, 10 and 11 show the array substrate according to the embodiment of the present disclosure. The embodiment of the present disclosure is not limited to this example. That is, the first direction may be the direction in which the touch sensing signal lines extend, and the second direction may be the direction in which the touch sensing signal lines extend. The extension direction of the panel lines (i.e., the second direction) may be the extension direction of the touch drive signal lines. In addition, the array substrate includes only the first channel line and does not include the second channel line. This is also fine.

[0110] In some examples, as shown in FIGS. 10 and 11, the array substrate 100 includes an organic light emitting device. The organic light emitting element 170 is located in the display area 112 and is sandwiched between the sealing layer 1 and the display area 112. 20 and the base substrate 110. At that time, the encapsulation layer 120 is disposed between the organic light emitting element 17 and the base substrate 110. By sealing the organic light emitting element 170, water and oxygen in the external environment are prevented from corroding the organic light emitting element 170. It can be prevented.

[0111] For example, the organic light emitting device 170 includes an anode 171, an organic light emitting layer 172, and a cathode 173. 73. Of course, the organic light emitting device 170 can include other functional layers, e.g. For example, a hole transport layer, an electron transport layer, etc., may be included in the present disclosure. Omitted.

[0112] 12 is a schematic plan view of another array substrate according to an embodiment of the present disclosure. 13 is a schematic cross-sectional view of an array substrate according to an embodiment of the present disclosure taken along the direction GG in FIG. 12. As shown in FIGS. 12 and 13, the array substrate 100 further includes a second stop wall 230. The second stop wall 230 is disposed on the base substrate 110 and is located in the peripheral region 114. The second stop wall 230 is located between the first stop wall 130 and the display area 112. The second stop wall 230 includes a third stop wall portion 232 extending along the first direction. , the orthogonal projection of the first channel lines 140 on the base substrate 110 is formed by the third stop wall portion 2 32 on the base substrate 110. That is, the first At least a portion of the channel line 140 is disposed in the third stop wall portion 232. At this time, at least a portion of the first channel wires is installed in the third stop wall portion. Thus, the array substrate can further reduce the width of the peripheral region, thereby The frame width of the display device using the array substrate can be further reduced, thereby Achieves a narrow frame design.

[0113] It should be noted that the first channel lines are at least partially connected to the third stop wall. When installed, the first inorganic sealing layer and the second inorganic sealing layer of the sealing layer are disposed on the base of the third stop wall portion. The first channel may be disposed on a side away from the base substrate, and the third stop wall may be disposed on the first channel. The lines may be located on a side of the second inorganic encapsulation layer away from the base substrate.

[0114] In some examples, as shown in FIG. 13, the plurality of first channel lines 140 may include a third string. The top wall portion 232 includes a plurality of first stop wall channel lines 146. The orthogonal projection of the plurality of first stop wall channel lines 146 on the base substrate 110 is The substrate 110 is located at the orthogonal projection of the substrate wall 232. Since the first channel lines are all installed on the first flat portion, Although the width in the two directions Y is large, the first flat channel in the array substrate according to the embodiment of the present disclosure A first flat portion is formed with a first inclined channel line, a first inclined channel line is formed with a first inclined portion, and a first strip line is formed with a first flat portion. A stop wall channel line is formed in the third stop wall portion, which provides support for the first flat portion. The number of first channel lines that need to be connected in the second direction Y of the first flat portion is significantly reduced, thereby The width of the peripheral region of the array substrate in the second direction Y can be significantly reduced. As a result, the display device using the array substrate can have a narrow frame. may have the following structure:

[0115] FIG. 14 is a cross-sectional schematic diagram of an array substrate according to an embodiment of the present disclosure taken along the HH direction in FIG. As shown in FIG. 14, the second stop wall 230 is a second stop wall extending along the second direction. The four-stop wall 234 is provided to prevent the second channel lines 190 from being pushed out from the base substrate 110. The projection at least locally overlaps with the orthogonal projection of the fourth stop wall 234 on the base substrate 110. That is, at least a part of the second channel lines 190 is connected to the fourth stop. At that time, the plurality of second channel lines are at least locally connected to the fourth slot. By mounting on the top wall, the array substrate can further reduce the width of the peripheral area. This allows the frame width of a display device using the array substrate to be further reduced. This allows for a narrow frame design.

[0116] In some examples, as shown in FIG. 14, the plurality of second channel lines 190 may include a fourth The stop wall includes a plurality of second stop wall channel lines 196 located in the stop wall portion 234. , the orthogonal projection of the plurality of second stop wall channel lines 196 on the base substrate 110 is The orthogonal projection of the cap wall 234 on the base substrate 110 is included in the embodiment of the present disclosure. A second flat channel line in the array substrate is formed on the second flat portion, and a second oblique channel is formed on the second flat portion. The second stop wall channel line is formed in the second slope portion and the second stop wall channel line is formed in the fourth stop wall portion. This significantly reduces the number of second channel lines that the second flat portion needs to support, This allows the width of the second flat portion in the first direction X to be reduced, and the array substrate The width of the peripheral region in the first direction X can be reduced. The display employed may have a narrow bezel.

[0117] An embodiment of the present disclosure further provides an array substrate. As shown in FIG. 15, the array substrate is a base substrate 110. a pixel driving layer 150, an organic light emitting element 170, a sealing layer 120, and a plurality of first channels. The base substrate 110 includes a display area 112 and a wiring 140. The pixel driving layer 150 is located on the base substrate 110. The light emitting element 170 is located on the side of the planar layer 160 away from the pixel driving layer 150. The first light emitting element 120 is disposed on the side of the organic light emitting element 170 that is away from the base substrate 110. The channel lines 140 are located in the peripheral region 114 and are connected to the base substrate 110 of the encapsulation layer 120. Each of the first channel lines 140 extends along a first direction X and includes a plurality of The first channel lines 140 are arranged along a second direction Y, and the second direction Y is perpendicular to the first direction X. It should be noted that the pixel driving layer is substantially perpendicular to the corresponding organic light emitting element. The pixel circuit may include a pixel circuit for driving the pixel circuit to emit light. A direction is perpendicular to a first direction if the angle between the first direction and the second direction is equal to 90 degrees. , when the included angle between the first direction and the second direction is greater than 80 degrees and less than 100 degrees; This includes:

[0118] As shown in FIG. 15, the sealing layer 120 is made up of a first inorganic sealing layer 122 and an organic sealing layer 123 which are disposed in sequence. In the peripheral region 114, the display region 112 is provided with a stop layer 124. In the direction of the first inorganic sealing layer 122, the first inorganic sealing portion 1221 and the inorganic sealing portion 1222 are continuously provided. The inorganic sealing connection portion 1223 includes a second inorganic sealing portion 1222. The inorganic sealing connection portion 1223 includes , which is for connecting the first inorganic sealing portion 1221 and the second inorganic sealing portion 1222. In the side region 114, the organic sealing layer 12 is 4 includes a first organic sealing portion 1241 and a second organic sealing portion 1242 disposed in succession, The edge of the second organic sealing portion 1242 away from the display area is the edge of the organic sealing layer 124. The orthogonal projection of the first organic sealing portion 1241 on the base substrate 110 is the same as that of the first inorganic sealing portion 1221. And it overlaps with the orthogonal projection of the inorganic sealing connection portion 1223 on the base substrate 110. The distance d1 between the first inorganic sealing portion 1221 and the base substrate 110 in the direction perpendicular to the second The distance between the inorganic sealing portion 1222 and the base substrate 110 is greater than the distance d2. At least one first channel line 140 of the panel lines 140 is disposed on the base substrate 110. The orthogonal projection falls within the orthogonal projection of the second inorganic sealing portion 1222 on the base substrate 110 .

[0119] In the array substrate according to the embodiment of the present disclosure, the first inorganic sealing portion 1221 and the base substrate 11 0 is greater than the distance d2 between the second inorganic sealing portion 1222 and the base substrate 110. Therefore, the distance between the first organic sealing portion 1241 and the base substrate 110 is suddenly reduced. The organic encapsulation layer 124 undergoes a leveling process, so that the second organic encapsulation portion 1242 is A first inclined portion 1243 whose thickness gradually decreases is formed in the region 114. The base of at least one of the first channel lines 140 The orthogonal projection on the substrate 110 is the orthogonal projection of the second inorganic sealing portion 1222 on the base substrate 110 (i.e., That is, the first inclined portion 1243 or the side of the first inclined portion 1243 away from the display area 112 By this, the first channel line provided on the relatively flat first organic sealing portion 1241 The number of the first channel lines can be reduced, and the first organic sealing portion 1241 can be provided with the first channel lines. This reduces the width of the first organic sealing portion 1241 and further reduces the width of the peripheral region 114. As a result, the array substrate can be used in a display device that employs the array substrate. This helps to realize a narrow frame or frameless design.

[0120] In some instances, the array substrate may be flush with the first stop wall 130, as shown in FIG. The pixel driving layer 150 further includes a flat layer 160. The flat layer 160 is formed from the base substrate 110 of the pixel driving layer 150. The organic light emitting element 170 is located on the side away from the pixel driving layer 150 of the planar layer 160. The first stop wall 130 is located in the peripheral region 114 and is aligned along the first direction. The planar layer 160 includes a first stop wall 132 extending along a first direction. The first edge 162 includes a first edge 162 that is in contact with the first stop wall 132 and the display area 112. The orthogonal projection of the first inorganic sealing portion 1221 on the base substrate 110 is the first edge portion 1 62 on the base substrate 110, the first inorganic sealing portion 1221 and the base substrate 11 0 and the distance d2 between the second inorganic sealing portion 1222 and the base substrate 110. The difference is that the flat layer 160 overlaps the inorganic sealing connection portion 1223 in a direction perpendicular to the base substrate 110. The thickness is greater than or equal to the maximum thickness of the part.

[0121] In some examples, as shown in FIG. 15, the planar layer 160 may include a first sub-planar layer 1601 and a second sub-planar layer 1602. The first sub-planar layer 1601 is the base of the pixel driving layer 150. The second sub-planar layer 1602 is located on the side away from the substrate 110. The first inorganic sealing portion 1221 and the base substrate 1222 are disposed on the side away from the pixel driving layer 150 of the first insulating film 1221. 110, and the distance d between the second inorganic sealing portion 1222 and the base substrate 110 The difference from No. 2 is that the first sub-flat layer 1601 is formed in a direction perpendicular to the base substrate 110. The maximum thickness of the portion overlapping with 1223 and the perpendicularity of the second sub-flat layer 1602 to the base substrate 110 and the maximum thickness of the portion overlapping with the inorganic sealing connection portion 1223 in the other direction.

[0122] In some examples, as shown in FIG. 15, the first channel lines 140 are made of a first organic A plurality of first flat channel lines located on the side of the encapsulation portion 1241 away from the base substrate 110 142, and a plurality of second organic sealing portions 1242 located on the side of the first organic sealing portion 1242 that is away from the base substrate 110. The first inclined channel line 144 includes a first inclined channel line 144. The spacing is greater than the spacing between two adjacent first flat channel lines 142. Since the channel lines are formed on the slope, the conductive film layer is patterned to form the first slope. In the process of forming the flat channel line and the first inclined channel line, the performance of the exposure machine is limited. When the first inclined channel line is exposed, it is easy to cause underexposure of the first inclined channel line on the slope, and furthermore, the adjacent In the array substrate according to the present embodiment, a short circuit occurs between the two first inclined channel lines. The distance between two adjacent first inclined channel lines is then adjusted to the distance between two adjacent first flat channel lines. By setting the spacing between the first and second channel lines larger than the spacing between the first and second channel lines, the array substrate Various defects such as short circuits due to underexposure of lines can be avoided.

[0123] In some examples, the spacing between two adjacent first inclined channel lines 144 is The distance between the two first flat channel lines 142 is 1.05 to 2 times the distance between the two first flat channel lines 142. The array substrate avoids the exposure problem by forming the first inclined channel line on the first inclined portion. This can avoid various defects due to exposure problems.

[0124] For example, the spacing between two adjacent first inclined channel lines 144 is 1.5 times the spacing between the flat channel lines 142. On the other hand, the array substrate 1. The exposure problem caused by forming the inclined channel line on the first inclined portion can be avoided, On the other hand, the array substrate further comprises a space between two adjacent first oblique channel lines. It can be made smaller, allowing more first slope channel lines to be placed in the first slope section. do.

[0125] Of course, embodiments of the present disclosure include, but are not limited to, two adjacent The distance between the first inclined channel lines is the distance between two adjacent first flat channel lines. For example, the spacing between two adjacent first inclined channel lines may be equal to The distance between the first flat channel lines may be equal to the distance between the first slanted channel lines. The line width is greater than the line width of the first flat channel line.

[0126] In some examples, the first inclined channel lines 144 may include adjacent first inclined channel lines 144. The spacing between the inclined channel lines 144 is 1.05 to 2 times the width of the first inclined channel line 144. The distance between the two adjacent first inclined channel lines is set large, so that the The array substrate avoids the exposure problem by forming the first inclined channel line on the first inclined portion. This can avoid various defects caused by exposure problems. In an example, as shown in FIG. 15, the array substrate includes a first sub-flat layer 1601 and a second sub-flat layer 1602. The flat layer 1602 is further provided with a connection electrode 167 disposed between the flat layer 1602 and the first Through holes in the sub-planar layer 1601 allow the drains of the thin film transistors of the pixel driving layer 150 to be 1602, and the anode of the organic light emitting device 170 is connected to the second sub-planar layer 1602 through a through hole in the second sub-planar layer 1602. 16 and is connected to a connection electrode 167 .

[0127] An embodiment of the present disclosure further provides a display device. As shown in FIG. 16, the display device 300 includes the array substrate 1. 00. The organic sealing layer forms a first slope portion in which the thickness is gradually decreased in the peripheral region. The array substrate includes at least one first channel line among a plurality of first channel lines. The side of the first edge away from the display area (i.e., the side of the first inclined portion or the side of the first inclined portion away from the display area) By installing the first channel wires on the first flat section, the number of first channel wires installed on the first flat section is reduced. Further, the first channel line is not provided on the first flat portion, so that the first flat portion The width of the display area can be reduced, and the width of the surrounding area can be reduced. The device can have a narrow frame and include a flexible display and a flexible touch. For details, please refer to the related description of the above embodiment. The explanation will be omitted.

[0128] In some examples, the display device is a mobile phone, a laptop, a tablet computer, The electronic product may be an electronic product having a display function, such as a navigator or an electronic photo stand.

[0129] The following points require further clarification: (1) The drawings of the embodiments of the present disclosure relate only to the structures of the embodiments of the present disclosure and do not include any other structures. For this purpose, reference can be made to conventional designs.

[0130] (2) Where there is no conflict, features in the same and different embodiments of this disclosure may be used interchangeably. can be combined with

[0131] The above are merely specific embodiments of the present disclosure, and the scope of protection of the present disclosure is not limited thereto. Any variations that are easily conceivable by a person skilled in the art within the technical scope disclosed in this disclosure are not included. Any modifications or replacements of the present disclosure should be covered within the scope of protection of the present disclosure. The scope of protection should be according to the scope of protection of the claims.

Claims

1. A base substrate including a display area and a peripheral area located around the display area; a planarization layer located on the base substrate; a sealing layer located on a side of the flat layer away from the base substrate; A first stop wall is located in the peripheral region and extends along a first direction. The top wall and A plurality of insulating layers are disposed in the peripheral region and on a side of the sealing layer away from the base substrate. and each of the first channel lines is aligned along the first direction. The first channel lines are arranged along a second direction, and the second direction is the An array substrate that is substantially perpendicular to a first direction, The sealing layer includes an organic sealing layer, and the planar layer includes a first layer extending along the first direction. the first edge is located between the first stop wall and the display area, The orthogonal projection of the first edge portion on the base substrate is a orthogonal projection of the organic sealing layer on the base substrate. and at least one first channel of the plurality of first channel lines is covered by The orthogonal projection of the first edge of the line on the base substrate is The array substrate is located on the side away from the display area.

2. The organic sealing layer includes a second edge portion extending along the first direction, the second edge portion having: a first stop wall portion and a first channel line portion disposed between the first edge portion and the first stop wall portion; The orthogonal projection of at least one of the first channel lines on the base substrate is The array substrate according to claim 1 , which is located within an orthogonal projection on the base substrate.

3. The first channel lines are located on a side of the first edge portion away from the base substrate. a first flat channel line disposed on a side of the second edge away from the base substrate; a first plurality of slanted channel lines; The interval between two adjacent first inclined channel lines is 3. The array substrate of claim 2, wherein the spacing is greater than the spacing between the channel lines.

4. The interval between two adjacent first inclined channel lines is 4. The array substrate according to claim 3, wherein the spacing is 1.05 to 2 times the spacing between the channel lines.

5. Among the plurality of first inclined channel lines, two adjacent first inclined channel lines The distance between the first inclined channel lines is 1.05 to 2 times the width of the first inclined channel lines. Ray board.

6. a pixel driving layer disposed on the base substrate; an organic light-emitting element located on a side of the planar layer away from the pixel driving layer, The planar layer is located on a side of the pixel driving layer that is away from the base substrate, and the sealing layer is 6. The organic light-emitting element according to claim 1, wherein the insulating layer is located on a side of the organic light-emitting element that is farther from the base substrate.

2. The array substrate according to claim 1 .

7. Among the plurality of first channel lines, one first channel line that is farthest from the display area The line is a part of a ground line and is the furthest of the first channel lines from the display area. The orthogonal projection of one first channel line on the base substrate is a first stop wall portion located between an orthogonal projection on the base substrate and an orthogonal projection on the base substrate of the first stop wall portion; 7. The array substrate according to claim 1, wherein the first and second electrodes are arranged parallel to each other.

8. A plurality of insulating layers are disposed in the display region and on a side of the sealing layer that is away from the base substrate. and a touch drive electrode; A plurality of insulating layers are disposed in the display region and on a side of the sealing layer that is away from the base substrate. A touch sensing electrode; touch drive signal lines connected to each of the touch drive electrodes and extending to the peripheral region; A touch sensing electrode is connected to each of the touch sensing electrodes and extends to the peripheral region. and a signal line; At least some of the first channel lines of the plurality of first channel lines are According to any one of claims 1 to 7, the touch sensing signal line is a part of the signal line or the touch sensing signal line. Array board.

9. The first stop wall includes a second stop wall portion extending along the second direction, The array substrate is further comprising a plurality of second channel lines extending along the second direction; The planar layer includes a third edge portion extending along the second direction, the third edge portion being A positive stop wall is disposed between the second stop wall and the display area, and the positive stop wall is disposed on the base substrate at the third edge. The projection is covered by a orthogonal projection of the organic sealing layer on the base substrate, and the plurality of second The orthogonal projection of at least one second one of the channel lines on the base substrate is The third edge portion is located on a side away from the display area. Array substrate.

10. A plurality of insulating layers are disposed in the display region and on a side of the sealing layer that is away from the base substrate. and a touch drive electrode; A plurality of insulating layers are disposed in the display region and on a side of the sealing layer that is away from the base substrate. A touch sensing electrode; touch drive signal lines connected to each of the touch drive electrodes and extending to the peripheral region; A touch sensing electrode is connected to each of the touch sensing electrodes and extends to the peripheral region. and a signal line; Each of the plurality of touch sensing electrodes extends along the first direction. The sensing electrodes are arranged along the second direction and are connected to the first channel lines. At least a part of the first channel lines are part of the touch sensing signal lines; Each of the plurality of touch drive electrodes extends along the second direction. The electrodes are arranged along the first direction and are connected to at least a portion of the second channel lines.

10. The array substrate of claim 9, wherein the second channel line is a part of the touch driving signal line. 。

11. The organic sealing layer includes a fourth edge portion extending along the second direction, the fourth edge portion having: a second stop wall portion disposed between the third edge portion and the second stop wall portion, The orthogonal projection of at least one of the second channel lines on the base substrate is The array substrate according to claim 9 , located within an orthogonal projection on the base substrate.

12. The second channel lines are located on a side of the third edge portion away from the base substrate. a plurality of second flat channel lines disposed on a side of the fourth edge away from the base substrate; and a plurality of second slanted channel lines, The interval between two adjacent second inclined channel lines is 12. The array substrate of claim 11, wherein the spacing is greater than the spacing between the channel lines.

13. The interval between two adjacent second inclined channel lines is 13. The array substrate of claim 12, wherein the spacing is 1.05 to 2 times the spacing between the channel lines.

14. Among the plurality of second inclined channel lines, two adjacent second inclined channel lines The distance between the first inclined channel lines is 1.05 to 2 times the width of the first inclined channel lines. Array substrate.

15. a second stop wall disposed on the base substrate and located in the peripheral region; fruit, The second stop wall is located between the first stop wall and the display area, and the second The stop wall includes a third stop wall portion extending along the first direction, The base of at least one of the plurality of first channel lines. The orthogonal projection of the third stop wall on the substrate is located within the orthogonal projection of the third stop wall on the base substrate. Item 15. The array substrate according to any one of items 1 to 14.

16. a second stop wall disposed on the base substrate and located in the peripheral region; fruit, The second stop wall is located between the first stop wall and the display area, and the second The stop wall includes a third stop wall portion extending along the first direction, The orthogonal projection of the first channel lines on the base substrate is 16. Any one of claims 1 to 15, which is located on the side closer to the display area of ​​the orthogonal projection on the base substrate. Array substrate according to claim 1.

17. The organic light emitting device includes anodes and cathodes which are sequentially stacked in a direction away from the base substrate.

17. The array substrate according to claim 1, comprising: a light-emitting layer; and a cathode.

18. The sealing layer is a first inorganic sealing layer located on a side of the organic light-emitting element away from the base substrate; a second inorganic sealing layer located on a side of the organic sealing layer away from the first inorganic sealing layer; Including, The first inorganic sealing layer and the second inorganic sealing layer cover the first stop wall, and the organic The sealing layer is interposed between the first inorganic sealing layer and the second inorganic sealing layer, and the first channels are The channel line is located on a side of the second inorganic sealing layer that is farther from the base substrate.

18. An array substrate according to any one of claims 17 to 17.

19. A display device comprising the array substrate according to any one of claims 1 to 18.

20. A base substrate including a display area and a peripheral area located around the display area; a pixel driving layer disposed on the base substrate; an organic light-emitting device located in the pixel driving layer; an encapsulation layer including a first inorganic encapsulation layer and an organic encapsulation layer disposed in sequence on the organic light emitting device; A stop layer, A plurality of insulating layers are disposed in the peripheral region and on a side of the sealing layer away from the base substrate. and a first channel line, each of the first channel lines extending along a first direction. The first channel lines are arranged along a second direction, and the second direction is the first An array substrate that is substantially perpendicular to the direction In the peripheral region, the first inorganic sealing layer is A first inorganic sealing portion, an inorganic sealing connection portion, and a second inorganic sealing portion are continuously provided in the direction the inorganic sealing connection portion is configured to connect the first inorganic sealing portion and the second inorganic sealing portion. It is structured as follows: In the peripheral region, the organic sealing The sealing layer includes a first organic sealing portion and a second organic sealing portion that are disposed continuously, and the second organic sealing portion The edge of the stopper away from the display area is the edge of the organic sealing layer, and the first organic The orthogonal projection of the sealing portion on the base substrate is the base of the first inorganic sealing portion and the inorganic sealing connection portion. The orthogonal projection of the second organic sealing portion on the base substrate overlaps with the orthogonal projection of the second organic sealing portion on the base substrate. The inorganic sealing portion overlaps with an orthogonal projection on the base substrate, In a direction perpendicular to the base substrate, The distance d1 is greater than the distance d2 between the second inorganic sealing portion and the base substrate, At least one of the first channel lines is disposed on the base substrate. The orthogonal projection is an array substrate located within the orthogonal projection of the second inorganic encapsulating portion on the base substrate.

21. a first stop wall portion located in the peripheral region and extending along the first direction; One stop wall and a planar layer located on a side of the pixel driving layer away from the base substrate; The planar layer includes a first edge extending along the first direction, the first edge being The first inorganic sealing portion and the inorganic sealing connection portion are located between the first stop wall portion and the display area. an orthogonal projection of the portion on the base substrate overlaps with an orthogonal projection of the first edge portion on the base substrate; A distance d1 between the first inorganic sealing portion and the base substrate, and a distance d2 between the second inorganic sealing portion and the The difference between the distance d1 and the base substrate is the distance d2 between the flat layer and the base substrate.

21. The array substrate according to claim 20, wherein the thickness is equal to or greater than the maximum thickness of a portion overlapping the inorganic sealing connection portion.

22. The planarization layer is a first sub-planar layer located on a side of the pixel driving layer away from the base substrate; a second sub-planar layer located on a side of the first sub-planar layer away from the pixel driving layer; fruit, A distance d1 between the first inorganic sealing portion and the base substrate, and a distance d2 between the second inorganic sealing portion and the The difference between the distance d2 between the first sub-flat layer and the base substrate is the distance d1 between the first sub-flat layer and the base substrate. The maximum thickness of the portion overlapping the inorganic sealing connection portion and the second sub-flat layer on the base substrate 22. The method according to claim 21, wherein the thickness of the inorganic sealing connection portion is greater than or equal to the sum of the thickness of the inorganic sealing connection portion and the maximum thickness of the portion overlapping the inorganic sealing connection portion in the vertical direction. The array substrate described herein.

23. The first channel lines are disposed on a side of the first organic sealing portion that faces away from the base substrate. a plurality of first planar channel lines disposed on the second organic encapsulation portion and spaced apart from the base substrate; a plurality of first slanted channel lines located on a side of the first slanted channel line; The interval between two adjacent first inclined channel lines is 23. The array substrate according to claim 20, wherein the distance between the channel lines is greater than the distance between the channel lines. 。

24. The interval between two adjacent first inclined channel lines is 24. The array substrate of claim 23, wherein the spacing is 1.05 to 2 times the spacing between the channel lines.

25. Among the plurality of first inclined channel lines, two adjacent first inclined channel lines 24. The method of claim 23, wherein the spacing between the first inclined channel lines is 1.05 to 2 times the width of the first inclined channel lines. Array board.

26. A display device comprising the array substrate according to any one of claims 20 to 25.

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