Semiconductor layer device

Abstract

To provide a semiconductor device including an oxide semiconductor and having excellent electric characteristics.SOLUTION: A semiconductor device includes an oxide semiconductor film and an insulating film on a substrate. A side surface of the oxide semiconductor film is in contact with the insulating film. The oxide semiconductor film includes a channel formation region and a region containing a dopant formed with the channel formation region therebetween. The semiconductor device includes a gate insulating film formed on and in contact with the oxide semiconductor film, a gate electrode formed on the gate insulating film and including a side wall insulating film, and a source electrode and a drain electrode formed in contact with the oxide semiconductor film and the insulating film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device having a circuit including a semiconductor element such as a transistor, and a method for manufacturing the same. For example, power devices mounted on power circuits, memories, thyristors, converters, Semiconductor integrated circuits including image sensors, electro-optical devices such as liquid crystal display panels, The present invention relates to electronic equipment incorporating a light-emitting display device having light-emitting elements as a component.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, light-emitting display devices, semiconductor circuits, and electronic devices are all semiconductor devices. It is. [Background technology]

[0003] As typified by liquid crystal display devices, transistors formed on glass substrates are amorphous. It is made of amorphous silicon, polycrystalline silicon, etc. Although the resulting transistor has low field-effect mobility, it can be fabricated on a large glass substrate. In addition, the field effect mobility of a transistor using polycrystalline silicon is high, but the size of the transistor is large. However, it has the disadvantage that it is difficult to fabricate on a glass substrate.

[0004] A transistor using an oxide semiconductor is manufactured in place of a transistor using silicon. Technologies that can be applied to electronic and optical devices are attracting attention. For example, oxide semiconductors Then, transistors were fabricated using zinc oxide and In-Ga-Zn-O oxide, and a display device was The technology used for the switching element of the pixel is disclosed in Patent Document 1 and Patent Document 2. There are.

[0005] Incidentally, it has been pointed out that hydrogen is a carrier source, particularly in oxide semiconductors. Therefore, it is necessary to take measures to prevent hydrogen from being mixed in when the oxide semiconductor is formed. In addition to the oxide semiconductor, water in the gate insulating film in contact with the oxide semiconductor is also required. By reducing the amount of element, it is possible to reduce the fluctuation of the threshold voltage (see Patent Document 3). ). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A [Patent Document 3] JP 2009-224479 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, in a transistor including an oxide semiconductor, the oxide semiconductor When the surface and side surfaces of the film are exposed to a reduced pressure atmosphere, oxygen in the oxide semiconductor film is released. In the oxide semiconductor film, oxygen defects (also referred to as oxygen vacancies) are formed. In the area where oxygen vacancies are formed, carriers flow more easily, and the transistor's semiconductor This causes a problem of high leakage current between the source and drain. Oxygen defects are formed in the semiconductor film, making it easier for carriers to flow, resulting in the transistor The threshold voltage shifts in the negative direction.

[0008] In this manner, oxygen defects are formed in the oxide semiconductor film, The electrical properties are degraded.

[0009] In view of the above, one embodiment of the present invention is to provide a transistor including an oxide semiconductor having good electrical characteristics. An object of the present invention is to provide a favorable transistor and a manufacturing method thereof. [Means for solving the problem]

[0010] One embodiment of the present invention is a method for manufacturing a transistor including an oxide semiconductor film. In order to prevent oxygen from being released from the conductive film, an oxygen A specific embodiment will be described below.

[0011] One embodiment of the present invention is a method for manufacturing a semiconductor device having an oxide semiconductor film and an insulating film over a substrate, the method comprising: The oxide semiconductor film is in contact with the insulating film, and the oxide semiconductor film is a channel formation region. a region including a dopant formed on the oxide semiconductor film; a gate insulating film; and a gate electrode having a sidewall insulating film formed on the gate insulating film. a source electrode and a drain electrode formed in contact with the oxide semiconductor film and the insulating film; The semiconductor device has the following features.

[0012] Another embodiment of the present invention is a method for manufacturing a semiconductor device including an oxide semiconductor film and an insulating film over a substrate. The side surface of the oxide semiconductor film is in contact with an insulating film. A first region including a dopant is formed on either side of the first region including a dopant. a second region including a dopant formed on and in contact with the oxide semiconductor film; and a gate insulating film formed on the gate insulating film and having a sidewall insulating film. A source electrode and a drain electrode formed in contact with the oxide semiconductor film and the insulating film. and a sidewall insulating film. and a second region including a dopant formed on both sides of the first region including a dopant. The semiconductor device is characterized in that the dopant concentrations in the regions of 1 and 2 are different from each other. be.

[0013] The concentration of the dopant in the first region containing the dopant is greater than the concentration of the dopant in the second region containing the dopant. It is preferable that the concentration of the dopant is lower than that of the dopant of the first dopant.

[0014] Another embodiment of the present invention is a method for manufacturing a semiconductor device including an oxide semiconductor film and an insulating film over a substrate. The side surface of the oxide semiconductor film is in contact with an insulating film. a region including a dopant formed on and in contact with the oxide semiconductor film; and a gate insulating film formed on the gate insulating film and having a sidewall insulating film. The electrode, the sidewall insulating film, the oxide semiconductor film, and the sawtooth formed in contact with the insulating film. The semiconductor device has a source electrode and a drain electrode.

[0015] Another embodiment of the present invention is a method for manufacturing a semiconductor device including an oxide semiconductor film and an insulating film over a substrate. The side surface of the oxide semiconductor film is in contact with an insulating film. A first region including a dopant is formed on either side of the first region including a dopant. a second region including a dopant formed on and in contact with the oxide semiconductor film; and a gate insulating film formed on the gate insulating film and having a sidewall insulating film. A semiconductor device formed in contact with a sidewall insulating film, an oxide semiconductor film, and an insulating film a source electrode and a drain electrode, and a sidewall insulating film is formed in the oxide semiconductor film. A first region including a dopant overlapping the film and a second region including a dopant contacting the source electrode and the drain electrode. The first region and the second region each have a different dopant concentration. It is a semiconductor device.

[0016] The concentration of the dopant in the first region containing the dopant is greater than the concentration of the dopant in the second region containing the dopant. It is preferable that the concentration of the dopant is lower than that of the dopant of the first dopant.

[0017] The source electrode or the drain electrode has a first conductive film and a second conductive film. It is preferable that the conductive film is in contact with the sidewall insulating film. , it is preferable that the thickness of the second conductive film is thinner than that of the first conductive film.

[0018] The insulating film is preferably an insulating film from which oxygen is released by heat treatment. The insulating film from which oxygen is released by the above reaction is one containing more oxygen than the oxygen that satisfies the stoichiometric ratio. By providing such an insulating film in contact with the oxide semiconductor film, During the heat treatment, oxygen is released from the insulating film and can be diffused into the oxide semiconductor film. This can reduce oxygen defects in the oxide semiconductor film.

[0019] Examples of insulating films from which oxygen is released by heat treatment include silicon oxide and silicon oxynitride. , silicon oxide nitride, aluminum oxide, aluminum oxide nitride, gallium oxide, halide Examples of suitable oxides include fluorine oxide and yttrium oxide.

[0020] The oxide semiconductor contains one or more elements selected from the group consisting of In, Ga, Sn, and Zn. It is preferable.

[0021] Here, the oxide semiconductor is CAAC-OS (C Axis Aligned Crystal It is preferable to use an alline oxide semiconductor film. Effect of the Invention

[0022] The structure according to one embodiment of the present invention can reduce oxygen defects in an oxide semiconductor film. As a result, the negative shift of the threshold voltage of the transistor can be reduced. It also reduces leakage currents at the source and drain of transistors and oxide semiconductors. This reduces the leakage current on the side of the semiconductor film. The electrical properties can be improved. [Brief description of the drawings]

[0023] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 3] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7]1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A and 1B are a cross-sectional view and a circuit diagram illustrating a semiconductor device of one embodiment of the present invention. [Figure 14] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 15] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A and 1B are a cross-sectional view and a circuit diagram illustrating a semiconductor device of one embodiment of the present invention. [Figure 17] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Figure 19] FIG. 1 is a block diagram of an electronic device according to one embodiment of the present invention. [Figure 20] FIG. 1 is a block diagram of an electronic device according to one embodiment of the present invention. [Figure 21] FIG. 1 is a block diagram of an electronic device according to one embodiment of the present invention. [Figure 22] 1 is an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] The present invention will be described in detail with reference to the drawings. and the like, without departing from the spirit and scope of the present invention, It will be readily understood by those skilled in the art that the above may be modified in various ways. The present invention described below should not be construed as being limited to the description of the embodiment. In the configuration of the present invention, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings. These are commonly used between the different surfaces, and their repeated explanation will be omitted.

[0025] In each figure described in this specification, the size, thickness, or area of ​​each component is not clearly indicated. may be exaggerated for clarity and are not necessarily limited to scale .

[0026] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The above is not a numerical limitation. For example, "the first" can be changed to The terms can be replaced with "second" or "third" as appropriate for explanation.

[0027] (Embodiment 1) In this embodiment, a structure of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. I will use this to explain.

[0028] FIG. 1 is a top view and a cross-sectional view of a transistor 200. FIG. 1(B) is a cross-sectional view corresponding to the dashed line A1-A2 in FIG. 1(A); FIG. 1C is a cross-sectional view corresponding to the dashed line B1-B2 in FIG. 1A. To avoid complication, some of the components of transistor 200 (e.g., The gate insulating film 114a, the insulating film 118a, the sidewall insulating films 124a and 124b, 13, the insulating film 130, the insulating film 132, etc. are omitted.

[0029] The transistor 200 shown in FIG. 1 includes an insulating film 102a provided on a substrate 100 and an insulating film The oxide semiconductor film 106a is provided over the oxide semiconductor film 102a. A gate insulating film 114a and a sidewall insulating film 12 formed on the gate insulating film 114a. A gate electrode 116a having the gate electrodes 4a and 124b is formed in contact with the oxide semiconductor film 106a. The conductive films 128a and 128b are made of a so-called The gate electrode 116a functions as a source electrode and a drain electrode. Further, an insulating film 130 and an insulating film 8a are provided so as to cover the transistor 200. A veneer 132 is provided.

[0030] In addition, in the transistor 200 illustrated in FIG. 1, a Thus, an insulating film 102a, an insulating film 110a, and a gate insulating film 114a are formed. In addition, an insulating film 112a is provided in contact with the insulating film 110a. The insulating film in contact with 106a is preferably an insulating film from which oxygen is released by heat treatment. .

[0031] In this specification, the term "oxygen is released by heat treatment" refers to TDS (Thermal Desorption) Thermal Desorption Spectroscopy (TDA) Analysis The amount of oxygen released, converted to oxygen atoms, is 1.0 x 10 18 atoms / cm 3 That's all, Preferably 3.0 x 10 20 atoms / cm 3 This means that the above is the case.

[0032] Here, we will explain how to measure the amount of oxygen released in terms of oxygen atoms using TDS analysis. This is explained below.

[0033] The amount of gas desorbed during TDS analysis is proportional to the integral value of the spectrum. The amount of gas released is calculated based on the ratio of the integral value of the film spectrum to the reference value of the standard sample. The reference value of the standard sample is the integral of the spectrum of the sample containing a specific atom. is the ratio of the atomic density to the value.

[0034] For example, the results of a TDS analysis of a silicon wafer containing a standard sample of hydrogen with a given density, From the results of TDS analysis of the insulating film, the amount of oxygen molecules desorbed from the insulating film (N O2 ) is expressed by the following formula 1 Here, the spectrum detected at mass number 32 obtained by TDS analysis can be calculated as follows: We assume that all of the molecules are oxygen molecules. However, they are unlikely to exist and are not considered here. For oxygen molecules containing oxygen atoms with mass numbers of 17 and 18, It is not taken into consideration because its presence in nature is extremely small.

[0035] N O2 =N H2 / S H2 ×S O2 ×α (Formula 1)

[0036] N H2 is the density of hydrogen molecules desorbed from the standard sample. H2 is a standard test The integral value of the spectrum obtained when the sample was subjected to TDS analysis. H2 / S H2 Let us assume that S O2is the integral value of the spectrum obtained by TDS analysis of the insulating film. α is a coefficient that affects the spectral intensity in the TDS analysis. For details of Equation 1, For details, see Japanese Patent Application Laid-Open No. 6-275697. The amount of oxygen released from the insulating film is A thermal desorption analyzer EMD-WA1000S / W manufactured by Electron Science Corporation was used to measure the standard sample and 1×10 16 atoms / cm 3 The measurement was performed using a silicon wafer containing hydrogen atoms. .

[0037] In addition, some of the oxygen is detected as oxygen atoms in the TDS analysis. The ratio of the oxygen molecules can be calculated from the ionization rate of the oxygen molecules. Since the ionization rate of oxygen molecules is included in the calculation, the amount of oxygen atoms released can be evaluated. It is possible to estimate even if

[0038] In addition, N O2 is the amount of oxygen molecules released. In the case of an insulating film, when converted to oxygen atoms, The amount of released oxygen is twice the amount of desorbed oxygen molecules.

[0039] In the above, the insulating film from which oxygen is released by heat treatment is silicon oxide (S iO X (X>2)) or silicon oxide (SiO X (X>2) It contains more than twice as many oxygen atoms as silicon atoms per unit volume. The number of silicon atoms and oxygen atoms per volume was measured by Rutherford backscattering spectrometry. This is the value.

[0040] In general, in an oxide semiconductor film, some of the oxygen defects become donors and generate electrons that are carriers. This can cause the threshold voltage of the transistor to shift in the negative direction. In addition, when oxygen defects occur on the side surface of the oxide semiconductor film, the resistance of the side surface is reduced, and the oxide semiconductor There is a risk of leakage current occurring between the source and drain electrodes via the side surfaces of the film.

[0041] In view of this, in one embodiment of the present invention, a thin film is formed in contact with the side surface of the oxide semiconductor film 106a by heat treatment. An insulating film from which oxygen is released is provided. This allows oxygen to be released from the insulating film during heat treatment. is released, diffuses (or is supplied) into the oxide semiconductor film 106a, and Therefore, the decrease in resistance of the side surface of the oxide semiconductor film 106a can be suppressed. Therefore, the leakage current between the source electrode and the drain electrode can be suppressed. This can be done.

[0042] Examples of insulating films from which oxygen is released by heat treatment include silicon oxide and silicon oxynitride. , silicon oxide nitride, aluminum oxide, aluminum oxide nitride, gallium oxide, halide For example, fluorine oxide, yttrium oxide, etc. can be used.

[0043] In addition, aluminum oxide has the property of being difficult to transmit oxygen. is provided in the vicinity of the oxide semiconductor film 106a. Oxygen diffuses from the insulating film that is provided in contact with 06a and from which oxygen is released by heat treatment. This can prevent the occurrence of such problems.

[0044] For example, the insulating film 110a may be an insulating film from which oxygen is released by heat treatment, typically an oxide film. A silicon film is used as the insulating film 112a, and a film that is difficult for oxygen to pass through, typically aluminum oxide, is used. As described above, the insulating film 1 in contact with the oxide semiconductor film 106a can be used. By using an insulating film from which oxygen is released by heat treatment as the oxide semiconductor film 106a The insulating film 112a in contact with the insulating film 110a can diffuse (or supply) oxygen to the insulating film 112a. By using a film that is difficult for oxygen to permeate as the insulating film 110a and the oxide semiconductor film 1 It is possible to prevent oxygen from being released to the outside from 06a.

[0045] In addition, by providing the insulating film 110a on the side surface of the oxide semiconductor film 106a, The side surface of the conductive film 106a is not in contact with the source electrode and the drain electrode. Therefore, the source electrode and the drain electrode can be formed through the side surface of the oxide semiconductor film 106a. Therefore, the occurrence of leakage current between the first and second electrodes can be further suppressed.

[0046] As the gate insulating film 114a, an insulating film from which oxygen is released by heat treatment, typically A silicon oxide film can be used. This allows oxygen to be diffused into the oxide semiconductor film 106a. By dispersing (or supplying) oxygen, oxygen defects in the oxide semiconductor film 106a can be compensated for. Therefore, the interface state between the gate insulating film 114a and the oxide semiconductor film 106a is reduced, and The charges generated due to the operation of the gate insulating film 114a and the oxide semiconductor film 10 Therefore, the threshold voltage is reduced. This suppresses the shift in the negative direction, thereby suppressing the deterioration of the transistor's electrical characteristics. It is possible.

[0047] The oxide semiconductor film 106a is made of at least In, Ga, Sn, and Zn. A metal oxide containing one or more elements is used. A typical example is a quaternary metal oxide, In- Sn-Ga-Zn-O metal oxides and ternary metal oxides such as In-Ga-Zn-O Metal oxides, In-Sn-Zn-O metal oxides, In-Al-Zn-O metal oxides, Sn-Ga-Zn-O metal oxide, Al-Ga-Zn-O metal oxide, Sn-Al- Zn-O-based metal oxides, binary metal oxides such as In-Zn-O-based metal oxides, and Sn- Zn-O based metal oxides, ZnO, SnO, InO, etc. can be used. The metal oxide may include silicon oxide.

[0048] Here, for example, the In-Ga-Zn-O-based material is a material containing indium (In), gallium (G a) means an oxide containing zinc (Zn), and the composition ratio is not particularly limited. In addition, the oxide may contain elements other than indium, gallium, and zinc. In the semiconductor film, it is preferable to have an excess of oxygen relative to the stoichiometric ratio. By using the above-mentioned method, generation of carriers due to oxygen defects in the oxide semiconductor film can be suppressed. can be done.

[0049] Note that the metal oxide used for the oxide semiconductor film 106a has an energy gap of 2 eV. The energy is preferably 2.5 eV or more, and more preferably 3 eV or more. By using a metal oxide having a wide energy gap for the oxide semiconductor film 106a, The off-current of the transistor can be reduced.

[0050] The oxide semiconductor film 106a may be single crystal, polycrystalline (also referred to as polycrystalline), or amorphous. etc.

[0051] It is preferable that the oxide semiconductor film 106a be a CAAC-OS (C Axis Aligned-Oxide Semiconductor Film). d Crystalline Oxide Semiconductor) film.

[0052] The CAAC-OS film is neither completely single crystalline nor completely amorphous. The oxide semiconductor film has a crystalline-amorphous mixed phase structure in which a crystalline portion is included in an amorphous phase. The crystal portion is often small enough to fit within a cube with one side less than 100 nm. Transmission Electron Microscope (TEM) In the observation image by a microscope, the boundary between the amorphous and crystalline parts in the CAAC-OS film was In addition, the grain boundaries in the CAAC-OS film were not clearly observed by TEM. Therefore, the CAAC-OS film is not characterized by electron transfer caused by grain boundaries. The decrease in mobility is suppressed.

[0053] The crystal parts in the CAAC-OS film have c-axes that are normal vectors to the surface on which the CAAC-OS film is formed. The triangle is aligned parallel to the normal vector of the ab plane and perpendicular to the ab plane. The metal atoms are arranged in a layered or hexagonal shape when viewed perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. The orientation of the a and b axes may be different. In this specification, when it is simply described as vertical, it means that The range of 5° to 95° is also included. This also includes the range from 1° to 5°.

[0054] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be higher near the surface than near the growth surface. By adding impurities to the AC-OS film, the crystalline part becomes amorphous in the impurity-added region. It may also be pawned.

[0055] The c-axis of the crystal part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The CAAC-OS film shape (the shape of the film on which the film is formed) is Depending on the cross-sectional shape of the surface or the cross-sectional shape of the surface, the directions may differ from each other. The c-axis direction of the crystal part is the normal direction to the surface on which the CAAC-OS film is formed. The crystals are formed by or after the deposition of the film. The film is formed by subjecting the film to a crystallization treatment such as a heat treatment.

[0056] The electrical characteristics of transistors using CAAC-OS films change when exposed to visible or ultraviolet light. Therefore, the transistor has high reliability.

[0057] The oxide semiconductor film 106a has a concentration of 5×10 18 atoms / cm 3 Contains the following nitrogen: This may also be the case.

[0058] Here, the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor film 106a is is 1 x 10 18 atoms / cm 3 Less than 2×10, more preferably 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When the semiconductor material bonds with the semiconductor body, carriers can be generated, causing an increase in the off-state current of the transistor. This is because:

[0059] Furthermore, the oxide semiconductor film 106a has a hydrogen concentration of 5×10 18 atoms / cm 3 less than, Preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 atom s / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 It is preferable to do the following: Due to the bond between the oxide semiconductor and hydrogen, some of the hydrogen becomes a donor and is transported as a carrier. Therefore, it is desirable to reduce the hydrogen concentration in the oxide semiconductor film. By reducing the hydrogen concentration in the oxide semiconductor film, the threshold voltage of a transistor can be reduced. It is possible to suppress a shift in the negative direction.

[0060] The oxide semiconductor film 106a has a channel formation region 122 and a The dopant-containing regions 120a and 120b are formed on either side of the dopant-containing regions 120a and 120b. The regions 120a and 120b function as source and drain regions. The regions 120a and 120b containing nitrogen, phosphorus, arsenic, or other group 15 elements, boron, Group 13 elements such as uranium and aluminum, hydrogen, helium, neon, argon, krypton, Alternatively, at least one dopant of xenon is contained.

[0061] In the oxide semiconductor film 106a, the regions 120a and 120b containing the dopant The dopant concentration is 5×10 18 atoms / cm3 More than 1×10 22 atoms / c m 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 19 atoms / c m 3 Less than.

[0062] In the oxide semiconductor film 106a, the regions 120a and 120b containing the dopant The carrier density or defects increase because of the inclusion of dopants. The regions 120a and 120b are doped with dopant (channel forming region 122). However, if the dopant concentration is increased too much, the dopant The dopants impede the movement of carriers, and the dopant-containing regions 120a and 120b This will reduce the conductivity of the material.

[0063] The dopant-containing regions 120a, 120b have a conductivity of 1×10 6 Ω / sq. or more 1×1 0 8 It is preferable to set it to Ω / sq. or less.

[0064] The oxide semiconductor film 106a has regions 120a and 120b containing a dopant. As a result, the electric field applied to the end of the channel formation region 122 can be reduced. Therefore, the short channel effect of the transistor can be suppressed.

[0065] The transistor 200 illustrated in FIG. 1 includes an insulating film 106a in contact with a side surface of the oxide semiconductor film 106a. As a result, a sole portion is formed on the side surface of the oxide semiconductor film 106a. Since the source electrode and the drain electrode are not in contact with each other, the resistance of the side surface of the oxide semiconductor film 106a is reduced. This makes it possible to suppress the occurrence of leakage current between the source electrode and the drain electrode. In addition, since the source electrode and the drain electrode do not overlap with the gate electrode 116a, To reduce the parasitic capacitance generated between the gate electrode 116a and the drain electrode and between the gate electrode 116a and the drain electrode. This enables high-speed operation of the transistor. In the channel formation region of 06a, the hydrogen concentration can be reduced, For example, the off-current at room temperature (25°C) can be reduced to 10zA (1zA (zeptoampere) is 1 x 10 -21 A) The following can be done. As a result, the electrical characteristics of the transistor 200 can be improved.

[0066] In FIG. 1, the conductive films 128a and 128b and the sidewall insulating films 124a and 124b are Although not in contact with each other, the conductive films 128a and 128b and the sidewall insulating films 124a and 124b may be in contact.

[0067] Next, a transistor 210 having a structure partially different from that of the transistor 200 shown in FIG. This will be described with reference to FIG.

[0068] FIG. 2 is a top view and a cross-sectional view of a transistor 210. FIG. 2(B) is a cross-sectional view corresponding to the dashed line A1-A2 in FIG. 2(A). FIG. 2C is a cross-sectional view corresponding to the dashed line B1-B2 in FIG. 2A. In (A), in order to avoid complication, some of the components of the transistor 210 (e.g., For example, the gate insulating film 114a, the insulating film 118a, the sidewall insulating films 124a and 124b , insulating film 130, insulating film 132, etc.) are omitted.

[0069] The transistor 210 shown in FIG. 2 includes an insulating film 102a provided on a substrate 100 and an insulating film The oxide semiconductor film 106a is provided over the oxide semiconductor film 102a. A gate insulating film 114a and a sidewall insulating film 12 formed on the gate insulating film 114a. A gate electrode 116a having sidewall insulating films 124a and 124b. b and conductive films 126a and 126b formed in contact with the oxide semiconductor film 106a. In addition, a conductive film 128a is formed on the conductive film 126a, and a conductive film 128b is formed on the conductive film 126b. The conductive films 126a and 126b are formed on the source electrode 126a. and drain electrodes, or the conductive film 126a and the conductive film 128a, The conductive film 126b and the conductive film 128b function as a source electrode and a drain electrode. An insulating film 118a is provided on the gate electrode 116a. Furthermore, an insulating film 130 and an insulating film 132 are provided so as to cover the transistor 210. do.

[0070] In the transistor 210 illustrated in FIG. As the insulating film, an insulating film 102a, an insulating film 110a, and a gate insulating film 114a are formed. In addition, an insulating film 112a is provided so as to contact the insulating film 110a. The insulating film in contact with the semiconductor film 106a is an insulating film from which oxygen is released by heat treatment. is preferred.

[0071] The transistor 210 shown in FIG. 2 is different from the transistor 200 shown in FIG. 1 in that The sidewall insulating films 124a and 124b and the oxide semiconductor film 106a are The conductive film 126a and the conductive film 126b are provided. The thickness of the conductive film 126b is preferably smaller than that of the conductive film 128a and the conductive film 128b.

[0072] Conductive films 126a and 126b, which function as a source electrode and a drain electrode, are formed on the side walls of the By providing the insulating film 124a and the insulating film 124b in contact with each other, Even if a mask misalignment occurs, the surface of the oxide semiconductor film 106a is covered with the conductive film 126a and the In addition, the mask misalignment can be prevented from causing a breakdown in the electrical characteristics of the transistor. Furthermore, when forming the source electrode and the drain electrode, This is preferable because the oxide semiconductor film 106a is not exposed to the etching gas.

[0073] In this embodiment, the opposing regions of the source electrode and the drain electrode are rectangular. The transistor has been used for the explanation, but the opposing regions of the source electrode and the drain electrode may be appropriately U-shaped. The transistor with such a structure can be formed in a shape of a letter C, etc. This makes it possible to increase the on-current.

[0074] (Embodiment 2) In this embodiment, a method for manufacturing the transistor illustrated in FIGS. 1 and 2 will be described with reference to FIGS. 7 will be used to explain.

[0075] First, a method for manufacturing the transistor 200 shown in FIG. 1 will be described below with reference to FIGS. explain.

[0076] First, an insulating film 102 is formed on a substrate 100, and then an oxide semiconductor film 1 is formed on the insulating film 102. 04 (see Figure 3(A)).

[0077] There is no particular restriction on the material of the substrate 100, but it should be at least strong enough to withstand the subsequent heat treatment. It is necessary to have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, surface treatment substrate, etc. A fiber substrate or the like may be used as the substrate 100. Also, silicon, silicon carbide, etc. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium It is also possible to use an SOI substrate, etc., on which a semiconductor element is provided. The resulting material may be used as the substrate 100 .

[0078] A flexible substrate may be used as the substrate 100. A peeling layer may be provided. The peeling layer is formed after a semiconductor device is partially or entirely completed thereon. The semiconductor device can be separated from the substrate 100 and transferred to another substrate. The device can be transferred to substrates with poor heat resistance or flexible substrates.

[0079] The insulating film 102 is formed by a sputtering method, a CVD method, or the like. It is preferable that the insulating film be an insulating film from which oxygen is released by heat treatment. The insulating film to be used should contain more oxygen than the stoichiometric ratio. The insulating film from which oxygen is released by heat treatment is preferably This allows oxygen to be diffused (or supplied) to an oxide semiconductor film that is to be formed later. The insulating film 102 may be made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , aluminum oxide, aluminum oxynitride, gallium oxide, hafnium oxide, yttrium oxide The insulating film 102 can be formed by a sputtering method. This makes it possible to form an insulating film from which oxygen is easily released by heat treatment, which is preferable. .

[0080] The insulating film 102 has a thickness of 50 nm or more and 800 nm or less, preferably 200 nm or more and 500 nm or less. By forming the insulating film 102 thick, the amount of oxygen released from the insulating film 102 is reduced. In addition, the insulating film 102 can be formed at the interface with the oxide semiconductor film to be formed later. It is possible to reduce the interface states in the semiconductor device.

[0081] The insulating film 102 may have a single-layer structure or a multi-layer structure. For example, a silicon oxide film may be provided as a single layer. Alternatively, the insulating film may be formed by laminating an aluminum oxide film or a silicon nitride oxide film and a silicon oxide film. The aluminum oxide film and the silicon nitride oxide film may function as a blocking film. As a result, impurities contained in the substrate 100 can be removed by the aluminum oxide film and the Since the silicon nitride oxide film can be used to block the oxide film that is formed later, It is possible to prevent impurities from being mixed into the semiconductor film. A case where the insulating film 102 is formed using a Kon film will be described.

[0082] When the insulating film 102 is formed by a sputtering method, oxygen gas or Alternatively, a mixture of oxygen and a rare gas may be used. By increasing the temperature, the amount of oxygen contained in the insulating film 102 can be increased. Typically, the oxygen concentration in the film forming gas is set to 6% or more and 100% or less.

[0083] When a silicon oxide film is formed as the insulating film 102, quartz (preferably synthetic quartz) is used. The substrate temperature is 30°C or higher and 450°C or lower (preferably 70°C or higher and 200°C or lower). ), and the distance between the substrate and the target (TS distance) is set to 20 mm or more and 400 mm or less (preferred or 40 mm or more and 200 mm or less), and the pressure is 0.1 Pa or more and 4 Pa ​​or less (preferably 0 0.2 Pa or more and 1.2 Pa or less), and high frequency power supply of 0.5 kW or more and 12 kW or less (preferably 1kW or more and 5kW or less), and the O2 / (O2+Ar) ratio in the deposition gas is 1% or more and 100% or more. It is preferable to use an RF sputtering method as the lower limit (preferably 6% or more and 100% or less). It is preferable to use a silicon target instead of a quartz (preferably synthetic quartz) target. The deposition gas may contain only oxygen.

[0084] The oxide semiconductor film 104 is formed by a sputtering method, a coating method, a printing method, a pulsed laser deposition method, or the like. Here, the oxide semiconductor film 104 can be formed by a sputtering method. Therefore, the film is formed to a thickness of 1 nm or more and 50 nm or less, preferably 3 nm or more and 30 nm or less.

[0085] Next, a sputtering apparatus for forming the oxide semiconductor film 104 will be described in detail.

[0086] The deposition chamber for depositing the oxide semiconductor film 104 had a leakage rate of 1×10 -10 Pa·m 3 / It is preferable that the time is set to 10 seconds or less. This prevents the metal from being mixed into the film when the film is formed by the sputtering method. The inclusion of impurities including hydrogen can be reduced.

[0087] In order to reduce the leak rate, it is necessary to reduce not only external leaks but also internal leaks. External leaks occur when gas enters the vacuum system from outside due to a small hole or poor seal. Internal leaks are caused by leakage from partitions such as valves in the vacuum system or internal Caused by gas released from components. Leak rate is 1×10 -10 Pa·m 3 / sec or less To achieve this, it is necessary to take measures against both external and internal leaks.

[0088] To reduce external leakage, it is recommended to seal the opening and closing parts of the deposition chamber with a metal gasket. Metal gaskets are coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal material that has high adhesion compared to O-rings. In addition, the use of iron fluoride, aluminum oxide, chromium oxide, etc. By using passive metal materials such as iron, aluminum, and chrome coated with metal gas, The release of gases, including hydrogen, from the skewer is suppressed, and internal leaks can also be reduced. .

[0089] The materials that make up the inner walls of the deposition chamber are aluminum and chromium, which emit less gas, including hydrogen. , titanium, zirconium, nickel or vanadium. Also, the above materials may be replaced with iron, It may be used by coating an alloy material containing chromium and nickel. The alloy material containing nickel is rigid, heat-resistant, and easy to process. If the surface roughness of the component is reduced by polishing or other methods to reduce the surface area, the amount of gas released will decrease. Alternatively, the above-mentioned film forming apparatus components can be replaced with iron fluoride, aluminum oxide, chlorine oxide, etc. It may be a passive metal such as iron, aluminum, chromium, etc., coated with chromium or the like.

[0090] Furthermore, a sputtering gas refiner can be installed just before the sputtering gas is introduced into the deposition chamber. In this case, the length of the piping from the refiner to the film-forming chamber is 5 m or less, preferably 1 m or less. By keeping the length of the piping to 5m or less or 1m or less, the effect of gas released from the piping is reduced. The reverberation can be reduced depending on the length.

[0091] The deposition chamber is evacuated by a roughing pump such as a dry pump, a sputter ion pump, and a turbo pump. It is advisable to use a suitable combination of a sub-pump and a high vacuum pump such as a cryopump. While a turbomolecular pump is excellent at pumping large molecules, it has a low ability to pump hydrogen or water. Therefore, we developed a cryopump with high pumping capacity for water and a sputter ion pump with high pumping capacity for hydrogen. Combining pumps is effective.

[0092] The adsorbates present inside the deposition chamber are adsorbed to the inner wall and do not affect the pressure in the deposition chamber. However, this causes gas emission when the deposition chamber is evacuated. Therefore, the leak rate and the exhaust speed are Although there is no correlation, use a pump with high exhaust capacity to remove as much of the adsorbed matter as possible from the deposition chamber. It is important to evacuate the deposition chamber beforehand. Baking is also possible. Baking increases the desorption rate of adsorbed substances by about 10 times. Baking can be performed at temperatures between 100°C and 450°C. By removing adsorbed substances while introducing gas, water and other substances that are difficult to remove by exhausting alone can be removed. The speed can be further increased.

[0093] In this manner, in the process of forming the oxide semiconductor film 104, it is preferable to form the insulating film 102. In the process, the pressure in the deposition chamber, the leak rate in the deposition chamber, etc. are controlled by using hydrogen gas. By suppressing the inclusion of impurities as much as possible, impurities including hydrogen can be prevented from being mixed into the oxide semiconductor film 104. In addition, the inclusion of hydrogen from the insulating film 102 into the oxide semiconductor film 104 can be reduced. The diffusion of impurities including

[0094] Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water. Defects are formed in the lattice from which oxygen has been removed (or in the area from which oxygen has been removed). In order to prevent this, impurities including hydrogen are extremely reduced in the process of forming the oxide semiconductor film. It is important to reduce defects in the oxide semiconductor film by using hydrogen. The impurities contained in the oxide semiconductor film are removed as much as possible, and the highly purified oxide semiconductor film is used as a channel formation region. By using the same, the reliability of the transistor can be improved.

[0095] In the sputtering method, the power supply for generating plasma is an RF power supply, A A C power supply unit, a DC power supply unit, etc. can be used as appropriate.

[0096] The oxide semiconductor film 104 is made of at least one selected from the group consisting of In, Ga, Sn, and Zn. Such an oxide semiconductor film contains, for example, a quaternary metal oxide, In. -Sn-Ga-Zn-O metal oxides and ternary metal oxides such as In-Ga-Zn-O Metal oxides, In-Sn-Zn-O metal oxides, In-Al-Zn-O metal oxides , Sn-Ga-Zn-O metal oxide, Al-Ga-Zn-O metal oxide, Sn-Al -Zn-O based metal oxides, binary metal oxides such as In-Zn-O based metal oxides, Sn -Zn-O based metal oxides, Zn-O based metal oxides, Sn-O based metal oxides, etc. The oxide semiconductor film 104 can be formed by using a GaN film containing In and Ga. Elements other than Sn and Zn, for example, SiO2, may be included.

[0097] For example, an In-Ga-Zn-O oxide semiconductor is a semiconductor that contains indium (In), gallium (G a) It means an oxide semiconductor containing zinc (Zn), regardless of the composition ratio.

[0098] The oxide semiconductor film has the chemical formula InMO3(ZnO) m A thin film expressed as (m>0) Here, M is one selected from Zn, Ga, Al, Mn and Co. Or it represents multiple metal elements. For example, M represents Ga, Ga and Al, Ga and Mn , or Ga and Co.

[0099] When using an In-Ga-Zn-O-based material as an oxide semiconductor, an example of the target is The metal oxide composition is In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. A target of In2O3:Ga2O3:ZnO=1:1:2 can be used. A target having a composition ratio of [molar ratio] or In2O3:Ga2O3:ZnO= A target with a composition ratio of 1:1:4 [molar ratio], In2O3:Ga2O3:Zn A target having a composition ratio of O=2:1:8 [molar ratio] can also be used.

[0100] In addition, when using an In-Zn-O-based material as an oxide semiconductor, the composition of the target used The composition ratio is In:Zn=50:1-1:2 in atomic ratio (In2O3 In:ZnO=25:1 to 1:4, preferably In:Zn=20:1 to 1:1 (molar ratio) In terms of In2O3:ZnO=10:1 to 1:2), more preferably In:Zn=1 5:1 to 1.5:1 (converted to a molar ratio of In2O3:ZnO = 15:2 to 3:4) For example, the target used for forming an In-Zn-O oxide semiconductor has an atomic ratio of When In:Zn:O=X:Y:Z, Z>1.5X+Y.

[0101] The sputtering gas is a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas atmosphere. A mixed gas of hydrogen and oxygen is used as the sputtering gas. It is preferable to use high purity gases from which contaminants have been removed.

[0102] Note that the insulating film 102 and the oxide semiconductor film 104 are preferably formed in succession. After the insulating film 102 is formed, the oxide semiconductor film 104 is formed without exposing the insulating film 102 to the air. This can reduce adhesion of hydrogen to the interface between the oxide semiconductor film 102 and the oxide semiconductor film 104. Alternatively, the insulating film 102 may be formed in a multi-chamber sputtering apparatus having a heating device. The insulating film 102 is heated by a heating device to remove hydrogen, and then an oxygen gas is applied to the insulating film 102. A compound semiconductor film 104 may be formed.

[0103] Next, the substrate 100 is subjected to heat treatment to release hydrogen from the oxide semiconductor film 104. The oxygen contained in the insulating film 102 is then transferred to the oxide semiconductor film 104, the insulating film 102, and the oxide semiconductor film 104. The hydrogen is diffused near the interface with the conductive film 104. As a result, as shown in FIG. Moreover, the oxide semiconductor film 106 in which oxygen defects are reduced can be formed.

[0104] The temperature of the heat treatment is set so that hydrogen is released from the oxide semiconductor film 104 and the insulating film 102 is The temperature at which oxygen contained in the oxide semiconductor film 104 is released and diffused into the oxide semiconductor film 104 is preferably set to 100° C. For example, the temperature is 150° C. or higher and lower than the substrate distortion point, preferably 250° C. or higher and 450° C. or lower, and more preferably Or, the temperature should be 300°C or higher and 450°C or lower.

[0105] The heat treatment is performed using an RTA (Rapid Thermal Anneal) device. By using an RTA device, the temperature of the substrate 100 can be increased to or above the distortion point for a short period of time. Therefore, hydrogen can be released from the oxide semiconductor film 104 and In addition, the time required for oxygen to diffuse from the insulating film 102 to the oxide semiconductor film 104 can be shortened. .

[0106] The heat treatment can be carried out in an inert gas atmosphere, for example, helium, neon, or argon. It is preferable to carry out the treatment in an atmosphere of a rare gas such as xenon or krypton, or in a nitrogen atmosphere. The treatment may be performed in a vacuum atmosphere or a reduced pressure atmosphere. The treatment time is 3 minutes to 24 hours.

[0107] Oxygen defects in the oxide semiconductor film act as donors, generating electrons that serve as carriers. By performing heat treatment in a state where the oxide semiconductor film 104 covers the insulating film 102, Since oxygen contained in the oxide semiconductor film 106 diffuses into the oxide semiconductor film 104, the oxygen contained in the oxide semiconductor film 106 In addition, the insulating film 102 can be formed by covering the oxide semiconductor film 104. Since the surface of the insulating film 102 is not exposed, oxygen desorbed from the insulating film 102 This allows the oxide semiconductor film 104 to be efficiently diffused. To reduce oxygen defects in the film and interface states between the insulating film 102 and the oxide semiconductor film 106. can be done.

[0108] In addition, in the deposition process of the oxide semiconductor film 104, the pressure in the deposition chamber and the leak rate in the deposition chamber In the above, the inclusion of impurities including hydrogen is suppressed as much as possible, so that the insulating film 102 and It is possible to reduce the amount of impurities including hydrogen contained in the oxide semiconductor film 104. Diffusion of impurities including hydrogen from the film 102 to the oxide semiconductor film 104 can be reduced. Moreover, the heat treatment can reduce the hydrogen concentration in the oxide semiconductor film 104. In a compound semiconductor, some of the hydrogen atoms become donors and carriers due to their bonds with hydrogen. Therefore, electrons are generated during the deposition process of the oxide semiconductor film 104 and the subsequent heating process. In the process, impurities, typically hydrogen, are significantly reduced, thereby preventing defects in the oxide semiconductor film. It is possible to reduce defects.

[0109] Next, a mask is formed over the oxide semiconductor film 106, and then the oxide semiconductor film 106 is The insulating film 104 is selectively etched to form an island-shaped oxide semiconductor film 106a and an insulating film 10 Form 2a (see FIG. 3(C)).

[0110] The mask for etching the oxide semiconductor film 106 and the insulating film 102 is a photolithographic mask. A lithography process, an inkjet method, a printing method, or the like can be appropriately used. The conductive film 106 can be etched by wet etching or dry etching. Alternatively, wet etching and dry etching may be used in combination. It is preferable to etch the end of the semiconductor film 106a so that it has a tapered shape. When a photolithography process is used, etching is performed while the resist mask is being recessed. A tapered shape can be formed by

[0111] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. can be used.

[0112] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, e.g. For example, chlorine (Cl2), boron chloride (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride ( Also, a gas containing fluorine (a fluorine-based gas, for example, tetrafluoride) is preferable. Carbon (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane Hydrogen bromide (HBr), methane (CH4), oxygen (O2), Gas containing rare gases such as helium (He) and argon (Ar) is used. It is possible.

[0113] As dry etching, parallel plate type RIE (Reactive Ion Etch) ng) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. Etching conditions (power applied to the coil-type electrode, power applied to the substrate-side electrode, The temperature of the electrode on the substrate side, etc. are adjusted appropriately.

[0114] The dry etching conditions are, for example, ICP 45 W, Bias 100 W, and pressure 1.9. Pa, the etching gas is a mixture of BCl3 and Cl2, and the flow rate is BCl3 / C l2=60sccm / 20sccm. By adopting these conditions, the oxidation After the semiconductor film 106 is formed in an island shape, the insulating film 102 is selectively removed to leave the insulating film 102a. The etching is performed so as not to include impurities including hydrogen. It is desirable.

[0115] The depth to which the insulating film 102 is removed depends on the film thickness of the insulating film 102. When the film thickness of 102 is 450 nm, it is preferable to remove 100 nm.

[0116] After this, the mask is removed. Note that if a remover is used to remove the mask, the oxide Since oxygen may be desorbed from the side surface of the semiconductor film 106a, the mask is removed by A shingle may also be used.

[0117] When the oxide semiconductor film is selectively etched, for example, the oxide When the side surface of the semiconductor film is exposed to plasma containing chlorine radicals, fluorine radicals, etc., oxide Metal atoms exposed on the side surface of the semiconductor film are bonded to chlorine radicals, fluorine radicals, and the like. At this time, the metal atom is bonded to a chlorine atom or a fluorine atom and then released. The oxygen atom that was bonded to the metal atom becomes active. The active oxygen atom easily reacts. Therefore, oxygen defects are likely to occur on the side surfaces of the oxide semiconductor film.

[0118] When the side surface of the oxide semiconductor film exposed by the etching process is active, the etching process can be performed in a reduced pressure atmosphere or In the heat treatment in a reducing atmosphere or even a reduced pressure atmosphere, oxygen is removed and the oxide semiconductor is Oxygen defects occur on the side of the conductor film. Some of these oxygen defects become donors and carriers. In order to generate electrons, the side surface of the oxide semiconductor film becomes n-type.

[0119] The source and drain electrodes of the transistor are in contact with the side surfaces of the n-type oxide semiconductor film. By this, a leak is formed between the source electrode and the drain electrode via the side surface of the oxide semiconductor film. This leakage current causes an increase in the off-state current of the transistor. In addition, the current flowing through the side surface of the oxide semiconductor film may be generated by the oxide semiconductor film. It is possible to form a transistor having a channel region on the side surface of the semiconductor substrate.

[0120] Next, the insulating film 110 and the insulating film 111 are formed on the insulating film 102a and the oxide semiconductor film 106a. The insulating film 110 and the insulating film 112 are formed (see FIG. 3(D)). As with 102, it is preferable to form the insulating film using an insulating film from which oxygen is released by heat treatment. The insulating film 110 and the insulating film 112 are formed by the same method as that for forming the insulating film 102. When the insulating film 110 and the insulating film 112 are formed, In order to reduce the amount of oxygen desorbed from the side surface of the oxide semiconductor film 106a, the insulating film 110 and the insulating The deposition temperature of the insulating film 112 is preferably as low as possible, and more preferably, the deposition temperature is room temperature. stomach.

[0121] For example, silicon oxide is used as the insulating film 110, and aluminum oxide is used as the insulating film 112. Alternatively, aluminum oxide can be used as the insulating film 110. Silicon oxide may be used as the insulating film 112. However, one embodiment of the present invention is not limited to this structure. Alternatively, the insulating film 110 or the insulating film 112 may have a single layer structure.

[0122] An insulating layer is formed in contact with the side surface of the oxide semiconductor film 106a and from which oxygen is released when heat is applied. By providing the film 110, oxygen defects are generated on the side surface of the oxide semiconductor film 106a. However, oxygen contained in the insulating film 110 is released by a subsequent heat treatment, and the oxide The surface where the semiconductor film 106a and the insulating film 110 are in contact with each other and the oxide semiconductor film 106 in the vicinity of the surface In this way, oxygen can be supplied to the oxide semiconductor film 106a. In order to reduce oxygen defects on a surface where the oxide semiconductor film 106a is formed, typically on a side surface of the oxide semiconductor film 106a, can be done.

[0123] Next, the insulating film 112 is planarized to form an insulating film 112a (FIG. 3( The planarization process is performed by chemical mechanical polishing. Polishing (CMP method), dry etching or wet etching This can be done by etching such as chipping, or by combining polishing and etching. Here, the case where the insulating film 112 is planarized by CMP processing will be described. The planarization process of the insulating film 112 is performed when the insulating film 110 is exposed or when the surface of the insulating film 110 is Note that the thickness of the oxide semiconductor film 106a is set to be several nm to several tens of nm. Since the oxide semiconductor film 106a is thin, the oxide semiconductor film 106a is not removed by a planarization treatment. is desirable.

[0124] The conditions for the CMP process on the insulating film 112 are, for example, a polyurethane polishing cloth and a slurried polishing cloth. Silica-based slurry liquid (particle size 60 nm) as the chemical liquid for supply, slurry flow rate 100 ml / min to 500ml / min, polishing pressure 0.005MPa to 0.08MPa , spindle speed 20 rpm to 50 rpm, table speed 20 rpm to 50 rpm or less, and the processing time can be 0.2 min.

[0125] Next, the exposed portion of the insulating film 110 is removed to expose the surface of the oxide semiconductor film 106a. As a result, the insulating film 110a is formed (see FIG. 4(A)). The oxide semiconductor film 106a is removed by etching. It is necessary to adopt etching conditions with a high selective ratio of 0. After the removal of the oxide semiconductor film 106a, the surface of the oxide semiconductor film 106a is planarized. The electrical characteristics of the capacitor can be improved.

[0126] Dry etching conditions are, for example, ICP 500W, Bias 50W, and pressure 1.5 Pa, the etching gas is a mixture of CF4 and O2, and the flow rate is CF4 / O2=7 By adopting such conditions, the insulating film 110 The insulating film 110a can be formed by selectively removing the oxide semiconductor film 10. During etching, the removal of the impurities containing hydrogen can be suppressed. It is preferable to do this so that no impurities are included.

[0127] Here, heat treatment may be performed. By performing the heat treatment, the oxide semiconductor film 106a Impurities including hydrogen can be removed. As a result, oxygen contained in the insulating film 112a is released, and the oxide semiconductor film 106a and Since oxygen can be supplied to the surface where the insulating film 102a and the insulating film 110a are in contact with each other, Therefore, oxygen defects in the interface between the oxide semiconductor film 106a and the insulating film can be reduced. Cut.

[0128] Next, the insulating film 114 is formed on the oxide semiconductor film 106a and the insulating film 112a (FIG. 4(B)). Like the insulating film 102, the insulating film 114 is formed by desorbing oxygen through heat treatment. The insulating film 114 is preferably formed using an insulating film made of hafnium silicon. Cate (HfSiO x ), nitrogen-doped hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), hafnium oxide By using high-k materials such as yttrium oxide, gate leakage can be reduced. Cut.

[0129] The insulating film 114 can be formed by a method similar to that for forming the insulating film 102. The thickness of the insulating film 114 is preferably 1 nm or more and 300 nm or less, and more preferably The thickness of the insulating film 114 is preferably greater than or equal to 5 nm and less than or equal to 50 nm. In order to reduce the amount of oxygen desorbed from the surface of the film 106a, the deposition temperature of the insulating film 114 is set as low as possible. It is desirable to form the film at the lowest possible temperature, preferably at room temperature.

[0130] Next, after the conductive film 116 is formed, the insulating film 118 is formed (see FIG. 4C). The conductive film 116 is formed by using a sputtering method, a CVD method, a vapor deposition method, or the like. 6 is selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten. The above-mentioned metal elements, alloys containing the above-mentioned metal elements, or combinations of the above-mentioned metal elements In addition, it can be formed by using an alloy of manganese or zirconium. One or more selected metal elements may be used.

[0131] The conductive film 116 may have a single-layer structure or a stacked structure of two or more layers. Single-layer structure of aluminum film containing com, and double-layer structure of titanium film laminated on aluminum film A two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film a two-layer structure in which a tungsten film is laminated on a tantalum nitride film; A three-layer structure in which an aluminum film is layered on the titanium film, and a titanium film is then formed on top of that. In addition, aluminum is mixed with titanium, tantalum, tungsten, molybdenum, and chromium. A film of an element selected from the group consisting of chromium, neodymium, and scandium, or an alloy film made by combining multiple elements; Alternatively, a nitride film may be used.

[0132] The conductive film 116 is made of indium tin oxide or indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium oxide, indium zinc oxide, indium with silicon oxide added A conductive material having a light-transmitting property, such as zinc tin oxide, can also be used. A laminated structure of a conductive material having optical properties and the above metal element may also be used.

[0133] In addition, a nitrogen oxide film is formed between the insulating film 114 and the conductive film 116 as a material film in contact with the insulating film 114. In-Ga-Zn-O film containing nitrogen, In-Sn-O film containing nitrogen, In-Ga aO film, nitrogen-containing In-Zn-O film, nitrogen-containing Sn-O film, nitrogen-containing In It is preferable to provide a -O film or a metal nitride film (InN, ZnN, etc.). eV, preferably 5.5 eV or more, and the threshold voltage of the electrical characteristics of the transistor The voltage can be made positive, and a so-called normally-off switching element can be realized. For example, when an In-Ga-Zn-O film containing nitrogen is used, at least one oxide semiconductor film In-Ga-Zn-O film containing a higher nitrogen concentration than 06a, specifically 7 atomic % or more of nitrogen is used.

[0134] The insulating film 118 can be formed using a material and a film formation method similar to those of the insulating film 102. The thickness of the insulating film 118 is set to be greater than or equal to 10 nm and less than or equal to 150 nm. The insulating film 118 is formed using a silicon oxynitride film.

[0135] Next, a mask is formed on the insulating film 118, and the conductive film 116 and the insulating film 118 are etched. As a result, a gate electrode 116a and an insulating film 118a are formed (see FIG. 4(D)). The mask formed on 118 can be formed by a printing method, an inkjet method, or a photolithography method. In addition, the gate electrode 116a and the insulating film 118a are formed by the method described above. After that, the mask is removed. By forming the insulating film 118a, the source Therefore, it is possible to prevent the drain electrode from being short-circuited with the gate electrode 116a. can.

[0136] The conductive film 116 and the insulating film 118 are etched by wet etching or dry etching. Wet etching and dry etching can be used in combination. In order to etch the conductive film 116 and the insulating film 118 into a desired shape, Etching conditions (etching gas, etching solution, etching time, temperature, etc.) are adjusted according to the material. ) is set appropriately. However, in order to process the transistor channel length (L) minutely, It is preferable to use dry etching.

[0137] The etching gas used for dry etching of the insulating film 118 is, for example, hexafluoride. Fluorine such as sulfur (SF6), nitrogen trifluoride (NF3), and trifluoromethane (CHF3) Gas containing hydrogen or a mixture of carbon tetrafluoride (CF4) and hydrogen can be used. Noble gases (helium (He), argon (Ar), xenon (Xe)), carbon monoxide, or Carbon dioxide or the like may be added. , boron chloride, silicon chloride, carbon tetrachloride and other chlorine gases, carbon tetrafluoride, sulfur fluoride, Fluorine-based gases such as nitrogen fluoride, oxygen, etc. can be used appropriately.

[0138] Next, a process for adding a dopant to the oxide semiconductor film 106a is performed to form a region containing the dopant. The gate electrode 116a and the insulating film 120b are formed (see FIG. 5(A)). By adding dopants using 118a as a mask, dopants are self-aligned. The regions 120a, 120b include dopants added thereto, and the regions 120a, 120b include dopants not added thereto. Therefore, a small region (channel formation region 122) can be formed.

[0139] As a method for adding a dopant to the oxide semiconductor film 106a, an ion doping method, an ion implantation method, Ion implantation, or plasma immersion ion implantation The dopant to be added may be nitrogen, phosphorus, or arsenic. Group 15 elements such as uranium, Group 13 elements such as boron and aluminum, hydrogen, helium, and neon At least one of argon, krypton, and xenon is selected. Since the gate electrode 116a and the insulating film 118a act as a mask, the region to which the dopant is added is The dopant-containing regions 120a and 120b, which are the dopant-containing regions, and the channel forming region 122 are self-assembled. It can be formed by aligning.

[0140] Furthermore, the dopant can be added by ion doping, ion implantation, Or a method other than injection using the plasma immersion ion implantation method, etc. For example, a plasma is generated in a gas atmosphere containing the added element. By performing plasma treatment on the material to be doped, it is possible to dope the dopant. The plasma can be generated by a dry etching device or a plasma CVD device. A high-density plasma CVD apparatus or the like can be used.

[0141] As the condition for doping, for example, when the dopant is nitrogen, the acceleration voltage is 20 kV. In addition, when the dopant is phosphorus, the acceleration voltage is set to 40 kV. The dose of nitrogen or phosphorus is 1.0 μm or more, depending on the thickness and material of the gate insulating film 114a formed in step 1. ×10 15 ions / cm 2 In the following cases, it is preferable to carry out heat treatment at less than 450°C. This reduces the sheet resistance to 1×10 in the regions 120a and 120b containing the dopant. 7 The dose can be reduced to 5×10 14 ions / cm 2 5×10 or more 15 ions / cm 2 If it is less than 450℃, heat treatment should be performed at 450℃ or more and 600℃ or less. This is preferably performed in the regions 120a and 120b containing the dopants. The port resistance is 1×10 5 Ω / sq. or less. Furthermore, the dose is 5×10 15 ions / cm 2 In the above cases, it is preferable to perform heat treatment at a temperature higher than 600°C. This reduces the sheet resistance to 1×1 in the regions 120a and 120b containing the dopant. 0 5 Ω / sq. or less.

[0142] By reducing the sheet resistance in the regions 120a and 120b containing the dopant, The on-state current and field-effect mobility of the transistor can be improved.

[0143] Next, the insulating films 112a and 112b, the oxide semiconductor film 106a, the insulating film 118a, and the like are The insulating film 124 is formed so as to cover the insulating film 10 (see FIG. 5B). It can be formed using the same materials and film formation methods as those for 2. For example, a silicon nitride film A laminated structure in which a silicon oxide film is formed on the first insulating film may also be adopted. The insulating film 124 employs a single layer structure of a silicon oxide film.

[0144] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 45° C. or lower. 0°C or less, preferably 250°C to 325°C. Or, 250°C to 325°C. Alternatively, the temperature may be gradually increased until the

[0145] By performing the heat treatment, the oxide semiconductor film 106a is removed from the insulating film in contact with the oxide semiconductor film 106a. Oxygen diffuses into the oxide semiconductor film 106a, and the surface of the oxide semiconductor film 106a that is in contact with the insulating film and the surface in the vicinity of the surface It is possible to reduce oxygen defects. In addition, the resistance of the regions 120a and 120b containing the dopants is After the heat treatment, the region 12 containing the dopant can be reduced. 0a, 120b may be in a crystalline or amorphous state.

[0146] Next, the insulating film 124 is subjected to highly anisotropic etching to form a sidewall insulating film. 124a and 124b are formed (see FIG. 5(C)).

[0147] Next, a conductive film 128 is formed (see FIG. 6A). , titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tin The material used is a metal such as aluminum or tungsten, or an alloy containing this metal as the main component. The conductive film 128 may have a single layer structure or a multilayer structure. A single-layer structure of an aluminum film containing titanium, a two-layer structure of an aluminum film on a titanium film, A two-layer structure in which a titanium film is laminated on a stainless steel film, and a copper-magnesium-aluminum alloy film is laminated on A two-layer structure with a copper film laminated on top, a titanium film laminated on top of the titanium film, and an aluminum film laminated on top of the titanium film. A three-layer structure in which a titanium film is formed on the conductive film 116 is also available. Alternatively, a transparent conductive material including indium oxide, tin oxide, or zinc oxide may be used. In this embodiment, the conductive film 128 is made of titanium.

[0148] Next, a mask is formed on the conductive film 128, and the conductive film 128 is etched to form a conductive Conductive films 128a and 128b are formed (see FIG. 6B). , wet etching or dry etching can be used, wet etching The conductive film 128 may be etched into a desired shape by a combination of dry etching. In order to achieve this, the etching conditions (etching gas, etching solution, etc.) are adjusted to suit the material. However, in order to process transistors finely, Preferably, a dry etch is used.

[0149] The etching gas used for dry etching of the conductive film 128 is, for example, sulfur hexafluoride. Fluorine such as yellow (SF6), nitrogen trifluoride (NF3), and trifluoromethane (CHF3) Gas containing fluorine or a mixture of carbon tetrafluoride (CF4) and hydrogen can be used. Gas (helium (He), argon (Ar), xenon (Xe)), carbon monoxide, or Carbon dioxide or the like may be added.

[0150] When titanium is used as the conductive film 128, the etching conditions are, for example, ICP450 W, Bias 100W, Pressure 1.9Pa, Etching gas is a mixture of BCl3 and Cl2 The gas flow rate is BCl3 / Cl2=60sccm / 20sccm. By adopting such conditions, the conductive films 128a and 128b can be formed.

[0151] Next, an insulating film 130 is formed on the conductive films 128a and 128b and the insulating film 118a. An insulating film 132 is formed on the insulating film 130 (see FIG. 6(C)). The film 132 may be made of silicon oxide, silicon oxynitride, silicon nitride, hafnium oxide, or alumina. The insulating film can be formed using a material containing an inorganic insulating material such as aluminum or tantalum oxide. Alternatively, the insulating layer 11 may be formed using an organic insulating material such as polyimide or acrylic. In the example shown in FIG. 1, a two-layer structure of insulating films 130 and 132 is used. The configuration of the insulating film is not limited to this. After the insulating film 132 is formed, the surface may be polished by CMP or etching. The surface may be planarized by etching or the like.

[0152] Through the above steps, the transistor 200 according to one embodiment of the present invention can be manufactured. See Figure 6(C).

[0153] According to the manufacturing method of one embodiment of the present invention, impurities including hydrogen contained in the oxide semiconductor film can be removed by removing the impurities from the oxide semiconductor film. Therefore, the channel formation region of the oxide semiconductor film can be reduced in concentration. This allows the transistor to be made into a semiconductor that is as close to intrinsic or i-type as possible. This makes it possible to make the off-state current of the capacitor extremely small.

[0154] In addition, according to the manufacturing method of one embodiment of the present invention, the insulating film from which oxygen is released by heat treatment After the oxide semiconductor film is formed, heat treatment is performed to remove the oxide in the oxide semiconductor film. It is possible to reduce element defects and interface states at the interface between the insulating film and the oxide semiconductor film. In addition, after the oxide semiconductor film is selectively etched, the etched oxide semiconductor film An insulating film from which oxygen is released by heat treatment is formed so as to contact the side surface of the Since the side surface of the etched oxide semiconductor film is not exposed to a reduced pressure atmosphere and an etchant, Therefore, generation of oxygen defects on the side surfaces of the oxide semiconductor film can be reduced. By the heating process after the formation of the gate insulating film, oxygen is released from the insulating film by the heat treatment. Since oxygen diffuses into the oxide semiconductor film, even if oxygen defects occur on the side of the oxide semiconductor film, As a result, the oxygen defects can be compensated for. The leakage current at the source and drain of the transistor is reduced while reducing the on-state shift. It is possible to reduce the amount of the ion beam, thereby improving the electrical characteristics of the transistor.

[0155] Next, a method for manufacturing the transistor 210 shown in FIG. 2 will be described with reference to FIGS. The details are explained below.

[0156] The transistor 210 shown in FIG. 2 is different from the transistor 200 shown in FIG. 1 in that The sidewall insulating films 124a and 124b are provided in contact with the oxide semiconductor film 106a. The point is that the conductive film 126a and the conductive film 126b are formed on the conductive film 126a and the conductive film 126b. A detailed description of the steps prior to forming 126b will be omitted.

[0157] First, an insulating film is provided on a substrate 100 according to the steps shown in FIG. 3(A) to FIG. 5(C). 102a, an oxide semiconductor film 106a, and an insulating film in contact with a side surface of the oxide semiconductor film 106a. 110a, an insulating film 112a provided on the insulating film 110a, an insulating film 114, and an insulating film A gate electrode 116a is provided on the gate electrode 114, and an insulating film is provided on the gate electrode 116a. In addition, a channel formation region 122 and a channel formation region 118a are formed in the oxide semiconductor film 106a. , and dopant-containing regions 120a and 120b sandwiching a channel forming region 122 therebetween. Then, sidewall insulating films 124a and 124b and a gate insulating film 114a are formed. do.

[0158] Next, a conductive film 126 is formed, and a conductive film 128 is formed on the conductive film 126 (FIG. 7(A) The conductive film 126 and the conductive film 128 may be made of aluminum, titanium, chromium, nickel, or the like. Nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten The conductive film 126 and the conductive film 127 are made of a metal such as tin or an alloy containing the metal as the main component. The conductive film 128 may each have a single layer structure or a multilayer structure. A single-layer structure of an aluminum film containing titanium, a two-layer structure of an aluminum film with a titanium film laminated on it, Two-layer structure with titanium film laminated on tungsten film, copper-magnesium-aluminum alloy A two-layer structure with a copper film laminated on top of a titanium film and an aluminum film laminated on top of the titanium film. A three-layer structure is also available in which a conductive film 116 and a titanium film are formed on top of the conductive film 116. Similarly, transparent conductive materials including indium oxide, tin oxide, or zinc oxide may be used. In the embodiment, the conductive film 126 is made of tungsten, and the conductive film 128 is made of titanium. The thickness of the conductive film 126 is set to be greater than that of the conductive film 128. For example, the thickness of the conductive film 126 is set to be 10 nm or more and 50 nm or less. The thickness of the conductive film 128 is set to 50 nm or more and 500 nm or less. By forming the conductive film 126 in this manner, processing in the subsequent steps becomes easier. In the subsequent etching process, the etching rate varies widely. In the fast region, the conductive films 126a and 126b contact the sidewall insulating films 124a and 124b. However, by forming the conductive film 126 thin, the conductive film 12 The variation in the etching rate of the sidewall insulating films 124a and 1246 can be reduced. This makes it easy to process the conductive films 126a and 126b in contact with each other.

[0159] Next, a mask is formed on the conductive film 128, and the conductive film 128 is etched to form a conductive Conductive films 128a and 128b are formed (see FIG. 7B). , wet etching or dry etching can be used, wet etching The conductive film 128 may be etched into a desired shape by a combination of dry etching. In order to achieve this, the etching conditions (etching gas, etching solution, etc.) are adjusted to suit the material. However, in order to process transistors finely, Preferably, a dry etch is used.

[0160] The etching gas used for dry etching of the conductive film 128 is, for example, sulfur hexafluoride. Fluorine such as yellow (SF6), nitrogen trifluoride (NF3), and trifluoromethane (CHF3) Gas containing fluorine or a mixture of carbon tetrafluoride (CF4) and hydrogen can be used. Gas (helium (He), argon (Ar), xenon (Xe)), carbon monoxide, or Carbon dioxide or the like may be added.

[0161] Etching of tungsten as conductive film 126 and titanium as conductive film 128 The etching conditions are, for example, ICP 450 W, Bias 100 W, pressure 1.9 Pa, and etching. The mixing gas was a mixture of BCl3 and Cl2, and the flow rate was BCl3 / Cl2 = 60s. By adopting such conditions, the conductive film 128 is removed. It is possible to remove the conductive film 128 without removing the conductive film 126. By removing the conductive film 128a, 128b, the conductive films 128a and 128b can be formed.

[0162] Next, a mask is formed over the conductive films 128a, 128b, and the conductive film 126, and the conductive film 12 6, a part including a part overlapping with the gate electrode 116a is etched to form a conductive film 126a and 126b are formed (see FIG. 7(C)). This forms a source electrode and a drain electrode. The conductive films 126a and 126b are formed as sidewall insulating films. By providing the mask in contact with 124a and 124b, the oxide semiconductor The surface of the body membrane 106a can be reliably covered with the conductive films 126a and 126b. This makes it possible to suppress the variation in the electrical characteristics of the transistors caused by the shift in the transistors. When the source electrode and the drain electrode are formed, the oxide semiconductor film 106a is exposed to the etching gas. In addition, the insulating film 118a is formed on the gate electrode 116a. Therefore, the conductive films 126a and 126b are prevented from shorting out with the gate electrode 116a. It can be stopped.

[0163] When tungsten is used as the conductive film 126, the etching conditions are, for example, ICP. 500W, Bias 10W, Pressure 1.5Pa, Etching gases are CF4, Cl2 and The gas mixture is CF4 / Cl2 / O2=25sccm / 25sccm / 1. 0 sccm. By adopting such conditions, a part of the conductive film 126 is removed. In order to prevent the insulating film 118a and the sidewall insulating films 124a and 124b from being removed, In addition, by removing a part of the conductive film 126, the conductive film 12 6a, 126b can be formed.

[0164] Next, the conductive films 126a and 126b, the conductive films 128a and 128b, and the insulating film 118a are An insulating film 130 is formed on the insulating film 130, and an insulating film 132 is formed on the insulating film 130 (see FIG. 7(D)). The insulating film 130 and the insulating film 132 are made of silicon oxide, silicon nitride oxide, silicon nitride, etc. The material used is inorganic insulating material such as tantalum oxide, hafnium oxide, aluminum oxide, etc. It can also be formed using organic insulating materials such as polyimide and acrylic. In this embodiment, a two-layer structure of an insulating film 130 and an insulating film 132 is used. However, the configuration of the insulating film covering the transistor is not limited to this. Alternatively, the surface may be planarized by CMP, etching, or the like.

[0165] Through the above steps, the transistor 210 according to one embodiment of the present invention can be manufactured. See Figure 7(D).

[0166] According to the manufacturing method of one embodiment of the present invention, impurities including hydrogen contained in the oxide semiconductor film can be removed by Therefore, the channel formation region of the oxide semiconductor film can be formed as an i-type (intrinsic This allows the transistor to be an on-type (non-transistor) or i-type semiconductor. The current can be made extremely small.

[0167] In addition, according to the manufacturing method of one embodiment of the present invention, the insulating film from which oxygen is released by heat treatment After the oxide semiconductor film is formed, heat treatment is performed to remove the oxide in the oxide semiconductor film. Element defects and interface states at the interface between the insulating film and the oxide semiconductor film can be reduced. In addition, after the oxide semiconductor film is selectively etched, the etched oxide semiconductor film An insulating film is formed in contact with the side surface, from which oxygen is released by heat treatment. Since the side surface of the etched oxide semiconductor film is not exposed to a reduced pressure atmosphere and an etchant, In this way, generation of oxygen defects on the side surfaces of the oxide semiconductor film can be reduced. The heating process after the formation of the insulating film removes oxygen from the insulating film due to the heat treatment. Since oxygen diffuses into the oxide semiconductor film, even if oxygen defects occur on the side of the oxide semiconductor film, The oxygen defects can be compensated for. As a result, the threshold voltage of the transistor is reduced by a negative amount. This reduces the leakage current at the source and drain of the transistor. It is possible to reduce the amount of charge in the transistor, thereby improving the electrical characteristics of the transistor.

[0168] Conductive films 126a and 126b, which function as a source electrode and a drain electrode, are formed on the side walls of the By providing the insulating film 124a and the insulating film 124b in contact with each other, Therefore, even if a mask misalignment occurs, the surface of the oxide semiconductor film 106a is reliably covered with the conductive film 126a. In addition, the electrical characteristics of the transistors can be prevented from varying due to the mask misalignment. Furthermore, when forming the source electrode and the drain electrode, This is preferable because the oxide semiconductor film 106a is not exposed to the etching gas. Since the insulating film 118a is formed on the electrode 116a, the conductive films 126a and 126b Therefore, it is possible to prevent a short circuit between the gate electrode 116a and the first insulating film 116b.

[0169] (Embodiment 3) In this embodiment, a transistor having a higher on-current than the transistors shown in FIGS. An example of a method for manufacturing a transistor will be described with reference to FIGS.

[0170] First, an example of a method for manufacturing a transistor with a higher on-state current than the transistor shown in Figure 1 This will be described with reference to FIGS. 3 to 5 and 8. The transistor 22 shown in FIG. 1. Compared with the transistor 200 illustrated in FIG. The structure of the dopant-containing region is different.

[0171] First, similarly to the transistor 200 shown in FIG. 1, a semiconductor device is fabricated through the steps shown in FIG. An insulating film 102a, an oxide semiconductor film 106a, and an oxide semiconductor film 106b are provided on a substrate 100. The insulating film 110a is in contact with the side surface of the main film 106a, and the insulating film 110b is provided on the insulating film 110a. 12a, an insulating film 114, a gate electrode 116a provided on the insulating film 114, and a gate A channel-shaped insulating film 118a is formed on the electrode 116a and the oxide semiconductor film 106a. a dopant-containing region 120a sandwiching the channel-forming region 122; In addition, sidewall insulating films 124a and 124b and a gate An insulating film 114a is formed.

[0172] Next, a process for adding a dopant to the oxide semiconductor film 106a is performed. Regions 140a, 140b, 142a, and 142b containing the above-mentioned are formed (see FIG. 8(A)). In the example, the gate electrode 116a, the insulating film 118a, and the sidewall insulating film 124a are By adding a dopant to the oxide semiconductor film 106a using the semiconductor film 124b as a mask, The regions 140a, 140b, and 140c containing dopants doped with ruthenium are 2a, 142b, and a region where no dopant is added (channel forming region 122). It can be achieved.

[0173] For example, the dopant concentration in the dopant-containing regions 140a and 140b is The dopant concentration in the dopant-containing regions 120a and 120b shown in FIG. In addition, the dopant concentration in the dopant-containing regions 142a and 142b is preferably It is preferable that the concentration is higher than that of the regions 140a and 140b containing the punt.

[0174] Specifically, the dopant-containing regions 140a, 140b, 142a, and 142b include The dopant concentration is 5×10 18 atoms / cm 3 More than 1×10 22 atoms / c m 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 20 atoms / c m 3 Less than.

[0175] After the dopant-containing regions 140a, 140b, 142a, and 142b are formed, A heat treatment is performed to remove the dopant-containing regions 140a, 140b, 142a, and 142b. The resistance may be further reduced.

[0176] As a result, the conductive films 128a and 128b, which will be formed later, and the regions 142a and 142b containing the dopant are The contact resistance with the channel forming region 122 is reduced, and the electric field applied to the end of the channel forming region 122 is reduced. As a result, the on-current of the transistor formed later can be increased. In both cases, the short channel effect can be suppressed.

[0177] Then, the conductive films 128a and 128b are formed. Then, an insulating film 130 is formed on the insulating film 118a, and an insulating film 132 is formed on the insulating film 130. do.

[0178] Through the above steps, the transistor 220 according to one embodiment of the present invention can be manufactured. (see FIG. 8B). In the transistor described in this embodiment, A channel forming region 122 which becomes a panel region and dopants sandwiching the channel forming region 122 are and a region 140a, 140b containing a dopant. The dopant 124 is in contact with the conductive films 128a and 128b which function as a source electrode and a drain electrode. The regions 142a and 142b include the punts. The short channel effect can be suppressed while increasing the threshold voltage of the transistor. The negative shift of the voltage at the source and drain of the transistor is reduced. This makes it possible to reduce the leakage current caused by the gate insulating layer, thereby improving the electrical characteristics of the transistor. can.

[0179] Next, a method for manufacturing a transistor having a higher on-state current than the transistor 200 shown in FIG. Another example will be described with reference to Figs. 3 to 5 and Fig. 9. 1 and 8B, the transistor 230 has an oxide semiconductor film The structure of the dopant-containing region formed in 106a is different.

[0180] First, similarly to the transistor 200 shown in FIG. 1, a semiconductor device is fabricated through the steps shown in FIG. An insulating film 102a, an oxide semiconductor film 106a, and an oxide semiconductor film 106b are provided on a substrate 100. The insulating film 110a is in contact with the side surface of the main film 106a, and the insulating film 110b is provided on the insulating film 110a. 12a, a gate insulating film 114a, and a gate electrode 1 provided on the gate insulating film 114a. 16a, an insulating film 118a provided on the gate electrode 116a, and an oxide semiconductor film 106 In a, a channel forming region 122 and regions including a dopant sandwiching the channel forming region 122 are shown. Then, the sidewall insulating films 120a and 120b and the sidewall insulating films 124a and 124b are formed.

[0181] Next, after forming the conductive film, the conductive film is selectively etched to form the conductive films 128a and 128b. b is formed (see FIG. 9(A)).

[0182] Next, a process for adding a dopant to the oxide semiconductor film 106a is performed. The regions 150a, 150b, 152a, 152b, 154a, and 154b are formed (see FIG. 9(A)). In this example, the gate electrode 116a, the insulating film 118a, the sidewall The insulating films 124a and 124b and the conductive films 128a and 128b are used as masks to apply dopants. By adding, the dopant-containing region where the dopant is added in a self-aligned manner 150a, 150b, 152a, 152b, 154a, 154b, and dopants are added. In this way, a region (channel formation region 122) where no addition is performed can be formed.

[0183] For example, the concentration of the dopant-containing regions 150a and 150b is the same as that of the dopant shown in FIG. It is preferable that the concentration of the dopant is approximately the same as that of the dopant-containing regions 120a and 120b. The dopant-containing regions 152a, 152b have a higher concentration than the dopant-containing regions 150a, 150b. It is preferable to use a higher concentration than the above.

[0184] The dopant-containing regions 150a, 150b, 152a, 152b, 154a, and 154b The concentration of the dopant is 5×10 18 atoms / cm 3 More than 1×10 22 ato ms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 20 ato ms / cm 3 Note that the dopant is added to the exposed oxide semiconductor film 106a. By this, regions 152a and 152b containing the dopant are formed. The oxide films overlapping the wall insulating films 124a and 124b and the conductive films 128a and 128b are In the semiconductor film 106a, the sidewall insulating films 124a and 124b and the conductive The films 128a and 128b act as masks and dopants are not added, so that the dopant-containing The dopant-containing regions 150a, 150b and the dopant-containing regions 154a, 154b The dopant concentrations are approximately the same. In the dopant-containing regions 152a, 152b, the The concentration of dopant is high.

[0185] In addition, the regions 150a, 150b, 152a, 152b, 154a, and 15 After forming the dopant-containing regions 150a, 150b, and 154b, a heat treatment is performed. The sheet resistance of 2a, 152b, 154a, 154b may be further reduced.

[0186] As a result, the conductive films 128a and 128b and the regions 154a and 154b containing the dopant are The contact resistance is reduced and the electric field applied to the end of the channel formation region 122 is relaxed. As a result, the on-current of the transistor to be formed later can be increased and the short circuit can be prevented. The channel effect can be suppressed.

[0187] Thereafter, an insulating film 130 is formed on the conductive films 128a and 128b and the insulating film 118a. An insulating film 132 is formed on the insulating film 130 .

[0188] Through the above steps, the transistor 230 according to one embodiment of the present invention can be manufactured. (see FIG. 9B). In the transistor described in this embodiment, A channel forming region 122 which becomes a panel region and dopants sandwiching the channel forming region 122 are and a region 150a, 150b containing a dopant. The dopant 124 is in contact with the conductive films 128a and 128b which function as a source electrode and a drain electrode. The regions 154a and 154b include the punt. The short channel effect can be suppressed while increasing the threshold voltage of the transistor. The negative shift of the voltage at the source and drain of the transistor is reduced. This makes it possible to reduce the leakage current caused by the gate insulating layer, thereby improving the electrical characteristics of the transistor. can.

[0189] Next, a method for manufacturing a transistor having a higher on-state current than the transistor 210 shown in FIG. An example of this will be described with reference to FIGS. 3 to 5 and 10. 2. The transistor 240 has a structure similar to that of the transistor 210 in FIG. The structure of the dopant-containing region that is formed is different.

[0190] First, similarly to the transistor 210 shown in FIG. 2, a transistor An insulating film 102a, an oxide semiconductor film 106a, and an oxide semiconductor film 106b are provided on a substrate 100. The insulating film 110a is in contact with the side surface of the main film 106a, and the insulating film 110b is provided on the insulating film 110a. 12a, a gate insulating film 114a, and a gate electrode 1 provided on the gate insulating film 114a. 16a, an insulating film 118a provided on the gate electrode 116a, and an oxide semiconductor film 106 A channel forming region 122 and a dopant-containing layer are disposed on either side of the channel forming region 122. Then, the insulating regions 120a and 120b containing the insulating film and the sidewall insulating films 124a and 124b are formed.

[0191] Next, a process for adding a dopant to the oxide semiconductor film 106a is performed. The regions 140a, 140b, 142a, and 142b are formed (see FIG. 10(A)). Here, the gate electrode 116a, the insulating film 118a, and the sidewall insulating film 124a 124b as a mask, a dopant is added to the oxide semiconductor film 106a. The dopant-containing regions 140a, 140b, 140c are doped in a self-aligned manner. 42a, 142b, and a region where no dopant is added (channel formation region 122). It can be formed.

[0192] For example, the dopant concentration in the dopant-containing regions 140a and 140b is The dopant concentration in the dopant-containing regions 120a and 120b shown in FIG. In addition, the dopant concentration in the dopant-containing regions 142a and 142b is preferably It is preferable that the concentration is higher than that of the regions 140a and 140b containing the punt.

[0193] Specifically, the dopant-containing regions 140a, 140b, 142a, and 142b include The dopant concentration is 5×10 18 atoms / cm 3 More than 1×10 22 atoms / c m 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 20 atoms / c m 3 Less than.

[0194] After the dopant-containing regions 140a, 140b, 142a, and 142b are formed, A heat treatment is performed to remove the dopant-containing regions 140a, 140b, 142a, and 142b. The resistance may be further reduced.

[0195] As a result, the conductive films 126a and 126b and the regions 142a and 142b containing the dopant are formed later. The contact resistance with the channel forming region 122 is reduced, and the electric field applied to the end of the channel forming region 122 is reduced. As a result, the on-current of the transistor formed later can be increased. In both cases, the short channel effect can be suppressed.

[0196] Thereafter, the conductive films 126a and 126b and the conductive films 128a and 128b are formed. 6a, 126b are provided in contact with the sidewall insulating films 124a, 124b. Even if the mask is misaligned, the surface of the oxide semiconductor film 106a can be reliably covered with the conductive film. In addition, it is possible to suppress the variation in the electrical characteristics of the transistors caused by the mask misalignment. Furthermore, when forming the source electrode and the drain electrode, the oxide semiconductor film 106 A is preferred because it is not exposed to the etching gas.

[0197] Next, the conductive films 126a and 126b, the conductive films 128a and 128b, and the insulating film 118a are An insulating film 130 is formed on the insulating film 130, and an insulating film 132 is formed on the insulating film 130.

[0198] Through the above steps, the transistor 240 according to one embodiment of the present invention can be manufactured. (see FIG. 10B). In the transistor described in this embodiment, A channel forming region 122 which becomes a channel region and dopants sandwiching the channel forming region 122 and a region 140a, 140b containing a dopant. The conductive films 126a and 126b functioning as a source electrode and a drain electrode are in contact with each other. Therefore, the on-current of the transistor This improves the transistor threshold and suppresses the short channel effect. The negative shift of the low-value voltage is reduced, and the source and drain of the transistor are It is possible to reduce leakage current in the semiconductor device and improve the electrical characteristics of the transistor. can be done.

[0199] Next, another method for manufacturing a transistor having a higher on-state current than the transistor shown in FIG. An example will be described with reference to Figs. 3 to 5, 7(A) to (C), and 11. The transistor 250 shown in (B) has a substantially different structure from the transistors shown in FIG. In other words, the structure of the region containing the dopant formed in the oxide semiconductor film 106a is different.

[0200] 2, a transistor is provided on a substrate 100 through the steps shown in FIGS. The insulating film 102a, the oxide semiconductor film 106a, and the insulating film 102b in contact with the side surface of the oxide semiconductor film 106a An insulating film 110a is formed on the insulating film 110a, an insulating film 112a is formed on the insulating film 110a, and a gate insulating film 11 4a, a gate electrode 116a provided on the gate insulating film 114a, and a gate electrode 116 a, and sidewall insulating films 124a and 124b are formed. do.

[0201] Next, after forming two layers of conductive films, each conductive film is selectively etched to form a conductive film. 126a, 126b, 128a, and 128b are formed (see FIG. 11(A)).

[0202] Next, a process for adding a dopant to the oxide semiconductor film 106a is performed to form a region containing the dopant. The regions 150a, 150b, 152a, 152b, 154a, and 154b are formed (FIG. 11( Here, the gate electrode 116a, the insulating film 118a, and the sidewall insulating film 118b are The dopants are applied using the films 124a and 124b and the conductive films 128a and 128b as masks. By doping, the dopant-containing region 1 in which the dopant is doped in a self-aligned manner is formed. 50a, 150b, 152a, 152b, 154a, 154b, and dopants are added Therefore, a region (channel formation region 122) that is not etched can be formed.

[0203] For example, the dopant concentration in the dopant-containing regions 150a and 150b is The dopant concentration in the dopant-containing regions 120a and 120b shown in FIG. In addition, the dopant concentration in the dopant-containing regions 152a and 152b is preferably It is preferable that the concentration is higher than that of the regions 150a and 150b containing the punt.

[0204] The dopant-containing regions 150a, 150b, 152a, 152b, 154a, and 154b The concentration of the dopant is 5×10 18 atoms / cm 3 More than 1×10 22 ato ms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 20 ato ms / cm 3 In addition, the dopant that has permeated the conductive films 126a and 126b is oxidized. dopant-containing regions 152a and 152b are formed in the semiconductor film 106a. On the other hand, the sidewall insulating films 124a and 124b and the conductive films 128a and 128b In the overlapping oxide semiconductor film 106a, the sidewall insulating films 124a and 124b In addition, the conductive films 128a and 128b serve as a mask, and dopants are not added. Regions 150a and 150b containing a non-polarized light and regions 154a and 154b containing a dopant are The dopant concentration in the dopant-containing region 1 b is approximately the same. 50a, 150b, 154a, and 154b, the regions 152a and 152b containing dopants are The concentration of dopant in 52b is high.

[0205] In addition, the regions 150a, 150b, 152a, 152b, 154a, and 15 After forming the dopant-containing regions 150a, 150b, and 154b, a heat treatment is performed. The sheet resistance of 2a, 152b, 154a, 154b may be further reduced.

[0206] As a result, the conductive films 126a and 126b and the regions 152a and 152b containing the dopant are The contact resistance is reduced and the electric field applied to the end of the channel formation region 122 is relaxed. As a result, the on-current of the transistor to be formed later can be increased and the short circuit can be prevented. The channel effect can be suppressed.

[0207] Thereafter, the conductive films 126a and 126b, the conductive films 128a and 128b, and the insulating film 118a An insulating film 130 is formed on the insulating film 130, and an insulating film 132 is formed on the insulating film 130.

[0208] Through the above steps, the transistor 250 according to one embodiment of the present invention can be manufactured. (see FIG. 11B) In the transistor described in this embodiment, A channel forming region 122 which becomes a channel region and dopants sandwiching the channel forming region 122 and a region 150a, 150b containing a dopant. The conductive films 126a and 126b functioning as a source electrode and a drain electrode are in contact with each other. Therefore, the on-current of the transistor This improves the transistor threshold and suppresses the short channel effect. The negative shift of the low-value voltage is reduced, and the source and drain of the transistor are It is possible to reduce leakage current in the semiconductor device and improve the electrical characteristics of the transistor. can be done.

[0209] In addition, a dopant is added to the oxide semiconductor film through the conductive films 126a and 126b. As a result, damage to the oxide semiconductor film due to the addition of a dopant can be suppressed. Therefore, it is preferable.

[0210] (Embodiment 4) In this embodiment, a semiconductor device having a structure partially different from that shown in FIG. 1 and FIG. The arrangement will be described with reference to FIG.

[0211] FIG. 12A illustrates a transistor 260 having a structure that is partially different from that shown in FIG. As shown in FIG. 3E, the transistor 200 is formed by performing a planarization treatment on the insulating film 112. In addition, the insulating film 110 is removed until the oxide semiconductor film 106a is exposed. A step occurs between the insulating film 10a and the insulating film 112a. In the semiconductor device, the insulating film 112 and the insulating film 110 are planarized, so that the insulating film No step is generated in the conductive film 128. This can improve the coverage of the conductive film 128a and the conductive film 128b.

[0212] As described in FIG. 3A, the insulating film provided on the substrate 100 has a laminated structure. In the case of FIG. 12A, a two-layer structure of insulating films 102b and 102a is used. An aluminum oxide film is used as the insulating film 102b, and a silicon oxide film is used as the insulating film 102a. This section describes the case where

[0213] FIG. 12B shows a transistor 270 having a structure partially different from those shown in FIG. 2 and FIG. 12A. The transistor 210 shown in FIG. 2 has a flat insulating film 112 as shown in FIG. After the planarization treatment, the insulating film 110 is removed until the oxide semiconductor film 106a is exposed. As a result, steps are generated in the insulating film 110a and the insulating film 112a. In the semiconductor device shown in FIG. 12B, the insulating film 112 and the insulating film 110 are planarized. Therefore, no step is generated in the insulating film 110a and the insulating film 112a. This improves the coverage of the conductive films 126a, 126b and the conductive films 128a, 128b. can be done.

[0214] As described in FIG. 3A, the insulating film provided on the substrate 100 has a laminated structure. In the case of FIG. 12B, a two-layer structure of insulating films 102b and 102a is used. An aluminum oxide film is used as the insulating film 102b, and a silicon oxide film is used as the insulating film 102a. This section describes the case where

[0215] FIG. 12(C) shows a transistor having a structure partially different from those shown in FIG. 2, FIG. 12(A) and FIG. 12(B). The transistor 210 shown in FIG. A conductive film 128a having a thickness larger than that of the conductive film 126a is formed on the conductive film 126b. In contrast, the conductive film 128b shown in FIG. The transistor 280 is formed by forming the conductive films 126a and 126b on the conductive films 128a and 128b having a large thickness. b is formed, and the conductive films 126a and 126b are formed on the sidewall insulating films 124a and 124b. It is in contact.

[0216] The semiconductor device shown in FIGS. 12A to 12C is similar to that shown in FIGS. The semiconductor device can be freely combined with the semiconductor device shown in FIG.

[0217] (Embodiment 5) In this embodiment, a circuit configuration and a semiconductor device using the transistor described in the above embodiment will be described. An example of the operation will be described with reference to FIG. 13 to FIG. 15. In order to indicate that the transistor includes an oxide semiconductor, the symbol OS is also used. There are cases.

[0218] <Cross-sectional structure of semiconductor device> First, an example of a cross-sectional structure of a semiconductor device will be described with reference to FIG. The semiconductor device shown in FIG. 13(A) has a transistor 160 using a first semiconductor material in the lower part. The semiconductor device has a capacitor 164 and a transistor 300 made of a second semiconductor material on the upper portion. In addition, the transistor 160, the transistor 300, and the capacitor element 164 , constitute one memory cell.

[0219] The transistor 160 in FIG. 13A is a semiconductor material (e.g., The channel formation region 117a includes a channel formation region 117b including a silicide layer (such as a silicide layer) and a silicide layer (such as a silicide layer) sandwiching the channel formation region 117a. The impurity regions 119a and 119b are formed in the channel forming region 117. a gate insulating layer 108 provided on the gate electrode 108; 109. In FIG. 13(A), the source electrode and the drain electrode are not explicitly shown. Although the case where the transistor does not have a pole is shown, for convenience, this state is also referred to as a transistor. In this case, the source and drain regions are not shown in order to explain the connection relationship of the transistor. The source electrode and drain electrode may include the region. , the reference to a source electrode may include a source region.

[0220] The impurity region 119a serves as one of the source electrode and the drain electrode of the transistor 160. The impurity region 119b functions as a source electrode and a drain electrode of the transistor 160. In FIG. 13A, the impurity region 119b is an impurity Through the region 121, the wiring 107, and the region 120b containing the dopant of the oxide semiconductor layer, That is, the source electrode of the transistor 160 or The other of the drain electrodes and one of the source and drain electrodes of the transistor 300 are electrically connected are connected to the network.

[0221] However, one embodiment of the present invention is not limited to this. The electrical connection of the impurity region 119b and the capacitance element can be changed as appropriate. The impurity region 11 of another memory cell is connected to the impurity region 121 and the impurity region 119c. In this case, an opening is formed in the gate insulating layer 108. The wiring 107 may not be formed. The other of the source electrode or drain electrode of the transistor 160 of the other memory cell When one of the drain and drain electrodes of the transistor 160 is electrically connected to the source and drain electrodes of the transistor 160, The other of the source electrode or drain electrode and the source electrode or drain electrode of the transistor 300 One of the poles may not be electrically connected.

[0222] The wiring 107 can be formed from the same material and in the same process as the gate electrode 109. By providing the line 107, dishing that occurs during CMP processing can be prevented. The upper surfaces of the insulating film 102a, the gate electrode 109, and the wiring 107 can be made more flat. do.

[0223] In FIG. 13A, the gate electrode 109 and the wiring 107 are in a single layer. However, the present invention is not limited to this. The gate electrode 109 and the wiring 107 may have a structure of two or more layers. For example, a structure in which a tungsten layer is laminated on a tantalum nitride layer may be used. Tantalum nitride has a large work function, so it is more efficient in transistors than when using only tungsten. The absolute value of the threshold voltage of the transistor 160 can be increased, and the stress can be relieved. In addition, the resistance of the gate electrode 109 can be reduced compared to when only tantalum nitride is used. It is possible.

[0224] In order to achieve high integration, a transistor 160 is used as shown in FIG. It is preferable that the transistor 160 does not have a side-wall insulating layer. When the above characteristics are important, a sidewall insulating layer is provided on the side of the gate electrode 109. The impurity concentration of the impurity layer is different from that of the impurity layer formed in the region overlapping the sidewall insulating layer. A pure region 119a and an impurity region 119b may be provided.

[0225] A transistor according to one embodiment of the present invention is suitable for the transistor 300 in FIG. The transistor 300 includes a channel forming region 122a, a gate electrode 116a, and , dopant-containing regions 120a, 120b, and sidewall insulating films 124a, 124 b, a gate insulating film 114a, an insulating film 118a, and a conductive film 128b.

[0226] The capacitor 164 in FIG. 13A includes an insulating layer 114b, an electrode 116b, an oxide semiconductor The dopant-free region 122b in the layer, the gate electrode 109, That is, the electrode 116b functions as one electrode of the capacitor 164 and serves as a gate electrode. The electrode 109 functions as the other electrode of the capacitor 164 .

[0227] An insulating film 130 is provided so as to cover the transistor 300 and the capacitor 164. An insulating film 132 is provided on the insulating film 130. The conductive film 128 b and the wiring 134 are connected via an opening formed in the film 132 . In FIG. 13A, the conductive film 128b is used to connect the region 120b containing the dopant and the wiring 1 However, the disclosed invention is not limited to this. For example, the wiring 134 may be directly , may be in contact with region 120b containing the dopant.

[0228] It should be noted that the above transistors are all n-channel transistors. However, it goes without saying that a p-channel transistor can be used. The technical essence of the invention is to develop a semiconductor device that can sufficiently reduce the off-state current, such as an oxide semiconductor, to retain data. The advantage of using semiconductor materials for the transistor 300 is that they can be reduced to The specific configuration of the semiconductor device, such as the materials used in the device and the structure of the semiconductor device, is shown here. There is no need to limit it to anything.

[0229] <Basic circuit> Next, the basic circuit configuration and operation of the semiconductor device shown in FIG. In the semiconductor device shown in FIG. 13(B), the first wiring ( 1st Line) and the source electrode or drain electrode of the transistor 160 are electrically , and the second wiring (2nd Line) and the drain electrode of the transistor 160 The source electrode is electrically connected to the third wiring (3rd Line). The source electrode or the drain electrode of the transistor 300 is electrically connected to the fourth wiring. The line (4th Line) and the gate electrode of the transistor 300 are electrically connected. The gate electrode of the transistor 160 and the drain electrode of the transistor 300 are Alternatively, the source electrode is electrically connected to one of the electrodes of the capacitor 164 and is connected to a fifth wiring ( The 5th Line) is electrically connected to the other electrode of the capacitor 164. The first wiring (1st Line) and the third wiring (3rd Line) are electrically connected. It may be possible.

[0230] Here, the transistor 300 is a transistor according to one embodiment of the present invention. The transistor according to one embodiment of the present invention has an extremely small off-state current. Therefore, by turning off the transistor 300, the gate voltage of the transistor 160 The potential of the electrode can be maintained for a very long period of time. By having the above, the charge applied to the gate electrode of the transistor 160 can be easily retained. In addition, the stored information can be easily read.

[0231] The transistor 160 is not particularly limited. From the viewpoint of this, for example, transistors using single crystal silicon, etc. It is preferable to use high speed transistors.

[0232] In the semiconductor device shown in FIG. 13B, the potential of the gate electrode of the transistor 160 can be held. By taking advantage of this feature, it is possible to write, retain, and read information as follows: .

[0233] First, the writing and holding of information will be explained. The transistor 300 is turned on by applying a potential that turns the transistor 300 on. As a result, the potential of the third wiring is applied to the gate electrode of the transistor 160 and the That is, a predetermined charge is applied to the gate electrode of the transistor 160. Here, the charges corresponding to two different potentials (hereafter, low potential V L To The charge given by the above is the charge Q L , high potential V H The charge given by the charge Q H That ) is applied. In addition, three or more different potentials are applied. A charge may be applied to improve the storage capacity. Then, the potential of the fourth wiring is applied to the transistor. By setting the potential at which the transistor 300 is turned off, the transistor 300 is turned off. As a result, the charge applied to the gate electrode of the transistor 160 is retained (retained).

[0234] Since the off-state current of the transistor 300 is extremely small, the gate electrode of the transistor 160 The charge is retained for a long period of time.

[0235] Next, the reading of information will be described. In this state, when an appropriate potential (read potential) is applied to the fifth wiring, the gate of the transistor 160 Depending on the amount of charge held in the transistor electrode, the second wiring has a different potential. If the transistor 160 is an n-channel type, then the gate electrode of the transistor 160 is connected to Q H is given The apparent threshold voltage V th_H is connected to the gate electrode of transistor 160. L The apparent threshold voltage V th_L This is because the Here, the apparent threshold voltage is the voltage required to turn on the transistor 160. Therefore, the potential of the fifth wiring is V th_H and V th_L By setting the potential V0 between the For example, in writing, Q H If the potential of the fifth wire is V0 (> V th_H ) Then, the transistor Q Star 160 is in the "on" state. L is given, the potential of the fifth wire is V0 ( <V th_L ), transistor 160 remains in the "off state." Therefore, by monitoring the potential of the second wiring, the stored data can be read out.

[0236] When memory cells are arranged in an array, only the information of a desired memory cell is read. In this way, it is necessary to read the information of a specific memory cell and When the information of the other memory cells is not read, the first memory cell of the memory cell that is not the object of reading is For the wiring of 5, the transistor 160 is in the "off state" regardless of the state of the gate electrode. That is, V th_HA lower potential (for example, V1) may be applied.

[0237] Next, the rewriting of information will be described. The rewriting of information includes the above-mentioned writing of information and That is, the potential of the fourth wiring is held in the same manner as when the transistor 300 is turned on. This causes the transistor 300 to be turned on. (a potential related to new information) is applied to the gate electrode of the transistor 160 and the capacitor 164. After that, the potential of the fourth wiring is set to a potential at which the transistor 300 is turned off. By turning off the transistor 300, the gate voltage of the transistor 160 is The poles are now given a charge related to the new information.

[0238] In this way, the semiconductor device according to the present embodiment can directly read information by rewriting the information. It is possible to rewrite information. This is why it is necessary for flash memory etc. This eliminates the need to extract charge from the floating gate using high voltages, and the erase operation In other words, it is possible to suppress the decrease in the operating speed caused by the above-mentioned problem. It will be revealed.

[0239] The drain electrode (or source electrode) of the transistor 300 is the same as that of the transistor 160 The gate electrode of the semiconductor device is electrically connected to the non-volatile memory element. It has the same effect as the floating gate of a floating gate type transistor. In this case, the drain electrode (or source electrode) of the transistor 300 and the transistor 16 The part where the gate electrode of transistor 1 is electrically connected is sometimes called a node FG. When 300 is off, the node FG can be seen as being buried in an insulator, and the node Charge is held in the FG. The off-state current of the transistor 300 including an oxide semiconductor is The transistor size is less than 1 / 100,000 of that of a transistor formed by silicon semiconductors, etc. It is possible to ignore the loss of charge stored in node FG due to leakage from the capacitor 300. In other words, the transistor 300 including an oxide semiconductor can generate information without power supply. It is possible to realize a non-volatile memory device capable of retaining information.

[0240] For example, the transistor 300 has an off-state current of 10 zA (1 zA (Zepr amperes) is 1 x 10 -21 A) or less, and the capacitance value of the capacitance element 164 is about 10 fF. If so, at least 10 6 It is possible to hold data for more than 100 seconds. It goes without saying that the distance varies depending on the transistor characteristics and capacitance value.

[0241] In addition, in the semiconductor device according to the present embodiment, the conventional floating gate transistor There is a problem of deterioration of the gate insulating film (tunnel insulating film) that has been pointed out in the case of transistors. In other words, the problem of the gate when injecting electrons into the floating gate, which was previously considered This solves the problem of deterioration of the gate insulating film. This means that there is no limit. The high voltage required for writing and erasing data in a transistor is also unnecessary.

[0242] In the semiconductor device according to the present embodiment, the node FG is a flow The function is the same as that of a floating gate of a floating gate type transistor. The FG node has a feature that is fundamentally different from the floating gate of flash memory, etc. It has.

[0243] In flash memory, the potential applied to the control gate is high, so that To avoid affecting the floating gates of adjacent cells, the cells are spaced apart. This is one of the factors that hinders the high integration of semiconductor devices. The cause of this is the flash mechanism that generates a tunnel current by applying a high electric field. This stems from the fundamental principles of harpooning.

[0244] On the other hand, the semiconductor device according to the present embodiment has a transistor switch using an oxide semiconductor. It operates by switching and does not use the principle of charge injection by tunnel current as described above. In other words, unlike flash memory, a high electric field for injecting charges is not required. Therefore, there is no need to consider the effect of high electric fields due to the control gate on adjacent cells. This makes it easier to achieve high integration.

[0245] In addition, flash memory does not require a high electric field or large peripheral circuits (such as a boost circuit). For example, when the memory cell according to the present embodiment is printed The maximum and minimum voltages applied simultaneously to each terminal of the memory cell The maximum value of the difference between the two levels of information (1 bit) is , 5V or less, preferably 3V or less.

[0246] In order to increase the memory capacity of a semiconductor device, in addition to increasing the integration density, a method of multi-level data storage is also being adopted. For example, it is possible to configure the memory cell to write three or more levels of information. This allows for a larger memory capacity than when writing two-level (1-bit) information. For example, the charge Q L , charge Q giving high potential H In addition By applying a charge Q that provides another potential to the gate electrode of the first transistor, multi-value conversion is achieved. In this case, a relatively large circuit configuration (e.g., 15F 2 ~5 0F 2 Even if F is the minimum processing dimension, sufficient memory capacity can be ensured.

[0247] Next, a semiconductor device having a structure partially different from that shown in FIG. 13 will be described with reference to FIG. The difference between the semiconductor device shown in FIG. 13 and the semiconductor device shown in FIG. 14 is that The side wall insulating films 124a and 124c are provided so as to be in contact with the oxide semiconductor film 106a. The conductive film 126a, the sidewall insulating film 124b, and the oxide semiconductor film 106 a) and a conductive film 126b provided in contact with the transistor 160, the transistor 310, and the capacitance element 164 form one memory cell. The basic circuit configuration and operation of the semiconductor device shown in FIG. 14 are the same as those in FIG. Since the details are different, a detailed description will be omitted.

[0248] Conductive films 126a and 126b, which function as a source electrode and a drain electrode, are formed on the side walls of the By providing the insulating film 124a and 124b in contact with each other, even if the mask is misaligned, The surface of the oxide semiconductor film 106a can be reliably covered with the conductive film. The variation in the electrical characteristics of the transistors caused by the above-mentioned problem can be suppressed. When the drain electrode is formed, the oxide semiconductor film 106a is not exposed to an etching gas. Therefore, it is preferable.

[0249] 15(A) and 15(B) show a semiconductor device having (m×n) memory cells 190. 15(A) and 15(B) are circuit diagrams of a memory cell 190. 13. That is, the first wiring and the third wiring in FIG. 15(A) and 15(B) and corresponds to the bit line BL in FIG. The second wiring in FIG. 15 corresponds to the source line SL in FIG. 15(A) and FIG. 15(B). The fourth wiring in FIG. 13 corresponds to the write word line W in FIG. 15(A) and FIG. 15(B). WL, and the fifth wiring in FIG. 13 corresponds to the read This corresponds to the read word line RWL (see FIG. 15(A) and FIG. 15(B)).

[0250] The semiconductor device shown in FIG. 15A has m (m is an integer of 2 or more) write word lines WWL. m read word lines RWL, n bit lines BL (n is an integer of 2 or more), The memory cell array has memory cells 190 arranged in a matrix of m rows x n columns. A first driver circuit 191 connected to n bit lines BL, and m write word lines a second driver circuit 192 connected to the line WWL and the m read word lines RWL; The memory cell array shown in FIG. 15A is a multi-cell array in which memory cells are connected in parallel. This is an OR type memory cell array.

[0251] The semiconductor device shown in FIG. 15B has m (m is an integer of 2 or more) write word lines. WWL, m read word lines RWL, and n bit lines BL (n is an integer equal to or greater than 2). The n signal lines S and the memory cells 190 are arranged in a matrix of m rows by n columns. and a memory cell array arranged in A first drive circuit 191, m write word lines WWL and m read word lines and a second driver circuit 192 connected to the RWL. The cell array is a NAND type memory cell array in which memory cells are connected in series.

[0252] In addition, in FIG. 15(A) and FIG. 15(B), the transistors indicated by OS are In addition to the transistor 300 and the transistor 310, the transistors shown in the previous embodiment are The standard (200, 210, 220, 230, 240, 250) can be applied. 15 shows the case where a transistor 300 is used.

[0253] In addition, in FIG. 15(A) and FIG. 15(B), the second driving circuit 192 has an address The address selection signal line A is connected to the address selection signal line A. This is the wiring that transmits a signal to select a node.

[0254] Next, writing, holding, and reading of data in the semiconductor device shown in FIG. He explains.

[0255] In the semiconductor device illustrated in FIG. 15A, data is written, stored, and read. Basically, it is the same as in FIG. 13. In other words, the specific write operation is as follows: is applied. Here, as an example, the potential V H (where V H is the power supply potential VDD is lower. That is, V H < VDD) or the potential V L is given will be described However, the relationship of the potential applied to the node FG is not limited to this. Also, when the potential V H is applied to the node FG, the data held is defined as data "1", and when the potential V L is applied to the node FG the data held is defined as data "0".

[0256] First, the potential of the read word line RWL connected to the memory cell 190 is set to V0, and the write word line WWL is set to VDD to select the memory cell 190 to be written to.

[0257] When writing data "0" to the memory cell 190, V L is applied to the bit line BL. When writing data "1" to the memory cell 190, considering the potential drop by the threshold voltage generated in the transistor 300, V or V H or V H higher than the threshold voltage of the transistor 300 is applied to the bit line BL.

[0258] Data retention is performed by setting the potentials of the read word line RWL and the write word line WWL to V1 (where V1 is lower than V0. That is, V1 < V0, for example, V1 is lower than V0 by VDD).

[0259] When the potential of the read word line RWL is lowered from V0 to V1, the potential of the node FG decreases by V0 - V1 due to capacitive coupling with the capacitive element 164. Therefore, data "1" and data ​When any "0" is written, transistor 160 is turned off.

[0260] Since V1 is applied to the write word line WWL, the transistor 300 is in the off state. Since the off-state current of the transistor 300 is extremely small, the charge of the node FG is is held for

[0261] To read data, the potential of the read word line RWL is set to V0, and the potential of the write word line WW This is done by setting the potential of L to V1.

[0262] When the potential of the read word line RWL is increased from V1 to V0, the potential of the node FG increases by The voltage V0-V1 rises due to the capacitive coupling with the element 164. As a result, the data When 1” is applied, the potential of node FG is V H As a result, data "0" is stored in node FG. is given, the potential of node FG is V L It becomes.

[0263] When data “1” is written in the memory cell 190 by the above-mentioned read operation, When the data line BL is turned on, the transistor 160 is turned on and the potential of the bit line BL is lowered. If data "0" is written, transistor 160 is turned off and the read The initial potential of the bit line BL is maintained or increased.

[0264] The semiconductor device according to one embodiment of the present invention is used as the transistor 300. Such a semiconductor device is a transistor using an oxide semiconductor for a channel formation region. Therefore, the off-current is small. When the transistor is applied to the semiconductor device shown in FIG. It is possible to retain memory contents for a long period of time and there is no limit to the number of times they can be rewritten. It is possible to obtain a fast memory device.

[0265] (Embodiment 6) In this embodiment, a circuit configuration and a semiconductor device using the transistor described in the above embodiment will be described. An example of the operation will be described with reference to FIG. 16 and FIG. 17. In order to indicate that the transistor includes an oxide semiconductor, the symbol OS is also added. This may happen. <Cross-sectional structure of semiconductor device> In this embodiment, a so-called DRAM (Dynamic Random Access Memory) An example of a semiconductor device having a structure corresponding to a memory will be described with reference to FIG. The semiconductor device shown in FIG. 16A includes a transistor 320 and a capacitor 168. do.

[0266] A transistor 320 in FIG. 16A is a transistor according to one embodiment of the present invention. The transistor 320 includes a channel forming region 122a, a gate electrode 116a, and The dopant-containing regions 120a and 120b, the conductive films 128a and 128b, and the sidewalls The insulating film 118a includes a gate insulating film 114a and a hole insulating film 124b. do.

[0267] The capacitance element 168 in FIG. 16A includes a region 120a containing a dopant, an insulating film 130 That is, the conductive film 128a is the The region 120a containing the dopant functions as one electrode of the capacitor element 168. It will function as a pole.

[0268] An insulating film 132 is provided to cover the transistor 320 and the capacitor 168 . Then, through the openings formed in the insulating film 130 and the insulating film 132, the conductive film 128b and The wiring 134 is connected. Note that in FIG. 16A, the conductive film 128b is used to transfer the dopant. However, the disclosed invention is not limited to this. For example, the conductive film 128b may not be provided, and the wiring 134 may be provided in the region 120b containing the dopant. It may be brought into contact.

[0269] Next, a semiconductor device having a partially different structure from the semiconductor device shown in FIG. The semiconductor device shown in FIG. 16(A) and the semiconductor device shown in FIG. The difference from the device is that the sidewall insulating film 124a and the oxide semiconductor film 106a are The conductive film 126a is provided so as to cover the sidewall insulating film 124b and the oxide semiconductor film. and a conductive film 126b provided so as to be in contact with the conductive film 106a. A conductive film 128a is provided on the conductive film 126a via an insulating film 130. The conductive film 126b and the conductive film 128b are connected to each other through an opening provided in the insulating film 130. is.

[0270] The capacitor element 169 in FIG. 16B includes a conductive film 126a, an insulating film 130, and a conductive film That is, the conductive film 128a is formed as one electrode of the capacitor 169. The conductive film 126 a functions as the other electrode of the capacitor 169 .

[0271] In addition, an insulating film 132 is provided so as to cover the transistor 320 and the capacitor element 169. Then, the conductive film 12 is exposed through the openings formed in the insulating film 130 and the insulating film 132. 16B, the conductive film 128b is used to form a conductive layer 134. The conductive film 126b and the wiring 134 are connected to each other, but the disclosed invention is not limited to this. For example, the conductive film 128b may not be provided, and the wiring 134 may be in contact with the conductive film 126b.

[0272] <Basic circuit> Next, the basic circuit configuration and operation of the semiconductor device shown in FIG. In the semiconductor device shown in FIG. 16(C), the first wiring ( 1st Line) and the source electrode or drain electrode of the transistor 320 are electrically The second line and the gate electrode of the transistor 320 are connected to One of the electrodes of the capacitor 168 and the drain electrode of the transistor 320 are electrically connected to each other. The third wiring (3rd Line) is electrically connected to the source electrode. The other end of the capacitor 168 is electrically connected to the semiconductor device 166 shown in FIG. The basic circuit configuration and operation of the device can also be understood by referring to the description in FIG. 16(C). This can be done.

[0273] Here, the transistor 320 is, for example, a transistor including an oxide semiconductor. A transistor including an oxide semiconductor has a feature of having an extremely low off-state current. Therefore, when the transistor 320 is turned off, the capacitance element 168 The applied potential can be maintained for a very long period of time.

[0274] In the semiconductor device shown in FIG. 16C, a potential applied to the capacitor 168 can be held. By taking advantage of this feature, it is possible to write, retain, and read information as follows.

[0275] First, we will explain how to write and store information. For simplicity, we will use the third arrangement. The potential of the second wiring is fixed. This sets the potential at which the first transistor 320 is turned on, thereby turning on the first The potential of the wiring is applied to one of the electrodes of the capacitor 168. A predetermined charge is applied to the second wiring (write). By setting the potential at which the transistor 320 is turned off, the transistor 320 is turned off. The charge applied to the capacitance element 168 is held (retained). As described above, the off-state current is extremely small, so that the charge can be retained for a long period of time.

[0276] Next, the reading of information will be described. In this state, when the potential of the second wiring is set to a potential at which the transistor 320 is turned on, The first wiring has a different potential depending on the amount of charge held in the capacitor 168. By monitoring the potential of the first wiring, the stored data can be read out.

[0277] Next, the rewriting of information will be described. The rewriting of information includes the above-mentioned writing of information and That is, the potential of the second wiring is held in the same manner as when the transistor 320 is turned on. This causes the transistor 320 to be turned on. (a potential related to new data) is applied to one electrode of the capacitor 168. The potential of the wiring is set to a potential at which the transistor 320 is turned off. By turning off the capacitor 168, the capacitor 168 is in a state where a charge related to new information is given. It becomes a posture.

[0278] In this way, the semiconductor device according to the disclosed invention can directly read data by rewriting the data. It is possible to rewrite information, which allows the semiconductor device to operate at high speed.

[0279] The above explanation is for n-type transistors (n-channel transistors) that use electrons as carriers. ) is used, but instead of n-type transistors, Needless to say, a p-type transistor can be used.

[0280] FIG. 17 shows an example of a circuit diagram of a semiconductor device having (m×n) memory cells 195. In FIG. The configuration of the memory cell 195 in FIG. 17 is the same as that in FIG. 16(C). The first wiring in FIG. 16(C) corresponds to the bit line BL in FIG. 17, and The second wiring corresponds to the word line WL in FIG. 17, and the third wiring in FIG. This corresponds to the source line SL in FIG. 17 (see FIG. 17).

[0281] The semiconductor device shown in FIG. 17 includes n bit lines BL, m word lines WL, and memory cells. A memory cell array in which 195 is arranged in a matrix of m rows by n columns; A first driver circuit 196 connected to n bit lines BL and a second driver circuit 197 connected to m word lines WL and a second drive circuit 197.

[0282] The memory cell 195 includes a transistor 320 and a capacitor element 168 . The gate electrode of the transistor 320 is connected to the word line WL. One of the source electrode and the drain electrode of the transistor 320 is connected to the bit line BL. The other of the source electrode or the drain electrode of the transistor 320 is connected to one of the electrodes of the capacitance element. The other electrode of the capacitance element is connected to a source line SL and is applied with a constant potential. The transistor 320 may be any of the transistors described in the above embodiments. do.

[0283] A semiconductor device according to one embodiment of the present invention includes a transistor having a channel formation region formed of an oxide semiconductor. Therefore, compared to transistors that use single crystal silicon for the channel formation region, It has the characteristic of small current. For this reason, it is recognized as a so-called DRAM. When the transistor is applied to the semiconductor device shown in FIG. It is possible to obtain memories with very long intervals between them.

[0284] As described above, the configurations, methods, etc. described in this embodiment may be used in conjunction with the configurations, methods, etc. described in other embodiments. They can be used in any suitable combination.

[0285] (Embodiment 7) An image sensor function for reading information of an object using a semiconductor device according to one embodiment of the present invention It is possible to manufacture a semiconductor device having the above structure.

[0286] FIG. 18A shows an example of a semiconductor device having an image sensor function. FIG. 18B and FIG. 18C are equivalent circuits of a photosensor. FIG.

[0287] In FIG. 18A, a photosensor 601 includes a photodiode 602 and an amplifier circuit 6 The photodiode 602 has a semiconductor junction that generates a current when light strikes it. The amplifier circuit 603 is a photoelectric conversion element that generates a The current obtained by receiving light is amplified, or the charge accumulated by the current is The photosensor 601 detects light incident on the photodiode 602. By emitting the signal, information on the detected object can be read. A light source such as a backlight can be used when reading.

[0288] The amplifier circuit 603 may have a configuration capable of amplifying the current generated in the photodiode 602. Any form can be adopted, but at least the amplifier circuit 603 is The amplifier includes a transistor 605 that amplifies the current generated in the node 602 .

[0289] Hereinafter, either the source electrode or the drain electrode will be referred to as the first terminal, and the other will be referred to as the second terminal. A specific configuration of the photosensor 601 shown in FIG. 8(A) will be described.

[0290] In the photosensor 601 shown in FIG. 18A, an amplifier circuit 603 is A transistor 604 that functions as a switching element for controlling the supply of the current; According to the potential applied to the second terminal of the resistor 604, the current value between the first terminal and the second terminal is or a transistor 605 whose resistance is determined, and an output signal determined by the current value or resistance value. A transistor that functions as a switching element to supply the potential of the signal to the wiring OUT. 606.

[0291] In this embodiment, a semiconductor device according to one embodiment of the present invention is used as the transistor 604. The transistor 604 has reduced oxygen defects in an oxide semiconductor. This reduces the negative shift of the threshold voltage and reduces the source and drain Therefore, the leakage current in the drain is reduced. By applying the device, a semiconductor device with improved electrical characteristics can be provided.

[0292] Specifically, in FIG. 18A, the anode of the photodiode 602 is connected to the wiring PR. The cathode of the photodiode 602 is connected to a first terminal of a transistor 604. The second terminal of the transistor 604 is connected to another semiconductor element in the amplifier circuit 603. Therefore, due to the configuration in the amplifier circuit 603, the connection of the second terminal of the transistor 604 In FIG. 18A, the second terminal of the transistor 604 is connected to the transistor 605. The gate electrode of the transistor 604 is connected to the wiring TX. The wiring TX is connected to a signal line for controlling the switching of the transistor 604. The first terminal of the transistor 605 is supplied with a high-level power supply potential VDD. The second terminal of the transistor 605 is connected to a wiring VR to which a voltage is applied. The second terminal of the transistor 606 is connected to the wiring OUT. The gate electrode of the transistor 606 is connected to the wiring SE. The potential of a signal that controls the switching of the transistor 606 is applied to SE. The potential of the output signal output from the amplifier circuit 603 is applied to the wiring OUT.

[0293] In FIG. 18A, the second terminal of the transistor 604 and the gate electrode of the transistor 605 are The node to which the current is connected is shown as node FD. The charge stored at node FD is The amount of charge at node FD determines the potential of the output signal. For this purpose, a storage capacitor may be connected to the node FD.

[0294] Note that even if components that are independent on the circuit diagram are connected to each other, For example, when a part of a wiring functions as an electrode, one conductive film is a In this specification, the term "connection" refers to such a single conductive film. However, cases where the functions of multiple components are combined are also included in this category.

[0295] In FIG. 18A, the wiring PR, the wiring TX, and the wiring OUT are connected to the photosensor 601. 6 is an example of a case where the photosensor 601 is connected to the The number of wirings to be connected is not limited to this. In addition to the above wirings, wirings to which a power supply potential is applied, A signal potential for resetting the amount of charge held in the width circuit 603 is applied. A wire or the like may be connected to the photosensor 601 .

[0296] In FIG. 18A, the amplifier circuit 603 is a transistor that functions as a switching element. Although the configuration of the photosensor 601 having only one photodiode 604 is shown in FIG. The present embodiment is not limited to this configuration. In the present embodiment, one transistor is a switching element. However, multiple transistors function as a single switching element. In the case where a plurality of transistors function as one switching element, The plurality of transistors may be connected in parallel or in series. Alternatively, a combination of series and parallel connections may be used.

[0297] In this specification, the state in which transistors are connected in series refers to, for example, the first transistor Only one of the first and second terminals of the first transistor is connected to the first terminal of the second transistor. This means that the transistor is connected to only one of the second terminals. A state in which the first terminal of a first transistor is connected to the first terminal of a second transistor is called a row connection. the second terminal of the first transistor is connected to the second terminal of the second transistor. This indicates the connected state.

[0298] In FIG. 18A, the transistor 604 included in the amplifier circuit 603 is In the above embodiment, the semiconductor device of the present invention can be used. The oxygen vacancies in the semiconductor are reduced, resulting in a low negative shift in threshold voltage. This reduces the leakage current at the source and drain of the transistor. In addition, by using an oxide semiconductor film for the active layer of the transistor 604, The off-state current of the photosensor 64 can be significantly reduced. It functions as a switching element to hold the charge stored in 01. The charge leakage during the load retention period can be suppressed to a small amount.

[0299] FIG. 18B shows a photodiode 602 and a transistor 6 A cross section including 04 is shown.

[0300] The photodiode 602 of the photosensor 601 is stacked in order on a substrate 651. The semiconductor device has a p-type semiconductor film 615, an i-type semiconductor film 616, and an n-type semiconductor film 617. The conductive film 610 is a p-type semiconductor film 602 that functions as an anode of the photodiode 602. It is connected to 15.

[0301] The conductive film 618 of the photosensor 601 functions as a gate electrode of the transistor 604. The conductive film 619a functions as a first terminal of the transistor 604. The conductive film 620a functions as a second terminal of the transistor 604. It is connected to the conductive film 617 and the conductive film 619a.

[0302] In FIG. 18B, the photosensor 601 includes a conductive film 610 functioning as a wiring PR. The conductive film 610, the conductive film 619a, and the conductive film 620a are formed over the insulating film 628. The first conductive film is processed into a desired shape to form the insulating film.

[0303] Note that the cross-sectional view of the photosensor 601 shown in FIG. 18B shows the conductive film 621 formed. In the case of a display device, a display element is provided in addition to the photosensor 601. Therefore, in practice, the conductive film 621 is formed before the display element is formed.

[0304] FIG. 18C shows a photodiode 602 and a transistor 6 18(A) and (B). The transistor 614 corresponds to the transistor 604 shown in FIGS. It has a configuration that is partially different from that of the transistor 604 .

[0305] The conductive film 618 of the photosensor 601 functions as a gate electrode of the transistor 614. The conductive film 619a and the conductive film 619b are connected to a first terminal of the transistor 614. The conductive film 620a and the conductive film 619b function as a second terminal of the transistor 614. The conductive film 621 is connected to the n-type semiconductor film 617 and the conductive film 619a. It is being done.

[0306] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0307] (Embodiment 8) In this embodiment, the semiconductor device described in the previous embodiment is applied to an electronic device. This will be described with reference to FIGS. 19 to 21.

[0308] FIG. 19 is a block diagram of a portable device. The portable device shown in FIG. 19 includes an RF circuit 501, an analog A digital baseband circuit 502, a digital baseband circuit 503, a battery 504, and a power supply Circuit 505, application processor 506, flash memory 510, display A controller 511, a memory circuit 512, a display 513, a touch sensor 519, The display 513 is configured with a voice circuit 517, a keyboard 518, etc. The image display device is configured with an application section 514, a source driver 515, and a gate driver 516. The application processor 506 includes a CPU 507, a DSP 508, and an interface 509. In general, memory circuits are composed of SRAM or DRAM. However, by employing the semiconductor device described in the previous embodiment for the memory circuit 512, It is capable of writing and reading information at high speed, retaining data for a long period of time, and consuming little power. can be sufficiently reduced.

[0309] Next, FIG. 20 shows a semiconductor device according to the above embodiment that is incorporated in a memory circuit 400 of a display. The memory circuit 400 shown in FIG. It is composed of a switch 404, a switch 405 and a memory controller 401. The semiconductor device described in the previous embodiment is applied to the memory 402 and the memory 403. .

[0310] First, certain image data is generated by an application processor (not shown). The formed image data (input image data 1) is input to the memory via the switch 404. The image data stored in the memory 402 (stored image data 1) The display 40 is connected to the switch 405 and the display controller 406. 7 and displayed.

[0311] If there is no change in the input image data 1, the stored image data 1 is usually at a frequency of about 30 to 60 Hz. The display controller 406 reads the data from the memory 402 via the switch 405. It is revealed.

[0312] Next, for example, when the user rewrites the screen (i.e., the input image data If there is a change, the application processor receives the new image data (input image data 2 The input image data 2 is stored in the memory 403 via the switch 404. During this time, the stored image data 1 is periodically read out from the memory 402 via the switch 405. When the new image data (stored image data 2) is completely stored in the memory 403, From the next frame of the display 407, the stored image data 2 is read out, and the switch 405 and displays the stored image data on a display 407 via a display controller 406. The next image data is sent to the memory and displayed. This continues until the data is stored in the library 402.

[0313] In this way, the memory 402 and the memory 403 alternately write and read data. By reading out the data from the memory 402, the display 407 is displayed. The memory 403 is not limited to being separate memories, but may be a single memory divided and used. The semiconductor device described in the above embodiment may be used as the memory 402 and the memory 40 3. By adopting this method, information can be written and read quickly and the memory can be retained for a long time. This makes it possible to sufficiently reduce power consumption.

[0314] Next, FIG. 21 is a block diagram of an electronic book. The electronic book shown in FIG. 21 has a battery 701. , power supply circuit 702, microprocessor 703, flash memory 704, audio circuit 70 5, keyboard 706, memory circuit 707, touch panel 708, display 709, The display controller 710 is configured as the semiconductor device described in the previous embodiment. The device can be used as a memory circuit 707. The role of the memory circuit 707 is to read the contents of books. The function to temporarily hold the contents of e-books is as follows: An example of this is when a user uses the highlight function. When you are working on a project, you may want to mark a specific area. The electronic book format has a highlight function that changes the display color and underlines the text. By making the text bold or changing the font, you can differentiate it from the surroundings. In other words, the highlight function is a function that remembers and retains information specified by the user. If this information is to be stored for a long period of time, it is copied to flash memory 704. In such a case, the semiconductor device described in the above embodiment may be adopted. This allows information to be written and read at high speed, and to be stored for a long period of time. Moreover, power consumption can be sufficiently reduced.

[0315] (Embodiment 9) In this embodiment, when the semiconductor device described in the above embodiment is applied to an electronic device, This will be described with reference to FIG. 22. In this embodiment, Telephones, mobile phone devices, portable information terminals (including portable game consoles, audio playback devices, etc.) (including), digital cameras, digital video cameras, electronic paper, television equipment (television The above-described semiconductor device is applied to electronic devices such as a television receiver. This section explains what happens when

[0316] FIG. 22A shows a notebook personal computer, which includes a housing 801, a housing 802, The display unit 803 and the keyboard 804 are included. At least one of the semiconductor circuits (e.g., a memory circuit) is provided inside the semiconductor The semiconductor device shown in the above embodiment is provided in the entire circuit. It has high speed writing and reading, long-term memory retention, and low power consumption. This realizes a notebook type personal computer.

[0317] FIG. 22B shows a tablet terminal 810. The tablet terminal 810 has a display unit 8 12, a housing 813 having a display unit 814, and an operation button 815, The tablet terminal 810 has an external interface 816. The housing 811 and the housing 813 are provided with a semiconductor circuit (e.g. , a memory circuit), and the semiconductor device described in the above embodiment is provided in the semiconductor circuit. This allows for high speed writing and reading of information and long-term memory retention. This realizes a tablet terminal that is capable of handling a wide range of functions and has sufficiently reduced power consumption.

[0318] FIG. 22C shows an electronic book 820 equipped with electronic paper. The electronic book 820 is made up of a housing 821 and a housing 822. The display device 8 is configured with two housings, housing 821 and housing 823. 25 and a display unit 827 are provided. The housing 821 and the housing 823 are connected by a shaft portion 837. The housing 8 is connected to the housing 8 via the shaft 837, and can be opened and closed around the shaft 837. 21 includes a power source 831, operation keys 833, a speaker 835, etc. At least one of the housings 823 is provided with a semiconductor circuit (for example, a memory circuit). The semiconductor device described in the above embodiment is provided in the semiconductor circuit. It has high speed writing and reading of information, long-term memory retention, and low power consumption. A sufficiently reduced reading of electronic books is realized.

[0319] FIG. 22D shows a mobile phone that is composed of two housings, a housing 840 and a housing 841. Furthermore, the housing 840 and the housing 841 slide and unfold as shown in FIG. It can be folded up and folded up, making it possible to make it compact and suitable for carrying. The housing 841 also includes a display panel 842, a speaker 843, a microphone 844, and an operation Key 845, pointing device 846, camera lens 847, external connection terminal 84 The housing 840 also includes a solar cell 849 for charging the mobile phone. , an external memory slot 850, etc. Also, the antenna is built into the housing 841. At least one of the housings 840 and 841 has a semiconductor circuit (e.g., The semiconductor circuit is provided with the semiconductor device shown in the above embodiment. This allows for high speed writing and reading of information and long-term memory retention. This realizes a mobile phone with high functionality and sufficiently reduced power consumption.

[0320] FIG. 22E shows a digital camera, which includes a main body 861, a display unit 867, an eyepiece unit 863, and an operation unit. The device is made up of an operation switch 864, a display unit 865, a battery 866, etc. A semiconductor circuit (e.g., a memory circuit) is provided inside 861. The semiconductor device described in the above embodiment is provided. A digital memory device that can read data at high speed, retain data for a long period of time, and consumes very little power. This will realize a single camera.

[0321] FIG. 22F shows a television device 870, which includes a housing 871, a display unit 873, a stand, and the like. The television device 870 is operated by a switch provided in the housing 871. The housing 871 and the remote control 880 can be used. The machine 880 includes a semiconductor circuit (for example, a memory circuit). The semiconductor device described in the above embodiment is mounted on the circuit. It is also possible to read out the data at high speed, store the data for a long period of time, and consume a sufficiently low amount of power. A television device is provided.

[0322] As described above, the electronic device shown in this embodiment mode is equipped with the semiconductor device according to the above embodiment. This makes it possible to realize electronic devices with reduced power consumption. [Explanation of symbols]

[0323] 100 Substrates 102 Insulating film 102a Insulating film 102b Insulating film 104 Oxide semiconductor film 106 Oxide semiconductor film 106a Oxide semiconductor film 107 Wiring 108 Gate Insulation Layer 109 Gate electrode 110 Insulating film 110a Insulating film 112 Insulating film 112a Insulating film 112b Insulating film 114 Insulating film 114a Gate insulating film 116 Conductive Film 116a Gate electrode 116b Electrode 117a Channel formation region 118 Insulating film 118a Insulating film 119a Impurity region 119b Impurity region 119c impurity region 120a Region containing dopant 120b Dopant-containing region 121 Impurity region 122 Channel formation region 122a Channel formation region 124 Insulating film 124a Sidewall insulating film 124b Sidewall insulating film 124c Sidewall insulating film 126 Conductive Film 126a Conductive film 126b Conductive film 128 Conductive Film 128a Conductive film 128b Conductive film 130 Insulating film 132 Insulating film 134 Wiring 140a Dopant-containing region 140b Dopant-containing region 142a Dopant-containing region 142b Dopant-containing region 150a Region containing a dopant 150b Dopant-containing region 152a Dopant-containing region 152b Dopant-containing region 154a Dopant-containing region 154b Dopant-containing region 160 Transistors 164 Capacitive element 168 Capacitive element 169 Capacitive element 190 memory cells 191 Drive circuit 192 Drive circuit 195 memory cells 196 Drive circuit 197 Drive Circuit 200 Transistors 210 Transistor 220 Transistor 230 Transistor 240 Transistor 250 Transistors 260 Transistors 270 Transistors 280 Transistors 300 Transistors 310 Transistor 320 Transistor 400 Memory Circuit 401 Memory Controller 402 Memory 403 Memory 404 Switch 405 Switch 406 Display Controller 407 Display 501 RF circuit 502 Analog Baseband Circuit 503 Digital Baseband Circuit 504 Battery 505 Power supply circuit 506 Application Processor 507 CPU 508 DSP 509 Interface 510 Flash Memory 511 Display Controller 512 Memory Circuit 513 Display 514 Display section 515 Source Driver 516 Gate Driver 517 Audio Circuit 518 Keyboard 519 Touch Sensor 601 Photo sensor 602 Photodiode 603 Amplification circuit 604 Transistor 605 Transistor 606 Transistor 610 Conductive Film 614 Transistor 615 Semiconductor Film 616 Semiconductor Film 617 Semiconductor Film 618 Conductive Film 619a Conductive film 619b Conductive film 620a Conductive film 621 Conductive Film 628 Insulating film 651 Substrate 701 Battery 702 Power supply circuit 703 Microprocessor 704 Flash Memory 705 Audio Circuit 706 Keyboard 707 Memory Circuit 708 Touch Panel 709 Display 710 Display Controller 801 Case 802 Case 803 Display section 804 Keyboard 810 Tablet PC 811 Case 812 Display section 813 Case 814 Display section 815 Operation button 816 External Interface 817 Stylus 820 e-books 821 Case 823 Case 825 Display section 827 Display section 831 Power supply 833 Operation Key 835 Speaker 837 Shaft 840 Case 841 Case 842 Display Panel 843 Speaker 844 Microphone 845 Operation Key 846 Pointing Device 847 Camera Lenses 848 External connection terminal 849 Solar Cells 850 external memory slot 861 Main unit 863 Eyepiece 864 Operation switch 865 Display section 866 Battery 867 Display section 870 Television Equipment 871 Case 873 Display section 875 Stand 880 Remote Controlled Device

Claims

[Claim 1] an oxide semiconductor film and an insulating film over a substrate; a side surface of the oxide semiconductor film is in contact with the insulating film, the oxide semiconductor film includes a channel formation region and regions containing a dopant that are formed to sandwich the channel formation region, a gate insulating film formed on and in contact with the oxide semiconductor film; a gate electrode having a sidewall insulating film formed on the gate insulating film; a source electrode and a drain electrode formed in contact with the oxide semiconductor film and the insulating film;

Images