Display panel and display device

Abstract

To provide a display panel and a display device capable of reducing width of a frame of a drilling area.SOLUTION: A display panel includes: a drilling area; a display area provided while surrounding the drilling area at least partially; and a first transition area positioned between the display area and the drilling area. The display panel includes a board, an insulation structure, a light emitting unit, and a first sealing layer. The insulation structure is provided on the board and is positioned in the display area and the first transition area. An interception structure is provided in the insulation structure and demarcates a first opening, and a second opening corresponding to the first transition area and the drilling area. The light emitting unit is provided in the insulation structure and is positioned in the display area. The light emitting unit is further provided within the first opening. The first sealing layer is positioned in the first transition area and covers the surface of the insulation structure.SELECTED DRAWING: Figure 4A

Description

[Technical field]

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. [Background technology]

[0002] With the development of display technology, traditional display devices are all designed toward a high screen occupancy rate in order to realize a full screen. The perforated screen is a design that can improve the screen occupancy rate of mobile phones. The perforated screen is provided with a perforated area for arranging a camera on the display panel. The edge of the perforated area usually needs to be provided with a blocking pillar, a sealing structure, etc., which makes the frame width of the perforated area wider, thereby affecting the visual effect. Summary of the Invention [Problem to be solved by the invention]

[0003] In view of this, there is a need to provide a display panel and a display device that can reduce the width of the frame in the perforation area. [Means for solving the problem]

[0004] As a first aspect, an embodiment of the present application provides a display panel, the display panel having a hole punching region, a display region at least partially surrounding the hole punching region, and a first transition region located between the display region and the hole punching region, the display panel including a substrate, an insulating structure, a blocking structure, a light emitting unit, and a first encapsulating layer, the insulating structure being provided on the substrate and located in the display region and the first transition region, the blocking structure being provided on the insulating structure and defining a first opening and a second opening corresponding to the first transition region and the hole punching region, the light emitting unit being provided on the insulating structure and located in the display region, the light emitting unit being further provided within the first opening, and the first encapsulating layer being located in the first transition region and covering a surface of the insulating structure.

[0005] In one embodiment, the insulating structure includes a first inorganic layer, and the first sealing layer covers a surface of the first inorganic layer. In one embodiment, the insulating structure includes a pixel confinement layer, the pixel confinement layer being the first inorganic layer. In one embodiment, the insulating structure further includes a gate insulating layer, a capacitance insulating layer, and an interlayer dielectric layer, the gate insulating layer, the capacitance insulating layer, and the interlayer dielectric layer being stacked between the substrate and the first inorganic layer along a direction away from the substrate, and a portion of a surface of at least one of the gate insulating layer, the capacitance insulating layer, and the interlayer dielectric layer is covered by the first sealing layer. In one embodiment, the gate insulating layer, the capacitance insulating layer and the interlayer dielectric layer are all configured as inorganic film layers. In one embodiment, the display panel further includes a buffer layer, the buffer layer being disposed between the insulating structure and the substrate, and the first sealing layer further covering a portion of a surface of the buffer layer. In one embodiment, the buffer layer is configured as an inorganic membrane layer. In one embodiment, the substrate has a first area corresponding to the perforation area, and an orthogonal projection of the insulating structure on the substrate is spaced apart from the first area.

[0006] In one embodiment, at least one groove is provided in the first transition region, the groove penetrating at least a portion of the insulating structure along a thickness direction of the substrate, and the first sealing layer further covers a groove wall of the at least one groove. In one embodiment, a plurality of grooves are provided within the first transition region, the plurality of grooves being spaced apart along a radial direction of the perforation region, and the first sealing layer further covers groove walls of the plurality of grooves. In one embodiment, the trench extends through the first inorganic layer and the interlevel dielectric layer along a thickness of the substrate. In one embodiment, the orthogonal projection of the groove on the substrate is a closed circular pattern.

[0007] In one embodiment, at least one first groove is further provided in the first transition region, the at least one first groove being located on a side of the groove adjacent to the perforation region, and the first groove penetrating the insulating structure along a thickness direction of the substrate. In one embodiment, the display panel further includes a first planarization layer disposed on the substrate, the first planarization layer being located in the first transition region. In one embodiment, the first planarization layer covers the insulating structure in the first transition region and is filled in the first groove. In one embodiment, an orthogonal projection of the first planarization layer on the substrate is spaced apart from the drilled area. In one embodiment, a plurality of the first grooves are provided in the first transition region, and the plurality of first grooves are arranged at intervals along a radial direction of the perforation region.

[0008] In one embodiment, the display panel further includes a dam portion provided on the substrate, the dam portion being located between the display area and the first transition area and surrounding the periphery of the first transition area. In one embodiment, the dam portion includes a dam bottom portion, a dam body, and a dam top portion stacked along a direction away from the substrate. In one embodiment, the dam top and the pixel definition layer are provided in the same layer. In one embodiment, the material of the dam body includes an organic material. In one embodiment, the dam bottom and the interlevel dielectric layer are provided in the same layer. In one embodiment, the dam bottom includes a first portion, a second portion, and a third portion stacked along a direction away from the substrate, the first portion and the gate insulation layer being provided in the same layer, the second portion and the capacitive insulation layer being provided in the same layer, and the third portion and the interlayer dielectric layer being provided in the same layer. In one embodiment, the dam portion is provided with a second groove. In one embodiment, the dam bottom is provided with the second groove penetrating the dam bottom, and a portion of the dam body is filled in the second groove.

[0009] In one embodiment, the substrate is provided with an overflow prevention structure, the overflow prevention structure being located on a side of the dam portion adjacent to the display area, and / or the overflow prevention structure being located on a side of the dam portion adjacent to the first transition area. In one embodiment, the overflow prevention structure includes an overflow groove. In one embodiment, the overflow trench penetrates the pixel confinement layer and the interlevel dielectric layer along a thickness direction of the substrate. In one embodiment, a recess is provided on the side of the dam portion adjacent to the display area, and the first inorganic layer covers a side wall and a bottom wall of the recess and defines the overflow groove.

[0010] In one embodiment, a first distance L is present between a side of the first transition region adjacent to the hole region and a side of the first transition region away from the hole region, and the first distance L satisfies the relationship 30 μm≦L≦100 μm.

[0011] In one embodiment, the substrate includes an underlayer and a barrier layer disposed in a stack, the barrier layer being located between the underlayer and the insulating structure. In one embodiment, an orthogonal projection of the barrier layer on the underlayer is spaced apart from the perforated region.

[0012] In one embodiment, the blocking structure includes a blocking body and a barrier section stacked along a direction away from the substrate, and the outer contour of the orthogonal projection of the bottom surface of the barrier section on the substrate is located at the outer periphery of the outer contour of the orthogonal projection of the top surface of the blocking body on the substrate. In one embodiment, the blocking body includes a first metal layer, the light-emitting unit includes a first electrode, a light-emitting functional portion and a second electrode stacked along a direction away from the substrate, and the second electrode is electrically connected to the first metal layer. In one embodiment, the isolator further comprises a second metal layer located on a side of the first metal layer adjacent the substrate. In one embodiment, the barrier portion is a metallic structure.

[0013] In a second aspect, an embodiment of the present application provides a display device including a display panel according to any of the embodiments of the first aspect. Effect of the Invention

[0014] The display panel and display device provided by the embodiments of the present application can block the luminescent material of the adjacent luminescent units when evaporating the luminescent material of the luminescent unit by providing a blocking structure, which is advantageous for manufacturing the luminescent units by pixel patterning technology and frees the constraint of fine metal mask (FMM). Furthermore, the blocking structure is provided around the periphery of the first transition region, which can block the luminescent material when evaporating the luminescent material of the luminescent unit, so that there is no luminescent material in the first transition region, and thus there is no luminescent material between the first encapsulation layer and the insulating structure in the first transition region, i.e., there is no luminescent material on the side of the first encapsulation layer close to the substrate, so that the effective encapsulation area of ​​the first encapsulation layer can be increased. Therefore, under the premise of achieving the same encapsulation effect, the present application can reduce the width of the first transition region (i.e., the frame of the hole region), which is advantageous for improving the visual effect. [Brief description of the drawings]

[0015] In order to more clearly describe the technical solutions in the embodiments of the present application or the prior art, the following briefly describes the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can further obtain other drawings based on these drawings without creative efforts. [Figure 1] FIG. 1 is a schematic cross-sectional view of a display panel according to a conventional technique. [Diagram 2] 1 is a schematic plan view of a display panel provided by an embodiment of the present application; [Diagram 3] 3 is a partial schematic diagram of the display panel shown in FIG. 2. [Figure 4A] 3 is a schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 4B] 3 is another schematic cross-sectional view of the display panel shown in FIG. 2. [Diagram 5] 3 is another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 6] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 7] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 8] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 9] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 10] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 11] 3 is yet another schematic cross-sectional view of the display panel shown in FIG. 2. [Figure 12] 3 is a partial cross-sectional schematic diagram of the display panel shown in FIG. 2. [Figure 13] FIG. 2 is a structural schematic diagram of a display device provided by an embodiment of the present application; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] In order to facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings, in which preferred embodiments of the present application are illustrated, although the present application may be embodied in many different forms and is not limited to the embodiments set forth herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more clearly and completely understood.

[0017] Terms such as "first", "second", etc. may be used herein to describe various elements, but it should be understood that they do not indicate order, number, or importance, but are merely used to distinguish between different elements. These terms are used only to distinguish one element from another. For example, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element, without departing from the scope of this application. Similar terms such as "comprise" or "comprise" mean that the element or item appearing before the term includes the element or item appearing after the term and their equivalents, and does not exclude other elements or items.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art. The terms used herein are for the purpose of describing particular examples only and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0019] As shown in FIG. 1, in the process of manufacturing a display panel in the prior art, the structure of the hole area HA usually needs to be cut and removed in order to place a camera. In order to prevent external water and oxygen from entering the display area AA of the display panel through the hole area HA, it is usually necessary to provide blocking posts 6 in the frame area BA. In addition, in order to ensure the reliability of the sealing, it is usually necessary to provide five or more blocking posts 6, which makes the width of the frame area BA wider (the width of the frame area BA is usually larger than 100 μm). As a result of the wider frame area BA, a black border appears around the camera, which affects the visual effect, while the display area AA is compressed, which reduces the effective display area.

[0020] Specifically, the light-emitting units in the display area AA are sealed by a first inorganic sealing layer 3, an organic sealing layer 4, and a second inorganic sealing layer 5, which are stacked one on the other. The frame area BA is sealed by the first inorganic sealing layer 3 and the second inorganic sealing layer 5.

[0021] Through research, the inventors have found that when the light-emitting unit is manufactured, the light-emitting material 2 covers up to the frame area BA, specifically, the light-emitting material 2 covers the surface of the pixel definition layer 7 and the top surface of the blocking pillar 6. In this way, after the first inorganic sealing layer 3 covers the frame area BA, only the first inorganic sealing layer 3 on the sidewall of the blocking pillar 6 can form an effective seal. Because water and oxygen can diffuse along the light-emitting material 2 on the surface of the pixel definition layer 7 and the light-emitting material 2 on the top surface of the blocking pillar 6, the first inorganic sealing layer 3 on the top surface of the blocking pillar 6 and the surface of the pixel definition layer 7 are both ineffective seals. In this case, in order to improve the reliability of the seal, a large number of blocking pillars 6 must be provided, and the width of the frame area BA is wider.

[0022] Furthermore, the inventors utilize a blocking structure for separating adjacent light-emitting units, and by providing the blocking structure around the outer periphery of the first transition region (similar to the frame region), the light-emitting material can be blocked when the light-emitting material of the light-emitting unit is evaporated, and the light-emitting material is eliminated in the first transition region, and thus, in the first transition region, there is no light-emitting material between the first sealing layer and the insulating structure, i.e., there is no light-emitting material on the side of the first sealing layer close to the substrate, and thus the effective sealing area of ​​the first sealing layer can be increased. Therefore, under the premise of achieving a similar sealing effect, the present application can reduce the width of the first transition region (i.e., the frame of the hole region), which is advantageous for improving the visual effect.

[0023] Specifically, as shown in Figures 2, 3, 4A and 12, an embodiment of the present application provides a display panel 10, which may be an organic light emitting diode display panel 10 (abbreviated as OLED) or a quantum dot light emitting diode display panel 10 (abbreviated as QLED).

[0024] The display panel 10 has a perforation region 10a, a display region 10b at least partially surrounding the perforation region 10a, and a first transition region 10c located between the display region 10b and the perforation region 10a.

[0025] The display panel 10 includes a substrate 11, an insulating structure 12, a blocking structure 13, a light-emitting unit 14, and a first encapsulation layer 151. The insulating structure 12 is disposed on the substrate 11 and located in the display area 10b and the first transition area 10c. The blocking structure 13 is disposed on the insulating structure 12 and defines a first opening 13a and a second opening 13b corresponding to the first transition area 10c and the perforated area 10a. The light-emitting unit 14 is disposed on the insulating structure 12 and located in the display area 10b. The light-emitting unit 14 is further disposed in the first opening 13a. The first encapsulation layer 151 is located in the first transition area 10c and covers the surface of the insulating structure 12, i.e., in the first transition area 10c, the first encapsulation layer 151 is in direct contact with the insulating structure 12.

[0026] In the embodiment of the present application, the "blocking structure 13" is a structure that can block the luminescent material of the adjacent light-emitting unit 14 when the luminescent material of the light-emitting unit 14 is evaporated. In the embodiment of the present application, the blocking structure 13 can block the luminescent material of the adjacent light-emitting unit 14 when the luminescent material of the light-emitting unit 14 is evaporated, which is advantageous for manufacturing the light-emitting unit 14 by pixel patterning technology and is free from the constraint of FMM. In one example, the blocking structure 13 can be a single-layer structure, and in another example, the blocking structure 13 can be a multi-layer structure.

[0027] In addition, the first sealing layer 151 is an inorganic film layer. In the embodiment of the present application, the display panel 10 further includes a second sealing layer 152 and a sub-sealing portion 153, the sub-sealing portion 153 correspondingly seals the light-emitting units 14, the second sealing layer 152 is an organic film layer, the second sealing layer 152 covers all the sub-sealing portions 153, the first sealing layer 151 covers the second sealing layer 152, and at the same time, the first sealing layer 151 extends further to cover the first transition region 10c.

[0028] In the embodiment of the present application, as shown in Figures 2 and 3, the display area 10b is arranged around the outer periphery of the perforation area 10a, and the first transition area 10c is also arranged around the outer periphery of the perforation area 10a. In this way, when emitting the luminescent material of the light-emitting unit 14, the blocking structure 13 can block the luminescent material, i.e., block the luminescent material in the first transition area 10c and the luminescent material in the display area 10b. In this way, in the subsequent process, the luminescent material in the first transition area 10c can be removed, and there is no luminescent material in the first transition area 10c. Thus, in the first transition area 10c, there is no luminescent material between the first encapsulation layer 151 and the insulating structure 12, i.e., there is no luminescent material on the side of the first encapsulation layer 151 close to the substrate 11. After the first encapsulation layer 151 covers the first transition area 10c, the area covered by the first encapsulation layer 151 can be effectively encapsulated, so that the effective encapsulation area of ​​the first encapsulation layer 151 can be increased. Therefore, assuming that a similar sealing effect is achieved, the present application makes it possible to reduce the width of the first transition region 10c (i.e., the above-mentioned frame region BA) compared to the display panel 10 in the prior art, thereby alleviating the black edges caused by the wide first transition region 10c, which is advantageous for improving the visual effect, while also making it possible to increase the area of ​​the display region 10b, thereby improving the display effect of the display panel 10.

[0029] In one embodiment, the insulating structure 12 includes a first inorganic layer, and the first encapsulation layer 151 covers a surface of the first inorganic layer in the first transition region 10c.

[0030] In this way, in the first transition region 10c, the first sealing layer 151 is in direct contact with the inorganic film layer, and external water and oxygen are less likely to diffuse into the display region 10b along the boundary between the first sealing layer 151 and the pixel limiting layer 121, which is advantageous for further improving the sealing reliability of the first sealing layer 151 in the first transition region 10c.

[0031] In one embodiment, as shown in Figures 4A, 4B, 5, 6 and 7, the insulating structure 12 includes a pixel confining layer 121, which is a first inorganic layer. Exemplarily, the pixel confining layer 121 is located in the display area 10b and the first transition area 10c, and in the first transition area 10c, the first sealing layer 151 directly contacts the pixel confining layer 121.

[0032] In this way, in the first transition region 10c, the first sealing layer 151 is in direct contact with the pixel limiting layer 121, and external water and oxygen are less likely to diffuse into the display region 10b along the boundary between the first sealing layer 151 and the pixel limiting layer 121, which is advantageous for further improving the sealing reliability of the first sealing layer 151 in the first transition region 10c.

[0033] In one embodiment, the insulating structure 12 further includes a gate insulating layer 122, a capacitance insulating layer 123, and an interlayer dielectric layer 124, and the gate insulating layer 122, the capacitance insulating layer 123, and the interlayer dielectric layer 124 are stacked between the substrate 11 and a first inorganic layer (e.g., the pixel limiting layer 121) along a direction away from the substrate 11. A part of the surface of at least one of the three of the gate insulating layer 122, the capacitance insulating layer 123, and the interlayer dielectric layer 124 is covered by the first sealing layer 151. That is, in the first transition region 10c, the first sealing layer 151 directly contacts at least one of the three of the gate insulating layer 122, the capacitance insulating layer 123, and the interlayer dielectric layer 124.

[0034] In this manner, it is advantageous to increase the sealing area of ​​the first sealing layer 151, thereby lengthening the sealing path of the first sealing layer 151, and further improving the sealing reliability in the first transition region 10c of the first sealing layer 151.

[0035] In one embodiment, the gate insulating layer 122, the capacitance insulating layer 123 and the interlayer dielectric layer 124 are all configured as inorganic film layers. In this way, in the first transition region 10c, the first sealing layer 151 is in direct contact with the inorganic film layer, and external water and oxygen are less likely to diffuse into the display region 10b along the boundary between the first sealing layer 151 and the insulating structure 12, which is advantageous to further improve the sealing reliability of the first sealing layer 151 in the first transition region 10c.

[0036] 8, the display panel 10 further includes a buffer layer 16, which is disposed between the insulating structure 12 and the substrate 11. The first sealing layer 151 further covers a portion of the surface of the buffer layer 16, i.e., in the first transition region 10c, the first sealing layer 151 further directly contacts a portion of the buffer layer 16.

[0037] In this way, it is advantageous to increase the sealing area of ​​the first sealing layer 151, thereby lengthening the sealing path of the first sealing layer 151, and further improving the sealing reliability in the first transition region 10c of the first sealing layer 151.

[0038] In one embodiment, the buffer layer 16 is configured as an inorganic film layer.

[0039] In this way, in the first transition region 10c, the first sealing layer 151 is in direct contact with the inorganic film layer, and external water and oxygen are less likely to diffuse into the display region 10b along the boundary between the first sealing layer 151 and the buffer layer 16, which is advantageous for further improving the sealing reliability of the first sealing layer 151 in the first transition region 10c.

[0040] In one embodiment, as shown in Figures 4A to 8, the substrate 11 has a first region (not shown) corresponding to the hole region 10a, and the orthogonal projection of the insulating structure 12 on the substrate 11 is spaced apart from the first region.

[0041] As can be seen, the edge of the first region is the cutting position, and by being installed as described above, there is a certain distance between the edge of the insulating structure 12 and the cutting position, and when the first region is cut to form the perforation region 10a, the insulating structure 12 is not cut, so that cracks in the insulating structure 12 can be avoided.

[0042] In one embodiment, the substrate 11 includes an underlayer 111 and a barrier layer 112 stacked together, with the barrier layer 112 located between the underlayer 111 and the insulating structure 12 .

[0043] In one embodiment, the orthogonal projection of the barrier layer 112 on the substrate 111 is spaced apart from the first region. In this manner, when the first region is cut to form the hole region 10a, the barrier layer 112 is not cut, and therefore, cracks in the barrier layer 112 can be avoided.

[0044] In one embodiment, the substrate 11, the insulating structure 12, and the first encapsulation layer 151 are flush with their edges adjacent to the hole area 10a. In one example, as shown in FIG. 4B, the underlayer 111, the barrier layer 112, the pixel confinement layer 121, and the first encapsulation layer 151 are flush with their edges adjacent to the hole area 10a.

[0045] In one embodiment, as shown in Figures 4A and 4B, the display panel 10 further includes a dam portion 18 provided on the substrate 11, and the dam portion 18 is located between the display area 10b and the first transition area 10c and is provided around the outer periphery of the first transition area 10c.

[0046] The dam portion 18 blocks the organic material in the display region 10b and prevents the organic material from overflowing into the first transition region 10c.

[0047] In the embodiment of the present application, a second transition region 10d is further provided between the display region 10b and the first transition region 10c, and the second transition region 10d connects the display region 10b and the first transition region 10c.

[0048] In one embodiment, as shown in Figures 4A, 4B, 5, 6 and 7, the dam portion 18 includes a dam bottom portion 181, a dam body 182 and a dam top portion 183 that are stacked along a direction away from the substrate 11.

[0049] In one example, dam bottom 181 is the portion located at the bottom of dam section 18, dam body 182 is the portion located in the middle of dam section 18, and dam top 183 is the portion located on the surface of dam section 18.

[0050] In one embodiment, as shown in Figures 4A, 4B, 5, 6 and 7, the dam top 183 and the pixel confinement layer 121 are provided in the same layer. It can also be understood that the dam top 183 is configured as a part of the pixel confinement layer 121.

[0051] In one embodiment, the material of the dam body 182 includes an organic material. In this manner, the organic material can be used to increase the height of the dam portion 18. In one example, the dam body 182 and a planarization layer (not shown) of the display area 10b are provided in the same layer, that is, the dam body 182 is formed as a part of the planarization layer.

[0052] In one embodiment, the dam bottom 181 and the interlevel dielectric layer 124 are disposed in the same layer. It may also be understood that the dam bottom 181 comprises a portion of the interlevel dielectric layer 124.

[0053] In one embodiment, the dam bottom 181 includes a first portion 1811, a second portion 1812, and a third portion 1813 stacked along a direction away from the substrate 11, the first portion 1811 and the gate insulating layer 122 being provided in the same layer, the second portion 1812 and the capacitance insulating layer 123 being provided in the same layer, and the third portion 1813 and the interlayer dielectric layer 124 being provided in the same layer. It can also be understood that the dam bottom 181 is composed of the gate insulating layer 122, the capacitance insulating layer 123, and the interlayer dielectric layer 124 together.

[0054] The dam portion 18 can be formed by stacking various film layers on the substrate 11, and the embodiment of the present application does not limit the stacking form of the dam portion 18 or the specific configuration of the dam portion 18.

[0055] In one embodiment, as shown in Fig. 9, the dam portion 18 is provided with a second groove 18a. In this manner, it is possible to mitigate the propagation of cracks into the display region 10b.

[0056] In one embodiment, the dam bottom 181 is provided with a second groove 18a penetrating the dam bottom 181, and a portion of the dam body 182 is filled in the second groove 18a.

[0057] In this way, the propagation of the cracks into the display region 10b can be alleviated, while the propagation stress of the cracks can be absorbed by the organic material, further alleviating the propagation of the cracks into the display region 10b.

[0058] In one embodiment, the substrate 11 is provided with an overflow prevention structure. Also, the overflow prevention structure is located on a side of the dam portion 18 adjacent to the display area 10b and / or the overflow prevention structure is located on a side of the dam portion 18 adjacent to the first transition area 10c.

[0059] By providing the overflow prevention structure, it is possible to prevent the organic material in the display region 10b from overflowing into the first transition region 10c.

[0060] In one embodiment, the overflow prevention structure includes an overflow groove 12c. In this way, when the organic material overflows, the organic material can overflow into the overflow groove 12c.

[0061] In one embodiment, the overflow groove 12c penetrates the pixel confinement layer 121 and the interlayer dielectric layer 124 along the thickness direction of the substrate 11, as shown in FIGS.

[0062] In this way, this corresponds to providing overflow groove 12c in pixel limiting layer 121 and interlayer dielectric layer 124. Furthermore, the bottom of overflow groove 12c is located on the surface of capacitive insulating layer 123, and the side walls of overflow groove 12c are located on pixel limiting layer 121 and interlayer dielectric layer 124. Since capacitive insulating layer 123, pixel limiting layer 121, and interlayer dielectric layer 124 are all inorganic film layers, the groove walls of overflow groove 12c are inorganic groove walls, and when the organic material of second sealing layer 152 overflows into overflow groove 12c, an inorganic+organic+inorganic sealing structure can be formed in the region where overflow groove 12c is located, thereby improving the sealing reliability of the region where overflow groove 12c is located.

[0063] In one embodiment, as shown in Figures 4A and 4B, a recess (not shown) is provided on the side of the dam portion 18 adjacent to the display area 10b, and a first inorganic layer (e.g., a pixel limiting layer 121) covers the side walls and bottom wall of the recess and defines an overflow groove 12c.

[0064] In this way, this is equivalent to forming overflow groove 12c by recessing the surface of pixel limiting layer 121. Therefore, the groove wall of overflow groove 12c is also an inorganic groove wall. When the organic material of second sealing layer 152 overflows into overflow groove 12c, an inorganic+organic+inorganic sealing structure can be formed in the area where overflow groove 12c is located, further improving the sealing reliability in the area where overflow groove 12c is located.

[0065] In one embodiment, as shown in Figures 4A and 4B, there is a first distance L between a side of the first transition region 10c close to the hole region 10a and a side of the first transition region 10c away from the hole region 10a, and the first distance L satisfies the relationship 30 μm≦L≦100 μm.

[0066] Exemplarily, the first distance L may be 30 μm, 40 μm, 50 μm, 55 μm, 60 μm, 75 μm, 82 μm, 88 μm, 93 μm, 98 μm, or 100 μm.

[0067] Here, the first distance L corresponds to the width of the first transition region 10c described above. By setting the length of the first distance L within the above range, the width of the first transition region 10c can be reduced, and the black edges caused by the wide first transition region 10c can be reduced, which is advantageous for improving the visual effect, while the area of ​​the display region 10b can be increased, improving the display effect of the display panel 10.

[0068] In one embodiment, as shown in Figures 5, 6, 7, 8, 9, 10 and 11, at least one groove 12a is provided in the first transition region 10c, and the groove 12a penetrates at least a portion of the insulating structure 12 along the thickness direction of the substrate 11, and the first sealing layer 151 further covers the groove walls of the at least one groove 12a.

[0069] By providing groove 12a, the coverage area of ​​first sealing layer 151 in first transition region 10c can be increased, thereby lengthening the sealing path of first sealing layer 151 and further improving the sealing reliability of first sealing layer 151 in first transition region 10c, which is advantageous for reducing the width of first transition region 10c while reducing stress in first transition region 10c, which is advantageous for improving the reliability of display panel 10.

[0070] In one embodiment, a plurality of grooves 12a are provided in the first transition region 10c, the plurality of grooves 12a are arranged at intervals along a radial direction of the perforation region 10a, and the first sealing layer 151 further covers the groove walls of the plurality of grooves 12a. As can be understood, the radial direction of the perforation region 10a is the direction from the perforation region 10a to the display region 10b.

[0071] By providing multiple grooves 12a, the coverage area of ​​first sealing layer 151 in first transition region 10c can be increased, thereby lengthening the sealing path of first sealing layer 151 and further improving the sealing reliability in first transition region 10c of first sealing layer 151.

[0072] In one embodiment, the groove 12 a penetrates the first inorganic layer (eg, the pixel confinement layer 121 ) and the interlevel dielectric layer 124 along the thickness direction of the substrate 11 .

[0073] This corresponds to providing the groove 12a in the pixel limiting layer 121 and the interlayer dielectric layer 124. Furthermore, the bottom of the groove 12a is located on the surface of the capacitance insulating layer 123, and the sidewall of the groove 12a is located on the pixel limiting layer 121 and the interlayer dielectric layer 124. Since the capacitance insulating layer 123, the pixel limiting layer 121, and the interlayer dielectric layer 124 are all inorganic film layers, the groove wall of the groove 12a is an inorganic groove wall, and when the first sealing layer 151 covers the groove wall of the groove 12a, the first sealing layer 151 directly contacts the inorganic groove wall, and external water and oxygen are less likely to diffuse into the display region 10b along the boundary between the first sealing layer 151 and the inorganic groove wall, which is advantageous to further improve the sealing reliability of the first sealing layer 151 in the first transition region 10c.

[0074] In one embodiment, the orthogonal projection of the groove 12a on the substrate 11 is a closed annular pattern, i.e., the groove 12a is an annular groove 12a. Exemplarily, the groove 12a may be a circular annular groove 12a, a rectangular annular groove 12a, a triangular annular groove 12a, etc.

[0075] In one embodiment, as shown in Figures 8, 9, 10 and 11, at least one first groove 12b is further provided in the first transition region 10c, and the at least one first groove 12b is located on the side of the groove 12a close to the hole region 10a. The first groove 12b penetrates the insulating structure 12 along the thickness direction of the substrate 11. The provision of the first groove 12b can mitigate the propagation of cracks in the hole region 10a into the first transition region 10c.

[0076] 6 and 7, the display panel 10 further includes a first planarization layer 17 disposed on the substrate 11, and the first planarization layer 17 is located in the first transition region 10c. Exemplarily, the material of the first planarization layer 17 is an organic material.

[0077] In one embodiment, as shown in FIGS. 8, 9, 10 and 11, the first planarization layer 17 covers the insulating structure 12 in the first transition region 10c and fills in the first grooves 12b.

[0078] In this way, the first planarization layer 17 can absorb the propagation stress of the crack, and further reduces the propagation of the crack into the first transition region 10c.

[0079] In one embodiment, the orthogonal projection of the first planarization layer 17 on the substrate 11 is spaced apart from the perforated area 10a.

[0080] By installing it as described above, there is a certain distance between the edge of the first planarization layer 17 and the cutting position, and when cutting the hole drilling area 10a, the first planarization layer 17 is not cut, so that cutting defects in the first planarization layer 17 can be avoided.

[0081] In another example, as shown in Fig. 7, the orthogonal projection of the first planarization layer 17 on the substrate 11 is overlapped with the edge of the hole opening region 10a. In this way, when cutting the hole opening region 10a, since the first planarization layer 17 is an organic film layer, the first planarization layer 17 can absorb the stress on the substrate 11 and reduce the tendency of cracks to occur in the substrate 11. As can be seen, since the first planarization layer 17 is an organic film layer, no cracks will occur in the first planarization layer 17 when cutting the first planarization layer 17.

[0082] In one embodiment, a plurality of first grooves 12b are provided in the first transition region 10c, and the plurality of first grooves 12b are arranged at intervals along the radial direction of the drilling region 10a.

[0083] By providing a plurality of first grooves 12b, the ability to mitigate the propagation of cracks can be improved, and the reliability of the display panel 10 can be improved.

[0084] In one embodiment, the display area 10b is also provided with a first planarization layer 17, which is located between the pixel confinement layer 121 and the interlayer dielectric layer 124, as shown in FIG.

[0085] In one embodiment, as shown in FIG. 12 , the blocking structure 13 includes a blocking body (not shown) and a barrier portion (not shown) stacked in a direction away from the substrate 11, and the outer contour of the orthogonal projection of the bottom surface of the barrier portion on the substrate 11 is located at the outer periphery of the outer contour of the orthogonal projection of the top surface of the blocking body on the substrate 11.

[0086] In this way, an undercut structure can be formed in the blocking structure 13, thereby blocking the luminescent material of the adjacent light-emitting unit 14.

[0087] In one embodiment, the blocking body includes a first metal layer (not shown), and the light-emitting unit 14 includes a first electrode (not shown), a light-emitting functional portion (not shown) and a second electrode (not shown) stacked along a direction away from the substrate 11, and the second electrode is electrically connected to the first metal layer.

[0088] As can be understood, the first electrode may be an anode and the second electrode may be a cathode. A pixel driving circuit is formed on the substrate 11, and both the first electrode and the second electrode are electrically connected to the pixel driving circuit. The light-emitting functional part includes at least an emission layer (EML), and may further include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron injection layer (EIL), an electron transport layer (ETL), a hole block layer (HBL) and an electron block layer (EBL). Alternatively, the light-emitting functional part may be a stacked light-emitting layer, i.e., includes at least two light-emitting layers and a charge generation layer (CGL) located between each adjacent light-emitting layer.

[0089] In one example, the material of the barrier includes at least one of a metal and a metal oxide. Illustratively, the metal may be silver, copper, titanium, aluminum, etc. The metal oxide may be tin oxide, zinc oxide, cadmium oxide, indium oxide, indium tin oxide, indium zinc oxide, zinc gallium oxide, zinc aluminum oxide, titanium tantalum oxide, etc.

[0090] In one example, the interrupter includes a first metal layer (not shown) and a second metal layer (not shown) stacked in a direction away from the substrate 11, and the outer contour of the first metal layer as orthogonally projected on the substrate 11 is located on the outer periphery of the outer contour of the second metal layer as orthogonally projected on the substrate 11. Here, the first metal layer and the second metal layer are stacked in order in a direction away from the substrate 11. In one example, the material of the first metal layer may be Mo, and the material of the second metal layer may be Al.

[0091] In one embodiment, the barrier section is a metal structure, i.e., the material of the barrier section is a metal. Exemplarily, the material of the barrier section is Ti. In this way, by providing three stacked metal layers, the resistance of the blocking structure 13 can be reduced, and thus the power consumption of the display panel 10 can be reduced.

[0092] In one example, the cross-sectional shape of the blocking structure 13, which is jointly constituted by the first metal layer, the second metal layer and the barrier portion, may be an "U" shape.

[0093] As a second aspect, as shown in FIG. 13, an embodiment of the present application provides a display device 1 including a display panel 10 according to any of the embodiments of the first aspect.

[0094] The display device 1 may be a laptop, a mobile phone, a wireless device, a Personal Digital Assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a video camera, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display (e.g., an odometer display, etc.), a navigator, a cabin controller and / or display, a camera view display (e.g., a rear view camera display in a vehicle), an electronic photograph, an electronic sign or signboard, a projector, etc.

[0095] According to the display device provided by the embodiment of the present application, when the luminescent material of the luminescent unit 14 is deposited, the blocking structure 13 can block the luminescent material, i.e., block the luminescent material in the first transition region 10c and the luminescent material in the display region 10b. In this way, in the subsequent process, the luminescent material in the first transition region 10c can be removed, and there is no luminescent material in the first transition region 10c, and thus, in the first transition region 10c, there is no luminescent material between the first encapsulation layer 151 and the insulating structure 12, i.e., there is no luminescent material on the side of the first encapsulation layer 151 close to the substrate 11, and after the first encapsulation layer 151 covers the first transition region 10c, the area covered by the first encapsulation layer 151 can all be effectively encapsulated, so that the effective encapsulation area of ​​the first encapsulation layer 151 can be increased. Therefore, assuming that a similar sealing effect is achieved, the present application makes it possible to reduce the width of the first transition region 10c (i.e., the above-mentioned frame region BA) compared to the display panel 10 in the prior art, thereby reducing the black edges caused by the wide first transition region 10c, which is advantageous for improving the visual effect, while also making it possible to increase the area of ​​the display region 10b, thereby improving the display effect of the display panel 10.

[0096] When the terms "comprising," "having," and "including" are used herein, other elements may be added unless an expressly limiting term such as "only," "consisting of," or the like is used. Unless otherwise indicated, singular terms can include plurals and should not be construed as being one in number.

[0097] The technical features of the above embodiments can be combined in any combination. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, any combination should be considered within the scope described in this specification.

[0098] The above examples only show some embodiments of the present application, and the description is more specific and detailed, but this should not be understood as limiting the scope of the claims. It should be noted that a person skilled in the art can make several modifications and improvements without departing from the concept of the present application, all of which are within the scope of protection of the present application. Therefore, the scope of protection of the patent of the present application should be based on the scope of the attached claims. [Explanation of symbols]

[0099] 2 light emitting material, 3 first inorganic encapsulation layer, 4 organic encapsulation layer, 5 second inorganic encapsulation layer, 6 blocking pillar, 7 pixel defining layer; 1 display device, 10 display panel, 10a hole opening region, 10b display region, 10c first transition region, 10d second transition region, 11 substrate, 111 undercoat, 112 barrier layer, 12 insulating structure, 12a groove, 12b first groove, 12c overflow groove, 121 pixel limiting layer, 122 gate insulating layer, 123 capacitance insulating layer, 124 interlayer dielectric layer, 13 blocking structure, 13a first opening, 13b second opening, 14 light emitting unit, 151 first sealing layer, 152 second sealing layer, 153 sub sealing portion, 16 buffer layer, 17 first planarization layer, 18 dam portion, 18a second groove, 181 dam bottom, 1811 first portion, 1812 second portion, 1813 third portion, 182 dam body, 183 The top of the dam.

Claims

1. A display panel, The display panel has a hole region, a display region at least partially surrounding the hole region, and a first transition region located between the display region and the hole region; The display panel includes a substrate, an insulating structure, a blocking structure, a light emitting unit, and a first encapsulation layer; the insulating structure is disposed on the substrate and is located in the display area and the first transition area; the blocking structure is disposed in the insulating structure and defines a first opening and a second opening corresponding to the first transition region and the perforation region; The light emitting unit is disposed in the insulating structure and located in the display area, and the light emitting unit is further disposed in the first opening; The first sealing layer is located in the first transition region and covers a surface of the insulating structure.

2. The insulating structure includes a first inorganic layer, and the first sealing layer covers a surface of the first inorganic layer; Optionally, the insulating structure includes a pixel confinement layer, the pixel confinement layer being the first inorganic layer; Optionally, the insulating structure further includes a gate insulating layer, a capacitance insulating layer, and an interlayer dielectric layer, the gate insulating layer, the capacitance insulating layer, and the interlayer dielectric layer being stacked between the substrate and the first inorganic layer along a direction away from the substrate; a portion of a surface of at least one of the gate insulating layer, the capacitance insulating layer, and the interlayer dielectric layer is covered with the first sealing layer; Optionally, the gate insulating layer, the capacitance insulating layer and the interlayer dielectric layer are all configured as inorganic film layers; Optionally, the display panel further includes a buffer layer, the buffer layer being disposed between the insulating structure and the substrate, and the first sealing layer further covers a portion of a surface of the buffer layer; Optionally, the buffer layer is configured as an inorganic membrane layer; 2. The display panel of claim 1, wherein the substrate optionally has a first region corresponding to the hole region, and a perpendicular projection of the insulating structure on the substrate is spaced apart from the first region.

3. At least one groove is provided in the first transition region, the groove penetrating at least a portion of the insulating structure along a thickness direction of the substrate, and the first sealing layer further covers a groove wall of the at least one groove; Optionally, a plurality of the grooves are provided in the first transition region, the plurality of grooves being arranged at intervals along a radial direction of the perforation region, and the first sealing layer further covers groove walls of the plurality of grooves; Optionally, the groove penetrates the first inorganic layer and the interlayer dielectric layer along a thickness direction of the substrate; 3. The display panel of claim 2, wherein optionally, the orthogonal projection of the grooves in the substrate is a closed circular pattern.

4. At least one first groove is further provided in the first transition region, the at least one first groove being located on a side of the groove adjacent to the perforation region, the first groove penetrating the insulating structure along a thickness direction of the substrate; Optionally, the display panel further includes a first planarization layer disposed on the substrate, the first planarization layer being located in the first transition region; Optionally, the first planarization layer covers the insulating structure of the first transition region and is filled in the first groove; Optionally, an orthogonal projection of the first planarization layer on the substrate is spaced apart from the aperture area; The display panel of claim 3, characterized in that a plurality of the first grooves are selectively provided in the first transition region, and the plurality of the first grooves are arranged at intervals along a radial direction of the hole region.

5. The display panel further includes a dam portion provided on the substrate, the dam portion being located between the display area and the first transition area and surrounding the first transition area, Optionally, the dam portion includes a dam bottom portion, a dam body, and a dam top portion stacked along a direction away from the substrate, Optionally, the dam top and the pixel definition layer are provided in the same layer; Optionally, the material of the dam body includes an organic material; Optionally, the dam bottom and the interlevel dielectric layer are disposed in the same layer; Optionally, the dam bottom includes a first portion, a second portion, and a third portion stacked along a direction away from the substrate, the first portion and the gate insulating layer being provided in the same layer, the second portion and the capacitive insulating layer being provided in the same layer, and the third portion and the interlayer dielectric layer being provided in the same layer; Optionally, the dam portion is provided with a second groove, 3. The display panel according to claim 2, wherein the dam bottom is selectively provided with the second groove penetrating the dam bottom, and a portion of the dam body is filled in the second groove.

6. The substrate is provided with an overflow prevention structure; the overflow prevention structure is located on a side of the dam portion adjacent to the display area, and / or the overflow prevention structure is located on a side of the dam portion adjacent to the first transition area, Optionally, the overflow prevention structure includes an overflow groove; Optionally, the overflow groove penetrates the pixel confinement layer and the interlayer dielectric layer along a thickness direction of the substrate; The display panel according to claim 5, characterized in that a recess is selectively provided on the side of the dam portion adjacent to the display area, and the first inorganic layer covers the side walls and bottom wall of the recess and defines the overflow groove.

7. A display panel as described in any one of claims 1 to 6, characterized in that a first distance L is provided between a side of the first transition region close to the hole opening region and a side of the first transition region away from the hole opening region, and the first distance L satisfies the relationship 30 μm≦L≦100 μm.

8. the substrate includes an underlayer and a barrier layer disposed in a stacked manner, the barrier layer being located between the underlayer and the insulating structure; 7. The display panel according to claim 1, wherein the orthogonal projection of the barrier layer on the base is selectively spaced from the perforation area.

9. the blocking structure includes a blocking body and a barrier section stacked in a direction away from the substrate, an outer contour of an orthogonal projection of a bottom surface of the barrier section on the substrate is positioned on an outer periphery of an outer contour of an orthogonal projection of a top surface of the blocking body on the substrate, Optionally, the blocking body includes a first metal layer, the light emitting unit includes a first electrode, a light emitting function part, and a second electrode stacked along a direction away from the substrate, and the second electrode is electrically connected to the first metal layer; Optionally, the isolator further comprises a second metal layer located on a side of the first metal layer adjacent to the substrate; 7. The display panel according to any one of claims 1 to 6, characterized in that optionally, the barrier portion is a metal structure.

10. A display device comprising the display panel according to any one of claims 1 to 6.

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