Substrate processing method and substrate processing device

Abstract

To provide a substrate processing method and a substrate processing device that improve productivity.SOLUTION: A substrate processing method includes the steps of: (A) preparing a substrate including an electrode array in which a plurality of electrodes are disposed on a surface of the substrate; (B) forming a light-emitting layer, an electrode layer, and a first sealing layer in the entire electrode array; (C) forming a mask on one kind of the electrodes of the plurality of over the first sealing layer; (D) forming a multilayer body in which the one kind of electrodes, the light-emitting layer, the electrode layer, and the first sealing layer are stacked by performing an etching process on the substrate using the mask; (E) forming a second sealing layer in the entire electrode array; and (F) forming the second sealing layer covering a side wall of the multilayer body by performing an anisotropic etching process on the substrate.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a substrate processing method and a substrate processing apparatus. [Background technology]

[0002] Patent Document 1 discloses a subpixel circuit and a method for forming a subpixel circuit that can be used in displays such as organic light-emitting diode displays. The subpixels are formed by coating an organic EL (Electro Luminescence) layer using an overhang structure formed on an adjacent PDL (Pixel Defining Layer) structure. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent Application Publication No. 2022 / 0077257 Summary of the Invention [Problem to be solved by the invention]

[0004] In one aspect, the present disclosure provides a substrate processing method and a substrate processing apparatus that improve productivity. [Means for solving the problem]

[0005] In order to solve the above problem, according to one aspect, a substrate processing method can be provided, comprising the steps of: (A) preparing a substrate having an electrode array in which a plurality of electrodes are arranged on a substrate surface; (B) forming an emitting layer, an electrode layer, and a first sealing layer over the entire electrode array; (C) forming a mask on the first sealing layer over one type of electrode among the plurality of electrodes; (D) performing an etching process on the substrate using the mask to form a laminate in which the one type of electrode, the emitting layer, the electrode layer, and the first sealing layer are stacked; (E) forming a second sealing layer over the entire electrode array; and (F) performing an anisotropic etching process on the substrate to form the second sealing layer covering the sidewalls of the laminate. Effect of the Invention

[0006] According to one aspect, it is possible to provide a substrate processing method and a substrate processing apparatus that improve productivity. [Brief description of the drawings]

[0007] [Figure 1] 4 is a flowchart showing an example of a substrate processing method according to the present embodiment. [Diagram 2] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Diagram 3] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 4] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Diagram 5] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 6] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 7] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 8] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 9] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 10] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 11]5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 12] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 13] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 14] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 15] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 16] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 17] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 18] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 19] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 20] 5A to 5C are schematic cross-sectional views of a substrate in each process; [Figure 21] 13 is an example of a transition of a sealing film etching rate with respect to bias input power. [Figure 22] FIG. 2 is a plan view showing an example of a configuration of a first substrate processing system. [Figure 23] FIG. 13 is a plan view showing an example of a configuration of a second substrate processing system. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In the technology of Patent Document 1, the number of steps increases due to the increased number of photolithography processes in forming the overhang structure, and there is a risk of deterioration of the anode electrode due to the effects of moisture and oxygen in the air during wet etching. In addition, sealing the sides of the organic EL layer and the cathode electrode blocked by the overhang structure is very difficult.

[0009] Various exemplary embodiments will now be described in detail with reference to the drawings, in which the same or corresponding parts are designated by the same reference numerals.

[0010] <Substrate processing method> An example of a substrate processing method for forming a plurality of types of organic EL elements on a substrate will be described with reference to Fig. 1 to Fig. 20. Fig. 1 is a flow chart showing an example of a substrate processing method according to the present embodiment. Fig. 2 to Fig. 20 are examples of schematic cross-sectional views of a substrate in each process.

[0011] Here, a substrate processing method for forming three types of organic EL elements on a substrate is taken as an example. Specifically, a case where an organic EL element that emits red (R), an organic EL element that emits green (G), and an organic EL element that emits blue (B) is formed on a substrate is taken as an example. The organic EL element is composed of an anode electrode, a light-emitting layer, and a cathode electrode laminated together.

[0012] The number of types of organic EL elements formed on the substrate is not limited to three, and may be one type or two or more types.

[0013] In step S101, a substrate is prepared.

[0014] FIG. 2 is an example of a schematic cross-sectional view of the substrate prepared in step S101. The substrate includes a base material 300 and an electrode array 310. The base material 300 is made of, for example, a glass plate. The base material 300 is not limited to this, and may be a ceramic plate, a plastic plate, a metal plate, a silicon plate, or the like, and the material is not limited. The base material 300 may be made of an insulating material. The base material 300 may be made of a light-transmitting material. The shape of the substrate (base material 300) may be rectangular, circular, or the like, and the shape is not limited.

[0015] The electrode array 310 has a plurality of anode electrodes 311, 312, and 313. Here, the electrode array 310 includes a first anode electrode 311, a second anode electrode 312, and a third anode electrode 313. The plurality of anode electrodes 311, 312, and 313 are made of, for example, indium tin oxide (ITO). Note that the plurality of anode electrodes 311, 312, and 313 are not limited to this, and a layer made of silver or aluminum may be added as a base between the base material 300 and the anode electrodes 311, 312, and 313. The plurality of anode electrodes 311, 312, and 313 may be made of a material having electrical conductivity. The plurality of anode electrodes 311, 312, and 313 may be made of a material having translucency. Furthermore, the multiple anode electrodes 311, 312, and 313 are disposed at different positions on the surface of the substrate (base material 300).

[0016] In addition, in step S101, a substrate having the electrode array 310 is prepared, but this is not limited to the above. Step S101 may include a process of forming the electrode array 310 on the substrate (base material 300).

[0017] In step S102, the first light-emitting layer 321 is formed on the substrate. Here, a continuous film of the first light-emitting layer 321 is formed so as to cover the entire electrode array 310. The first light-emitting layer 321 is a light-emitting layer (organic EL layer) that includes an organic EL and emits light of a specific color (e.g., red (R)) when a voltage is applied between the electrodes (the first anode electrode 311 and the first cathode electrode 331 described later). The first light-emitting layer 321 is formed by, for example, vacuum deposition or the like.

[0018] In step S103, the first cathode electrode 331 is formed on the substrate. Here, a continuous film of the first cathode electrode 331 is formed on the first light emitting layer 321. The first cathode electrode 331 is made of, for example, ITO, IZO, etc., and a layer made of MgAg may be added as a base between the first light emitting layer 321 and the first cathode electrode 331. In addition, when a cavity structure is provided, MgAg may be used as the cathode electrode material. The formation process of the first cathode electrode 331 is performed by any one of film formation processes such as vacuum deposition, PVD (Physical Vapor Deposition) film formation, CVD (Chemical Vapor Deposition) film formation, ALD (Atomic Layer Deposition) film formation, etc., or a combination thereof.

[0019] In step S104, the first sealing layer 341 is formed on the substrate. Here, a continuous film of the first sealing layer 341 is formed on the first cathode electrode 331. The first sealing layer 341 includes a first inorganic insulating film. The first inorganic insulating film is composed of, for example, a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), or a combination of these. The first sealing layer 341 is formed by, for example, a film formation process such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. The first light emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 are formed in a vacuum atmosphere.

[0020] 3 is an example of a schematic cross-sectional view of the substrate after the process of step S104. A first light-emitting layer 321 is formed on the electrode array 310 (first anode electrode 311, second anode electrode 312, third anode electrode 313). A first cathode electrode 331 is formed on the first light-emitting layer 321. A first sealing layer 341 is formed on the first cathode electrode 331.

[0021] The multiple anode electrodes 311, 312, 313, the first light-emitting layer 321, and the first cathode electrode 331 are sealed by a first sealing layer 341. This prevents the multiple anode electrodes 311, 312, 313, the first light-emitting layer 321, and the first cathode electrode 331 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0022] In step S105, a first mask 351 is formed on the substrate. Here, the first mask 351 is formed on the substrate by photolithography. The photolithography process includes a resist forming process, an exposure process, and a development process. The resist forming process forms a photoresist on the substrate. The exposure process irradiates the substrate on which the photoresist is formed with light such as ultraviolet (UV) or deep ultraviolet (DUV) through a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. The development process forms the first mask 351 from the photoresist. In the case of a positive photoresist, the photoresist in the exposed portion is removed and the photoresist in the unexposed portion is left to form the first mask 351. On the other hand, in the case of a negative photoresist, the photoresist in the unexposed portion is removed and the photoresist in the exposed portion is left to form the first mask 351. The formation process of the first mask 351 is performed in an air atmosphere.

[0023] 4 is an example of a schematic cross-sectional view of the substrate after the process of step S105. The first mask 351 is selectively formed on the first anode electrode 311. On the other hand, the first mask 351 is not formed on the second anode electrode 312 and the third anode electrode 313.

[0024] In step S106, an etching process is performed on the substrate. Here, the first sealing layer 341, the first cathode electrode 331, and the first light-emitting layer 321 are etched by plasma etching through the first mask 351. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0025] 5(a) and 5(b) are examples of schematic cross-sectional views of the substrate after the process of step S106. The first sealing layer 341, the first cathode electrode 331, and the first light-emitting layer 321 are removed on the second anode electrode 312 and the third anode electrode 313. On the other hand, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 covered with the first mask 351 remain on the first anode electrode 311. In this manner, a first laminate (organic EL element) in which the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 are laminated is formed on the substrate by the processes of steps S102 to S106. As shown in FIG. 5(a), the first mask 351 may remain on the first laminate. Furthermore, as shown in FIG. 5(b), the first mask 351 on the first stack may be entirely ashed and removed in an etching process.

[0026] In step S107, the second sealing layer 342 is formed on the substrate. Here, a continuous film of the second sealing layer 342 is formed so as to cover the entire electrode array 310. The second sealing layer 342 includes a second inorganic insulating film. The second inorganic insulating film is composed of, for example, a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), or a combination of these. The second sealing layer 342 is formed by, for example, a film formation process such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. The second sealing layer 342 is formed in a vacuum atmosphere.

[0027] 6(a) and 6(b) are examples of schematic cross-sectional views of the substrate after the process of step S107.

[0028] In the case where the first mask 351 remains on the first laminate in step S106 (see FIG. 5(a)), as shown in FIG. 6(a), the second sealing layer 342 is formed so as to cover the upper surface and side walls of the laminated structure of the first laminate (the first anode electrode 311, the first light emitting layer 321, the first cathode electrode 331, and the first sealing layer 341) and the first mask 351. In addition, the second sealing layer 342 is formed so as to cover the second anode electrode 312 and the third anode electrode 313. Here, the thickness in the height direction of the second sealing layer 342 formed on the side walls of the laminated structure of the first laminate and the first mask 351 is thicker than the thickness of the second sealing layer 342 formed on the plane (the upper surface of the laminated structure of the first laminate and the first mask 351, the upper surface of the second anode electrode 312, the upper surface of the third anode electrode 313, etc.).

[0029] When the first mask 351 is entirely removed in step S106 (see FIG. 5(b)), as shown in FIG. 6(b), the second sealing layer 342 is formed so as to cover the upper surface and side walls of the first stack (the first anode electrode 311, the first light emitting layer 321, the first cathode electrode 331, and the first sealing layer 341). The second sealing layer 342 is also formed so as to cover the second anode electrode 312 and the third anode electrode 313. Here, the thickness in the height direction of the second sealing layer 342 formed on the side walls of the first stack is thicker than the thickness of the second sealing layer 342 formed on the planes (the upper surface of the first stack, the upper surface of the second anode electrode 312, the upper surface of the third anode electrode 313, etc.).

[0030] In step S108, the substrate is subjected to an etching process. Here, second sealing layer 342 is etched (anisotropically etched) in a direction perpendicular to the substrate by a plasma etching process. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0031] 7 is an example of a schematic cross-sectional view of the substrate after the process of step S108. The second sealing layer 342 is removed from above the second anode electrode 312 and the third anode electrode 313. The second sealing layer 342 formed on the upper surface of the first stack is also removed. If the first mask 351 is stacked on the first stack (see FIG. 6(a)), the first mask 351 is also removed by the etching process together with the second sealing layer 342 formed on the upper surface of the first stack.

[0032] On the other hand, as shown in Figures 6(a) and 6(b), the second sealing layer 342 formed on the side wall of the first laminate has a large thickness when viewed in a direction perpendicular to the substrate. Therefore, by etching the second sealing layer 342 in a direction perpendicular to the substrate, the second sealing layer 342 formed on the side wall of the first laminate remains as shown in Figure 7. Therefore, the upper surface of the first laminate is sealed by the first sealing layer 341, and the side wall of the first laminate is sealed by the second sealing layer 342. This prevents the first anode electrode 311, the first light-emitting layer 321, and the first cathode electrode 331 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0033] 6(a), by forming the second sealing layer 342 with the first mask 351 on the first stack (first anode electrode 311, first light emitting layer 321, first cathode electrode 331, first sealing layer 341), the second sealing layer 342 formed on the side wall of the first stack can have a large thickness when viewed in the direction perpendicular to the substrate. This allows the second sealing layer 342 to be appropriately left on the side wall of the first stack in the etching process in step S108.

[0034] In step S109, the second light-emitting layer 322 is formed on the substrate. Here, a continuous film of the second light-emitting layer 322 is formed so as to cover the entire electrode array 310. The second light-emitting layer 322 is a light-emitting layer (organic EL layer) that includes an organic EL and emits light of a specific color (e.g., green (G)) when a voltage is applied between the electrodes (the second anode electrode 312, and the second cathode electrode 332 described later). The second light-emitting layer 322 is formed by, for example, vacuum deposition or the like.

[0035] In step S110, the second cathode electrode 332 is formed on the substrate. Here, a continuous film of the second cathode electrode 332 is formed on the second light emitting layer 322. The second cathode electrode 332 is made of, for example, ITO, IZO, etc., and a layer made of MgAg may be added as a base between the second light emitting layer 322 and the second cathode electrode 332. In addition, when a cavity structure is provided, MgAg may be used as the cathode electrode material. The second cathode electrode 332 is formed by, for example, any of the film formation processes such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, etc., or a combination thereof.

[0036] In step S111, the third sealing layer 343 is formed on the substrate. Here, a continuous film of the third sealing layer 343 is formed on the second cathode electrode 332. The third sealing layer 343 includes a third inorganic insulating film. The third inorganic insulating film is composed of, for example, a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), or a combination of these. The third sealing layer 343 is formed by, for example, a film formation process such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. The second light emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 are formed in a vacuum atmosphere.

[0037] 8 is an example of a schematic cross-sectional view of the substrate after the process of step S111. A second light-emitting layer 322 is formed on the electrode array 310 (first anode electrode 311, second anode electrode 312, third anode electrode 313). A second cathode electrode 332 is formed on the second light-emitting layer 322. A third sealing layer 343 is formed on the second cathode electrode 332. The second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 are also formed on the first stack (first anode electrode 311, first light-emitting layer 321, first cathode electrode 331, and first sealing layer 341).

[0038] The multiple anode electrodes 311, 312, 313, the first and second light emitting layers 321, 322, and the first and second cathode electrodes 331, 332 are sealed by a third sealing layer 343. This prevents the multiple anode electrodes 311, 312, 313, the first and second light emitting layers 321, 322, and the first and second cathode electrodes 331, 332 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0039] In step S112, a second mask 352 is formed on the substrate. Here, the second mask 352 is formed on the substrate by photolithography. The photolithography process includes a resist forming process, an exposure process, and a development process. The resist forming process forms a photoresist on the substrate. The exposure process irradiates the substrate on which the photoresist is formed with light through a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. The development process forms the second mask 352 from the photoresist. In the case of a positive photoresist, the photoresist in the exposed portion is removed and the photoresist in the unexposed portion is left to form the second mask 352. On the other hand, in the case of a negative photoresist, the photoresist in the unexposed portion is removed and the photoresist in the exposed portion is left to form the second mask 352. The formation process of the second mask 352 is performed in an air atmosphere.

[0040] 9 is an example of a schematic cross-sectional view of the substrate after the process of step S112. The second mask 352 is selectively formed on the second anode electrode 312. On the other hand, the second mask 352 is not formed on the first anode electrode 311 and the third anode electrode 313.

[0041] In step S113, an etching process is performed on the substrate. Here, the third sealing layer 343, the second cathode electrode 332, and the second light-emitting layer 322 are etched by plasma etching through the second mask 352. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0042] FIG. 10 is an example of a schematic cross-sectional view of the substrate after the process of step S113. The third sealing layer 343, the second cathode electrode 332, and the second light-emitting layer 322 are removed from the first laminate (first anode electrode 311) and the third anode electrode 313. Meanwhile, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 covered with the second mask 352 remain on the second anode electrode 312. In this manner, a second laminate (organic EL element) in which the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 are laminated is formed on the substrate by the processes of steps S109 to S113. As shown in FIG. 10, the second mask 352 may remain on the second laminate. Furthermore, the second mask 352 on the second stack may be entirely removed by ashing in an etching process (see FIG. 5(b)).

[0043] In step S114, fourth sealing layer 344 is formed on the substrate. Here, a continuous film of fourth sealing layer 344 is formed so as to cover the entire electrode array 310. Fourth sealing layer 344 includes a fourth inorganic insulating film. Fourth inorganic insulating film is composed of, for example, silicon oxide film (SiO), silicon nitride film (SiN), silicon oxynitride film (SiON), aluminum oxide (AlO), etc., or a combination of these. The formation process of fourth sealing layer 344 is performed by, for example, any of film formation processes such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, etc., or a combination of these. The formation process of fourth sealing layer 344 is performed in a vacuum atmosphere.

[0044] FIG. 11 is an example of a schematic cross-sectional view of the substrate after the process of step S114.

[0045] In the case where the second mask 352 remains on the second stack in step S113 (see FIG. 10), as shown in FIG. 11, a fourth sealing layer 344 is formed so as to cover the upper surface and side walls of the stacked structure of the second stack (the second anode electrode 312, the second light emitting layer 322, the second cathode electrode 332, and the third sealing layer 343) and the second mask 352. Also, a fourth sealing layer 344 is formed so as to cover the first stack (the first anode electrode 311, the first light emitting layer 321, the first cathode electrode 331, the first and second sealing layers 341 and 342) and the third anode electrode 313. Here, the thickness in the height direction of the fourth sealing layer 344 formed on the side walls of the stacked structure of the second stack and the second mask 352 is thicker than the thickness of the fourth sealing layer 344 formed on the plane (the upper surface of the stacked structure of the second stack and the second mask 352, the upper surface of the third anode electrode 313, etc.).

[0046] In step S115, an etching process is performed on the substrate. Here, fourth sealing layer 344 is etched (anisotropically etched) in a direction perpendicular to the substrate by a plasma etching process. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0047] 12 is an example of a schematic cross-sectional view of the substrate after the process of step S115. The fourth sealing layer 344 is removed from above the first stack and the third anode electrode 313. The fourth sealing layer 344 formed on the upper surface of the second stack is also removed. If the second mask 352 is stacked on the second stack (see FIG. 11), the second mask 352 is also removed by the etching process together with the fourth sealing layer 344 formed on the upper surface of the second stack.

[0048] On the other hand, as shown in Fig. 11, the fourth sealing layer 344 formed on the side wall of the second laminate has a large thickness when viewed in a direction perpendicular to the substrate. Therefore, by etching the fourth sealing layer 344 in a direction perpendicular to the substrate, the fourth sealing layer 344 formed on the side wall of the second laminate remains as shown in Fig. 12. Therefore, the upper surface of the second laminate is sealed by the third sealing layer 343, and the side wall of the second laminate is sealed by the fourth sealing layer 344. This prevents the second anode electrode 312, the second light-emitting layer 322, and the second cathode electrode 332 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0049] 12, fourth sealing layer 344 formed on the side wall of second sealing layer 342 covering the first stack remains as well.

[0050] In step S116, the third light-emitting layer 323 is formed on the substrate. Here, a continuous film of the third light-emitting layer 323 is formed so as to cover the entire electrode array 310. The third light-emitting layer 323 is a light-emitting layer (organic EL layer) that includes an organic EL and emits light of a specific color (e.g., blue (B)) when a voltage is applied between the electrodes (the third anode electrode 313, and the third cathode electrode 333 described later). The formation process of the third light-emitting layer 323 is performed by, for example, vacuum deposition or the like.

[0051] In step S117, the third cathode electrode 333 is formed on the substrate. Here, a continuous film of the third cathode electrode 333 is formed on the third light emitting layer 323. The third cathode electrode 333 is made of, for example, ITO, IZO, etc., and a layer made of MgAg may be added as a base between the third light emitting layer 323 and the third cathode electrode 333. Furthermore, when a cavity structure is provided, MgAg may be used as the cathode electrode material. The formation process of the third cathode electrode 333 is performed by any one of film formation processes such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, etc., or a combination thereof.

[0052] In step S118, the fifth sealing layer 345 is formed on the substrate. Here, a continuous film of the fifth sealing layer 345 is formed on the third cathode electrode 333. The fifth sealing layer 345 includes a fifth inorganic insulating film. The fifth inorganic insulating film is composed of, for example, a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), or a combination of these. The fifth sealing layer 345 is formed by, for example, a film formation process such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. The third light emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 are formed in a vacuum atmosphere.

[0053] 13 is an example of a cross-sectional schematic diagram of the substrate after the process of step S118. A third light-emitting layer 323 is formed on the electrode array 310 (first anode electrode 311, second anode electrode 312, third anode electrode 313). A third cathode electrode 333 is formed on the third light-emitting layer 323. A fifth sealing layer 345 is formed on the third cathode electrode 333. The third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 are also formed on the first stack (first anode electrode 311, first light-emitting layer 321, first cathode electrode 331, and first sealing layer 341) and the second stack (second anode electrode 312, second light-emitting layer 322, second cathode electrode 332, and third sealing layer 343).

[0054] The multiple anode electrodes 311, 312, 313, the first to third light emitting layers 321-323, and the first to third cathode electrodes 331-333 are sealed by a fifth sealing layer 345. This prevents the multiple anode electrodes 311, 312, 313, the first to third light emitting layers 321-323, and the first to third cathode electrodes 331-333 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0055] In step S119, a third mask 353 is formed on the substrate. Here, the third mask 353 is formed on the substrate by photolithography. The photolithography process includes a resist forming process, an exposure process, and a development process. The resist forming process forms a photoresist on the substrate. The exposure process irradiates the substrate on which the photoresist is formed with light through a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. The development process forms the third mask 353 from the photoresist. In the case of a positive photoresist, the third mask 353 is formed by removing the photoresist in the exposed portion and leaving the photoresist in the unexposed portion. On the other hand, in the case of a negative photoresist, the third mask 353 is formed by removing the photoresist in the unexposed portion and leaving the photoresist in the exposed portion. The formation process of the third mask 353 is performed in an air atmosphere.

[0056] 14 is an example of a schematic cross-sectional view of the substrate after the process of step S119. The third mask 353 is selectively formed on the third anode electrode 313. On the other hand, the third mask 353 is not formed on the first anode electrode 311 and the second anode electrode 312.

[0057] In step S120, an etching process is performed on the substrate. Here, the fifth sealing layer 345, the third cathode electrode 333, and the third light-emitting layer 323 are etched by plasma etching through the third mask 353. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0058] FIG. 15 is an example of a schematic cross-sectional view of the substrate after the process of step S120. The fifth sealing layer 345, the third cathode electrode 333, and the third light-emitting layer 323 are removed on the first laminate (first anode electrode 311) and the second laminate (second anode electrode 312). Meanwhile, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 covered with the third mask 353 remain on the third anode electrode 313. In this manner, a third laminate (organic EL element) in which the third anode electrode 313, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 are laminated is formed on the substrate by the processes of steps S116 to S120. As shown in FIG. 15, the third mask 353 may remain on the third laminate. Furthermore, the third mask 353 on the third stack may be entirely removed by ashing in the etching process (see FIG. 5(b)).

[0059] In step S121, sixth sealing layer 346 is formed on the substrate. Here, a continuous film of sixth sealing layer 346 is formed so as to cover the entire electrode array 310. Sixth sealing layer 346 includes a sixth inorganic insulating film. The sixth inorganic insulating film is composed of, for example, a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), aluminum oxide (AlO), or a combination of these. The formation process of sixth sealing layer 346 is performed by, for example, any of a film formation process such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. The formation process of sixth sealing layer 346 is performed in a vacuum atmosphere.

[0060] FIG. 16 is an example of a schematic cross-sectional view of the substrate after the process of step S121.

[0061] In the case where the third mask 353 remains on the third stack in step S120 (see FIG. 15), as shown in FIG. 16, a sixth sealing layer 346 is formed so as to cover the top surface and side walls of the third stack (the third anode electrode 313, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345) and the stacked structure of the third mask 353. In addition, the sixth sealing layer 346 is formed so as to cover the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, the first and second sealing layers 341, 342) and the second stack (the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, the third and fourth sealing layers 343, 344). Here, the height-wise film thickness of the sixth sealing layer 346 formed on the side walls of the stacked structure of the third stack and the third mask 353 is thicker than the film thickness of the sixth sealing layer 346 formed on a plane (such as the top surface of the stacked structure of the third stack and the third mask 353).

[0062] In step S122, an etching process is performed on the substrate. Here, sixth sealing layer 346 is etched (anisotropically etched) in a direction perpendicular to the substrate by a plasma etching process. Note that the etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0063] 17 is an example of a schematic cross-sectional view of the substrate after the process of step S122. The sixth sealing layer 346 is removed from the first stack and the second stack. The sixth sealing layer 346 formed on the upper surface of the third stack is also removed. If the third mask 353 is laminated on the third stack (see FIG. 16), the third mask 353 is also removed by the etching process together with the sixth sealing layer 346 formed on the upper surface of the third stack.

[0064] On the other hand, as shown in Fig. 16, the sixth sealing layer 346 formed on the side wall of the third stack has a large thickness when viewed in a direction perpendicular to the substrate. Therefore, by etching the sixth sealing layer 346 in a direction perpendicular to the substrate, the sixth sealing layer 346 formed on the side wall of the third stack remains as shown in Fig. 17. Therefore, the upper surface of the third stack is sealed by the fifth sealing layer 345, and the side wall of the third stack is sealed by the sixth sealing layer 346. This prevents the third anode electrode 313, the third light-emitting layer 323, and the third cathode electrode 333 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0065] It should be noted that sixth sealing layer 346 formed on the side wall of second sealing layer 342 covering the first stack also remains in the same manner. In Fig. 16, this is indicated by the side wall portion of second sealing layer 342 becoming thicker. It should be noted that sixth sealing layer 346 formed on the side wall of fourth sealing layer 344 covering the second stack also remains in the same manner. In Fig. 16, this is indicated by the side wall portion of fourth sealing layer 344 becoming thicker.

[0066] In step S123, the substrate is subjected to an etching process. Here, the first to sixth sealing layers 341 to 346 are etched (anisotropically etched) in a direction perpendicular to the substrate by a plasma etching process. The etching process is a dry etching process, and is performed in a vacuum atmosphere.

[0067] 18 is an example of a schematic cross-sectional view of the substrate after the process of step S123. Here, the first to sixth sealing layers 341-346 are etched in a direction perpendicular to the substrate to expose the first to third cathode electrodes 331-333. Meanwhile, the second sealing layer 342, the fourth sealing layer 344, and the sixth sealing layer 346 provided on the side walls of the first to third stacked bodies can be left. This prevents the first to third light emitting layers 321-323, the interfaces between the first to third anode electrodes 311-313 and the first to third light emitting layers 321-323, and the interfaces between the first to third cathode electrodes 331-333 and the first to third light emitting layers 321-323 from being exposed to the etching plasma.

[0068] In step S124, the wiring layer 360 is formed on the substrate. Here, a continuous film of the wiring layer 360 is formed on the substrate. The wiring layer 360 is made of, for example, ITO, IZO, or the like. The formation process of the wiring layer 360 is performed by, for example, any one of film formation processes such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination thereof.

[0069] 19 is an example of a schematic cross-sectional view of the substrate after the process of step S124. The wiring layer 360 is electrically connected to the first to third cathode electrodes 331 to 333.

[0070] In step S125, seventh sealing layer 347 is formed on the substrate. Here, a continuous film of seventh sealing layer 347 is formed on the substrate on which wiring layer 360 is formed. Seventh sealing layer 347 includes a seventh inorganic insulating film. Seventh inorganic insulating film is composed of, for example, silicon oxide film (SiO), silicon nitride film (SiN), silicon oxynitride film (SiON), aluminum oxide (AlO), or a combination of these. Note that the formation process of seventh sealing layer 347 is performed by, for example, any of film formation processes such as vacuum deposition, PVD film formation, CVD film formation, ALD film formation, or a combination of these. Also, the formation process of seventh sealing layer 347 is performed in a vacuum atmosphere.

[0071] 20 is an example of a schematic cross-sectional view of the substrate after the process of step S125. The seventh sealing layer 347 seals the first to third stacked bodies and the wiring layer 360. This prevents the first to third anode electrodes 311-313, the first to third light emitting layers 321-323, the first to third cathode electrodes 331-333, and the wiring layer 360 from coming into contact with oxygen, moisture, and the like when the substrate is exposed to the air atmosphere.

[0072] As described above, according to the substrate processing method of this embodiment, three types of organic EL elements that respectively emit red (R), green (G), and blue (B) colors can be formed on a substrate.

[0073] Furthermore, the substrate processing method according to this embodiment prevents the electrodes (the anode electrodes 311-313 and the cathode electrodes 331-333) and the light-emitting layers 321-323 from being altered by moisture, oxygen, etc. during photolithography, thereby suppressing deterioration of the organic EL elements.

[0074] Here, a substrate processing method according to a reference example will be described. In the substrate processing method according to the reference example, a step of forming a light-emitting layer on the entire substrate, a step of forming a cathode electrode on the entire substrate, a step of forming a first sealing layer on the entire substrate, a step of forming a first mask on one selected type of anode electrode, a step of etching the light-emitting layer, the cathode electrode, and the first sealing layer on the anode electrode on which the first mask is not formed, a step of forming a second sealing layer on the entire substrate, a step of forming a second mask on one selected type of anode electrode, and a step of etching the second sealing layer on the anode electrode on which the second mask is not formed, are performed on the substrate to form one type of organic EL element. By repeating this process two more times, three types of organic EL elements are formed on the substrate.

[0075] Furthermore, the substrate processing method of the reference example includes the steps of forming a mask for forming contact holes, forming contact holes by etching, forming a wiring layer, forming a mask for etching the wiring layer, removing a portion of the wiring layer by etching, and forming a sealing layer.

[0076] Here, according to the substrate processing method of the reference example, the number of times of photolithography processing is 8, the number of times of etching processing is 8, and the number of times of forming the sealing layer is 7. Also, according to the substrate processing method of the reference example, the number of times that the anode electrodes are exposed to plasma is 0 times for the first type anode electrodes, 2 times for the second type anode electrodes, and 4 times for the third type anode electrodes.

[0077] In contrast, according to the substrate processing method of this embodiment, the photolithography process is performed three times, the etching process is performed seven times (six times if step S122 and step S123 are the same process), and the sealing layer is formed seven times. Thus, according to the substrate processing method of this embodiment, the number of steps of the photolithography process and the etching process can be reduced compared to the substrate processing method of the reference example. This improves the productivity in substrate processing for forming multiple types of organic EL elements.

[0078] Furthermore, according to the substrate processing method of this embodiment, the anode electrodes 311-313 are exposed to plasma zero times for the first anode electrode 311, two times for the second anode electrode 312, and four times for the third anode electrode 313. Thus, according to the substrate processing method of this embodiment, the anode electrodes 311-313 can be exposed to plasma about the same number of times (in other words, plasma exposure time) as the substrate processing method of the reference example. This suppresses deterioration of the anode electrodes 311-313, thereby suppressing deterioration of the organic EL elements.

[0079] In this embodiment, the cathode electrode material and the anode electrode material of the top emission type are described, but the present invention is not limited to this and may be a bottom emission type. As the cathode electrode material of the bottom emission type, aluminum or the like is preferable, and as the anode electrode material, ITO, IZO or the like is preferable. In the case of a cavity structure, a layer of silver or the like may be sandwiched in the ITO film of the cathode electrode material.

[0080] In this embodiment, the inventors confirmed the dependency of the bias high frequency power on the anisotropic etching process in steps S108, S115, and S122. Here, a G4.5 size (730 mm×920 mm) substrate was used, and silicon nitride (SiN) was used as the sealing layers (second sealing layer 342, fourth sealing layer 344, and sixth sealing layer 346) that seal the stacks (first stack, second stack, and third stack). In addition, tetrafluoromethane (CF4) and oxygen (O2) were supplied as process gases to a processing module 40a described later at a flow rate ratio of 1:1, and the processing pressure was adjusted to 10 mT (1.33 Pa). The bias high frequency power was used under multiple conditions to evaluate the top surface etching rate average (V: Vertical) [Å / min] and the sidewall etching rate average (H: Horizontal) [Å / min].

[0081] 21 is an example of a transition of the etching rate of the sealing film with respect to the bias power. In the graph shown in FIG. 21, the horizontal axis is the bias high-frequency power [W / m 2 ], the vertical axis is a plot of the V / H ratio, and the average V / H ratio for each value of high-frequency bias power is shown as a straight line.

[0082] As shown in the graph of FIG. 21, the bias high frequency power for the anisotropic etching process is 1750 [W / m 2 ], the V / H ratio is 1, and it can be confirmed that isotropic etching is performed. 2 It can be seen that by setting the value to a value larger than 1, favorable anisotropic etching is achieved with a V / H ratio greater than 1. For a G8 size (2160 mm × 2460 mm) substrate, a high-frequency bias power of about 40 kW is used, resulting in a power consumption per unit area of ​​about 7528 W / m 2 ] power.

[0083] <First substrate processing system> Next, an example of a first substrate processing system 1 for carrying out a substrate processing method according to this embodiment will be described with reference to Fig. 22. Fig. 22 is an example of a plan view showing the configuration of the first substrate processing system 1.

[0084] The first substrate processing system 1 includes a first processing station (substrate processing apparatus) 11, a load lock module 12, a carrier station 14, a second processing station 15, and a controller 20.

[0085] The first processing station 11 includes a vacuum transfer module 30 and a plurality of processing modules 40a, 40b (three each in the example of FIG. 22).

[0086] The vacuum transfer module 30 has a vacuum transfer chamber 31 whose interior is kept in a reduced pressure state (vacuum state). A transfer mechanism 32 for transferring a substrate G is provided inside the vacuum transfer chamber 31. The transfer mechanism 32 transfers the substrate G into and out of the processing modules 40a, 40b (specifically, vacuum processing chambers 41a, 41b) and the load lock module 12 (specifically, the load lock chamber 13). The transfer mechanism 32 has a transfer arm 32a that supports the substrate G during transfer.

[0087] The processing modules 40a and 40b have vacuum processing chambers 41a and 41b, and perform a predetermined process on the substrate G under reduced pressure. The vacuum processing chambers 41a and 41b are connected to the vacuum transfer chamber 31 via a gate valve G1. Each of the processing modules 40a performs a process for forming a sealing layer and an etching process. Each of the processing modules 40b performs a process for forming a light-emitting layer, a process for forming a cathode electrode, and a process for forming a wiring layer. The processing module 40b may include an inverting machine for inverting the substrate G when processing is performed by a face-down method.

[0088] The load lock module 12 connecting the first processing station 11 and the carrier station 14 has a load lock chamber 13 configured so that the interior can be switched between atmospheric pressure and vacuum. The load lock chamber 13 is connected to the vacuum transfer chamber 31 via a gate valve G2. The load lock chamber 13 is connected to the atmospheric transfer chamber 51 via a gate valve G3.

[0089] The load lock module 12 connecting one vacuum transfer module 30 to the other vacuum transfer module 30 has a load lock chamber 13 configured to switch the vacuum state inside the chamber. The load lock chamber 13 is connected to the vacuum transfer chamber 31 of one vacuum transfer module 30 via one gate valve G2. The load lock chamber 13 is connected to the vacuum transfer chamber 31 of the other vacuum transfer module 30 via the other gate valve G2.

[0090] A carrier C capable of accommodating a plurality of substrates G is loaded and unloaded from the carrier station 14. The carrier station 14 also has an atmospheric transfer chamber 51 whose interior is kept at atmospheric pressure. A transfer mechanism 52 for transferring the substrates G is provided within the atmospheric transfer chamber 51. The transfer mechanism 52 loads and unloads the substrates G between the carrier C placed on a carrier placement table 53 and the load lock module 12 (specifically, the load lock chamber 13). The transfer mechanism 52 has a transfer arm 52a for supporting the substrates G during transfer.

[0091] The second processing station 15 includes an atmospheric transfer module 60 and a plurality of processing modules 70 (three in the example of FIG. 22).

[0092] The atmospheric transfer module 60 has an atmospheric transfer chamber 61 whose interior is maintained at an atmospheric atmosphere. A transfer mechanism 62 for transferring a substrate G is provided in the atmospheric transfer chamber 61. The transfer mechanism 62 transfers the substrate G into and out of the processing module 70 (specifically, the atmospheric processing chamber 71). The transfer mechanism 62 has a transfer arm 62a for supporting the substrate G during transfer.

[0093] The processing module 70 has an atmospheric processing chamber 71, and performs a predetermined processing on the substrate G under atmospheric pressure. The atmospheric processing chamber 71 is connected to the atmospheric transfer chamber 61 via a gate valve G4. Each of the processing modules 70 performs each step of the photolithography process (resist formation step, exposure step, and development step).

[0094] The atmospheric transfer chamber 51 of the carrier station 14 and the atmospheric transfer chamber 61 of the second processing station 15 may be connected by a path module (not shown) so that the substrate G can be transferred between the atmospheric transfer chamber 51 and the atmospheric transfer chamber 61. The atmospheric transfer chamber 61 of the second processing station 15 may have a carrier placement table (not shown) so that the substrate G can be transferred between the atmospheric transfer chamber 51 and the atmospheric transfer chamber 61 by transferring a carrier C containing the substrate G.

[0095] The control unit 20 includes a computer equipped with a processor such as a CPU, a memory, and the like, and has a storage unit (not shown) for storing various information. The storage unit stores a program including instructions for a processing sequence executed by the first substrate processing system 1. The program may be recorded in a computer-readable storage medium and installed from the storage medium to the control unit 20. The storage medium may be temporary or non-temporary.

[0096] With this configuration, in the substrate processing method according to this embodiment (see FIG. 1), the substrate G is transferred through steps S102 to S104, steps S106 to S111, steps S113 to S118, and steps S120 to S125, the vacuum transfer chamber 31, and the load lock chamber 13 between the vacuum transfer chamber 31. This allows the substrate G to be processed without being exposed to the atmosphere.

[0097] That is, the first processing station 11 includes a vacuum processing chamber 41b for performing processing to form a light emitting layer, a vacuum processing chamber 41b for performing processing to form a cathode electrode and a wiring layer, a vacuum processing chamber 41a for performing processing to form a sealing layer, a vacuum processing chamber 41a for performing etching processing, and a vacuum transfer chamber 31 connecting these.

[0098] The substrate G has an electrode array 310 (first to third anode electrodes 311 to 313), and a first light emitting layer 321, a first cathode electrode 331, and a first sealing layer 341 are laminated. A first mask 351 is formed on the first sealing layer 341 corresponding to the first anode electrode 311. The substrate G on which the mask is formed is transferred from the load lock chamber 13 to the first processing station 11. First, the substrate G is transferred to the vacuum processing chamber 41a where an etching process is performed, and an etching process (for example, step S106) is performed. Next, the substrate G is transferred via the vacuum transfer chamber 31 to the vacuum processing chamber 41a where a sealing layer formation process is performed, and a sealing layer (second sealing layer 342) formation process (for example, step S107) is performed. Next, the substrate G is transferred via the vacuum transfer chamber 31 to the vacuum processing chamber 41a (second etching processing module) where an anisotropic etching process is performed, and anisotropic etching process (for example, step S108) is performed. Next, the substrate G is transferred to the vacuum processing chamber 41b (light emitting layer forming processing module) where a light emitting layer (second light emitting layer 322) is formed, and a light emitting layer forming processing (e.g., step S109) is performed. Next, the substrate G is transferred to the vacuum processing chamber 41b (electrode layer forming processing module) where a cathode electrode is formed, and a cathode electrode (second cathode electrode 332) is formed (e.g., step S110). Then, the substrate G is transferred via the vacuum transfer chamber 31 to the vacuum processing chamber 41a (sealing layer forming processing module) where a sealing layer is formed, and a sealing layer (third sealing layer 343) is formed (e.g., step S111). The substrate G may be carried in or out from either of the two load lock chambers 13 connected to the carrier station 14.

[0099] <Second Substrate Processing System> Next, an example of a second substrate processing system 101 for carrying out the substrate processing method according to this embodiment will be described with reference to Fig. 23. Fig. 23 is an example of a plan view showing the configuration of the second substrate processing system 101.

[0100] The second substrate processing system 101 includes first processing stations (substrate processing apparatus) 111a-111d, load lock modules 112a-112e, carrier stations 114a and 114b, a second processing station 115, and a controller 120.

[0101] The first processing station 111a includes a vacuum transfer module 130a and a plurality of processing modules 140a (two in the example of FIG. 23).

[0102] The vacuum transfer module 130a has a vacuum transfer chamber 131a whose interior is kept in a reduced pressure state (vacuum state). A transfer mechanism 132a for transferring a substrate G is provided in the vacuum transfer chamber 131a. The transfer mechanism 132a transfers the substrate G into and out of the processing module 140a (specifically, the vacuum processing chamber 141a) and the load lock modules 112a, 112b (specifically, the load lock chambers 113a, 113b). The transfer mechanism 132a has a transfer arm 132a1 for supporting the substrate G during transfer.

[0103] The processing module 140a has a vacuum processing chamber 141a and performs a predetermined processing on the substrate G under reduced pressure. The vacuum processing chamber 141a is connected to the vacuum transfer chamber 131a via a gate valve G101a. Each of the processing modules 140a performs an etching process.

[0104] The first processing station 111b includes a vacuum transfer module 130b and a plurality of processing modules 140b (two in the example of FIG. 23).

[0105] The vacuum transfer module 130b has a vacuum transfer chamber 131b whose interior is kept in a reduced pressure state (vacuum state). A transfer mechanism 132b for transferring a substrate G is provided in the vacuum transfer chamber 131b. The transfer mechanism 132b transfers the substrate G into and out of the processing module 140b (specifically, the vacuum processing chamber 141b) and the load lock modules 112b, 112c (specifically, the load lock chambers 113b, 113c). The transfer mechanism 132b has a transfer arm 132b1 for supporting the substrate G during transfer.

[0106] The processing module 140b has a vacuum processing chamber 141b and performs a predetermined processing on the substrate G under reduced pressure. The vacuum processing chamber 141b is connected to the vacuum transfer chamber 131b via a gate valve G101b. Each of the processing modules 140b performs a process for forming a light-emitting layer. The processing module 140b may include an inverting machine for inverting the substrate G when processing is performed by a face-down method.

[0107] The first processing station 111c includes a vacuum transfer module 130c and a plurality of processing modules 140c (two in the example of FIG. 23).

[0108] The vacuum transfer module 130c has a vacuum transfer chamber 131c whose interior is kept in a reduced pressure state (vacuum state). A transfer mechanism 132c for transferring a substrate G is provided in the vacuum transfer chamber 131c. The transfer mechanism 132c transfers the substrate G into and out of the processing module 140c (specifically, the vacuum processing chamber 141c) and the load lock modules 112c, 112d (specifically, the load lock chambers 113c, 113d). The transfer mechanism 132c has a transfer arm 132c1 for supporting the substrate G during transfer.

[0109] The processing module 140c has a vacuum processing chamber 141c and performs a predetermined processing on the substrate G under reduced pressure. The vacuum processing chamber 141c is connected to the vacuum transfer chamber 131c via a gate valve G101c. Each of the processing modules 140c performs a cathode electrode forming process and a wiring layer forming process. The processing module 140c may include an inverting machine that inverts the substrate G when processing is performed by a face-down method.

[0110] The first processing station 111d includes a vacuum transfer module 130d and a plurality of processing modules 140d (two in the example of FIG. 23).

[0111] The vacuum transfer module 130d has a vacuum transfer chamber 131d whose interior is kept in a reduced pressure state (vacuum state). A transfer mechanism 132d for transferring a substrate G is provided in the vacuum transfer chamber 131d. The transfer mechanism 132d transfers the substrate G to and from a processing module 140d (specifically, a vacuum processing chamber 141d) and load lock modules 112d, 112e (specifically, load lock chambers 113d, 113e). The transfer mechanism 132d has a transfer arm 132d1 for supporting the substrate G during transfer.

[0112] The processing module 140d has a vacuum processing chamber 141d and performs a predetermined processing on the substrate G under reduced pressure. The vacuum processing chamber 141d is connected to the vacuum transfer chamber 131d via a gate valve G101d. Each of the processing modules 140d performs a process of forming a sealing layer.

[0113] The load lock module 112a has a load lock chamber 113a that can be switched between atmospheric pressure and vacuum. The load lock module 112a also connects the first processing station 111a and the carrier station 114a. The load lock chamber 113a is connected to the vacuum transfer chamber 131a via a gate valve G102a. The load lock chamber 113a is connected to the atmospheric transfer chamber 151a via a gate valve G103a.

[0114] The load lock module 112b has a load lock chamber 113b configured to be able to switch the vacuum state inside the chamber. The load lock module 112b also connects the first processing station 111a to the first processing station 111b. The load lock chamber 113b is connected to the vacuum transfer chamber 131b via a gate valve G102b. The load lock chamber 113b is connected to the vacuum transfer chamber 131a via a gate valve G103b.

[0115] The load lock module 112c has a load lock chamber 113c configured to be able to switch the vacuum state inside the chamber. The load lock module 112c also connects the first processing station 111b and the first processing station 111c. The load lock chamber 113c is connected to the vacuum transfer chamber 131c via a gate valve G102c. The load lock chamber 113c is connected to the vacuum transfer chamber 131b via a gate valve G103c.

[0116] The load lock module 112d has a load lock chamber 113d configured to switch the vacuum state inside the chamber. The load lock module 112d also connects the first processing station 111c to the first processing station 111d. The load lock chamber 113d is connected to the vacuum transfer chamber 131d via a gate valve G102d. The load lock chamber 113d is connected to the vacuum transfer chamber 131c via a gate valve G103d.

[0117] The load lock module 112e includes a load lock chamber 113e that can be switched between atmospheric pressure and vacuum. The load lock module 112e also connects the first processing station 111d and the carrier station 114b. The load lock chamber 113e is connected to the atmospheric transfer chamber 151b via a gate valve G102e. The load lock chamber 113e is connected to the vacuum transfer chamber 131d via a gate valve G103e.

[0118] A carrier C capable of accommodating a plurality of substrates G is carried in and out of the carrier station 114a. The carrier station 114a also has an atmospheric transfer chamber 151a whose interior is kept at atmospheric pressure. A transfer mechanism 152a for transferring the substrates G is provided in the atmospheric transfer chamber 151a. The transfer mechanism 152a transfers the substrates G in and out between the carrier C placed on a carrier placement table (not shown) and the load lock module 112a (specifically, the load lock chamber 113a). The transfer mechanism 152a has a transfer arm 152a1 for supporting the substrates G during transfer.

[0119] A carrier C capable of accommodating a plurality of substrates G is carried in and out of the carrier station 114b. The carrier station 114b also has an atmospheric transfer chamber 151b whose interior is kept at atmospheric pressure. A transfer mechanism 152b for transferring the substrates G is provided in the atmospheric transfer chamber 151b. The transfer mechanism 152b transfers the substrates G in and out between the carrier C placed on a carrier placement table (not shown) and a load lock module 112e (specifically, the load lock chamber 113e). The transfer mechanism 152b has a transfer arm 152b1 for supporting the substrates G during transfer.

[0120] The second processing station 115 includes an atmospheric transfer module 160 and a plurality of processing modules 170 (three in the example of FIG. 23).

[0121] The atmospheric transfer module 160 has an atmospheric transfer chamber 161 whose interior is kept at an atmospheric atmosphere. A transfer mechanism 162 for transferring a substrate G is provided in the atmospheric transfer chamber 161. The transfer mechanism 162 transfers the substrate G into and out of the processing module 170 (specifically, the atmospheric processing chamber 171). The transfer mechanism 162 has a transfer arm 162a for supporting the substrate G during transfer.

[0122] The processing module 170 has an atmospheric processing chamber 171 and performs a predetermined processing on the substrate G under atmospheric pressure. The atmospheric processing chamber 171 is connected to the atmospheric transfer chamber 161 via a gate valve G104. Each of the processing modules 170 performs each step of the photolithography process (resist formation step, exposure step, and development step).

[0123] The atmospheric transfer chambers 151a, 151b of the carrier stations 114a, 114b and the atmospheric transfer chamber 161 of the second processing station 115 may be connected by a pass module (not shown) so that the substrate G can be transferred between the atmospheric transfer chambers 151a, 151b and the atmospheric transfer chamber 161. The atmospheric transfer chamber 161 of the second processing station 115 may have a carrier placement table (not shown) so that the substrate G can be transferred between the atmospheric transfer chambers 151a, 151b and the atmospheric transfer chamber 161 by transferring a carrier C containing the substrate G.

[0124] The control unit 120 includes a computer equipped with a processor such as a CPU, a memory, and the like, and has a storage unit (not shown) for storing various information. The storage unit stores a program including instructions for a processing sequence executed by the second substrate processing system 101. The program may be recorded in a computer-readable storage medium and installed from the storage medium to the control unit 120. The storage medium may be temporary or non-temporary.

[0125] That is, the first processing station 111a-d includes a vacuum processing chamber 141b for performing processing to form a light emitting layer, a vacuum processing chamber 141c for performing processing to form a cathode electrode and a wiring layer, a vacuum processing chamber 141d for performing processing to form a sealing layer, a vacuum processing chamber 141a for performing etching processing, and vacuum transfer chambers 131a-131d connecting these.

[0126] The substrate G has an electrode array 310 (first to third anode electrodes 311 to 313), and a first light emitting layer 321, a first cathode electrode 331, and a first sealing layer 341 are laminated. A first mask 351 is formed on the first sealing layer 341 corresponding to the first anode electrode 311. The substrate G on which the mask is formed is transferred from the load lock chamber 113a to the first processing station 111a. First, the substrate G is transferred to the vacuum processing chamber 141a where an etching process is performed, and the etching process (for example, step S106) is performed. Next, the substrate G is transferred via the vacuum transfer chamber 131d to the vacuum processing chamber 141d where a sealing layer formation process is performed, and the sealing layer (second sealing layer 342) formation process (for example, step S107) is performed. Next, the substrate G is transferred via the vacuum transfer chamber 131a to the vacuum processing chamber 141a (second etching processing module) where an anisotropic etching process is performed, and the anisotropic etching process (e.g., step S108) is performed. Next, the substrate G is transferred to the vacuum processing chamber 141b (light emitting layer forming processing module) where a light emitting layer (second light emitting layer 322) is formed, and the light emitting layer is formed (e.g., step S109). Next, the substrate G is transferred to the vacuum processing chamber 141c (electrode layer forming processing module) where a cathode electrode is formed, and the cathode electrode (second cathode electrode 332) is formed (e.g., step S110). Then, the substrate G is transferred via the vacuum transfer chamber 131d to the vacuum processing chamber 141d (sealing layer forming processing module) where a sealing layer is formed, and the sealing layer (third sealing layer 343) is formed (e.g., step S111). In this embodiment, the substrate G is carried in through the load lock chamber 113a, but it may be carried in or out through either the load lock chamber 113a or 113e.

[0127] The above describes embodiments of the plasma processing system, but the present disclosure is not limited to the above embodiments, and various modifications and improvements are possible within the scope of the gist of the present disclosure described in the claims. [Explanation of symbols]

[0128] 1. First Substrate Processing System 101 Second substrate processing system 11, 111a~111d First Processing Station 12,112a~112e Load lock module 13,113a~113e Load lock chamber 14,114a~114b Career Station 15,115 Second Processing Station 20,120 Control section 30, 130a~130d Vacuum transport module 31, 131a~131d Vacuum transfer chamber 32, 132a~132d Transport mechanism 32a, 132a1~132d1 Transport arm 40a, 40b, 140a to 140d Processing module 41a, 41b, 141a to 141d Vacuum processing chamber 51, 151a~151b Atmospheric transport chamber 52, 152a~152b Conveyor mechanism 52a, 152a1~152b1 Transport arm 53 Carrier placement stand 60,160 Atmospheric Transport Module 61,161 Atmospheric transport chamber 62,162 Transport mechanism 62a,162a Transport arm 70,170 Processing Modules 71,171 Air treatment room G1~G4, G101a~G104 Gate valves G board C Career 300 Base material 310 Electrode Array 311 First anode electrode 312 Second anode electrode 313 Third Anode Electrode 321 First light-emitting layer 322 Second light-emitting layer 323 Third luminous layer 331 First cathode electrode 332 Second cathode electrode 333 3rd cathode electrode 341 First sealing layer 342 Second sealing layer 343 3rd sealing layer 344 4th sealing layer 345 5th sealing layer 346 6th sealing layer 347 7th sealing layer 351 First Mask 352 2nd Mask 353 3rd Mask 360 wiring layer

Claims

1. (A) providing a substrate having an electrode array with a plurality of electrodes disposed on a surface of the substrate; (B) forming a light emitting layer, an electrode layer, and a first sealing layer over the entire electrode array; (C) forming a mask on the first sealing layer over one type of electrodes among the plurality of electrodes; (D) performing an etching process on the substrate using the mask to form a laminate in which the one type of electrode, the light-emitting layer, the electrode layer, and the first sealing layer are laminated; (E) forming a second encapsulation layer over the electrode array; (F) performing an anisotropic etching process on the substrate to form the second sealing layer covering the sidewall of the stacked body. A method for processing a substrate.

2. repeating steps (B) to (F) for other types of electrodes among the plurality of electrodes; removing the first encapsulation layer; and forming a wiring layer connecting the electrode layers. The method of claim 1 .

3. The electrode array includes three types of electrodes. The substrate processing method according to claim 1 or 2.

4. The three types of electrodes include an electrode of the stack that emits red light, an electrode of the stack that emits blue light, and an electrode of the stack that emits green light. The substrate processing method according to claim 3 .

5. The mask is a photoresist mask. The substrate processing method according to claim 1 or 2.

6. In the step (D), the mask is left on the first sealing layer; In the step (E), the second sealing layer is formed on a laminate structure of the laminate and the first sealing layer. The substrate processing method according to claim 1 or 2.

7. In the step (D), the mask on the first sealing layer is removed; In the step (E), the second sealing layer is formed on the laminate. The substrate processing method according to claim 1 or 2.

8. In the step (F), the high frequency power for biasing the anisotropic etching process is 1750 W / m2 with respect to the area of ​​the anisotropic etching process surface of the substrate. ２ is greater than The substrate processing method according to claim 1 or 2.

9. A substrate processing apparatus for processing a substrate having an electrode array in which a plurality of electrodes are arranged on a substrate surface, a first light-emitting layer, a first electrode layer, and a first sealing layer laminated on the substrate surface, and a mask on the first sealing layer on one type of electrode among the plurality of electrodes, a first etching processing module that performs an etching process on the substrate using the mask to form a stacked body in which the one type of electrode, the first light emitting layer, the first electrode layer, and the first sealing layer are stacked; a first sealing layer forming processing module that performs a second sealing layer forming processing on the substrate on which the laminate is formed; a second etching processing module that performs an anisotropic etching process on the substrate on which the second sealing layer is formed, to form the second sealing layer that covers a side wall of the stack; a light emitting layer forming processing module that performs a second light emitting layer forming process on the substrate that has been subjected to the anisotropic etching process; an electrode layer forming processing module that performs a forming process of a second electrode layer on the substrate on which the second light emitting layer is formed; a second sealing layer forming processing module that performs a process of forming a third sealing layer on the substrate on which the second electrode layer is formed; a vacuum transfer module connecting the first etching module, the first sealing layer formation module, the second etching module, the light emitting layer formation module, the electrode layer formation module, and the second sealing layer formation module. Substrate processing equipment.

Images