Printed wiring board

Abstract

To provide a printed wiring board having high quality.SOLUTION: A printed wiring board of an embodiment has: a core material having a first face, a second face, and a first through hole; a first conductor layer on the first face; a second conductor layer on the second face; a first through hole conductor formed in the first through hole and connecting the first conductor layer and the second conductor layer; a first resin insulation layer on the first conductor layer and the first face; a second insulation layer on the second conductor layer and the second face; a third conductor layer on the first resin insulation layer; a fourth conductor layer on the second resin insulation layer; and a second through hole conductor formed in the second through hole passing through the first resin insulation layer, the core material, and the second resin insulation layer, and connecting the third conductor layer and the fourth conductor layer. When a first density is represented by a first ratio (the number of first through holes within a first region / an area of the first face of the core material in the first region) and a second density is represented by a second ratio (the total number of first through holes / the area of the first face of the core material), the first ratio is 0.66 times or more of the second ratio, and 1.34 times or less of the second ratio.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The technology disclosed by this specification relates to printed circuit boards.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a circuit board, including forming a metal layer on the surface of a substrate, forming a plurality of through holes penetrating the metal layer and the substrate so as to include regions with high and low through hole densities, forming a first conductive layer on the surface of the metal layer, forming a shielding layer having an opening on the first conductive layer, and forming a second conductive layer on the first conductive layer exposed from the opening of the shielding layer. The first conductive layer includes a region having a depression (depression region), and the opening of the shielding layer exposes the depression region.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] [Problems of Patent Document 1] Patent Document 1 forms an opening in the shielding layer so that the depression region is exposed. It is considered difficult to specify the depression region with high accuracy. It is considered difficult to form an opening in the shielding layer for exposing the depression region with high accuracy.

Means for Solving the Problems

[0005] The printed wiring board of the present invention includes a core material having a first surface, a second surface opposite to the first surface, and a first through hole extending from the first surface to the second surface, a first conductor layer formed on the first surface of the core material, a second conductor layer formed on the second surface of the core material, a first through-hole conductor formed in the first through hole to connect the first conductor layer and the second conductor layer, a first resin insulating layer formed on the first surface of the core material and the first conductor layer, a second resin insulating layer formed on the second surface of the core material and the second conductor layer, a third conductor layer formed on the first resin insulating layer, a fourth conductor layer formed on the second resin insulating layer, and a second through-hole conductor formed in a second through hole that penetrates the first resin insulating layer, the core material, and the second resin insulating layer to connect the third conductor layer and the fourth conductor layer. When a first density is represented by a first ratio (the number of the first through holes in the first region / the area of the first surface of the core material in the first region), and a second density is represented by a second ratio (the total number of the first through holes / the area of the first surface of the core material), the first ratio is 0.66 times or more and 1.34 times or less of the second ratio. The first region is at least one of an electronic component mounting region, an outer region outside the mounting region, and a divided region. The electronic component mounting region is a region located directly below an electronic component mounted on the printed wiring board. The outer region outside the mounting region is a region outside the electronic component mounting region. The divided region is one of a plurality of divided regions obtained by equally dividing the core material.

[0006] The printed wiring board according to an embodiment of the present invention has two types of through holes: a first through hole penetrating the core material and a second through hole penetrating the first resin insulating layer, the core material, and the second resin insulating layer. The first density is 0.66 times or more and 1.34 times or less of the second density. The density of the first through holes does not vary significantly depending on the location of the core material. Therefore, when the first through-hole conductor is formed in the first through hole by electrolytic copper plating, the embodiment can reduce the variation in the thickness of the electrolytic copper plating film on the core material. The embodiment can reduce the variation in the thickness of the first conductor layer and the variation in the thickness of the second conductor layer. The embodiment does not require the shielding layer of Patent Document 1.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2A

Figure 2B

Figure 2C

Figure 2D

Figure 2E

Figure 2F

Figure 2G

Mode for Carrying Out the Invention

[0008] [Embodiment] FIG. 1 is a cross-sectional view showing a printed wiring board 2 of an embodiment. As shown in FIG. 1, the printed wiring board 2 includes a core material 10, a first conductor layer 20, a second conductor layer 30, a first through-hole conductor 40, a first resin insulating layer 50, a second resin insulating layer 60, a third conductor layer 70, a fourth conductor layer 80, and a second through-hole conductor 90. The first through-hole conductor 40 is formed in a first through-hole 16 that penetrates the core material 10. The number of the first through-hole conductors 40 is plural. The second through-hole conductor 90 is formed in a second through-hole 18 that penetrates the first resin insulating layer 50, the core material 10, and the second resin insulating layer 60. The number of the second through-hole conductors 90 is plural. FIG. 1 shows a part of the printed wiring board 2. The actual printed wiring board 2 further includes a plurality of first through-hole conductors 40 and a plurality of second through-hole conductors 90 not shown in the figure.

[0009] The core material 10 is formed using a thermosetting resin. The core material 10 may contain inorganic particles such as silica. The core material 10 may contain a reinforcing material such as a glass cloth. The core material 10 has a first surface 12 and a second surface 14 on the side opposite to the first surface 12. The core material 10 has a plurality of first through-holes 16 extending from the first surface 12 to the second surface 14. The first through-holes 16 do not penetrate the first resin insulating layer 50 and the second resin insulating layer 60. The plurality of first through-holes 16 are distributed throughout the core material 10.

[0010] The plurality of first through-holes 16 have the following relationship. When the first density is represented by the first ratio (the number of first through-holes 16 in the first region / the area of the first surface 12 of the core material 10 in the first region) and the second density is represented by the second ratio (the total number of first through-holes 16 / the area of the first surface 12 of the core material 10), the ratio of the first ratio to the second ratio (first ratio / second ratio) preferably satisfies a predetermined numerical range. The ratio (first ratio / second ratio) is 0.66 or more and 1.34 or less. The ratio (first ratio / second ratio) is preferably 0.7 or more and 1.3 or less. The ratio (first ratio / second ratio) is more preferably 0.8 or more and 1.2 or less. The ratio (first ratio / second ratio) is even more preferably 0.9 or more and 1.1 or less. The first region is at least one of an electronic component mounting region, an outer region outside the mounting region, and a divided region. The electronic component mounting region is a region located directly below the electronic component E1 mounted on the printed wiring board 2. The outer region outside the mounting region is a region outside the electronic component mounting region. The divided region is one of a plurality of divided regions obtained by equally dividing the core material 10. The divided region is, for example, one of nine divided regions obtained by equally dividing the core material 10 into nine parts. The first region is, for example, the electronic component mounting region. The first region may also be the outer region outside the mounting region.

[0011] When the first region is the electronic component mounting region, the region outside the mounting region is the third region. When the first region is the region outside the mounting region, the electronic component mounting region is the third region. When the first region is one of the divided regions, the remaining divided regions are the third region. The ratio (the number of the first vias 16 in the third region / the area of the first surface 12 of the core material 10 in the third region) is referred to as the fourth ratio. The ratio of the fourth ratio to the second ratio (the fourth ratio / the second ratio) preferably satisfies a predetermined numerical range. The ratio (the fourth ratio / the second ratio) is 0.66 or more and 1.34 or less. The ratio (the fourth ratio / the second ratio) is preferably 0.7 or more and 1.3 or less. The ratio (the fourth ratio / the second ratio) is more preferably 0.8 or more and 1.2 or less. The ratio (the fourth ratio / the second ratio) is even more preferably 0.9 or more and 1.1 or less.

[0012] The electronic component E1 is a logic IC. Examples of the logic IC are a microprocessor, a digital signal processor (DSP), etc.

[0013] The first conductor layer 20 is formed on the first surface 12 of the core material 10. The first conductor layer 20 is mainly formed of copper. The first conductor layer 20 is formed of a copper foil 13 on the first surface 12 of the core material 10, a first plating film 22 on the copper foil 13, and a second plating film 24 on the first plating film 22. The first plating film 22 and the second plating film 24 are each formed of a seed layer and an electrolytic copper plating film on the seed layer.

[0014] The second conductor layer 30 is formed on the second surface 14 of the core material 10. The second conductor layer 30 is mainly formed of copper. The second conductor layer 30 is formed of a copper foil 15 on the second surface 14 of the core material 10, a first plating film 32 on the copper foil 15, and a second plating film 34 on the first plating film 32. The first plating film 32 and the second plating film 34 are each formed of a seed layer and an electrolytic copper plating film on the seed layer.

[0015] The first through-hole conductor 40 is formed in the first through-hole 16. The first through-hole conductor 40 connects the first conductor layer 20 and the second conductor layer 30. The first through-hole conductor 40 is formed of a first plating film 42 on the inner wall surface of the first through-hole 16. The first through-hole conductor 40 has a shape similar to a pipe. The space surrounded by the first through-hole conductor 40 is filled with a resin portion 44. The first plating film 42 is formed of a seed layer and an electrolytic copper plating film on the seed layer. The first plating films 22, 32, and 42 are common plating films. The first plating film 22 forming the first conductor layer 20, the first plating film 32 forming the second conductor layer 30, and the first plating film 42 forming the first through-hole conductor 40 are formed simultaneously.

[0016] The first resin insulation layer 50 is formed on the first conductor layer 20 and the first surface 12 of the core material 10. The first resin insulation layer 50 has a resin and a large number of inorganic particles dispersed in the resin. The resin is an epoxy resin. Examples of the resin are a thermosetting resin and a photocurable resin. Examples of the inorganic particles are silica and alumina. The first resin insulation layer 50 does not contain a reinforcing material such as glass cloth.

[0017] The second resin insulation layer 60 is formed on the second conductor layer 30 and the second surface 14 of the core material 10. The second resin insulation layer 60 is formed of the same material as the first resin insulation layer 50.

[0018] A plurality of second through-holes 18 penetrating the first resin insulation layer 50, the core material 10, and the second resin insulation layer 60 are formed. The plurality of second through-holes 18 are distributed throughout the core material 10. Alternatively, the second through-holes 18 exist only within the electronic component mounting area. Alternatively, the second through-holes 18 exist only within the area outside the mounting area. Alternatively, the second through-holes 18 exist only within the divided area. Alternatively, the second through-holes 18 are formed within both the electronic component mounting area and the area outside the mounting area. The first through-hole 16 is disposed between two adjacent second through-holes 18 within the electronic component area. The second through-holes 18 do not penetrate the first conductor layer 20 and the second conductor layer 30. In other examples, the second through-holes 18 may penetrate the first conductor layer 20 and the second conductor layer 30.

[0019] The number of the first through-holes 16 and the number of the second through-holes 18 have the following relationship. The third ratio (the number of the first through-holes 16 in the second region / the number of the second through-holes 18 in the second region) of the number of the first through-holes 16 and the number of the second through-holes 18 in the second region is 0.7 or more and 1.3 or less. The second region is, for example, an electronic component mounting region. The second region may be an outer region outside the mounting region or a divided region. It is preferable that the third ratio is 0.8 or more and 1.2 or less. More preferably, the third ratio is 0.9 or more and 1.1 or less.

[0020] The third conductor layer 70 is formed on the first resin insulating layer 50. The third conductor layer 70 is mainly formed of copper. The third conductor layer 70 is formed of a first plating film 72 on the first resin insulating layer 50 and a second plating film 74 on the first plating film 72. The first plating film 72 and the second plating film 74 are each formed of a seed layer and an electrolytic copper plating film on the seed layer.

[0021] The fourth conductor layer 80 is formed on the second resin insulating layer 60. The fourth conductor layer 80 is mainly formed of copper. The fourth conductor layer 80 is formed of a first plating film 82 on the second resin insulating layer 60 and a second plating film 84 on the first plating film 82. The first plating film 82 and the second plating film 84 are each formed of a seed layer and an electrolytic copper plating film on the seed layer.

[0022] The second through-hole conductor 90 is formed in the second through-hole 18. The second through-hole conductor 90 connects the third conductor layer 70 and the fourth conductor layer 80. The second through-hole conductor 90 is formed of a first plating film 92 on the inner wall surface of the second through-hole 18. The second through-hole conductor 90 has a shape similar to a pipe. The space surrounded by the second through-hole conductor 90 is filled with a resin portion 94. The first plating film 92 is formed of a seed layer and an electrolytic copper plating film on the seed layer. The first plating films 72, 82, and 92 are common plating films. The first plating film 72 forming the third conductor layer 70, the first plating film 82 forming the fourth conductor layer, and the first plating film 92 forming the second through-hole conductor 90 are formed simultaneously. The electronic component mounting area preferably has both the first through-hole conductor 40 and the second through-hole conductor 90, and the area outside the mounting area preferably has only the first through-hole conductor 40.

[0023] [Manufacturing Method of Printed Wiring Board 2 of Embodiment] Figs. 2A to 2G show the manufacturing method of the printed wiring board 2 of the embodiment. Figs. 2A to 2G are cross-sectional views. Fig. 2A shows the core material 10. A copper foil 13 is formed on the first surface 12 of the core material 10. A copper foil 15 is formed on the second surface 14. The core material has a fibrous reinforcing material such as glass cloth and inorganic particles.

[0024] As shown in Fig. 2B, a plurality of first through-holes 16 extending from the first surface 12 to the second surface 14 of the core material 10 are formed. The first through-holes 16 penetrate the copper foil 13, the core material 10, and the copper foil 15. The first through-holes 16 are formed by drilling. The first through-holes 16 are distributed throughout the core material 10. The first density is 0.66 times or more and 1.34 times or less of the second density. An example of the first region is an electronic component mounting area.

[0025] As shown in FIG. 2C, first plating films 22, 32, and 42 are formed on the copper foils 13 and 15 and on the inner wall surface of the first through hole 16. A seed layer is formed on the copper foils 13 and 15 and on the inner wall surface of the first through hole 16 by electroless copper plating. An electrolytic copper plating film is formed on the seed layer by electrolytic copper plating. A first through-hole conductor 40 is formed. The first plating films 22, 32, and 42 are formed simultaneously. The first plating films 22, 32, and 42 are common plating films. In the embodiment, the density of the first through holes 16 does not vary significantly depending on the location of the core material 10. Therefore, when the electrolytic copper plating film is formed, current easily flows uniformly through the seed layers of the first plating films 22, 32, and 42. The embodiment can reduce the thickness variation of the electrolytic copper plating film formed on the first surface 12 and the second surface 14. The embodiment can reduce the thickness variation of the first plating films 22, 32, and 42.

[0026] As shown in FIG. 2D, a resin portion 44 is formed in the space surrounded by the first through-hole conductor 40 by filling the space surrounded by the first through-hole conductor 40 with resin.

[0027] As shown in FIG. 2E, second plating films 24 and 34 are formed on the first plating films 22 and 32 and on the resin portion 44. A seed layer is formed on the first plating films 22 and 32 and on the resin portion 44 by electroless copper plating. An electrolytic copper plating film is formed on the seed layer by electrolytic copper plating. The second plating films 24 and 34 are formed. The second plating film 24 covers the upper end of the resin portion 44. The second plating film 34 covers the lower end of the resin portion 44. The second plating films 24 and 34 are connected to the first through-hole conductor 40.

[0028] As shown in FIG. 2F, a first conductor layer 20 and a second conductor layer 30 are formed. The first conductor layer 20 and the second conductor layer 30 are formed by a subtractive method. The first through-hole conductor 40 connects the first conductor layer 20 and the second conductor layer 30.

[0029] As shown in FIG. 2G, a first resin insulating layer 50 is formed on the first conductor layer 20 and the first surface 12 of the core material 10. A second resin insulating layer 60 is formed on the second conductor layer 30 and the second surface 14 of the core material 10. The resin insulating layer (such as the first resin insulating layer 50 and the second resin insulating layer 60) has inorganic particles. The resin insulating layer does not include fibrous reinforcing materials such as glass cloth.

[0030] A plurality of second through holes 18 penetrating the first resin insulating layer 50, the core material 10, and the second resin insulating layer 60 are formed. The second through holes 18 are formed within a second region. It is preferable that the second through holes 18 do not exist in the region outside the second region. An example of the second region is an electronic component mounting region. A third ratio (the number of the first through holes 16 in the second region / the number of the second through holes 18 in the second region) of the number of the first through holes 16 and the number of the second through holes 18 in the second region is 0.7 or more and 1.3 or less. First plating films 72, 82, 92 are formed on the first resin insulating layer 50, the second resin insulating layer 60, and the inner wall surface of the second through hole 18. The first plating films 72, 82, 92 are formed in the same manner as the first plating films 22, 32, 42. A second through-hole conductor 90 is formed. By filling the space surrounded by the second through-hole conductor 90 with resin, a resin portion 94 is formed in the space surrounded by the second through-hole conductor 90. Second plating films 74, 84 are formed on the first plating films 72, 82 and the resin portion 94. The second plating films 74, 84 are formed in the same manner as the second plating films 24, 34. The second plating film 74 covers the upper end of the resin portion 94. The second plating film 84 covers the lower end of the resin portion 94. The second plating films 74, 84 are connected to the second through-hole conductor 90. The printed wiring board 2 of the embodiment is obtained.

[0031] The printed wiring board 2 of the embodiment has a first through-hole 16 and a second through-hole 18. The electronic component mounting area preferably has both the first through-hole 16 and the second through-hole 18, and the area outside the mounting area preferably has only the first through-hole 16. The first density is 0.66 times or more and 1.34 times or less of the second density. The density of the first through-hole 16 does not vary significantly depending on the location of the core material 10. Therefore, when the first through-hole conductor 40 is formed in the first through-hole 16 by electrolytic copper plating, the embodiment can reduce the variation in the thickness of the electrolytic copper plating film formed on the first surface 12 and the second surface 14. The embodiment can reduce the variation in the thickness of the first plating films 22 and 32. Since the first through-holes 16 are arranged substantially evenly, warping of the core material 10 is suppressed. A printed wiring board 2 having high quality is provided.

[0032] The printed wiring board 2 of the embodiment has a second through-hole conductor 90. The second through-hole conductor 90 is closer to the electronic component E1 than the first through-hole conductor 40. Therefore, the embodiment can supply power to the electronic component E1 without delay.

[0033] (Another example of the embodiment) The printed wiring board of the another example may have a build-up portion formed of a resin insulating layer, a conductor layer, and via conductors connecting adjacent conductor layers on the printed wiring board 2 of the embodiment.

Explanation of reference numerals

[0034] 2: Printed wiring board 10: Core material 12: First surface 14: Second surface 16: First through-hole 18: Second through-hole 20: First conductor layer 30: Second conductor layer 40: First through-hole conductor 50: First resin insulating layer 60: Second resin insulating layer 70: Third conductor layer 80: Fourth conductor layer 90: Second through-hole conductor E1: Electronic component

Claims

1. a core material having a first surface, a second surface opposite to the first surface, and a first through hole extending from the first surface to the second surface; a first conductor layer formed on the first surface of the core material; a second conductor layer formed on the second surface of the core material; a first through-hole conductor formed in the first through hole and connecting the first conductor layer and the second conductor layer; a first resin insulating layer formed on the first conductor layer and the first surface of the core material; a second resin insulating layer formed on the second conductor layer and the second surface of the core material; a third conductor layer formed on the first resin insulating layer; a fourth conductor layer formed on the second resin insulating layer; a second through-hole conductor formed in a second through hole penetrating the first resin insulation layer, the core material, and the second resin insulation layer, and connecting the third conductor layer and the fourth conductor layer, When the first density is expressed by a first ratio (the number of the first through holes in the first region / the area of ​​the first surface of the core material in the first region) and the second density is expressed by a second ratio (the total number of the first through holes / the area of ​​the first surface of the core material), the first ratio is 0.66 times or more and 1.34 times or less of the second ratio, The first region is at least one of an electronic component mounting region, an area outside the mounting region, and a divided region, the electronic component mounting region being an area located directly below an electronic component mounted on the printed wiring board, the area outside the mounting region being an area outside the electronic component mounting region, and the divided region being one of a plurality of divided regions obtained by evenly dividing the core material.

2. 2. The printed wiring board according to claim 1, wherein the first ratio is equal to or greater than 0.7 times the second ratio and equal to or less than 1.3 times the second ratio.

3. 3. The printed wiring board according to claim 2, wherein the first ratio is equal to or greater than 0.8 times the second ratio and equal to or less than 1.2 times the second ratio.

4. 4. The printed wiring board according to claim 3, wherein the first ratio is not less than 0.9 times the second ratio and not more than 1.1 times the second ratio.

5. 2. The printed wiring board according to claim 1, wherein the first area is the electronic component mounting area.

6. 2. The printed wiring board according to claim 1, wherein the first area is an area outside the mounting area.

7. 2. The printed wiring board of claim 1, wherein a third ratio of the number of the first through holes to the number of the second through holes in the second region (the number of the first through holes in the second region / the number of the second through holes in the second region) is 0.7 or greater and 1.3 or less.

8. 8. The printed wiring board according to claim 7, wherein the third ratio is equal to or greater than 0.8 and equal to or less than 1.

2.

9. 9. The printed wiring board according to claim 8, wherein the third ratio is equal to or greater than 0.9 and equal to or less than 1.

1.

10. 8. The printed wiring board according to claim 7, wherein the second area is the electronic component mounting area.

11. 11. The printed wiring board according to claim 10, wherein the first through hole is disposed between two adjacent second through holes in the second region.

12. 2. The printed wiring board according to claim 1, wherein the electronic component is a logic IC.

13. 2. The printed wiring board according to claim 1, wherein the first through hole does not penetrate through the first resin insulating layer and the second resin.

Images