Multilayer ceramic capacitor and method of manufacturing the same

Abstract

To provide a multilayer ceramic capacitor having high reliability, and a method of manufacturing the same.SOLUTION: A multilayer ceramic capacitor according to one embodiment includes: a capacitor body including a dielectric layer and an internal electrode layer; and an external electrode disposed outside the capacitor body. The dielectric layer includes a plurality of dielectric grains and a grain boundary located between the dielectric grains adjacent to each other. The grain boundary includes a barium titanate-based primary component including barium (Ba) and titanium (Ti), and an inorganic element including silicon (Si). The standard deviation of atom% of the inorganic element to the total amount of components of the grain boundary is 0.20 to 0.80, the standard deviation being obtained as the square root of the average of the squares of deviations.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] Examples of electronic components using ceramic materials include capacitors, inductors, piezoelectric elements, varistors, or thermistors. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) can be used in various electronic devices due to its advantages of being small in size, having a high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor mounted on the substrate of various electronic products such as video equipment such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal mobile terminals, and smartphones to charge or discharge electricity.

[0004] Recently, as MLCCs are highly integrated, they are being miniaturized, and ensuring high reliability under a thin layer design is required.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a multilayer ceramic capacitor having high reliability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor.

Means for Solving the Problems

[0007] One embodiment provides a multilayer ceramic capacitor including a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed on an outside of the capacitor body, the dielectric layer including a plurality of dielectric grains and a grain boundary located between the adjacent dielectric grains, the grain boundary including a barium titanate-based main component including barium (Ba) and titanium (Ti) and an inorganic element including Si (silicon), the standard deviation of the atomic % of the inorganic element relative to the total amount of components of the grain boundary is 0.20 to 0.80, and the standard deviation is obtained as the square root of the mean of the square of the deviation.

[0008] The grain boundaries may have a barium (Ba)-inorganic element composite phase.

[0009] The grain boundary may further include nickel (Ni), and the atomic ratio of the inorganic element to the nickel (Ni) at the grain boundary may be 1.00 to 2.10.

[0010] The atomic ratio of the inorganic element to the titanium (Ti) at the grain boundary may be 0.010 to 0.065.

[0011] The inorganic elements may further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or combinations thereof.

[0012] The grain boundaries may further include minor components of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), or combinations thereof.

[0013] The minor component may include dysprosium (Dy), and the atomic ratio of the inorganic element to the minor component dysprosium (Dy) at the grain boundary may be 0.10 to 3.00.

[0014] At least one of the plurality of dielectric crystal grains may include a core portion and a shell portion surrounding the core portion.

[0015] The shell portion can include a barium titanate-based main component including barium (Ba) and titanium (Ti), and an inorganic element including Si (silicon).

[0016] The inorganic element of the shell portion may further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof.

[0017] The shell portion may further include a minor component selected from the group consisting of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), or combinations thereof.

[0018] The capacitor body may have an active region in which the dielectric layers and the internal electrode layers are alternately arranged, and a peak amplitude of silicon (Si) in the dielectric layer may be 8.6 kcps to 25 kcps when a scanning electron microscope-energy dispersive spectroscopy (SEM-EDS) line analysis of the active region is performed.

[0019] Another embodiment provides a method for manufacturing a multilayer ceramic capacitor, the method comprising the steps of: preparing a dielectric powder in which a surface of a barium titanate-based main component including barium (Ba) and titanium (Ti) is coated with an inorganic element including Si (silicon); preparing a dielectric green sheet using a dielectric slurry including the dielectric powder, and forming a conductive paste layer on a surface of the dielectric green sheet; laminating the dielectric green sheets on which the conductive paste layer is formed, to prepare a dielectric green sheet laminate; firing the dielectric green sheet laminate to prepare a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body, the dielectric layer including a plurality of dielectric crystal grains and a grain boundary located between the adjacent dielectric crystal grains, the grain boundary including a barium titanate-based main component including barium (Ba) and titanium (Ti), and an inorganic element including Si (silicon), the standard deviation of the atomic % of the inorganic element with respect to the total amount of components of the grain boundary is 0.20 to 0.80, and the standard deviation is obtained as the square root of the mean of the square of the deviation.

[0020] The step of preparing the dielectric powder may include a step of hydrothermally synthesizing a barium titanate-based main component powder to grow grains; a step of adding an inorganic salt containing Si (silicon) after the grain growth is completed; and a step of heat treating after adding the inorganic salt.

[0021] The inorganic salt may further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or combinations thereof.

[0022] The inorganic salt may include an alkoxide-based compound.

[0023] The inorganic salt can be added in an amount of 0.1 to 5.0 parts by mole relative to 100 parts by mole of the barium titanate-based main component powder.

[0024] The heat treatment can be carried out at a temperature of 100°C to 300°C.

[0025] The dielectric slurry may further include a subcomponent powder of a dysprosium (Dy)-containing compound, a terbium (Tb)-containing compound, a manganese (Mn)-containing compound, a vanadium (V)-containing compound, a barium (Ba)-containing compound, a silicon (Si)-containing compound, an aluminum (Al)-containing compound, a calcium (Ca)-containing compound, or a combination thereof.

[0026] The auxiliary component powder may be contained in an amount of 0.01 to 5 parts by mole relative to 100 parts by mole of the barium titanate-based main component powder. Effect of the Invention

[0027] The multilayer ceramic capacitor according to an embodiment has a dielectric layer in which an additive component is uniformly distributed, so that high reliability can be ensured even in a thin dielectric layer. [Brief description of the drawings]

[0028] [Figure 1] 1 is a perspective view illustrating a multilayer ceramic capacitor according to an embodiment; [Diagram 2] 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line II' in FIG. [Diagram 3] 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line II-II' in FIG. [Figure 4] FIG. 2 is a schematic diagram illustrating a structure of a dielectric layer according to one embodiment. [Diagram 5] FIG. 2 is a schematic diagram showing a method for producing a dielectric powder according to one embodiment. [Figure 6] 1A-1C are schematic diagrams illustrating a method for manufacturing a dielectric layer according to one embodiment. [Figure 7]4 is a TEM analysis image of an active area of ​​the multilayer ceramic capacitor according to Example 1. [Figure 8] 4 is a SEM-EDS line analysis image of a cover part and an active area of ​​the multilayer ceramic capacitor according to Example 1. [Figure 9] 11 shows SEM-EDS line analysis images of a cover part and an active area of ​​the multilayer ceramic capacitor according to Comparative Example 1. [Figure 10] 4 is a graph showing the high-temperature severe reliability of the multilayer ceramic capacitor according to Example 1. [Figure 11] 1 is a graph showing high-temperature severe reliability of the multilayer ceramic capacitor according to Comparative Example 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. In the drawings, parts that are not necessary for the description are omitted in order to clearly explain the present invention, and the same reference numerals are used for the same or similar components throughout the specification. In addition, in the accompanying drawings, some components are exaggerated, omitted, or illustrated in a schematic manner, and the size of each component does not entirely reflect the actual size.

[0030] The attached drawings are merely intended to facilitate understanding of the embodiments disclosed in this specification, and the attached drawings do not limit the technical ideas disclosed in this specification, and it should be understood that the drawings include all modifications, equivalents, and alternatives included in the idea and technical scope of the present invention.

[0031] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited to the terms. The terms are used only to distinguish one component from another.

[0032] In addition, when a part such as a layer, film, region, or plate is said to be "on" or "above" another part, this includes not only the case where it is "directly on" the other part, but also the case where there is another part in between. Conversely, when a part is said to be "directly on" another part, it means that there is no other part in between. In addition, being "on" or "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "on" or "above" the side opposite to gravity.

[0033] Throughout the specification, the terms "comprise" or "have" and the like are intended to specify the presence of any feature, numeral, step, operation, component, part, or combination thereof described in the specification, but should be understood not to preclude the presence or additional possibility of one or more other features, numerals, steps, operations, components, parts, or combinations thereof. Thus, when a part is said to "comprise" a certain element, this means that it can further include other elements, but not to the exclusion of other elements, unless specifically stated to the contrary.

[0034] Also, throughout the specification, "in a plane" means when the subject part is viewed from above, and "in cross section" means when the subject part is cut vertically and viewed from the side.

[0035] Furthermore, throughout the specification, when the term "connected" is used, this does not only mean that two or more components are directly connected, but also that two or more components are indirectly connected through other components, or that they are not only physically connected but also electrically connected, or that they are referred to by different names depending on their location or function but are integrated.

[0036] Hereinafter, a multilayer ceramic capacitor according to an embodiment will be described with reference to FIGS.

[0037] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment, FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line II' in FIG. 1, and FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line II-II' in FIG. 1.

[0038] The L axis, W axis, and T axis shown in FIGS. 1 to 3 respectively indicate the length direction, width direction, and thickness direction of the capacitor body 110. Here, the thickness direction (T axis direction) may be a direction perpendicular to the wide surface (main surface) of the sheet-shaped component, and can be used as the same concept as the lamination direction in which the dielectric layers 111 are laminated, for example. The length direction (L axis direction) may be a direction extending parallel to the wide surface (main surface) of the sheet-shaped component and approximately perpendicular to the thickness direction (T axis direction), and can be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides, for example. The width direction (W axis direction) may be a direction extending parallel to the wide surface (main surface) of the sheet-shaped component and approximately perpendicular to the thickness direction (T axis direction) and the length direction (L axis direction), and the length of the sheet-shaped component in the length direction (L axis direction) may be longer than the length of the width direction (W axis direction).

[0039] 1 to 3, a multilayer ceramic capacitor 100 according to the present embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outer side of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed on opposite ends of the capacitor body 110 in a longitudinal direction (L-axis direction).

[0040] The capacitor body 110 may be, for example, generally hexahedral in shape.

[0041] For the convenience of describing one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first surface and the second surface, the two surfaces connected to the first surface and the second surface and facing each other in the length direction (L-axis direction) are defined as the third surface and the fourth surface, and the two surfaces connected to the first surface and the second surface, connected to the third surface and the fourth surface, and facing each other in the width direction (W-axis direction) are defined as the fifth surface and the sixth surface.

[0042] As an example, the first surface, which is the lower surface, may be the surface facing the mounting direction. The first to sixth surfaces may be flat, but the embodiment is not limited to this. For example, the first to sixth surfaces may be curved surfaces with a convex center, and the corners at the boundaries between the surfaces may be rounded.

[0043] The shape and size of the capacitor body 110 and the number of laminated dielectric layers 111 are not limited to those shown in the drawings of this embodiment.

[0044] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrodes 121 and second internal electrodes 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 sandwiched therebetween.

[0045] At this time, the boundaries between the adjacent dielectric layers 111 of the capacitor body 110 may be integrated to such an extent that it is difficult to confirm them without using a scanning electron microscope (SEM).

[0046] The capacitor body 110 may have an active region. The active region is a region where the dielectric layers 111 and the internal electrode layers 121 and 122 are alternately arranged, and is a portion that contributes to forming the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region may be a region where the first internal electrodes 121 or the second internal electrodes 122 stacked in the thickness direction (T-axis direction) overlap each other.

[0047] In addition, the capacitor body 110 may further include a cover portion and a side margin portion.

[0048] The cover portion is a thickness direction margin portion and can be disposed on the first and second surface sides of the active region in the thickness direction (T-axis direction). Such a cover portion may be a single dielectric layer 111 or two or more dielectric layers 111 laminated on the upper and lower surfaces of the active region, respectively.

[0049] The side margins can be regarded as side cover parts, and can be disposed on both opposing ends of the active area in the width direction (W-axis direction), i.e., on the fifth and sixth surfaces. The side margins can be formed by applying a conductive paste layer for an internal electrode layer to the surface of a dielectric green sheet, applying the conductive paste layer only to a part of the surface of the dielectric green sheet, laminating dielectric green sheets not coated with the conductive paste layer on both sides of the surface of the dielectric green sheet, and then firing the laminate, but the method is not limited to this.

[0050] The cover portion and the side margin portion serve to prevent damage to the first internal electrode 121 and the second internal electrode 122 due to physical or chemical stress.

[0051] The dielectric layer 111 will now be described with reference to FIG.

[0052] FIG. 4 is a schematic diagram illustrating the structure of a dielectric layer according to one embodiment.

[0053] Referring to FIG. 4, the dielectric layer includes a plurality of dielectric grains 10 and grain boundaries 20 located between adjacent dielectric grains 10 .

[0054] The crystal grain boundary 20 contains a barium titanate-based main component including barium (Ba) and titanium (Ti), and an inorganic element including Si (silicon).

[0055] The barium titanate-based main component is a dielectric base material, has a high dielectric constant, and contributes to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0056] The barium titanate-based main component is, for example, BaTiO 3 , Ba(Ti,Zr)O 3 , Ba(Ti,Sn)O 3 , (Ba,Ca)TiO 3 , (Ba,Ca)(Ti,Ca)O 3 , (Ba,Ca)(Ti,Zr)O 3 , (Ba,Ca)(Ti,Sn)O 3 , (Ba,Sr)TiO 3 , (Ba,Sr)(Ti,Zr)O 3 , (Ba,Sr)(Ti,Sn)O 3 , or combinations thereof can be included.

[0057] The inorganic element can be uniformly distributed within the crystal grain boundary 20. According to one embodiment, by producing a dielectric powder in which an additive component such as an inorganic element is introduced in an inorganic salt form and the surface of the barium titanate-based main component is coated with the additive component, a multilayer ceramic capacitor in which the inorganic element is uniformly distributed within the dielectric layer 111, specifically within the crystal grain boundary 20, can be obtained.

[0058] Specifically, within the crystal grain boundary 20, the standard deviation of the atomic percentage of the inorganic element with respect to the total amount of components of the crystal grain boundary 20 may be 0.20 to 0.80, for example, 0.20 to 0.70. When the standard deviation of the content of the inorganic element is within the above range, it means that inorganic elements such as Si (silicon) are uniformly distributed within the crystal grain boundary 20, thereby ensuring a multilayer ceramic capacitor with a thin layer having excellent reliability.

[0059] The standard deviation (σ) of the atomic percentage of the inorganic element is obtained by squaring the atomic percentage deviation, summing them up, dividing by the number of measurements, and then taking the square root, that is, it can be obtained as the square root of the average of the squares of the atomic percentage deviations as shown in the following formula 1.

[0060]

number

[0061] The standard deviation of the atomic % of inorganic elements at the grain boundaries 20 can be obtained by TEM-EDS (Transmission Electron Microscopy-Energy Dispersive Spectroscopy) analysis.

[0062] Specifically, the multilayer ceramic capacitor 100 is immersed in an epoxy mixture and cured, and then the W-axis and T-axis directions (WT directions) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction, and then the capacitor body 110 is fixed and maintained in a vacuum atmosphere chamber, so that a cross-sectional sample can be obtained so that an active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect can be observed. Then, the active region of the cross-sectional sample can be measured using a transmission electron microscope (TEM). The transmission electron microscope may be performed using a Xe-FIB (focused ion beam) under conditions of an acceleration voltage of 200 kV and an analysis magnification of 79k, and the measurement can be performed so that at least one layer, for example 1 to 10 layers, of the dielectric layer 111 and the internal electrode layers 121 and 122 are visible. Next, in a transmission electron microscope (TEM) image of the measured cross-sectional sample, an EDS analysis is performed on at least one point, for example, 1 to 100 points, 2 to 50 points, or 3 to 30 points on a grain boundary in the dielectric layer, to obtain a standard deviation of the atomic percentage of the inorganic element.

[0063] The grain boundaries 20 may have a barium (Ba)-inorganic element composite phase. The formation of the barium (Ba)-inorganic element composite phase within the grain boundaries 20 allows firing at a low temperature and has an effect of improving grain boundary resistance, thereby improving the reliability of the multilayer ceramic capacitor.

[0064] The crystal grain boundary 20 may further contain nickel (Ni). Nickel (Ni) is a component when the internal electrode layers 121 and 122 are formed, and may be a component derived by diffusing into the dielectric layer 111 after firing.

[0065] The atomic ratio of the inorganic element to nickel (Ni) at the crystal grain boundary 20, i.e., when the inorganic element is referred to as X, the X / Ni atomic ratio may be 1.00 to 2.10, for example, 1.01 to 1.90. When the atomic ratio of the inorganic element to nickel (Ni) is within the above range, the reliability of the multilayer ceramic capacitor can be improved.

[0066] Furthermore, the atomic ratio of the inorganic element to titanium (Ti) in the crystal grain boundary 20, i.e., when the inorganic element is referred to as X, the X / Ti atomic ratio may be 0.010 to 0.065, for example, 0.015 to 0.064. When the atomic ratio of the inorganic element to titanium (Ti) is within the above range, the reliability of the multilayer ceramic capacitor can be improved.

[0067] In addition to silicon (Si), the inorganic element may further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof. As an example, the inorganic element may further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), or a combination thereof.

[0068] The grain boundaries 20 may further include minor elements of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), or combinations thereof.

[0069] As an example, the minor component may include dysprosium (Dy). In this case, the atomic ratio of the inorganic element to dysprosium (Dy) at the grain boundary 20, i.e., when the inorganic element is referred to as X, the X / Dy atomic ratio may be 0.10 to 3.00, for example, 0.30 to 2.60. When the atomic ratio of the inorganic element to dysprosium (Dy) is within the above range, the reliability of the multilayer ceramic capacitor may be improved.

[0070] The above-mentioned X / Ni atomic ratio, X / Ti atomic ratio, and X / Dy atomic ratio can be obtained by TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) analysis. Here, the TEM-EDS analysis is the same as the method used to measure the standard deviation of the atomic % of inorganic elements described above, so the explanation will be omitted.

[0071] At least one of the plurality of dielectric crystal grains 10 may have a core-shell structure including a core portion 11 and a shell portion 12 surrounding the core portion 11 .

[0072] The core portion 11 may include a barium titanate-based main component that includes barium (Ba) and titanium (Ti).

[0073] The shell portion 12 may contain a barium titanate-based main component containing barium (Ba) and titanium (Ti) and an inorganic element containing Si (silicon). When the shell portion contains an inorganic element such as Si (silicon), the reliability of the multilayer ceramic capacitor can be improved.

[0074] The inorganic elements contained in the shell portion 12 may further include, in addition to Si (silicon), dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or combinations thereof.

[0075] The shell portion 12 may further include minor components of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), or combinations thereof.

[0076] According to an embodiment, the amplitude of the silicon (Si) peak in the dielectric layer 111 may be 8.6 kcps to 25 kcps, for example 8.6 kcps to 23 kcps, in the SEM-EDS line analysis of the active region. When the amplitude of the silicon (Si) peak in the SEM-EDS line analysis is within the above range, it means that the variation in the silicon (Si) peak intensity is large, and the silicon (Si) content in the dielectric layer 111 is higher than the Si content in the adjacent internal electrode layers 121 and 122. This may be a result of manufacturing and using a dielectric powder in which an additive component such as an inorganic element is coated on the surface of a barium titanate-based main component. For reference, the Si content present in the internal electrode layer may be derived from the diffusion during firing of the Si component that is added in the form of an inorganic salt to manufacture the dielectric powder when the dielectric layer is formed.

[0077] The amplitude of the silicon (Si) peak is a value shown based on the minimum value of the silicon (Si) peak, which is designated as 0.

[0078] The SEM-EDS line analysis can be performed as follows. After the multilayer ceramic capacitor 100 is immersed in an epoxy mixture and cured, the W-axis and T-axis directions (WT directions) of the capacitor body 110 are polished to 1 / 2 points in the L-axis direction, and the capacitor body 110 is fixed and maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active area where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect and the cover part corresponding to either one of the first and second sides of the active area in the thickness direction (T-axis direction) can be observed. Then, the active area and a part of the cover part of the cross-sectional sample can be measured with a scanning electron microscope (SEM). For example, a Verios G4 product from Thermofisher Scientific is used as the scanning electron microscope, and the measurement conditions are 10 kV, 0.2 nA, and the analysis magnification may be 50 k times, and the measurement can be performed so that at least one, three, five, and ten dielectric layers 111 and internal electrode layers 121 and 122 are observed. Next, in the SEM image of the measured cross-sectional sample, EDS analysis is performed on at least one point, for example 1 to 100, 2 to 50, or 3 to 30 points in the dielectric layer along a line from the cover portion to a certain point in the active region, for example a point passing through at least two, for example 2 to 10, dielectric layers and internal electrode layers, to obtain the amplitude for the peak of silicon (S1) in the dielectric layer.

[0079] The average thickness (average length in the T-axis direction) of the dielectric layers 111 may be 0.3 μm to 8.0 μm, for example, 0.5 μm to 7.8 μm. When the average thickness of the dielectric layers 111 is within the above range, the multilayer ceramic capacitor has excellent reliability.

[0080] The average thickness of the dielectric layer 111 may be measured by ion milling after polishing and immersing the multilayer ceramic capacitor 100 in an epoxy mixture and analyzing it with a scanning electron microscope (SEM). The scanning electron microscope may be, for example, a Verios G4 product from Thermofisher Scientific, and the measurement conditions may be 10 kV, 0.2 nA, and the analysis magnification may be 100 times, so that at least one, three, five, or ten dielectric layers 111 are obtained. The average thickness may be an arithmetic average value of the thickness of the dielectric layer 111 at ten points at a predetermined interval from the center point of the dielectric layer 111 in the length direction (L-axis direction) or width direction (W-axis direction) in the scanning electron microscope (SEM) image. The interval between the ten points may be adjusted according to the scale of the scanning electron microscope (SEM) image, and may be, for example, 1 μm to 100 μm, 1 μm to 50 μm, or 1 μm to 10 μm. At this time, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the positions of the reference points can be changed or the intervals between the 10 points can be adjusted.

[0081] The first internal electrode 121 and the second internal electrode 122 are electrodes having different polarities and are alternately arranged to face each other along the T-axis direction with the dielectric layer 111 in between, and one end is exposed through the third and fourth surfaces of the capacitor body 110, respectively.

[0082] The first internal electrode 121 and the second internal electrode 122 are electrically insulated from each other by a dielectric layer 111 disposed therebetween.

[0083] Ends of the first internal electrode 121 and the second internal electrode 122 alternately exposed through the third and fourth surfaces of the capacitor body 110 are electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0084] The first internal electrode 121 and the second internal electrode 122 include a conductive metal, and may include, for example, a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy thereof, for example, an Ag-Pd alloy.

[0085] Furthermore, the first internal electrode 121 and the second internal electrode 122 may contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111 .

[0086] The first internal electrode 121 and the second internal electrode 122 can be formed using a conductive paste containing a conductive metal. The conductive paste can be printed by screen printing or gravure printing.

[0087] The average thickness of the first internal electrode 121 and the second internal electrode 122 may be 0.1 μm to 2 μm. The average thickness of the first internal electrode 121 and the second internal electrode 122 can be measured by scanning electron microscope (SEM) analysis. Here, the scanning electron microscope (SEM) analysis is the same as the method for measuring the average thickness of the dielectric layer 111 described above, so the description thereof will be omitted.

[0088] The capacitor body 110 may be formed by firing a laminate in which a plurality of dielectric layers 111 and internal electrode layers 121 and 122 are laminated.

[0089] The first external electrode 131 and the second external electrode 132 are provided with voltages of different polarities and are electrically connected to the exposed portions of the first internal electrode 121 and the second internal electrode 122, respectively.

[0090] With the above-mentioned configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charges are stored between the opposing first internal electrode 121 and second internal electrode 122. At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the overlap area of ​​the first internal electrode 121 and the second internal electrode 122 that overlap each other along the T-axis direction in the active region.

[0091] The first external electrode 131 and the second external electrode 132 may each include a first connection portion and a second connection portion arranged on the third and fourth surfaces of the capacitor body 110, respectively, and connected to the first internal electrode 121 and the second internal electrode 122, and a first band portion and a second band portion arranged at the corner where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0092] The first and second band parts extend from the first and second connecting parts to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. The first and second band parts can serve to improve the bonding strength between the first and second external electrodes 131 and 132.

[0093] The first external electrode 131 and the second external electrode 132 may each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer disposed to cover the sintered metal layer, and a plating layer disposed to cover the conductive resin layer.

[0094] The sintered metal layer can include a conductive metal and glass.

[0095] The conductive metal may include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof, for example, copper (Cu) may include copper (Cu) alloys. When the conductive metal includes copper, metals other than copper may be included in an amount of 5 molar parts or less per 100 molar parts of copper.

[0096] The glass may include a mixed oxide composition, such as one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni), the alkali metal may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K), and the alkaline earth metal may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0097] Alternatively, the conductive resin layer may be formed on the sintered metal layer, for example, to completely cover the sintered metal layer. Alternatively, the first external electrode 131 and the second external electrode 132 may not include a sintered metal layer, in which case the conductive resin layer may be in direct contact with the capacitor body 110.

[0098] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., band portion) where the conductive resin layer is extended to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., band portion) where the sintered metal layer is extended to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. That is, the conductive resin layer is formed on the sintered metal layer to completely cover the sintered metal layer.

[0099] The conductive resin layer includes a resin and a conductive metal.

[0100] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and impact absorbing properties and can be mixed with the conductive metal powder to form a paste, and may include, for example, a phenolic resin, an acrylic resin, a silicone resin, an epoxy resin, or a polyimide resin.

[0101] The conductive metal contained in the conductive resin layer serves to electrically connect with the first internal electrode 121 and the second internal electrode 122 or the sintered metal layer.

[0102] The conductive metal contained in the conductive resin layer may have a spherical shape, a flake shape, or a combination thereof, that is, the conductive metal may be only in a flake shape, only in a spherical shape, or in a mixed shape of a flake shape and a spherical shape.

[0103] Here, the spherical shape may include a shape that is not a perfect sphere, for example, a shape in which the ratio of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flake-shaped powder means a powder having a flat and elongated shape, and is not particularly limited, and may be, for example, a ratio of the major axis to the minor axis (major axis / minor axis) of 1.95 or more.

[0104] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outer side of the conductive resin layer.

[0105] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb) alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or may be a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially laminated, or a form in which a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer are sequentially laminated. Also, the plating layer may include a plurality of nickel (Ni) plating layers and / or a plurality of tin (Sn) plating layers.

[0106] The plating layer can improve the mountability of the multilayer capacitor 100 on a substrate, structural reliability, durability against the outside, heat resistance, and equivalent series resistance (ESR).

[0107] A method for manufacturing the multilayer ceramic capacitor 100 according to an embodiment will be described below.

[0108] The multilayer ceramic capacitor 100 according to one embodiment can be manufactured through the steps of: preparing a dielectric powder in which the surface of a barium titanate-based main component containing barium (Ba) and titanium (Ti) is coated with an inorganic element containing Si (silicon); preparing a dielectric green sheet using a dielectric slurry containing the dielectric powder and forming a conductive paste layer on the surface of the dielectric green sheet; laminating the dielectric green sheets on which the conductive paste layer is formed to prepare a dielectric green sheet laminate; firing the dielectric green sheet laminate to prepare a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body.

[0109] First, the step of producing the dielectric powder will be described with reference to FIG.

[0110] FIG. 5 is a schematic diagram illustrating a method for producing a dielectric powder according to one embodiment.

[0111] Referring to FIG. 5, a dielectric powder in which the surface of a barium titanate-based main component is coated with an inorganic element containing Si (silicon) can be manufactured through a step of hydrothermally synthesizing a barium titanate-based main component powder to cause grain growth; a step of adding an inorganic salt containing Si (silicon) after the grain growth is completed; and a step of heat treating after adding the inorganic salt.

[0112] Hydrothermal synthesis of barium titanate-based main component powder can be carried out by mixing a titanium (Ti) precursor such as titanium (Ti) oxide, hydroxide, chloride, or nitrate with a barium (Ba) precursor such as barium (Ba) oxide, hydroxide, chloride, or nitrate with an aqueous solvent, and then reacting them under high temperature and pressure.

[0113] According to one embodiment, the inorganic salt is added alone after grain growth is completed during the process of synthesizing the barium titanate-based main component powder in an aqueous system, which eliminates the need for additional additives and shortens the process time. In addition, a barium (Ba)-inorganic element composite phase is formed by performing heat treatment under high temperature and pressure, and the inorganic element can be uniformly coated on the surface of the barium titanate-based main component.

[0114] The titanium (Ti) precursor and the barium (Ba) precursor can be mixed in a molar ratio of 1:0.5 to 1:1.5.

[0115] The high temperature and pressure can be carried out at a pressure of 0.5 MPa to 10 MPa and a temperature of 150°C to 300°C.

[0116] After the grain growth of the barium titanate-based main component powder is completed by hydrothermal synthesis, an inorganic salt containing Si (silicon) can be added.

[0117] The inorganic salt may be an inorganic salt further containing dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof, in addition to Si (silicon). As an example, the inorganic salt may be an inorganic salt further containing dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), or a combination thereof.

[0118] The inorganic salt may include an alkoxide-based compound containing an inorganic element such as Si (silicon). For example, the inorganic salt may be tetraethyl orthosilicate (TEOS). The alkoxide-based compound is stably hydrolyzed.

[0119] After the grain growth is completed, an inorganic salt, specifically an alkoxide-based compound containing an inorganic element, is added to the aqueous solution in which the barium titanate-based main component powder is dispersed, and then heat-treated. Through the dissolution and reprecipitation process of the inorganic element, which is an additive component, a coating layer can be formed on the surface of the barium titanate-based main component powder.

[0120] Specifically, when an inorganic salt is added to an aqueous solution in which a barium titanate-based main component powder is dispersed, a reaction product of silicon (Si) oxide with barium (Ba) and titanium (Ti) ions is precipitated on the surface of the barium titanate-based main component powder through a hydrolysis reaction of the inorganic salt, specifically an alkoxide-based compound containing an inorganic element, followed by polymerization and neutralization, thereby forming a coating layer.

[0121] The formed coating layer can act as a diffusion path for minor components such as dysprosium (Dy), improving the dispersion characteristics of the additives and helping to form a shell with uniform additive distribution.

[0122] The inorganic salt can be added in an amount of 0.1 to 5.0 molar parts, for example, 0.4 to 3.3 molar parts, relative to 100 molar parts of the barium titanate-based main component powder. When the inorganic salt is added within the above content range, the surface of the barium titanate-based main component powder is easily coated with the inorganic element.

[0123] After the inorganic salt is added, the heat treatment can be performed at a temperature below the temperature at which the barium titanate-based main component powder grains grow. For example, the heat treatment can be performed at a temperature of 100°C to 300°C, e.g., 150°C to 250°C. When the heat treatment is performed within the above temperature range, the hydrolysis reaction is followed by polymerization and neutralization reactions smoothly, so that the inorganic elements can be easily coated on the surface of the barium titanate-based main component powder.

[0124] FIG. 6 is a schematic diagram illustrating a method for manufacturing a dielectric layer according to one embodiment.

[0125] 6, a dielectric layer can be formed from a dielectric slurry containing the prepared dielectric powder through a dielectric sintering process. The formed dielectric layer includes dielectric grains and grain boundaries having a core-shell structure. By using the dielectric powder prepared according to an embodiment, that is, a dielectric powder having a barium titanate-based main component with a surface coated with an inorganic element including Si (silicon), damage to the core can be minimized and the concentration of inorganic elements in the grain boundaries can be increased. As a result, a thin-layer multilayer ceramic capacitor with excellent reliability can be manufactured.

[0126] The dielectric slurry may further include a sub-component powder of a dysprosium (Dy)-containing compound, a terbium (Tb)-containing compound, a manganese (Mn)-containing compound, a vanadium (V)-containing compound, a barium (Ba)-containing compound, a silicon (Si)-containing compound, an aluminum (Al)-containing compound, a calcium (Ca)-containing compound, or a combination thereof.

[0127] The subcomponent powder may be an oxide, nitride or salt compound, or may be used in the form of a sol dispersed in an organic solvent.

[0128] The auxiliary component powder may be included in an amount of 0.01 to 5 molar parts, for example, 0.1 to 3 molar parts, based on 100 molar parts of the barium titanate-based main component powder. When the auxiliary component powder is included within the above content range, a thin-layer multilayer ceramic capacitor with excellent reliability can be manufactured.

[0129] The dielectric slurry can be prepared by additionally mixing additives such as dispersants, binders, plasticizers, lubricants, antistatic agents, and solvents.

[0130] The dispersant may include, for example, a phosphate-based dispersant, a polycarboxylic acid-based dispersant, or a combination thereof. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight, for example, 0.3 to 3 parts by weight, based on 100 parts by weight of the barium titanate-based main component. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0131] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, an ethyl cellulose resin, etc. The binder may be added in an amount of 0.1 to 50 parts by weight, for example, 3 to 30 parts by weight, per 100 parts by weight of the barium titanate-based main component powder. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0132] The plasticizer may be, for example, a phthalic acid-based compound such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, or di(2-ethylbutyl) phthalate; an adipic acid-based compound such as dihexyl adipate or di(2-ethylhexyl) adipate; a glycol-based compound such as ethylene glycol, diethylene glycol, or triethylene glycol; or a glycol ester-based compound such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), or triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight, for example, 1 to 10 parts by weight, based on 100 parts by weight of the barium titanate-based main component. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0133] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, or methoxyethanol; a glycol solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. For example, the solvent may be an alcohol solvent or an aromatic solvent in consideration of the solubility and dispersibility of various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 parts by weight to 1000 parts by weight, for example, 100 parts by weight to 500 parts by weight, relative to 100 parts by weight of the barium titanate-based main component powder. When the solvent is mixed within the above content range, the dielectric slurry components are sufficiently mixed, and the solvent can be easily removed thereafter.

[0134] A wet ball mill or an agitation mill can be used to mix the dielectric slurry containing the dielectric powder whose surface is coated with an inorganic element and whose main component is barium titanate. When using zirconia balls in a wet ball mill, wet mixing can be performed for 8 to 48 hours or 10 to 24 hours using a large number of zirconia balls with diameters of 0.1 mm to 10 mm.

[0135] The produced dielectric slurry is formed into a dielectric layer after firing.

[0136] The produced dielectric slurry can be molded into a sheet shape using a tape molding method such as a doctor blade method or a calendar roll method, for example, a head-discharging on-roll molding coater, and then the molded product can be dried to obtain a dielectric green sheet.

[0137] To form a conductive paste layer that will become an internal electrode layer after firing, a conductive paste can be manufactured by mixing a conductive powder made of a conductive metal or its alloy, a binder, and a solvent. If necessary, barium titanate powder can be mixed in as a co-material. The co-material can suppress the sintering of the conductive powder during the firing process. The conductive paste is applied in a predetermined pattern to the surface of the dielectric green sheet by various printing methods such as screen printing or transfer method to form a conductive paste layer.

[0138] The conductive powder may include nickel (Ni) or a nickel (Ni) alloy.

[0139] Next, the dielectric green sheets on which the internal electrode patterns are formed are laminated in a plurality of layers and pressed in the lamination direction to manufacture a dielectric green sheet laminate. At this time, the dielectric green sheets and the internal electrode patterns can be laminated so that the dielectric green sheets are located on the upper and lower surfaces of the dielectric green sheet laminate in the lamination direction.

[0140] The manufactured dielectric green sheet laminate may be optionally cut into a predetermined size by dicing or the like.

[0141] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers, etc., if necessary, and after solidification and drying, can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container together with media and polishing liquid, and unnecessary parts such as burrs generated during cutting can be polished by applying rotational motion, vibration, etc. to the barrel container. Furthermore, after barrel polishing, the dielectric green sheet laminate can be washed with a cleaning liquid such as water and dried.

[0142] The dielectric green sheet laminate can then be debindered and fired to produce a capacitor body.

[0143] The binder removal treatment conditions can be appropriately adjusted depending on the components of the dielectric layers and the internal electrode layers. For example, the temperature rise rate during the binder removal treatment may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during the binder removal treatment may be air or a reducing atmosphere.

[0144] The firing conditions can be appropriately adjusted depending on the main component composition of the dielectric layer and the main component composition of the internal electrodes. For example, firing can be performed at a temperature of 1100°C to 1400°C, for example, 1200°C to 1350°C. Also, firing can be performed for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. Also, firing can be performed in a reducing atmosphere, for example, an atmosphere of a humidified mixed gas of nitrogen and hydrogen. When the internal electrodes contain nickel (Ni) or nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere is 1.0×10 -14 MPa~1.0×10 -10 It may be MPa.

[0145] After the firing treatment, annealing can be performed if necessary. Annealing is a treatment for reoxidizing the dielectric layer, and annealing can be performed when the firing treatment is performed in a reducing atmosphere. The conditions of the annealing treatment can also be appropriately adjusted depending on the components of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 hours to 20 hours, and the temperature increase rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be humidified nitrogen gas (N 2 ) atmosphere, with an oxygen partial pressure of 1.0×10 -9 MPa~1.0×10 -5 It may be MPa.

[0146] In the binder removal treatment, firing treatment, or annealing treatment, a wetter or the like can be used to wet the nitrogen gas or mixed gas, and in this case, the water temperature can be 5° C. to 75° C. The binder removal treatment, firing treatment, and annealing treatment can be performed consecutively or independently.

[0147] Optionally, the third and fourth faces of the manufactured capacitor body 110 may be subjected to surface treatment such as sandblasting, laser irradiation, barrel polishing, etc. By performing such surface treatment, ends of the first and second internal electrodes are exposed on the outermost surfaces of the third and fourth faces, which may improve electrical connection between the first and second external electrodes and the first and second internal electrodes, making it easier to form an alloy part.

[0148] Then, an external electrode is formed on one surface of the manufactured capacitor body 110 .

[0149] As an example, a sintered metal layer can be formed by applying a paste for forming a sintered metal layer as an external electrode and then sintering the applied paste.

[0150] The paste for forming the sintered metal layer may include a conductive metal and glass. The conductive metal and glass are the same as those described above, and therefore will not be described again. The paste for forming the sintered metal layer may selectively include a binder, a solvent, a dispersant, a plasticizer, an oxide powder, and the like. The binder may be, for example, ethyl cellulose, acrylic, butyral, and the solvent may be, for example, an organic solvent such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or an aqueous solvent.

[0151] The paste for forming a sintered metal layer can be applied to the outer surface of the capacitor body 110 using various printing methods such as a dipping method, screen printing, etc., a coating method using a dispenser, a spraying method using a spray, etc. The paste for forming a sintered metal layer is applied to at least the third and fourth surfaces of the capacitor body 110, and can also be selectively applied to a part of the first, second, fifth, or sixth surface on which the band portions of the first and second external electrodes are formed.

[0152] Thereafter, the capacitor body 110 on which the paste for forming a sintered metal layer has been applied is dried and sintered at a temperature of 700° C. to 1000° C. for 0.1 to 3 hours to form a sintered metal layer.

[0153] Alternatively, a conductive resin layer forming paste may be applied to the outer surface of the obtained capacitor body 110 and then cured to form a conductive resin layer.

[0154] The paste for forming the conductive resin layer may include a resin, and optionally a conductive metal or a non-conductive filler. The conductive metal and the resin are the same as those described above, and therefore will not be described again. The paste for forming the conductive resin layer may optionally include a binder, a solvent, a dispersant, a plasticizer, an oxide powder, etc. Examples of the binder include ethyl cellulose, acrylic, butyral, etc., and examples of the solvent include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, or aqueous solvents.

[0155] As an example, the conductive resin layer may be formed by dipping the capacitor body 110 into a paste for forming the conductive resin layer and then curing it, or by printing the paste for forming the conductive resin layer on the surface of the capacitor body 110 using a screen printing method or a gravure printing method, or by applying the paste for forming the conductive resin layer on the surface of the capacitor body 110 and then curing it.

[0156] Next, a plating layer is formed on the outer side of the conductive resin layer.

[0157] For example, the plating layer may be formed by a plating method, such as sputtering or electric deposition.

[0158] The above-mentioned embodiments will be described in more detail with reference to the following examples, which are merely for illustrative purposes and are not intended to limit the scope of the invention.

[0159] [Example] (Manufacturing multilayer ceramic capacitors) Examples 1 to 3 Titanium hydroxide and barium hydroxide were mixed in a molar ratio of 1:1.1 and subjected to a hydrothermal reaction at a pressure of 4 MPa and a temperature of 250°C to produce barium titanate (BaTiO 3 ) powder was subjected to grain growth. Tetraethyl orthosilicate (TEOS) was added to the aqueous solution in which the barium titanate powder with completed grain growth was dispersed, at 0.8 mol parts per 100 mol parts of the barium titanate powder. It was then heat-treated at a temperature of 200°C for 2 hours to produce a dielectric powder in which the surface of the barium titanate-based main component was coated with Si.

[0160] The produced dielectric powder and dysprosium oxide (Dy 2 O 3 ) was mixed with 100 mol parts of barium titanate powder at 0.8 mol parts to produce a dielectric slurry. 2 The mixture was mixed with ethanol / toluene and a wetting dispersant, polyvinyl butyral (PVB) resin as a binder, using a 100% alcohol-based ball as a dispersion medium, and then mechanically milled.

[0161] The manufactured dielectric slurry was used to produce a dielectric green sheet using an on-roll coater with a head ejection method.

[0162] A conductive paste layer containing nickel (Ni) was printed on the surface of the dielectric green sheet, and the dielectric green sheets (width × length × height = 3.2 mm × 2.5 mm × 2.5 mm) with the conductive paste layer formed were laminated and pressure-bonded to produce a dielectric green sheet laminate.

[0163] The dielectric green sheet laminate was subjected to a plasticizing process in a nitrogen atmosphere at 400 °C or lower and then fired under the following conditions at a firing temperature of 1300 °C or lower and a hydrogen concentration of 1.0% H. 2 For reference, Examples 1 to 3 were fired at firing temperatures of 1150 °C to 1170 °C, specifically at temperatures of 1150 °C, 1160 °C, and 1170 °C, respectively.

[0164] Subsequently, a multilayer ceramic capacitor was manufactured through processes such as external electrode and plating.

[0165] Comparative Examples 1 to 4 Titanium hydroxide and barium hydroxide were mixed at a molar ratio of 1:1.1, and after a hydrothermal reaction at a pressure of 4 MPa and a temperature of 250 °C, they were dried to produce barium titanate (BaTiO 3 ) powder.

[0166] The manufactured barium titanate powder was mixed with silicon dioxide (SiO 2 ) and dysprosium oxide (Dy 2 O 3 ) as secondary element powders to produce a dielectric slurry. At this time, silicon dioxide (SiO 2 ) and dysprosium oxide (Dy 2 O 3 ) were mixed at 0.8 mol parts and 0.8 mol parts, respectively, per 100 mol parts of the barium titanate powder. The mixing was carried out using zirconium balls (ZrO 2The mixture was mixed with ethanol / toluene, a wetting dispersant, and polyvinyl butyral (PVB) resin as a binder in a 100% alcohol-based dispersion medium (100 ml) of 1000 ml of ethanol / toluene, and then mechanically milled.

[0167] Using the prepared dielectric slurry, multilayer ceramic capacitors were manufactured in the same manner as in Example 1. At this time, Comparative Examples 1 to 4 were manufactured by firing at a firing temperature of 1150°C to 1180°C, specifically, at temperatures of 1150°C, 1160°C, 1170°C, and 1180°C, respectively.

[0168] Evaluation 1: TEM-EDS analysis The multilayer ceramic capacitors manufactured in Examples 1 to 3 and Comparative Examples 1 to 4 were subjected to TEM-EDS (Transmission Electron Microscopy-Energy Dispersive Spectroscopy) analysis, and the results are shown in FIG.

[0169] The TEM-EDS analysis was performed as follows. The multilayer ceramic capacitors manufactured in Examples 1 to 3 and Comparative Examples 1 to 4 were immersed in an epoxy mixture and cured, and then the W-axis and T-axis faces (WT faces) of the capacitor body 110 were polished to a depth of 1 / 2 in the L-axis direction, and then fixed and maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active area where the dielectric layers and the internal electrode layers intersect could be observed. The cross-sectional sample was measured using a TEM so that the three central dielectric layers and two internal electrode layers could be seen in the active area. The TEM was measured using a Xe-FIB (focused ion beam) at an accelerating voltage of 200 kV and an analysis magnification of 79 k. The measured images of Example 1 are shown in FIG. 7.

[0170] In the transmission electron microscope (TEM) image of the measured cross-sectional sample, EDS analysis was performed on seven random points on the grain boundaries in the dielectric layer to determine the standard deviation of Si atomic %, Si / Ti atomic ratio, Si / Ni atomic ratio, and Si / Dy atomic ratio, which are shown in Table 1 below. Here, the standard deviation of Si atomic % indicates the standard deviation of the Si atomic % relative to the total amount of grain boundary components, and the standard deviation is the square root of the mean of the squares of the deviations.

[0171] FIG. 7 is a TEM analysis image of the active area of ​​the multilayer ceramic capacitor according to Example 1.

[0172] [Table 1]

[0173] From Table 1, it can be seen that in the case of Examples 1 to 3 using dielectric powder in which the surface of barium titanate is coated with silicon (Si) according to an embodiment, the standard deviation of the Si atomic % is in the range of 0.20 to 0.80 compared to Comparative Examples 1 to 4. This shows that in the dielectric layer of the multilayer ceramic capacitor according to an embodiment, inorganic elements are uniformly distributed on the surface of barium titanate within the grain boundaries.

[0174] Evaluation 2: SEM-EDS line analysis The multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 were subjected to a line analysis using SEM-EDS (scanning electron microscope-energy dispersive spectroscopy). The results are shown in FIGS.

[0175] The SEM-EDS line analysis was measured in the following manner. After the multilayer ceramic capacitor 100 was immersed in an epoxy mixture and cured, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 were polished to 1 / 2 points in the L-axis direction, and then fixed and maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active area where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect and the cover part corresponding to the first surface of the active area in the thickness direction (T-axis direction) can be observed. Then, the five dielectric layers and the internal electrode layers of the active area were measured using a scanning electron microscope (SEM) so that they could be seen from the cover part of the cross-sectional sample. The scanning electron microscope used was, for example, a Verios G4 product from Thermofisher Scientific, and the measurement conditions were 10 kV, 0.2 nA, and the analysis magnification was 50 kx. Next, EDS analysis was performed on seven points in the dielectric layer along a line from the cover to a point passing through the five dielectric layers and internal electrode layers in the active area in the SEM image of the measured cross-section sample, and the amplitude of the silicon (S1) peak in the dielectric layer was calculated. In Table 2 below, the unit of amplitude is kcps, and the minimum value of the silicon (Si) peak is designated as 0 and shown based on this.

[0176] FIG. 8 is a SEM-EDS line analysis image of the cover and active area of ​​the multilayer ceramic capacitor according to Example 1, and FIG. 9 is a SEM-EDS line analysis image of the cover and active area of ​​the multilayer ceramic capacitor according to Comparative Example 1.

[0177] [Table 2]

[0178] Through FIGS. 8 and 9 and Table 2, in the case of Example 1 using dielectric powder with silicon (Si) coated on the surface of barium titanate according to an embodiment, it can be seen that the amplitude of the peak of silicon (Si) in the dielectric layer satisfies the range of 8.6 kcps to 25 kcps. This means that the variation in the peak intensity of silicon (Si) is large, and it can be seen that the content of silicon (Si) in the dielectric layer is higher compared to the Si content in the adjacent internal electrode layer.

[0179] Rating 3: Reliability High-temperature harsh reliability (HALT) was measured for the multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1, and the results are shown in FIGS. 10 and 11.

[0180] Specifically, 20 multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 were each prepared and mounted on a measurement substrate, and high-temperature harsh reliability (HALT) was measured under the conditions of 105 °C, 12 hours, and 2 Vr using ESPEC (PV-222, HALT) equipment.

[0181] FIG. 10 is a graph showing the high-temperature harsh reliability of the multilayer ceramic capacitor according to Example 1, and FIG. 11 is a graph showing the high-temperature harsh reliability of the multilayer ceramic capacitor according to Comparative Example 1.

[0182] Referring to FIGS. 10 and 11, in the case of Example 1 where the standard deviation of the atomic percentage of the inorganic element Si has a value within the range of 0.20 to 0.80 according to an embodiment, it can be seen that it is superior in high-temperature harsh reliability due to its excellent variation characteristics of insulation resistance (IR) compared to Comparative Example 1.

[0183] Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and it can be variously modified and implemented within the scope of the claims, the description of the invention, and the attached drawings, and it is natural that this also belongs to the scope of the present invention.

Explanation of Reference Numerals

[0184] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: 1st internal electrode 122:Second internal electrode 131: 1st external electrode 132:Second external electrode 10: Dielectric grain 11: Core section 12: Shell part 20: Grain boundary

Claims

1. a capacitor body including a dielectric layer and an internal electrode layer; an external electrode disposed on an outer side of the capacitor body; The dielectric layer includes a plurality of dielectric grains and a grain boundary located between adjacent dielectric grains, The grain boundaries include a barium titanate-based main component including barium (Ba) and titanium (Ti) and an inorganic element including Si (silicon), The standard deviation of the atomic percentage of the inorganic element relative to the total amount of components in the crystal grain boundary is 0.20 to 0.80, and the standard deviation is obtained as the square root of the mean of the squares of the deviations.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the grain boundaries have a barium (Ba)-inorganic element composite phase.

3. The grain boundaries further comprise nickel (Ni); 2. The multilayer ceramic capacitor according to claim 1, wherein an atomic ratio of the inorganic element to the nickel (Ni) at the grain boundary is 1.00 to 2.

10.

4. 2. The multilayer ceramic capacitor according to claim 1, wherein an atomic ratio of the inorganic element to the titanium (Ti) at the grain boundary is 0.010 to 0.

065.

5. 2. The multilayer ceramic capacitor according to claim 1, wherein the inorganic element further comprises dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof.

6. The multilayer ceramic capacitor according to claim 1, wherein the grain boundaries further contain a minor component selected from the group consisting of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), or a combination thereof.

7. The auxiliary component includes dysprosium (Dy), 7. The multilayer ceramic capacitor according to claim 6, wherein an atomic ratio of the inorganic element to the minor component dysprosium (Dy) at the grain boundary is 0.10 to 3.

00.

8. The multilayer ceramic capacitor according to claim 1 , wherein at least one of the plurality of dielectric crystal grains includes a core portion and a shell portion surrounding the core portion.

9. 9. The multilayer ceramic capacitor according to claim 8, wherein the shell portion contains a barium titanate-based main component containing barium (Ba) and titanium (Ti), and an inorganic element containing Si (silicon).

10. 9. The multilayer ceramic capacitor according to claim 8, wherein the inorganic elements of the shell portion further include dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof.

11. The multilayer ceramic capacitor according to claim 8, wherein the shell portion further comprises a minor component selected from the group consisting of dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), silicon (Si), aluminum (Al), calcium (Ca), and combinations thereof.

12. the capacitor body has an active region in which the dielectric layers and the internal electrode layers are alternately arranged; 2. The multilayer ceramic capacitor according to claim 1, wherein a peak amplitude of silicon (Si) in the dielectric layer is 8.6 kcps to 25 kcps when the active region is analyzed by SEM-EDS (Scanning Electron Microscopy-Energy Dispersive Spectroscopy).

13. A step of preparing a dielectric powder in which the surface of a barium titanate-based main component containing barium (Ba) and titanium (Ti) is coated with an inorganic element containing Si (silicon); preparing a dielectric green sheet using a dielectric slurry containing the dielectric powder, and forming a conductive paste layer on a surface of the dielectric green sheet; laminating the dielectric green sheets having the conductive paste layers formed thereon to manufacture a dielectric green sheet laminate; sintering the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body; The dielectric layer includes a plurality of dielectric grains and a grain boundary located between adjacent dielectric grains, The grain boundaries include a barium titanate-based main component including barium (Ba) and titanium (Ti) and an inorganic element including Si (silicon), A method for producing a multilayer ceramic capacitor, wherein a standard deviation of the atomic percentage of the inorganic element relative to the total amount of components of the crystal grain boundary is 0.20 to 0.80, and the standard deviation is obtained as the square root of the mean of the squares of the deviations.

14. The step of preparing the dielectric powder comprises: A step of hydrothermally synthesizing barium titanate-based main component powder and growing grains; adding an inorganic salt containing Si (silicon) after the grain growth is completed; and The method of claim 13, further comprising: performing a heat treatment after adding the inorganic salt.

15. 15. The method for producing a multilayer ceramic capacitor according to claim 14, wherein the inorganic salt further comprises dysprosium (Dy), magnesium (Mg), manganese (Mn), barium (Ba), aluminum (Al), vanadium (V), calcium (Ca), lithium (Li), copper (Cu), terbium (Tb), niobium (Nb), samarium (Sm), gadolinium (Gd), or a combination thereof.

16. The method for producing a multilayer ceramic capacitor according to claim 14 or 15, wherein the inorganic salt includes an alkoxide-based compound.

17. 16. The method for producing a multilayer ceramic capacitor according to claim 14, wherein the inorganic salt is added in an amount of 0.1 to 5.0 parts by mole with respect to 100 parts by mole of the barium titanate-based main component powder.

18. The method for producing a multilayer ceramic capacitor according to claim 14, wherein the heat treatment is performed at a temperature of 100°C to 300°C.

19. The method for producing a multilayer ceramic capacitor according to claim 13, wherein the dielectric slurry further contains a subcomponent powder of a dysprosium (Dy)-containing compound, a terbium (Tb)-containing compound, a manganese (Mn)-containing compound, a vanadium (V)-containing compound, a barium (Ba)-containing compound, a silicon (Si)-containing compound, an aluminum (Al)-containing compound, a calcium (Ca)-containing compound, or a combination thereof.

20. The method for producing a multilayer ceramic capacitor according to claim 19, wherein the auxiliary component powder is contained in an amount of 0.01 to 5 parts by mole with respect to 100 parts by mole of the barium titanate-based main component powder.

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