Wiring board and electronic device
Patent Information
- Application Number
- JP2025026197
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-06-29
- Filing Date
- 2025-02-20
- Publication Date
- 2025-09-18
AI Technical Summary
Existing wiring boards in communication devices face challenges in reducing signal transmission loss and noise, particularly at high frequencies, due to inadequate grounding configurations.
The proposed wiring board configuration includes an insulating substrate with signal wiring, first and second grounds on the upper surface, a lower ground on the lower surface, and via conductors and a side metal layer for electrical connections, optimizing the grounding structure to enhance shielding and reduce transmission loss.
This configuration effectively reduces signal transmission loss and noise by enhancing the shielding properties of the signal wiring, while also allowing for miniaturization of the electronic device and improved reliability, particularly in optical transceivers.
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a wiring board and an electronic device.
Background Art
[0002] In communication devices used in information communication systems, high-frequency compatibility is progressing. Also in wiring boards used in communication devices, for example, the following configuration reduces signal (high-frequency signal) transmission loss and noise.
[0003] In the wiring board described in Patent Document 1, on the upper surface which is the first surface of the insulating substrate, a first ground and a second ground are positioned with a signal wiring therebetween. On the lower surface which is the second surface of the insulating substrate, a lower ground is positioned, and the lower ground faces the signal wiring, the first ground, and the second ground with the insulating substrate therebetween. Inside the insulating substrate, a first via for electrically connecting the first ground and the lower ground is positioned. Inside the insulating substrate, a second via for electrically connecting the second ground and the lower ground is positioned.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
[0005] The wiring board according to the present disclosure includes an insulating substrate having a first surface, a second surface located opposite to the first surface, and a third surface connected to each of the first surface and the second surface, a signal wiring located on the first surface and extending in a first direction, a first ground located on the first surface and sandwiching the signal wiring, being farther from the third surface than the signal wiring, and a second ground located closer to the third surface than the signal wiring, a first lower ground located inside the insulating substrate, a second lower ground located on the second surface, and via conductors located inside the insulating substrate and electrically connecting the first ground, the first lower ground, and the second lower ground. In a plan view, the signal wiring and the second lower ground are located overlapping each other.
[0006] The electronic device according to the present disclosure includes the wiring board, electronic components mounted on the wiring board, a bonding material located on the second surface of the insulating substrate, and a mounting substrate bonded to the wiring board via the bonding material.
Brief Description of the Drawings
[0007]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Modes for Carrying Out the Invention
[0008] Hereinafter, a wiring board and an electronic device according to embodiments of the present disclosure will be described in detail with reference to the drawings. However, each drawing referred to below shows only the components necessary for explaining the embodiments in a simplified manner for convenience of explanation. Therefore, the wiring board and the electronic device according to the embodiments of the present disclosure may include any components not shown in the respective drawings referred to. Also, the dimensions of the components in each drawing do not necessarily faithfully represent the actual dimensions of the components and the dimensional ratios of each member.
[0009] In the present disclosure, the first direction is the left - right direction in the plan view shown in FIG. 1. The second direction is the up - down direction in the plan view shown in FIG. 1, in other words, it is the direction orthogonal to the first direction on the first surface. The third direction is the thickness direction of the insulating substrate, which is the direction orthogonal to the first direction and the second direction. The third direction is the up - down direction in the side view. In the side view and cross - sectional view of the present disclosure, the first surface of the insulating substrate is located on the upper side, and the second surface of the insulating substrate is located on the lower side. Also, in the drawings of the present disclosure, "LB" indicates the first direction, "WB" indicates the second direction, "TB" indicates the third direction, "U" indicates the upper side, and "D" indicates the lower side. In the drawings of the present disclosure, in addition to applying hatching to the cross - sectional part, dots are attached to the surface of the conductor part.
[0010] 〔Embodiment 1〕 Embodiment 1 of the present disclosure will be described with reference to FIGS. 1 to 6. FIG. 1 is a schematic plan view of an electronic device according to Embodiment 1. FIG. 2 is a schematic side view of the electronic device shown in FIG. 1 as viewed from the second direction. FIG. 3 is a schematic plan view of a wiring board according to Embodiment 1. FIG. 4 is a schematic side view of the wiring board shown in FIG. 3 as viewed from the second direction. FIG. 5 is a schematic cross - sectional view taken along the line V - V in FIG. 3. FIG. 6 is a schematic bottom view of the wiring board shown in FIG. 3.
[0011] (Outline of Electronic Device 100) The electronic device 100 according to Embodiment 1 shown in FIGS. 1 to 2 is used for an optical transceiver (not shown). The electronic device 100 includes a wiring board 1, electronic components 5 mounted on the wiring board 1, a bonding material 7 located on the second surface of the insulating substrate, and a mounting substrate 6 bonded to the wiring board 1 via the bonding material 7. In the present disclosure, the electronic component 5 may be, for example, a laser diode that converts an electrical signal into an optical signal. Although not shown, the optical transceiver may include an optical fiber that transmits an optical signal and a lens located between the laser diode and the incident end of the optical fiber. The lens emits the optical signal converted by the laser diode toward the incident end of the optical fiber. The mounting substrate 6 may be an insulating substrate such as ceramics or resin. The electronic device 100 may be used for communication devices other than optical transceivers.
[0012] (Configuration of Wiring Board 1) As shown in the examples of FIGS. 3 to 6, the wiring board 1 may include a rectangular plate-shaped insulating substrate 11. The insulating substrate 11 may be made of ceramics such as an aluminum oxide sintered body (alumina ceramics), an aluminum nitride sintered body, a mullite sintered body, or a glass-ceramics sintered body. The insulating substrate 11 may be composed of one or more insulating layers. The insulating substrate 11 may have a first surface 11u, a second surface 11d located opposite to the first surface 11u, and a third surface 11s connected to each of the first surface 11u and the second surface 11d. In each figure, an example is shown where the angle formed by the first surface 11u and the third surface 11s of the insulating substrate 11 is 90 degrees, and the angle formed by the second surface 11d and the third surface 11s of the insulating substrate 11 is 90 degrees, but it is not limited thereto. In addition, the side surfaces other than the third surface 11s (the other surfaces where the first surface 11u and the second surface 11d are connected) are not particularly limited.
[0013] On the first surface 11u of the insulating substrate 11, a signal wiring 12 for transmitting a signal (high-frequency signal) for driving the electronic component 5 may be located. The signal wiring 12 may be formed of a metal material containing, for example, Ti (titanium), Pt (platinum), and Au (gold). The signal wiring 12 may extend in the first direction on the first surface 11u of the insulating substrate 11. The signal wiring 12 may be arranged from near one end of the insulating substrate 11 in the first direction to near the other end. The signal wiring 12 may be bent in a plan view. As shown in the example of the side view of FIG. 2, since the third surface 11s is rectangular with the first direction being the long side, it can also be said that the signal wiring 12 extends in the direction along the third surface 11s.
[0014] The signal wiring 12 may be located near the third surface 11s with respect to the central position 11c in the second direction of the insulating substrate 11. In other words, the signal wiring 12 may be biased closer to the third surface 11s with respect to the central position 11c in the second direction of the insulating substrate 11. The ratio of the bias of the signal wiring 12 with respect to the central position 11c in the second direction of the insulating substrate 11 may be 25% or more. The ratio of the bias of the signal wiring 12 refers to the ratio of the amount of bias of the central position of the signal wiring 12 with respect to the central position 11c in the second direction of the insulating substrate 11 to half of the length of the insulating substrate 11 in the second direction. The case where the signal wiring 12 is located near the third surface 11s with respect to the central position 11c in the second direction of the insulating substrate 11 means that the signal wiring 12 is located near the side metal layer 17. According to such a configuration, the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced. Also, on the first surface 11u, the laser diode, which is the electronic component 5, can be mounted at or near the center in the second direction of the wiring board 1. Therefore, when the electronic device 100 is used as, for example, an optical transceiver, the positional deviation in the second direction between the lens of the optical transceiver and the wiring board 1 can be reduced, and the miniaturization of the optical transceiver can be achieved.
[0015] On the first surface 11u of the insulating substrate 11, a first ground 13 and a second ground 14 that define a reference potential may be positioned with the signal wiring 12 therebetween. The first ground 13 may be positioned farther from the third surface 11s of the insulating substrate 11 than the signal wiring 12. The second ground 14 may be positioned closer to the third surface 11s of the insulating substrate 11 than the signal wiring 12. One end of the second ground 14 is connected to the first ground 13. The first ground 13 and the second ground 14 may each be formed of a metallic material containing, for example, Ti (titanium), Pt (platinum), and Au (gold). The portion between the signal wiring 12 and the first ground 13 on the first surface 11u of the insulating substrate 11 may have the insulating substrate 11 exposed. The portion between the signal wiring 12 and the second ground 14 on the first surface 11u of the insulating substrate 11 may have the insulating substrate 11 exposed.
[0016] The space between the first ground 13 and the signal wiring 12 may be insulated by the insulating substrate 11. The distance between the first ground 13 and the signal wiring 12 does not have to be constant along the signal wiring 12. Also, the space between the second ground 14 and the signal wiring 12 is insulated by the insulating substrate 11. The distance between the second ground 14 and the signal wiring 12 does not have to be constant along the signal wiring 12.
[0017] On the second surface 11d of the insulating substrate 11, a lower ground 15 that defines a reference potential may be positioned. The lower ground 15 may face the signal wiring 12, the first ground 13, and the second ground 14 with the insulating substrate 11 sandwiched therebetween by the lower ground 15 and the signal wiring 12. In other words, when the wiring board 1 is viewed in plan perspective, the lower ground 15 may overlap the signal wiring 12, the first ground 13, and the second ground 14. The lower ground 15 may be formed of a metallic material containing, for example, Ti (titanium), Pt (platinum), Au (gold), etc. The space between the lower ground 15 and the signal wiring 12 may be insulated by the insulating substrate 11.
[0018] Inside the insulating substrate 11, as shown in FIG. 5, a via conductor 16 that electrically connects the first ground 13 and the lower ground 15 may be located. The via conductor 16 may be a metal powder metallization containing components such as tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), or copper (Cu). The via conductor 16 is formed by embedding a metallization paste for the via conductor into a through hole formed by a processing method such as punching or laser processing in a ceramic green sheet by a method such as screen printing or press-fitting, and firing it together with a molded body formed by laminating one or more ceramic green sheets.
[0019] A plurality of via conductors 16 may be provided. In the example shown in FIG. 5, the upper end portion of each via conductor 16 may be connected to the first ground 13, and the lower end portion of each via conductor 16 may be connected to the lower ground 15. The plurality of via conductors 16 may be arranged at equal intervals along the signal wiring 12. The plurality of via conductors 16 may be arranged at unequal intervals. When the wiring board 1 is viewed in a plane perspective, the distance between each via conductor 16 and the signal wiring 12 may be the same or different. When a plurality of via conductors 16 are arranged, the shielding property of the signal wiring 12 can be enhanced by the plurality of via conductors 16. Further, when the plurality of via conductors 16 are arranged along the signal wiring 12, the shielding property of the signal wiring 12 can be further enhanced. Therefore, according to Embodiment 1 of the present disclosure, the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced.
[0020] On the third surface 11s of the insulating substrate 11, a side metal layer 17 that electrically connects the second ground 14 and the lower ground 15 may be located. The side metal layer 17 may be made of a metal material such as Ti (titanium), for example. The upper edge portion of the side metal layer 17 may be connected to the edge portion of the second ground 14 (the edge portion on the third surface 11s side). The upper edge portion of the side metal layer 17 may overlap the edge portion of the second ground 14. In the example shown in FIG. 1, the lower edge portion of the side metal layer 17 may be connected to the edge portion of the lower ground 15 (the edge portion on the third surface 11s side). The lower edge portion of the side metal layer 17 may overlap the edge portion of the lower ground 15.
[0021] When the side metal layer 17 electrically connects the second ground 14 and the lower ground 15, compared with the case of providing a via conductor for electrically connecting the second ground 14 and the lower ground 15 inside the insulating substrate 11, the shielding property of the signal wiring 12 can be enhanced. Therefore, the transmission loss and noise of the signal (high-frequency signal) transmitted by the signal wiring 12 can be sufficiently reduced. Also, compared with the case of providing a via conductor for electrically connecting the second ground 14 and the lower ground 15 inside the insulating substrate 11, the length of the insulating substrate 11 in the second direction can be shortened. Therefore, miniaturization of the wiring board 1, in other words, miniaturization of the electronic device 100 can be achieved.
[0022] As shown in the examples of FIGS. 2 and 4, the side metal layer 17 may be arranged over the entire third surface 11s of the insulating substrate 11 so as to extend along the entire area of the signal wiring 12 and be connected to the second ground 14 and the lower ground 15. The side metal layer 17 may be arranged in a partial area of the third surface 11s of the insulating substrate 11 so as to extend along at least half of the area (half of the length) of the signal wiring 12 and be connected to the second ground 14 and the lower ground 15.
[0023] The wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 for bonding the insulating substrate 11 to the mounting substrate 6 may be lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7. The insulating substrate 11 includes ceramics such as aluminum oxide (Al2O3) sintered body, aluminum nitride (AlN) sintered body, silicon carbide (SiC) sintered body, glass ceramics, silicon nitride (Si3N4) sintered body, etc., and insulating materials such as epoxy resin, polyimide resin, polyimide siloxane resin, etc. The bonding material 7 includes a solder material (such as gold-tin, etc.) or a brazing material, etc. The wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 refers to the ease of wetting spread of the bonding material 7 in the side surface metal layer 17 located on the third surface 11s of the insulating substrate 11. The wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7 refers to the ease of wetting spread of the bonding material 7 in the lower ground 15 located on the second surface 11d of the insulating substrate 11.
[0024] When the wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 is lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7, when bonding the insulating substrate 11 to the mounting substrate 6, the creeping up of the bonding material 7 onto the side surface metal layer 17 and the second ground 14 can be reduced. Therefore, when bonding the insulating substrate 11 to the mounting substrate 6, the thermal expansion difference at both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. in the insulating substrate 11 can be reduced. Also, when bonding the insulating substrate 11 to the mounting substrate 6, the lifting on one side of the insulating substrate 11 in the second direction can be reduced. And when the electronic device 100 (wiring board 1) is used in, for example, an optical transceiver, the inclination, etc. of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be enhanced.
[0025] Here, the signal wiring 12, the first ground 13, and the second ground 14 form a coplanar line. The signal wiring 12 and the lower ground 15 form a microstrip line. The first ground 13 is electrically connected to the lower ground 15 by a via conductor 16 and is kept at the same potential as the lower ground 15. The second ground 14 is electrically connected to the lower ground 15 by a side metal layer 17 and is kept at the same potential as the lower ground 15.
[0026] (Manufacturing process of the wiring board 1).
[0027] When the insulating substrate 11 is made of, for example, an aluminum nitride sintered body, appropriate organic binders, solvents, etc. are added to and mixed with raw material powders such as aluminum nitride (AlN), erbium oxide (Er2O3), yttrium oxide (Y2O3), etc. to produce a slurry. This slurry is formed into a sheet by a doctor blade method, a calendar roll method, etc. to produce a ceramic green sheet. Then, appropriate punching is performed on the ceramic green sheet, and one or more ceramic green sheets are laminated to produce a molded body. By firing the molded body at a high temperature (about 1800 °C), a sintered body that will be the basis for a plurality of insulating substrates 11 is produced. And after polishing the surface of the sintered body, the sintered body is sliced to take out a plurality of insulating substrates 11 from the sintered body.
[0028] The via conductor 16 is a metal powder metallization containing components such as tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), or copper (Cu). The via conductor 16 is formed by embedding a conductive paste for the via conductor into a through-hole formed in a ceramic green sheet by a processing method such as punching or laser processing by a method such as screen printing or press-fitting, and firing together with a molded body formed by laminating one or more ceramic green sheets. The signal wiring 12, the first ground 13, and the second ground 14 are metal layers containing components such as titanium (Ti), platinum (Pt), and gold (Au), and are formed on the first surface 11u (upper surface) of a sintered body with a polished surface by a thin film forming method such as vapor deposition, ion plating, or sputtering. The lower ground 15 is a metal layer containing components such as titanium (Ti), platinum (Pt), and gold (Au), and is formed on the second surface 11d (lower surface) of a sintered body with a polished surface by a thin film forming method such as vapor deposition, ion plating, or sputtering.
[0029] The side metal layer 17 is a metal layer containing, for example, titanium (Ti), and is formed on the third surface 11s of the singulated insulating substrate 11 by a thin film forming method such as vapor deposition, ion plating, or sputtering. The side metal layer 17 may be a metal layer having the same configuration as the signal wiring 12, the first ground 13, the second ground 14, and the lower ground 15, or may be a metal layer having a different configuration. For example, when the lower ground 15 is a metal layer of Ti / Pt / Au and the side metal layer 17 is a metal layer of Ti, the wettability of the third surface 11s of the insulating substrate 11 can be made lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7.
[0030] According to Embodiment 1 of the present disclosure, by using the electronic device 100 (wiring board 1) in, for example, an optical transceiver, it is possible to realize an optical transceiver that transmits a good optical signal while reducing the size of the optical transceiver, and improve the reliability of the optical transceiver.
[0031] 〔Other aspects of Embodiment 1〕 Another aspect of Embodiment 1 will be described with reference to FIG. 7.
[0032] FIG. 7 is a schematic partial side view of a wiring board according to another aspect of Embodiment 1 as viewed from the second direction.
[0033] (Configuration of Wiring Board 1A) As shown in the example of FIG. 7, in the wiring board 1A according to another aspect of Embodiment 1, the side metal layer 17 is configured, for example, in a mesh shape or a perforated shape and may have a plurality of openings 17a. The mesh shape includes a mesh shape, a lattice shape, a honeycomb shape, etc. The opening ratio of the side metal layer 17 may be 80% or less.
[0034] When the side metal layer 17 has a plurality of openings 17a, when the insulating substrate 11 is joined to the mounting substrate 6, the creeping of the bonding material 7 onto the side metal layer 17 and the second ground 14 can be reduced. Therefore, according to another aspect of Embodiment 1, when the insulating substrate 11 is joined to the mounting substrate 6, the thermal expansion difference at both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. in the insulating substrate 11 can be reduced. Further, according to another aspect of Embodiment 1, when the lower ground 15 is joined to the mounting substrate 6, the lifting of one side of the insulating substrate 11 in the second direction can be reduced. And according to another aspect of Embodiment 1, when the electronic device 100 (wiring board 1A) is used in, for example, an optical transceiver, the inclination of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be improved.
[0035] In addition, according to another aspect of Embodiment 1, the same effects as those of Embodiment 1 described above are achieved.
[0036] 〔Embodiment 2〕 Embodiment 2 will be described with reference to FIGS. 8 and 9. FIG. 8 is a schematic cross-sectional view of a wiring board according to Embodiment 2. FIG. 9 is a schematic cross-sectional view of a wiring board according to another aspect of Embodiment 2.
[0037] (Configuration of Wiring Board 2) As shown in the examples of FIGS. 8 and 9, the wiring board 2 according to Embodiment 2 has the same configuration as the wiring board 1 according to Embodiment 1, except for some components. Among the components of the wiring board 2, the components different from those of the wiring board 1 according to Embodiment 1 will be described. For convenience of explanation, the same reference numerals are assigned to the components having the same functions as those described in Embodiment 1.
[0038] As shown in FIGS. 8 and 9, the wiring board 2 includes a first lower ground 25 as a lower ground. The first lower ground 25 is an example of a lower ground. In the wiring board 2 according to Embodiment 2, instead of the lower ground 15 being located on the second surface 11d of the insulating substrate 11, the first lower ground 25 may be located inside the insulating substrate 11. The first lower ground 25 may sandwich a part of the insulating substrate 11 between the first lower ground 25 and the signal wiring 12. Further, the first lower ground 25 may sandwich a part of the insulating substrate 11 and face the signal wiring 12, the first ground 13, and the second ground 14. In other words, when the wiring board 1 is viewed in a plan view, the first lower ground 25 may overlap the signal wiring 12, the first ground 13, and the second ground 14. The space between the first lower ground 25 and the signal wiring 12 may be insulated by the insulating substrate 11. As shown in FIGS. 8 and 9, the first lower ground 25 and the side surface metal layer 17 may be connected on the third surface 11s of the insulating substrate 11.
[0039] The first lower ground 25 may be located closer to the first surface 11u of the insulating substrate 11 than the second surface 11d. In other words, the distance between the first lower ground 25 and the first surface 11u of the insulating substrate 11 may be shorter than 50% of the thickness dimension of the insulating substrate 11. The case where the first lower ground 25 is located closer to the first surface 11u than the second surface 11d of the insulating substrate 11 means that the first lower ground 25 is located near the signal wiring 12. According to such a configuration, the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced, and the heat dissipation performance of the electronic component 5 (see FIG. 1) mounted on the wiring board 2 can be enhanced. And when the wiring board 2 is used for, for example, an optical transceiver, a good optical signal can be transmitted, and the reliability of the optical transceiver can be enhanced.
[0040] The via conductor 16 may electrically connect the first ground 13 and the first lower ground 25. When there are a plurality of via conductors 16, the upper end portions of the respective via conductors 16 may be connected to the first ground 13, and the lower portions of the respective via conductors 16 may be connected to the first lower ground 25.
[0041] As in the example shown in FIG. 8, each via conductor 16 may penetrate the first lower ground 25 along the third direction. In this case, the lower end portion of each via conductor 16 may be exposed from the second surface 11d of the insulating substrate 11. Also, as in the example shown in FIG. 9, each via conductor 16 does not have to penetrate the first lower ground 25 along the third direction.
[0042] The side metal layer 17 may electrically connect the second ground 14 and the first lower ground 25. The upper edge portion of the side metal layer 17 is connected to the edge portion of the second ground 14 (the edge portion closer to the third surface 11s). The upper edge portion of the side metal layer 17 may overlap the edge portion of the second ground 14. The side metal layer 17 may be connected to the edge portion of the first lower ground 25 exposed on the third surface 11s as in the examples shown in FIGS. 8 and 9. The end portion of the first lower ground 25 may be exposed in a strip shape on the third surface 11s along the first direction and may be connected to the side metal layer 17 in a strip shape.
[0043] Here, the signal wiring 12, the first ground 13, and the second ground 14 form a coplanar line. The signal wiring 12 and the first lower ground 25 form a microstrip line. The first ground 13 is electrically connected to the first lower ground 25 by the via conductor 16 and is kept at the same potential as the first lower ground 25. The second ground 14 is electrically connected to the first lower ground 25 by the side metal layer 17 and is kept at the same potential as the first lower ground 25.
[0044] The signal wiring 12, the first ground 13, the second ground 14, the via conductor 16, and the side metal layer 17 are formed by the same materials and methods as those in the manufacturing process of the wiring board 1 of Embodiment 1.
[0045] Also, the first lower ground 25 of the wiring board 2 in Embodiment 2 is a metal powder metallization containing components such as tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), or copper (Cu). The first lower ground 25 is formed, for example, by screen-printing a metallization paste for the first lower ground 25 on a ceramic green sheet by a printing method such as screen printing and firing it together with a molded body formed by laminating a plurality of ceramic green sheets.
[0046] In addition, according to Embodiment 2, the same operational effects as those of the aforementioned Embodiment 1 are achieved.
[0047] 〔Another aspect of Embodiment 2〕 Another aspect of Embodiment 2 will be described with reference to FIG. 10. FIG. 10 is a schematic partial side view of a wiring board according to another aspect of Embodiment 2 as viewed from the second direction.
[0048] As in the example shown in FIG. 10, in the wiring board 2A according to another aspect of Embodiment 2, the side surface metal layer 17 may be divided into a first side surface metal layer 17u located on the first surface 11u side (upper side) of the third surface 11s of the insulating substrate 11 and a second side surface metal layer 17d located on the second surface 11d side (lower side) of the third surface 11s of the insulating substrate 11. The dividing point of the side surface metal layer 17 is a contact point or a tangent line between the first lower ground 25 and the side surface metal layer 17. The second side surface metal layer 17d is configured, for example, in a mesh shape or a perforated shape and may have a plurality of openings 17a. The opening ratio of the second side surface metal layer 17d may be 80% or less. When the side surface metal layer 17 has a plurality of openings 17a, when the insulating substrate 11 is joined to the mounting substrate 6, the creeping of the bonding material 7 onto the side surface metal layer 17 and the second ground 14 can be reduced. Therefore, according to another aspect of Embodiment 2, when the insulating substrate 11 is joined to the mounting substrate 6, the thermal expansion difference at both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. in the insulating substrate 11 can be reduced. Further, according to another aspect of Embodiment 2, when the lower ground 15 is joined to the mounting substrate 6, the lifting of one side of the insulating substrate 11 in the second direction can be reduced. And according to another aspect of Embodiment 2, when the electronic device 100 (wiring board 2A) is used in, for example, an optical transceiver, the inclination of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be improved.
[0049] In addition, according to another aspect of Embodiment 2, the same operational effects as those of the aforementioned Embodiment 2 are achieved.
[0050] 〔Embodiment 3〕 Embodiment 3 will be described with reference to FIGS. 11 and 12. FIG. 11 is a schematic cross-sectional view of a wiring board according to Embodiment 3. FIG. 12 is a schematic cross-sectional view of a wiring board according to another aspect of Embodiment 3.
[0051] (Configuration of Wiring Board 3) As shown in FIGS. 11 and 12, the wiring board 3 according to Embodiment 3 has the same configuration as the wiring board 2 according to Embodiment 2, except for some components. Among the components of the wiring board 3, the components different from those of the wiring board 2 will be described. For convenience of explanation, the same reference numerals are given to the components having the same functions as those described in Embodiment 2.
[0052] As shown in FIGS. 11 and 12, the wiring board 3 includes a first lower ground 25 and a second lower ground 35 as lower grounds. The second lower ground 35 is an example of a lower ground. In the wiring board 3, in addition to the first lower ground 25 being located inside the insulating substrate 11, the second lower ground 35 may be located on the second surface 11d of the insulating substrate 11. A part of the insulating substrate 11 is sandwiched between the signal wiring 12 and the first lower ground 25, and a part of the insulating substrate 11 is sandwiched between the first lower ground 25 and the second lower ground 35. The second lower ground 35 may sandwich the insulating substrate 11 between the second lower ground 35 and the signal wiring 12 and face the signal wiring 12, the first ground 13, and the second ground 14. In other words, when the wiring board 1 is viewed in a plane perspective, the second lower ground 35 may overlap the signal wiring 12, the first ground 13, the second ground 14, and the first lower ground 25. The space between the second lower ground 35 and the first lower ground 25 may be insulated by the insulating substrate 11. Therefore, according to Embodiment 3, the ground of the wiring board 3 can be strengthened, and the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced.
[0053] As shown in the example of FIG. 11, each via conductor 16 may penetrate the insulating substrate 11 along the third direction. In this case, each via conductor 16 is connected to the first lower ground 25, and the lower end of each via conductor 16 may be connected to the second lower ground 35. Further, as shown in FIG. 12, each via conductor 16 does not have to penetrate the insulating substrate 11 along the third direction. In this case, each via conductor 16 is connected to the first lower ground 25, and the lower end of each via conductor 16 does not have to be connected to the second lower ground 35.
[0054] The side metal layer 17 may be located on the third surface 11s of the insulating substrate 11. The side metal layer 17 may electrically connect the second ground 14, the first lower ground 25, and the second lower ground 35. The upper edge of the side metal layer 17 is connected to the edge of the second ground 14 (the edge closer to the third surface 11s). The side metal layer 17 may be connected to the edge of the first lower ground 25 exposed on the third surface 11s as in the examples shown in FIGS. 11 and 12. The lower edge of the side metal layer 17 may be connected to the edge of the second lower ground 35 (the edge closer to the third surface 11s). The lower edge of the side metal layer 17 may overlap the edge of the second lower ground 35.
[0055] The wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 for bonding the insulating substrate 11 to the mounting substrate 6 may be lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7. In that case, when bonding the insulating substrate 11 to the mounting substrate 6, the upward creep of the bonding material 7 onto the side metal layer 17 and the second ground 14 can be reduced. Therefore, when bonding the insulating substrate 11 to the mounting substrate 6, the thermal expansion difference at both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. in the insulating substrate 11 can be reduced. Also, when bonding the insulating substrate 11 to the mounting substrate 6, the lifting on one side of the insulating substrate 11 in the second direction can be reduced. And when the electronic device 100 (wiring board 3) is used in, for example, an optical transceiver, the inclination, etc. of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be enhanced. Also, when the side metal layer 17 has the same configuration as the side metal layer 17 of the wiring board 1A according to another aspect of Embodiment 1, the same operational effects as those of another aspect of Embodiment 1 are achieved. In Embodiment 3 of the present disclosure, the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7 refers to the ease of wetting spread of the bonding material 7 in the second lower ground 35 located on the second surface 11d of the insulating substrate 11. Also, the side metal layer 17 may have the same configuration as the side metal layer 17 of the wiring board 1A according to another aspect of Embodiment 1.
[0056] Here, the second lower ground 35 is a metal layer containing components such as titanium (Ti), platinum (Pt), or gold (Au), and is formed on the second surface (lower surface) of the sintered body with a polished surface by a thin film forming method such as vapor deposition, ion plating, or sputtering.
[0057] In addition, according to Embodiment 3, the same operational effects as those of the aforementioned Embodiment 2 are achieved.
[0058] [[Other aspects of Embodiment 3]] Other aspects of Embodiment 3 will be described with reference to FIGS. 13 to 15. FIG. 13 is a schematic cross-sectional view of a wiring board according to another aspect of Embodiment 3, and is a view corresponding to FIG. 5. FIG. 14 is a schematic cross-sectional view of a wiring board according to another aspect of Embodiment 3. FIG. 15 is a schematic enlarged side view of the wiring board shown in FIG. 13.
[0059] (Configuration of wiring board 3A) As shown in the examples of FIGS. 13 to 15, the wiring board 3A according to another aspect of Embodiment 3 has the same configuration as the wiring board 3 according to Embodiment 3, except for some configurations. Among the configurations of the wiring board 3A according to another aspect of Embodiment 3, the configurations different from those of the wiring board 3 according to Embodiment 3 will be described. For convenience of explanation, members having the same functions as the members described in Embodiment 3 are denoted by the same reference numerals.
[0060] In the examples shown in FIGS. 13 to 15, the side metal layer 17 may be located only above the third surface 11s of the insulating substrate 11. The upper edge portion of the side metal layer 17 may be connected to the edge portion of the second ground 14 (the edge portion closer to the third surface 11s). The upper edge portion of the side metal layer 17 may overlap the edge portion of the second ground 14. The side metal layer 17 may be connected to the edge portion of the first lower ground 25 exposed on the third surface 11s as shown in the examples of FIGS. 13 to 15. Also, the lower end portion of the side metal layer 17 may be separated from the edge portion of the second lower ground 35 (the edge portion closer to the third surface 11s) as shown in the examples of FIGS. 13 to 15. A part (lower part) of the third surface 11s of the insulating substrate 11 may be exposed.
[0061] As shown in the example of FIG. 13, each via conductor 16 may penetrate the insulating substrate 11 along the third direction. Also, as shown in the example of FIG. 14, each via conductor 16 may not penetrate the insulating substrate 11 along the third direction.
[0062] When the lower end of the side metal layer 17 is separated from the edge of the second lower ground 35 and a part of the insulating substrate 11 is exposed from the third surface 11s, when bonding the insulating substrate 11 to the mounting substrate 6, since the wettability of the insulating substrate 11 is low, the upward creep of the bonding material 7 onto the side metal layer 17 and the second ground 14 can be reduced. Therefore, according to another aspect of Embodiment 3, when bonding the insulating substrate 11 to the mounting substrate 6, the thermal expansion difference at both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. in the insulating substrate 11 can be reduced. Also, according to this modification, when bonding the insulating substrate 11 to the mounting substrate 6, the upward floating on one side of the insulating substrate 11 in the second direction can be reduced. And according to another aspect of Embodiment 3 of the present disclosure, when the electronic device 100 (wiring board 3A) is used in, for example, an optical transceiver, the inclination, etc. of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be improved.
[0063] In addition, according to other aspects of Embodiment 3, the same operational effects as those of Embodiment 3 described above are achieved.
[0064] Also, one aspect of the present disclosure may be expressed as follows.
[0065] A wiring board according to an aspect of the present disclosure includes an insulating substrate having a first surface, a second surface located opposite to the first surface, and a third surface connected to each of the first surface and the second surface, a signal wiring located on the first surface and extending in a first direction, a first ground located on the first surface with the signal wiring interposed therebetween and being farther from the third surface than the signal wiring, a second ground located closer to the third surface than the signal wiring, a lower ground located at least one of the second surface and the inside of the insulating substrate, a via conductor located inside the insulating substrate and electrically connecting the first ground and the lower ground, and a side surface metal layer located on the third surface. In a top view, no via conductor is disposed between the signal wiring and the side surface metal layer, and the side surface metal layer electrically connects the second ground and the lower ground.
[0066] A wiring board according to an aspect of the present disclosure is a wiring board for mounting an electronic component. The first ground has a larger area than the second ground in a plan view, and the first ground may have the electronic component mounted thereon.
[0067] In a wiring board according to an aspect of the present disclosure, the distance between the signal wiring and the third surface may be shorter than the distance between the center position in a second direction orthogonal to the first direction in the insulating substrate and the third surface.
[0068] In a wiring board according to an aspect of the present disclosure, there are a plurality of the via conductors, and the plurality of via conductors may be arranged along the signal wiring.
[0069] A wiring board according to an aspect of the present disclosure may have a third ground connecting the second ground and the first ground.
[0070] A wiring board according to an aspect of the present disclosure includes a fourth surface facing the third surface, and a metal layer for electrically connecting the first ground and the lower ground may not be located on the fourth surface.
[0071] A wiring board according to one aspect of the present disclosure includes a first lower ground located inside the insulating substrate and closer to the first surface than the second surface as the lower ground, and a part of the insulating substrate may be sandwiched between the first lower ground and the signal wiring.
[0072] A wiring board according to one aspect of the present disclosure may include a first lower ground located inside the insulating substrate and a second lower ground located on the second surface as the lower ground.
[0073] A wiring board according to one aspect of the present disclosure includes a first lower ground located inside the insulating substrate, and an end of the first lower ground may be exposed in a strip shape on the third surface along the first direction and may be connected to the side metal layer in a strip shape.
[0074] A wiring board according to one aspect of the present disclosure, the side metal layer is separated from the second lower ground, and a part of the insulating substrate may be exposed on a part of the third surface.
[0075] A wiring board according to one aspect of the present disclosure, the wettability of the third surface of the insulating substrate with respect to the bonding material for bonding the insulating substrate to the mounting substrate may be lower than the wettability of the second surface with respect to the bonding material.
[0076] A wiring board according to one aspect of the present disclosure, the side metal layer may have a plurality of openings.
[0077] An electronic device according to one aspect of the present disclosure may include the wiring board according to any one of claims 1 to 8, an electronic component mounted on the wiring board, a bonding material located on the second surface of the insulating substrate, and a mounting substrate bonded to the wiring board via the bonding material.
[0078] As described above, the invention according to the present disclosure has been described based on the drawings and examples. However, the invention according to the present disclosure is not limited to each of the above-described embodiments. That is, the invention according to the present disclosure can be variously modified within the scope shown in the present disclosure, and embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the invention according to the present disclosure. In other words, it should be noted that those skilled in the art can easily make various deformations or modifications based on the present disclosure. Also, it should be noted that these deformations or modifications are included in the scope of the present disclosure.
Explanation of Reference Numerals
[0079] 100 Electronic device 1 Wiring board (wiring board according to Embodiment 1 of the present disclosure) 5 Electronic component 6 Mounting substrate 7 Bonding material 11 Insulating substrate 11u First surface 11d Second surface 11s Third surface 11c Central position 12 Signal wiring 13 First ground 14 Second ground 15 Lower ground 16 Via conductor 17 Side metal layer 17a Opening 1A Wiring board (wiring board according to another aspect of Embodiment 1 of the present disclosure) 17u First side metal layer 17d Second side metal layer 2 Wiring board (wiring board according to Embodiment 2 of the present disclosure) 25 First lower ground 3 Wiring board (wiring board according to Embodiment 3 of the present disclosure) 35 Second lower ground 3A Wiring board (wiring board according to another aspect of Embodiment 3 of the present disclosure)
Claims
1. an insulating substrate having a first surface, a second surface opposite the first surface, and a third surface connected to each of the first surface and the second surface; signal wiring located on the first surface and extending in a first direction; a first ground positioned on the first surface across the signal wiring, the first ground being positioned farther from the third surface than the signal wiring and a second ground being positioned closer to the third surface than the signal wiring; a first lower ground located inside the insulating substrate; a second lower ground located on the second surface; a via conductor located inside the insulating substrate and electrically connecting the first ground, the first lower ground, and the second lower ground; In a planar perspective view, the signal wiring and the first lower ground are positioned to overlap each other.
2. The wiring board according to claim 1 , wherein the first lower ground is located closer to the first surface than to the second surface.
3. The wiring board according to claim 1 , wherein the signal wiring is located near the third surface relative to a center position of the insulating substrate in a second direction perpendicular to the first direction.
4. The wiring board according to claim 1 , wherein the signal wiring is bent in a plan view.
5. A wiring board as described in claim 1, wherein the via conductor penetrates the insulating substrate along the thickness direction of the insulating substrate.
6. A wiring board as described in claim 1, wherein an end of the first lower ground is exposed in a strip shape on the third surface along the first direction.
7. A wiring board as described in claim 1, wherein a side metal layer that electrically connects the second ground and the second lower ground is located on the third surface.
8. The wiring board according to any one of claims 1 to 7; an electronic component mounted on the wiring board; a bonding material located on the second surface of the insulating substrate; a mounting substrate joined to the wiring board via the bonding material.