RF signal filter arrangement for plasma processing system

Abstract

SOLUTION: A tunable edge sheath (TES) system includes a coupling ring configured to couple to a bottom surface of an edge ring that surrounds a wafer support area within a plasma processing chamber. The TES system includes an annular-shaped electrode embedded within the coupling ring. The TES system includes a plurality of RF signal supply pins coupled to the electrode within the coupling ring. Each of the plurality of RF signal supply pins extends through a corresponding hole formed through a bottom surface of the coupling ring. The TES system includes a plurality of RF signal filters respectively connected to the plurality of RF supply pins. Each of the plurality of RF signal filters is configured to provide high impedance to RF signals used to generate plasma within the plasma processing chamber.SELECTED DRAWING: Figure 10A

Description

Technical Field

[0001] 1. Field of Disclosure

[0002] This disclosure relates to the manufacture of semiconductor devices.

Background Art

[0003] 2. Description of Related Art

[0004] Plasma etching processes are often used in the manufacture of semiconductor devices on semiconductor wafers. In a plasma etching process, a semiconductor wafer including a semiconductor device being manufactured is exposed to plasma generated within a plasma processing region. The plasma interacts with the materials on the semiconductor wafer to remove materials from the semiconductor wafer and / or modify the materials so that they can then be removed from the semiconductor wafer. The plasma can be generated using a specific reactive gas, whereby the components of the plasma can interact with the materials to be removed or modified from the semiconductor wafer without significantly interacting with the non-removed / non-modified materials on other wafers. The plasma is generated using RF (Radiofrequency) signals for exciting a specific reactive gas. These RF signals are transmitted within the plasma processing region containing the reactive gas, and the plasma processing region is held such that the semiconductor wafer can be exposed. The transmission path of the RF signal through the plasma processing region can affect how the plasma is generated within the plasma processing region. For example, in the range of the plasma processing region where a larger amount of RF signal power is transmitted, the reactive gas can be more strongly excited, resulting in spatial non-uniformity of plasma characteristics across the plasma processing region. The spatial non-uniformity of plasma characteristics can appear as spatial non-uniformity of ion density, ion energy, and / or reactive component density, among other plasma characteristics. Corresponding to the spatial non-uniformity of plasma characteristics, spatial non-uniformity can also occur in the plasma processing results on the semiconductor wafer. That is, the uniformity of the plasma processing results on the semiconductor wafer can be affected by how the RF signal is transmitted through the plasma processing region. This disclosure is described in such a context.

SUMMARY OF THE INVENTION

[0005] In an exemplary embodiment, a variable edge sheath system is disclosed. The variable edge sheath system includes a coupling ring configured to couple to a bottom surface of an edge ring surrounding a wafer support region in a plasma processing chamber. The variable edge sheath system also includes an electrode embedded within the coupling ring. The electrode has an annular shape. The variable edge sheath system also includes a plurality of RF signal supply pins coupled to the electrode embedded within the coupling ring. The plurality of RF signal supply pins each extend through a corresponding hole formed through the bottom surface of the coupling ring. The variable edge sheath system also includes a plurality of RF signal filters each connected to a respective one of the plurality of RF signal supply pins. Each of the plurality of RF signal filters is configured to provide a high impedance to a corresponding RF signal used to generate plasma within the plasma processing chamber. In an exemplary embodiment, a plasma processing system is disclosed. The plasma processing system includes a primary electrode having a substantially upper cylindrical shape defined by a top surface, a bottom surface, and an outer surface. The plasma processing system also includes a ceramic layer disposed on the top surface of the primary electrode. The ceramic layer is configured to receive and support a semiconductor wafer. The plasma processing system further includes an RF signal generator electrically connected to the primary electrode via an impedance matching system. The RF signal generator is configured to generate an RF signal and supply it to the primary electrode. The plasma processing system also includes an edge ring formed of a conductive material and configured to surround the ceramic layer. The edge ring is disposed adjacent to the ceramic layer in the radial direction. The plasma processing system further includes a coupling ring coupled to the bottom surface of the edge ring. The coupling ring is formed of an electrically insulating material. The coupling ring includes an embedded electrode. The plasma processing system also includes a plurality of RF signal supply pins electrically and physically connected to the embedded electrode. The plurality of RF signal supply pins each extend through a corresponding hole formed through the bottom surface of the coupling ring. The plasma processing system further includes a plurality of RF signal filters each connected to a respective one of the plurality of RF signal supply pins. Each of the plurality of RF signal filters is configured to provide a high impedance to the RF signal supplied to the primary electrode by the RF signal generator.

Brief Description of the Drawings

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[0030] In the following description, numerous specific details are set forth in order to provide an understanding of embodiments of the present disclosure. However, it will be apparent to those skilled in the art that embodiments of the present disclosure may be practiced without some or all of these specific details. In other instances, detailed descriptions of well-known processing operations are omitted so as not to unnecessarily obscure the present disclosure.

[0031] In a plasma etching system for manufacturing a semiconductor wafer, the spatial variation of the etching result across the entire semiconductor wafer is characterized by the radial etching uniformity and the azimuthal etching uniformity. The radial etching uniformity can be characterized by the variation of the etching rate as a function of the radial position on the semiconductor wafer extending outward from the center of the semiconductor wafer to the edge of the semiconductor wafer at a given azimuthal position on the semiconductor wafer. Also, the azimuthal etching uniformity can be characterized by the variation of the etching rate as a function of the azimuthal position on the semiconductor wafer centered on the center of the semiconductor wafer at a given radial position on the semiconductor wafer. In some plasma processing systems such as the systems described herein, the semiconductor wafer is disposed on an electrode from which an RF signal is emitted to generate a plasma within a plasma generation region covering the semiconductor wafer. The plasma has characteristics that are controlled to cause a predetermined etching process on the semiconductor wafer.

[0032] FIG. 1A shows a vertical cross-sectional view of a plasma processing system 100 for use in semiconductor chip manufacturing according to some embodiments. The system 100 includes a chamber 101 formed by a wall 101A, an upper member 101B, and a bottom member 101C. The wall 101A, the upper member 101B, and the bottom member 101C collectively form an internal region 103 within the chamber 101. The bottom member 101C includes an exhaust port 105 to which the exhaust gas of the plasma processing operation is directed. In some embodiments, during operation, a suction force is applied to the exhaust port 105 by a turbo pump or other vacuum device to draw process exhaust gas from the internal region 103 of the chamber 101. In some embodiments, the chamber 101 is formed of aluminum. However, in various embodiments, the chamber 101 can be formed of any material that essentially has sufficient mechanical strength and acceptable thermal performance, and also has chemical compatibility with other materials that come into contact with and are exposed to during the plasma processing operation within the chamber 101, such as stainless steel. At least one wall 101A of the chamber 101 includes a door 107 through which the semiconductor wafer W passes when being transferred in and out of the chamber 101. In some embodiments, the door 107 is configured as a slit valve door.

[0033] In some embodiments, the semiconductor wafer W is a semiconductor wafer in a manufacturing process. For ease of explanation, the semiconductor wafer W is hereinafter referred to as the wafer W. However, in various embodiments, the wafer W can be essentially any type of substrate that is subjected to a plasma-based manufacturing process. For example, in some embodiments, the wafer W referred to herein can be a substrate formed from silicon, sapphire, GaN, GaAs, or SiC, or other substrate materials, and can include glass panels / substrates, metal foils, metal sheets, polymer materials, and the like. Also, in various embodiments, the wafer W referred to herein can vary in form, shape, and / or size. For example, in some embodiments, the wafer W referred to herein can be a circular semiconductor wafer on which integrated circuit devices are manufactured. In various embodiments, the circular wafer W can have a diameter of 200 mm (millimeters), 300 mm, 450 mm, or other sizes. Also, in some embodiments, the wafer W referred to herein can be a non-circular substrate, such as a rectangular substrate for a flat panel display, for example.

[0034] Plasma processing system 100 includes an electrode 109 disposed on a facility plate 111. In some embodiments, electrode 109 and facility plate 111 are formed of aluminum. However, in other embodiments, electrode 109 and facility plate 111 can be formed of other conductive materials that have sufficient mechanical strength and are compatible as thermal and chemical performance characteristics. Ceramic layer 110 is formed on the top surface of electrode 109. In some embodiments, the ceramic layer has a vertical thickness of about 1.25 millimeters (mm) when measured perpendicular to the top surface of electrode 109. However, in other embodiments, ceramic layer 110 can have a vertical thickness greater than or less than 1.25 mm. Ceramic layer 110 is configured to receive and support wafer W during the plasma processing operation on wafer W. In some embodiments, the top surface of electrode 190 located radially outside of ceramic layer 110 and the peripheral side surface of electrode 109 are covered with a ceramic spray coat.

[0035] Ceramic layer 110 includes a configuration of one or more clamp electrodes 112 for generating an electrostatic force to hold wafer W on the top surface of ceramic layer 110. In some embodiments, ceramic layer 110 includes a configuration of two clamp electrodes 112 that operate in a bipolar manner to supply a clamping force to wafer W. Clamp electrodes 112 are connected to a direct current (DC) power supply 117 that generates a controlled clamping voltage for holding wafer W on the top surface of ceramic layer 110. Electrical wires 119A, 119B are connected between DC power supply 117 and facility plate 111. The electrical wires / conductors are routed through facility plate 111 and electrode 109 to electrically connect wires 119A, 119B to clamp electrodes 112. DC power supply 117 is connected to control system 120 via one or more signal conductors 121.

[0036] Electrode 109 also includes the configuration of a temperature control fluid channel 123 through which temperature control fluid flows to control the temperature of electrode 109 and further to control the temperature of wafer W. The temperature control fluid channel 123 is piped (fluidly connected) to ports on the facility plate 111. The temperature control fluid supply line and return line are connected to these ports on the facility plate 111 and to the temperature control fluid circulation system 125 as indicated by arrow 126. The temperature control fluid circulation system 125 includes a temperature control fluid source, a temperature control fluid pump, and heat exchangers and other devices, and controls the flow of temperature control fluid through electrode 109 to set and maintain a predetermined wafer W temperature. The temperature control fluid circulation system 125 is connected to the control system 120 via one or more signal conductors 127. In various embodiments, various types of temperature control fluids such as water or a coolant liquid / gas can be used. Also, in some embodiments, the temperature control fluid channel 123 is configured to enable control to spatially vary the temperature of wafer W, for example, in two dimensions (x and y) across the entire wafer W.

[0037] The ceramic layer 110 also includes a configuration of a back gas supply port 108 (see FIG. 2) that is fluidly connected to a corresponding back gas supply channel within the electrode 109. The back gas supply channel within the electrode 109 is wired through the electrode 109 to an interface between the electrode 109 and the facility plate 111. One or more back gas supply lines are connected to ports on the facility plate 111 and the back gas supply system 129 as indicated by the arrow 130. The facility plate 111 is configured to supply back gas from one or more back gas supply lines to the back gas supply channel within the electrode 109. The back gas supply system 129 includes a back gas supply source, a mass flow controller, a flow control valve, and other devices, and supplies a controlled back gas flow through the configuration of the back gas supply port 108 within the ceramic layer 110. In some embodiments, the back gas supply system 129 also includes one or more components for controlling the temperature of the back gas. In some embodiments, the back gas is helium. Also, in some embodiments, the back gas supply system 129 can be used to supply clean dry air (CDA) to the configuration of the back gas supply port 108 within the ceramic layer 110. The back gas supply system 129 is connected to the control system 120 via one or more signal conductors 131.

[0038] The three lift pins 132 extend through the facility plate 111, the electrode 109, and the ceramic layer 110, enabling vertical movement of the wafer W relative to the top surface of the ceramic layer 110. In some embodiments, the vertical movement of the lift pins 132 is controlled by corresponding electromechanical and / or pneumatic lift devices 133 connected to the facility plate 111. The three lift devices 133 are connected to the control system 120 via one or more signal conductors 134. In some embodiments, the three lift pins 132 are arranged to have substantially equal azimuthal intervals with respect to the vertical centerline of the electrode 109 / ceramic layer 110 that extends vertically to the top surface of the ceramic layer 110. Note that the lift pins 132, by rising, receive the wafer W into the chamber 101 and also take out the wafer W from the chamber 101 (see FIG. 1B). Further, the lift pins 132, by descending, place the wafer W on the top surface of the ceramic layer 110 during processing of the wafer W.

[0039] FIG. 2 shows a top view of the ceramic layer 110 and the electrode 109 according to some embodiments. An exemplary arrangement of the clamp electrodes 112 is shown within the ceramic layer 110. Note that since the clamp electrodes 112 are arranged within the vertical thickness of the ceramic layer 110, a portion of the ceramic layer 110 exists above the clamp electrodes 112. FIG. 2 also shows an exemplary arrangement of the back gas supply ports 108. Note that the number and spatial arrangement of the back gas supply ports 108 can vary in different embodiments. In some embodiments, the back gas supply ports 108 are filled with a porous ceramic material that allows a back gas flow through the back gas supply ports 108 and at the same time supplies a solid surface at the location of the back gas supply ports 108. FIG. 2 also shows an exemplary arrangement of the three lift pins 132.

[0040] Also, in various embodiments, one or more of the electrode 109, the facility plate 111, the ceramic layer 110, the clamp electrode 112, the lift pin 132, and essentially any other component related thereto may include one or more sensors, such as sensors for temperature measurement, voltage measurement, and current measurement. Any sensors disposed on the electrode 109, the facility plate 111, the ceramic layer 110, the clamp electrode 112, the lift pin 132, and essentially any other component related thereto are connected to the control system 120 via an electrical wire, an optical fiber, or a wireless connection.

[0041] The facility plate 111 is set within an opening of the ceramic support 113 and is supported by the ceramic support 113. The ceramic support 113 is disposed on the support surface 114 of the cantilever arm assembly 115. In some embodiments, the ceramic support 113 has a substantially annular shape, such that the ceramic support 113 substantially surrounds the radially outer periphery of the facility plate 111 and at the same time provides a support surface 116 on which the bottom outer peripheral surface of the facility plate 111 is placed. The cantilever arm assembly 115 extends through the wall 101A of the chamber 101. In some embodiments, a sealing mechanism 135 is provided within the wall 101A of the chamber 101 in which the cantilever arm assembly 115 is disposed to seal the internal region 103 of the chamber 101 and at the same time enables the cantilever arm assembly 115 to move vertically in the z - direction in a controlled manner.

[0042] The cantilever arm assembly 115 has an open area 118 where various devices, wires, cables, and tubes are routed to support the operation of the system 100. The open area 118 within the cantilever arm assembly is exposed to the ambient conditions outside the chamber 101, such as air composition, temperature, pressure, and relative humidity. Also, an RF signal supply rod 137 is disposed inside the cantilever arm assembly 115. More specifically, the RF signal supply rod 137 is disposed inside a conductive tube 139, and the RF signal supply rod 137 is spaced from the inner wall of the tube 139. The sizes of the RF signal supply rod 137 and the tube 139 are changeable. The region between the inner wall of the tube 139 and the RF signal supply rod 137 inside the tube 139 is occupied by air along the entire length of the tube 139. In some embodiments, the outer diameter (D rod ) of the RF signal supply rod 137 and the inner diameter (D tube ) of the tube 139 are set to satisfy the relationship of ln(D tube / D rod ) >= e 1 .

[0043] In some embodiments, the RF signal supply rod 137 is disposed substantially centrally within the tube 139, and air of substantially uniform radial thickness exists between the RF signal supply rod 137 and the inner wall of the tube 139 along the length of the tube 139. However, in some embodiments, the RF signal supply rod 137 is not disposed centrally within the tube 139. Nevertheless, within the tube 139, there are gaps along the length of the tube 139 at all positions between the RF signal supply rod 137 and the inner wall of the tube 139. The output end of the RF signal supply rod 137 is electrically and physically connected to the lower end of the RF signal supply shaft 141. In some embodiments, the output end of the RF signal supply rod 137 is bolted to the lower end of the RF signal supply shaft 141. The upper end of the RF signal supply shaft 141 is electrically and physically connected to the bottom of the facility plate 111. In some embodiments, the upper end of the RF signal supply shaft 141 is bolted to the bottom of the facility plate 111. In some embodiments, both the RF signal supply rod 137 and the RF signal supply shaft 141 are formed of copper. In some embodiments, the RF signal supply rod 137 is formed of copper, aluminum, or anodized aluminum. In some embodiments, the RF signal supply shaft 141 is formed of copper, aluminum, or anodized aluminum. In other embodiments, the RF signal supply rod 137 and / or the RF signal supply shaft 141 are formed of another conductive material that enables the transmission of RF electrical signals. In some embodiments, the RF signal supply rod 137 and / or the RF signal supply shaft 141 are coated with a conductive material (such as silver or other conductive materials) that enables the transmission of RF electrical signals. Also, in some embodiments, the RF signal supply rod 137 is a solid rod. However, in other embodiments, the RF signal supply rod 137 is a tube. Note that the region 140 surrounding the connection between the RF signal supply rod 137 and the RF signal supply shaft 141 is occupied by air.

[0044] The supply end of the RF signal supply rod 137 is electrically and physically connected to the impedance matching system 143. The impedance matching system 143 is connected to the first RF signal generator 147 and the second RF signal generator 149. The impedance matching system 143 is also connected to the control system 120 via one or more signal conductors 144. The first RF signal generator 147 is also connected to the control system 120 via one or more signal conductors 148. The second RF signal generator 149 is also connected to the control system 120 via one or more signal conductors 150. The impedance matching system 143 includes a configuration of inductors and capacitors sized and connected to enable impedance matching, whereby RF power can be transmitted along the RF signal supply rod 137 and the RF signal supply shaft 141, through the facility plate 111 and the electrode 109, to the plasma processing region 182 above the ceramic layer 110. In some embodiments, the first RF signal generator 147 is a high-frequency RF signal generator and the second RF signal generator 149 is a low-frequency RF signal generator. In some embodiments, the first RF signal generator 147 generates an RF signal in the range of about 50 megahertz (MHz) to about 70 MHz, or in the range of about 54 MHz to about 63 MHz, or at about 60 MHz. In some embodiments, the first RF signal generator 147 supplies RF power in the range of about 5 kilowatts (kW) to about 25 kW, or in the range of about 10 kW to about 20 kW, or in the range of about 15 kW to about 20 kW, or at about 10 kW or about 16 kW. In some embodiments, the second RF signal generator 149 generates an RF signal in the range of about 50 kilohertz (kHz) to about 500 kHz, or in the range of about 330 kHz to about 440 kHz, or at about 400 kHz. In some embodiments, the second RF signal generator 149 supplies RF power in the range of about 15 kW to about 100 kW, or in the range of about 30 kW to about 50 kW, or at about 34 kW or about 50 kW. In an exemplary embodiment, the first RF signal generator 147 is set to generate an RF signal at a frequency of about 60 MHz and the second RF signal generator 149 is set to generate an RF signal at a frequency of about 400 kHz.

[0045] FIG. 3A shows an electrical schematic diagram of an impedance matching system 143 according to some embodiments. The impedance matching system 143 includes a first branch 302A (high-frequency branch) and a second branch 302B (low-frequency branch). The first branch 302A includes circuit components such as an inductor L4, capacitors C2, C7, and C3. The second branch 302B includes circuit components such as inductors L1, L2, capacitors C1, C4, C5, C6, and an inductor L3. In some embodiments, capacitors C1, C2, and C3 are variable capacitors. Capacitors C1 and C2 are main capacitors, and capacitor C3 is a spare capacitor. Inductors L1, L2, L3, and L4 are each formed as a coil made of a conductive material, such as copper. The first branch 302A has an input I1 connected to the output of a first RF signal generator 147. The second branch 302B has an input I2 connected to the output of a second RF signal generator 149. Input I2 is connected to inductor L1.

[0046] As an example, the RF strap referred to herein is a flat and elongated metal strip made of a conductive material such as copper. Thus, the RF strap has a length, a width, and a thickness. The length of the RF strap is greater than the width of the RF strap. Further, the width of the RF strap is greater than the thickness of the RF strap. In some embodiments, the RF strap is flexible to allow for its bending or reformation.

[0047] The first branch 302A includes an RF strap portion 304A (represented as inductor LA), an RF strap portion 304B (represented as inductor LB), an RF strap 304C (represented as inductor LC), an RF strap 304D (represented as inductor LD), and an RF strap 304E (represented as inductor LE). In some embodiments, the RF strap portions 304A and 304B are separate portions of one RF strap, that is, the inductors LA and LB represent separate portions of one RF strap. However, in some embodiments, instead of one RF strap including two RF strap portions 304A and 304B, two separate RF straps are used as the RF strap portions 304A and 304B, respectively. For example, a first RF strap having the inductance of the RF strap portion 304A is connected via a conductive connector to a second RF strap having the inductance of the RF strap portion 304B.

[0048] The capacitor C3 is coupled to a predetermined position P1 on an RF strap that includes both the RF strap portions 304A and 304B via the RF strap 304C. In this way, the predetermined position P1 where the RF strap 304C is connected to the RF strap including both the RF strap portions 304A and 304B determines the respective lengths of the RF strap portions 304A and 304B. Also, the capacitor C7 is coupled to an end of the RF strap portion 304A on the side opposite to the predetermined position P1. The predetermined position P1 is coupled to the RF signal supply rod 137 via the RF strap portion 304B. The RF straps 304D and 304E are coupled to each other at a predetermined position P2. The terminal of the capacitor C2 is also connected to the predetermined position P2. The RF strap 304D is coupled to the inductor L4 and the input I1 of the impedance matching system 143. Each of the RF strap portions 304A and 304B, and each of the RF straps 304C, 304D, and 304E has an inductance. For example, the RF strap portion 304A has an inductance LA, the RF strap portion 304B has another inductance LB, the RF strap 304C has another inductance LC, the RF strap 304D has an inductance LD, and the RF strap 304E has an inductance LE. Note that any of the RF straps such as the RF straps 304A to 304E described in this specification is not formed by winding a coil to form an inductor, but is a flat and elongated metal piece.

[0049] In various embodiments, any capacitor and / or non-strap inductor shown in FIG. 3A can be fixed or variable. For example, in various embodiments, any one or more of capacitors C4 - C7 are fixed capacitors, meaning that their inductance cannot be changed or adjusted. Also, in some embodiments, any one or more of capacitors C4 - C7 are variable capacitors, meaning that their capacitance can be changed / adjusted. In various embodiments, any one or more of inductors L1 - L4 are fixed inductors, meaning that their inductance cannot be changed or adjusted. Also, in various embodiments, any one or more of inductors L1 - L4 are variable inductors, meaning that their inductance can be changed or adjusted.

[0050] Referring back to FIG. 1A, the coupling ring 161 is configured and positioned to extend around the radial outer periphery of the electrode 109. In some embodiments, the coupling ring 161 is formed of a ceramic material. The quartz ring 163 is configured and positioned to extend around the radial outer periphery of both the coupling ring 161 and the ceramic support 113. In some embodiments, the coupling ring 161 and the quartz ring 163 are configured to have substantially aligned top surfaces when the quartz ring 163 is disposed around both the coupling ring 161 and the ceramic support 113. Also, in some embodiments, the substantially aligned top surfaces of the coupling ring 161 and the quartz ring 163 are substantially aligned with the top surface of the electrode 109 that exists outside the radial periphery of the ceramic layer 110. Also, in some embodiments, the cover ring 165 is configured and positioned to extend around the radial outer periphery of the top surface of the quartz ring 163. In some embodiments, the cover ring 165 is formed of quartz. Also, in some embodiments, the cover ring 165 is configured to extend vertically above the top surface of the quartz ring 163. In this way, the cover ring 165 forms the outer peripheral boundary where the edge ring 167 is disposed.

[0051] The edge ring 167 is configured to facilitate the extension of the plasma sheath radially outward beyond the peripheral portion of the wafer W and improve the processing result in the vicinity of the periphery of the wafer W. In various embodiments, the edge ring 167 is made of a conductive material, such as crystalline silicon, polycrystalline silicon (polysilicon), boron-doped single-crystalline silicon, aluminum oxide, quartz, aluminum nitride, silicon nitride, silicon carbide, or a silicon carbide layer on an aluminum oxide layer, or an alloy of silicon, or a combination thereof, and other materials. Note that the edge ring 167 is formed in an annular structure, for example, a ring structure. The edge ring 167 can perform many functions, such as shielding the components under the edge ring 167 to prevent damage by the ions of the plasma 180 formed in the plasma processing region 182. Further, the edge ring 167 enhances the uniformity of the plasma 180 in the outer peripheral edge region of the wafer W and along the outer peripheral edge region.

[0052] The fixed outer support flange 169 is attached to the cantilever arm assembly 115. FIG. 4 shows an enlarged view of a vertical cross-section of the fixed outer support flange 169 according to some embodiments. The fixed outer support flange 169 is configured to extend around the outer vertical side surface 113A of the ceramic support 113, around the outer vertical side surface 163A of the quartz ring 163, and around the lower outer vertical side surface 165A of the cover ring 165. The fixed outer support flange 169 has an annular shape surrounding the assembly of the ceramic support 113, the quartz ring 163, and the cover ring 165. The fixed outer support flange 169 has an L-shaped vertical cross-section including a vertical portion 169A and a horizontal portion 169B. The vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169 has an inner vertical surface 169C disposed opposite the outer vertical side surface 113A of the ceramic support 113, the outer vertical side surface 163A of the quartz ring 163, and the lower outer vertical side surface 165A of the cover ring 165. In some embodiments, the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169 extends over the entire outer vertical side surface 113A of the ceramic support 113, over the entire outer vertical side surface 163A of the quartz ring 163, and over the entire lower outer vertical side surface 165A of the cover ring 165. In some embodiments, the cover ring 165 extends radially outward above the top surface 169E of the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169. In some embodiments, the upper outer vertical side surface 165B of the cover ring 165 (located above the top surface 169E of the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169) is substantially vertically aligned with the outer vertical surface 169D of the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169. The horizontal portion 169B of the L-shaped cross-section of the fixed outer support flange 169 is disposed and fixed on the support surface 114 of the cantilever arm assembly 115. The fixed outer support flange 169 is formed of a conductive material. In some embodiments, the fixed outer support flange 169 is formed of aluminum or anodized aluminum. However, in other embodiments, the fixed outer support flange 169 may be formed of other conductive materials such as copper or stainless steel.In some embodiments, the horizontal portion 169B of the L-shaped cross-section of the fixed outer support flange 169 is bolted to the support surface 114 of the cantilever arm assembly 115.

[0053] The connecting outer support flange 171 is configured and positioned to extend around the outer vertical surface 169D of the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169 and around the upper outer vertical side surface 165B of the covering 165. The connecting outer support flange 171 has an annular shape that surrounds both the vertical portion 169A of the L-shaped vertical cross-section of the fixed outer support flange 169 and the upper outer vertical side surface 165B of the covering 165. The connecting outer support flange 171 has an L-shaped vertical cross-section including a vertical portion 171A and a horizontal portion 171B. The vertical portion 171A of the L-shaped cross-section of the connecting outer support flange 171 has an inner vertical surface 171C that is close to and spaced apart from both the outer vertical side surface 169D of the vertical portion 169A of the L-shaped cross-section of the fixed outer support flange 169 and the upper outer vertical side surface 165B of the covering 165. Thus, the connecting outer support flange 171 is movable in the vertical direction (z-direction) along both the vertical portion 169A of the L-shaped vertical cross-section of the fixed outer support flange 169 and the upper outer vertical side surface 165B of the covering 165, as indicated by the arrow 172. The connecting outer support flange 171 is formed of a conductive material. In some embodiments, the connecting outer support flange 171 is formed of aluminum or anodized aluminum. However, in other embodiments, the connecting outer support flange 171 may be formed of other conductive materials such as copper or stainless steel.

[0054] A plurality of conductive straps 173 are connected between the connecting outer support flange 171 and the fixed outer support flange 169 around the radial outer circumferences of both the connecting outer support flange 171 and the fixed outer support flange 169. In the exemplary embodiments shown in FIGS. 1A, 1B, 4A, 4B, 5, and 6, the conductive straps 173 are shown to have an “outward-facing” configuration, in which the conductive straps 173 bend outward away from the fixed outer support flange 169. FIG. 5 shows a top view of the connecting outer support flange 171 and the fixed outer support flange 169 according to some embodiments, showing a plurality of conductive straps 173 connected between the connecting outer support flange 171 and the fixed outer support flange 169. FIG. 6 shows a perspective view of the top of the connecting outer support flange 171 and the fixed outer support flange 169 according to some embodiments, showing a plurality of conductive straps 173 connected between the connecting outer support flange 171 and the fixed outer support flange 169. In some embodiments, the conductive straps 173 are formed of stainless steel. However, in other embodiments, the conductive straps 173 may be formed of other conductive materials such as aluminum or copper.

[0055] In the examples of FIGS. 1A, 1B, 5, and 6, 48 conductive straps 173 are substantially evenly distributed around the radial outer periphery of the connecting outer support flange 171 and the fixed outer support flange 169. However, the number of conductive straps 173 can be changed in different embodiments. In some embodiments, the number of conductive straps 173 is in the range of about 24 to about 80, or in the range of about 36 to about 60, or in the range of about 40 to about 56. In some embodiments, the number of conductive straps 173 is less than 24. In some embodiments, the number of conductive straps 173 exceeds 80. Since the number of conductive straps 173 affects the ground return path of the RF signal near the periphery of the plasma treatment region 182, the number of conductive straps 173 can affect the uniformity of the processing results across the entire wafer W. Also, the size of the conductive strap 173 can vary in different embodiments. FIG. 7 shows an isometric view of the conductive strap 173 according to some embodiments. The conductive strap 173 has a rectangular prism shape defined by a width (d1), a length (d2), and a thickness (d3).

[0056] Further, FIG. 5 shows the azimuthal interval (d4) between adjacent conductive straps 173 when connected between the connecting outer support flange 171 and the fixed outer support flange 169. In some embodiments, the conductive straps 173 are arranged substantially equidistantly around the outer periphery of the connecting outer support flange 171 and, similarly, around the outer periphery of the fixed outer support flange 169. Thus, in these embodiments, the azimuthal interval (d4) between adjacent conductive straps 173 around the outer periphery of the horizontal portion 171B of the L-shaped vertical cross-section of the connecting outer support flange 171 depends on the number of conductive straps 173, the width dimension (d1) of the conductive straps 173, and the outer diameter of the horizontal portion 171B of the L-shaped vertical cross-section of the connecting outer support flange 171. Similarly, the azimuthal interval (d4) between adjacent conductive straps 173 around the outer periphery of the horizontal portion 169B of the L-shaped vertical cross-section of the fixed outer support flange 169 depends on the number of conductive straps 173, the width dimension (d1) of the conductive straps 173, and the outer diameter of the horizontal portion 169B of the L-shaped vertical cross-section of the fixed outer support flange 169.

[0057] In some embodiments, the conductive strap 173 is connected to the fixed outer support flange 169 by a clamping force applied by fixing the clamping ring 175 to the top surface 169F of the horizontal portion 169B of the L-shaped cross-section of the fixed outer support flange 169. In some embodiments, the clamping ring 175 is bolted to the fixed outer support flange 169. In some embodiments, the bolts fixing the clamping ring 175 to the fixed outer support flange 169 are arranged at positions between the conductive straps 173. However, in some embodiments, one or more bolts fixing the clamping ring 175 to the fixed outer support flange 169 may be arranged to extend through the conductive straps 173. In some embodiments, the clamping ring 175 is formed of the same material as the fixed outer support flange 169. However, in other embodiments, the clamping ring 175 and the fixed outer support flange 169 may be formed of different materials.

[0058] In some embodiments as shown in FIG. 4A, the conductive strap 173 is connected to the connecting outer support flange 171 by a clamping force applied by fixing a clamping ring 177 to the bottom surface 171D of the horizontal portion 171B of the L-shaped cross-section of the connecting outer support flange 171. Alternatively, in some embodiments, each first end of the plurality of conductive straps 173 is connected by a clamping ring 177 to the upper surface 171F of the horizontal portion 171B of the connecting outer support flange 171. In some embodiments, the clamping ring 177 is bolted to the connecting outer support flange 171. In some embodiments, the bolts fixing the clamping ring 177 to the connecting outer support flange 171 are disposed at positions between the conductive straps 173. However, in some embodiments, one or more bolts fixing the clamping ring 177 to the connecting outer support flange 171 may be disposed to extend through the conductive straps 173. In some embodiments, the clamping ring 177 is formed of the same material as the connecting outer support flange 171. However, in other embodiments, the clamping ring 177 and the connecting outer support flange 171 may be formed of different materials.

[0059] A set of support rods 201 is arranged around the cantilever arm assembly 115 and extends vertically through the horizontal portion 169B of the L-shaped cross-section of the fixed outer support flange 169. The upper end of the support rod 201 is configured to engage with the bottom surface 171D of the horizontal portion 171B of the L-shaped cross-section of the connecting outer support flange 171. In some embodiments, each lower end of the support rod 201 engages with a resistance mechanism 203. The resistance mechanism 203 is configured to apply an upward force to the corresponding support rod 201, which allows some downward movement of the support rod 201 but resists the downward movement of the support rod 201. In some embodiments, the resistance mechanism 203 includes a spring for applying an upward force to the corresponding support rod 201. In some embodiments, the resistance mechanism 203 includes a material such as a spring and / or rubber having a spring constant sufficient to apply an upward force to the corresponding support rod 201. When the connecting outer support flange 171 moves downward to engage with the set of support rods 201, the set of support rods 201 and the corresponding resistance mechanism 203 apply an upward force to the connecting outer support flange 171. In some embodiments, the set of support rods 201 includes three support rods 201 and the corresponding resistance mechanism 203. In some embodiments, the support rods 201 are arranged to have substantially equal azimuthal intervals with respect to the vertical centerline of the electrode 109. However, in other embodiments, the support rods 201 are arranged to have unequal azimuthal intervals with respect to the vertical centerline of the electrode 109. Also, in some embodiments, more than three support rods 201 and the corresponding resistance mechanism 203 are provided to support the connecting outer support flange 171.

[0060] Referring back to FIG. 1A, the plasma processing system 100 further includes a C-shroud member 185 disposed above the electrode 109. The C-shroud member 185 is configured to interface and connect with the connecting outer support flange 171. Specifically, by disposing a seal 179 on the top surface 171E of the horizontal portion 171B of the L-shaped cross-section of the connecting outer support flange 171, when the connecting outer support flange 171 moves upward toward the C-shroud member 185, the seal 179 is engaged by the C-shroud member 185. In some embodiments, the seal 179 is conductive to facilitate establishing electrical conduction between the C-shroud member 185 and the connecting outer support flange 171. In some embodiments, the C-shroud member 185 is formed of polysilicon. However, in other embodiments, the C-shroud member 185 is formed of another type of conductive material that is chemically compatible with the processes formed in the plasma processing region 182 and has sufficient mechanical strength.

[0061] The C-shroud is configured to extend around the plasma processing region 182 and radially extend the scope of the plasma processing region 182 into the region defined within the C-shroud member 185. The C-shroud member 185 includes a lower wall 185A, an outer vertical wall 185B, and an upper wall 185C. In some embodiments, the outer vertical wall 185B and the upper wall 185C of the C-shroud member 185 are solid non-perforated members, and the lower wall 185A of the C-shroud member 185 includes a number of vents 186 for flowing process gas from within the plasma processing region 182. In some embodiments, a throttle member 196 is disposed below the vents 186 of the C-shroud member 185 to control the flow of process gas through the vents 186. More specifically, in some embodiments, the throttle member 196 is configured to move vertically up and down perpendicular to the z-direction with respect to the C-shroud member 185 to control the flow of process gas through the vents 186. In some embodiments, the throttle member 196 is configured to engage and / or enter the vents 186.

[0062] The upper wall 185C of the C-shroud member 185 is configured to support the upper electrodes 187A / 187B. In some embodiments, the upper electrodes 187A / 187B include an inner upper electrode 187A and an outer upper electrode 187B. Alternatively, in some embodiments, the inner upper electrode 187A is present but the outer upper electrode 187B is not, and the inner upper electrode 187A extends radially to where the outer upper electrode 187B would be located. In some embodiments, the inner upper electrode 187A is formed of single-crystal silicon and the outer upper electrode 187B is formed of polysilicon. However, in other embodiments, the inner upper electrode 187A and the outer upper electrode 187B may be formed of other materials that are structurally, chemically, electrically, and mechanically compatible with the processes carried out within the plasma processing region 182. The inner upper electrode 187A includes a number of through ports 197 defined as holes that penetrate the entire vertical thickness of the inner upper electrode 187A. The through ports 197 are distributed across the entire inner upper electrode 187A with respect to the x-y plane and provide a flow of process gas from the plenum region 188 above the upper electrodes 187A / 187B to the plasma processing region 182 below the upper electrodes 187A / 187B.

[0063] FIG. 8A shows a vertical cross-sectional view of the upper electrodes 187A / 187B according to some embodiments. In some embodiments, the inner upper electrode 187A includes a plate 211 formed of a semiconductor material such as single-crystal silicon. In some embodiments, a highly conductive layer 213 is formed on and integrated with the top surface of the plate 211. The highly conductive layer 213 has a lower electrical resistance than the semiconductor material of the plate 211. Each through port 197 extends through the entire thickness of the inner upper electrode 187A from the top surface 215 to the bottom surface 217 of the inner upper electrode 187A. As described above, the inner upper electrode 187A physically separates the process gas plenum region 188 from the plasma processing region 182 and is configured to provide a flow of process gas from the process gas plenum region 188 to the plasma processing region 182 through the distribution of the through ports 197.

[0064] FIG. 8B shows a top view of upper electrodes 187A / 187B according to some embodiments. FIG. 8B shows an exemplary distribution of through-holes 197 throughout the inner upper electrode 187A. Note that the distribution of through-holes 197 throughout the inner upper electrode 187A may be configured in a different form in another embodiment. For example, the total number of through-holes 197 in the inner upper electrode 187A and / or the spatial distribution of through-holes 197 in the inner upper electrode 187A may vary in another embodiment. Also, the diameter of the through-holes 197 may vary in another embodiment. In general, it is important to reduce the diameter of the through-holes 197 to a size small enough to prevent the intrusion of plasma 180 from the plasma processing region 182 into the through-holes 197. In some embodiments, when the diameter of the through-holes 197 is reduced, the total number of through-holes 197 in the inner upper electrode 187A is increased to maintain a predetermined total flow rate of the process gas from the process gas plenum region 188 through the inner upper electrode 187A to the plasma processing region 182. Also, in some embodiments, the upper electrodes 187A / 187B are electrically connected to a reference ground potential. However, in other embodiments, the inner upper electrode 187A and / or the outer upper electrode 187B are electrically connected to either their respective DC power source or their respective RF power source by corresponding impedance matching circuits.

[0065] Referring back to FIG. 1A, the plenum region 188 is defined by the upper member 189. One or more gas supply ports 192 are formed through the chamber 101 and the upper member 189 and are in fluid communication with the plenum region 188. The one or more gas supply ports 192 are fluidly connected (pipeds) to the process gas supply system 191. The process gas supply system 191 includes, for example, one or more process gas supply sources, one or more mass flow controllers, one or more flow control valves, and other devices, and supplies a controlled flow of one or more process gases to the plenum region 188 through the one or more gas supply ports 192, as indicated by arrow 193. In some embodiments, the process gas supply system 191 also includes one or more components for controlling the temperature of the process gas. The process gas supply system 191 is connected to the control system 120 via one or more signal conductors 194.

[0066] The processing gap (g1) is defined as the vertical (z-direction) distance measured between the top surface of the ceramic layer 110 and the bottom surface of the inner upper electrode 187A. The size of the processing gap (g1) can be adjusted by moving the cantilever arm assembly 115 in the vertical direction (z-direction). When the cantilever arm assembly 115 moves upward, the connecting outer support flange 171 eventually engages with the lower wall 185A of the C-shroud member 185. At that time, as the cantilever arm assembly 115 continues to move upward until the set of support rods 201 engages with the connecting outer support flange 171, the connecting outer support flange 171 moves along the fixed outer support flange 169, and the size of the predetermined processing gap (g1) is realized. Next, to perform the reverse movement to remove the wafer W from the chamber, the cantilever arm assembly 115 moves downward until the connecting outer support flange 171 disengages from the lower wall 185A of the C-shroud member 185. FIG. 1B shows how, in some embodiments, the cantilever arm assembly 115 in the system 100 of FIG. 1A is moved downward to enable the movement of the wafer W through the door 107. In various embodiments, the size of the processing gap (g1) during the plasma processing of the wafer W is controlled in the range up to about 10 centimeters, up to about 8 centimeters, or up to about 5 centimeters. Also, in FIG. 1B, the wafer W is shown in a position lifted by the lift pins 133. Note that FIG. 1A shows the system 100 in a closed configuration with the wafer W positioned on the ceramic layer 110 for plasma processing.

[0067] During plasma processing operations within the plasma processing system 100, one or more process gases are supplied to the plasma processing region 182 through the process gas supply system 191, the plenum region 188, and the through-port 197 within the inner upper electrode 187A. Also, RF signals are transmitted into the plasma processing region 182 by the first and second RF signal generators 147, 149, the impedance matching system 143, the RF signal supply rod 137, the RF signal supply shaft 141, the facility plate 111, the electrode 109, and also through the ceramic layer 110. The RF signals convert the process gas into plasma 180 within the plasma processing region 182. The ions and / or reactive components of the plasma interact with one or more materials on the wafer W to change the composition and / or shape of the specific materials present on the wafer W. The exhaust gas from the plasma processing region 182 is affected by the suction force applied to the exhaust port 105 as indicated by the arrow 195 and flows through the vent 186 within the C-shroud member 185 and the internal region 103 within the chamber 101 to the exhaust port 105.

[0068] In various embodiments, the electrode 109 can be configured to have different diameters. However, in some embodiments, the diameter of the electrode 109 is extended to increase the surface area of the electrode 109 on which the edge ring 167 is placed. In some embodiments, the conductive gel 226 is disposed between the bottom of the edge ring 167 and the top of the electrode 109 and / or between the bottom of the edge ring 167 and the top of the coupling ring 161. In these embodiments, the increased diameter of the electrode 109 results in an increased surface area of the conductive gel disposed between the edge ring 167 and the electrode 109.

[0069] Note that the combination of the outer connection support flange 171, the conductive strap 173, and the outer fixed support flange 169 is at electrically grounded reference potential, and together they form a ground return path for the RF signal transmitted from the electrode 109 through the ceramic layer 110 to the plasma processing region 182. The azimuthal uniformity of this ground return path around the outer periphery of the electrode 109 can affect the uniformity of the processing results on the wafer W. For example, in some embodiments, the uniformity of the etching rate across the entire wafer W can be affected by the azimuthal uniformity of the ground return path around the outer periphery of the electrode 109. Therefore, the number, configuration, and arrangement of the conductive straps 173 around the outer periphery of the electrode 109 can affect the uniformity of the processing results across the entire wafer W.

[0070] Referring again to FIG. 1A, a variable edge sheath (TES) system is implemented including a TES electrode 415 disposed (embedded) within the coupling ring 161. The TES system also includes a number of TES RF signal supply pins 413 physically and electrically connected to the TES electrode 415. Each of the TES RF signal supply pins 413 extends through a corresponding insulator feed-through member 421 configured to electrically isolate the TES RF signal supply pin 413 from the surrounding structures, such as the ceramic support 113 and the cantilever arm assembly 115 structures. In some embodiments, O-rings 417 and 419 are arranged so that the region inside the insulator feed-through member 421 is not exposed to any material / gas present within the plasma processing region 182. In some embodiments, the TES RF signal supply pins 413 are formed of, for example, copper, aluminum, anodized aluminum, and the like.

[0071] The TES RF signal supply pin 413 extends into the open area 118 inside the cantilever arm assembly 115, and each of the TES RF signal supply pins 413 is electrically connected to the TES RF signal supply conductor 409 via a corresponding TES RF signal filter 411. In some embodiments, three TES RF signal supply pins 413 are arranged to be physically and electrically connected to the TES electrode 415 at azimuthal positions that are substantially equidistant from the center line of the electrode 109. However, in other embodiments, there may be more than three TES RF signal supply pins 413 that are physically and electrically connected to the TES electrode 415. Also, in some embodiments, there may be one or two TES RF signal supply pins 413 that are physically and electrically connected to the TES electrode 415. Each of the TES RF signal supply pins 413 is electrically connected to a corresponding TES RF signal filter 411, and each of the TES RF signal filters 411 is electrically connected to the TES RF signal supply conductor 409. In some embodiments, each TES RF signal filter 411 is configured as an inductor. For example, in some embodiments, each TES RF signal filter 411 is configured as a coil-shaped conductor such as a metal coil wound around a dielectric core structure. In various embodiments, the metal coil can be formed of, for example, a solid copper rod, a copper tube, an aluminum rod, or an aluminum tube. Also, in some embodiments, each TES RF signal filter 411 can be configured as a combination of an inductive structure and a capacitive structure. From the perspective of improving the uniformity of the plasma treatment results across the entire wafer W, each of the TES RF signal filters 411 has a substantially identical configuration.

[0072] In some embodiments, the TES RF signal supply conductor 409 is formed in a ring (annular) structure so as to extend near the open region 118 inside the cantilever arm assembly 115, enabling a physical and electrical connection between the azimuthally distributed TES RF signal filter 411 and the TES RF signal supply conductor 409. In some embodiments, the TES RF signal supply conductor 409 is formed in a solid (non-tubular) structure. Alternatively, in some embodiments, the TES RF signal supply conductor 409 is formed in a tubular structure. In some embodiments, the TES RF signal supply conductor 409 is formed of, for example, copper, aluminum, anodized aluminum, or the like.

[0073] The TES RF signal supply wire 409 is electrically connected to the TES RF supply cable 407. Also, a capacitor 408 is connected between the TES RF signal supply wire 409 and the reference ground potential, and it is structured like, for example, the structure of the cantilever arm assembly 115. More specifically, the capacitor 408 has a first terminal that is electrically connected to both the TES RF supply cable 407 and the TES RF signal supply wire 409, and the capacitor 408 has a second terminal that is electrically connected to the reference ground potential. In some embodiments, the capacitor 408 is a variable capacitor. In some embodiments, the capacitor 408 is a fixed capacitor. In some embodiments, the capacitor 408 is set to have a capacitance in the range from about 10 picofarads to about 100 picofarads. The TES RF supply cable 407 is connected to the TES impedance matching system 401. The TES impedance matching system 401 is connected to the TES RF signal generator 403. The RF signal generated by the TES RF signal generator 403 is sent to the TES RF supply cable 407 via the TES impedance matching system 401, then to the TES RF signal supply wire 409, further to each TES RF signal supply pin 413 via the TES RF signal filter 411, and further to the TES electrode 415 within the coupling ring 161. In some embodiments, the TES RF signal generator 403 is configured to generate an RF signal within a frequency range from about 50 kilohertz to about 27 MHz and operate. In some embodiments, the TES RF signal generator 403 supplies RF power in the range from about 50 watts to about 10 kilowatts. The TES RF signal generator 403 is also connected to the control system 120 via one or more signal wires 405.

[0074] The TES impedance matching system 401 includes a configuration of inductors and capacitors sized and connected to enable impedance matching, whereby RF power can be transmitted from an RF signal generator 403 along a TES RF supply cable 407, a TES RF signal supply conductor 409, through a TES RF signal filter 411, each TES RF signal supply pin 413, to a TES electrode 415 within a coupling ring 161 and into a plasma processing region 182 above an edge ring 167. FIG. 3B shows an electrical schematic example of the TES impedance matching system 401 according to some embodiments. The TES impedance matching system 401 includes an input line 321 electrically connected to a TES RF signal generator 403. The TES input line 321 is electrically connected to an input terminal of a first inductor 322. The output terminal of the first inductor 322 is electrically connected to an internal node 328. A second inductor 324 has an input terminal electrically connected to the internal node 328. The output terminal of the second inductor 324 is electrically connected to a second internal node 329. A first capacitor 326 has an input terminal electrically connected to the second internal node 329. The output terminal of the first capacitor 326 is electrically connected to an input terminal of a third inductor 327. The output terminal of the third inductor 327 is electrically connected to the TES RF supply cable 407. Also, an input terminal of a second capacitor 323 is electrically connected to the first internal node 328. The output terminal of the second capacitor 323 is electrically connected to a reference ground potential. In some embodiments, the second capacitor 323 is a variable capacitor. Also, an input terminal of a third capacitor 325 is electrically connected to the second internal node 329. The output terminal of the third capacitor 325 is electrically connected to a reference ground potential. Note that the electrical configuration of the TES impedance matching system 401 as shown in FIG. 3B is shown by way of example. In other embodiments, the TES impedance matching system 401 may have a configuration of inductors and / or capacitors different from the example shown in FIG. 3B. The TES impedance matching system 401 is also connected to a control system 120 via one or more signal conductors 404.

[0075] By transmitting RF signals / power through the TES electrode 415 disposed (embedded) within the coupling ring 161, the TES system can control the characteristics of the plasma 180 near the periphery of the wafer W. For example, in some embodiments, the TES system operates to control the characteristics of the plasma 180 sheath near the edge ring 167, such as by controlling the shape of the plasma 180 sheath and / or its size (either an increase or decrease in sheath thickness). Also, in some embodiments, by controlling the shape of the plasma 180 sheath near the edge ring 167, it is possible to control various characteristics of the bulk plasma 180 on the wafer W. Further, in some embodiments, the TES system operates to control the density of the plasma 180 near the edge ring 167. For example, in some embodiments, the TES system operates to increase or decrease the density of the plasma 180 near the edge ring 167. Additionally, in some embodiments, the TES system operates to control the bias voltage present on the edge ring 167, thereby controlling or influencing the movement of ions and other charged components within the plasma 180 near the edge ring 167. For example, in some embodiments, the TES system operates to control the bias voltage present on the edge ring 167 to attract more ions from the plasma 180 towards the edge of the wafer W. Furthermore, in some embodiments, the TES system operates to control the bias voltage present on the edge ring 167 to repel ions from the plasma 180 away from the edge of the wafer W. Note that the TES system is operable to perform the various different functions as described above, either separately or in combination.

[0076] FIG. 9A shows an enlarged vertical cross-sectional view of the connection between the coupling ring 161 and the edge ring 167 according to some embodiments. In some embodiments, the coupling ring 161 is, for example, quartz, ceramic, alumina (Al 2 O 3) or is formed of a dielectric material such as a polymer.

[0077] On the bottom surface of the edge ring 167, there is a portion P1 for coupling with the upper surface of the coupling ring 161 through a layer of thermally conductive gel 903 to thermally sink the coupling ring 161 into the edge ring 167. Also, on the lower surface of the edge ring 167, there is another portion P2 coupled to the upper surface of the electrode 109 through a layer of thermally conductive gel 905. Examples of the thermally conductive gels 903, 905 include polyimide, polyketone, polyether ketone, polyether sulfone, polyethylene terephthalate, fluorinated ethylene propylene copolymer, cellulose, triacetate, silicone, etc. In some embodiments, the thermally conductive gels 903, 905 are formed as double-sided tapes. In some embodiments, the edge ring 167 has an inner diameter sized to be close to the outer diameter of the ceramic layer 110.

[0078] The edge ring 167 is fixed to the coupling ring 161 by a number of fasteners 901 distributed in the azimuthal direction around the inside of the edge ring 167. In some embodiments, screw holes for receiving each fastener 901 are formed in the edge ring 167. In some embodiments, threaded inserts for receiving each fastener 901 are disposed in the edge ring 167. For example, the threaded insert may be configured as a tubular sleeve having a threaded inner wall surface for receiving the screw of the fastener 901, and the tubular sleeve of the threaded insert has an outer wall surface (mechanically and / or chemically) fixed to a corresponding hole formed in the edge ring 167. Further, the coupling ring 161 is formed with a hole for inserting the fastener 901. In some embodiments, the fastener 901 is formed of a metal such as, for example, steel, aluminum, an alloy of steel, or an alloy of aluminum. Alternatively, in some embodiments, the fastener 901 is formed of plastic. In some embodiments, the hole formed in the coupling ring 161 in which the fastener 901 is disposed is formed to exactly correspond to the size of the fastener 901. In some embodiments, the hole formed in the edge ring 167 for receiving the fastener 901 is drilled to a depth such that when the fastener 901 is fully seated in the hole, a vertical space 907 (measured in the z direction) exists between the end of the fastener 901 and the portion above the edge ring 167. The vertical space 907 has a size such that arc discharge within the space 907 can be prevented. Also, in some embodiments, the head of the fastener 901 is dish-shaped within the coupling ring 161.

[0079] In various embodiments, the TES electrode 415 is formed of a conductive material such as, for example, platinum, steel, aluminum, or copper. During operation, capacitive coupling occurs between the TES electrode 415 and the edge ring 167, as a result of which the edge ring 167 is powered and affects the processing of the wafer W near the outer periphery of the wafer W.

[0080] In some embodiments, a number of hold-down rods 911 are used to fix the coupling ring 161 to the ceramic support 113. FIG. 9B shows an enlarged vertical cross-sectional view of a hold-down rod 911 connected to the coupling ring 161 according to some embodiments. The hold-down rod 911 extends through a hole formed in the ceramic support 113 and is fixed within a receptacle formed in the coupling ring 161. In some embodiments, the receptacle formed in the coupling ring 161 for the hold-down rod 911 has a threaded wall formed to engage a screw present at the end of the hold-down rod 911. In some embodiments, a threaded insert is disposed within the coupling ring 161 to receive the corresponding threaded end of the hold-down rod 911. The hold-down rod 911 is fixed to a hold-down control mechanism 913 disposed within a mounting structure 915 that is inside an open area 118 within the cantilever arm assembly 115. The mounting structure 915 is fixed to the cantilever arm assembly 115. In some embodiments, an O-ring 917 is disposed between the mounting structure 915 and the ceramic support 113 such that (and vice versa) the atmospheric environment within the open area 118 within the cantilever arm assembly 115 is kept separated from the plasma processing area 182.

[0081] In some embodiments, the hold-down control mechanism 913 is configured and operated to pull the coupling ring 161 downwardly toward the ceramic support 113 such that any seal (O-ring) disposed between the coupling ring 161 and the ceramic support and / or between the edge ring 167 and the coupling ring 161 is fully engaged. In some embodiments, the hold-down control mechanism 913 uses pneumatic pressure to pull the coupling ring 161 downwardly toward the ceramic support 113. In other embodiments, the hold-down control mechanism 913 uses a force generated and applied electromechanically to pull the coupling ring 161 downwardly toward the ceramic support 113. In some embodiments, the three hold-down rods 911 are connected to the coupling ring 161 at azimuthal positions that are substantially equally spaced around the perimeter within the coupling ring 161. However, in other embodiments, more than three hold-down rods 911 are connected to the coupling ring 161. Also, in various embodiments, the plurality of hold-down rods 911 connected to the coupling ring 161 are disposed at azimuthal positions that are substantially equally spaced or non-equally spaced around the perimeter within the coupling ring 161. In some embodiments, the hold-down rods 911 are formed of a non-conductive rigid material such as, for example, plastic.

[0082] FIG. 9C shows a top perspective view of a coupling ring 161 according to some embodiments. In the exemplary embodiment of FIG. 9C, three hold-down rods 911A, 911B, 911C are connected to the coupling ring 161 at positions L1, L2, L3, respectively. In some embodiments, positions L1, L2, and L3 are the vertices of an equilateral triangle coplanar with the bottom surface of the coupling ring 161. Also, the exemplary embodiment of FIG. 9C shows three TES RF signal supply pins 413A, 413B, 413C connected to the coupling ring 161 at positions L4, L5, L6, respectively. In some embodiments, positions L4, L5, and L6 are the vertices of an equilateral triangle coplanar with the bottom surface of the coupling ring 161. Also, the exemplary embodiment of FIG. 9C shows a temperature probe feed-through sleeve 919 connected to the bottom surface of the coupling ring 161. The temperature probe feed-through sleeve 919 extends through a hole formed in the ceramic support 113 and provides a channel into which a temperature probe is inserted to measure the temperature of the coupling ring 161 and / or the edge ring 167. The exemplary embodiment of FIG. 9C also shows a number of holes 921 formed through the coupling ring 161 for placing fasteners 901 to secure the coupling ring 161 to the edge ring 167.

[0083] FIG. 10A shows a bottom perspective view of a part of the TES system 1000 disposed inside the cantilever arm assembly 115 according to some embodiments. The TES RF supply cable 407 is electrically connected to the capacitor 408. Also, the TES RF supply cable 407 is electrically connected to the TES RF signal supply conductor 409 by the conductive strap 1001. The TES RF signal filter 411A has an input terminal electrically connected to the TES RF signal supply conductor 409. The TES RF signal filter 411A has an output terminal electrically connected to the TES RF signal supply pin 413A. Also, the TES RF signal filter 411B has an input terminal electrically connected to the TES RF signal supply conductor 409 by the conductive strap 1001. The TES RF signal filter 411B has an output terminal electrically connected to the TES RF signal supply pin 413B. The TES RF signal filter 411C has an input terminal electrically connected to the TES RF signal supply conductor 409. The TES RF signal filter 411C has an output terminal electrically connected to the TES RF signal supply pin 413C. Each of the TES RF signal supply pins 413A, 413B, 413C is electrically connected to the TES RF signal supply conductor 409 via the corresponding TES RF signal filter 411A, 411B, 411C. Thus, each of the TES RF signal supply pins 413A, 413B, 413C includes the corresponding TES RF signal filter 411A, 411B, 411C to block high-frequency RF signals, such as a 60 MHz signal, attempting to be coupled to the TES system 1000 via the TES RF signal supply pins 413A, 413B, 413C.

[0084] FIG. 10B shows a bottom perspective view of a TES system 1000 as shown in FIG. 10A, having TES RF signal filters 411A, 411B, 411C, each configured as a conductive coil, according to some embodiments. In some embodiments, a conductive coil configured substantially similarly is used for each of the TES RF signal filters 411A, 411B, and 411C. In some embodiments, each conductive coil forming the TES RF signal filters 411A, 411B, 411C has a substantially the same inductance value. In some embodiments, the inductance value of each conductive coil forming the TES RF signal filters 411A, 411B, 411C is in the range from about 1 microhenry to about 5 microhenries. Note that each of the TES RF signal supply pins 413A, 413B, 413C is directly electrically connected to a corresponding one of the TES RF signal filters 411A, 411B, 411C, respectively. In some embodiments, no other electrical components are connected between each of the TES RF signal supply pins 413A, 413B, 413C and the corresponding TES RF signal filters 411A, 411B, 411C, respectively. Also, note that each of the TES RF signal supply pins 413A, 413B, and 413C is not directly connected to either the TES RF supply cable 407 or the TES RF signal supply lead 409, and is electrically connected to the TES RF supply cable 407 and / or the TES RF signal supply lead 409 via the corresponding TES RF signal filters 411A, 411B, and 411C, respectively. In this way, high-frequency RF signals (e.g., a 60 MHz signal) reaching the TES RF signal supply pins 413A, 413B, and 413C from within the plasma processing region 182 are substantially blocked by the TES RF signal filters 411A, 411B, and 411C, respectively, thereby preventing these signals from reaching either the TES RF supply cable 407 or the TES RF signal supply lead 409.

[0085] FIG. 11 shows a bottom perspective view of an alternative TES system 1100 that uses a single TES RF signal filter 1108 for all of the TES RF signal supply pins 413A, 413B, and 413C, according to some embodiments. In the alternative TES system 1100, a TES RF supply cable 407 is electrically connected to a first terminal of a capacitor 408. Also, a first terminal of the single TES RF signal filter 1108 is electrically connected to the first terminal of the capacitor 408. Also, a second terminal of the capacitor 408 is electrically connected to a reference ground potential. A second terminal of the single TES RF signal filter 1108 is electrically connected to a TES spider structure 1102 at position 1110. The TES spider structure 1102 includes a ring portion 1102D and three legs 1102A, 1102B, and 1102C that extend from the ring portion 1102D to the positions of the TES RF signal supply pins 413A, 413B, and 413C, respectively. The three legs 1102A, 1102B, and 1102C of the TES spider structure 1102 are each electrically connected to a corresponding one of the TES RF signal supply pins 413A, 413B, and 413C, as shown at positions 1112A, 1112B, and 1112C. The TES spider structure 1102 is formed of a conductive material such as, for example, aluminum, stainless steel, an alloy of aluminum, an alloy of steel, or copper.

[0086] Unlike the TES system 1000 of FIGS. 1A, 1B, 3B, 9A, 9B, 9C, 10A, and 10B, in the alternative TES system 1100 of FIG. 11, the TES RF signal supply pins 413A, 413B, and 413C are not directly and exclusively electrically connected to the corresponding TES RF signal filters 411A, 411B, and 411C, but are electrically connected to the direct TES spider structure 1102. Thus, in the alternative TES system 1100 of FIG. 11, the high-frequency signals (e.g., 60 MHz signals) reaching the TES RF signal supply pins 413A, 413B, 413C from within the plasma processing region 182 can circulate within and around the TES spider structure 1102 without being blocked by a single TES RF signal filter 1108. However, the single TES RF signal filter 1108 is effective in preventing high-frequency signals from reaching the TES RF supply cable 407. In some embodiments, the high-frequency signals coupled to the TES RF signal supply pins 413A, 413B, and 413C and circulating within and around the TES spider structure 1102 may undesirably affect the azimuthal uniformity of the plasma processing results across the entire wafer W.

[0087] Compared to the TES system 1100 described with respect to FIG. 11, the TES system 1000 described with respect to FIGS. 1A, 1B, 3B, 9A, 9B, 9C, 10A, and 10B has better azimuthal uniformity of plasma processing results across the entire wafer W. As an example, FIG. 12A shows a wafer map of the plasma processing results across the entire wafer W obtained using the TES system 1100 of FIG. 11 according to some embodiments. The plasma processing results of FIG. 12A were obtained by performing a predetermined etching plasma process on a test wafer on which a blank oxide film was deposited throughout. The wafer map of FIG. 12A shows the thickness of the material (e.g., layer, film, etc.) removed from the wafer W after the predetermined etching plasma process on the test wafer was completed. The wafer map of FIG. 12A illustrates the uniformity characteristics of the processing results across the entire wafer W using a color scale or a gray scale.

[0088] Generally, a set of data measurement points z i exists at positions (x i , y i ) that traverse the region of the wafer W, and the region of the wafer W is defined by x 2 +y 2 <=R 2 , where R is the radius of the wafer W. Each data measurement point z i represents the corresponding portion of the entire region of the wafer W. In some embodiments, the coordinates (x i , y i ) of various points z i are selected such that each point z i represents a portion of substantially the same size across the entire region of the wafer W. However, the measured data values at various points z i can be weighted by the corresponding wafer W regions associated with the various points z i when calculating the wafer-level measurement criteria. The wafer-level uniformity criteria shown in FIG. 12A include the average value of the film thickness based on measurements taken at all points z i across the wafer W, the 3 standard deviation (3σ) value of the film thickness based on measurements taken at all points z i across the wafer W, and the calculated value of the variation range of the film thickness across the entire wafer W based on measurements taken at all points z i across the wafer W. The 3 standard deviation (3σ) value of the film thickness across the entire wafer W is sometimes referred to as the within-wafer non-uniformity (WIWNU) criteria.

[0089] As shown in FIG. 12A, significantly high non-uniformity in the plasma treatment results exists in the azimuthal region near where the TES RF signal supply pin 413 is connected to the TES electrode 415 within the coupling ring 161. FIG. 12A also shows that the non-uniformity of the plasma treatment results across the entire volume of the wafer W significantly correlates with the high non-uniformity of the plasma treatment results in the peripheral azimuthal region where the TES RF signal supply pin 413 is connected to the TES electrode 415 within the coupling ring 161. The significantly high non-uniformity of the plasma treatment results on the wafer W near where the TES RF signal supply pin 413 is connected to the TES electrode 415 within the coupling ring 161 is caused by the high-frequency RF signal (60 MHz) transmitted from the electrode 109 to the plasma treatment region 182 (from the first RF signal generator 147) through the coupling between the TES electrode 415 and the TES spider structure 1102. The single TES RF signal filter 1108 within the TES system 1100 cannot prevent the coupling of the high-frequency RF signal (60 MHz) to the TES spider structure 1102 within the TES system 1100.

[0090] In contrast to the TES system 1100, the TES system 1000 having separate TES RF signal filters 411A, 411B, 411C that are each directly and exclusively electrically connected to the respective TES RF signal supply pins 413A, 413B, 413C provides a high impedance at each TES RF signal supply pin and blocks the coupling of the significantly high-frequency RF signal used to generate the plasma 180 within the plasma treatment region 182 to the TES system 1000. The high-frequency RF signal used to generate the plasma 180 within the plasma treatment region 182 is a signal having one or more frequencies within the range from about 1 megahertz to about 100 megahertz, such as 60 megahertz, for example. Therefore, the high-frequency RF signal reaching the TES RF signal supply pins 413A, 413B, 413C cannot circulate within or around the TES RF signal supply conductors 409 within the TES system 1000.

[0091] FIG. 12B shows a wafer map of plasma processing results across the entire wafer W obtained using the TES system 1000 of FIGS. 1A, 1B, 3B, 9A, 9B, 9C, 10A, and 10B, according to some embodiments. The plasma processing results of FIG. 12B were obtained by performing a predetermined etching plasma process on a test wafer having a blank oxide film deposited thereon in its entirety (the same as was done to obtain the results of FIG. 12A) using the TES system 1100. Thus, the plasma processing results of FIG. 12B are directly comparable to the plasma processing results of FIG. 12A, i.e., the TES apparatus 1000 and the TES apparatus 1100 can be directly compared. As shown in FIG. 12B, by having separate TES RF signal filters 411A, 411B, 411C that are directly and exclusively electrically connected to each of the TES RF signal supply pins 413A, 413B, 413C, there is no prominent azimuthal non-uniformity in the plasma processing results in the vicinity of the positions where the TES RF signal supply pins 413A, 413B, 413C are electrically and physically connected to the TES electrode 415 within the coupling ring 161.

[0092] As a further comparison, FIG. 12C shows a wafer map of plasma processing results across an entire wafer W obtained with TES RF signal supply pins 413A, 413B, and 413C disconnected from their respective TES RF signal filters 411A, 411B, and 411C, according to some embodiments. The plasma processing results of FIG. 12C were obtained by performing a predetermined etching plasma process on a test wafer having a blank oxide film deposited thereon over its entire surface (the same as was done to obtain the results of FIGS. 12A and 12B). Thus, FIG. 12C essentially represents the plasma processing results across the entire wafer W performed without connecting either the TES system 1000 or the TES system 1100. A comparison of the results shown in FIG. 12C with those shown in FIGS. 12A and 12B shows that the uniformity of the plasma processing results across the entire wafer W obtained using the TES system 1000 with the separate TES RF signal filters 411A, 411B, and 411C each exclusively and directly connected to the TES RF signal supply pins 413A, 413B, and 413C is equivalent to the case where the TES system 1000 is not connected. Thus, it can be seen that by connecting the separate TES RF signal filters 411A, 411B, and 411C directly and exclusively to the TES RF signal supply pins 413A, 413B, and 413C, respectively, the coupling of high-frequency RF signals from the plasma 180 to the TES system 1000 can be effectively blocked.

[0093] FIG. 13A shows a perspective view of an edge ring 167 according to some embodiments. The edge ring 167 has a top surface 167A and a bottom surface 167B. As described with respect to FIG. 9A, a plurality of holes 167C are formed through the bottom surface 167B to receive the fasteners 901. Note that the plurality of holes 167C do not reach the top surface 167A of the edge ring 167. In the example of FIG. 13A, three holes 167C are shown, but in other embodiments, the number of holes 167C for receiving the fasteners 901 may be more than three, such as 6 or 9 for example. In some embodiments, the edge ring 167 is a consumable component, and thus, within the plasma processing system 100, when a certain number of plasma processing operations are performed, the material of the edge ring 167 can be lost due to plasma-induced corrosion and effectively consumed. Therefore, the edge ring 167 is a replaceable component within the plasma processing system 100.

[0094] FIG. 13B shows a top view of an edge ring 167 according to some embodiments. The edge ring 167 has an inner diameter ID1 and an outer diameter OD1. The inner diameter ID1 corresponds to the diameter of the inner peripheral portion of the edge ring 167, and the outer diameter OD1 is the diameter of the outer peripheral portion of the edge ring 167. In various embodiments, the size of the inner diameter ID1 is determined by the diameter of the ceramic layer 110 such that the inner peripheral portion of the edge ring 167 is close to the outer peripheral portion of the ceramic layer 110.

[0095] FIG. 13C shows a vertical cross-sectional view of an edge ring 167 shown as a view taken along the (cutting line) A-A of FIG. 13B according to some embodiments. The edge ring 167 has an inner surface 167D present at the inner peripheral portion of the edge ring 167. The edge ring 167 also has an outer surface 167E present at the outer peripheral portion of the edge ring 167. In some embodiments, when the edge ring 167 is disposed within the plasma processing system 100, each of the top surface 167A and the bottom surface 167B of the edge ring 167 has a horizontal orientation (an orientation substantially parallel to the x-y plane), and the inner surface 167D and the outer surface 167E each have a vertical orientation (an orientation substantially parallel to the z direction). Additionally, the edge ring 167 has an annular shape, which may also be referred to as a ring shape or a dish shape, for example.

[0096] The edge ring 228 has a step portion 1622, and the step portion 1622 has an inclined inner surface 1606 and a horizontally oriented inner surface 1608. The inclined inner surface 1606 has an angle A2 with respect to the vertically oriented inner surface 167D. The inclined inner surface 1608 is continuous with the top surface 167A. In some embodiments, the edge between the inclined inner surface 1606 and the top surface 167A is formed to have a radius R3. The horizontally oriented inner surface 1608 is continuous with the inclined inner surface 1606. In some embodiments, the edge between the horizontally oriented inner surface 1608 and the inclined inner surface 1606 is formed to have a radius R4. The edge between the horizontally oriented inner surface 1608 and the inclined inner surface 1606 is arranged according to an intermediate diameter (MD) that is concentric with the inner diameter ID1 and the outer diameter OD1. The inner surface 167D is continuous with the horizontally oriented inner surface 1608. In some embodiments, the edge between the inner surface 167D and the horizontally oriented inner surface 1608 is formed to have a radius R5.

[0097] The inner surface 167D is continuous with the inclined inner surface 1618. In some embodiments, the edge between the inner surface 167D and the inclined inner surface 1618 is formed to have a radius R6. The inclined inner surface 1618 is continuous with the bottom surface 167B. In some embodiments, the edge between the inclined inner surface 1618 and the bottom surface 167B is formed to have a radius R7. In some embodiments, the radius R7 has a value approximately twice that of the radius R6.

[0098] The outer surface 167E is continuous with the bottom surface 167B. In some embodiments, the edge between the outer surface 167E and the bottom surface 167B is formed to have a radius R2. The outer surface 167E is continuous with the top surface 167A. In some embodiments, the edge between the outer surface 167E and the top surface 167A is formed to have a radius R1. The curvature of the edge ring 167 by the radius R1 reduces the probability of RF power arcing between the edge ring 167 and the cover ring 165.

[0099] FIG. 14 shows an exemplary schematic diagram of the control system 120 of FIG. 1A according to some embodiments. In some embodiments, the control system 120 is configured as a process controller for controlling a semiconductor manufacturing process executed in the plasma processing system 100. In various embodiments, the control system 120 includes a processor 1401, a storage hardware unit (HU) 1403 (e.g., memory), an input HU 1405, an output HU 1407, an input / output (I / O) interface 1409, an I / O interface 1411, a network interface controller (NIC) 1413, and a data communication bus 1415. The processor 1401, the storage HU 1403, the input HU 1405, the output HU 1407, the I / O interface 1409, the I / O interface 1411, and the NIC 1413 communicate data with each other via the data communication bus 1415. The input HU 1405 is configured to receive data communication from a number of external devices. Examples of the input HU 1405 include a data acquisition system, a data acquisition card, etc. The output HU 1407 is configured to transmit data to a number of external devices. An example of the output HU 1407 includes a device controller. Examples of the NIC 1413 include a network interface card, a network adapter, etc. Each of the I / O interfaces 1409 and 1411 is defined to provide compatibility between different hardware units coupled to the I / O interface. For example, the I / O interface 1409 may be defined to convert a signal received from the input HU 1405 into a format, amplitude, and / or speed compatible with the data communication bus 1415. Also, the I / O interface 1407 may be defined to convert a signal received from the data communication bus 1415 into a format, amplitude, and / or speed compatible with the output HU 1407.Although various operations are described herein as being performed by the processor 1401 of the control system 120, in some embodiments, various operations may be performed by multiple processors of the control system 120 and / or by multiple processors of multiple computing systems that communicate with the control system 120 via data communication.

[0100] In some embodiments, control system 120 is used to control devices within various wafer manufacturing systems based in part on sensed values. For example, control system 120 can control one or more of valve 1417, filter heater 1419, wafer support structure heater 1421, pump 1423, and other devices 1425 based on sensed values and other control parameters. Valve 1417 can include valves related to the control of back gas supply system 129, process gas supply system 191, and temperature control fluid circulation system 125. Control system 120 receives sensed values from, for example, pressure gauge 1427, flow meter 1429, temperature sensor 1431, and / or other sensors 1433 such as voltage sensors, current sensors, etc. Control system 120 can also be used to control process conditions within plasma processing system 100 while a plasma processing operation is being performed on wafer W. For example, control system 120 can control the type and amount of process gas supplied from process gas supply system 191 to plasma processing region 182. Also, control system 120 can control the operation of first RF signal generator 147, second RF signal generator 149, impedance matching system 143, TES RF signal generator 403, and TES impedance matching system 401. Also, control system 120 can control the operation of DC power supply 117 for clamp electrode 112. Control system 120 can also control the operation of lift device 133 for lift pin 132 and the operation of door 107. Control system 120 also controls the operation of back gas supply system 129 and temperature control fluid circulation system 125. Control system 120 also controls the vertical movement of cantilever arm assembly 115. Control system 120 also controls the operation of throttle member 196 and the pump that controls suction at exhaust port 105. Also, control system 120 controls the operation of hold down control mechanism 913 of hold down rod 911 of TES system 1000. Also, control system 120 receives input from temperature probes of TES system 1000. Note that control system 120 is equipped to be able to control any function within plasma processing system 100 programmatically and / or manually.

[0101] In some embodiments, the control system 120 is configured to execute a computer program including a set of instructions for controlling process timing, process gas delivery system temperature, pressure differential, valve position, process gas mixing, process gas flow rate, backside cooling gas flow rate, chamber pressure, chamber temperature, wafer support structure temperature (wafer temperature), RF power level, RF frequency, RF pulse, settings of the impedance matching system 143, position of the cantilever arm assembly, bias power, and other parameters of a particular process. In some embodiments, other computer programs stored in a memory device associated with the control system 120 may be used. In some embodiments, there is a user interface associated with the control system 120. Examples of the user interface include a display 1435 (e.g., a display screen and / or a graphical software display of the device, and / or process conditions), and user input devices 1437 such as a pointing device, a keyboard, a touch screen, a microphone, etc.

[0102] The software that instructs the operation of the control system 120 can be designed or configured in many different ways. A computer program that instructs the operation of the control system 120 to execute various wafer manufacturing processes in a process sequence can be written in any conventional computer-readable programming language, such as assembly language, C, C++, Pascal, Fortran, etc. The compiled object code or script is executed by the processor 1401 to perform the tasks identified within the program. The control system 120 can be programmed to control various process control parameters related to process conditions, such as filter pressure difference, process gas composition and flow rate, backside cooling gas composition and flow rate, temperature, pressure, plasma conditions such as RF power level and RF frequency, bias voltage, cooling gas / fluid pressure, chamber wall temperature, etc. Examples of sensors that can be monitored during the wafer manufacturing process include, but are not limited to, a mass flow control module, a pressure sensor such as the pressure gauge 1427, and a temperature sensor 1431. Appropriate feedback and control algorithms, programmed appropriately, can be used with the data from these sensors to control / regulate one or more process control parameters to maintain the desired process conditions.

[0103] In some implementations, control system 120 is part of a broader manufacturing control system. Such a manufacturing control system may include semiconductor processing equipment that includes processing tools for wafer processing, chambers, and / or platforms, and / or specific processing components such as wafer pedestals, gas flow systems, etc. These manufacturing control systems may be integrated with electronics for controlling their operation before, during, and after wafer processing. Control system 120 can control various components or sub-parts of the manufacturing control system. Control system 120 may be programmed to control any of the processes disclosed herein, including delivery of process gas, delivery of backside cooling gas, temperature setting (e.g., heating and / or cooling), pressure setting, vacuum setting, power setting, radio frequency (RF) generator setting, RF matching circuit setting, frequency setting, flow rate setting, fluid delivery setting, position and motion setting, tools connected or interfaced to a particular system and other transfer tools, and / or wafer transfer into and out of load locks, according to wafer processing requirements.

[0104] Generally, control system 120 can be defined as electronics having various integrated circuits, logic, memory, and / or software, which receive and issue commands, control operations, enable wafer processing operations, enable endpoint measurements, etc. The integrated circuits can include chips in the form of firmware that stores program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions may be instructions transmitted to control system 120 in the form of various individual settings (or program files) that define operating parameters for performing a particular process on wafer W within system 100. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer to achieve one or more processing steps during the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0105] In some implementations, the control system 120 may be integrated or coupled with the plasma processing system 100, be part of a computer network-connected to the system 100, or be combined, and may be in a combined form. For example, the control system 120 may be within all or part of a "cloud" of a fab host computer system that enables remote access to wafer processing. The computer may enable remote access to the system 100, monitor the current progress of manufacturing operations, investigate the history of past manufacturing operations, investigate trends or performance metrics from multiple manufacturing operations, change the parameters of the current process, set process steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) can provide a process recipe to the system 100 over a network, which may include a local network or the Internet.

[0106] The remote computer may include a user interface that enables the input or programming of parameters and / or settings, and these parameters and / or settings are then transmitted from the remote computer to the system 100. In some examples, the control system 120 receives instructions in the form of data, and the instructions specify the parameters for each of the process steps to be performed during one or more operations. Note that the parameters may be specific to the type of process performed within the plasma processing system 100. Thus, as described above, the control system 120 may be distributed using, for example, one or more discrete controllers, and the one or more discrete controllers are collectively network-connected and operate with a common purpose, such as the processes and controls described herein. An example of a distributed controller for such a purpose is one or more integrated circuits of the plasma processing system 100 that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) and are combined to control the processes executed on the plasma processing system 100.

[0107] Although not limited, examples of systems with which the control system 120 may interface include plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, clean chambers or modules, bevel edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing systems that may be associated with or used in the fabrication and / or manufacture of semiconductor wafers. As noted above, depending on one or more process steps performed by the tool, the control system 120 may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, proximate tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used in material transport that carry wafer containers to or from tool positions and / or load ports in a semiconductor manufacturing facility.

[0108] The embodiments described herein can be implemented with various computer system configurations including a handheld hardware unit, a microprocessor system, a microprocessor-based or program-controlled household appliance, a minicomputer, a mainframe computer, and the like. Also, the embodiments described herein can be implemented with a distributed computing environment in which tasks are performed by a remote processing hardware unit connected via a network. Note that the embodiments described herein, particularly the embodiments related to the control system 120, can use operations performed by various computers based on data stored in the computer system. These operations require physical manipulation of physical quantities. Any operation described herein that forms part of an embodiment is a useful mechanical operation. Further, the embodiments relate to a hardware unit or device for performing these operations. The device can be specially configured for a special-purpose computer. When defined as a special-purpose computer, it can perform other processes, program executions, or routines that are not part of the special purpose while enabling the operations for that special purpose. In some embodiments, the operations can be processed by a general-purpose computer selectively activated or configured by one or more computer programs stored in a computer memory, cache, or obtained from a network. When data is obtained from a network, the data can be processed by other computers on the network, such as a cloud of computing resources.

[0109] The various embodiments described herein can be implemented via process control instructions instantiated as computer-readable code on a non-transitory computer-readable medium. A non-transitory computer-readable medium is any data storage hardware unit that stores data and is thereafter readable by a computer system. Examples of non-transitory computer-readable media include hard disks, network attached storage (NAS), ROM, RAM, compact disc ROM (CD-ROM), recordable CD (CD-R), rewritable CD (CD-RW), magnetic tape, and other optical and non-optical data storage hardware units. The non-transitory computer-readable media can include computer-readable tangible media distributed over a network-coupled computer system and perform the storage and execution of the computer-readable code in a distributed fashion.

[0110] The foregoing disclosure, for the sake of a clearer understanding, includes detailed descriptions, but it is clear that within the scope of the appended claims, certain changes and modifications are allowed. For example, one or more features from any of the embodiments disclosed herein can be combined with one or more features from any of the other embodiments disclosed herein. Therefore, it should be recognized that this embodiment is merely illustrative and not restrictive, and also that the claims are not limited to the details described herein and can be modified within the scope of the described embodiments and equivalent aspects.

Claims

1. 1. A variable edge sheath system, comprising: a coupling ring configured to couple to a bottom surface of an edge ring surrounding a wafer support region within the plasma processing chamber; an electrode having an annular shape embedded within the coupling ring; a plurality of RF signal supply pins coupled to the electrodes embedded within the coupling ring, each of the RF signal supply pins extending through a corresponding hole formed through a bottom surface of the coupling ring; a plurality of RF signal filters, each connected to the plurality of RF supply pins and configured to present a high impedance to a corresponding RF signal used to generate a plasma within the plasma processing chamber; Variable edge sheath system including.

2. 2. The variable edge sheath system of claim 1, wherein the corresponding RF signal used to generate the plasma in the plasma processing chamber has one or more frequencies within a range of about 1 megahertz to about 100 megahertz.

3. 2. The variable edge sheath system of claim 1, wherein each of the plurality of RF feed pins is exclusively connected to a corresponding one of the plurality of RF signal filters.

4. 2. The variable edge sheath system of claim 1, a variable edge sheath system further comprising an RF signal generator electrically connected via an impedance matching system to supply an RF signal to the electrode embedded within the coupling ring via the plurality of RF signal filters and the plurality of RF supply pins.

5. 2. The variable edge sheath system of claim 1, The variable edge sheath system further comprising an RF signal feed conductor to which each of the plurality of RF signal filters is electrically connected.

6. 6. The variable edge sheath system of claim 5, A variable edge sheath system, wherein the connection locations of the plurality of RF signal filters to the RF signal feed conductor are substantially equally spaced circumferentially within the RF signal feed conductor.

7. 6. The variable edge sheath system of claim 5, wherein the plurality of RF signal filters and the RF signal feed conductor are disposed in an atmospheric environment isolated from the plasma in the plasma processing chamber.

8. 6. The variable edge sheath system of claim 5, The variable edge sheath system further includes an RF signal feed line electrically connected between an RF signal output of the impedance matching system and the RF signal feed conductor.

9. 9. The variable edge sheath system of claim 8, The variable edge sheath system further includes a capacitor having a first terminal electrically connected to both the RF signal feed conductor and the RF signal feed line, and a second terminal electrically connected to a reference ground potential.

10. 10. The variable edge sheath system of claim 1, wherein each of the plurality of RF signal filters is formed as a conductive coil.

11. 11. The variable edge sheath system of claim 10, wherein the conductive coil is formed from aluminum or copper.

12. 10. The variable edge sheath system of claim 1, wherein each of the plurality of RF signal filters has substantially the same configuration.

13. 2. The variable edge sheath system of claim 1, wherein the connection locations of the plurality of RF signal supply pins to the electrodes in the coupling ring are substantially equally spaced around the circumference of the electrodes in the coupling ring.

14. 2. The variable edge sheath system of claim 1, wherein the number of said plurality of RF signal supply pins is three, and the number of said plurality of RF signal filters is three.

15. 1. A plasma processing system comprising: a primary electrode having a substantially cylindrical shape defined by a top surface, a bottom surface and an exterior surface; a ceramic layer disposed on the top surface of the primary electrode, the ceramic layer being configured to receive and support a semiconductor wafer; an RF signal generator electrically connected to the primary electrode through an impedance matching system and configured to generate and provide an RF signal to the primary electrode; an edge ring formed of a conductive material and configured to surround the ceramic layer and disposed radially adjacent the ceramic layer; a coupling ring coupled to a bottom surface of the edge ring, the coupling ring being formed of an electrically insulating material and including a recessed electrode; a plurality of RF signal supply pins electrically and physically connected to the recessed electrodes, each extending through a corresponding hole formed through a bottom surface of the coupling ring; a plurality of RF signal filters, each connected to the plurality of RF supply pins and configured to present a high impedance to the RF signal provided by the RF signal generator to the primary electrode; 1. A plasma processing system comprising:

16. 16. The plasma processing system of claim 15, wherein each of the plurality of RF supply pins is exclusively connected to a corresponding one of the plurality of RF signal filters.

17. 16. The plasma processing system of claim 15, wherein the RF signal generator is a first RF signal generator, the impedance matching system is a first impedance matching system, and the plasma processing system includes a second RF signal generator electrically connected through a second impedance matching system and supplying an RF signal to the recessed electrode through the plurality of RF signal filters and the plurality of RF supply pins.

18. 20. The plasma processing system of claim 17, further comprising: The plasma processing system further includes an RF signal supply conductor to which each of the plurality of RF signal filters is electrically connected.

19. 20. The plasma processing system of claim 18, wherein connection locations of the plurality of RF signal filters to the RF signal supply conductor are substantially equally spaced circumferentially within the RF signal supply conductor.

20. 20. The plasma processing system of claim 18, wherein the plurality of RF signal filters and the RF signal feed conductors are disposed in an atmospheric environment isolated from a plasma processing region overlying the ceramic layer.

21. 20. The plasma processing system of claim 18, further comprising: The plasma processing system further includes an RF signal supply line electrically connected between an RF signal output of the second impedance match system and the RF signal supply conductor.

22. 22. The plasma processing system of claim 21, further comprising: The plasma processing system further includes a capacitor having a first terminal electrically connected to both the RF signal supply conductor and the RF signal supply line, and a second terminal electrically connected to a reference ground potential.

23. 16. The plasma processing system of claim 15, wherein each of the plurality of RF signal filters is formed as a conductive coil.

24. 24. The plasma processing system of claim 23, wherein the conductive coil is formed from aluminum or copper.

25. 16. The plasma processing system of claim 15, wherein each of the plurality of RF signal filters has substantially the same configuration.

26. 16. The plasma processing system of claim 15, wherein the recessed electrode has a substantially annular shape, and the connection locations of the plurality of RF signal supply pins to the recessed electrode are substantially equally spaced around a circumference within the recessed electrode.

27. 16. The plasma processing system of claim 15, wherein a number of the plurality of RF signal supply pins is three, and a number of the plurality of RF signal filters is three.

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