Mounting device

Abstract

To provide a technique for positioning a semiconductor substrate at a correct position relative to an edge ring.SOLUTION: The present disclosure provides a tray on which a semiconductor substrate is mounted, the tray including a substrate mounting portion on which the semiconductor substrate is mounted, and an edge ring mounting portion provided around the substrate mounting portion and on which an edge ring is mounted. The substrate mounting portion and the edge ring mounting portion each have a conductive tray body and a dielectric film formed on at least an upper surface of the tray body.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a tray.

Background Art

[0002] In plasma processing of a semiconductor substrate, an edge ring (also called a focus ring) may be disposed along the outer periphery of the semiconductor substrate disposed in a chamber (processing vessel) maintained at a predetermined degree of vacuum. By disposing the edge ring, the plasma in the outer peripheral portion of the semiconductor substrate is controlled, so that the outer peripheral portion and the central portion of the semiconductor substrate can be processed uniformly. At this time, the positional relationship between the semiconductor substrate and the edge ring becomes important. Therefore, it is required to accurately transfer the semiconductor substrate with respect to the edge ring.

[0003] In addition, since the edge ring is consumed by plasma processing, it is necessary to replace it periodically. The replacement of the edge ring is usually performed by opening the chamber in which the edge ring is disposed to the atmosphere. As a method of replacing the edge ring without opening the chamber to the atmosphere, it has been proposed to provide an edge ring accommodation chamber connected to a vacuum transfer chamber and transfer the edge ring to the chamber using the transfer mechanism of the vacuum transfer chamber.

[0004] It is also known to place a semiconductor substrate on a tray and transfer the entire tray into the chamber.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] Generally, the semiconductor substrate is transported into the chamber via an atmospheric transport chamber, a load lock chamber, and a vacuum transport chamber. Therefore, even if the transport mechanism is controlled to accurately transport the semiconductor substrate with respect to the edge ring disposed in the chamber, the semiconductor substrate may deviate from the transport mechanism before being transported into the chamber, and there is a risk that it cannot be accurately transported. Further, when the edge ring is transported into the chamber using the transport mechanism of the vacuum transport chamber, it is necessary to accurately transport and place the edge ring with respect to the placement table on which the edge ring is placed.

[0007] The present disclosure provides a technique capable of disposing a semiconductor substrate at a correct position with respect to an edge ring.

Means for Solving the Problems

[0008] One aspect of the present disclosure is a tray on which a semiconductor substrate is placed, having a substrate placement portion on which the semiconductor substrate is placed, and an edge ring placement portion provided around the substrate placement portion and on which the edge ring is placed. The substrate placement portion and the edge ring placement portion include a conductive tray body and a dielectric film formed on at least the upper surface of the tray body.

Effects of the Invention

[0009] According to the technique of the present disclosure, a semiconductor substrate can be disposed at a correct position with respect to an edge ring.

Brief Description of the Drawings

[0010]

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Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the technology of the present disclosure will be described with reference to the drawings. In the following embodiments, the same components are denoted by the same reference numerals, and redundant descriptions are omitted.

[0012] <Configuration of the Substrate Processing System> FIG. 1 is a diagram showing a configuration example of a substrate processing system.

[0013] In FIG. 1, the substrate processing system 100 includes a FOUP 14, an atmospheric transfer chamber 11, an edge ring stocker 2, a tray stocker 5, an aligner 3, a load lock chamber 12, a vacuum transfer chamber 13, a process module 4, a first transfer mechanism 15, and a second transfer mechanism 16.

[0014] The FOUP14 is a container capable of accommodating a semiconductor substrate (hereinafter sometimes referred to as a "wafer") and has an openable and closable lid. When the FOUP14 containing the wafer is attached to the atmospheric transfer chamber 11, the lid of the FOUP14 and the gate door GT of the atmospheric transfer chamber 11 engage with each other, the latch of the lid of the FOUP14 is disengaged, and the lid of the FOUP14 can be opened. By opening the gate door GT in that state, the lid of the FOUP14 moves together with the gate door GT, the lid of the FOUP14 opens, and the inside of the FOUP14 and the inside of the atmospheric transfer chamber 11 communicate with each other.

[0015] The inside of the atmospheric transfer chamber 11 is maintained in an atmospheric atmosphere, and an edge ring stocker 2 and a tray stocker 5 are connected to the atmospheric transfer chamber 11 via an openable and closable shutter 23. A plurality of edge rings are accommodated in the edge ring stocker 2. A plurality of trays are accommodated in the tray stocker 5. Further, an aligner 3 is connected to the atmospheric transfer chamber 11 via an opening 22. Also, a first transfer mechanism 15 is provided inside the atmospheric transfer chamber 11, and the first transfer mechanism 15 transfers wafers, edge rings, and trays between the FOUP14, the edge ring stocker 2, the tray stocker 5, the aligner 3, and the load lock chamber 12. The first transfer mechanism 15 has a base 15a, an articulated arm 15b, and a pick 15c. The proximal end side of the arm 15b is connected to the base 15a, and the distal end side of the arm 15b is connected to the pick 15c. The base 15a is movable in the arrow direction (the longitudinal direction of the atmospheric transfer chamber 11) inside the atmospheric transfer chamber 11. The pick 15c is formed in a U shape and supports wafers, edge rings, and trays. When an edge ring is taken out from the edge ring stocker 2 by the pick 15c, the shutter 23 between the edge ring stocker 2 and the atmospheric transfer chamber 11 is opened, and when a tray is taken out from the tray stocker 5 by the pick 15c, the shutter 23 between the tray stocker 5 and the atmospheric transfer chamber 11 is opened.

[0016] The atmospheric transfer chamber 11 and the vacuum transfer chamber 13 are connected via the load lock chamber 12. The inside of the vacuum transfer chamber 13 is maintained in a vacuum atmosphere. Between the atmospheric transfer chamber 11 and the load lock chamber 12, and between the vacuum transfer chamber 13 and the load lock chamber 12, they are partitioned by gate valves G. Normally, the gate valves G are closed. When a wafer, an edge ring, or a tray is transferred from inside the atmospheric transfer chamber 11 into the load lock chamber 12 by the first transfer mechanism 15, the gate valve G provided between the atmospheric transfer chamber 11 and the load lock chamber 12 is opened. Also, when the tray on which the edge ring and the wafer are placed is taken out from the load lock chamber 12 and transferred into the vacuum transfer chamber 13 by the second transfer mechanism 16, the gate valve G provided between the load lock chamber 12 and the vacuum transfer chamber 13 is opened.

[0017] The load lock chamber 12 is provided with a vacuum pump (not shown) as an exhaust mechanism and a leak valve (not shown) for returning the pressure to atmospheric pressure. The inside of the load lock chamber 12 can be switched between an atmospheric atmosphere and a vacuum atmosphere. When a wafer, an edge ring, or a tray is transferred from inside the atmospheric transfer chamber 11 into the load lock chamber 12 by the first transfer mechanism 15, the inside of the load lock chamber 12 is switched to an atmospheric atmosphere. When the tray on which the wafer and the edge ring are placed is taken out from the load lock chamber 12 and transferred into the vacuum transfer chamber 13 by the second transfer mechanism 16, the inside of the load lock chamber 12 is switched to a vacuum atmosphere.

[0018] Inside the vacuum transfer chamber 13, a second transfer mechanism 16 is provided. The second transfer mechanism 16 transfers the tray on which the wafer and the edge ring are placed between the load lock chamber 12 and the process module 4. The second transfer mechanism 16 has a base 16a, an articulated arm 16b, and a pick 16c. The proximal end side of the arm 16b is connected to the base 16a, and the distal end side of the arm 16b is connected to the pick 16c. The base 16a is movable in the arrow direction (the longitudinal direction of the vacuum transfer chamber 13) inside the vacuum transfer chamber 13. The pick 16c is formed in a U shape and supports the tray on which the wafer and the edge ring are placed.

[0019] Between the vacuum transfer chamber 13 and the process module 4 is partitioned by a gate valve G. Normally, the gate valve G is closed, and when the tray on which the wafer and the edge ring are placed is transferred from inside the vacuum transfer chamber 13 into the process module 4 by the second transfer mechanism 16, the gate valve G provided between the vacuum transfer chamber 13 and the process module 4 is opened.

[0020] The process module 4 performs processing on a wafer to be processed in a vacuum atmosphere. The process module 4 performs processing such as etching and film formation on the wafer placed on the tray.

[0021] <Configuration of Process Module> FIG. 2 is a diagram showing a configuration example of the process module. The process module 4 shown in FIG. 2 is configured as a capacitively coupled parallel plate substrate processing apparatus.

[0022] In FIG. 2, the process module 4 has a chamber 10 which is a metal processing container made of, for example, aluminum or stainless steel. The chamber 10 is grounded for safety.

[0023] Inside the chamber 10, a disk-shaped susceptor 12 is horizontally arranged. On the susceptor 12, a tray TR1 on which the wafer W and the edge ring ER are placed is placed. The susceptor 12 also functions as a lower electrode. A gate valve G for opening and closing the carry-in and carry-out port of the wafer W is attached to the side wall of the chamber 10. The susceptor 12 is made of a metal such as aluminum, and is supported by an insulating cylindrical support portion 14 extending vertically upward from the bottom of the chamber 10.

[0024] An annular exhaust passage 18 is formed between a conductive cylindrical support portion (inner wall portion) 16 extending vertically upward from the bottom of the chamber 10 along the outer periphery of the cylindrical support portion 14 and the side wall of the chamber 10. An exhaust port 22 is provided at the bottom of the exhaust passage 18.

[0025] An exhaust device 26 is connected to the exhaust port 22 via an exhaust pipe 24. The exhaust device 26 has a vacuum pump such as a turbo molecular pump, for example, and reduces the pressure in the processing space PS in the chamber 10 to a desired degree of vacuum. The inside of the chamber 10 is preferably maintained at a constant pressure in the range of, for example, 10 mTorr to 3500 mTorr.

[0026] A wafer W to be processed is placed on the susceptor 12 via a tray TR1, and an edge ring ER is disposed so as to surround the wafer W. The edge ring ER is made of a conductive material such as Si or SiC, or an insulating material such as SiO 2 and is placed on the upper surface of the tray TR1.

[0027] Also, an electrostatic chuck 40 for wafer adsorption is provided on the upper surface of the susceptor 12. The electrostatic chuck 40 is formed by sandwiching a sheet-like or mesh-like conductor between film-like or plate-like dielectrics. A DC power supply 42 disposed outside the chamber 10 is electrically connected to the conductor in the electrostatic chuck 40 via a switch 44 and a power supply line 46. The wafer W is electrostatically adsorbed to the electrostatic chuck 40 via the tray TR1 by the Coulomb force generated in the electrostatic chuck 40 by the DC voltage applied from the DC power supply 42 with the switch 44 turned on.

[0028] An annular refrigerant chamber 48 extending in the circumferential direction is provided inside the susceptor 12. A refrigerant (for example, cooling water) at a predetermined temperature is circulated and supplied to the refrigerant chamber 48 via pipes 50 and 52 from a chiller unit (not shown). The temperature of the wafer W is controlled by controlling the temperature of the refrigerant. Further, in order to improve the accuracy of the temperature of the wafer W, a heat transfer gas (for example, He gas) from a heat transfer gas supply unit (not shown) is supplied between the tray TR1 and the wafer W via a gas supply pipe 51 and a gas passage 56 in the susceptor 12.

[0029] On the ceiling of the chamber 10, a disk-shaped upper electrode 60 is provided facing the susceptor 12 in parallel (i.e., facing each other). The upper electrode 60 is attached to the ceiling of the chamber 10 via a ring-shaped insulator 98 made of, for example, ceramic.

[0030] The upper electrode 60 has an electrode plate 64 facing the susceptor 12 directly and an electrode support 66 that detachably supports the electrode plate 64 from behind (above). As the material of the electrode plate 64, a conductive material such as Si or Al is preferable. The electrode support 66 is made of, for example, anodized aluminum. In this way, in the process module 4, the disk-shaped susceptor 12 (i.e., the lower electrode) and the disk-shaped upper electrode 60 are arranged facing each other in parallel.

[0031] The gas supply unit 76 supplies a processing gas to the chamber 10. In order to supply the processing gas to the processing space PS set between the upper electrode 60 and the susceptor 12, the upper electrode 60 is also used as a shower head. More specifically, a gas diffusion chamber 72 is provided inside the electrode support 66, and a number of gas discharge holes 74 penetrating from the gas diffusion chamber 72 toward the susceptor 12 side are formed in the electrode support 66 and the electrode plate 64. A gas supply pipe 78 extending from the gas supply unit 76 is connected to a gas inlet 72a provided above the gas diffusion chamber 72.

[0032] A first RF (Radio Frequency) power supply 150 is connected to the upper electrode 60 via a first matcher 152. The first matcher 152 matches the impedance on the first RF power supply 150 side with the impedance on the load (mainly the electrode, plasma, chamber) side. The first RF power supply 150 can apply a high-frequency voltage for plasma generation having a frequency in the range of 30 to 150 MHz to the upper electrode 60. By applying a voltage of such a high frequency to the upper electrode 60, it is possible to generate plasma in a preferable dissociation state and with high density in the processing space PS, and plasma processing under lower pressure conditions becomes possible. The frequency of the output voltage of the first RF power supply 150 is preferably 50 to 80 MHz, and is typically adjusted to a frequency of 60 MHz or in the vicinity thereof.

[0033] A second RF power supply 160 is connected to the susceptor 12 as the lower electrode via a second matcher 162 and a connecting rod 36. The second matcher 162 matches the impedance on the second RF power supply 160 side with the impedance on the load (mainly the electrode, plasma, chamber) side. The second RF power supply 160 can apply a high-frequency voltage for bias having a frequency in the range of several hundred kHz to a dozen or so MHz to the susceptor 12. The frequency of the output voltage of the second RF power supply 160 is typically adjusted to 2 MHz or 13.56 MHz, etc.

[0034] <Shape of Tray, Edge Ring and Wafer> FIG. 3 is a diagram showing an example of the shape of the tray, FIG. 4 is a diagram showing an example of the shape of the edge ring placed on the tray, and FIG. 5 is a diagram showing an example of the shape of the edge ring and the wafer placed on the tray.

[0035] As shown in FIG. 3, the tray TR1 has a disk-like shape and includes a conductive tray body 101, a dielectric film 102 formed to cover the periphery of the tray body 101, a lift pin contact portion 103, and through holes 104, 105, 106. The through hole 104 is a through hole for supplying a heat transfer gas between the tray TR1 and the wafer W through the gas passage 56 (FIG. 2) in the process module 4. The through hole 105 is a through hole for a lift pin for raising and lowering the wafer W. The through hole 106 is a through hole for a lift pin for raising and lowering the edge ring ER. The lift pin contact portion 103 is a part of the back surface of the tray body 101 where the lift pin for lifting the tray TR1 contacts, and the dielectric film 102 is not formed. The lift pin contact portion 103 may be formed as a recess conforming to the shape of the lift pin. Further, on the upper surface of the tray TR1, a substrate placement portion 108 on which the wafer W is placed and an edge ring placement portion 107 on which the edge ring ER is placed are formed. The edge ring placement portion 107 is provided around the substrate placement portion 108. That is, each of the substrate placement portion 108 and the edge ring placement portion 107 has a conductive tray body 101 and a dielectric film 102 formed to cover the periphery of the tray body 101. Further, the edge ring placement portion 107 is formed at a position lower than the substrate placement portion 108. Note that the dielectric film 102 may be formed at least on the upper surface of the tray body 101.

[0036] Also, as shown in FIG. 4, the edge ring ER has an annular shape, and while the outer peripheral portion of the edge ring ER is circular, a flat portion FL having a flat shape is formed in a part of the inner peripheral portion of the edge ring ER. The edge ring ER is placed on the edge ring placement portion 107 on the upper surface of the tray TR1. Also, the inner peripheral portion of the edge ring ER is formed thinner than the outer peripheral portion of the edge ring ER. That is, when the edge ring ER is placed on the edge ring placement portion 107, the upper surface of the inner peripheral portion of the edge ring ER is formed to be substantially the same height as the upper surface of the substrate placement portion 108, or lower than the upper surface of the substrate placement portion 108. Also, when the wafer W is placed on the substrate placement portion 108 on the upper surface of the tray TR1, the upper surface of the outer peripheral portion of the edge ring ER is formed to be substantially the same height as the upper surface of the wafer W, or higher than the upper surface of the wafer W.

[0037] Also, as shown in FIG. 5, the wafer W has a disk-like shape, and a V-shaped notch NT is formed in a part of the outer periphery of the wafer W. The wafer W is placed on the substrate placement portion 108 on the upper surface of the tray TR1. When the wafer W is placed on the substrate placement portion 108, the wafer W is placed so that the notch NT overlaps with the flat portion FL of the edge ring ER. In this way, the substrate placement portion 108 has a support surface for supporting the back surface of the wafer W and through holes 104 and 105 that penetrate the tray body 101 and the dielectric film 102. Also, the area of the substrate placement portion 108 is smaller than the area of the wafer W. That is, when the wafer W is placed, the outer peripheral portion of the wafer W where the notch NT is formed is located outside the outer periphery of the substrate placement portion 108 and on the inner peripheral portion of the edge ring ER.

[0038] As described above, the wafer W and the edge ring ER can be placed on the tray TR1.

[0039] <Configuration of the placement device> FIG. 6 is a diagram showing a configuration example of the mounting device. In the present embodiment, a mounting device 12A as shown in FIG. 6 is used as the load lock chamber 12. In FIG. 6, the mounting device 12A includes a container 201, a rotation angle sensor 202, a horizontal position sensor 203, a mounting table 204, a first lift pin 205, a second lift pin 206, a third lift pin 207, a DC power supply 208, and a switch 209. The rotation angle sensor 202 is installed on the upper wall of the container 201, and the horizontal position sensor 203 is installed on the side wall of the container 201. The mounting table 204 is accommodated in the conductive container 201. Further, the mounting device 12A includes a first lifting mechanism (not shown) for raising and lowering the first lift pin 205, a second lifting mechanism (not shown) for raising and lowering the second lift pin 206 independently of the first lift pin 205, and a third lifting mechanism (not shown) for raising and lowering the third lift pin 207 independently of the first lift pin 205 and the second lift pin 206. The first lift pin 205, the second lift pin 206, and the third lift pin 207 are made of a conductive material (for example, Ni, Al, etc.). The DC power supply 208 is connected to the first lift pin 205 via the switch 209. The second lift pin 206 and the third lift pin 207 are grounded. Further, the mounting device 12A is provided with a vacuum pump (not shown) as an exhaust mechanism capable of making the inside of the container 201 a pressure lower than the atmospheric pressure, and a leak valve (not shown) for returning the pressure inside the container 201 to the atmospheric pressure.

[0040] <Carrier method in substrate processing system> FIG. 7 is a flowchart showing an example of the processing procedure of the carrier method. FIGS. 8 to 11 are diagrams showing an example of the carrier method.

[0041] In FIG. 7, first, in step S1, the tray TR1 is transported to the load lock chamber 12 using the first transport mechanism 15. The tray TR1 is stored in the tray stocker 5 connected to the atmospheric transport chamber 11. The first transport mechanism 15 unloads the tray TR1 from the tray stocker 5 and transports the tray TR1 placed on the pick 15c into the load lock chamber 12 (inside the placement device 12A). At this time, the pressure inside the load lock chamber 12 is atmospheric pressure.

[0042] Next, in step S2, the tray TR1 is placed on the mounting table 204 inside the load lock chamber 12. As shown in FIG. 8, the first lift pin 205 is raised to separate the tray TR1 from the pick 15c (that is, to lift up the tray TR1). At this time, the first lift pin 205 contacts the lift pin contact portion 103 on the back surface of the tray body 101.

[0043] Next, while maintaining the position of the first lift pin 205 at the position shown in FIG. 8, the pick 15c is withdrawn from the load lock chamber 12.

[0044] Next, the first lift pin 205 is lowered (that is, the tray TR1 is lifted down) to place the tray TR1 on the mounting table 204.

[0045] Next, in step S3, the edge ring ER is transported to the load lock chamber 12 using the first transport mechanism 15. The edge ring ER is stored in the edge ring stocker 2 connected to the atmospheric transport chamber 11. The first transport mechanism 15 unloads the edge ring ER from the edge ring stocker 2 and transports the edge ring ER placed on the pick 15c into the load lock chamber 12.

[0046] Next, in step S4, the edge ring ER is placed on the tray TR1 placed on the mounting table 204 in the load lock chamber 12. As shown in FIG. 9, the third lift pin 207 is raised to separate the edge ring ER from the pick 15c (that is, lift up the edge ring ER). At this time, the third lift pin 207 contacts the back surface of the edge ring ER through the through hole 106 of the tray TR1. Since the third lift pin 207 is grounded, the static electricity of the edge ring ER is removed when the tip of the third lift pin 207 contacts the back surface of the edge ring ER.

[0047] Next, while keeping the position of the third lift pin 207 at the position shown in FIG. 9, the pick 15c is withdrawn from the load lock chamber 12.

[0048] Next, the third lift pin 207 is lowered (that is, the edge ring ER is lifted down) to place the edge ring ER on the tray TR1.

[0049] Next, in step S5, the position of the edge ring ER placed on the tray TR1 is measured. As shown in FIG. 10, the rotation angle sensor 202 and the horizontal position sensor 203 are used to measure the position of the edge ring ER placed on the tray TR1, and the position information of the edge ring ER is obtained. The signal indicating the obtained position information is transmitted to the aligner 3. The rotation angle sensor 202 is realized by using, for example, a CCD (Charge-Coupled Device). By photographing the flat portion FL from above the edge ring ER, the rotation angle RA of the edge ring ER with respect to a predetermined reference position RP is measured, and the rotation angle information RAI indicating the rotation angle RA is obtained as the first position information of the edge ring ER. The horizontal position sensor 203 is realized by using, for example, a laser irradiated from the side of the edge ring ER toward the edge ring ER. By measuring the distance between the horizontal position sensor 203 and the outer periphery of the edge ring ER, the horizontal position deviation HP of the edge ring ER with respect to a predetermined reference position RP is measured, and the horizontal position information HPI indicating the position deviation HP is obtained as the second position information of the edge ring ER. Therefore, the position information transmitted from the load lock chamber 12 to the aligner 3 includes the rotation angle information RAI of the edge ring ER and the horizontal position information HPI of the edge ring ER.

[0050] Next, in step S6, the position of the wafer W is adjusted in the aligner 3. The wafer W is transported into the aligner 3 from the FOUP 14 by the first transport mechanism 15. Then, the aligner 3 adjusts the position of the wafer W based on the position information transmitted from the load lock chamber 12. That is, the aligner 3 rotates the wafer W based on the rotation angle information RAI of the edge ring ER, and adjusts the horizontal position of the wafer W based on the horizontal position information HPI of the edge ring ER. Details of the adjustment of the position of the wafer W will be described later.

[0051] Next, in step S7, the wafer W is transferred into the load lock chamber 12 using the first transfer mechanism 15. The wafer W after position adjustment is placed on the pick 15c of the first transfer mechanism 15, unloaded from the aligner 3, and transferred above the mounting table 204 in the load lock chamber 12.

[0052] Next, in step S8, the wafer W is placed on the tray TR1 placed on the mounting table 204 in the load lock chamber 12. As shown in FIG. 11, the second lift pin 206 is raised to separate the wafer W from the pick 15c (that is, lift up the wafer W). At this time, the second lift pin 206 contacts the back surface of the wafer W through the through hole 105 of the tray TR1. Since the second lift pin 206 is grounded, the wafer W is discharged when the tip of the second lift pin 206 contacts the back surface of the wafer W.

[0053] Next, while keeping the position of the second lift pin 206 at the position shown in FIG. 11, the pick 15c is withdrawn from the load lock chamber 12.

[0054] Next, the second lift pin 206 is lowered (that is, the wafer W is lifted down) to place the wafer W on the tray TR1.

[0055] Next, in step S9, a DC voltage is applied to the tray body 101. Exhaustion inside the container 201 is started by a vacuum pump, and the first lift pin 205 is brought into contact with the lift pin contact portion 103. By turning on the switch 209 and connecting the first lift pin 205 to the DC power supply 208, the DC power supply 208 applies a positive DC voltage to the first lift pin 205. By applying a positive DC voltage to the first lift pin 205, a positive DC voltage is applied from the DC power supply 208 to the tray body 101 via the first lift pin 205 and the lift pin contact portion 103. Due to the Coulomb force generated in the tray TR1 by the DC voltage applied to the tray body 101, the wafer W is electrostatically adsorbed to the tray TR1. Also, for example, when the material of the edge ring ER is a conductive material such as Si or SiC, the edge ring ER is also electrostatically adsorbed to the tray TR1. Thus, the adsorption of the wafer W to the tray TR1 is performed by bringing the first lift pin 205 into contact with the back surface of the tray body 101 and applying a DC voltage to the tray body 101 via the first lift pin 205.

[0056] Next, in step S10, the tray TR1 on which the edge ring ER and the wafer W are placed is carried into the process module 4. While stopping the application of the DC voltage to the tray body 101 by turning off the switch 209, the first lift pin 205 is raised while the tip of the first lift pin 205 remains in contact with the back surface of the tray TR1. Even after the application of the DC voltage to the tray body 101 is stopped, the tray TR1 remains charged, so the wafer W is adsorbed and held by the tray TR1.

[0057] Next, the tray TR1 is carried out by the second transfer mechanism 16 inside the vacuum transfer chamber 13. By inserting the pick 16c of the second transfer mechanism 16 into the load lock chamber 12, the pick 16c is positioned below the tray TR1 lifted by the first lift pin 205.

[0058] Next, by lowering the first lift pin 205, the tray TR1 is placed on the pick 16c. Then, the pick 16c is withdrawn from the load lock chamber 12, and the tray TR1 on which the wafer W and the edge ring ER are placed is conveyed from the load lock chamber 12 to the process module 4 by the second transfer mechanism 16.

[0059] Even while the tray TR1 on which the wafer W and the edge ring ER are placed is being conveyed from the load lock chamber 12 to the process module 4, the tray TR1 remains charged, so the wafer W after position adjustment continues to be adsorbed to the tray TR1. Therefore, it is possible to prevent the position of the wafer W after position adjustment from shifting during the conveyance from the load lock chamber 12 to the process module 4.

[0060] Note that the edge ring ER is generally heavier than the wafer W. For this reason, when the tray TR1 is conveyed from the load lock chamber 12 to the process module 4, the edge ring ER is less likely to shift than the wafer W. Therefore, even if the edge ring ER is an insulating material such as SiO2, the conveyance using the tray TR1 is effective. However, when the edge ring ER is a conductive material such as Si or SiC, not only the wafer W but also the edge ring ER can be adsorbed to the tray TR1, so it is more effective.

[0061] The tray TR1 conveyed to the process module 4 is placed on the susceptor 12 (electrostatic chuck 40) inside the process module 4. The susceptor 12 is provided with lift pins (not shown), and the tray TR1 is placed on the susceptor 12 (electrostatic chuck 40) in the same procedure as in step S2. After the tray TR1 is placed on the electrostatic chuck 40, the switch 44 is turned on, and a DC voltage is applied from the DC power supply 42 to the electrostatic chuck 40. Thereby, the wafer W is adsorbed to the electrostatic chuck 40 via the tray TR1.

[0062] Next, in step S11, plasma processing such as etching is performed.

[0063] When the plasma treatment is completed, in step S12, the tray TR1 on which the edge ring ER and the wafer W are placed is unloaded from the process module 4. The tray TR1 unloaded from the process module 4 is placed on the mounting table 204 in the load lock chamber 12. After returning the pressure in the load lock chamber 12 to atmospheric pressure using a leak valve (not shown), the wafer W is unloaded from the load lock chamber 12 by the first transfer mechanism 15. The unloaded wafer W is accommodated in the FOUP 14.

[0064] The edge ring ER and the tray TR1 may or may not be respectively accommodated in the edge ring stocker 2 and the tray stocker 5. The edge ring ER and the tray TR1 may be left placed on the mounting table 204 in the load lock chamber 12, and a new wafer W may be loaded. That is, the next process may start from step S5 or step S6. Also, when replacing the consumed edge ring ER, the consumed edge ring ER may be accommodated in the edge ring stocker 2, and a new edge ring ER may be loaded. That is, the next process may start from step S3.

[0065] <Attractive force in the electrostatic chuck> The tray TR1 loaded into the process module 4 in step S10 is placed on the electrostatic chuck 40. For this reason, the wafer W is not directly placed on the electrostatic chuck 40 but is placed via the tray TR1. FIG. 12 is a graph showing the relationship between the capacitance per unit area and the attractive force per unit area in the electrostatic chuck of the process module. For example, when the thickness of the dielectric layer above the electrode built into the electrostatic chuck is 0.3 mm, the thickness of the dielectric film 102 on the upper surface of the tray body 101 and the dielectric film 102 on the lower surface of the tray body 101 is 0.1 mm each, and the relative permittivity of each dielectric is 8.5, the capacitance of the tray TR1 is 0.124 μF / m 2In this case, when a DC voltage of 5 kV is applied from the DC power supply 42 to the electrostatic chuck 40, a Coulomb force having an attractive force of about 170 Torr per unit area is obtained in the electrostatic chuck 40. Therefore, even when a heat transfer gas is supplied between the tray TR1 placed on the electrostatic chuck 40 and the wafer W in the process module 4, an attractive force of sufficient strength can be obtained so that the wafer W does not separate due to the pressure of the heat transfer gas.

[0066] <Adjustment of Wafer Position> FIG. 13 is a diagram showing the positional relationship between the rotation angle sensor and the horizontal position sensor. As shown in FIG. 13, in the mounting device 12A, the edge ring ER is placed on the tray TR1 such that the flat portion FL is located below the rotation angle sensor 202. Further, in the mounting device 12A, horizontal position sensors 203 are installed at three locations around the edge ring ER placed on the tray TR1.

[0067] FIG. 14 is a diagram showing the correct positional relationship between the edge ring and the wafer. As shown in FIG. 14, in the correct positional relationship between the edge ring ER and the wafer W, the center of the wafer W coincides with the center of the edge ring ER, and the vertex of the concave portion of the notch NT of the wafer W coincides with the center of the flat portion FL of the edge ring ER. Therefore, in order to set the correct positional relationship between the edge ring ER and the wafer W, a straight reference line L1 and a straight reference line L2 are preset in advance. The reference position RP is defined by the reference line L1 in the horizontal direction and the reference line L2 in the vertical direction. The reference line L1 and the reference line L2 intersect perpendicularly to each other. In the correct positional relationship between the edge ring ER and the wafer W, the center of the edge ring ER and the center of the wafer W coincide with the intersection point of the reference line L1 and the reference line L2, and the center of the flat portion FL and the vertex of the concave portion of the notch NT coincide on the reference line L1.

[0068] FIGS. 15 to 18 are diagrams showing an example of wafer position adjustment. FIGS. 15 and 17 show the position of the edge ring ER placed on the tray TR1, and FIGS. 16 and 18 show the position of the wafer W after position adjustment.

[0069] Using the horizontal position sensor 203 with respect to the edge ring ER placed on the tray TR1, as shown in FIG. 15, the horizontal displacement HP with respect to the reference position RP defined by the reference line L1 and the reference line L2 is measured. In the measurement of the displacement HP, as shown in FIG. 15, a straight line LA in the lateral direction and a straight line LB in the longitudinal direction are set with respect to the edge ring ER placed on the tray TR1. The straight line LA and the straight line LB intersect perpendicularly to each other, the center of the edge ring ER coincides with the intersection point of the straight line LA and the straight line LB, and the center of the flat portion FL coincides with the straight line LA. Then, the horizontal position sensor 203 measures the direction and amount of the displacement of the intersection point of the straight line LA and the straight line LB with respect to the intersection point of the reference line L1 and the reference line L2 as the displacement HP. And in the adjustment of the horizontal position of the wafer W performed in the aligner 3, as shown in FIG. 16, the center position of the wafer W is moved from the intersection point of the reference line L1 and the reference line L2 by the displacement HP. Thereby, since the center of the edge ring ER placed on the tray TR1 can be made to coincide with the center of the wafer W by being displaced by the displacement HP, the gap between the inner circumference of the edge ring ER and the outer circumference of the wafer W disposed within the edge ring ER can be made constant over the entire circumference.

[0070] Also, as shown in FIG. 17, for the edge ring ER placed on the tray TR1, the rotation angle RA with respect to the reference position RP defined by the reference line L1 and the reference line L2 is measured using the rotation angle sensor 202. In the measurement of the rotation angle RA, as shown in FIG. 17, for the edge ring ER placed on the tray TR1, a straight line LC in the horizontal direction and a straight line LD in the vertical direction are set. The straight line LC and the straight line LD intersect perpendicularly to each other, the center of the edge ring ER and the intersection of the reference line L1 and the reference line L2 coincide with the intersection of the straight line LC and the straight line LD, and the center of the flat portion FL coincides with the straight line LC. Then, the rotation angle sensor 202 measures the rotation angle RA of the straight line LC with respect to the reference line L1. In the rotation of the wafer W performed in the aligner 3, the wafer W is rotated by the rotation angle RA from the reference position RP. As a result, as shown in FIG. 18, the flat portion FL is displaced by the rotation angle RA, and the vertex of the concave portion of the notch NT of the wafer W can be made to coincide with the center of the flat portion FL of the edge ring ER placed on the tray TR1, and the wafer W can be placed.

[0071] In this embodiment, an edge ring ER and a wafer W are placed on a tray TR1 in a load lock chamber 12 and transported to a process module 4. The placement position of the edge ring ER is measured in the load lock chamber 12, and based on the measurement result, the position of the wafer W is adjusted and placed on the tray TR1. Therefore, even if there is a deviation in the placement position of the edge ring ER, the wafer W can be transported to a relatively correct position with respect to the edge ring ER. Also, since the tray TR1 can electrostatically adsorb the wafer W and the edge ring ER, the edge ring ER and the wafer W placed on the tray TR1 in the load lock chamber 12 can be transported to the process module 4 without shifting. Further, when transporting the wafer W with respect to the edge ring ER disposed in the process module 4, it is conceivable that the relative position between the edge ring ER and the wafer W may shift due to an error that occurs when transporting the wafer W from the load lock chamber 12 to the process module 4. However, in this embodiment, since the wafer W is transported with respect to the edge ring ER in the load lock chamber 12, the relative position between the edge ring ER and the wafer W does not shift due to the transport error from the load lock chamber 12 to the process module 4. That is, in this embodiment, the wafer W can be transported to a relatively correct position with respect to the edge ring ER in the load lock chamber 12 and transported from the load lock chamber 12 to the process module 4 while maintaining the relative position between the wafer W and the edge ring ER. For this reason, uniform plasma processing can be performed on the wafer W in the process module 4.

[0072] The embodiments of the present disclosure should be considered to be illustrative in all respects and not restrictive. Indeed, the above embodiments can be embodied in various forms. Also, the above embodiments may be omitted, substituted, or changed in various forms without departing from the scope and spirit of the claims.

[0073] For example, in the above embodiment, the case where the tray stocker 5 is connected to the air conveyance chamber 11 has been described. However, as shown in FIG. 19, the tray stocker 5 may be connected to the vacuum conveyance chamber 13. FIG. 19 is a diagram showing a configuration example of a substrate processing system in which the tray stocker 5 is connected to a vacuum conveyance chamber. Further, the edge ring stocker 2 may be connected to the vacuum conveyance chamber 13. In these cases, the edge ring and / or the tray are carried into the load lock chamber 12 by the second conveyance mechanism 16.

[0074] Also, in the above embodiment, the edge ring and the wafer are placed on the tray in the load lock chamber 12, but this may be performed outside the load lock chamber 12. For example, a placement device 12A may be connected to the air conveyance chamber 11 separately from the load lock chamber 12, and a tray on which the edge ring and the wafer are placed by the placement device 12A may be carried into the load lock chamber 12.

[0075] Also, in the above embodiment, in step S2, the tray TR1 is placed on the mounting table 204, but it is not necessary to place it. The first lift pin 205 may be lowered to such an extent that the edge ring ER can be carried in in step S3, and the processes after step S3 may be performed while the tray TR1 is supported by the first lift pin 205.

[0076] Also, in the above embodiment, the tray is stored in the tray stocker 5 and the edge ring is stored in the edge ring stocker 2, and each is carried into the load lock chamber 12. However, a tray on which the edge ring is placed in advance may be stored in the tray stocker 5. In this case, the processes of step S3 and step S4 can be omitted. Further, the edge ring stocker 2, the third lift pin 207 of the placement device 12A for raising and lowering the edge ring, and the through hole 106 of the tray TR1 through which the third lift pin 207 passes can be omitted.

[0077] In the above-described embodiment, an example using an edge ring whose inner peripheral portion is located below the outer peripheral portion of the wafer W has been described. However, the inner peripheral portion of the edge ring does not necessarily have to be located below the outer peripheral portion of the wafer W. That is, in the tray TR1, the edge ring mounting portion 107 is formed at a position lower than the substrate mounting portion 108, but the edge ring mounting portion may be formed at a position higher than the substrate mounting portion or at the same position as the substrate mounting portion.

[0078] FIG. 20 is a diagram showing an example of a tray in which the edge ring mounting portion and the substrate mounting portion are formed at the same height. In FIG. 20, the tray TR2 has a disk shape and includes a conductive tray body 251, a dielectric film 252 formed so as to cover the periphery of the tray body 251, an annular groove 253, an annular protective member 254 housed in the groove 253, a lift pin contact portion 255, and through holes 256 and 257. The dielectric film 252 only needs to be formed on at least the upper surface of the tray body 251. The through hole 256 is a through hole for supplying a heat transfer gas between the tray TR2 and the wafer W through the gas passage 56 (FIG. 2) in the process module 4. The through hole 257 is a through hole for a lift pin for raising and lowering the wafer W. Although the tray TR2 is not provided with a through hole for a lift pin for raising and lowering the edge ring ER, it may be provided. Further, on the upper surface of the tray TR2, a substrate mounting portion 259 on which the wafer W is mounted and an edge ring mounting portion 258 on which the edge ring ER is mounted are formed. The edge ring mounting portion 258 is provided around the substrate mounting portion 259. The substrate mounting portion 259 and the edge ring mounting portion 258 are formed on the same plane.

[0079] In the tray TR2, since the outer peripheral portion of the wafer W and the inner peripheral portion of the edge ring ER do not overlap, the dielectric film between the wafer W and the edge ring ER is exposed to the plasma during the plasma treatment. For this reason, it is conceivable that the wafer W is contaminated by the dielectric film or the material constituting the tray body that is exposed due to the consumption of the dielectric film. Therefore, in the tray TR2, a protective member 254 is provided between the substrate mounting portion 259 and the edge ring mounting portion 258. The protective member 254 is accommodated in a groove 253 provided between the substrate mounting portion 259 and the edge ring mounting portion 258. The material of the protective member 254 is preferably the same as the material of the edge ring ER. In the tray TR2, the shapes of the edge ring ER and the tray TR2 can be simplified.

[0080] Also, in the above embodiment, a DC voltage is applied to the tray body 101 by the first lift pin 205 connected to the DC power supply 208. However, the application of the DC voltage to the tray body 101 may be performed without using the lift pin.

[0081] FIG. 21 is a diagram showing an example of applying a DC voltage to the tray body without using a lift pin. A mounting device 12B as shown in FIG. 21 is used as the load lock chamber 12. Regarding the portions overlapping with the mounting device 12A shown in FIG. 6, the description and / or illustration are omitted. In FIG. 21, the mounting device 12B includes a conductive mounting table 352, an insulating support portion 351, a DC power supply 353, and a conductive lift pin 501. The lift pin 501 is grounded. A tray TR3 is placed on the mounting table 352. The edge ring ER and the wafer W are placed on the tray TR3. The wafer W is placed on the tray TR3 by the lifting and lowering of the lift pin 501. Therefore, the wafer W is discharged when it is lifted and lowered by the lift pin 501.

[0082] The tray TR3 is formed by laminating a dielectric film 361 on a conductive tray body 362. In the tray TR3, the dielectric film 361 is formed only on the upper surface of the tray body 362, which is different from the tray TR1 shown in FIG. 3 in that the lower surface of the tray body 362 is not covered with the dielectric film. That is, the conductive tray body 362 is exposed on the lower surface of the tray TR3. Therefore, when the tray TR3 on which the edge ring ER and the wafer W are placed is placed on the placement table 352, a DC voltage is applied to the placement table 352 by the DC power supply 353, and a DC voltage is applied to the tray body 362. As a result, a Coulomb force is generated in the tray TR3, and the wafer W is electrostatically adsorbed to the tray TR3.

[0083] FIG. 22 is a diagram showing another example of applying a DC voltage to the tray body without using a lift pin. A placement device 12C as shown in FIG. 22 is used as a load lock chamber 12. Regarding the portions overlapping with the placement device 12B shown in FIG. 21, the description and / or illustration are omitted. The placement device 12C is different from the placement device 12B shown in FIG. 21 in that a conduction terminal 361 is provided on the upper surface of the conductive placement table 352. The conduction terminal 361 may be formed by protruding a part of the conductive placement table 352, or may be formed of a member different from the placement table 352. For example, the conduction terminal 361 may be formed of a spring.

[0084] A tray TR4 is placed on the mounting table 352. The tray TR4 has a conductive tray body 451, a dielectric film 452 formed so as to cover the periphery of the tray body 451, and a DC power supply connection portion 453. The DC power supply connection portion 453 is a part of the back surface of the tray body 451 where the conduction terminal 361 contacts, and the dielectric film 452 is not formed thereon. The DC power supply connection portion 453 may be formed as a concave portion conforming to the shape of the conduction terminal 361. The tray TR4 is different from the tray TR1 shown in FIG. 3 in that the DC power supply connection portion 453 is provided. When the tray TR4 on which the edge ring ER and the wafer W are placed is placed on the mounting table 352, the conduction terminal 361 of the mounting table 352 contacts the tray body 451 via the DC power supply connection portion 453. Therefore, in a state where the tray TR4 on which the edge ring ER and the wafer W are placed is placed on the mounting table 352, by applying a DC voltage to the mounting table 352 by the DC power supply 353, a DC voltage is applied to the tray body 451. As a result, a Coulomb force is generated in the tray TR4, and the wafer W is electrostatically adsorbed to the tray TR4.

[0085] FIG. 23 is a diagram showing another example of applying a DC voltage to the tray body without using lift pins. A mounting device 12D as shown in FIG. 23 is used as the load lock chamber 12. Regarding the portions overlapping with the mounting device 12C shown in FIG. 22, the description and / or illustration are omitted. The mounting device 12D is different from the mounting device 12C shown in FIG. 22 in that the mounting table 371 is made of an insulating member and the DC power supply 355 is not connected to the mounting table 371. A conductive conduction terminal 361 is provided on the upper surface of the mounting table 371, and the conduction terminal 361 is directly connected to the DC power supply 355. A tray TR5 is placed on the mounting table 371.

[0086] Similar to the tray TR4, the tray TR5 has a conductive tray body 471, a dielectric film 472 formed to cover the periphery of the tray body 471, and a DC power supply connection part 473. When the tray TR5 on which the edge ring ER and the wafer W are placed is placed on the placement table 371, the conduction terminal 361 of the placement table 371 contacts the tray body 471 via the DC power supply connection part 473. Therefore, a DC voltage can be applied to the tray body 471 by the DC power supply 355 in a state where the tray TR5 on which the edge ring ER and the wafer W are placed is placed on the placement table 371. As a result, a Coulomb force is generated in the tray TR5 by the DC voltage applied to the tray body 471, and the wafer W is electrostatically adsorbed to the tray TR5.

[0087] In the above embodiment, the wafer W is discharged by the grounded conductive lift pin. However, the wafer W may be discharged without using the lift pin.

[0088] FIG. 24 is a diagram showing an example of discharging the wafer W without using a lift pin. A placement device 12E as shown in FIG. 24 is used as a load lock chamber 12. Regarding the portions overlapping with the placement device 12B shown in FIG. 21, the description and / or illustration are omitted. In FIG. 24, the placement device 12E has a grounding member 354. The placement device 12E is different from the placement device 12B in that the grounding member 354 is used to discharge the wafer W instead of the grounded lift pin 501. The grounding member 354 is electrically connected to the grounded container 201. The grounding member 354 is configured to be able to contact the wafer W placed on the tray TR6. Also, not only the wafer W but also the edge ring ER may be configured to be able to contact.

[0089] As shown in FIG. 24, the wafer W is grounded and discharged by bringing the grounding member 354 into contact with the wafer W. A DC voltage is applied to the placement table 352 by the DC power supply 353 in a state where the tray TR6 on which the edge ring ER and the wafer W are placed is placed on the placement table 352. As a result, a Coulomb force is generated in the tray TR6 by the DC voltage applied to the placement table 352, and the wafer W is electrostatically adsorbed to the tray TR6.

[0090] FIG. 25 is a diagram showing another example of discharging the wafer W without using a lift pin. A mounting device 12F as shown in FIG. 25 is used as a load lock chamber 12. Regarding the portions overlapping with the mounting device 12C shown in FIG. 22, the description and / or illustration are omitted. In FIG. 25, the mounting device 12F has an RF power supply 392 connected to a conductive mounting table 382.

[0091] When the edge ring ER and the tray TR7 on which the wafer W is placed are placed on the mounting table 382, a DC power supply 391 is connected to the tray main body 481 via a DC power supply connection portion 483. With the DC power supply 391 connected to the tray main body 481, a DC voltage is applied to the tray main body 481 by the DC power supply 391. Also, the RF power supply 392 applies a high-frequency voltage for plasma generation having a frequency in the range of 30 to 150 MHz to the mounting table 382. By applying a voltage of such a high frequency to the mounting table 382 in this way, plasma PLS can be generated in the container 201. Then, the edge ring ER and the wafer W are grounded via the plasma PLS generated in the container 201. As a result, a Coulomb force is generated in the tray TR7 by the DC voltage applied to the tray main body 481, and the wafer W is electrostatically adsorbed to the tray TR7.

[0092] Also, in the above embodiment, the tray is configured to function as a unipolar electrostatic chuck, but it may be configured to function as a bipolar electrostatic chuck.

[0093] FIG. 26 is a diagram showing an example of a tray that functions as a bipolar electrostatic chuck. In FIG. 26, tray TR8 has a disk-like shape and includes a conductive first tray body 302, a conductive second tray body 301, a dielectric film 303 formed to cover the periphery of the first tray body 302 and the second tray body 301, an insulating layer 304, lift pin contact portions 305 and 306, and through holes 307 and 308. In tray TR8, the tray body is divided into two by the insulating layer 304 into the first tray body 302 and the second tray body 301, and the lift pin contact portions are provided on the first tray body 302 and the second tray body 301, respectively, which is different from tray TR1. The insulating layer 304 electrically separates the first tray body 302 and the second tray body 301 in the horizontal direction. The through hole 307 is a through hole for supplying a heat transfer gas between tray TR2 and wafer W through a gas passage 56 (FIG. 2) in the process module 4. The through hole 308 is a through hole for a lift pin.

[0094] FIG. 27 is a diagram showing an example of a mounting device for mounting tray TR8. A mounting device 12G as shown in FIG. 27 is used as a load lock chamber 12. In FIG. 27, the mounting device 12G is different from the mounting device 12A as shown in FIG. 6 in that it includes a first lift pin 401, an insulating second lift pin 409, a first DC power supply 407, a second DC power supply 405, and switches 406 and 408. The first lift pin 401 includes a conductive first pin 404, a conductive second pin 403, and an insulating support portion 402 connecting the first pin 404 and the second pin 403. Further, the mounting device 12G includes a first lifting mechanism (not shown) for raising and lowering the first lift pin 401 and a second lifting mechanism (not shown) for raising and lowering the second lift pin 409 independently of the first lift pin 401. The first DC power supply 407 is connected to the first pin 404 through the switch 408, and the second DC power supply 405 is connected to the second pin 403 through the switch 406.

[0095] As shown in FIG. 27, a tray TR9 on which a wafer W and an edge ring ER are placed is placed on a mounting table 204. The first pin 404 and the second pin 403 are in contact with the lift pin contact portions 305 and 306. By turning on the switch 408 and connecting the first pin 404 to the first DC power supply 407, the first DC power supply 407 applies a positive DC voltage to the first pin 404. By applying a positive DC voltage to the first pin 404, a positive DC voltage is applied from the first DC power supply 407 to the first tray body 302 via the first pin 404 and the lift pin contact portion 306. Also, by turning on the switch 406 and connecting the second pin 403 to the second DC power supply 405, the second DC power supply 405 applies a negative DC voltage to the second pin 403. By applying a negative DC voltage to the second pin 403, a negative DC voltage is applied from the second DC power supply 405 to the second tray body 301 via the second pin 403 and the lift pin contact portion 305. Due to the Coulomb force generated in the tray TR2 by the DC voltages applied to the first tray body 302 and the second tray body 301, the wafer W is electrostatically attracted to the tray TR2. Also, for example, when the material of the edge ring ER is a conductive material such as Si or SiC, the edge ring ER is also electrostatically attracted to the tray TR2.

[0096] In the above embodiment, in step S6, the aligner 3 rotated the wafer W and adjusted the horizontal position of the wafer W. However, the adjustment of the horizontal position of the wafer W may be performed by controlling the first transfer mechanism 15 based on the horizontal position information HPI of the edge ring ER. That is, the horizontal position of the wafer W may be adjusted by transporting the wafer W above the mounting table 204 by the first transfer mechanism 15 based on the horizontal position information HPI of the edge ring ER so that the center of the wafer W coincides with the center of the edge ring ER.

[0097] Note that the individual operations of each component of the substrate processing systems 100 and 200, and the overall operations (sequences) of the substrate processing systems 100 and 200 are controlled by a control unit (not shown). As an example of the control unit, a microcomputer can be mentioned.

[0098] It should be noted that all embodiments of the present disclosure should be considered illustrative and not restrictive in any way. Indeed, the above embodiments can be embodied in various forms. Also, the above embodiments may be omitted, substituted, or changed in various forms without departing from the scope and spirit of the claims. For example, in the above description, etching was given as an example of substrate processing, but the substrate processing to which the technology of the present disclosure is applicable is not limited to etching. For example, by changing the degree of vacuum in the processing space PS and the processing gas to one suitable for film formation, it is also possible to apply the technology of the present disclosure to film formation, which is one of the substrate processes.

[0099] Regarding the above embodiments, the following additional notes are disclosed.

[0100] (Supplementary Note 1) A tray on which a semiconductor substrate is placed, a substrate placement portion on which the semiconductor substrate is placed, and an edge ring placement portion provided around the substrate placement portion and on which an edge ring is placed. The substrate placement portion and the edge ring placement portion have a conductive tray body, and a dielectric film formed on at least the upper surface of the tray body. Tray.

[0101] (Supplementary Note 2) The edge ring placement portion is formed at a position lower than the substrate placement portion. The tray according to Supplementary Note 1.

[0102] (Supplementary Note 3) The area of the substrate placement portion is smaller than the area of the semiconductor substrate. The tray according to Supplementary Note 2.

[0103] (Supplementary Note 4) The substrate placement portion and the edge ring placement portion are formed on the same plane. The tray according to Supplementary Note 1.

[0104] (Appendix 5) A protective member is provided between the substrate placement portion and the edge ring placement portion. The tray according to Appendix 4.

[0105] (Appendix 6) The protective member is accommodated in a groove provided between the substrate placement portion and the edge ring placement portion. The tray according to Appendix 5.

[0106] (Appendix 7) The substrate placement portion has a support surface for supporting the back surface of the semiconductor substrate, and a through hole that penetrates the tray body and the dielectric film. The tray according to Appendix 1.

[0107] (Appendix 8) further includes an insulating layer that electrically separates the tray body in the horizontal direction. The tray according to Appendix 1.

[0108] (Appendix 9) A mounting table, a first lift pin for raising and lowering the tray placed on the mounting table, a second lift pin for raising and lowering the semiconductor substrate placed on the tray, a first lifting mechanism for raising and lowering the first lift pin, a second lifting mechanism for raising and lowering the second lift pin independently of the first lift pin, a voltage application unit for applying a voltage to the tray, and a mounting device having the above.

[0109] (Appendix 10) The voltage application unit is a DC power supply connected to the mounting table. The mounting device according to Appendix 9.

[0110] (Appendix 11) The mounting table has a conduction terminal for electrically contacting the tray and the mounting table. The mounting device described in Supplementary Note 9.

[0111] (Supplementary Note 12) The voltage application unit is a first DC power source connected to the first lift pin. The mounting device described in Supplementary Note 9.

[0112] (Supplementary Note 13) The second lift pin is grounded. The mounting device described in Supplementary Note 9.

[0113] (Supplementary Note 14) The first lift pin a first pin, a second pin, and an insulating support portion connecting the first pin and the second pin. The first DC power source is connected to the first pin, and further has a second DC power source connected to the second pin. The mounting device described in Supplementary Note 12.

[0114] (Supplementary Note 15) further having a third lift pin for raising and lowering an edge ring placed on the tray. The mounting device described in Supplementary Note 9.

[0115] (Supplementary Note 16) The third lift pin is grounded. The mounting device described in Supplementary Note 15.

[0116] (Supplementary Note 17) a container for housing the mounting table, and an exhaust mechanism capable of making the inside of the container a pressure lower than atmospheric pressure. The mounting device described in Supplementary Note 9.

[0117] (Supplementary Note 18) further having an RF power source connected to the mounting table. The mounting device described in Supplementary Note 9.

Explanation of Reference Signs

[0118] 100,200 Substrate Processing System 2 Edge Ring Stockers 3 Aligners 4 Process Modules 5 Tray Stockers 11 Atmospheric Transfer Chamber 12 Load Lock Chamber 13 Vacuum Transfer Chamber 14 FOUP 15 First Transfer Mechanism 16 Second Transfer Mechanism

Claims

1. A tray on which a semiconductor substrate is placed, a substrate placement portion on which the semiconductor substrate is placed; an edge ring placement portion provided around the substrate placement portion and on which an edge ring is placed, The substrate placement portion and the edge ring placement portion are A conductive tray body; and a dielectric film formed on at least the upper surface of the tray body. Tray.

2. The edge ring mounting portion is formed at a position lower than the substrate mounting portion.

2. The tray of claim 1.

3. The area of ​​the substrate placement portion is smaller than the area of ​​the semiconductor substrate.

3. The tray of claim 2.

4. the substrate placement portion and the edge ring placement portion are formed on the same plane; 2. The tray of claim 1.

5. a protective member is provided between the substrate placement portion and the edge ring placement portion; 5. The tray of claim 4.

6. the protective member is accommodated in a groove provided between the substrate placement portion and the edge ring placement portion; 6. The tray of claim 5.

7. The substrate placement unit includes: a support surface for supporting a rear surface of the semiconductor substrate; a through hole penetrating the tray body and the dielectric film; A tray according to any one of claims 1 to 6.

8. Further comprising an insulating layer that electrically isolates the tray body in the horizontal direction. A tray according to any one of claims 1 to 7.

9. The dielectric film has a thickness of 0.3 mm or less. A tray according to any one of claims 1 to 8.

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