Electronic component

Abstract

To provide an electronic component which can planarize an insulation film over a thin film capacitor flat and can reduce the parasitic capacitance.SOLUTION: There is provided a thin film capacitor including: a lower electrode arranged on a first surface of a substrate; a capacitor dielectric film arranged on the lower electrode; and an upper electrode arranged on the capacitor dielectric film. An insulating resin film is arranged on the first surface to cover the thin film capacitor. The upper electrode contains two layers of a titanium film mainly containing Ti and a platinum film mainly containing Pt. The platinum film is arranged between the titanium film and the resin film.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an electronic component.

Background Art

[0002] Thin film capacitors such as MIM capacitors are used in small electronic devices (Patent Document 1). The thin film capacitor is composed of a lower electrode, a capacitor dielectric film, and an upper electrode disposed on a substrate. The thin film capacitor disclosed in Patent Document 1 is covered with an insulating hydrogen barrier film such as Al 2 O 3 TiO 2 Ta 2 O 5 SiN, etc., and an insulating film such as Al 2 O 3 SiO 2 etc.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When arranging an electronic circuit on an insulating film covering a thin film capacitor, it is preferable to flatten the upper surface of the insulating film. Further, it is desired to reduce the parasitic capacitance between the thin film capacitor and the electronic circuit on the insulating film. An object of the present invention is to provide an electronic component capable of flattening an insulating film covering a thin film capacitor and reducing the parasitic capacitance.

Means for Solving the Problems

[0005] According to one aspect of the present invention, a substrate, A thin film capacitor including a lower electrode disposed on a first surface which is one surface of the substrate, a capacitor dielectric film disposed on the lower electrode, and an upper electrode disposed on the capacitor dielectric film, An insulating resin film disposed on the first surface so as to cover the thin film capacitor, and are provided. The upper electrode includes two layers of a titanium film mainly containing Ti and a platinum film mainly containing Pt, and there is provided an electronic component in which the platinum film is disposed between the titanium film and the resin film.

Advantages of the Invention

[0006] By covering the thin film capacitor with a resin film, it is easier to planarize the upper surface of the resin film compared to the case of covering it with an insulating film made of an inorganic insulating material. Also, generally, the dielectric constant of an insulating resin is lower than that of an inorganic insulating material, so the parasitic capacitance between the thin film capacitor and the electronic circuit on the resin film can be reduced. Furthermore, the platinum film functions as a barrier film to prevent moisture from entering from the resin film into the titanium film. As a result, the entry of moisture into the capacitor dielectric film is also suppressed, and deterioration of the capacitor dielectric film can be suppressed.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

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Figure 10

BEST MODE FOR CARRYING OUT THE INVENTION

[0008] [First Embodiment] An electronic component according to the first embodiment will be described with reference to FIG. 1. FIG. 1 is a cross-sectional view of an electronic component according to the first embodiment. A thin-film capacitor 20 is disposed on an insulating surface (hereinafter referred to as a first surface 10A) of a substrate 10 having an insulating surface layer. The thin-film capacitor 20 includes a lower electrode 21 disposed on the first surface 10A, a capacitor dielectric film 22 disposed on the lower electrode 21, and an upper electrode 23 disposed on the capacitor dielectric film 22. Note that the capacitor dielectric film 22 may be composed of a plurality of dielectric films made of different dielectric materials.

[0009] When the first surface 10A is viewed in plan (hereinafter sometimes referred to as "in plan view"), the capacitor dielectric film 22 is included in the lower electrode 21. The upper electrode 23 is included in the capacitor dielectric film 22 in plan view.

[0010] An insulating resin film 40 is disposed on the first surface 10A so as to cover the thin-film capacitor 20. The upper surface of the resin film 40 is substantially flattened. A first opening 40H for exposing a part of the upper electrode 23 is formed in the resin film 40. A wiring 50 is disposed on the resin film 40, and the wiring 50 is connected to the upper electrode 23 through the first opening 40H.

[0011] As the substrate 10, a compound semiconductor substrate, for example, a semi-insulating GaAs substrate is used. In addition, a GaN substrate, an InP substrate, a SiC substrate, or the like may be used. Note that a Si substrate may be used instead of the compound semiconductor substrate.

[0012] For the lower electrode 21, a metal material such as Au, Ti, Pt, W, Al, Mo, Cr, etc. is used. For the capacitor dielectric film 22, for example, silicon nitride (SiN) is used. The upper electrode 23 is composed of a titanium film 23A and a platinum film 23B. Here, the "titanium film" means a film formed of a metal material mainly containing Ti, and the "platinum film" means a film formed of a metal material mainly containing Pt. For example, when the content of Ti is 10 atomic% or more, it can be said that it "mainly contains Ti", and when the content of Pt is 10 atomic% or more, it can be said that it "mainly contains Pt". The platinum film 23B is disposed between the titanium film 23A and the resin film 40. The titanium film 23A and the platinum film 23B have the same shape and size in plan view and are disposed substantially overlapping. Note that the upper electrode 23 may have a single-layer structure or a multilayer structure of three or more layers. Also, the lower electrode 21 may be composed of two or more conductive films made of different conductive materials.

[0013] For the resin film 40, an insulating resin such as polyimide resin, epoxy resin, benzocyclobutene (BCB) resin, polybenzoxazole (PBO) resin, etc. is used. For forming the resin film 40, a coating method or the like can be used. For the wiring 50, for example, Cu is used.

[0014] Next, the excellent effects of the first embodiment will be described. In the first embodiment, the thin film capacitor 20 is covered with the resin film 40. The resin film 40 is easier to planarize the upper surface compared to an insulating film made of an inorganic insulating material. By planarizing the upper surface of the resin film 40, it becomes possible to miniaturize an electronic circuit such as the wiring 50 above the resin film 40.

[0015] The dielectric constant of the insulating resin that is the material of the resin film 40 is usually Al 2 O 3 、SiN、SiO 2It is smaller than the dielectric constant of inorganic insulating materials such as this. Therefore, the parasitic capacitance between the thin film capacitor 20 and the electronic circuit disposed on the resin film 40 can be reduced.

[0016] The Ti used for the upper electrode 23 is likely to react with moisture. When the titanium film 23A of the upper electrode 23 is in contact with the resin film 40, the moisture in the resin film 40 penetrates into the titanium film 23A and reaches the capacitor dielectric film 22 through the titanium film 23A. When moisture penetrates to the capacitor dielectric film 22, the deterioration of the capacitor dielectric film 22 is promoted. In the first embodiment, the platinum film 23B functions as a barrier film that prevents the penetration of moisture from the resin film 40 into the titanium film 23A. As a result, the penetration of moisture into the capacitor dielectric film 22 is also suppressed, and the deterioration of the capacitor dielectric film 22 can be suppressed. In order to sufficiently ensure the function of the platinum film 23B as a barrier film, it is preferable that the thickness of the platinum film 23B is 5 nm or more. Further, the titanium film 23A has a function of enhancing the adhesion between the upper electrode 23 and the capacitor dielectric film 22.

[0017] [Second Embodiment] Next, with reference to the drawings from FIG. 2 to FIG. 3D, the electronic component according to the second embodiment will be described. Hereinafter, the description of the configurations common to the electronic component according to the first embodiment described with reference to FIG. 1 will be omitted.

[0018] FIG. 2 is a cross-sectional view of the electronic component according to the second embodiment. In the first embodiment (FIG. 1), the capacitor dielectric film 22 is included in the lower electrode 21 in a plan view. In contrast, in the second embodiment, in a plan view, the capacitor dielectric film 22 extends to the outside of the lower electrode 21 and covers the side surface of the lower electrode 21.

[0019] Next, with reference to the drawings from FIG. 3A to FIG. 3D, the manufacturing method of the electronic component according to the second embodiment will be described. The drawings from FIG. 3A to FIG. 3D are cross-sectional views in the middle stage of manufacturing the electronic component according to the second embodiment.

[0020] As shown in FIG. 3A, a lower electrode 21 is formed on the first surface 10A of the substrate 10. For the formation of the lower electrode 21, a lift-off method can be applied. Alternatively, a photolithography process method may be used. Also, for the film formation of a thin film made of the metal material constituting the lower electrode 21, a vapor deposition method can be used.

[0021] As shown in FIG. 3B, a capacitor dielectric film 22 is formed on the first surface 10A so as to cover the lower electrode 21. For the film formation of the capacitor dielectric film 22, for example, a chemical vapor deposition (CVD) method can be used. Thereafter, unnecessary portions of the capacitor dielectric film 22 are etched and removed by photolithography. Note that when the capacitor dielectric film 22 is left over the entire area of the first surface 10A, this etching is unnecessary. Depending on the range to be etched and removed, it is also possible to form a capacitor dielectric film 22 included in the lower electrode 21 in a plan view as in the first embodiment (FIG. 1).

[0022] As shown in FIG. 3C, an upper electrode 23 having a laminated structure of a titanium film 23A and a platinum film 23B is formed on the capacitor dielectric film 22. For the formation of the upper electrode 23, for example, a lift-off method can be applied. Alternatively, a photolithography process method may be used.

[0023] As shown in FIG. 3D, a resin film 40 is formed over the entire area of the first surface 10A so as to cover the thin film capacitor 20. For the formation of the resin film 40, for example, a coating method can be used.

[0024] Thereafter, as shown in FIG. 2, a first opening 40H is formed in the resin film 40. The first opening 40H can be formed, for example, by using a photosensitive resin material for the resin film 40 and performing exposure and development. Thereafter, a wiring 50 is formed on the resin film 40. For the formation of the wiring 50, a lift-off method can be used.

[0025] Next, the excellent effects of the second embodiment will be described. In the second embodiment, excellent effects similar to those of the first embodiment can be obtained. Further, in the second embodiment, since the upper surface and side surfaces of the lower electrode 21 are covered with the capacitor dielectric film 22, it is possible to suppress the intrusion of moisture from the resin film 40 into the lower electrode 21. Since the capacitor dielectric film 22 functions sufficiently as a barrier film for suppressing the intrusion of moisture, it is preferable to use silicon nitride, which is more chemically stable than silicon oxide, as the capacitor dielectric film 22.

[0026] [Third Embodiment] Next, an electronic component according to the third embodiment will be described with reference to FIG. 4. Hereinafter, descriptions of configurations common to the electronic components according to the first and second embodiments described with reference to FIGS. 1 to 3D will be omitted.

[0027] FIG. 4 is a cross-sectional view of the electronic component according to the third embodiment. In the first embodiment (FIG. 1) and the second embodiment (FIG. 2), the upper electrode 23 is composed of two layers, a titanium film 23A and a platinum film 23B. In contrast, in the third embodiment, the upper electrode 23 further includes a gold film 23C disposed on the platinum film 23B. The gold film 23C mainly contains Au. For example, when the Au content is 10 atomic % or more, it can be said that it "mainly contains Au".

[0028] Next, the excellent effects of the third embodiment will be described. In the third embodiment, since the upper electrode 23 includes the gold film 23C, the sheet resistance of the upper electrode 23 can be reduced as compared with the case where it is composed of two layers, the titanium film 23A and the platinum film 23B. Further, when the gold film 23C and the titanium film 23A are in contact, titanium diffuses into the grain boundaries of the gold film 23C due to the heat applied during the manufacturing process. In the third embodiment, the platinum film 23B is disposed between the titanium film 23A and the gold film 23C. This platinum film 23B functions as a barrier film for suppressing the diffusion of titanium into the gold film 23C. Therefore, the diffusion of titanium into the gold film 23C can be suppressed.

[0029] [Fourth Embodiment] Next, the electronic component according to the fourth embodiment will be described with reference to FIG. 5. Hereinafter, descriptions of configurations common to the electronic component according to the third embodiment described with reference to FIG. 4 will be omitted.

[0030] FIG. 5 is a cross-sectional view of the electronic component according to the fourth embodiment. In the fourth embodiment (FIG. 4), the upper surface of the gold film 23C of the upper electrode 23 is in contact with the resin film 40. In contrast, in the fourth embodiment, a titanium film 23D is disposed between the gold film 23C and the resin film 40.

[0031] Next, the excellent effects of the fourth embodiment will be described. The adhesion between the titanium film 23D and the resin film 40 is higher than the adhesion between the gold film 23C and the resin film 40. In the fourth embodiment, since the titanium film 23D is disposed between the gold film 23C and the resin film 40, the adhesion between the upper electrode 23 and the resin film 40 can be enhanced.

[0032] Note that, in the fourth embodiment, a platinum film 23B for suppressing the diffusion of Ti into the gold film 23C is disposed between the lower titanium film 23A and the gold film 23C, but no platinum film is disposed between the gold film 23C and the upper titanium film 23D. Even with this structure, the platinum film 23B disposed between the lower titanium film 23A and the gold film 23C has a function of suppressing the intrusion of moisture from the resin film 40 into the capacitor dielectric film 22. Therefore, the effect of suppressing the deterioration of the capacitor dielectric film 22 is maintained.

[0033] [Fifth Embodiment] Next, the electronic component according to the fifth embodiment will be described with reference to FIG. 6. Hereinafter, descriptions of configurations common to the electronic component according to the fourth embodiment described with reference to FIG. 5 will be omitted.

[0034] FIG. 6 is a cross-sectional view of the electronic component according to the fifth embodiment. In the fourth embodiment (FIG. 5), no platinum film is disposed between the gold film 23C and the upper titanium film 23D, but in the fifth embodiment, an upper platinum film 23E is disposed between the gold film 23C and the upper titanium film 23D.

[0035] Next, the excellent effects of the fifth embodiment will be described. In the fifth embodiment, the diffusion of titanium in the upper titanium film 23D into the gold film 23C is suppressed by the upper platinum film 23B. Therefore, the effect of suppressing the intrusion of moisture from the resin film 40 into the capacitor dielectric film 22 can be enhanced.

[0036] [Sixth Embodiment] Next, the electronic component according to the sixth embodiment will be described with reference to FIG. 7. Hereinafter, the description of the configuration common to the electronic component according to the second embodiment described with reference to the drawings from FIG. 2 to FIG. 3D will be omitted.

[0037] FIG. 7 is a cross-sectional view of the electronic component according to the sixth embodiment. In the second embodiment (FIG. 2), the upper electrode 23 and the capacitor dielectric film 22 of the thin film capacitor 20 are in contact with the resin film 40. On the other hand, in the sixth embodiment, an inorganic insulating film 30 made of an inorganic insulating material is disposed between the upper electrode 23 and the resin film 40.

[0038] The inorganic insulating film 30 extends to the region where the capacitor dielectric film 22 is disposed and is also disposed between the capacitor dielectric film 22 and the resin film 40. For the inorganic insulating film 30, for example, silicon oxide, silicon oxynitride, silicon nitride, aluminum oxide, etc. can be used. The inorganic insulating film 30 is provided with a second opening 30H having substantially the same shape and size as the first opening 40H provided in the resin film 40. The wiring 50 is connected to the upper electrode 23 through the first opening 40H and the second opening 30H.

[0039] Next, the manufacturing method of the electronic component according to the sixth embodiment will be described. After forming the upper electrode 23 as shown in FIG. 3C, before forming the resin film 40 shown in FIG. 3D, the inorganic insulating film 30 is formed by CVD or the like. After forming the inorganic insulating film 30, the resin film 40 is formed, and then the first opening 40H is formed in the resin film 40. Further, a second opening 30H is formed in the inorganic insulating film 30. When forming the second opening 30H in the inorganic insulating film 30, the resin film 40 can be used as an etching mask.

[0040] Next, the excellent effects of the sixth embodiment will be described. In the sixth embodiment, the moisture contained in the resin film 40 does not directly contact the upper electrode 23, the capacitor dielectric film 22, and the lower electrode 21 of the thin film capacitor 20. Since the inorganic insulating film 30 suppresses the intrusion of moisture from the resin film 40 into the thin film capacitor, the moisture resistance of the electronic component is improved.

[0041] [Seventh Embodiment] Next, the electronic component according to the seventh embodiment will be described with reference to FIGS. 8 and 9. Hereinafter, the description of the configuration common to the electronic component according to the sixth embodiment (FIG. 7) will be omitted.

[0042] FIG. 8 is a cross-sectional view of the electronic component according to the seventh embodiment. In the sixth embodiment (FIG. 7), the first opening 40H provided in the resin film 40 and the second opening 30H provided in the inorganic insulating film 30 have the same shape and size, and substantially overlap in plan view. In contrast, in the seventh embodiment, in plan view, the second opening 30H is smaller than the first opening 40H, and the second opening 30H is included in the first opening 40H.

[0043] Next, the manufacturing method of the electronic component according to the seventh embodiment will be described. As shown in FIG. 3C, after forming the upper electrode 23, before forming the resin film 40 shown in FIG. 3D, the inorganic insulating film 30 is formed by CVD or the like. Then, the second opening 30H is formed in the inorganic insulating film 30 using a photoetching processing technique. Next, the resin film 40 is formed, and the first opening 40H is formed in the resin film 40. Note that the resin film 40 may be formed before forming the second opening 30H in the inorganic insulating film 30. In this case, after forming the first opening 40H in the resin film 40, the second opening 30H is formed in the inorganic insulating film 30 exposed on the bottom surface of the first opening 40H.

[0044] FIG. 9 is a diagram showing the positional relationship in plan view between the first opening 40H and the second opening 30H of the electronic component according to the seventh embodiment. The cross-sectional view taken along the alternate long and short dash line 8-8 in FIG. 9 corresponds to FIG. 8. In plan view, the second opening 30H is included in the first opening 40H.

[0045] Next, the excellent effects of the seventh embodiment will be described. In the seventh embodiment, as indicated by the arrow 45 in FIG. 8, the moisture in the resin film 40 moves along the interface between the inorganic insulating film 30 and the wiring 50 from the edge of the first opening 40H to the edge of the second opening 30H, and then moves downward along the side surface of the second opening 30H to reach the upper electrode 23. Therefore, compared with the configuration of the sixth embodiment (FIG. 7), the path until the moisture reaches the upper electrode 23 becomes longer. Since the path of the moisture becomes longer, it becomes difficult for the moisture to reach the upper electrode 23. As a result, the moisture resistance can be improved.

[0046] In order to obtain a sufficient effect of improving the moisture resistance, in plan view, it is preferable that the shortest distance Wmin from the edge of the second opening 30H to the edge of the first opening 40H is longer than the thickness of the inorganic insulating film 30.

[0047] Next, a modified example of the seventh embodiment will be described. In the seventh embodiment, in plan view, the second opening 30H is included in the first opening 40H, but the edge of the first opening 40H does not need to be arranged outside the second opening 30H over its entire area. It may be configured such that at least a part of the edge of the first opening 40H is arranged outside the second opening 30H. Also in this configuration, the intrusion path of moisture from the edge of the first opening 40H arranged outside the second opening 30H in plan view becomes longer. Therefore, compared with the configuration of the sixth embodiment (FIG. 7), the moisture resistance can be improved.

[0048] [Eighth Embodiment] Next, the electronic component according to the eighth embodiment will be described with reference to FIG. 10. Hereinafter, the description of the configurations common to the electronic component according to the second embodiment described with reference to the drawings from FIG. 2 to FIG. 3D will be omitted.

[0049] Figure 10 is a cross-sectional view of an electronic component according to the eighth embodiment. The electronic component according to the second embodiment (Figure 2) includes a thin-film capacitor 20 disposed on a substrate 10. In contrast, the electronic component according to the eighth embodiment includes electronic circuit elements such as a heterojunction bipolar transistor 60 and an inductor 80 in addition to the thin-film capacitor 20.

[0050] An epitaxial growth layer 12 made of n-type GaAs is disposed on a substrate 10 made of semi-insulating GaAs. An element isolation region 12I with increased resistance is formed in a part of the epitaxial growth layer 12 by ion implantation or the like. An n-type subcollector layer 12S surrounded by the element isolation region 12I is defined. A heterojunction bipolar transistor 60 is disposed on the subcollector layer 12S.

[0051] The heterojunction bipolar transistor 60 includes a collector layer, a base layer, and an emitter layer stacked in order on the subcollector layer 12S. A collector electrode 60C is disposed on the subcollector layer 12S, and the collector electrode 60C is connected to the collector layer of the heterojunction bipolar transistor 60 through the subcollector layer 12S. A base electrode 60B is disposed on the base layer, and an emitter electrode 60E is disposed on the emitter layer.

[0052] An insulating film 15 is disposed over the entire upper surface of the substrate 10 so as to cover the heterojunction bipolar transistor 60, the collector electrode 60C, the base electrode 60B, and the emitter electrode 60E. The thin-film capacitor 20 and the inductor 80 are disposed on this insulating film 15.

[0053] On the insulating film 15, a plurality of metal patterns of the first wiring layer are arranged. The collector wiring 61C and the emitter wiring 61E arranged in the first wiring layer are connected to the collector electrode 60C and the emitter electrode 60E through openings provided in the insulating film 15, respectively. In the first wiring layer, a lower electrode 21 of the thin film capacitor 20 and a part of the wiring 81 constituting the inductor 80 are further arranged. In the first embodiment (FIG. 1), the lower electrode 21 is directly arranged on the first surface 10A of the substrate 10, but it may be indirectly arranged via other films (epitaxial growth layer 12, insulating film 15, etc.) arranged on the substrate 10 as in the eighth embodiment.

[0054] A capacitor dielectric film 22 covering the lower electrode 21 covers other metal patterns of the first wiring layer, for example, the collector wiring 61C, the emitter wiring 61E, and the wiring 81 of the inductor 80. An insulating film 35 made of an insulating resin is arranged in a region overlapping the collector wiring 61C and the wiring 81 of the inductor 80 in a plan view.

[0055] On the capacitor dielectric film 22 and the insulating film 35, a plurality of metal patterns of the second wiring layer are arranged. For example, in the second wiring layer, an emitter wiring 62E, an upper electrode 23, and a part of the wiring 82 constituting the inductor 80 are arranged. The emitter wiring 62E of the second layer is connected to the emitter wiring 61E of the first layer through an opening provided in the capacitor dielectric film 22. The second layer wiring 82 constituting the inductor 80 is connected to the first layer wiring 81 through openings provided in the insulating film 35 and the capacitor dielectric film 22 (provided at locations other than the cross-section shown in FIG. 10).

[0056] An inorganic insulating film 30 is disposed on the second wiring layer, and a resin film 40 is disposed thereon. A plurality of metal patterns of the third wiring layer are disposed on the resin film 40. The third wiring layer includes an emitter wiring 63E, a wiring 50, and the like. The third emitter wiring 63E is connected to the second emitter wiring 62E through openings provided in the resin film 40 and the inorganic insulating film 30. The wiring 50 is connected to the upper electrode 23 of the thin film capacitor 20 through a first opening 40H provided in the resin film 40 and a second opening 30H provided in the inorganic insulating film 30.

[0057] The thin film capacitor 20 is connected to electronic circuit elements such as a heterojunction bipolar transistor 60 and an inductor 80 through wirings of the wiring layers from the first layer to the third layer.

[0058] Next, the excellent effects of the eighth embodiment will be described. In addition to the thin film capacitor 20, in an electronic component in which electronic circuit elements such as a heterojunction bipolar transistor 60 and an inductor 80 are integrated, excellent effects similar to those of the first to seventh embodiments can be obtained.

[0059] The above-described embodiments are illustrative, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. The similar operational effects due to the similar configurations of the plurality of embodiments will not be sequentially mentioned for each embodiment. Furthermore, the present invention is not limited to the above-described embodiments. For example, it will be apparent to those skilled in the art that various changes, improvements, combinations, etc. are possible.

[0060] Based on the above-described embodiments described in this specification, the following inventions are disclosed. <1> A substrate, A thin film capacitor including a lower electrode disposed on a first surface which is one surface of the substrate, a capacitor dielectric film disposed on the lower electrode, and an upper electrode disposed on the capacitor dielectric film, An insulating resin film disposed on the first surface so as to cover the thin film capacitor comprising The upper electrode includes two layers, a titanium film mainly containing Ti and a platinum film mainly containing Pt, and the platinum film is disposed between the titanium film and the resin film. An electronic component.

[0061] <2> The electronic component according to <1>, wherein the upper electrode further includes a gold film mainly containing Au disposed between the platinum film and the resin film.

[0062] <3> The electronic component according to <1> or <2>, further comprising an inorganic insulating film made of an inorganic insulating material disposed between the upper electrode and the resin film.

[0063] <4> further comprising a wiring disposed on the resin film. The wiring is connected to the upper electrode through a first opening provided in the resin film and a second opening provided in the inorganic insulating film, The electronic component according to <3>, wherein at least a part of the edge of the first opening is disposed outside the second opening when the first surface is viewed in plan.

[0064] <5> The electronic component according to <4>, wherein the second opening is included in the first opening when the first surface is viewed in plan, and the shortest distance from the edge of the second opening to the edge of the first opening is longer than the thickness of the inorganic insulating film.

[0065] <6> The electronic component according to <4> or <5>, further comprising an electronic circuit element disposed on a region of the first surface where the thin film capacitor is not disposed and connected to the thin film capacitor through the wiring.

[0066] <7> The electronic component according to any one of <1> to <6>, wherein at least a part of the edge of the lower electrode is disposed outside the upper electrode when the first surface is viewed in plan.

[0067] <8> The capacitor dielectric film contains silicon nitride and covers the side surface of the lower electrode. The electronic component according to any one of <1> to <7>.

[0068] <9> The electronic component according to any one of <1> to <8>, wherein the thickness of the platinum film is 5 nm or more.

Explanation of symbols

[0069] 10 Substrate 10A First surface of the substrate 12 Epitaxial growth layer 12S Subcollector layer 12I Element isolation region 15 Insulating film 20 Capacitor 21 Lower electrode 22 Capacitor dielectric film 23 Upper electrode 23A Titanium film 23B Platinum film 23C Gold film 23D Titanium film 23E Platinum film 30 Inorganic insulating film 30H Second opening 35 Insulating film 40 Resin film 40H First opening 45 Arrow indicating the path of moisture 50 Wiring 60 Heterojunction bipolar transistor 60B Base electrode 60C Collector electrode 60E Emitter electrode 61C Collector wiring 61E, 62E, 63E Emitter wiring 80 Inductor 81, 82 Wiring constituting the inductor

Claims

1. A substrate, a thin film capacitor including a lower electrode disposed on a first surface which is one surface of the substrate, a capacitor dielectric film disposed on the lower electrode, and an upper electrode disposed on the capacitor dielectric film, and an insulating resin film disposed on the first surface so as to cover the thin film capacitor are provided. The upper electrode includes two layers of a titanium film mainly containing Ti and a platinum film mainly containing Pt, and the platinum film is disposed between the titanium film and the resin film. An electronic component.

2. The electronic component according to claim 1, wherein the upper electrode further includes a gold film mainly containing Au disposed between the platinum film and the resin film.

3. The electronic component according to claim 1 or 2, further comprising an inorganic insulating film made of an inorganic insulating material disposed between the upper electrode and the resin film.

4. The electronic component further includes a wiring disposed on the resin film. The wiring is connected to the upper electrode through a first opening provided in the resin film and a second opening provided in the inorganic insulating film, and when the first surface is viewed in plan, at least a part of the edge of the first opening is disposed outside the second opening. The electronic component according to claim 3.

5. When the first surface is viewed in plan, the second opening is included in the first opening, and the shortest distance from the edge of the second opening to the edge of the first opening is longer than the thickness of the inorganic insulating film. The electronic component according to claim 4.

6. The electronic component according to claim 4, further comprising an electronic circuit element disposed on a region of the first surface where the thin film capacitor is not disposed and connected to the thin film capacitor through the wiring.

7. When the first surface is viewed in plan, at least a part of the edge of the lower electrode is disposed outside the upper electrode. The electronic component according to claim 1 or 2.

8. The electronic component according to claim 1 or 2, wherein the capacitor dielectric film contains silicon nitride and covers the side surface of the lower electrode.

9. The electronic component according to claim 1 or 2, wherein the thickness of the platinum film is 5 nm or more.

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