Radio frequency switch circuit with harmonic compensation function and corresponding electronic equipment

Abstract

The utility model discloses a radio frequency switch circuit with a harmonic compensation function and corresponding electronic equipment. The radio frequency switch circuit comprises a switch unit, a gate end bias unit, a body end bias unit, a source drain end bias unit, a harmonic compensation unit and a compensation bias unit, wherein the gate end bias unit, the body end bias unit and the source-drain end bias unit are respectively connected with the switch unit and respectively provide bias voltage for the switch unit; the harmonic compensation unit is connected with the switch unit and used for compensating a harmonic component generated by the switch unit; the compensation bias unit is connected with the harmonic compensation unit and provides compensation bias voltage for the harmonic compensation unit. Wherein when the radio frequency switch circuit is in a conducting state, the compensation module is equivalent to a trace parasitic capacitor; when the radio frequency switch circuit is in a turn-off state, the harmonic component generated by the harmonic compensation unit compensates and counteracts the harmonic component generated by the switch unit.

Description

Technical Field

[0001] The utility model relates to a radio frequency switch circuit with a harmonic compensation function, and also relates to electronic equipment comprising the radio frequency switch circuit, belonging to the technical field of radio frequency integrated circuits. Background Art

[0002] As a crucial component of RF front-end modules, the RF switch circuit accurately switches the transmission path of RF signals and selects the appropriate RF path. This enables both RF signal reception and transmission in wireless communication systems sharing a common antenna. The RF transceiver is typically located at the front end of wireless communication equipment, and the harmonic handling capabilities of the RF switch circuit directly impact the transceiver's signal processing capabilities. Therefore, improving the harmonic performance of the RF switch circuit is essential for high-performance RF transceivers. Summary of the Invention

[0003] The primary technical problem to be solved by the present invention is to provide a radio frequency switching circuit with a harmonic compensation function.

[0004] Another technical problem to be solved by the present invention is to provide an electronic device including the radio frequency switch circuit.

[0005] In order to achieve the above purpose, the present invention adopts the following technical solutions:

[0006] According to a first aspect of an embodiment of the present utility model, a radio frequency switch circuit with a harmonic compensation function is provided, comprising a switch unit, a gate bias unit, a body bias unit, a source-drain bias unit, a harmonic compensation unit, and a compensation bias unit; wherein,

[0007] The switch unit is used to connect or disconnect the transmission path of the radio frequency signal;

[0008] The gate bias unit, the body bias unit, and the source-drain bias unit are respectively connected to the switch unit to provide the switch unit with a gate bias voltage, a body bias voltage, and a bias voltage between the source and drain terminals;

[0009] The harmonic compensation unit is connected to the switch unit and is used to compensate for the harmonic components generated by the switch unit;

[0010] The compensation bias unit is connected to the harmonic compensation unit to provide a compensation bias voltage for the harmonic compensation unit; wherein,

[0011] When the RF switch circuit is in the on state, the compensation module is equivalent to a tiny parasitic capacitor; when the RF switch circuit is in the off state, the harmonic component generated by the harmonic compensation unit compensates and offsets the harmonic component generated by the switch unit.

[0012] Preferably, when the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent micro parasitic capacitance of the compensation module is 1 / 40 of the parasitic capacitance between the source and drain of the switching transistor itself.

[0013] Preferably, the switching unit is composed of N switching transistors stacked in sequence with source and drain connected, the source end of the first switching transistor is connected to the RF signal input end, and the drain end of the Nth switching transistor is connected to the RF signal output end; wherein N is a positive integer greater than or equal to 2.

[0014] Preferably, the harmonic compensation unit is composed of N compensation modules connected in series in sequence, the first end and the second end of each compensation module are respectively connected to the source end and the drain end of a corresponding switching transistor in the switching unit, and the bias end of each compensation module is respectively connected to the compensation bias unit.

[0015] Preferably, the compensation module includes a first NMOS transistor, a second NMOS transistor, and a diode branch consisting of X diodes connected in series in positive and negative directions; wherein,

[0016] The gate terminal of the first NMOS transistor is connected as a first terminal, and the gate terminal of the second NMOS transistor is connected as a second terminal to the source terminal and the drain terminal of a corresponding switching transistor in the switching unit, respectively; the body terminals of the first NMOS transistor and the second NMOS transistor are connected in parallel with their own source terminals and then connected together to the cathode of the diode branch; the drain terminals of the first NMOS transistor and the second NMOS transistor are both connected to the anode of the diode branch and then connected as bias terminals to the first terminal of the corresponding compensation bias resistor in the compensation bias unit; wherein X is a positive integer.

[0017] Preferably, when the RF switching circuit is in the off state, the first NMOS transistor and the second NMOS transistor in the compensation module alternately generate harmonic components in the positive half cycle and the negative half cycle to compensate for the harmonic components generated by the switching transistor.

[0018] Preferably, the compensation bias unit is composed of N compensation bias resistors connected in series in sequence, and the first ends of the N compensation bias resistors are respectively connected to the bias end of a corresponding compensation module in the harmonic compensation unit in sequence, and the second end of the Nth compensation bias resistor is connected to the compensation bias voltage end.

[0019] Preferably, the gate bias unit is composed of N gate bias resistors connected in series, and the first ends of the N gate bias resistors are respectively connected to the gate end of a corresponding switching transistor in the switching unit, and the second end of the Nth gate bias resistor is connected to the gate bias voltage end.

[0020] Preferably, the body-end bias unit is composed of N individual-end bias resistors connected in series in sequence, and the first ends of the N individual-end bias resistors are respectively connected to the body end of a corresponding switching transistor in the switching unit in sequence, and the second end of the Nth individual-end bias resistor is connected to the body-end bias voltage terminal.

[0021] Preferably, the source-drain bias unit is composed of N source-drain bias resistors connected in series, and both ends of each source-drain bias resistor are respectively connected to the source and drain of a corresponding switching transistor in the switching unit.

[0022] According to a second aspect of the embodiments of the present utility model, an electronic device is provided, which includes the above-mentioned radio frequency switching circuit with harmonic compensation function.

[0023] Compared to the prior art, the RF switching circuit with harmonic compensation provided by the present invention utilizes a technical solution in which the compensation module in the harmonic compensation unit and the switching transistor in the switching unit are connected to each other in a corresponding manner. This allows the harmonic components generated by the harmonic compensation unit to compensate or offset the undesirable harmonic components generated by the switching unit, thereby improving the harmonic performance of the RF switching circuit. Therefore, the RF switching circuit with harmonic compensation provided by the present invention has the advantages of a clever and reasonable circuit design, low cost, and excellent harmonic performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a circuit schematic diagram of a radio frequency switch circuit with a harmonic compensation function in an embodiment of the present utility model;

[0025] Figure 2 This is a curve diagram showing changes in the source terminal voltage and the drain terminal voltage of the first switching transistor when the radio frequency switching circuit is in the off state in an embodiment of the present utility model;

[0026] Figure 3 This is a curve diagram showing the change in drain voltage of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in the embodiment of the present utility model;

[0027] Figure 4 This is a graph showing changes in the gate-drain voltages of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in an embodiment of the present utility model;

[0028] Figure 5 This is a graph showing changes in gate-source voltages of the first NMOS transistor and the second NMOS transistor in the compensation module when the RF switch circuit is in the off state in an embodiment of the present utility model;

[0029] Figure 6 This is a comparison diagram of the simulation measurement of the third-order harmonics of the radio frequency switch circuit provided by the prior art solution and the present invention in the embodiment of the present invention;

[0030] Figure 7 The figure is a schematic diagram of an electronic device using the radio frequency switch circuit provided by the utility model. DETAILED DESCRIPTION

[0031] The technical content of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0032] like Figure 1 As shown, an embodiment of the present invention provides a radio frequency switch circuit with a harmonic compensation function, comprising a switch unit 100, a gate bias unit 200, a body bias unit 300, a source-drain bias unit 400, a harmonic compensation unit 500, and a compensation bias unit 600. The gate bias unit, the body bias unit, and the source-drain bias unit are respectively connected to the switch unit to provide the switch unit with a gate bias voltage, a body bias voltage, and a bias voltage between the source and drain terminals; the harmonic compensation unit is connected to the switch unit to compensate for the harmonic components generated by the switch unit; and the compensation bias unit is connected to the harmonic compensation unit to provide a compensation bias voltage for the harmonic compensation unit.

[0033] The switch unit 100 is used to connect or disconnect the transmission path of the radio frequency signal; the switch unit is composed of N switching transistors M1 to M2. N The source and drain are connected in sequence and stacked, the source end of the first switch transistor M1 is connected to the radio frequency signal input end RFi n, and the Nth switch transistor M N The drain end is connected to the radio frequency signal output end RFout; wherein N is a positive integer greater than or equal to 2.

[0034] When the radio frequency switch circuit is in the off state, the harmonic components generated by the harmonic compensation unit compensate and offset the harmonic components generated by the switch unit.

[0035] like Figure 1 As shown, in one embodiment of the present invention, the gate bias unit 200 is composed of N gate bias resistors R G Connected in series in sequence, and N gate bias resistors R G The first end of each of the Nth gate bias resistor R G The second end of the gate bias voltage (VGC ) terminal GC is connected to provide a gate bias voltage for the N switching transistors in the switching unit.

[0036] The body bias unit 300 consists of N body bias resistors R B In series, the N-terminal bias resistor R B The first end of each of the Nth individual end bias resistor R B The second end and the body bias voltage (V BC ) terminal BC is connected to provide a body-terminal bias voltage for the N switching transistors in the switching unit.

[0037] The source-drain bias unit 400 is composed of N source-drain bias resistors Rds connected in series in sequence, and the two ends of each source-drain bias resistor Rds are respectively connected to the source and drain ends of a corresponding switching transistor in the switching unit, so as to provide a bias voltage between the source and drain ends for the N switching transistors in the switching unit.

[0038] The harmonic compensation unit 500 is composed of N compensation modules connected in series in sequence. The first end and the second end of each compensation module are respectively connected to the source end and the drain end of a corresponding switching transistor in the switching unit, so as to compensate for the harmonic components generated by the N switching transistors in the switching unit; the bias end of each compensation module is respectively connected to the compensation bias unit.

[0039] Each compensation module includes a first NMOS transistor, a second NMOS transistor, and a diode branch consisting of X diodes connected in series, where X is a positive integer and X ≥ 1. The gate terminal of the first NMOS transistor serves as a first terminal, and the gate terminal of the second NMOS transistor serves as a second terminal, respectively connected to the source terminal and drain terminal of a switching transistor in the switch unit; the body terminals of the first and second NMOS transistors are connected in parallel with their respective source terminals and then connected together to the cathode of the diode branch; the drain terminals of the first and second NMOS transistors are both connected to the anode of the diode branch and then, as bias terminals, are connected to the first terminal of the corresponding compensation bias resistor in the compensation bias unit.

[0040] The compensation bias unit 600 is composed of N compensation bias resistors R N Connected in series in sequence, and N compensation bias resistors R N The first end of each of the compensation resistors R is connected to the bias end of the corresponding compensation module in the harmonic compensation unit in turn. N The second end of the compensation bias voltage (V NC ) terminal is NC connected to provide compensation bias voltage for N compensation modules in the harmonic compensation unit.

[0041] In one embodiment of the present invention, when the RF switch circuit is in the on state, the gate bias voltage V GC is 3V, the body bias voltage V BC is 0V, the compensation bias voltage V NC The N switching transistors M1 to M2 in the switch unit are -1V. N After all are turned on, the transmission path of the RF signal from the input terminal RFin to the output terminal RFout is connected. At this time, each of the N compensation modules in the harmonic compensation unit can be equivalent to a tiny parasitic capacitor. Preferably, when the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent tiny parasitic capacitor of each compensation module is 1 / 40 of the parasitic capacitance between the source and drain of the switching transistor itself.

[0042] The following is an analysis and explanation of the compensation module corresponding to the first switch transistor M1. Since the DC (direct current) potentials of the source terminal S1 and the drain terminal D1 of the first switch transistor M1 are both 0V, the first NMOS transistor M1 in the compensation module 11 , the second NMOS tube M 12 The DC potential of the gate terminal is 0V, and the first NMOS tube M 11 , the second NMOS tube M 12 Drain terminal D 11 、D 12 The DC potential is compensated by the bias voltage V NC Therefore, the diode branch is in the cut-off state, and the first NMOS transistor M 11 , the second NMOS tube M 12 In the cut-off state. 11 , the second NMOS tube M 12 The gate-drain voltage V GD is 1V, the gate and drain terminals are equivalent to a reverse bias parasitic capacitor, and the gate-source voltage V GS is 0V, and there is no equivalent reverse bias parasitic capacitance between the gate terminal and the source terminal. 11 , the second NMOS tube M 12 The size is 1 / 20 or less of the size of the first switching transistor M1, so that the equivalent micro parasitic capacitance of each compensation module is 1 / 40 or less of the parasitic capacitance between the source and drain of the switching transistor itself, and its influence on the on-resistance of the switching transistor can be ignored. Therefore, the harmonic compensation method in this embodiment will not introduce negative impact on the on-state of the RF switching circuit.

[0043] In one embodiment of the present invention, when the RF switch circuit is in the off state, the gate bias voltage VGC is -3V, the body bias voltage V BC is -3V, the compensation bias voltage V NC The voltage is -1V. Assuming the RF switch circuit is used for antenna impedance tuning, the signal at the antenna is typically a sinusoidal signal. The first and second NMOS transistors in the compensation module alternately generate harmonic components during the positive and negative half-cycles to compensate for the harmonic components generated by the switching transistor. This is explained in detail below.

[0044] In this embodiment, it is assumed that N=20, X=1, that is, the switch unit consists of 20 switch transistors M1-M 20 The source and drain are connected in sequence and stacked. The diode branch in the compensation module only includes one diode. Assuming that the voltage of the 20 stacked switch transistors is evenly distributed, the maximum withstand voltage of each switch transistor is 4V. When the first switch transistor M1 reaches the maximum withstand voltage, its source voltage V S1 and drain voltage V D1 The change curve of Figure 2 As shown, the source voltage V S1 The swing is 80V, the drain voltage V D1 The swing is 76V and the DC potential is 0V.

[0045] At this time, in the harmonic compensation unit, the compensation module corresponding to the first switch transistor M1 is taken as an example for analysis and explanation. 11 , the second NMOS tube M 12 The sizes are equal, so the first NMOS tube M 11 The gate-drain parasitic capacitance Cgd11 and the second NMOS tube M 12 The gate-drain parasitic capacitance Cgd12 is equal, so the first NMOS tube M 11 , the second NMOS tube M 12 Drain terminal D 11 、D 12 The AC voltage of the first switching transistor M1 is 1 / 2 of the sum of the AC voltage at the source terminal and the AC voltage at the drain terminal. 11 , the second NMOS tube M 12 Drain terminal D 11 、D 12 The DC voltage is the compensation bias voltage V NC , that is -1V. Drain terminal D 11 and D 12 The voltage satisfies the following formula:

[0046]

[0047] Among them, v D11 、vD12 They are the first NMOS tube M 11 , the second NMOS tube M 12 Drain voltage, v S1 、v D1 are the source terminal AC voltage and drain terminal AC voltage of the first switch transistor M1, V NC To compensate for the bias voltage.

[0048] The first NMOS tube M 11 , the second NMOS tube M 12 The change curve of drain voltage is as follows: Figure 3 As shown in the figure, it can be seen from formula (1) that its voltage swing is 78V and the DC voltage is -1V.

[0049] The first NMOS tube M 11 The gate-drain voltage v GD11 It can be expressed as:

[0050] v GD11 =v G11 -v D11 =v S1 -v D11 (2)

[0051] Among them, v G11 The first NMOS tube M 11 The gate voltage.

[0052] Substituting formula (1) into formula (2) we get:

[0053]

[0054] From formula (3), we can know that the first NMOS tube M 11 The gate-drain voltage swing is 2V, and the DC voltage is 1V. Similarly, the second NMOS transistor M 12 The gate-drain voltage v GD12 for:

[0055] v GD12 =v G12 -v D12 =v D1 -v D11 (4)

[0056]

[0057] Among them, v G12 The second NMOS tube M 12 The gate voltage.

[0058] From formula (5), we can know that the second NMOS tube M 12The gate-drain voltage swing is 2V and the DC voltage is 1V. Figure 4 As shown, the first NMOS tube M 11 The gate-drain voltage v GD11 With the second NMOS tube M 12 The gate-drain voltage v GD12 The phases are opposite.

[0059] Assuming that the diode branch is not considered, the first NMOS transistor M 11 The gate-source voltage v GS11 It can be expressed as:

[0060] v GS11 =v G11 -v S11 =v S1 -v S11 (6)

[0061] Among them, v S11 The first NMOS tube M 11 The source voltage.

[0062] Will Substituting into formula (6) and sorting out, we get:

[0063]

[0064] Similarly, we can get the second NMOS tube M 12 The gate-source voltage v GS12 for:

[0065]

[0066] From formula (7) and formula (8), we can know that the first NMOS tube M 11 The gate-source voltage v GS11 and the second NMOS tube M 12 The gate-source voltage v GS12 The AC voltage swing is 2V, and the DC voltage is 0V. Figure 5 As shown, the two are in opposite phases.

[0067] Through the above analysis and Figure 4 、 Figure 5 As shown, the first NMOS tube M 11 The gate-drain voltage v GD11 Always higher than the gate-source voltage v GS11 , the voltage difference is 1V; the second NMOS tube M 12 The gate-drain voltage v GD12 Always higher than the gate-source voltage v GS12 , the voltage difference is 1V; this voltage difference is the compensation bias voltage V NCThe absolute value of 1V is greater than the conduction threshold voltage of the diode branch, so the diode branch in the compensation module is turned on, making the first NMOS tube M 11 , the second NMOS tube M 12 The source voltage changes with the drain voltage.

[0068] When the RF switch circuit is in the off state, the sine wave RF signal at the input terminal RFin swings between the source and drain terminals of the N switch transistors in the switch unit. The N switch transistors generate a large number of undesirable harmonics due to the parasitic capacitance between their own source and drain terminals, causing nonlinearity in the RF switch circuit and deteriorating performance indicators such as the noise or antenna efficiency of the receiver in the system. At this time, the N compensation modules in the harmonic compensation unit, when the diode branch is in the on state, the first NMOS transistor M 11 , the second NMOS tube M 12 The source voltage changes with the drain voltage. 11 , the second NMOS tube M 12 The phase of the harmonic component generated by the parasitic capacitance between the source and drain terminals is opposite to that of the harmonic component generated by the switching transistor. Therefore, the undesirable harmonic component generated by the switching unit can be compensated, and part of the harmonics are offset.

[0069] Specifically, when the AC voltage difference between the source and drain terminals of each switching transistor of the switching unit is larger, the parasitic capacitance of each switching transistor itself introduces more undesirable harmonics. 11 , the second NMOS tube M 12 The larger the gate-drain voltage and gate-source voltage, the larger the gate-drain parasitic capacitance Cgd11, Cgd12 and the gate-source parasitic capacitance Cgs11, Cgs12, and the larger the compensation harmonic components generated. Figure 2 and Figure 4 As shown in FIG. 1 , at the peak of the positive half cycle of the sine wave, that is, at t = 0.25 us, the voltage swing between the source and drain of the switching transistor reaches a maximum of 4V, the absolute value of the AC voltage at the source end of the switching transistor is 80V, and the absolute value of the AC voltage at the drain end is 76V. The undesirable harmonics generated by the switching transistor are relatively large. At this time, in the compensation module, the first NMOS transistor M 11 The gate-drain voltage v GD11 is 3V, the second NMOS tube M 12 The gate-drain voltage v GD12 is -1V. At the same time, due to the first NMOS tube M 11 , the second NMOS tube M 12 The source voltage changes with the drain voltage, so the first NMOS tube M 11The gate-source voltage v GS11 Also 3V, the second NMOS tube M 12 The gate-source voltage v GS12 is also -1V, so the first NMOS tube M 11 At this time, more harmonic components are generated, and the second NMOS tube M 12 At this time, basically no harmonics are generated. At the peak of the negative half cycle of the sine wave, that is, when t = 0.75us, the voltage swing between the source and drain of the switching transistor also reaches the maximum value of 4V. The absolute value of the AC voltage at the source end of the switching transistor is 80V, and the absolute value of the AC voltage at the drain end is 76V. The undesirable harmonic components generated by the switching transistor are the same as those at the peak of the positive half cycle. At this time, in the compensation module, the first NMOS transistor M 11 The gate-drain voltage v GD11 is -1V, the second NMOS tube M 12 The gate-drain voltage v GD12 is 3V. At the same time, since the first NMOS tube M 11 , the second NMOS tube M 12 The source voltage changes with the drain voltage, so the first NMOS tube M 11 The gate-source voltage v GS11 Also -1V, the second NMOS tube M 12 The gate-source voltage v GS12 is also 3V, so the second NMOS tube M 12 At this time, more harmonic components are generated, and the first NMOS tube M 11 In this case, basically no harmonics are generated. That is, the harmonics generated by the N compensation modules in the harmonic compensation unit during the negative half cycle of the sine wave are the same as those generated during the positive half cycle, and are both used to offset the undesirable harmonic components generated by the switching transistor.

[0070] In other embodiments of the present invention, it is assumed that in the above parameter settings, the compensation bias voltage V NC If it is not set to -1V, the number of diodes X included in the diode branch of the compensation module is not 1. When the compensation bias voltage V NC When the absolute value of does not reach the conduction threshold voltage of the diode branch in the compensation module, the diode branch is in the cut-off state, and the first NMOS transistor M in the compensation module is turned off. 11 , the second NMOS tube M 12 The source terminal voltage no longer changes with the drain terminal voltage, and the source terminal DC voltage is 0V. 11 The gate-source voltage v GS11 and the second NMOS tube M 12 The gate-source voltage v GS12 like Figure 5At the peak of the positive half cycle of the sine wave, that is, t = 0.25us, the first NMOS tube M 11 The gate-drain voltage v GD11 is 3V, the second NMOS tube M 12 The gate-drain voltage v GD12 is -1V, and at the same time, the first NMOS tube M 11 The gate-source voltage v GS11 is 2V, the second NMOS tube M 12 The gate-source voltage v GS12 is -2V, therefore, compared to the diode conduction state, the first NMOS tube M 11 At this time, the harmonic components generated are reduced, and the second NMOS tube M 12 At this time, harmonics are still basically not generated. Similarly, at the peak of the negative half cycle of the sine wave, that is, at t = 0.75us, the first NMOS transistor M 11 The gate-drain voltage v GD11 is -1V, the second NMOS tube M 12 The gate-drain voltage v GD12 is 3V, and at the same time, the first NMOS tube M 11 The gate-drain voltage v GD11 is -2V, the second NMOS tube M 12 The gate-drain voltage v GD12 is 2V, therefore, compared to the diode conduction state, the second NMOS tube M 12 At this time, the harmonic components generated are reduced, and the first NMOS tube M 11 At this time, harmonics are basically not generated. From the above analysis, it can be seen that by adjusting the working state of the diode branch in the compensation module, including adjusting the number of diodes and / or the compensation bias voltage V NC The size of the harmonic components can be adjusted to compensate for them.

[0071] The above describes in detail the specific structure and working principle of a radio frequency switch circuit with harmonic compensation function provided by the embodiment of the utility model. In order to verify the superiority of the radio frequency switch circuit provided by the embodiment of the utility model in terms of harmonic performance, the inventors conducted simulation comparative tests on the third-order harmonics of the technical solution in the embodiment and the existing technical solution. The simulation test results are as follows: Figure 6 shown.

[0072] exist Figure 6 In the figure, the X-axis is the input power of the RF circuit, and the Y-axis is the third-order harmonic component, both in dBm. Figure 6It can be seen that when the input power of the RF signal increases to 48dBm, the third-order harmonic generated by the RF switching circuit of the current technical solution is -28dBm, while the third-order harmonic generated by the RF switching circuit provided in the embodiment of the utility model is -42dBm. Compared with the existing technical solution, in the technical solution provided in the embodiment of the utility model, the third harmonic achieves 14dB compensation optimization, and the harmonic compensation effect is very obvious, which can significantly improve the efficiency of the antenna under high-power working conditions, thereby enhancing the performance and reliability of the wireless communication system.

[0073] It should be noted that the above embodiments are merely examples. In other embodiments of the present invention, the circuit structures of the gate bias unit 200, the body bias unit 300, the source-drain bias unit 400, and the compensation bias unit 600 may adopt other methods to achieve the corresponding biasing effects, and the present invention is not limited thereto.

[0074] The RF switching circuit with harmonic compensation provided by the present invention can be used in electronic devices as an important component of communication components. The electronic devices referred to here refer to computer devices that can be used in mobile environments and support multiple communication standards such as GSM, EDGE, CDMA, TD-SCDMA, WCDMA, TDD-LTE, FDD-LTE, and NR, including mobile phones, laptops, tablets, and car computers. In addition, the technical solution provided by the present invention is also applicable to other applications of RF integrated circuits, such as communication base stations and intelligent connected vehicles.

[0075] In one embodiment of the present invention, Figure 7 As shown, the electronic device includes at least a processor, a memory and a communication component, and may further include a sensor component, a power component, a multimedia component and an input / output interface according to actual needs. Among them, the memory, communication component, sensor component, power component, multimedia component and input / output interface are all connected to the processor. The memory can be a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, etc., and the processor can be a central processing unit (CPU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a digital signal processing (DSP) chip, etc. Other communication components, sensor components, power components, multimedia components, etc. can all be implemented using general components and will not be described in detail here.

[0076] In summary, compared with the prior art, the RF switching circuit with harmonic compensation provided by the present invention utilizes a technical solution in which the compensation module in the harmonic compensation unit and the switching transistor in the switching unit are connected to each other in a corresponding manner. This allows the harmonic components generated by the harmonic compensation unit to compensate or offset the undesirable harmonic components generated by the switching unit, thereby improving the harmonic performance of the RF switching circuit. Therefore, the RF switching circuit with harmonic compensation provided by the present invention has the advantages of a clever and reasonable circuit design, low cost, and excellent harmonic performance.

[0077] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of this utility model, "plurality" means two or more, unless otherwise specifically defined.

[0078] The above describes in detail the RF switch circuit with harmonic compensation function and the corresponding electronic device provided by the present invention. For those skilled in the art, any obvious modification made to the present invention without departing from the essence of the present invention will constitute an infringement of the patent rights of the present invention and will result in corresponding legal liability.

Claims

1. A radio frequency switching circuit with harmonic compensation function, characterized in that It includes a switch unit, a gate bias unit, a body bias unit, a source-drain bias unit, a harmonic compensation unit and a compensation bias unit; wherein, The switch unit is used to connect or disconnect the transmission path of the radio frequency signal; The gate bias unit, the body bias unit, and the source-drain bias unit are respectively connected to the switch unit to provide the switch unit with a gate bias voltage, a body bias voltage, and a bias voltage between the source and drain terminals; The harmonic compensation unit is connected to the switch unit; the harmonic compensation unit is composed of N compensation modules connected in series, and is used to compensate for the harmonic components generated by the switch unit; wherein N is a positive integer greater than or equal to 2; The compensation bias unit is connected to the harmonic compensation unit to provide a compensation bias voltage for the harmonic compensation unit; wherein, When the RF switch circuit is in the on state, the compensation module is equivalent to a tiny parasitic capacitor; when the RF switch circuit is in the off state, the harmonic component generated by the harmonic compensation unit compensates and offsets the harmonic component generated by the switch unit.

2. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: When the size of the first NMOS transistor and the second NMOS transistor in the compensation module is 1 / 20 of the size of the switching transistor, the equivalent micro parasitic capacitance of the compensation module is 1 / 40 of the parasitic capacitance between the source and drain of the switching transistor itself.

3. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: The switch unit is composed of N switch transistors stacked in sequence with source and drain connected, the source end of the first switch transistor is connected to the RF signal input end, and the drain end of the Nth switch transistor is connected to the RF signal output end.

4. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: The first end and the second end of each compensation module are respectively connected to the source end and the drain end of a corresponding switching transistor in the switching unit, and the bias end of each compensation module is respectively connected to the compensation bias unit.

5. The radio frequency switching circuit with harmonic compensation function according to claim 4, wherein: The compensation module includes a first NMOS transistor, a second NMOS transistor and a diode branch consisting of X diodes connected in series in positive and negative directions; wherein, The gate terminal of the first NMOS transistor is connected as a first terminal, and the gate terminal of the second NMOS transistor is connected as a second terminal to the source terminal and the drain terminal of a corresponding switching transistor in the switching unit, respectively; the body terminals of the first NMOS transistor and the second NMOS transistor are connected in parallel with their own source terminals and then connected together to the cathode of the diode branch; the drain terminals of the first NMOS transistor and the second NMOS transistor are both connected to the anode of the diode branch and then connected as bias terminals to the first terminal of the corresponding compensation bias resistor in the compensation bias unit; wherein X is a positive integer.

6. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: When the RF switch circuit is in the off state, the first NMOS transistor and the second NMOS transistor in the compensation module alternately generate harmonic components in the positive half cycle and the negative half cycle to compensate for the harmonic components generated by the switching transistor.

7. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: The compensation bias unit is composed of N compensation bias resistors connected in series in sequence, and the first ends of the N compensation bias resistors are respectively connected to the bias end of a corresponding compensation module in the harmonic compensation unit in sequence, and the second end of the Nth compensation bias resistor is connected to the compensation bias voltage end.

8. The radio frequency switching circuit with harmonic compensation function according to claim 1, wherein: The gate bias unit is composed of N gate bias resistors connected in series, and the first ends of the N gate bias resistors are respectively connected to the gate end of a corresponding switching transistor in the switching unit, and the second end of the Nth gate bias resistor is connected to the gate bias voltage end.

9. The radio frequency switch circuit with harmonic compensation function according to claim 1, wherein: The body-end bias unit is composed of N body-end bias resistors connected in series in sequence, and the first ends of the N body-end bias resistors are respectively connected to the body end of a corresponding switching transistor in the switch unit in sequence, and the second end of the Nth body-end bias resistor is connected to the body-end bias voltage terminal.

10. The radio frequency switch circuit with harmonic compensation function according to claim 1, wherein: The source-drain bias unit is composed of N source-drain bias resistors connected in series, and both ends of each source-drain bias resistor are respectively connected to the source and drain of a corresponding switching transistor in the switching unit.

11. An electronic device, characterized in that The invention comprises a radio frequency switching circuit with harmonic compensation function as claimed in any one of claims 1 to 10.

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