Recording device
The recording apparatus addresses the risk of simultaneous switch turn-on by using a control output means to generate a switch control signal that turns off switches during a predetermined period, effectively preventing high current flow and malfunctions while maintaining a simple configuration.
Patent Information
- Application Number
- JP2023203909
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-01
- Publication Date
- 2025-06-12
AI Technical Summary
In inkjet recording apparatuses that use piezoelectric elements, there is a risk of multiple analog switches simultaneously turning on, leading to potential malfunction or failure due to high current flow between drive signals with voltage differences.
A recording apparatus configuration that includes a control output means to generate a switch control signal that turns off both the first and second switch means during a predetermined period including the switching timing defined by a timing signal, thereby preventing simultaneous turn-on of the switches.
This configuration effectively suppresses the simultaneous turn-on of multiple analog switches, preventing high current flow and potential malfunctions, while maintaining a simple circuit configuration without the need for additional prevention circuits.
Smart Images

Figure 2025088999000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an inkjet recording apparatus.
Background Art
[0002] Some inkjet recording apparatuses include a recording head that discharges ink from nozzles by driving a piezoelectric element, and perform recording with the ink discharged from the recording head. In such a recording apparatus, by inputting a drive signal selected based on image data among a plurality of drive signals corresponding to a plurality of drive patterns of the piezoelectric element to the piezoelectric element, ink discharge corresponding to the image data is performed. Patent Document 1 describes a recording apparatus having a recording head and a control board in which one piezoelectric element is connected to a plurality of amplifiers that respectively output different drive waveforms corresponding to different droplet types (droplet sizes) via a plurality of analog switches (hereinafter referred to as switches). In this recording apparatus, for each discharge timing, by switching the ON / OFF of the plurality of switches, a drive waveform corresponding to the droplet type is selectively supplied to each piezoelectric element.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In such a recording apparatus, as shown in FIG. 20, assume a case where switches 1 and 2 whose ON / OFF are controlled by a switch control signal output by a decoder 509 are connected to a piezoelectric element corresponding to a certain nozzle N. Assume that drive signal 1 corresponding to a large ink droplet size is input to switch 1, and drive signal 2 corresponding to a small ink droplet size is input to switch 2.
[0005] 18 shows an example of the control signals that control the ON / OFF of each switch when continuous ejection is performed from nozzle N, the drive signals input to each switch, and the drive signal input to the piezoelectric element of nozzle N. The ejection timing is controlled by a latch signal. Let us assume that at a certain point in time st3, switch 1 is ON, switch 2 is OFF, and drive signal 1 is applied to nozzle N.
[0006] Switch 1 and switch 2 switch ON / OFF when the latch signal falls, switching the drive signal applied to the piezoelectric element of nozzle N. At time t', the latch signal falls, switch 1 turns OFF, and switch 2 turns ON. Then, drive signal 2 is applied to nozzle N (st4).
[0007] Figure 19 shows the details of the operation at time t'. An OFF signal is input to switch 1 at the falling edge of the latch signal, but there is generally a delay time Δt1 before the actual state of switch 1 becomes completely OFF. Also, an ON signal is input to switch 2 at the falling edge of the latch signal, but there is generally a delay time Δt2 before the actual state of switch 2 becomes completely ON. Here, the lengths of Δt1 and Δt2 vary depending on the manufacturing variations of the semiconductor integrated circuits that make up the switches and on operating environment conditions such as temperature.
[0008] As shown in the example of FIG. 19, when Δt1>Δt2, there is a period during which switch 1 and switch 2 are simultaneously in the ON state. A circuit that outputs drive signal 1 is connected to a circuit that outputs drive signal 2. At this time, if there is a difference in voltage between drive signal 1 and drive signal 2 (in FIG. 19, the voltage of drive signal 1 > the voltage of drive signal 2), a large current flows through the route drive signal 1 output circuit → switch 1 → switch 2 → drive signal 2 output circuit. This current could lead to malfunction or failure of the drive signal output circuit or switch.
[0009] Therefore, as shown in FIG. 20, it is conceivable to provide a simultaneous turn-on prevention circuit 520 after the decoder 509 that outputs a switch control signal, and input an OFF signal to all switches regardless of the switch control signal output from the decoder 509 for a predetermined period. For example, by inputting an OFF signal to all switches during a period including the switching timing of the switch control signal, it is possible to suppress a plurality of analog signals from being simultaneously turned on. However, in this configuration, providing a simultaneous turn-on prevention circuit may complicate the circuit configuration and increase costs.
[0010] An object of the present invention is to suppress a plurality of analog switches that switch drive signals input to a piezoelectric element from simultaneously turning on in a recording apparatus that discharges a liquid using the piezoelectric element with a simple configuration.
Means for Solving the Problems
[0011] The present invention is a recording apparatus comprising a piezoelectric element and a recording head that discharges a liquid by driving the piezoelectric element, and performs recording with the liquid discharged from the recording head, a first output means for outputting a first drive signal for driving the piezoelectric element, a second output means for outputting a second drive signal for driving the piezoelectric element, a first switch means capable of switching the input of the first drive signal output from the first output means to the piezoelectric element between on and off, a second switch means capable of switching the input of the second drive signal output from the second output means to the piezoelectric element between on and off, a selection output means for outputting selection information indicating which of the first drive signal and the second drive signal is to be input to the piezoelectric element based on image data, a control output means for outputting a switch control signal for controlling the on and off of the first switch means and the second switch means to the first switch means and the second switch means based on the selection information input from the selection output means and a timing signal that defines the switching timing of the selection information. having The switch control signal output by the control output means is a control signal for turning off the first switch means and the second switch means during a predetermined period including the switching timing defined by the timing signal. The recording apparatus is characterized by this.
Effect of the Invention
[0012] According to the present invention, in a recording apparatus that discharges liquid using a piezoelectric element, it is possible to suppress a plurality of analog switches for switching a drive signal input to the piezoelectric element from being simultaneously turned on with a simple configuration.
Brief Description of the Drawings
[0013]
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Embodiments for Carrying Out the Invention
[0014] Hereinafter, exemplary embodiments for carrying out the present invention will be described with reference to the drawings. However, the dimensions, materials, shapes, relative arrangements, etc. of the components described in the following examples should be appropriately changed according to the configuration of the apparatus to which the present invention is applied and various conditions, and the scope of the present invention is not intended to be limited to the following examples.
[0015] <Overall Configuration of the Recording Apparatus> FIG. 4 is a side sectional view showing the configuration of a recording apparatus 1 that performs recording on a roll-shaped recording medium such as roll paper using a full-line inkjet recording head as an example of an inkjet recording apparatus. The full-line inkjet recording head (hereinafter referred to as the "recording head") is a recording head having a recording width equal to or greater than the length in the width direction of the roll paper. As shown in FIG. 4, this recording apparatus 1 generally includes a housing 106, a head unit 100, first to fourth recording heads 101 corresponding to, for example, four colors of CMYK, a scanner unit 102, a line scanner 103, and a transport roller 104. The roll paper 105 used as the recording medium is nipped by the corresponding transport roller 104 and transported in the direction of the arrow, and is sequentially recorded directly below each of the first to fourth recording heads 101.
[0016] <Configuration of Recording Head> As a means for ejecting ink from the nozzles of the recording head 101, a method is known in which a piezoelectric element is used as an ejection energy generating element to generate pressure in a pressure chamber, and the pressure causes the liquid in the pressure chamber to be ejected from a nozzle formed at one end of the pressure chamber. The recording apparatus 1 performs recording with the ink ejected from the nozzles of the recording head 101. In such a recording head 101, each piezoelectric element is provided with an electrical contact and is connected to an integrated circuit that generates a drive signal, and ejection is performed by driving the piezoelectric element with the drive signal.
[0017] FIG. 5 is a schematic diagram of a unit 209 in which a piezoelectric element substrate 200, a drive element selection unit 201, and a flexible electrical wiring substrate 202 are combined. The piezoelectric element substrate 200 includes a first terminal 200a and a second terminal 200b, and is electrically connected to terminals (not shown) provided in the drive element selection unit 201 mounted on the flexible electrical wiring substrate 202, respectively. The flexible electrical wiring substrate 202 includes a selection unit side terminal 203 and is electrically connected to a wiring substrate side terminal (not shown) provided in the drive element selection unit 201.
[0018] The flexible electrical wiring substrate 202 includes a capacitor region 205 for mounting a power supply bypass capacitor of the drive element selection unit 201 and a head substrate connection portion 204.
[0019] FIG. 6 is a schematic diagram of the recording head 101. One recording head 101 is composed of four units 209. The electrical connection between each unit 209 and the head substrate 206 is performed by the head substrate connection portion 204. The head substrate 206 includes a signal connection portion 207 and a drive signal connection portion 208 that are connected to the main body of the recording apparatus 1.
[0020] FIG. 7 shows the wiring of the first layer of the flexible printed wiring board 210. The first drive signal wiring 211, the third drive signal wiring 213, the fifth drive signal wiring 215, and the seventh drive signal wiring 217 all have substantially the same wiring width. Drive signal feedback current lines 219 are arranged on the side opposite to the third drive signal wiring 213 of the first drive signal wiring 211 and on the side opposite to the fifth drive signal wiring 215 of the seventh drive signal wiring 217.
[0021] FIG. 8 shows the wiring of the second layer of the flexible printed wiring board 210. The second drive signal wiring 212, the fourth drive signal wiring 214, the sixth drive signal wiring 216, and the eighth drive signal wiring 218 all have substantially the same wiring width. Drive signal feedback current lines 219 are arranged on the side opposite to the fourth drive signal wiring 214 of the second drive signal wiring 212 and on the side opposite to the sixth drive signal wiring 216 of the eighth drive signal wiring 218.
[0022] <Explanation of the driving method of the piezoelectric element and the driving signal of the piezoelectric element> The driving method of the piezoelectric element 301 and the driving signal applied to the piezoelectric element 301 will be described with reference to FIG. 9. For driving the piezoelectric element 301, there are steps from (0) to (3) as shown in FIG. 9(a), and the applied voltage (driving signal) changes as shown in FIG. 9(b) in these steps. These will be described in order.
[0023] (0) In the initial state, the pressure chamber 304 is filled with the ink 305, and a high voltage is applied from the voltage source 303 between the upper electrode 300 and the lower electrode 302 of the piezoelectric element 301, and the pressure chamber 304 is contracted. (1) By reducing the voltage of the voltage source 303, the pressure chamber 304 is expanded to draw in the ink 305. At this time, a sinusoidal pressure wave is generated in the pressure chamber 304 by the piezoelectric element 301. (2) By raising the voltage of the voltage source 303 in synchronization with the pressure wave generated in (1) above, the pressure chamber 304 is contracted to discharge the ink 305. (3) After the above (2), the piezoelectric element 301 continues mechanical vibration. To cancel this mechanical vibration and make the piezoelectric element 301 stationary, the voltage of the voltage source 303 is raised again.
[0024] Through the steps from (0) to (3) above, one ejection operation is performed, and the above series of voltage changes of the voltage source 303 is the waveform of the drive signal to be applied to the piezoelectric element 301.
[0025] <Functional Configuration of the Recording Device> The functional configuration of the recording device 1 will be described. FIG. 10 is a block diagram showing the functional configuration of the recording device 1. The HostPC 401 transmits a printing instruction and printing data to the control controller 400. The control controller 400 that controls the recording device 1 includes a reception I / F 402 that communicates with the HostPC 401, a CPU 410, and a ROM 403 that stores a program for operating the CPU 410. Further, the control controller 400 includes a RAM 404 that executes programs and temporarily stores various data, and a motor / sensor control unit 405 that controls motors and sensors in the recording device 1. Further, the control controller 400 includes an image processing unit 406 that performs image processing on the printing data sent from the HostPC 401 through the reception I / F 402, and a recording control unit 407 that controls the recording head 101 based on the data processed by the image processing unit 406.
[0026] The image processing unit 406 generates raster image data that can be printed using the printing data received from the HostPC 401, and converts it into image data for each ink color such as CMYK that can be processed by the recording control unit 407 and outputs it. The recording control unit 407 includes a drive signal control unit 408 and a drive signal selection information transmission unit 409. The drive signal control unit 408 transmits a control signal for generating a drive signal to the drive signal generation unit 411. The drive signal selection information transmission unit 409 transmits drive signal selection information to the drive signal selection unit 412 through serial communication 1.
[0027] Based on the control signal transmitted from the drive signal control unit 408, the drive signal generation unit 411 outputs a plurality of drive signals to the drive signal selection unit 412. Based on the drive signal selection information transmitted from the drive signal selection information transmission unit 409, the drive signal selection unit 412 selects a drive signal for driving the nozzles from the plurality of drive signals input from the drive signal generation unit 411, and inputs it to the piezoelectric element 301 corresponding to the nozzles within the head unit 100. When a voltage of the drive signal waveform is applied to the electrodes of the piezoelectric element 301, the piezoelectric element 301 between the electrodes is displaced, and ink is ejected from the nozzles using the ejection energy generated thereby.
[0028] The serial communication 1 between the drive signal selection information transmission unit 409 and the drive signal selection unit 412 is composed of a clock signal (clk), a data signal (data), and a latch signal (latch). Information is carried on the data signal and transmitted in synchronization with the clock signal, and information is transmitted in units of the latch signal.
[0029] The serial communication 2 between the drive signal selection information transmission unit 409 and the drive signal selection unit 412 is used to set various setting information for the operation of the drive signal selection unit 412 with respect to the internal setting register 508 (see FIG. 12) of the drive signal selection unit 412. Although a communication protocol such as SPI (Serial Peripheral Interface), which is generally widely known, is used, the communication method is not limited to this.
[0030] The recording head 101 is composed of nozzles having a mechanism for ejecting ink and piezoelectric elements 301 corresponding to the nozzles, and ejects ink by inputting a drive signal to the piezoelectric elements 301 corresponding to the nozzles. Here, the recording head 101 is assumed to be composed of 128 nozzles and piezoelectric elements 301 corresponding to the nozzles. Note that the number of nozzles is an example and is not limited thereto.
[0031] FIG. 11 is a diagram showing details of the processing content of the image processing unit 406 in FIG. 10. The image processing input unit 421 captures print data and outputs it to the image generation unit 422. The image generation unit 422 uses the print data to convert it into CMYK data with a resolution recordable by the recording head 101 and outputs it. The output gradation correction processing unit 423 performs correction processing corresponding to the output characteristics of the ink.
[0032] The quantization processing unit 424 performs processing to convert data with gradations from 8 bits to 16 bits into gradations that can be represented by the nozzles of the recording head 101. Generally, it is N-valued using the error diffusion method or the dither method and converted into image data with gradations from 1 bit to 4 bits. The landing position deviation correction processing unit 425 performs data shifting in pixel units so as to correct the landing position deviation for each nozzle in units of the image resolution. The image processing output unit 426 performs processing to output the processed image result.
[0033] <Explanation of the drive signal selection unit> The drive signal selection unit 412 will be described with reference to FIG. 12. The data transmitted from the drive signal selection information transmission unit 409 through serial communication 1 (clk / data / latch) is received by the serial-parallel conversion unit 506 and held in the data latch 507 starting from the input timing of the latch signal. The held drive signal selection information is input to the decoder 550.
[0034] Also, the drive signal generation unit 411 is composed of a plurality of digital-to-analog conversion units 512 and a plurality of drive signal generation circuits 513. The digital-to-analog conversion unit 512 receives a control signal from the drive signal control unit 408. The drive signal generation circuit 513 that receives the output analog signal of the digital-to-analog conversion unit generates a drive signal.
[0035] The generated drive signal is input through the head substrate 206 and the flexible electrical wiring substrate 202 into the switch group 510 in the drive signal selection unit 412 mounted on the flexible electrical wiring substrate 202. The switch group 510 is composed of a plurality of analog switches SWx-y (where x corresponds to the nozzle number and y corresponds to the drive signal number; hereinafter referred to as switches), and selects a drive signal from among the plurality of drive signals based on the decoding information (switch control signal) of the decoder 550 to drive the piezoelectric element 301 corresponding to the nozzle.
[0036] The drive signal generation unit 411 is a generation unit that generates a plurality of drive signals corresponding to a plurality of drive patterns of the piezoelectric element 301. The plurality of drive patterns are, for example, large ink droplet size, small ink droplet size, no ink droplet ejection, and the like. The drive signal selection information transmission unit 409 is a specifying unit that specifies a drive signal for driving the piezoelectric element 301 from among the plurality of drive signals generated by the drive signal generation unit 411. The drive signal selection unit 412 is a switch unit that outputs the drive signal specified by the drive signal selection information transmission unit 409 to the piezoelectric element 301 from among the plurality of input drive signals.
[0037] The recording head 101 consists of, for example, 128 nozzles and piezoelectric elements 301 corresponding to each nozzle, and the decoder 550 and the switch group 510 exist in the same number as the number of nozzles.
[0038] <Explanation of Serial Communication 1> FIG. 13 shows the content of Serial Communication 1 output from the drive signal selection information transmission unit 409. The data signal is transmitted in synchronization with the clock signal, and the latch signal indicates the end of one transmission.
[0039] The data signal does not have to be single. The number may be increased in balance with the frequency of the clock signal so as to match the ejection frequency of the ink. Here, it is assumed that the data for one column, that is, the data corresponding to the number of nozzles × drive signal selection information, can be transmitted between the latch signals. For example, when there are four types of drive signals and the number of nozzles is 128, data for 128×2 bits (selection of four types) is transmitted. When there is a residual vibration detection switch described later, since there are four types + one residual vibration detection = five states, data for 128×3 bits (selection of five states) is transmitted.
[0040] <Drive Signal Selection Unit Timing Chart> Figure 14 shows the relationship between the data of serial communication 1 and the drive signal. Between the latch signals - latch signals, the drive signal selection information for one column (for all the nozzles) is transferred, and the received data is held in the data latch 507 of FIG. 12 starting from the latch signal. Based on the held data, the four input drive signals are selected for each nozzle and applied to the piezoelectric element 301 corresponding to the nozzle. For the four drive signal generation circuits 513, drive signals capable of realizing desired ink droplet states such as large ink droplet size, small ink droplet size, no ink droplet ejection, etc. are assigned and used.
[0041] <Explanation of Drive Signal Generation Circuit> Figure 15 is a diagram for explaining the drive signal generation circuit 513 that generates the drive signal. The drive signal generation circuit 513 is a so-called amplifier circuit that amplifies the voltage and current of the analog signal 608 supplied to the non-inverting input terminal of the operational amplifier 607.
[0042] The drive signal generation circuit 513 is composed of transistors 601 and 602 which are Darlington-connected on the high side, transistors 603 and 604 which are Darlington-connected on the low side, and an operational amplifier 607. Transistors 601 and 602 are npn transistors, and transistors 603 and 604 are pnp transistors. The base terminals of transistors 602 and 604 are connected to the output terminal of the operational amplifier 607 via diodes, and the emitter terminals of transistors 601 and 603 are connected to the piezoelectric element 301 via a switch SWx-n (not shown). References 605 and 606 indicate the power supply voltage.
[0043] In the above configuration, when an analog signal 608 is input to the drive signal generation circuit 513, the voltage of the analog signal 608 is amplified in the operational amplifier 607. Next, the current is amplified by transistors 601, 602, and transistors 603, 604. The piezoelectric element 301 is driven by the drive signal 610 which is amplified in both voltage and current, and the ink is ejected.
[0044] <Description of the residual vibration detection circuit> Among the switches SWx-y included in the switch group 510 of FIG. 12, the switches from SWx-0 to SWx-n are switches for applying a drive signal to the piezoelectric element 301 corresponding to the nozzle. On the other hand, the switch SWx-z is a switch for supplying the residual vibration voltage generated in the piezoelectric element 301 due to the residual vibration after the piezoelectric element 301 is driven to the residual vibration detection circuit 511. The residual vibration detection circuit 511 is a detection unit that detects the residual vibration voltage resulting from the residual vibration generated in the piezoelectric element 301 after the piezoelectric element 301 is driven by a specified drive signal. The residual vibration detection circuit 511 has an amplification unit that amplifies and outputs the detected residual vibration voltage.
[0045] As shown in FIG. 16, a drive signal is applied to the piezoelectric element 301 to drive the piezoelectric element 301 (st1 section). Then, the piezoelectric element 301 is disconnected from the drive signal. Then, a vibration voltage such as Amp-in in FIG. 16 appears in the piezoelectric element 301. This is what the mechanical vibration remaining in the piezoelectric element 301 is converted into voltage by the piezoelectric effect and is called the residual vibration voltage (st2 section). By detecting and analyzing the residual vibration voltage, abnormalities in each nozzle can be detected.
[0046] Details of the residual vibration detection circuit 511 will be described with reference to FIG. 17. In FIG. 17, the residual vibration voltage Amp-in is supplied to the non-inverting input terminal V+ of the operational amplifier OPAz via the switch SWx-z and the capacitor Ca. Also, the V+ terminal of OPAz is connected to the bias voltage Vbias via the resistor Rm. On the other hand, the inverting input terminal V- of OPAz is connected to Vbias via the resistor Rb. Further, the inverting input terminal V- of OPAz is connected to the output terminal of the operational amplifier OPAz via the resistor Ra.
[0047] In the above circuit, the residual vibration voltage Amp-in is amplified to become the residual vibration detection voltage Vz. The residual vibration detection voltage Vz is represented by Equation (1).
Equation
[0048] The residual vibration detection voltage Vz is sent out to the outside of the residual vibration detection circuit 511. Then, the residual vibration detection voltage Vz is converted into a digital signal by an analog-to-digital conversion device and analyzed by a logic operation element (not shown).
[0049] Hereinafter, the decoder 550 of this embodiment will be specifically described. The decoder 550 has an EN signal An input section for the number is provided. Here, the EN signal is a signal for controlling the output of the decoder 550. In this embodiment, when the EN signal input to the EN signal input section is at the H level, all output signals of the decoder 550 are configured to be at the L level. It is assumed that the H level of the signal level corresponds to the logical value 1 and the L level of the signal level corresponds to the logical value 0. By inputting a latch signal as the EN signal to the EN signal input section, when the latch signal is at the H level, all output signals become at the L level, and all switches SWm-0 to SWm-z connected to the subsequent stage are turned off. Thereby, simultaneous ON of the switches is suppressed.
[0050] FIG. 1 shows the decoder 550, the serial-parallel conversion section 506, the data latch 507, and the switch group 510 of this embodiment. The serial-parallel conversion section 506 converts the drive signal selection information from a serial signal to a parallel signal and supplies it to the data latch 507. The data latch 507 temporarily holds the input drive signal selection information, and simultaneously sends the drive signal selection information to the decoder 550 when the latch signal supplied to the data latch 507 rises.
[0051] FIG. 2 shows the internal circuit of the decoder 550. In this embodiment, it is assumed that the drive signal selection information is input to the decoder 550 as 4-bit data, and is represented by the combination (A, B, C, D) of the signals of each bit input to the input terminals A, B, C, and D of the decoder 550. The drive signal selection information (A, B, C, D) is information indicating which of the drive signals 0 to n output from the drive signal generation unit 411 is to drive the piezoelectric element 301 of the head unit 100, and is determined based on the image data (drawing data). For example, assume that there are three types of drive signals: drive signal 0 (large ink droplet size), drive signal 1 (small ink droplet size), and drive signal 2 (no ink droplet ejection). In this case, the drive signal selection information (A, B, C, D) is, for example, (0, 0, 0, 0) corresponding to drive signal 0, (0, 0, 0, 1) corresponding to drive signal 1, or (0, 0, 1, 0) corresponding to drive signal 2. For example, when the image data of nozzle 0 is data to be drawn with a large ink droplet size, drive signal selection information (A, B, C, D) = (0, 0, 0, 0) is input to the decoder 550 corresponding to nozzle m. In FIG. 2, the decoder 550 is the decoder 550 corresponding to nozzle m. m is the nozzle number. In this embodiment, it is assumed that there are 128 nozzles, and the nozzle numbers take values of m = 0 to 127. The decoder 550 outputs switch control signals Cm-0 to Cm-z that turn on the switch SWm-0 and turn off the other switches SWm-1 to SWm-z in order to input drive signal 0 to the piezoelectric element 301 of nozzle m.
[0052] The drive signal selection information (A, B, C, D) input to the decoder 550 is partly input to the AND circuits ADm-1 to ADm-z provided in the output stage of the decoder 550 via the inverter circuits 20 to 23, and partly without passing through the inverter circuits 20 to 23. The switch control signals Cm-0 to Cm-z of the switches SWm-0 to SWm-z are output from the AND circuits ADm-0 to ADm-z. The following signals are input to the AND circuit ADm-j that outputs the switch control signal Cm-j to the switch SWm-j corresponding to the drive signal j (j = 1 to n). That is, the signals corresponding to the bits with a value of 0 among the drive signal selection information (A, B, C, D) corresponding to the drive signal j are input via the inverter circuits 20 to 23. Also, the signals corresponding to the bits with a value of 1 among the drive signal selection information (A, B, C, D) corresponding to the drive signal j are input without passing through the inverter circuits 20 to 23.
[0053] Also, as described above, a latch signal is supplied as the EN signal to the EN signal input section of the decoder 550. The EN signal is input to the AND circuits ADm-1 to ADm-z via the inverter circuit 24.
[0054] For example, the following signals are input to the AND circuit ADm-1 that outputs the switch control signal Cm-1 to the switch SWm-1 corresponding to the drive signal 1 (small ink droplet size). That is, the drive signal selection information (A, B, C, D) = (0, 0, 0, 1 ) corresponding to the drive signal 1, the signals A, B, C corresponding to the bits with a value of 0 are input to the AND circuit ADm-1 via the inverter circuits 20, 21, 22. The signal D corresponding to the bit with a value of 1 is input to the AND circuit ADm-1 as it is without passing through the inverter circuit.
[0055] That is, when the drive signal selection information input to the decoder 550 is (A, B, C, D), (A’, B’, C’, D) is input to the AND circuit ADm-1. Here, “’” indicates a value converted by the inverter circuit.
[0056] On one hand, for another AND circuit, for example, the AND circuit ADm-2 that outputs the switch control signal Cm-2 to the switch SWm-2 corresponding to the drive signal 2 (ink droplet non-ejection), signals are input as follows. That is, among the drive signal selection information (A, B, C, D) = (0, 0, 1, 0) corresponding to the drive signal 2, the signals A, B, D corresponding to the bits with value 0 are input to the AND circuit ADm-2 via the inverter circuits 20, 21, 23. The signal C corresponding to the bit with value 1 is input to the AND circuit ADm-2 as it is without passing through the inverter circuit.
[0057] That is, when the drive signal selection information input to the decoder 550 is (A, B, C, D), (A’, B’, C, D’) is input to the AND circuit ADm-2.
[0058] Hereinafter, the data (in the above example, (A’, B’, C’, D) or (A’, B’, C, D’)) in which part or all of the drive signal selection information is converted by the inverter circuit and input to the AND circuit is called the drive signal selection information conversion value.
[0059] For example, when the input image data is the image data for which ink droplets of a small size should be ejected (drive signal 1) from the nozzle m, the drive signal selection information (A, B, C, D) = (0, 0, 0, 1) is input to the decoder 550 corresponding to the nozzle m. At this time, the drive signal selection information conversion value (A’, B’, C’, D) = (1, 1, 1, 1) is input to the AND circuit ADm-1. On the other hand, the drive signal selection information conversion value (A’, B’, C, D’) = (1, 1, 0, 0) is input to the AND circuit ADm-2.
[0060] Also, when the input image data is the image data for which no ink droplets should be ejected (drive signal 2) from the nozzle m, the drive signal selection information (A, B, C, D) = (0, 0, 1, 0) is input to the decoder 550 corresponding to the nozzle m. Therefore, the drive signal selection information conversion value (A’, B’, C’, D) = (1, 1, 0, 0) is input to the AND circuit ADm-1. On the other hand, the drive signal selection information conversion value (A’, B’, C, D’) = (1, 1, 1, 1) is input to the AND circuit ADm-2.
[0061] That is, in the decoder 550 configured as described above, the drive signal selection information conversion value input to the AND circuit corresponding to the switch corresponding to the drive signal corresponding to the drive signal selection information becomes (1, 1, 1, 1). The drive signal selection information conversion values input to the AND circuits corresponding to the other switches include 0. Therefore, the outputs of those AND circuits become the L level. Thus, except for the switch control signal of the switch corresponding to the drive signal corresponding to the drive signal selection information, the level becomes the L level.
[0062] Furthermore, during the period when the latch signal input to the decoder 550 is at the H level, the H-level EN signal is converted to the L level by the inverter circuit 24 and input to the AND circuits ADm-0 to ADm-z. On the other hand, during the period when the latch signal input to the decoder 550 is at the L level, the L-level EN signal is converted to the H level by the inverter circuit 24 and input to the AND circuits ADm-0 to ADm-z. Hereinafter, the EN signal converted by the inverter circuit 24 is referred to as the EN signal conversion value EN'.
[0063] That is, the drive signal selection information conversion value and the EN signal conversion value are input to the AND circuits ADm-0 to ADm-z.
[0064] For example, when the drive signal selection information (A, B, C, D) = (0, 0, 0, 1) determined based on the input image data, during the period when the latch signal is at the H level, (A’, B’, C’, D, EN’) = (1, 1, 1, 1, 0) is input to the AND circuit ADm-1. Thus, the output of the AND circuit ADm-1 becomes the L level (logical value 0) through the logical product operation. During the period when the latch signal is at the L level, (A’, B’, C’, D, EN’) = (1, 1, 1, 1, 1) is input. Thus, the output of the AND circuit ADm-1 becomes the H level (logical value 1) through the logical product operation. During the period when the latch signal is at the H level, (A’, B’, C, D’, EN’) = (1, 1, 0, 0, 0) is input to the AND circuit ADm-2. Thus, the output of the AND circuit ADm-2 becomes the L level (logical value 0) through the logical product operation. During the period when the latch signal is at the L level, (A’, B’, C, D’, EN’) = (1, 1, 0, 0, 1) is input. Thus, the output of the AND circuit ADm-2 becomes the L level (logical value 0) through the logical product operation.
[0065] In this way, when the image data for driving the nozzle m by the drive signal 1 is input, the switch control signal for turning on the switch is input only to the switch SWm-1 corresponding to the drive signal 1 and only during the period when the latch signal is at the L level.
[0066] Also, when the drive signal selection information (A, B, C, D) = (0, 0, 1, 0), during the period when the latch signal is at the H level, (A’, B’, C’, D, EN’) = (1, 1, 0, 0, 0) is input to the AND circuit ADm-1. Therefore, the output of the AND circuit ADm-1 becomes the L level (logical value 0) through the logical product operation. During the period when the latch signal is at the L level, (A’, B’, C’, D, EN’) = (1, 1, 0, 0, 1) is input. Therefore, the output of the AND circuit ADm-1 becomes the L level (logical value 0) through the logical product operation. To the AND circuit ADm-2, during the period when the latch signal is at the H level, (A’, B’, C, D’, EN’) = (1, 1, 1, 1, 0) is input. Therefore, the output of the AND circuit ADm-2 becomes the L level (logical value 0) through the logical product operation. During the period when the latch signal is at the L level, (A’, B’, C, D’, EN’) = (1, 1, 1, 1, 1) is input. Therefore, the output of the AND circuit ADm-2 becomes the H level (logical value 1) through the logical product operation.
[0067] Thus, when the image data for driving the nozzle m by the drive signal 2 is input, the switch control signal for turning on the switch is input only to the switch SWm-2 corresponding to the drive signal 2 and only during the period when the latch signal is at the L level.
[0068] FIG. 3 shows, as an example, the operations of the latch signal and switches SWm-0 and SWm-1. Here, it shows a case where image data for discharging a large ink droplet size (drive signal 0) from nozzle m is followed by image data for discharging a small ink droplet size (drive signal 1) from nozzle m. That is, it is a situation where the switch SWm-0 to which the drive signal 0 is input switches from the ON state to the ON state of the switch SWm-1 to which the drive signal 1 is input. In the configuration of the decoder 550 described above, simultaneously with the rising of the latch signal (time t0), drive signal selection information (A, B, C, D) = (0, 0, 0, 1) corresponding to the drive signal 1 is sent to the decoder 550. As a result, the signal levels of the input terminals of the AND circuits ADm-0 to ADm-z are appropriately switched. At this time, since the latch signal is at the H level, the output of the inverter circuit 24 becomes the L level, and the switch control signals Cm-0 to Cm-z output by the AND circuits ADm-0 to ADm-z all become the L level (OFF) (from time t0 to t1). That is, the control signals of the switches SWm-0 and SWm-1 become the L level (OFF) regardless of the drive signal selection information (A, B, C, D) during the period from time t0 to t1.
[0069] Thereafter, when the latch signal falls at time t1, only the output of the AND circuit ADm- 1 becomes 1, and based on the drive signal selection information (A, B, C, D) = (0, 0, 0, 1), the switch control signal Cm-1 of the switch SWm-1 becomes the H level (ON). Here, the switch control signal Cm-0 (L level, OFF) for turning off the switch SWm-0 is input to the ON switch SWm-0 at time t0, and the delay time Δt1 until the state of the switch SWm-0 actually becomes OFF is defined. The delay time Δt1 is shorter than the predetermined period (t0 to t1) during which the latch signal becomes the H level. Therefore, it is possible to suppress both switches from being in the ON state simultaneously during the period (t0 to t1) including the switching timing of the switch control signal.
[0070] Thus, in this embodiment, the switch control signals (Cm-0 and Cm-1 in FIG. 3) output from the decoder 550 themselves become L level (OFF) during the period (t0 to t1 in FIG. 3) when the latch signal becomes H level, regardless of the drive signal selection information (A, B, C, D in FIG. 3). Specifically, during a predetermined period (A, B, C, D in FIG. 3) including the switching timing of the drive signal selection information (A, B, C, D in FIG. 3) defined by the timing signal (latch signal in FIG. 3), the switch control signals (Cm-0 and Cm-1 in FIG. 3) become L level. Therefore, even if the switch control signal output from the decoder 550 is directly input to the switch group 510, it is possible to suppress the simultaneous ON state at the time of switching of the drive signal. Therefore, it is not necessary to arrange a simultaneous ON prevention circuit as shown in FIG. 20 before inputting the switch control signal output from the decoder 550 to the switch group 510, and a simple circuit configuration can be achieved. Therefore, according to this embodiment, it is possible to suppress the simultaneous ON of the analog switches with a simple configuration and suppress the malfunction and failure of the recording apparatus.
[0071] In this embodiment, the drive signal generation unit 411 having the drive signal generation circuits 0 to n outputs drive signals 0 to n for driving the piezoelectric element 301. The drive signals 0 to n are signals corresponding to the size of the liquid droplets ejected from the nozzles of the ejection head. Further, the drive signals 0 to n are signals corresponding to whether or not to eject the liquid from the nozzles of the ejection head. In the above example, the drive signal 0 is a signal corresponding to a large droplet size, the drive signal 1 is a signal corresponding to a small droplet size, and the drive signal 2 is a signal corresponding to non-ejection of the liquid.
[0072] If any of the drive signals 0 to n, for example, the drive signal 0 is used as the first drive signal, the drive signal generation circuit 0 that outputs the drive signal 0 is the first output means. Also, if the drive signal 1 is used as the second drive signal, the drive signal generation circuit 1 that outputs the drive signal 1 is the second output means.
[0073] The switch group 510 is switch means capable of switching the input of drive signals 0 to n output from the drive signal generation unit 411 to the piezoelectric element 301 between on and off. The switch group 510 is provided for each nozzle (for each piezoelectric element 301), and switches SWm-0 to SWm-n are provided for each drive signal in each switch group 510. Here, if there are 128 nozzles and 3 types of drive signals, then m = 0 to 127 and n = 2.
[0074] For example, if drive signal 0 is taken as the first drive signal, the switch SWm-0 (m = 0 to 127) that switches the input of drive signal 0 to the piezoelectric element 301 is the first switch means. Also, if drive signal 1 is taken as the second drive signal, the switch SWm-1 (m = 0 to 127) that switches the input of drive signal 1 to the piezoelectric element 301 is the second switch means. Further, each switch group 510 includes a switch SWm-z connected to the residual vibration detection circuit.
[0075] The drive signal selection information is selection information generated by the recording control unit 407 based on the image data, indicating which of the drive signals 0 to n is to be input to the piezoelectric element 301. The drive signal selection information transmission unit 409 is selection output means for outputting this drive signal selection information to the drive signal selection unit 412.
[0076] The decoder 550 is control output means for outputting a switch control signal to each of the switches SWm-0 to SWm-z based on the drive signal selection information input from the drive signal selection information transmission unit 409 and a timing signal that defines the switching timing of the selection information. The decoder 550 is provided for each nozzle (for each piezoelectric element 301). The m-th decoder 550 outputs switch control signals Cm-0 to Cm-z for controlling the on / off states of the switches SWm-0 to SWm-z connected to the m-th nozzle m.
[0077] The switch control signals Cm-0 to Cm-z are signals for controlling the on and off of the switches SWm-0 to SWm-z, and the on or off state of the switches SWm-0 to SWm-z is switched according to the input switch control signals Cm-0 to Cm-z.
[0078] In this embodiment, the timing signal is a latch signal. As shown in FIG. 3, the latch signal changes from a first level (L level, logical value 0) to a second level different from the first level (H level, logical value 1) at the front edge (time t0), and changes from the second level to the first level at the rear edge (time t1). It is a pulse signal.
[0079] Among the switch control signals Cm-0 to Cm-z, the control signal for turning off SWm-0 to SWm-z is a signal of the first level (L level, logical value 0), and the control signal for turning on is a signal of the second level (H level, logical value 1).
[0080] The drive signal selection information transmission unit 409 outputs, as drive signal selection information, a signal that becomes the second level (H level, logical value 1) when the drive signals 0 to n are input to the piezoelectric element 301. For example, when drive signal 0 is the first drive signal, a first selection signal that becomes the second level (H level, logical value 1) when drive signal 0 is input to the piezoelectric element 301 is output ((A, B, C, D) = (0, 0, 0, 0) described later). Also, when drive signal 1 is the second drive signal, a second selection signal that becomes the second level (H level, logical value 1) when drive signal 1 is input to the piezoelectric element 301 is output ((A, B, C, D) = (0, 0, 0, 1) described later).
[0081] This embodiment is characterized by the configuration of the decoder 550. That is, the switch control signals Cm-0 to Cm-z output by the decoder 550 are at the L level (logical value 0) in a predetermined period including the switching timing of the drive information defined by the latch signal which is the timing signal. That is, in the predetermined period, the switch control signals Cm-0 to Cm-z are control signals for turning off SWm-0 to SWm-z. The predetermined period includes the period from the timing of the front edge of the latch signal (time t0 in FIG. 3) to the timing of the rear edge (time t1 in FIG. 3).
[0082] The specified period (t0 to t1) is longer than the delay time from when a control signal (L level, logical value 0) for turning off SWm-0 to SWm-z is input to SWm-0 to SWm-z that are in the on state until SWm-0 to SWm-z become in the off state.
[0083] The AND circuits ADm-0 to ADm-z are logical product circuits that always output a signal of the first level when there is a signal of the first level (L level, logical value 0) among a plurality of input signals. For example, when the drive signal 0 is the first drive signal, the AND circuit ADm-0 is the first logical product circuit to which a signal obtained by inverting the first selection signal (for example, (A, B, C, D) = (0, 0, 0, 0)) and the timing signal (latch signal) is input. Then, the output signal of the AND circuit ADm-0, which is the first logical product circuit, becomes the switch control signal Cm-0 output to SWm-0, which is the first switch means. Also, when the drive signal 1 is the second drive signal, the AND circuit ADm-1 is the second logical product circuit to which a signal obtained by inverting the second selection signal (for example, (A, B, C, D) = (0, 0, 0, 1)) and the timing signal (latch signal) is input. Then, the output signal of the AND circuit ADm-1, which is the second logical product circuit, becomes the switch control signal Cm-1 output to SWm -1.
[0084] The disclosure of this embodiment includes the following configurations. (Configuration 1) A recording apparatus comprising a piezoelectric element and a recording head that discharges a liquid by driving the piezoelectric element, and performing recording with the liquid discharged from the recording head, First output means for outputting a first drive signal for driving the piezoelectric element, Second output means for outputting a second drive signal for driving the piezoelectric element, First switch means capable of switching the input of the first drive signal output from the first output means to the piezoelectric element between on and off, Second switch means capable of switching the input of the second drive signal output from the second output means to the piezoelectric element between on and off, Selection output means for outputting selection information indicating which of the first drive signal and the second drive signal is to be input to the piezoelectric element based on the image data; Control output means for outputting a switch control signal for controlling on and off of the first switch means and the second switch means based on the selection information input from the selection output means and a timing signal defining a switching timing of the selection information to the first switch means and the second switch means; having; The recording apparatus, wherein the switch control signal output by the control output means is a control signal for turning off the first switch means and the second switch means in a predetermined period including the switching timing defined by the timing signal. (Configuration 2) The timing signal is a pulse signal, The recording apparatus according to Configuration 1, wherein the predetermined period includes a period from a timing of a front edge of the pulse signal to a timing of a rear edge thereof. (Configuration 3) The timing signal is a pulse signal that changes from a first level (L) to a second level (H) different from the first level at a front edge and changes from the second level to the first level at a rear edge, In the switch control signal, The control signal for turning off the first switch means and the second switch means is a signal of the first level, The control signal for turning on the first switch means and the second switch means is a signal of the second level, The control output means includes A first logical product circuit that always outputs a signal of the first level when there is a signal of the first level among a plurality of input signals; A second logical product circuit that always outputs a signal of the first level when there is a signal of the first level among a plurality of input signals; having; A signal obtained by inverting the timing signal is input to the first logical product circuit and the second logical product circuit, The control output means outputs the output signal of the first AND circuit to the first switching means, and outputs the output signal of the second AND circuit to the second switching means. The recording apparatus according to Configuration 1 or 2. (Configuration 4) The selection output means outputs, as the selection information, a first selection signal that becomes the second level when the first drive signal is input to the piezoelectric element, and a second selection signal that becomes the second level when the second drive signal is input to the piezoelectric element, and in the control output means, a signal obtained by inverting the first selection signal and the timing signal is input to the first AND circuit, and a signal obtained by inverting the second selection signal and the timing signal is input to the second AND circuit. The recording apparatus according to Configuration 3. (Configuration 5) The first drive signal and the second drive signal are signals corresponding to the size of the liquid droplets ejected from the recording head. The recording apparatus according to any one of Configurations 1 to 4. (Configuration 6) The first drive signal and the second drive signal are signals corresponding to whether or not to eject the liquid from the recording head. The recording apparatus according to any one of Configurations 1 to 4. (Configuration 7) The predetermined period is longer than the delay time from when a switch control signal for turning off the first switching means is input to the first switching means in an on state until the first switching means becomes off. The recording apparatus according to any one of Configurations 1 to 6. (Configuration 8) The predetermined period is longer than the delay time from when a switch control signal for turning off the second switching means is input to the second switching means in an on state until the second switching means becomes off. The recording apparatus according to any one of Configurations 1 to 6.
Explanation of Signs
[0085] 1: Recording device, 101: Recording head, 301: Piezoelectric element, 409: Driving signal selection information transmission unit, 411: Driving signal generation unit, 510: Switch group, 550: Decoder
Claims
1. A recording apparatus comprising a piezoelectric element and a recording head that discharges a liquid by driving the piezoelectric element, and performing recording with the liquid discharged from the recording head, a first output means for outputting a first drive signal for driving the piezoelectric element; a second output means for outputting a second drive signal for driving the piezoelectric element; a first switch means capable of switching the input of the first drive signal output from the first output means to the piezoelectric element between on and off; a second switch means capable of switching the input of the second drive signal output from the second output means to the piezoelectric element between on and off; a selection output means for outputting selection information indicating which of the first drive signal and the second drive signal is to be input to the piezoelectric element based on image data; a control output means for outputting a switch control signal for controlling on and off of the first switch means and the second switch means based on the selection information input from the selection output means and a timing signal that defines a switching timing of the selection information to the first switch means and the second switch means; characterized by the switch control signal output by the control output means being a control signal for turning off the first switch means and the second switch means during a predetermined period including the switching timing defined by the timing signal.
2. The timing signal is a pulse signal, and the recording apparatus according to claim 1, wherein the predetermined period includes a period from a timing of a front edge of the pulse signal to a timing of a rear edge thereof.
3. The timing signal is a pulse signal that changes from a first level (L) to a second level (H) different from the first level at a front edge and changes from the second level to the first level at a rear edge, and in the switch control signal, the control signal for turning off the first switch means and the second switch means is a signal of the first level, the control signal for turning on the first switch means and the second switch means is a signal of the second level, and the control output means includes a first logical product circuit that always outputs a signal of the first level when there is a signal of the first level among a plurality of input signals, and a second logical product circuit that always outputs a signal of the first level when there is a signal of the first level among a plurality of input signals. characterized by The first AND circuit and the second AND circuit are input with a signal obtained by inverting the timing signal. The control output means outputs the output signal of the first AND circuit to the first switching means, The recording apparatus according to claim 1 or 2, which outputs the output signal of the second AND circuit to the second switching means.
4. The selection output means, as the selection information, a first selection signal that becomes the second level when the first drive signal is input to the piezoelectric element, and a second selection signal that becomes the second level when the second drive signal is input to the piezoelectric element and outputs, In the control output means, the first AND circuit is input with the first selection signal and a signal obtained by inverting the timing signal, The recording apparatus according to claim 3, wherein the second AND circuit is input with the second selection signal and a signal obtained by inverting the timing signal.
5. The first drive signal and the second drive signal are signals corresponding to the size of the liquid droplets ejected from the recording head, according to the recording apparatus of claim 1 or 2.
6. The first drive signal and the second drive signal are signals corresponding to whether or not to eject the liquid from the recording head, according to the recording apparatus of claim 1 or 2.
7. The predetermined period is longer than the delay time from when a switch control signal for turning off the first switching means is input to the first switching means in an on state until the first switching means becomes off, according to the recording apparatus of claim 1 or 2.
8. The predetermined period is longer than the delay time from when a switch control signal for turning off the second switching means is input to the second switching means in an on state until the second switching means becomes off, according to the recording apparatus of claim 1 or 2.
Citation Information
Patent Citations
Liquid discharge device and drive waveform control method of liquid discharge head
JP2020142490A