Semiconductor device

Abstract

To provide a transistor having excellent electric characteristics, small current at non-conduction, and large current at conduction, and a semiconductor device including this transistor, having a high degree of integration, and being tough.SOLUTION: A transistor includes an insulator 102, semiconductors 106a and 106b, conductors 116a and 116b including a region in contact with the semiconductor 106b, a semiconductor 106c existing on the conductor 102 and on the semiconductor 106b and including a region in contact with an upper surface and a side surface of the semiconductor 106b and a side surface of the semiconductor 106a, an insulator 112 on the insulator 102, the semiconductor 106c, and the conductors 116 and 116b, a conductor 104 existing on the insulator 112 and including a region overlapping with the semiconductors 106a to 106c, and an insulator 108 on the insulator 102, the conductor 116a, the conductor 116b, and the conductor 104. The semiconductor 106b includes 124a and 124b in regions overlapping with the conductors 116a and 116b, respectively.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an article, a method, or a manufacturing method. Or, the present invention relates to a process, a machine , a manufacture, or a composition of matter. In particular, the present invention relates to, for example, a semiconductor, a semiconductor device, a display device, a light-emitting device, a lighting device, a power storage device, a memory device, or a processor. Or, the present invention relates to a method for manufacturing a semiconductor, a semiconductor device, a display device, a light-emitting device, a lighting device, a power storage device, a memory device, or a processor. Or, the present invention relates to a method for driving a semiconductor device, a display device, a light-emitting device, a lighting device, a power storage device, a memory device, or a processor.

[0002] Note that, in this specification and the like, the semiconductor device generally refers to any device that can function by utilizing semiconductor characteristics. A display device, a light-emitting device, a lighting device, an electro-optical device, a semiconductor circuit, and an electronic device may have a semiconductor device.

Background Art

[0003] Techniques for forming transistors using semiconductors on substrates having insulating surfaces have been attracting attention. Such transistors are widely applied to semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor applicable to transistors.

[0004] Silicon used for the semiconductors of transistors is properly selected depending on the application, such as amorphous silicon, polycrystalline silicon, and single-crystalline silicon. For example, when applied to transistors constituting a large display device, it is preferable to use amorphous silicon for which film formation technology on a large-area substrate has been established. On the other hand, high-performance wherein a drive circuit and a pixel circuit are formed on the same substrate ​When applying to a transistor constituting an energy display device, it is preferable to use polycrystalline silicon capable of fabricating a transistor having a high field-effect mobility. Also, when applying to a transistor constituting an integrated circuit or the like, it is preferable to use single-crystalline silicon having an even higher field-effect mobility. Polycrystalline silicon is known to be formed by performing heat treatment at a high temperature on amorphous silicon or laser light treatment. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. When applying to a transistor constituting an integrated circuit or the like, it is preferable to use single-crystalline silicon having an even higher field-effect mobility. Polycrystalline silicon is known to be formed by performing heat treatment at a high temperature on amorphous silicon or laser light treatment. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed.

[0005] In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed. In recent years, oxide semiconductors have attracted attention. Since an oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for the semiconductor of a transistor constituting a large-sized display device. Also, a transistor using an oxide semiconductor has a high field-effect mobility, so that a high-performance display device in which a drive circuit and a pixel circuit are formed on the same substrate can be realized. Further, since it is possible to improve and use a part of the production equipment of a transistor using amorphous silicon, there is also an advantage that equipment investment can be suppressed.

[0006] By the way, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conductive state. For example, a low-power CPU or the like applying the leakage characteristics of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Thus, when applying a transistor using an oxide semiconductor to an integrated circuit such as a CPU, it is preferable to reduce the size of the transistor and increase the degree of integration. By the way, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conductive state. For example, a low-power CPU or the like applying the leakage characteristics of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Thus, when applying a transistor using an oxide semiconductor to an integrated circuit such as a CPU, it is preferable to reduce the size of the transistor and increase the degree of integration. By the way, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conductive state. For example, a low-power CPU or the like applying the leakage characteristics of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Thus, when applying a transistor using an oxide semiconductor to an integrated circuit such as a CPU, it is preferable to reduce the size of the transistor and increase the degree of integration. By the way, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conductive state. For example, a low-power CPU or the like applying the leakage characteristics of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Thus, when applying a transistor using an oxide semiconductor to an integrated circuit such as a CPU, it is preferable to reduce the size of the transistor and increase the degree of integration. By the way, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conductive state. For example, a low-power CPU or the like applying the leakage characteristics of a transistor using an oxide semiconductor is disclosed (see Patent Document 1). Thus, when applying a transistor using an oxide semiconductor to an integrated circuit such as a CPU, it is preferable to reduce the size of the transistor and increase the degree of integration.

[0007] As a semiconductor device advances in high integration, the influence of parasitic capacitance formed due to overlapping of wirings, electrodes, etc. may become impossible to ignore. In Patent Document 2, from a conductor electrode to a semiconductor As a semiconductor device advances in high integration, the influence of parasitic capacitance formed due to overlapping of wirings, electrodes, etc. may become impossible to ignore. In Patent Document 2, from a conductor electrode to a semiconductor By allowing electrons to flow into the body, a transistor having excellent electrical characteristics can be obtained even when an offset region is provided. It is disclosed that a transistor can be obtained. By using the technique disclosed in Patent Document 2, it is possible to reduce the parasitic capacitance formed due to the overlap of wirings, electrodes, etc. It can be done.

[0008] Also, by configuring a well-type potential in an active layer made of a semiconductor, it is disclosed that a transistor having high field-effect mobility can be obtained (see Patent Document 3).

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0010] One of the problems is to provide a transistor having excellent electrical characteristics. Or, one of the problems is to provide a transistor having a small current in the non-conducting state. Or, one of the problems is to provide a transistor having a large current in the conducting state. Or, one of the problems is to provide a semiconductor device having such a transistor. Or, one of the problems is to provide a highly integrated semiconductor device. Or, one of the problems is to provide a robust semiconductor device. Or, one of the problems is to provide a novel semiconductor device.

[0011] ​​​Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Note that other problems will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc.

Means for Solving the Problems

[0012] (1) One aspect of the present invention is a semiconductor device having a semiconductor, an insulator, a first conductor, and a second conductor, wherein the upper surface of the semiconductor has a region in contact with the insulator, the side surface of the semiconductor has a region in contact with the insulator, the first conductor has a first region where the first conductor and the semiconductor overlap each other via the insulator, the first region has a region facing the upper surface of the semiconductor and a region facing the side surface of the semiconductor, the second conductor has a second region in contact with the semiconductor, and the first region and the second

[0013] (2) One aspect of the present invention is a semiconductor device having a semiconductor, an insulator, a first conductor, a second conductor, and a third conductor, wherein the upper surface of the semiconductor has a region in contact with the insulator, the side surface of the semiconductor has a region in contact with the insulator, the first conductor has a first region where the first conductor and the semiconductor overlap each other via the insulator, the first region has a region facing the upper surface of the semiconductor and a region facing the side surface of the semiconductor, the second conductor has a second region in contact with the semiconductor, the third conductor has a third region in contact with the semiconductor, the second region and the third region have a It is a body device.

[0014] (3) One aspect of the present invention is a semiconductor device having a semiconductor, a first insulator, a second insulator, a first conductor, and a second conductor, wherein the semiconductor has a region in contact with the first insulator and a first region that does not overlap with the first conductor and the second conductor, the first conductor has a second region where the first conductor and the semiconductor overlap each other via an insulator, the second conductor has a third region in contact with the semiconductor, and the second insulator has a region in contact with the first region. It is a semiconductor device.

[0015] (4) One aspect of the present invention is the semiconductor device according to (3), wherein the relative permittivity of the second insulator is higher than that of the first insulator.

[0016] (5) One aspect of the present invention is the semiconductor device according to any one of (1) to (4), having a region where the distance between the first conductor on the semiconductor and the second conductor on the semiconductor is 30 nm or less.

[0017] (6) One aspect of the present invention is the semiconductor device according to any one of (1) to (5), wherein the semiconductor has a first layer and a second layer, and the electron affinity of the first layer and the electron affinity of the second layer are different in magnitude.

[0018] (7) One aspect of the present invention is the semiconductor device according to any one of (1) to (6), wherein the semiconductor contains indium and oxygen.

[0019] (8) One aspect of the present invention is an electronic device including a display device, a battery, or a sensor, and the semiconductor device according to any one of (1) to (7).

Advantages of the Invention

[0020] It is possible to provide a transistor with excellent electrical characteristics. Or, it is possible to provide a transistor with a small current when non-conductive. Or, it is possible to provide a transistor with a large current when conductive. Or, it is possible to provide a semiconductor device having the transistor. Or, it is possible to provide a highly integrated semiconductor device. Or, it is possible to provide a robust semiconductor device. Or, it is possible to provide a novel semiconductor device.

[0021] Note that the description of these effects does not preclude the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0022]

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Embodiments for Carrying Out the Invention

[0023] Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that its form and details can be variously changed. Also, the present invention is not construed as being limited to the description of the embodiments shown below. In describing the configuration of the invention with reference to the drawings, the same reference numerals are commonly used among different drawings. When referring to similar things, the hatch pattern is the same, and there may be cases where no reference numerals are particularly assigned. In addition, in the drawings, the size, thickness of the film (layer), or region may be exaggerated for clarity. Also, voltage often indicates the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential. In addition, in the drawings, the size, thickness of the film (layer), or region may be exaggerated for clarity. Also, voltage often indicates the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential. In addition, in the drawings, the size, thickness of the film (layer), or region may be exaggerated for clarity.

[0024] In the drawings, the size, thickness of the film (layer), or region may be exaggerated for clarity. Sometimes it is exaggerated.

[0025] Also, voltage often indicates the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential. Thus, it is possible to replace voltage with potential.

[0026] Note that the ordinal numbers attached as the first and second are used for convenience and do not indicate the process order or the stacking order. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third" and described accordingly. Also, the ordinal numbers described in this specification and , the ordinal numbers used to specify an aspect of the present invention may not match.

[0027] Note that even when referred to as "semiconductor", for example, when the conductivity is sufficiently low, it may have the characteristics of an "insulator". Also, the boundary between "semiconductor" and "insulator" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification may be rephrased as "insulator" in some cases. Similarly, the "insulator" described in this specification may be rephrased as "semiconductor" in some cases.

[0028] Also, even when referred to as "semiconductor", for example, when the conductivity is sufficiently high, it may have the characteristics of a "conductor". Also, the boundary between "semiconductor" and "conductor" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification may be rephrased as "conductor" in some cases. Similarly, the "conductor" described in this specification may be rephrased as "semiconductor" in some cases.

[0029] Note that the impurities in a semiconductor refer to, for example, components other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% is an impurity. When impurities are included, for example, DOS (Density of State) may be formed in the semiconductor, the carrier mobility may decrease, or the crystallinity may decrease. When the semiconductor is an oxide semiconductor​​​​ When it is a solid, examples of impurities that change the characteristics of the semiconductor include Group 1 elements, Group 2 elements, Group 14 elements, Group 15 elements, transition metals other than the main component, etc. In particular, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen etc. In the case of an oxide semiconductor, for example, oxygen deficiency may be formed by the incorporation of impurities such as hydrogen. Also, when the semiconductor is silicon, examples of impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 15 elements, etc., excluding oxygen and hydrogen.

[0030] In the embodiments shown below, the case where the semiconductor is an oxide semiconductor will be described, but it is not limited thereto. For example, as the semiconductor, silicon having a polycrystalline structure, a single crystal structure, etc., germanium, etc. may be used. Or, a semiconductor having strain such as strained silicon may be used. Or, as the semiconductor, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide silicon germanium, etc., applicable to HEMT may be used. By using these semiconductors, a transistor suitable for high-speed operation can be made.

[0031] In this specification, when it is described that A has a region of concentration B, for example, when the concentration in the entire depth direction in a certain region of A is B, the concentration in the depth direction in a certain region of A the average value of the concentration in the depth direction is B, the median value of the concentration in the depth direction in a certain region of A is B, the maximum value of the concentration in the depth direction in a certain region of A is B, when the concentration in the depth direction in a certain region of A is B, when the maximum value of the concentration in the depth direction in a certain region of A is B, in a certain region where A is ​​When the minimum value of the depth-direction concentration is B, the convergence of the depth-direction concentration in a region where A exists When the value is B, the concentration in the region where a probable value of A itself can be obtained by measurement is B including cases such as when there is a certain situation.

[0032] Also, in this specification, when it is described that A has a region of size B, length B, thickness B, width B, or distance B for example, when the overall size, length, thickness, width, or distance in a region where A exists is B, when the average value of the size, length, thickness, width, or distance in a region where A exists is B, when the median value of the size, length, thickness, width, or distance in a region where A exists is B, when the maximum value of the size, length, thickness, width, or distance in a region where A exists is B, when the minimum value of the size, length, thickness, width, or distance in a region where A exists is B, when the convergence value of the size, length, thickness, width, or distance in a region where A exists is B, when the size, length, thickness, width, or distance in the region where a probable value of A itself can be obtained by measurement is B, etc. are included.

[0033] <Relationship between Transistor Structure and Electrical Characteristics> Hereinafter, the relationship between the transistor structure and the electrical characteristics will be described using the calculation results in FIGS. 1 to 6 as follows.

[0034] FIG. 1(A) is an example of a top view of a transistor structure A according to one aspect of the present invention. FIG. 1( A) shows an example of a cross-sectional view corresponding to the dashed-dotted lines A1 - A2 and A3 - A4 in FIG. 1(B ). In FIG. 1(A), for ease of understanding, some parts such as insulators are omitted and shown.

[0035] ​The transistor structure A shown in FIG. 1(B) includes an insulator 102, a semiconductor 106a on the insulator 102, a semiconductor 106b on the semiconductor 106a, conductors 116a and 116b having regions in contact with the semiconductor 106b, a semiconductor 106c that is on the conductors 116a, 116b and the semiconductor 106b and has regions in contact with the upper and side surfaces of the semiconductor 106b and the side surface of the semiconductor 106a, an insulator 112 on the insulator 102 and the semiconductor 106c, a conductor 104 that is on the insulator 112 and has regions overlapping with the semiconductors 106a, 106b and 106c, and an insulator 108 on the insulator 102, the conductors 116a, 116b, the semiconductor 106c and the conductor 104. The semiconductor 106b has regions 124a and 124b that overlap with the conductors 116a and 116b, respectively. In this specification, the semiconductor, insulator, and conductor are also referred to as a semiconductor layer, an insulating layer, and a conductive layer, respectively. In the transistor structure A, the insulator 102 functions as a base insulator. Also, the insulator 112 functions as a gate insulator. Also, the conductor 104 functions as a gate electrode. Also, the conductors 116a and 116b function as a source electrode and a drain electrode. Also, the regions 124a and 124b function as a source region and a drain region. Also, a part of the semiconductor 106b functions as a channel formation region. Also, the semiconductors 106a and 106c function to separate the channel formation region included in the semiconductor 106b from the insulators 102 and 112.

[0036] ​​​​​​​​​​​​​​​​​

[0037] Also, in the transistor structure A, the width of the conductor 104 in the A1 - A2 cross - section is denoted as Lg, The region or interval between the region 124a and the region 124b is called L. Also, in the A1 - A2 cross - section the region or interval between the conductor 104 and the region 124a is called Loff1, and the region or interval between the conductor 10 4 and the region 124b is called Loff2. Also, in the A3 - A4 cross - section the width of the semiconductor 106b is called W. Also, in the A3 - A4 cross - section, the height from the bottom surface of the conductor 104 to the bottom surface of the semiconductor 106b is called h. In the semiconductor 106b, if only the region overlapping with the conductor 104 is defined as the channel - forming region, then Loff1 and Loff 2 become offset regions.

[0038] Also, FIG. 2(A) is an example of a top view of a transistor structure B according to an aspect of the present invention. An example of a cross - section corresponding to the dashed - dotted line B1 - B2 and the dashed - dotted line B3 - B4 in FIG. 2(A) is shown in FIG. 2(B). Note that in FIG. 2(A), for ease of understanding, some parts such as insulators are omitted and shown schematically.

[0039] The transistor structure B includes an insulator 102, a semiconductor 106a on the insulator 102, a semiconductor 106b on the semiconductor 10 6a, conductors 116a and 116b having regions in contact with the semiconductor 106b, on the conductor 116a, on the conductor 116b, and on the semiconductor 106b, and a semiconductor 106c having regions in contact with the upper surface and side surface of the semiconductor 106b and the side surface of the semiconductor 106a, an insulator 112 on the insulator 102, on the semiconductor 106c, on the conductor 116a, and on the conductor 116b, and on the insulator 112, and on the semiconductor 106a, semiconductor 10 6b, and an insulator 112 on the insulator 102, on the semiconductor 106c, on the conductor 116a, and on the conductor 116b, and on the insulator 112, and on the semiconductor 106a, semiconductor 10 6b, ​A conductor 104 having an overlapping region with 6b and a semiconductor 106c, on an insulator 102 , an insulator 108 on a conductor 116a, on a conductor 116b, and on a conductor 104, and has . Note that the semiconductor 106b has regions 124a and 124b in regions overlapping with the conductor 116a and the conductor 116b, respectively.

[0040] In the transistor structure B, the insulator 102 functions as a base insulator. Also, the insulator 112 functions as a gate insulator. Also, the conductor 104 functions as a gate electrode. Also, the conductors 116a and 116b function as a source electrode and a drain electrode. Also, the regions 124a and 124b function as a source region and a drain region. Also, a part of the semiconductor 106b functions as a channel formation region. Also, the semiconductors 106a and 106c function to separate the channel formation region included in the semiconductor 106b from the insulator 102 and the insulator 112.

[0041] Also, in the transistor structure B, the width of the conductor 104 in the B1 - B2 cross section is denoted as Lg, the interval between the region 124a and the region 124b is called L. Also, the region or the interval between the conductor 104 and the region 124a in the B1 - B2 cross section is denoted as Loff1, and the region or the interval between the conductor 104 and the region 124b is called Loff2. Also, the width of the semiconductor 106b in the B3 - B4 cross section is called W. Also, the height from the lowermost surface of the conductor 104 to the lower surface of the semiconductor 106b in the B3 - B4 cross section is called h. In the semiconductor 106b, if only the region overlapping with the conductor 104 is regarded as the channel formation region, then Loff1 and Loff2 are O ​​​​​​​​​​ It becomes a fuselage set area.

[0042] Therefore, the transistor structure B has a different shape of the insulator 112 from the transistor structure A. .

[0043] Also, FIG. 3(A) is an example of a top view of a transistor structure C according to one aspect of the present invention. An example of a cross-sectional view corresponding to the dashed-dotted line C1-C2 and the dashed-dotted line C3-C4 in FIG. 3(A) is shown in FIG. 3(B). In FIG. 3(A), for ease of understanding, some parts such as insulators are omitted and shown schematically.

[0044] The transistor structure C includes an insulator 102, a semiconductor 106a on the insulator 102, a semiconductor 1 06b on the semiconductor 106a, a conductor 116a having a region in contact with the semiconductor 106b and a conductor 116b, a semiconductor 106c that is on the conductor 116a, on the conductor 116b, and on the semiconductor 106b, and has a region in contact with the upper surface and side surface of the semiconductor 106b and the side surface of the semiconductor 106a, an insulator 112 on the insulator 102, on the semiconductor 106c, on the conductor 116a, and on the conductor 116b, a conductor 104 that is on the insulator 112 and has a region overlapping with the semiconductor 106a, the semiconductor 10 6b, the semiconductor 106c, the conductor 116a, and the conductor 116b, an insulator 108 on the insulator 102, on the conductor 116a, on the conductor 116b, and on the conductor 104. Note that the semiconductor 106b has regions 124a and 124b in regions overlapping with the conductor 116a and the conductor 116b, respectively.

[0045] In the transistor structure C, the insulator 102 functions as a base insulator. Also, The insulator 112 has a function as a gate insulator. Also, the conductor 104 has a function as a gate electrode and. Also, the conductor 116a and the conductor 116b have functions as a source electrode and a drain electrode. Also, the regions 124a and 124b have functions as a source region and a drain region. Also, a part of the semiconductor 106b has a function as a channel formation region. Also, the semiconductors 106a and 106c have a function of separating the channel formation region included in the semiconductor 106b from the insulators 102 and 112 .

[0046] Also, in the transistor structure C, the distance between the region 124a and the region 124 b in the C1-C2 cross section is called L. Also, the region where the conductor 104 and the region 124a overlap each other or the width thereof in the C1-C2 cross section is called Lov1, and the region where the conductor 104 and the region 124b overlap each other or the width thereof is called Lov2 . Also, the width of the semiconductor 106b in the C3-C4 cross section is called W. Also, the height from the lowermost surface of the conductor 104 to the lower surface of the semiconductor 106b in the C3-C4 cross section is called h . In the semiconductor 106b, if the region overlapping the conductor 104 between the regions 124a and 124b is defined as the channel formation region, Lov1 and Lov2 become overlap regions . .

[0047] Therefore, the transistor structure C has a different shape of the conductor 104 from the transistor structures A and B . Specifically, the transistor structures A and B do not have a region where the conductors 116a and 116b and the conductor 104 overlap each other, but the transistor structure C has conductors 116a and 116b and a conductor ​​It is a structure having a region where the body 104 overlaps with each other.

[0048] Here, the structures having an offset region (transistor structure A and transistor structure B) are presumed to have a smaller on-current (also denoted as Ion) than the structure having an overlap region (transistor structure C). This is due to the offset region becoming the off-resistance of the transistor. On the other hand, the structure having an overlap region has a larger parasitic capacitance than the structure having an offset region. Note that the on-current is the current flowing between the source and drain when a voltage equal to or higher than the threshold voltage is applied to the gate electrode of the transistor.

[0049] Next, regarding the above-described transistor structure A, transistor structure B, and transistor structure C, the change in electrical characteristics due to the difference in L is evaluated by calculation. Note that for the calculation, Sentaurus of Synopsys is used and a three-dimensional structure is used.

[0050] The conditions used in the calculation are shown in the following table.

[0051]

Table 1

[0052] Note that Eg is the energy gap, Nc is the effective density of states in the conduction band, and Nv is the effective density of states in the valence band.

[0053] Also, h is 20 nm, W is 40 nm, Lg is 60 nm for transistor structure A and transistor structure B, and Lov is 20 nm for transistor structure C. At this time, L is 60 nm, 80 nm, 100 nm, 120 nm, 140 nm, or 260 nm ​​​​​​​​​​ to perform electrical characteristic calculations. Also, in transistor structure A and transistor structure B, Loff1 and Loff2 are values obtained by dividing the value obtained by subtracting Lg from L by 2, and specifically become 0 nm, 10 nm, 20 nm, 30 nm, 40 nm, or 100 nm. In addition, the lengths of semiconductor 106a and semiconductor 106b in the L direction are set as values obtained by adding 120 nm to L.

[0054] The gate voltage (also denoted as Vg)-drain current (also denoted as Id) characteristics obtained by calculation are shown in FIG. 4. In FIG. 4, the dotted line represents transistor structure A, the dashed line represents transistor structure B, and the solid line represents transistor structure C. Also, from the Vg-Id characteristics shown in FIG. 4, the on-current and subthreshold swing values (also denoted as S values) at each L are derived and shown in FIG. 5. The on-current represents the drain current when the drain voltage (also denoted as Vd) is 1 V and the gate voltage is the threshold voltage (also denoted as Vth) plus 1.5 V, or when the gate voltage is 2.7 V. The subthreshold swing value represents the value when the drain voltage is 1 V or 0.1 V.

[0055] FIG. 6 shows the ratio of the on-current of transistor structure A and transistor structure B to the on-current of transistor structure C. As L increases, the difference in on-current from transistor structure C widens.

[0056] On the other hand, in transistor structure A, it was shown that an on-current of about 80% of transistor structure C can be obtained even when L is 140 nm. Also, even when L is 120 nm, the transistor It was shown that about 90% of the on-current of the dissta structure C was obtained. Also, when L is 100 nm even then, it was shown that about 98% of the on-current of the transistor structure C was obtained. Note that , the transistor structure A has a higher on-current than the transistor structure C when L is 80 nm or less . Therefore, it was found that if the offset region is below a certain size, there is almost no difference in the on-current between the transistor structure A and the transistor structure C . Specifically, in the transistor structure A, when Loff1 and Loff2 are 40 nm or less, preferably 30 nm or less, and more preferably 20 nm or less, it can be seen that a transistor with a high on-current and a small parasitic capacitance can be realized.

[0057] Also, in the transistor structure B, it was shown that about 80% of the on-current of the transistor structure C was obtained even when L is 120 nm . Also, it was shown that about 90% of the on-current of the transistor structure C was obtained even when L is 100 nm . Also, it was shown that about 95% of the on-current of the transistor structure C was obtained even when L is 80 nm . Therefore, it was found that if the offset region is below a certain size, there is almost no difference in the on-current between the transistor structure B and the transistor structure C . Specifically, in the transistor structure C, when Loff1 and Loff2 are 30 nm or less, preferably 20 n m or less, and more preferably 10 nm or less, it can be seen that a transistor with a high on-current and a small parasitic capacitance can be realized. m or less, and more preferably 10 nm or less, it can be seen that a transistor with a high on-current and a small parasitic capacitance can be realized.

[0058] In the transistor structures A and B as well, there is almost no difference from the transistor structure C ​​​The reason why an on-current with little difference was obtained is thought to be the contribution of the fringing electric field by the gate electrode (conductor 104). That is, the fringing electric field may have induced carriers even in the offset region, preventing it from becoming a large resistance. The contribution of the fringing electric field can be understood by comparing transistor structure A and transistor structure B. Transistor structure A is different from transistor structure B in that it does not have the insulator 112 over the offset region. Also, the insulator 108 has a higher relative permittivity than the insulator 112. Therefore, the induction of carriers into the offset region by the fringing electric field is increased, and it is highly likely that the decrease in the on-current is more suppressed. From this, it can be seen that the fringing electric field contributes to the on-current of the transistor having an offset region. The contribution of the fringing electric field increases as the conductor 104 becomes thicker. Therefore, it is preferable that the conductor 104 is thicker. For example, the thickness of the conductor 104 may be 20 nm or more, preferably 30 nm or more, more preferably 50 nm or more, and even more preferably 100 nm or more.

[0059] In transistor structure A, the contribution of the fringing electric field increases as the relative permittivities of the semiconductor 106c and the insulator 108 are higher. Therefore, it is preferable that the relative permittivities of the semiconductor 106c and the insulator 108 are higher. For example, the relative permittivity of the semiconductor 106c may be 10 or more, preferably 15 or more, more preferably 20 or more, and even more preferably 25 or more. Also, for example, the relative permittivity of the insulator 108 may be 5 or more, preferably 10 or more, more preferably 15 or more, and even more preferably 20 or more. The transistor structure A is different in that it does not have the insulator 112 over the offset region compared to the transistor structure B. Also, the insulator 108 has a higher relative permittivity than the insulator 112. Therefore, the induction of carriers into the offset region by the fringing electric field is increased, and it is highly likely that the decrease in the on-current is more suppressed. From this, it can be seen that the fringing electric field contributes to the on-current of the transistor having an offset region.

[0060] The contribution of the fringing electric field increases as the conductor 104 becomes thicker. Therefore, it is preferable that the conductor 104 is thicker. For example, the thickness of the conductor 104 may be 20 nm or more, preferably 30 nm or more, more preferably 50 nm or more, and even more preferably 100 nm or more.

[0061] In transistor structure A, the contribution of the fringing electric field increases as the relative permittivities of the semiconductor 106c and the insulator 108 are higher. Therefore, it is preferable that the relative permittivities of the semiconductor 106c and the insulator 108 are higher. For example, the relative permittivity of the semiconductor 106c may be 10 or more, preferably 15 or more, more preferably 20 or more, and even more preferably 25 or more. Also, for example, the relative permittivity of the insulator 108 may be 5 or more, preferably 10 or more, more preferably 15 or more, and even more preferably 20 or more.

[0062] Also, in the transistor structure B, the contribution of the fringe electric field increases as the relative permittivities of the semiconductor 106c, the insulator 1 12, and the insulator 108 are higher. Therefore, it is more preferable that the relative permittivities of the semiconductor 106c, the insulator 112, and the insulator 108 are higher. For example, the relative permittivity of the insulator 112 may be 3 or more, preferably 4 or more, more preferably 6 or more, and even more preferably 10 or more. Also, for example, the relative permittivity of the semiconductor 106c may be 10 or more, preferably 15 or more, more preferably 20 or more, and even more preferably 25 or more. Also, for example , the relative permittivity of the insulator 108 may be 5 or more, preferably 10 or more, more preferably 15 or more, and even more preferably 20 or more. Note that the transistor structure A and the transistor structure B can electrically surround the semiconductor 106b by the electric field of the conductor 104 (a transistor structure that electrically surrounds a semiconductor by an electric field generated from a conductor is called a surrounded channel ( s-channel) structure).). Therefore, a channel may be formed in the entire (bulk) of the semiconductor 106b. In the s-channel structure, a large current can flow between the source and the drain of the transistor, and the current (on-current) during conduction can be increased.

[0063] By having the s-channel structure, the contribution of the fringe electric field also reaches the side surface of the semiconductor 106b. Therefore, it can be seen that the s-channel structure is a structure suitable for reducing the resistance of the offset region due to the fringe electric field.

[0064]

[0065] <Transistor Structure 1>​​​​​​​​​FIG. 7A is an example of a top view of a transistor according to one embodiment of the present invention. An example of a cross-sectional view corresponding to the dashed dotted line D1-D2 and the dashed dotted line D3-D4 is shown in FIG. In FIG. 7(A), some parts such as insulators are omitted for ease of understanding.

[0066] The transistor shown in FIG. 7A and FIG. 7B includes a conductor 413 on a substrate 400 and a An insulator 402 having a protrusion on the plate 400 and on the conductor 413, and a The semiconductor 406a, the semiconductor 406b on the semiconductor 406a, and the semiconductor 406b on the semiconductor 406b. 406c, an insulator 412 on the semiconductor 406c, a conductor 404 on the insulator 412, and an insulator and an insulator 408 on the insulator 402, the semiconductor 406b, and the conductor 404. Although the conductor 413 is a part of a transistor here, the present invention is not limited to this. For example, the conductor 413 may be a component separate from a transistor.

[0067] Note that the semiconductor 406b functions as a channel formation region of a transistor. The conductor 404 is a first gate electrode (also referred to as a front gate electrode) of a transistor. The conductor 413 functions as a second gate electrode (backgate) of the transistor. The insulator 408 also functions as a barrier layer. The insulator 408 has a function of blocking oxygen and / or hydrogen, for example. Alternatively, the insulator 408 may be, for example, a semiconductor 406a or / and a semiconductor 406b. It has a higher ability to block oxygen and / or hydrogen than 06c.

[0068] The transistor may be electrically connected to the conductor 424a and the conductor 424b via conductors such as the conductor 426a and the conductor 426b. Note that the conductor 426a and the conductor 426b are electrically connected to the source region and the drain region of the transistor, respectively, through openings provided in the insulator 408, the insulator 418 on the insulator 408, and the insulator 4 28 on the insulator 418. Further, the conductor 424a and the conductor 424 b have, for example, a function as a wiring of the semiconductor device.

[0069] Note that the semiconductor 406c has a region that contacts at least the upper surface and the side surface of the semiconductor 406b in the D3-D4 cross section. Further, the conductor 404 faces the upper surface and the side surface of the semiconductor 406b through the semiconductor 406c and the insulator 412 in the D3-D4 cross section. Also

[0070]

[0071] In FIG. 7(B), even if the region between the portion in contact with the conductor 426a and the portion overlapping the conductor 404 of the semiconductor 406b has a high resistance, the resistance of the region is reduced by the fringe electric field of the conductor 404, so that a decrease in the on-current of the transistor is less likely to occur. For the fringe electric field, refer to the descriptions in FIGS. 1 to 6 and the like.

[0071] However, the region may be a region having a lower resistance than other regions. The region is , for example, an inert element such as a noble gas, an element having a high binding energy with oxygen, a reaction with oxygen A region containing a highly reactive element or an element that reacts with oxygen to form a stable oxide, is also acceptable. Further, the region may contain, for example, one or more selected from helium, boron, carbon, nitrogen, neon, magnesium, aluminum, silicon, phosphorus, argon, calcium, titanium, vanadium, chromium, manganese, iron, cobalt, germanium, krypton, strontium, yttrium, zirconium, niobium, molybdenum, xenon, lanthanum, cerium, neodymium, hafnium, tantalum, or tungsten. The region may contain, for example, 5×10 atoms / cm 19 or more, preferably 3 1×10 atoms / cm 20 or more, more preferably 3 2×10 20 atoms / cm or more, even more preferably 3 5×10 20 atoms / cm 3 or more. In this specification, the above elements may also be referred to as impurities.

[0072] Hereinafter, the case where the semiconductor 406a, the semiconductor 406b, and the semiconductor 406c are oxide semiconductors will be described, but the semiconductor 406a, the semiconductor 406b, and the semiconductor 406c may be semiconductors other than oxide semiconductors.

[0073]

[0074] Note that the insulator 402 is an insulator containing excess oxygen. For example, an insulator containing excess oxygen is an insulator having a function of releasing oxygen by heat treatment. For example, silicon oxide containing excess oxygen releases oxygen by heat treatment or the like. It is silicon oxide that can do so. Therefore, in the insulator 402, oxygen can move through the film. It is an insulator. That is, the insulator 402 may be an insulator having oxygen permeability. For example, the insulator 402 may be an insulator having higher oxygen permeability than the semiconductor 406a.

[0075] An insulator containing excess oxygen may have a function of reducing oxygen deficiency in the semiconductor 406b. In the semiconductor 406b, oxygen deficiency forms DOS and becomes a hole trap or the like. Also, when hydrogen enters the oxygen deficiency site, electrons, which are carriers, may be generated. Therefore, by reducing oxygen deficiency in the semiconductor 406b, stable electrical characteristics can be imparted to the transistor.

[0076] Here, an insulator that releases oxygen by heat treatment releases 1 × 10 or more, 1 × 10 18 atoms / cm 3 or more, or 1 × 10 19 atoms / cm 3 or more of oxygen (in terms of the number of oxygen atoms) in the surface temperature range of 100°C or higher and 70 20 atoms / cm 3 or more during TDS analysis at 0°C or lower or 100°C or higher and 500°C or lower.

[0077] Here, a method for measuring the amount of oxygen released using TDS analysis will be described below.

[0078] When the measurement sample is subjected to TDS analysis, the total amount of gas released is proportional to the integral value of the ionic strength of the released gas. And by comparison with a standard sample, the total amount of gas released can be calculated.

[0079] For example, the TDS analysis results of a silicon substrate containing hydrogen with a predetermined density, which is a standard sample, and From the TDS analysis results of the measurement sample, the amount of oxygen molecules released from the measurement sample (N O2 ) can be obtained by the formula shown below . Here, it is assumed that all of the gas detected with a mass-to-charge ratio of 32 obtained by TDS analysis is derived from oxygen molecules. Although the mass-to-charge ratio of CH3OH is 32, it is not considered here as the possibility of its existence is low. Also, regarding oxygen molecules containing oxygen atoms with a mass number of 17 and oxygen atoms with a mass number of 18, which are isotopes of oxygen atoms, they are not considered because their abundance ratios in nature are extremely small.

[0080] N O2 = N H2 / S H2 × S O2 × α

[0081] N H2 is the value obtained by converting the hydrogen molecules desorbed from the standard sample into density. S H2 is the integrated value of the ionic strength when the standard sample is analyzed by TDS. Here, let the reference value of the standard sample be N H2 / S H2 . S O2 is the integrated value of the ionic strength when the measurement sample is analyzed by TDS . α is a coefficient that affects the ionic strength in TDS analysis. For details of the formula shown above , refer to Japanese Patent Laid-Open No. 6-275697. The above-mentioned amount of oxygen released is measured using a temperature-programmed desorption analyzer EMD-WA1000S / W manufactured by Electron Science Co., Ltd., and as a standard sample, for example, a silicon substrate containing 1 × 10 hydrogen atoms / cm 16 is used. 2 .

[0082] Also, in TDS analysis, a part of the oxygen is detected as oxygen atoms. Oxygen molecules and oxygen atoms ​​The ratio of the ions can be calculated from the ionization rate of oxygen molecules. Note that since α described above includes the ionization rate of oxygen molecules, the amount of oxygen atoms released can also be estimated by evaluating the amount of oxygen molecules released. Note that N is the amount of oxygen molecules released. The amount released in terms of oxygen atoms is twice the amount of oxygen molecules released.

[0083] Note that N O2 is the amount of oxygen molecules released. The amount released in terms of oxygen atoms is twice the amount of oxygen molecules released. Note that N

[0084] Alternatively, an insulator that releases oxygen by heat treatment may contain peroxide radicals. Specifically, it means that the spin density due to peroxide radicals is 5×10 17 spins / cm 3 or more. Note that an insulator containing peroxide radicals may have an asymmetric signal with a g-value in the vicinity of 2.01 in ESR.

[0085] Alternatively, an insulator containing excess oxygen may be oxygen-rich silicon oxide (SiO X (X>2)). Oxygen-rich silicon oxide (SiO (X>2)) contains more oxygen atoms per unit volume than twice the number of silicon atoms. The number of silicon atoms and oxygen atoms per unit volume are values measured by Rutherford backscattering spectrometry (RBS). X (X>2)) contains more oxygen atoms per unit volume than twice the number of silicon atoms. The number of silicon atoms and oxygen atoms per unit volume are values measured by Rutherford backscattering spectrometry (RBS). ackscattering Spectrometry). ackscattering Spectrometry).

[0086] Figure 7(B) shows an s-channel structure in which the semiconductor 406b can be electrically surrounded by the conductor 404 by an electric field. Therefore, a large current can flow between the source and drain of the transistor, and the current (on-current) during conduction can be increased. Figure 7(B) shows an s-channel structure in which the semiconductor 406b can be electrically surrounded by the conductor 404 by an electric field. Therefore, a large current can flow between the source and drain of the transistor, and the current (on-current) during conduction can be increased. Figure 7(B) shows an s-channel structure in which the semiconductor 406b can be electrically surrounded by the conductor 404 by an electric field. Therefore, a large current can flow between the source and drain of the transistor, and the current (on-current) during conduction can be increased.

[0087] Since a high on-current can be obtained, the s-channel structure can be said to be a structure suitable for miniaturized transistors. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less, even more preferably 20 nm or less, and the transistor preferably has a channel width of 40 nm or less, more preferably 30 nm or less, even more preferably 20 nm or less.

[0088] Note that the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the portion where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in the region where the channel is formed. Note that in one transistor, the channel length does not necessarily take the same value in all regions. That is, the channel length of one transistor may not be determined to be one value. Therefore, in this specification, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

[0089] The channel width is, for example, in the top view, the region where the semiconductor (or the portion where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the length of the portion where the source and the drain face each other in the region where the channel is formed. Note that in one transistor, the channel width does not necessarily take the same value in all regions. ​​​​​​​ No. That is, the channel width of one transistor may not be determined to a single value. Therefore, in this specification, the channel width is taken as any value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

[0090] Note that depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter referred to as the effective channel width) may be different from the channel width shown in the top view of the transistor (hereinafter referred to as the apparent channel width). For example, in a transistor having a three-dimensional structure, the effective channel width becomes larger than the apparent channel width shown in the top view of the transistor, and the influence may become non-negligible. For example, in a transistor having a fine and three-dimensional structure, the ratio of the channel region formed on the side surface of the semiconductor may be larger than the ratio of the channel region formed on the top surface of the semiconductor. In that case, the effective channel width where the channel is actually formed is larger than the apparent channel width shown in the top view.

[0091] By the way, in a transistor having a three-dimensional structure, it may be difficult to estimate the effective channel width by actual measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, when the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0092] Therefore, in this specification, in the top view of the transistor, when the semiconductor and the gate electrode face each other, ​​​​​​​The length of the portion where the source and the drain face each other in the overlapping region, which is apparently the channel width, may be referred to as the "surrounded channel width (SCW: Surrounded Channe l Width)". In this specification, when simply described as the channel width it may refer to the surrounded channel width or the apparent channel width. Or, in this specification, when simply described as the channel width, it may refer to the effective channel width in some cases. Note that the channel length, channel width, effective channel width, apparent channel width, surrounded channel width, etc. can be determined by obtaining a cross-sectional TEM image, etc. and analyzing the image and so on.

[0093] Note that when calculating the field-effect mobility of a transistor, the current value per channel width, etc., the surrounded channel width may be used for the calculation. In that case, it may take a different value from the case of calculating using the effective channel width.

[0094] Also, a voltage lower or higher than the source electrode voltage may be applied to the conductor 413 to vary the threshold voltage of the transistor in the positive or negative direction. For example, by varying the threshold voltage of the transistor in the positive direction, normally-off can be realized, where the transistor is in a non-conducting state (off state) even when the gate voltage is 0V. Note that the voltage applied to the conductor 413 may be variable or fixed. When making the voltage applied to the conductor 413 variable, a circuit for controlling the voltage may be electrically connected to the conductor 413.

[0095] Next, a semiconductor applicable to the semiconductor 406a, the semiconductor 406b, the semiconductor 406c, etc. will be described. Hereinafter.

[0096] The semiconductor 406b is, for example, an oxide semiconductor containing indium. When the semiconductor 406b contains indium, for example, the carrier mobility (electron mobility) increases. Also, it is preferable that the semiconductor 406b contains an element M. The element M is preferably aluminum, gallium, yttrium, tin, or the like. Elements applicable to other elements M include boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, etc. However, there may be cases where a plurality of the foregoing elements are combined as the element M. The element M is, for example, an element having a high binding energy with oxygen. For example, it is an element having a higher binding energy with oxygen than indium. Or, the element M is, for example, an element having a function of increasing the energy gap of an oxide semiconductor. Also, it is preferable that the semiconductor 406b contains zinc. When an oxide semiconductor contains zinc, it may be easier to crystallize. However, the semiconductor 406b is not limited to an oxide semiconductor containing indium. The semiconductor 406b may be, for example, an oxide semiconductor containing no indium and containing zinc, such as zinc tin oxide or gallium tin oxide, an oxide semiconductor containing gallium, an oxide semiconductor containing tin, etc. The semiconductor 406b uses, for example, an oxide having a large energy gap. The semiconductor 406 Hereinafter. Hereinafter. Hereinafter.

[0097] However, the semiconductor 406b is not limited to an oxide semiconductor containing indium. The semiconductor 40 6b may be, for example, an oxide semiconductor containing no indium and containing zinc, such as zinc tin oxide or gallium tin oxide, an oxide semiconductor containing gallium, an oxide semiconductor containing tin, etc. oxide semiconductor containing zinc, an oxide semiconductor containing gallium, an oxide semiconductor containing tin, etc. Hereinafter.

[0098] 6b uses, for example, an oxide having a large energy gap. The semiconductor 406 The energy gap of b is, for example, 2.5 eV or more and 4.2 eV or less, preferably 2.8 eV or more and 3.8 eV or less, more preferably 3 eV or more and 3.5 eV or less.

[0099] For example, semiconductor 406a and semiconductor 406c are oxide semiconductors composed of one or more, or two or more, of the elements other than oxygen that constitute semiconductor 406b. Since semiconductor 406 a and semiconductor 406c are composed of one or more, or two or more, of the elements other than oxygen that constitute semiconductor 406b, interface levels are less likely to be formed at the interface between semiconductor 406a and semiconductor 406b and at the interface between semiconductor 406b and semiconductor 406c. It is preferable that semiconductor 406a, semiconductor 406b, and semiconductor 406c contain at least indium. When semiconductor 406a is an In-M-Zn oxide, when the sum of In and M is

[0100] 100 atomic%, preferably In is less than 50 atomic% and M is 50 atomic% or more, more preferably In is less than 25 atomic% and M is 75 ato mic% or more. Also, when semiconductor 406b is an In-M-Zn oxide, when the sum of In and M is 100 atomic%, preferably In is 25 atomic% or more, M is less than 75 atomic%, more preferably In is 34 atomic% or more and M is 6 6 atomic% or less. Also, when semiconductor 406c is an In-M-Zn oxide, when the sum of I n and M is 100 atomic%, preferably In is less than 50 atomic % and M is 50 atomic% or more, more preferably In is less than 25 atomic% and M is 75 atomic% or more. Note that semiconductor 406c is of the same type as semiconductor 406a ​​​Oxides may also be used.

[0101] The semiconductor 406b uses an oxide having a larger electron affinity than the semiconductors 406a and 406c. For example, as the semiconductor 406b, an oxide having an electron affinity that is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less larger than those of the semiconductors 406a and 406c is used. Note that the electron affinity is the difference between the vacuum level and the energy of the lower end of the conduction band. As the semiconductor 406b, an oxide having an electron affinity that is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less larger than those of the semiconductors 406a and 406c is used. As the semiconductor 406b, an oxide having an electron affinity that is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less larger than those of the semiconductors 406a and 406c is used. Note that the electron affinity is the difference between the vacuum level and the energy of the lower end of the conduction band. As the semiconductor 406b, an oxide having an electron affinity that is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less larger than those of the semiconductors 406a and 406c is used. Note that the electron affinity is the difference between the vacuum level and the energy of the lower end of the conduction band. Note that the electron affinity is the difference between the vacuum level and the energy of the lower end of the conduction band.

[0102] Note that indium gallium oxide has a small electron affinity and high oxygen blocking properties. Therefore, it is preferable that the semiconductor 406c contains indium gallium oxide. The gallium atom ratio [Ga / (In + Ga)] is, for example, 70% or more, preferably 80% or more, and more preferably 90% or more. Note that indium gallium oxide has a small electron affinity and high oxygen blocking properties. Therefore, it is preferable that the semiconductor 406c contains indium gallium oxide. Note that indium gallium oxide has a small electron affinity and high oxygen blocking properties. Therefore, it is preferable that the semiconductor 406c contains indium gallium oxide. The gallium atom ratio [Ga / (In + Ga)] is, for example, 70% or more, preferably 80% or more, and more preferably 90% or more. Note that indium gallium oxide has a small electron affinity and high oxygen blocking properties. Therefore, it is preferable that the semiconductor 406c contains indium gallium oxide. The gallium atom ratio [Ga / (In + Ga)] is, for example, 70% or more, preferably 80% or more, and more preferably 90% or more.

[0103] At this time, when a gate voltage is applied, a channel is formed in the semiconductor 406b having a large electron affinity among the semiconductors 406a, 406b, and 406c. At this time, when a gate voltage is applied, a channel is formed in the semiconductor 406b having a large electron affinity among the semiconductors 406a, 406b, and 406c.

[0104] Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. The mixed region has a low interface state density. Therefore, the laminate of the semiconductors 406a, 406b, and 406c has a band structure in which the energy changes continuously (also referred to as a continuous junction) in the vicinity of each interface. Note that FIG. 32(A) shows the semiconductors 406a, 406b, and Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. The mixed region has a low interface state density. Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. The mixed region has a low interface state density. Therefore, the laminate of the semiconductors 406a, 406b, and 406c has a band structure in which the energy changes continuously (also referred to as a continuous junction) in the vicinity of each interface. Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. The mixed region has a low interface state density. Therefore, the laminate of the semiconductors 406a, 406b, and 406c has a band structure in which the energy changes continuously (also referred to as a continuous junction) in the vicinity of each interface. Here, there may be a mixed region between the semiconductor 406a and the semiconductor 406b. Also, there may be a mixed region between the semiconductor 406b and the semiconductor 406c. The mixed region has a low interface state density. Therefore, the laminate of the semiconductors 406a, 406b, and 406c has a band structure in which the energy changes continuously (also referred to as a continuous junction) in the vicinity of each interface. Note that FIG. 32(A) shows the semiconductors 406a, 406b, and is a cross-sectional view in which the semiconductor 406c is stacked in this order. FIG. 32(B) shows the energy (Ec) of the lower end of the conduction band corresponding to the dashed line P1-P2 in FIG. 32(A ), and shows the case where the electron affinity of the semiconductor 406c is greater than that of the semiconductor 40 6a. Further, FIG. 32(C) shows the case where the electron affinity of the semiconductor 406c is smaller than that of the semiconductor 406a.

[0105] At this time, electrons mainly move not in the semiconductor 406a and the semiconductor 406c but in the semiconductor 406b. As described above, by reducing the interface level density at the interface between the semiconductor 406a and the semiconductor 406b and the interface level density at the interface between the semiconductor 406b and the semiconductor 406c, the movement of electrons in the semiconductor 406b is less inhibited, and the on-current of the transistor can be increased.

[0106] The on-current of the transistor can be increased as the factors inhibiting the movement of electrons are reduced. For example, when there are no factors inhibiting the movement of electrons, it is estimated that electrons move efficiently. The movement of electrons is also inhibited, for example, when the physical unevenness of the channel formation region is large.

[0107] In order to increase the on-current of the transistor, for example, the root mean square (RMS) roughness in the range of 1 μm × 1 μm on the upper surface or the lower surface (the surface to be formed, here the semiconductor 406a) is less than 1 nm, preferably less than 0.6 nm, more preferably less than 0.5 nm, and even more preferably less than 0.4 nm. Also, the average surface roughness (also referred to as Ra) in the range of 1 μm × 1 μm is less than 1 nm, ​​​​​Preferably less than 0.6 nm, more preferably less than 0.5 nm, still more preferably less than 0.4 n m. Further, the maximum height difference (also referred to as P-V) in the range of 1 μm × 1 μm is less than 10 nm, preferably less than 9 nm, more preferably less than 8 nm, still more preferably less than 7 nm. The RMS roughness, Ra, and P-V can be measured using a scanning probe microscope system SPA-500 manufactured by SII NanoTechnology Inc., etc. In an oxide semiconductor, oxygen deficiency may be a factor that deteriorates the electrical characteristics of a transistor. Therefore, reducing oxygen deficiency in the channel formation region is important for imparting stable electrical characteristics to the transistor. On the other hand, when an oxide semiconductor is used for the source region and the drain region of a transistor, the oxide semiconductor can be made to have a lower resistance due to oxygen deficiency. Therefore, in some cases, it may be better to have oxygen deficiency in order to increase the on-current of the transistor. For example, when an oxide semiconductor has oxygen deficiency (also denoted as V ).), hydrogen may enter the site of oxygen deficiency to form a donor level. Hereinafter, the state in which hydrogen enters the site of oxygen deficiency may be denoted as V

[0108] H. Note that oxygen is more stable in entering the site of oxygen deficiency than hydrogen. Therefore, by supplying oxygen to the oxide semiconductor, V H can be reduced. When the transistor has an s-channel structure, if the entire semiconductor 406b has a channel formed therein, the electrical characteristics of the transistor may be deteriorated due to the influence of oxygen deficiency. Therefore, it is necessary to reduce oxygen deficiency in the semiconductor 406b. For example, when an oxide semiconductor has oxygen deficiency (also denoted as V

[0109] ., which is also expressed as V O ), hydrogen may enter the site of oxygen deficiency to form a donor level. Hereinafter, the state in which hydrogen enters the site of oxygen deficiency may be denoted as V H. Note that oxygen is more stable in entering the site of oxygen deficiency than hydrogen. Therefore, by supplying oxygen to the oxide semiconductor, V O H can be reduced. In addition, when the transistor has an s-channel structure, if the entire semiconductor 406b has a channel formed therein, the electrical characteristics of the transistor may be deteriorated due to the influence of oxygen deficiency. Therefore, it is necessary to reduce oxygen deficiency in the semiconductor 406b. O H can be reduced.

[0110] channel formed therein, the electrical characteristics of the transistor may be deteriorated due to the influence of oxygen deficiency. Therefore, it is necessary to reduce oxygen deficiency in the semiconductor 406b. A channel is formed. Therefore, the thicker the semiconductor 406b is, the larger the channel region becomes. That is, the thicker the semiconductor 406b is, the higher the on-current of the transistor can be made. For example, the semiconductor 406b may have a region with a thickness of 20 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and even more preferably 100 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the semiconductor 406b may have a region with a thickness of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less. That's all right.

[0111] Also, in order to increase the on-current of the transistor, the smaller the thickness of the semiconductor 406c is, the more preferable it is. For example, the semiconductor 406c may have a region with a thickness of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less. On the other hand, the semiconductor 406c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor 406b in which the channel is formed. Therefore, it is preferable for the semiconductor 406c to have a certain thickness. For example, the semiconductor 406c may have a region with a thickness of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more. Also, it is preferable for the semiconductor 406c to have the property of blocking oxygen in order to suppress the outward diffusion of oxygen released from the insulator 402 or the like. That's all right. In addition, in order to improve the reliability, it is preferable for the semiconductor 406a to be thick and the semiconductor 406c to be thin. For example, the semiconductor 406a may have a region with a thickness of 10 nm or more, preferably 20 nm or more, more preferably 40 nm

[0112] or more, and even more preferably 60 nm or more. That's all right. That's all right. By increasing the thickness of the semiconductor 406a, the semiconductor 406a can be prevented from being heated at the interface between the adjacent insulator and the semiconductor 406a. The distance from the semiconductor 406b where the channel is formed can be increased. Since the productivity of the device may decrease, for example, the thickness is set to 200 nm or less, preferably 120 nm or less. The semiconductor 406a may have a thickness of 80 nm or less, and more preferably a thickness of 80 nm or less. stomach.

[0113] For example, a secondary ion mass spectrometry (S In IMS (Secondary Ion Mass Spectrometry) , 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Not yet More preferably, 2×10 18 atoms / cm 3 The region where the silicon concentration is less than In addition, between the semiconductor 406b and the semiconductor 406c, a 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than, more Preferably 2 x 10 18 atoms / cm 3 The silicon concentration is less than 100 nm.

[0114] In order to reduce the hydrogen concentration in the semiconductor 406b, the semiconductor 406a and the semiconductor 406 It is preferable to reduce the hydrogen concentration in the semiconductor 406a and the semiconductor 406c. In, 2×10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm3 Hereinafter, more preferably 1×10 19 atoms / cm 3 Hereinafter, even more preferably 5 ×10 18 atoms / cm 3 has a region with a hydrogen concentration of hereinafter. Further, in order to reduce the nitrogen concentration of semiconductor 406 b, it is preferable to reduce the nitrogen concentration of semiconductor 406a and semiconductor 406c. Semiconductor 406a and semiconductor 406c have, in SIMS, 5×10 19 atoms / cm 3 less than, preferably 5×10 18 atoms / cm 3 Hereinafter, more preferably 1×10 18 atoms / cm 3 Hereinafter, even more preferably 5×10 17 atom s / cm 3 has a region with a nitrogen concentration of hereinafter.

[0115] Note that when copper is mixed into the oxide semiconductor, electron traps may be generated. Electron traps may cause the threshold voltage of the transistor to vary in the positive direction. Therefore, the lower the copper concentration on the surface or inside of semiconductor 406b, the more preferable. For example, semiconductor 4 06b preferably has a region with a copper concentration of 1×10 19 atoms / cm 3 less than, 5×10 18 atoms / c m 3 less than, or 1×10 18 atoms / cm 3 less than. Also, the lower the copper concentration on the surface or inside of semiconductor 406a, the more preferable. For example, semiconductor 4 06a preferably has a region with a copper concentration of 1×10 19 atoms / cm 3 less than, 5×10 18 atom s / cm 3 equal to or less than 1 × 10 18 atoms / cm 3 preferably has a region where it is Also, the lower the copper concentration on the surface or inside of the semiconductor 406c, the better. For example, the semiconductor 406c preferably has a region where the copper concentration is 1 × 10 19 atoms / cm 3 or less, 5 × 10 18 a toms / cm 3 or less, or equal to or less than 1 × 10 18 atoms / cm 3 and preferably has a region where it is as described above.

[0116] The above three-layer structure is an example. For example, a two-layer structure without the semiconductor 406a or the semiconductor 406c is also acceptable. Or, a four-layer structure having any one of the semiconductors exemplified as the semiconductor 406a, the semiconductor 406b, and the semiconductor 406c above or below the semiconductor 406a, or above or below the semiconductor 406c is also acceptable. Or, an n-layer structure (n is an integer of 5 or more) having any one of the semiconductors exemplified as the semiconductor 406a, the semiconductor 406b, and the semiconductor 406c at two or more locations among above the semiconductor 406a, below the semiconductor 406a, above the semiconductor 406c, and below the semiconductor 406c is also acceptable. Hereinafter, the structure of the oxide semiconductor will be described. In this specification, "parallel" means a state where two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" means a state where two straight lines are arranged at an angle of -30° or more and 30° or less.

[0117] Hereinafter, the structure of the oxide semiconductor will be described.

[0118] In this specification, "parallel" means a state where two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" means a state where two straight lines are arranged at an angle of -30° or more and 30° or less. Accordingly, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" means a state where two straight lines are arranged at an angle of -30° or more and 30° or less. Accordingly, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" means a state where two straight lines are arranged at an angle of -30° or more and 30° or less. ​Here, "vertical" means a state where two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Also, "substantially vertical" means a state where two straight lines are arranged at an angle of 60° or more and 120° or less.

[0119] In addition, in this specification, when a crystal is trigonal or rhombohedral, it is represented as a hexagonal crystal system.

[0120] <Structure of Oxide Semiconductor> Hereinafter, the structure of the oxide semiconductor will be described.

[0121] Oxide semiconductors can be divided into single-crystalline oxide semiconductors and other non-single-crystalline oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline Oxide Semiconductor), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like Oxide Semiconductor), and amorphous oxide semiconductors.

[0122] From another perspective, oxide semiconductors can be divided into amorphous oxide semiconductors and other crystalline oxide semiconductors. Examples of crystalline oxide semiconductors include single-crystalline oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and nc-OS.

[0123] As a definition of an amorphous structure, generally, it is known that it is not fixed in a metastable state, is isotropic, and does not have a heterogeneous structure. Also, the bonding angle is flexible, and the short-distance ​​It can also be paraphrased as a structure that has order but no long-range order.

[0124] Conversely, in the case of an essentially stable oxide semiconductor, it cannot be called a completely amorphous oxide semiconductor. Also, an anisotropic (for example, having a periodic structure in a minute region) oxide semiconductor cannot be called a completely amorphous oxide semiconductor. However, although the a-like OS has a periodic structure in a minute region, it has looseness and an unstable structure. Therefore, it can be said that it is physically close to an amorphous oxide semiconductor. ely amorphous) oxide semiconductor. Also, an anisotropic (for example, having a periodic structure in a minute region) oxide semiconductor cannot be called a completely amorphous oxide semiconductor. However, the a-like OS has a periodic structure in a minute region, but has looseness and an unstable structure. Therefore, physically, it can be said to be close to an amorphous oxide semiconductor.

[0125] <caac-os> First, CAAC-OS will be described.

[0126] CAAC-OS is one of the oxide semiconductors having a plurality of c-axis oriented crystal parts (also referred to as pellets). conductors.

[0127] By a transmission electron microscope (TEM: Transmission Electron Micro scope), when observing a composite analysis image (also referred to as a high-resolution TEM image) of a bright-field image and a diffraction pattern of CAAC-OS, a plurality of pellets can be confirmed. On the other hand In a high-resolution TEM image, the boundary between pellets, that is, the grain boundary (also referred to as a grain boundary) cannot be clearly confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility caused by grain boundaries is unlikely to occur.

[0128] Hereinafter, CAAC-OS observed by TEM will be described. FIG. 27(A) shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction substantially parallel to the sample surface. High For the observation of the high-resolution TEM image, a spherical aberration correction (Spherical Aberration Corrector) function was used. The high-resolution TEM image using the spherical aberration correction function is Specifically called a Cs-corrected high-resolution TEM image. The acquisition of a Cs-corrected high-resolution TEM image can be performed, for example, by using a JEOL JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd. and the like.

[0129] A Cs-corrected high-resolution TEM image obtained by enlarging the region (1) in FIG. 27(A) is shown in FIG. 27(B). From FIG. 27(B), it can be confirmed that in the pellet, metal atoms are arranged in layers. ​​​​. The arrangement of each layer of metal atoms reflects the unevenness of the surface (also referred to as the surface to be formed) or the upper surface on which the CAAC-OS film is formed, and is parallel to the surface to be formed or the upper surface of the CAAC-OS. That is, it is parallel to the surface to be formed or the upper surface of the CAAC-OS, reflecting the unevenness of the surface to be formed or the upper surface.

[0130] As shown in FIG. 27(B), CAAC-OS has a characteristic atomic arrangement. FIG. 27(C) shows the characteristic atomic arrangement indicated by the auxiliary lines. From FIGS. 27(B) and 27(C) , it can be seen that the size of one pellet is about 1 nm or more and 3 nm or less, and the size of the gap formed by the inclination between pellets is about 0.8 nm. Therefore, the pellet can also be called a nanocrystal (nc). In addition, CA AC-OS can also be called an oxide semiconductor having CANC (C-Axis Aligned nanocrystals) .

[0131] Here, based on the Cs-corrected high-resolution TEM image, when the arrangement of the pellets 5100 of CAAC-OS on the substrate 5120 is schematically shown, it has a structure like bricks or blocks stacked (see FIG. 27(D)). The location where the inclination occurs between the pellets observed in FIG. 27(C) corresponds to the region 5161 shown in FIG. 27(D).

[0132] Also, FIG. 28(A) shows the Cs-corrected high-resolution TEM image of the plane of CAAC-OS observed from a direction substantially perpendicular to the sample surface. The Cs-corrected high-resolution TEM images of the regions (1), (2), and (3) in FIG. 28(A) are respectively shown in FIGS. 28(B), 28(C), and FIG. 28(D). From FIGS. 28(B), 28(C), and 28(D), it can be confirmed that the metal atoms in the pellet are arranged in a triangular, square, or hexagonal shape. However However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0133] Next, CA analyzed by X-ray diffraction (XRD) AC-OS will be described. For example, for CAAC-OS having a crystal of InGaZnO4 when performing a structural analysis by the out-of-plane method, as shown in Fig. 29(A) a peak may appear at around a diffraction angle (2θ) of 31°. Since this peak is attributed to the (009) plane of the crystal of InGaZ nO4, it can be confirmed that the crystal of CAAC-OS has c-axis orientation and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface.

[0134] In the structural analysis of CAAC-OS by the out-of-plane method, in addition to the peak at around 2θ of 31° a peak may also appear at around 2θ of 36°. The peak at around 2θ of 36° indicates that a part of CAAC-OS contains crystals without c-axis orientation. More preferable CAAC-OS shows a peak at around 2θ of 31° and does not show a peak at around 2θ of 36° in the structural analysis by the out-of-plane method.

[0135] On the other hand, when performing a structural analysis of CAAC-OS by the in-plan e method in which X-rays are incident from a direction substantially perpendicular to the c-axis, a peak appears at around 2θ of 56°. This peak is attributed to the (110) plane of the crystal of In GaZnO4. In the case of CAAC-OS, even when the analysis ( φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis) with 2θ fixed at around 56° as shown in Fig. 29(B), no distinct peak appears. In contrast When the single crystal oxide semiconductor is InGaZnO4 and 2θ is fixed near 56° and φ is scanned, as shown in Fig. 29(C), six peaks attributed to crystal planes equivalent to the (110) plane are observed. Therefore, from the structural analysis using XRD, it can be confirmed that CAAC-OS has irregular orientations of the a-axis and b-axis.

[0136] Next, the CAAC-OS analyzed by electron diffraction will be described. For example, for CAAC-OS having a crystal of InGaZnO4, when an electron beam with a probe diameter of 300 nm is incident parallel to the sample surface, a diffraction pattern as shown in Fig. 30(A) (also referred to as a limited field transmission electron diffraction pattern) may appear. This diffraction pattern contains spots due to the (009) plane of the InGaZnO4 crystal. Therefore, also by electron diffraction, it can be seen that the pellets included in CAAC-OS have c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface. On the other hand, Fig. 30(B) shows the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicular to the sample surface for the same sample. From Fig. 30 (B), a ring-shaped diffraction pattern is confirmed. Therefore, also by electron diffraction, it can be seen that the a-axis and b-axis of the pellets included in CAAC-OS do not have orientation. Note that the first ring in Fig. 30(B) is considered to be due to the (010) plane and the (100) plane of the InGaZnO4 crystal, etc. Also, the second ring in Fig. 30(B) is considered to be due to the (110) plane, etc. As described above, CAAC-OS is a highly crystalline oxide semiconductor. The crystal of the oxide semiconductor

[0137] of the oxide semiconductor Crystallinity may decrease due to contamination by impurities or generation of defects, so the opposite view is taken. It can also be said that CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0138] Note that impurities are elements other than the main components of the oxide semiconductor, including hydrogen, carbon, silicon, transition metals elements and the like. For example, an element with a stronger binding force to oxygen than the metal elements constituting the oxide semiconductor, such as silicon, deprives the oxide semiconductor of oxygen, disrupting the atomic arrangement of the oxide semiconductor and becoming a factor in reducing crystallinity. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc. have a large atomic radius (or molecular radius), so they disrupt the atomic arrangement of the oxide semiconductor and become a factor in reducing crystallinity.

[0139] When the oxide semiconductor has impurities or defects, its characteristics may vary depending on light, heat, etc. For example, impurities contained in the oxide semiconductor may act as carrier traps or carrier generation sources. In addition, oxygen vacancies in the oxide semiconductor may act as carrier traps or become carrier generation sources by capturing hydrogen.

[0140] CAAC-OS with few impurities and oxygen vacancies is an oxide semiconductor with a low carrier density. Specifically, the carrier density is less than 8×10 11 / cm 3 preferably less than 1×10 11 / cm 3 more preferably less than 1×10 10 / cm 3 and can be 1×10 -9 / cm 3 or more. Such an oxide semiconductor is referred to as high-purity intrinsic or substantially high-purity. It is called a true oxide semiconductor. CAAC-OS has a low impurity concentration and a low defect level density. That is, it can be said that it is an oxide semiconductor having stable characteristics.

[0141] <nc-os> Next, we will explain nc-OS.

[0142] In the high-resolution TEM image, the nc-OS is divided into two groups: one where the crystals can be confirmed, and the other where the crystals can be clearly confirmed. The nc-OS has regions where no crystalline parts can be confirmed. The size is often between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In addition, the nanocrystals are different from the pellets in CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is called pellets. There may be cases where this happens.

[0143] The nc-OS is a nano-sized area (e.g., an area of ​​1 nm to 10 nm, especially 1 nm to 3 nm). The nc-OS has periodic atomic arrangement in the sub-nm region. There is no regularity in the crystal orientation between the dots. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be considered to be a-like OS or amorphous oxide semiconductor. For example, for nc-OS, the X-shaped pellets with a diameter larger than that of the pellets may not be distinguishable. When using the line, the peaks showing the crystal planes were not detected by the out-of-plane method. In addition, for nc-OS, a probe diameter larger than the pellet (e.g. 50n When electron diffraction is performed using an electron beam of 1000 nm or more, a halo-like diffraction pattern is observed. On the other hand, for nc-OS, the size of the pellet is close to or smaller than that of the pellet. When performing nanobeam electron diffraction using an electron beam with a diameter of ーブ, spots are observed. Also, n When performing nanobeam electron diffraction on c-OS, there are cases where a region with high luminance is observed to draw a circle (ring-shaped). Furthermore, there are cases where a plurality of spots are observed within the ring-shaped region. There are cases.

[0144] Thus, since the crystal orientations among the pellets (nanocrystals) do not have regularity, nc- OS can also be called an oxide semiconductor having RANC (Random Aligned nanocrystals) or an oxide semiconductor having NANC (Non-Aligned nanocrystals ).

[0145] nc-OS is an oxide semiconductor with higher regularity than an amorphous oxide semiconductor. Therefore, nc-OS has a lower density of defect levels than a-like OS and an amorphous oxide semiconductor . However, nc-OS does not show regularity in crystal orientation among different pellets. Therefore , nc-OS has a higher density of defect levels than CAAC-OS.

[0146] <a-like OS> a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor .

[0147] In a high-resolution TEM image, there are cases where voids (also called voids) are observed in a-like OS . Also, in a high-resolution TEM image, there are regions where the crystal part can be clearly confirmed and regions where the crystal part cannot be confirmed.

[0148] Due to having voids, a-like OS has an unstable structure. Below, a-like To show that the OS has an unstable structure compared to CAAC-OS and nc-OS the change in structure due to electron irradiation is shown.

[0149] As samples for electron irradiation, a-like OS (denoted as sample A), nc-OS (denoted as sample B), and CAAC-OS (denoted as sample C) are prepared. All of the samples are In-Ga-Zn oxide.

[0150] First, high-resolution cross-sectional TEM images of each sample are obtained. From the high-resolution cross-sectional TEM images, it can be seen that each sample has a crystalline part.

[0151] The determination of which part is regarded as one crystalline part can be performed as follows. For example, the unit cell of the InGaZnO4 crystal has three In-O layers and six Ga-Zn-O layers, and it is known to have a structure in which a total of nine layers are stacked in the c-axis direction. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value), and the value is determined to be 0.29 nm from crystal structure analysis. Therefore, a portion where the lattice fringe spacing is between 0.28 nm and 0.30 nm can be regarded as the crystalline part of InGaZnO4. Note that the lattice fringes correspond to the a-b plane of the InGaZnO4 crystal.

[0152] Figure 31 shows an example of investigating the average size of the crystalline parts (from 22 to 45 locations) of each sample. However, the length of the lattice fringes described above is used as the size of the crystalline part. From Figure 31, it can be seen that the a-like OS crystalline part becomes larger as the cumulative electron irradiation dose increases. Specifically, as shown by (1) in Figure 31, at the initial stage of observation by TEM, it is about 1.2 nm ​​​​​​The crystal part (also referred to as the initial nucleus) of a certain size has a cumulative irradiation dose of 4.2×10 8 e - / nm 2 and it can be seen that it has grown to a size of about 2.6 nm. On the other hand, nc-OS and CAAC-OS show no change in the size of the crystal part from the start of electron irradiation until the cumulative electron irradiation dose reaches 4.2×10 8 e - / nm 2 . Specifically, as shown in (2) and (3) of FIG. 31, regardless of the cumulative electron irradiation dose, the sizes of the crystal parts of nc-OS and CAAC-OS are about 1.4 nm and about 2.1 nm respectively , which can be seen .

[0153] Thus, a-like OS may show crystal part growth due to electron irradiation . On the other hand, it can be seen that nc-OS and CAAC-OS show almost no crystal part growth due to electron irradiation . That is, it can be seen that a-like OS has an unstable structure compared to nc-OS and CAAC-OS .

[0154] Also, because it has looseness, a-like OS has a lower density structure compared to nc-OS and CAAC-OS . Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal with the same composition . Also, the densities of nc-OS and CAAC-OS are 92.3% or more and less than 100% of the density of a single crystal with the same composition . An oxide semiconductor with a density less than 78% of the density of a single crystal is difficult to form a film itself

[0155] For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], rhombic ​The density of a single crystal InGaZnO4 having a hexahedral crystal structure is 6.357 g / cm 3 Thus, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of the a-like OS is 5.0 g / cm or more and less than 5.9 g / cm 3 Furthermore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], 3 the density of the nc-OS and the density of the CAAC-OS are 5.9 g / cm or more and less than 6.3 g / cm 3 3

[0156]

[0157]

[0158] As described above, the oxide semiconductor has various structures, each having various characteristics. Also, the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, nc-OS, CAAC-OS.

[0158] In FIG. 7, as the substrate 400, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as a yttria-stabilized zirconia substrate), a resin substrate, and the like. Further, as the semiconductor substrate, for example, a single semiconductor substrate such as silicon or germanium, or a compound semiconductor substrate such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide lead, gallium oxide, etc. Further, there is a semiconductor substrate having an insulator region inside the aforementioned semiconductor substrate, for example, an SOI (Silicon On Insulator tor) substrate, etc. As the conductor substrate, there are a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate, etc. Or, there is a substrate having a metal nitride or a substrate having a metal oxide. Further, there is a substrate in which a conductor or a semiconductor is provided on an insulator substrate, a conductor or an insulator is provided on a semiconductor substrate, or a semiconductor or an insulator is provided on a conductor substrate board, etc. Or, those with elements provided on these substrates may also be used. As the elements provided on the substrate, there are a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, etc. board, etc. Or, those with elements provided on these substrates may also be used. As the elements provided on the substrate, there are a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, etc. Examples of the elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, etc.

[0159] Further, as the substrate 400, a flexible substrate may be used. Note that, as a method of providing a transistor on the flexible substrate, there is also a method in which a transistor is fabricated on a non-flexible substrate and then the transistor is peeled off and transferred to the substrate 400 which is a flexible substrate. In that case, it is preferable to provide a release layer between the non-flexible substrate and the transistor. Note that, as the substrate 400, a sheet, film or foil in which fibers are woven may also be used. Further, the substrate 400 may have stretchability. Also, the substrate 400 may have a property of returning to its original shape when bending or pulling is stopped. Or, it may have a property of not returning to its original shape. The thickness of the substrate 4 00 is, for example, 5 μm or more and 700 μm or less, preferably 10 μm or more and 500 μm Hereinafter, it is more preferably 15 μm or more and 300 μm or less. When the substrate 400 is made thinner, the weight of the semiconductor device can be reduced. Also, by making the substrate 400 thinner, even when using glass or the like it may have stretchability, or when bending and pulling are stopped, it may have the property of returning to its original shape. Therefore, impacts applied to the semiconductor device on the substrate 400 due to dropping or the like can be alleviated. That is, a robust semiconductor device can be provided .

[0160] As the flexible substrate 400, for example, metal, alloy, resin, glass, or fibers thereof can be used. The flexible substrate 400 is preferably one with a lower coefficient of linear expansion as deformation due to the environment is more suppressed. As the flexible substrate 400, for example, a material with a coefficient of linear expansion of 1×10 / K or less, 5×10 -3 / K or less, or 1×1 -5 0 -5 / K or less can be used. Examples of resins include polyester, poly olefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, acrylic, etc. In particular, aramid is suitable as the flexible substrate 400 because of its low coefficient of linear expansion.

[0161] As the conductor 413, for example, a conductor containing one or more of boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum, neodymium, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium, lithium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum, and tungsten can be used in a single layer or in a laminated structure. For example, It may be an alloy or a compound, such as a conductor containing aluminum, a conductor containing copper and titanium , a conductor containing copper and manganese, a conductor containing indium, tin and oxygen, a conductor containing titanium and nitrogen, etc. may be used.

[0162] As the insulator 402, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, al uminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium , zirconium, lanthanum, neodymium, hafnium or tantalum may be used as a single layer or in a stacked manner. Note that the insulator 402 may contain an insulator containing nitrogen such as silicon oxynitride or silicon nitride.

[0163] The insulator 402 may have a role of preventing the diffusion of impurities from the substrate 400. Also, when the semiconductor 406b is an oxide semiconductor, the insulator 402 can play a role of supplying oxygen to the semiconductor 406b.

[0164] As the insulator 412, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, al uminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium , zirconium, lanthanum, neodymium, hafnium or tantalum may be used as a single layer or in a stacked manner.

[0165] As the conductor 404, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, al uminum, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, ytt rium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and A conductor containing one or more of tungsten may be used in a single layer or in a stacked layer. For example, it may be an alloy or a compound, such as a conductor containing aluminum, a conductor containing copper and titanium , a conductor containing copper and manganese, a conductor containing indium, tin and oxygen, a conductor containing titanium and nitrogen, etc. may be used.

[0166] As the insulator 408, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, a luminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium , zirconium, lanthanum, neodymium, hafnium or tantalum may be used in a single layer or in a stacked layer. The insulator 408 is preferably an insulator containing aluminum oxide, silicon oxynitride , silicon nitride, gallium oxide, yttrium oxide, zirconium oxide , lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide, and may be used in a single layer or in a stacked layer.

[0167] As the insulator 418, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, a luminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium , zirconium, lanthanum, neodymium, hafnium or tantalum may be used in a single layer or in a stacked layer. The insulator 418 is preferably an insulator containing silicon oxide or silicon oxynitride and may be used in a single layer or in a stacked layer.

[0168] As the insulator 428, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, a luminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium , an insulator containing zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a stacked layer. The insulator 428 is preferably an insulator containing silicon oxide or silicon oxynitride, which may be used in a single layer or in a stacked layer.

[0169] As the conductors 426a and 426b, for example, conductors containing one or more of boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum, and tungsten may be used in a single layer or in a stacked layer. For example, they may be alloys or compounds, and conductors containing aluminum, conductors containing copper and titanium, conductors containing copper and manganese, conductors containing indium, tin, and oxygen, conductors containing titanium and nitrogen, etc. may be used.

[0170] As the conductors 424a and 424b, for example, conductors containing one or more of boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum, and tungsten may be used in a single layer or in a stacked layer. For example, they may be alloys or compounds, and conductors containing aluminum, conductors containing copper and titanium, conductors containing copper and manganese, conductors containing indium, tin, and oxygen, conductors containing titanium and nitrogen, etc. may be used.

[0171] Note that in FIG. 7, the conductor 404, which is the first gate electrode of the transistor, and the second gate electrode Although an example in which the conductor 413 that is an electrode is not electrically connected has been shown, the structure of the transistor according to one aspect of the present invention is not limited to this. For example, as shown in FIG. 8(A), a structure in which the conductor 40 4 and the conductor 413 are electrically connected via a conductor 405 or the like may be used. By adopting such a configuration, the same potential is supplied to the conductor 404 and the conductor 413, so that the switching characteristics of the transistor can be improved. Alternatively, as shown in FIG. 8(B ), a structure without the conductor 413 may be used. ).

[0172] Alternatively, in FIG. 7, an example in which the conductors 426a and 426b that are electrically connected to the source region and the drain region of the transistor have regions in contact with the semiconductor 406b has been shown, but the structure of the transistor according to one aspect of the present invention is not limited to this. For example, as shown in FIG. 9(A ), the conductors 426a and 426b may have regions in contact with the insulator 402 through the semiconductor 406b and the semiconductor 4 06a. Alternatively, as shown in FIG. 9( B), it may have a region that penetrates the semiconductor 406b and is in contact with the semiconductor 406a.

[0173] Alternatively, in FIG. 7, an example in which the semiconductor 406c and the insulator 412 are arranged only in a region overlapping the conductor 404 has been shown, but the structure of the transistor according to one aspect of the present invention is not limited to this. For example, as shown in FIG. 10(A), the semiconductor 406c and the insulator 412 may be arranged so as to cover the semiconductor 406b and the semiconductor 406a. Alternatively, as shown in FIG. 10( B), the semiconductor 406c may be arranged so as to overlap the semiconductor 406b, and the insulator 41 2 may be arranged so as to overlap the semiconductor 406c. 2 may be arranged to cover semiconductor 406c, semiconductor 406b, and semiconductor 406a. There is no problem.

[0174] <Transistor Structure 2> FIG. 11(A) is an example of a top view of a transistor according to one aspect of the present invention. FIG. 11(A ) shows an example of a cross-sectional view corresponding to the dashed line E1-E2 and the dashed line E3-E4 in FIG. 11(B ). In FIG. 11(A), for ease of understanding, some parts such as insulators are omitted and shown.

[0175] The transistors shown in FIGS. 11(A) and 11(B) include a conductor 413 on a substrate 400, an insulator 402 having protrusions on the substrate 400 and on the conductor 413, a semiconductor 406a on the protrusion of the insulator 402, a semiconductor 406b on the semiconductor 406a, conductors 416a and 41 6b having a region in contact with the upper surface of the semiconductor 406b and not in contact with the side surface of the semiconductor 406b, a semiconductor 406c disposed in a region on the semiconductor 406b that does not overlap with the conductors 416a and 416b, an insulator 412 on the semiconductor 406c, a conductor 404 on the insulator 412, and an insulator 408 on the insulator 402, on the semiconductor 406b, and on the conductor 404. Here, the conductor 413 is regarded as a part of the transistor, but it is not limited thereto. For example, the conductor 413 may be a component independent of the transistor. For example, the conductors 416a and 416b may be, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt, nickel,

[0176] copper, zinc, gallium, yttrium, zirconium, molybdenum, ruthenium, silver, indium, tin, lead, bismuth, germanium, arsenic, selenium, tellurium, antimony, beryllium, magnesium, calcium, strontium, barium, scandium, titanium, vanadium, niobium, tantalum, tungsten, rhenium, osmium, iridium, platinum, A conductor containing one or more of indium, tin, tantalum, and tungsten may be used in a single layer or in a stacked manner. For example, it may be an alloy or a compound, and conductors containing aluminum , conductors containing copper and titanium, conductors containing copper and manganese, indium, tin, and conductors containing oxygen, conductors containing titanium and nitrogen, etc. may be used.

[0177] The transistor shown in FIG. 11 differs from the transistor shown in FIG. 7, etc. in that it has conductors 416a and 416b, but the other configurations are similar. Therefore, the details of the transistor shown in FIG. 11 can be considered in reference to the description of the transistor shown in FIG. 7, etc.

[0178] The transistor shown in FIG. 11 may be able to realize a transistor with a larger on-current than the transistor shown in FIG. 7, etc., by the amount of conductors 416a and 416b it has.

[0179] <Transistor Structure 3> FIG. 12(A) is an example of a top view of a transistor according to one aspect of the present invention. An example of a cross-sectional view corresponding to the dashed lines F1 - F2 and F3 - F4 in FIG. 12(A ) is shown in FIG. 12(B ). In FIG. 12(A), for ease of understanding, some parts such as insulators are omitted and shown.

[0180] The transistor shown in FIGS. 12(A) and 12(B) includes a conductor 413 on a substrate 400, an insulator 402 having a convex portion on the substrate 400 and on the conductor 413, a semiconductor 406a on the convex portion of the insulator 402, a semiconductor 406b on the semiconductor 406a, and on the upper surface of the semiconductor 406b and conductors 416a and 416b having regions in contact with the side surfaces, and semiconductor 406 Semiconductor 40 6c disposed in a region on b that does not overlap with conductors 416a and 416b, insulator 412 on semiconductor 406c, conductor 404 on insulator 412, and insulator 402, insulator 408 on semiconductor 406b and on conductor 404. Here, although conductor 413 is part of the transistor, it is not limited to this. For example it may be assumed that conductor 413 is a component independent of the transistor.

[0181] The transistor shown in FIG. 12 is different from the transistor shown in FIG. 11 in that conductors 416a and 416b have regions in contact with the side surface of semiconductor 406b, but the other configurations are similar. Therefore, the details of the transistor shown in FIG. 12 can refer to the description of the transistor shown in FIG. 11 and the like.

[0182] The transistor shown in FIG. 12, compared with the transistor shown in FIG. 11 and the like, has conductors 416 a and conductor 416b having regions in contact with the side surface of semiconductor 406b, and in some cases, a transistor with a larger on-current can be realized.

[0183] In FIG. 12, an example is shown in which conductor 404, which is the first gate electrode of the transistor, and conductor 413, which is the second gate electrode, are not electrically connected, but the structure of the transistor according to an aspect of the present invention is not limited to this. For example, as shown in FIG. 13(A), a structure having a region where conductor 404 and conductor 413 are in contact may be used. With such a configuration , the same potential is supplied to conductor 404 and conductor 413, so that the transistors ​ The switching characteristics of the transistor can be improved. Or, as shown in Fig. 13(B), it may have a structure without the conductor 413.

[0184] Also, in Fig. 12, an example is shown where the semiconductor 406c and the insulator 412 are arranged only in the region overlapping the conductor 404. However, the structure of the transistor according to one aspect of the present invention is not limited to this. For example, as shown in Fig. 14(A), the semiconductor 406c may be arranged to cover the semiconductor 406b and the semiconductor 406a. Or, as shown in Fig. 14(B), the semiconductor 406c may be arranged to cover the semiconductor 406b and the semiconductor 406a, and the insulator 412 may be arranged to cover the conductor 416a, the conductor 416b, the semiconductor 406c, the semiconductor 406b, and the semiconductor 406a.

[0185] <Transistor Structure 4> Fig. 15(A) is an example of a top view of a transistor according to one aspect of the present invention. An example of a cross-sectional view corresponding to the dashed lines G1 - G2 and G3 - G4 in Fig. 15(A ) is shown in Fig. 15(B ). Note that in Fig. 15(A), for ease of understanding, some parts such as the insulator are omitted and shown.

[0186] The transistors shown in Fig. 15(A) and Fig. 15(B) include a conductor 413 on the substrate 400, an insulator 402 having protrusions on the substrate 400 and on the conductor 413, a semiconductor 406a on the protrusions of the insulator 402, a semiconductor 406b on the semiconductor 406a, conductors 416a and 416b having regions in contact with the upper surface and side surfaces of the semiconductor 406b, and a semiconductor 406c arranged in a region on the semiconductor 406b that does not overlap with the conductor 416a and overlaps with the conductor 416b. 06c, an insulator 412 on the semiconductor 406c, a conductor 404 on the insulator 412, and an insulator 408 on the insulator 402, on the semiconductor 406b, and on the conductor 404. Note that , the transistor shown in FIG. 15 has a region where the conductor 404 overlaps with the conductor 416b. Here, the conductor 413 is taken as part of the transistor, but it is not limited to this . For example, the conductor 413 may be a component independent of the transistor.

[0187] Compared with the transistor shown in FIG. 12, the transistor shown in FIG. 15 has a different point in that the conductor 404 has a region overlapping with the conductor 416b, but the other configurations are similar . Therefore, the details of the transistor shown in FIG. 15 can refer to the description of the transistor shown in FIG. 12 and the like . .

[0188] As shown in FIG. 15(B), in the transistor, the conductor 404 having the function of a gate electrode and the semiconductor 406b having the function of a channel formation region overlap with each other . The overlapping region is called the Lov region.

[0189] If the Lov region is too large, the parasitic capacitance increases, which may reduce the switching characteristics of the transistor . Therefore, the size of the Lov region shown in FIG. 15(B) is less than 100% of the size of the channel formation region, preferably less than 80%, more preferably less than 50% . For example, the size of the Lov region is less than 50 nm, preferably less than 20 nm, more preferably less than 10 nm.

[0190] Compared with the transistor shown in FIG. 12 and the like, the transistor shown in FIG. 15 has a conductor 404 A transistor with a large on-current can be realized only in the region overlapping with the conductor 416b. This may be possible.

[0191] The transistor structures shown above are examples, and combinations thereof are also included in the scope of one aspect of the present invention. This is included in the scope of one aspect of the present invention.

[0192] <Semiconductor device> Hereinafter, a semiconductor device according to one aspect of the present invention will be exemplified.

[0193] Hereinafter, an example of a semiconductor device using a transistor according to one aspect of the present invention will be described. This will be described.

[0194] FIG. 16(A) shows a cross-sectional view of a semiconductor device according to one aspect of the present invention. The semiconductor device shown in FIG. 16(A) has a transistor 2200 using a first semiconductor at the lower part and a transistor 2100 using a second semiconductor at the upper part. In FIG. 16(A), as the transistor 2100 using the second semiconductor, an example in which the transistor exemplified in FIG. 11 is applied is shown. The first semiconductor may be a semiconductor having an energy gap different from that of the second semiconductor. For example, the first semiconductor is a semiconductor other than an oxide semiconductor, and the second semiconductor is an oxide semiconductor. As the first semiconductor, silicon, germanium, etc. having a polycrystalline structure or a single crystal structure may be used. This is shown.

[0195] For example, the first semiconductor may be a semiconductor having a strain such as strained silicon. Alternatively, the first semiconductor may be a semiconductor other than an oxide semiconductor, and the second semiconductor may be an oxide semiconductor. As the first semiconductor, silicon, germanium, etc. having a polycrystalline structure or a single crystal structure may be used. For example, silicon, germanium, etc. having a polycrystalline structure or a single crystal structure may be used. Alternatively, a semiconductor having a strain such as strained silicon may be used. Alternatively, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide, silicon applicable to a high electron mobility transistor (HEMT). Germanium or the like may be used. By using these semiconductors for the first semiconductor, a transistor 2200 suitable for high-speed operation can be obtained. Also, by using an oxide semiconductor for the second semiconductor, a transistor 2100 with a small off-current can be obtained.

[0196] Note that the transistor 2200 may be either an n-channel type or a p-channel type, but an appropriate transistor is used depending on the circuit. Also, as the transistor 2100 or / and the transistor 2200, there may be cases where the transistors described above or the transistors shown in FIG. 16(A) do not have to be used.

[0197] The semiconductor device shown in FIG. 16(A) has a transistor 2100 above the transistor 2200 via an insulator 2201 and an insulator 2207. Also, a plurality of conductors 2202 that function as wiring are arranged between the transistor 2200 and the transistor 2100. Further, a plurality of conductors 2203 embedded in various insulators electrically connect the wiring and electrodes arranged in the upper layer and the lower layer, respectively. Also, the semiconductor device has an insulator 2204 on the transistor 2100, a conductor 2205 on the insulator 2204, and a conductor 2206 formed in the same layer (through the same process) as the source electrode and drain electrode of the transistor 2100.

[0198] The insulator 2204 is, for example, a single-layer insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum. ​​​​​​​​​​​​​ Or it may be used in a stacked structure. Note that the insulator 2204 may include an insulator containing nitrogen such as silicon oxynitride or silicon nitride. It may contain an insulator containing nitrogen such as silicon oxynitride or silicon nitride.

[0199] Alternatively, the insulator 2204 may be made of resin. For example, a resin containing polyimide, polyamide, acrylic, silicone, etc. may be used. By using resin, it may not be necessary to planarize the upper surface of the insulator 2204. Also, since resin can form a thick film in a short time, productivity can be improved. Or it may be used in a stacked structure. Note that the insulator 2204 may include an insulator containing nitrogen such as silicon oxynitride or silicon nitride. 4 may not need to be planarized. Also, since resin can form a thick film in a short time, productivity can be improved. Since resin can form a thick film in a short time, productivity can be improved.

[0200] By adopting a structure in which a plurality of transistors are stacked, a plurality of circuits can be arranged at high density. It is possible to arrange a plurality of circuits at high density.

[0201] Here, when single crystal silicon contained in the semiconductor substrate 2211 is used as the first semiconductor used for the transistor 2200, it is preferable that the hydrogen concentration of the insulator near the first semiconductor of the transistor 2200 is high. By terminating the dangling bonds of silicon with this hydrogen, the reliability of the transistor 2200 can be improved. On the other hand, when an oxide semiconductor is used as the second semiconductor used for the transistor 2100, it is preferable that the hydrogen concentration of the insulator near the second semiconductor of the transistor 2100 is low. Since this hydrogen is one of the factors generating carriers in the oxide semiconductor, it may be a factor reducing the reliability of the transistor 2100. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors. When single crystal silicon contained in the semiconductor substrate 2211 is used as the first semiconductor used for the transistor 2200, it is preferable that the hydrogen concentration of the insulator near the first semiconductor of the transistor 2200 is high. By terminating the dangling bonds of silicon with this hydrogen, the reliability of the transistor 2200 can be improved. By terminating the dangling bonds of silicon with this hydrogen, the reliability of the transistor 2200 can be improved. On the other hand, when an oxide semiconductor is used as the second semiconductor used for the transistor 2100, it is preferable that the hydrogen concentration of the insulator near the second semiconductor of the transistor 2100 is low. When an oxide semiconductor is used as the second semiconductor used for the transistor 2100, it is preferable that the hydrogen concentration of the insulator near the second semiconductor of the transistor 2100 is low. Since this hydrogen is one of the factors generating carriers in the oxide semiconductor, it may be a factor reducing the reliability of the transistor 2100. Since this hydrogen is one of the factors generating carriers in the oxide semiconductor, it may be a factor reducing the reliability of the transistor 2100. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors. Since this hydrogen is one of the factors generating carriers in the oxide semiconductor, it may be a factor reducing the reliability of the transistor 2100. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors. Therefore, when stacking the transistor 2200 using single crystal silicon and the transistor 2100 using an oxide semiconductor, arranging the insulator 2207 having a function of blocking hydrogen between them is effective for improving the reliability of both transistors.

[0202] Examples of the insulator 2207 include insulators such as aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, yttria-stabilized zirconia (YSZ), etc., which may be used in a single layer or in a stacked layer.

[0203] Also, it is preferable to form an insulator having a function of blocking hydrogen on top of the transistor 2100 so as to cover the transistor 2100 using an oxide semiconductor. As the insulator, an insulator similar to the insulator 2207 can be used, and in particular, it is preferable to apply aluminum oxide. The aluminum oxide film has a high blocking effect of not allowing the film to permeate both impurities such as hydrogen and moisture and oxygen. Therefore, by using an aluminum oxide film as the insulator 2208 that covers the transistor 2100, it is possible to prevent the desorption of oxygen from the oxide semiconductor contained in the transistor 2100 and to prevent the incorporation of water and hydrogen into the oxide semiconductor.

[0204] Note that the transistor 2200 can be not only a planar-type transistor but also various types of transistors. For example, it can be a FIN (fin) type transistor or the like. An example of a cross-sectional view in that case is shown in FIG. 16(B). An insulator 2212 is disposed on the semiconductor substrate 2211. The semiconductor substrate 2211 has a thin convex portion (also referred to as a fin) at the tip. Note that the convex portion does not have to be thin at the tip, and for example, it may be a convex portion having a substantially rectangular parallelepiped shape or a convex portion having a thick tip. On the convex portion of the semiconductor substrate 2211 A gate insulator 2214 is disposed thereon, and a gate electrode 2213 is disposed thereon. A source region and a drain region 2215 are formed in the semiconductor substrate 2211. In this embodiment, the semiconductor substrate 2211 has a protrusion. The semiconductor device according to the present invention is not limited to the above. For example, a SOI substrate is processed to form a protruding semiconductor device. A conductive region may be formed.

[0205] In the above circuit, if the electrodes of the transistors 2100 and 2200 are connected differently, By using the semiconductor device according to one embodiment of the present invention, various circuits can be configured. An example of a circuit configuration that can be realized by using the device will be described.

[0206] The circuit diagram shown in FIG. 17A includes a p-channel transistor 2200 and an n-channel transistor 2201. Transistor 2100 is connected in series and each gate is connected. 4 shows the configuration of an S inverter.

[0207] The circuit diagram shown in FIG. 17B is that of a transistor 2100 and a transistor 2200. The source and drain of each transistor are connected. It can function as a so-called CMOS analog switch.

[0208] A transistor according to one embodiment of the present invention is used to retain stored contents even when power is not supplied FIG. 18 shows an example of a semiconductor device (memory device) that can hold data and has no limit on the number of times it can be written. As shown in.

[0209] The semiconductor device shown in FIG. 18A includes a transistor 3200 using a first semiconductor and a It has a transistor 3300 using a semiconductor and a capacitor element 3400. Note that as the transistor 3300, the transistors described above can be used.

[0210] The transistor 3300 is a transistor using an oxide semiconductor. Due to the small off current of the transistor 3300, it is possible to hold the stored content at a specific node of the semiconductor device for a long time. That is, it is not necessary to perform a refresh operation, or the frequency of the refresh operation can be made extremely low, resulting in a semiconductor device with low power consumption.

[0211] In FIG. 18(A), the first wiring 3001 is electrically connected to the source of the transistor 3200, and the second wiring 3002 is electrically connected to the drain of the transistor 3200. Also, the third wiring 3003 is electrically connected to one of the source and drain of the transistor 3300, and the fourth wiring 3004 is electrically connected to the gate of the transistor 3300. Then, the gate of the transistor 3200 and the other of the source and drain of the transistor 3300 are electrically connected to one of the electrodes of the capacitor element 3400, and the fifth wiring 3005 is

[0212] electrically connected to the other of the electrodes of the capacitor element 3400. The semiconductor device shown in FIG. 18(A) has the characteristic that the potential of the gate of the transistor 3200 can be held, and thus, as described below, writing,

[0213] holding, and reading of information are possible. First, regarding the writing and holding of information, first, the potential of the fourthSet the potential at which transistor 3300 becomes conductive to make transistor 3300 conductive. . As a result, the potential of the third wiring 3003 is applied to node FG that is electrically connected to the gate of transistor 3200 and one of the electrodes of capacitive element 3400. That is, a predetermined charge is applied to the gate of transistor 3200 (write). Here, it is assumed that either one of charges that give two different potential levels (hereinafter referred to as Low level charge and High level charge) is applied. Thereafter, set the potential of the fourth wiring 3004 to the potential at which transistor 3300 becomes non-conductive to make transistor 3300 non-conductive, whereby the charge is held at node FG (hold). .

[0214] Since the off-current of transistor 3300 is extremely small, the charge at node FG is held over a long period of time.

[0215] Next, the reading of information will be described. When an appropriate potential (read potential) is applied to the fifth wiring 3005 in a state where a predetermined potential (constant potential) is applied to the first wiring 3001, the second wiring 3002 takes a potential corresponding to the amount of charge held at node FG. This is because when transistor 3200 is an n-channel type, the apparent threshold voltage V is lower than the apparent threshold voltage V when a High level charge is applied to the gate of transistor 3200. Here, the apparent threshold voltage refers to the potential of the fifth wiring 3005 required to make transistor 3200 in the th_H "conductive state". Therefore, let the potential of the fifth wiring 3005 be V th_L "conductive state". Therefore, the potential of the fifth wiring 3005 is V ​​​​​​​​​​​​ th_H and V th_L By setting the potential between them to V0, the charge applied to node FG can be determined. For example, in writing, when a high-level charge is applied to node FG, if the potential of the fifth wiring 3005 becomes V0 (> V th_H ), the transistor 3200 enters the "conducting state". On the other hand, when a low-level charge is applied to node FG, even if the potential of the fifth wiring 3005 becomes V0 (< V th_L ), the transistor 3200 remains in the "non-conducting state". Therefore, by determining the potential of the second wiring 3002, the information held in node FG can be read out.

[0216] When the memory cells are arranged in an array, during reading, the information of the desired memory cell must be read. In order not to read the information of other memory cells, a potential at which the transistor 3200 becomes the "non-conducting state" regardless of the charge applied to node FG, that is, a potential lower than V , can be applied to the fifth wiring 3005. Or, a potential at which the transistor 3200 becomes the "conducting state" regardless of the charge applied to node th_H FG, that is, a potential higher than V , can be applied to the fifth wiring 3005. , that is, a potential higher than V th_L can be applied to the fifth wiring 3005.

[0217] The semiconductor device shown in Fig. 18(B) is different from the semiconductor device shown in Fig. 18(A) in that it does not have the transistor 3200. Also in this case, writing and holding operations of information are possible in the same manner as in the semiconductor device shown in Fig. 18(A).

[0218] The reading of information in the semiconductor device shown in Fig. 18(B) will be described. The transistor​​ When the switch 3300 is turned on, the third wiring 3003 in a floating state and the capacitor element 3400 become conductive, and charge is redistributed between the third wiring 3003 and the capacitor element 3400. As a result, the potential of the third wiring 3003 changes. The amount of change in the potential of the third wiring 3003 depends on the potential of one of the electrodes of the capacitor element 3400 (or the charge stored in the capacitor element 3400), and takes different values.

[0219] For example, if the potential of one of the electrodes of the capacitor element 3400 is V, the capacitance of the capacitor element 3400 is C, the capacitance component of the third wiring 3003 is CB, and the potential of the third wiring 3003 before charge redistribution is VB0, then the potential of the third wiring 3003 after charge redistribution is (CB×VB0 + C×V) / (CB + C). Therefore, assuming that the potential of one of the electrodes of the capacitor element 3400 takes two states of V1 and V0 (V1 > V0) as the state of the memory cell, it can be seen that the potential of the third wiring 3003 when holding the potential V1 (=(CB×VB0 + C×V1) / (CB + C)) is higher than the potential of the third wiring 3003 when holding the potential V0 (=(CB×VB0 + C×V0) / (CB + C)).

[0220] Then, information can be read by comparing the potential of the third wiring 3003 with a predetermined potential.

[0221] In this case, a transistor in which the above first semiconductor is applied is used for a drive circuit for driving the memory cell, and a transistor in which the second semiconductor is applied is stacked and arranged on the drive circuit as the transistor 3300.

[0222] ​​​​​​​​​The semiconductor device described above uses a transistor with an extremely small off-current using an oxide semiconductor By applying this, it becomes possible to retain the stored content for a long time. That is, the refresh operation becomes unnecessary, or the frequency of the refresh operation can be made extremely low, so that a semiconductor device with low power consumption can be realized. Also, even when power supply is not available (however, it is preferable that the potential is fixed), it is possible to retain the stored content for a long time.

[0223] In addition, since the semiconductor device does not require a high voltage for writing information, element degradation is less likely to occur. For example, unlike conventional non-volatile memories, electrons are not injected into the floating gate or extracted from the floating gate, so problems such as insulator degradation do not occur. That is, the semiconductor device according to one aspect of the present invention has no limit on the number of rewritable cycles, which is a problem in conventional non-volatile memories, and is a semiconductor device with significantly improved reliability. Furthermore, since information is written depending on the conductive state and non-conductive state of the transistor, high-speed operation is possible.

[0224] <RF tag> Hereinafter, the RF tag including the transistor or the memory device described above will be described with reference to FIG. 19.

[0225] An RF tag according to one aspect of the present invention has a memory circuit inside, stores information in the memory circuit, and performs information exchange with the outside using non-contact means, for example, wireless communication. Due to such characteristics, the RF tag can perform individual authentication for identifying an article by reading the individual information of the article etc. It can be used in systems and the like. Note that high reliability is required for use in these applications. is required.

[0226] The configuration of the RF tag will be described with reference to FIG. 19. FIG. 19 is a block diagram showing a configuration example of the RF tag.

[0227] As shown in FIG. 19, the RF tag 800 has an antenna 8 04 that receives the radio signal 803 transmitted from the antenna 802 connected to the communicator 801 (also called a interrogator, reader / writer, etc.). The RF tag 800 also has a rectifier circuit 805, a constant voltage circuit 806, a demodulation circuit 8 07, a modulation circuit 808, a logic circuit 809, a memory circuit 810, and a ROM 811. Note that, for the semiconductor of the transistor showing the rectifying action included in the demodulation circuit 807, for example, an oxide semiconductor that can sufficiently suppress the reverse current may be used. Thereby, a decrease in the rectifying action due to the reverse current can be suppressed, and saturation of the output of the demodulation circuit can be prevented . That is, the output of the demodulation circuit with respect to the input of the demodulation circuit can be made closer to linear. In addition, the data transmission format is broadly classified into three types: an electromagnetic coupling method in which a pair of coils are arranged opposite to each other and communicate by mutual induction, an electromagnetic induction method in which communication is performed by an induced electromagnetic field, and a radio wave method in which communication is performed using radio waves . The RF tag 800 can be used in any of these methods. . That is, the output of the demodulation circuit with respect to the input of the demodulation circuit can be made closer to linear. Next, the configuration of each circuit will be described. The antenna 804 is for transmitting and receiving the radio signal 803 between the antenna 802 connected to the communicator 801. Also, the rectifier circuit 8 . Next, the configuration of each circuit will be described. The antenna 804 is for transmitting and receiving the radio signal 803 between the antenna 802 connected to the communicator 801. Also, the rectifier circuit 8 05 rectifies the input AC signal generated by receiving the radio signal with the antenna 804

[0228] Next, the configuration of each circuit will be described. The antenna 804 is for transmitting and receiving the radio signal 803 between the antenna 802 connected to the communicator 801. Also, the rectifier circuit 8 05 rectifies the input AC signal generated by receiving the radio signal with the antenna 804 05 rectifies the input AC signal generated by receiving the radio signal with the antenna 804 , for example, half-wave double voltage rectification is performed, and the rectified signal is smoothed by a capacitive element in the subsequent stage. It is a circuit for generating an input potential. Note that a limiter circuit may be provided on the input side or the output side of the rectifier circuit 805. The limiter circuit is a circuit that controls so as not to input power exceeding a certain level to the subsequent circuit when the amplitude of the input AC signal is large and the internally generated voltage is large.

[0229] The constant voltage circuit 806 is a circuit for generating a stable power supply voltage from the input potential and supplying it to each circuit. Note that the constant voltage circuit 806 may have a reset signal generation circuit inside. The reset signal generation circuit is a circuit for generating a reset signal for the logic circuit 809 by utilizing the rise of a stable power supply voltage.

[0230] The demodulation circuit 807 is a circuit for demodulating by envelope detection of the input AC signal and generating a demodulated signal. Also, the modulation circuit 808 is a circuit for performing modulation according to the data output from the antenna 804.

[0231] The logic circuit 809 is a circuit for analyzing and processing the demodulated signal. The memory circuit 810 is a circuit for holding the input information, and has a row decoder, a column decoder, a memory area, etc. Also, the ROM 811 is a circuit for storing a unique number (ID), etc., and outputting according to the processing.

[0232] Note that each of the above circuits can be appropriately selected or discarded.

[0233] Here, the storage device described above can be used for the memory circuit 810. In one aspect of the present invention, Since the memory device can retain information even when the power supply is cut off, it is suitable for RF tags. Furthermore, the memory device according to one aspect of the present invention requires less power (voltage) for writing data compared to conventional non-volatile memories, so it is also possible not to cause a difference in the maximum communication distance between data reading and writing. Moreover, it is possible to suppress malfunctions or incorrect writing due to insufficient power during data writing.

[0234] In addition, the memory device according to one aspect of the present invention can be used as a non-volatile memory, so it can also be applied to the ROM811. In that case, it is preferable for the manufacturer to separately prepare a command for writing data to the ROM811 and prevent users from freely rewriting it. After the manufacturer writes the unique number before shipment and then ships the product, it is possible to assign unique numbers only to the good products to be shipped, rather than to all the manufactured RF tags, so that the unique numbers of the products after shipment are not discontinuous and customer management corresponding to the products after shipment becomes easy.

[0235] <Usage Example of RF Tag> Hereinafter, a usage example of the RF tag according to one aspect of the present invention will be described with reference to FIG. 20. The applications of RF tags are wide-ranging. For example, banknotes, coins, securities, bearer bonds, certificates (see FIG. 20(A) such as driver's licenses and residence cards), packaging containers (see FIG. 20(C) such as wrapping paper and bottles), recording media (see FIG. 20(B) such as DVDs and video tapes), vehicles (see FIG. 20(D) such as bicycles), personal belongings (such as bags and glasses), food products, plants, animals, the human body, clothing, daily necessities, medical products including drugs and medicines, or electronic devices (liquid crystal displays etc.). ​ articles such as display devices, EL display devices, television devices, or mobile phones), or each article It can be used by being provided on a nameplate (see FIGS. 20(E) and 20(F)) attached to the object. It can be done.

[0236] The RF tag 4000 according to one aspect of the present invention is fixed to an article by being pasted on or embedded in the surface. For example, if it is a book, it is embedded in paper, and if it is a package made of an organic resin, it is embedded inside the organic resin and fixed to each article. The RF tag 4000 according to one aspect of the present invention realizes small size, thin thickness, and light weight, so that the design of the article itself is not impaired even after being fixed to the article. In addition, an authentication function can be imparted to banknotes, coins, securities, bearer bonds, or certificates, etc. by the RF tag 4000 according to one aspect of the present invention. By utilizing this authentication function, forgery can be prevented. In addition, by attaching the RF tag 4000 according to one aspect of the present invention to packaging containers, recording media, personal items, food products, clothing, daily necessities, or electronic devices, etc., the efficiency of systems such as inspection systems can be improved. Also, even for vehicles, by attaching the RF tag 4000 according to one aspect of the present invention, the security against theft and the like can be enhanced.

[0237] As described above, the RF tag according to one aspect of the present invention can be used for each of the above-described applications. It can be done.

[0238] <cpu> Hereinafter, a CPU including semiconductor devices such as the above-described transistors and the above-described memory devices will be described. will be described.

[0239] FIG. 21 is a block diagram showing a configuration example of a CPU that partially uses the above-described transistors. is.

[0240] The CPU shown in FIG. 21 includes an ALU 1191 (ALU: Arithmetic ic logic unit, arithmetic circuit), ALU controller 1192, instruction shion decoder 1193, interrupt controller 1194, timing controller 1195, register 1196, register controller 1197, bus interface 1 198 (Bus I / F), rewritable ROM 1199, and ROM interface 1189 (ROM I / F) on a substrate 1190. The substrate 1190 uses a semiconductor substrate, an SOI substrate, a glass substrate, or the like. The ROM 1199 and the ROM interface 1189 may be provided on a separate chip. Of course, the CPU shown in FIG. 21 is only an example shown with its configuration simplified, and an actual CPU has various configurations depending on its application. For example, a configuration including the CPU or the arithmetic circuit shown in FIG. 21 as one core, and including a plurality of such cores, and each core operating in parallel may be used. Also, the number of bits that the CPU can handle with its internal arithmetic circuit and data bus can be, for example, 8 bits, 16 bits, 32 bits, 64 bits, etc. bits, etc. bits, etc. bits, etc.

[0241] Instructions input to the CPU via the bus interface 1198 are input to the instruction decoder 1193, decoded, and then the ALU controller 1192, int Rapture Controller 1194, Register Controller 1197, Timing Controller is input to 1195.

[0242] ALU Controller 1192, Interrupt Controller 1194, Register Controll er 1197, and Timing Controller 1195 perform various controls based on the decoded instructions. Specifically, ALU Controller 1192 generates signals for controlling the operation of ALU 1191. Also, Interrupt Controller 1194 judges and processes interrupt requests from external input / output devices and peripheral circuits during the execution of the CPU program, based on their priority and mask status. Register Controller 1197 generates addresses for Register 1196 and performs

[0243] read and write operations to Register 1196 according to the CPU state. Also, Timing Controller 1195 generates signals for controlling the operation timing of ALU 1191, ALU Controller 1192, Instruction Decoder 1193, Interrupt Controller 1194, and Register Controller 1197. For example, Timing Controller 1195 has an internal clock generation unit that generates internal clock signal CLK2 based on reference clock signal CLK1, and supplies internal clock signal CLK2 to the various circuits above.

[0244] In the CPU shown in FIG. 21, memory cells are provided in Register 1196. As the memory cells of Register 1196, the transistors and storage devices described above can be used .

[0245] In the CPU shown in FIG. 21, Register Controller 1197 is from ALU 1191 According to the instruction, the holding operation in register 1196 is selected. That is, in the memory cells of register 11 96, it is selected whether to hold data by a flip-flop or hold data by a capacitance element. When data holding by a flip-flop is selected, the supply of the power supply voltage to the memory cells in register 1196 is performed . When data holding in the capacitance element is selected, data can be rewritten to the capacitance element, and the supply of the power supply voltage to the memory cells in register 1196 can be stopped . .

[0246] FIG. 22 is an example of a circuit diagram of a memory element 1200 that can be used as register 1196 . The memory element 1200 includes a circuit 1201 in which stored data is volatile when the power supply is cut off, a circuit 1202 in which stored data is non-volatile when the power supply is cut off, a switch 1203, a switch 1204 , a logic element 1206, a capacitance element 1207, and a circuit 1220 having a selection function. The circuit 1202 includes a capacitance element 1208, a transistor 1209, and a transistor 12 10. Note that the memory element 1200 may further include other elements such as a diode, a resistance element, and an inductor as necessary.

[0247] Here, the above-described memory device can be used for the circuit 1202. When the supply of the power supply voltage to the memory element 1200 is stopped, a GND (0V) or a potential at which the transistor 1209 is turned off is continuously input to the gate of the transistor 1209 in the circuit 1202 . For example, the gate of the transistor 1209 is grounded via a load such as a resistor . .

[0248] Switch 1203 is configured using a transistor 1213 of one conductivity type (for example, an n-channel type). Switch 1204 is configured using a transistor 1214 of a conductivity type opposite to the one conductivity type (for example, a p-channel type). An example is shown here. Here, the first terminal of switch 1203 corresponds to one of the source and drain of transistor 1213, and the second terminal of switch 1203 corresponds to the other of the source and drain of transistor 1213. Switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). One of the source and drain of transistor 1209 is electrically connected to one of a pair of electrodes of capacitor element 1208 and to the gate of transistor 1210. Here, this connection part is designated as node M2. One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213) corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). is selected by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). One of the source and drain of transistor 1209 is electrically connected to one of a pair of electrodes of capacitor element 1208 and to the gate of transistor 1210. Here, this connection part is designated as node M2. One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213) corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). One of the source and drain of transistor 1209 is electrically connected to one of a pair of electrodes of capacitor element 1208 and to the gate of transistor 1210. Here, this connection part is designated as node M2. One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213) corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). is selected by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). One of the source and drain of transistor 1209 is electrically connected to one of a pair of electrodes of capacitor element 1208 and to the gate of transistor 1210. Here, this connection part is designated as node M2. One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213)

[0249] One of the source and drain of transistor 1209 is electrically connected to one of a pair of electrodes of capacitor element 1208 and to the gate of transistor 1210. Here, this connection part is designated as node M2. One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213) corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). One of the source and drain of transistor 1210 is electrically connected to a wiring (for example, a GND line) capable of supplying a low power supply potential, and the other is electrically connected to the first terminal of switch 1203 (one of the source and drain of transistor 1213). The second terminal of switch 1203 (the source and drain of transistor 1213) corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). corresponds to the other of the source and drain of transistor 1213, and switch 1203 is controlled by a control signal RD input to the gate of transistor 1213 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1213). The first terminal of switch 1204 corresponds to one of the source and drain of transistor 1214, and the second terminal of switch 1204 corresponds to the other of the source and drain of transistor 1214. Switch 1204 is controlled by a control signal RD input to the gate of transistor 1214 to select conduction or non-conduction between the first terminal and the second terminal (that is, the conduction state or non-conduction state of transistor 1214). The other party) is electrically connected to one of the source and drain of the transistor 1214 at the first terminal of the switch 1204. The second terminal of the switch 1204 (the other of the source and drain of the transistor 1214) is electrically connected to a wiring capable of supplying the power supply potential VDD. The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213), the first terminal of the switch 1204 (one of the source and drain of the transistor 1214), the input terminal of the logic element 1206, and one of the pair of electrodes of the capacitor element 1207 are electrically connected. Here, the connection part is defined as the node M1. The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213), the first terminal of the switch 1204 (one of the source and drain of the transistor 1214), the input terminal of the logic element 1206, and one of the pair of electrodes of the capacitor element 1207 are electrically connected. Here, the connection part is defined as the node M1. The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213), the first terminal of the switch 1204 (one of the source and drain of the transistor 1214), the input terminal of the logic element 1206, and one of the pair of electrodes of the capacitor element 1207 are electrically connected. Here, the connection part is defined as the node M1. The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213), the first terminal of the switch 1204 (one of the source and drain of the transistor 1214), the input terminal of the logic element 1206, and one of the pair of electrodes of the capacitor element 1207 are electrically connected. Here, the connection part is defined as the node M1. The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213), the first terminal of the switch 1204 (one of the source and drain of the transistor 1214), the input terminal of the logic element 1206, and one of the pair of electrodes of the capacitor element 1207 are electrically connected. Here, the connection part is defined as the node M1. The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1207 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1207 is electrically connected to a wiring capable of supplying a low power supply potential (for example, a GND line). The other of the pair of electrodes of the capacitor element 1208 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1207 is electrically connected to a wiring capable of supplying a low power supply potential (for example, a GND line). The other of the pair of electrodes of the capacitor element 1208 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1208 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1208 can be configured to input a constant potential. For example, it can be configured to input a low power supply potential (such as GND) or a high power supply potential (such as VDD). The other of the pair of electrodes of the capacitor element 1208 is electrically connected to a wiring capable of supplying a low power supply potential (for example, a GND line). The other of the pair of electrodes of the capacitor element 1208 is electrically connected to a wiring capable of supplying a low power supply potential (for example, a GND line).

[0250] Note that the capacitor element 1207 and the capacitor element 1208 can also be omitted by actively using the parasitic capacitances of transistors and wirings, etc. Note that the capacitor element 1207 and the capacitor element 1208 can also be omitted by actively using the parasitic capacitances of transistors and wirings, etc.

[0251] The control signal WE is input to the gate of the transistor 1209. The switches 1203 and The switch 1204 selects the conductive state or non-conductive state between the first terminal and the second terminal by a control signal RD different from the control signal WE. When the first terminal and the second terminal of one switch are in the conductive state, the first terminal and the second terminal of the other switch are in the non-conductive state.

[0252] A signal corresponding to the data held in the circuit 1201 is input to the other of the source and drain of the transistor 1209. In FIG. 22, an example is shown in which the signal output from the circuit 1201 is input to the other of the source and drain of the transistor 1209. The signal output from the second terminal (the other of the source and drain of the transistor 1213) of the switch 1203 becomes an inverted signal whose logical value is inverted by the logic element 1206 and is input to the circuit 1201 via the circuit 1220. Note that in FIG. 22, an example is shown in which the signal output from the second terminal (the other of the source and drain of the transistor 1213) of the switch 1203 is input to the circuit 1201 via the logic element 1206 and the circuit 1220, but it is not limited to this. The signal output from the second terminal (the other of the source and drain of the transistor 1213) of the switch 1203 may be input to the circuit 1201 without inverting its logical value. For example, when there is a node in the circuit 1201 that holds a signal whose logical value is inverted from the signal input from the input terminal,

[0253] the signal output from the second terminal (the other of the source and drain of the transistor 1213) of the switch 1203 can be input to the node. Also, in FIG. 22, among the transistors used in the memory element 1200, (the other of the source and drain of the transistor 1213) of the switch 1203 if there is a node in the circuit 1201 that holds a signal whose logical value is inverted from the signal input from the input terminal, the signal output from the second terminal (the other of the source and drain of the transistor 1213) of the switch 1203 can be input to the node.

[0254] Also, in FIG. 22, among the transistors used in the memory element 1200,​​​​ Transistors other than the transistor 1209 can be transistors in which a channel is formed in a film or substrate 119 made of a semiconductor other than an oxide semiconductor. It can be a transistor in which a channel is formed at 0. For example, it can be a transistor in which a channel is formed in a silicon or silicon substrate. Also, all the transistors used in the memory element 1 200 can also be transistors in which a channel is formed of an oxide semiconductor. Alternatively, the memory element 1200 may include, in addition to the transistor 1209, a transistor in which a channel is formed of an oxide semiconductor, and the remaining transistors can be transistors in which a channel is formed in a layer or substrate 1190 made of a semiconductor other than an oxide semiconductor.

[0255] For the circuit 1201 in FIG. 22, for example, a flip-flop circuit can be used. Also, as the logic element 1206, for example, an inverter, a clocked inverter, or the like can be used.

[0256] In the semiconductor device according to one aspect of the present invention, while the power supply voltage is not supplied to the memory element 1200, the data stored in the circuit 1201 can be held by the capacitive element 1208 provided in the circuit 1202.

[0257] Also, the off-current of a transistor in which a channel is formed in an oxide semiconductor is extremely small. For example, the off-current of a transistor in which a channel is formed in an oxide semiconductor is significantly smaller than the off-current of a transistor in which a channel is formed in crystalline silicon. Therefore, by using the transistor as the transistor 1209, the signal held in the capacitive element 1208 can be maintained for a long period even while the power supply voltage is not supplied to the memory element 12 00. ​ is maintained. Thus, the memory element 1200 can hold the memory content (data even while the supply of the power voltage is stopped.)

[0258] Also, by providing the switch 1203 and the switch 1204, since it is a memory element characterized by performing a precharge operation, after the resumption of the power voltage supply, the time until the circuit 1201 resumes holding the original data can be shortened.) the circuit 1201 can shorten the time until it resumes holding the original data.)

[0259] Also, in the circuit 1202, the signal held by the capacitive element 1208 is input to the gate of the transistor 1210. Therefore, after the supply of the power voltage to the memory element 1200 is resumed, the signal held by the capacitive element 1208 can be converted into the state (conductive state or non - conductive state) of the transistor 1210 and read out from the circuit 1202. Therefore, even if the potential corresponding to the signal held by the capacitive element 1208 fluctuates somewhat, the original signal can be accurately read out.) After the supply of the power voltage to the memory element 1200 is resumed, the signal held by the capacitive element 1208 can be converted into the state ( conductive state or non - conductive state) of the transistor 1210 and read out from the circuit 1202. Therefore, even if the potential corresponding to the signal held by the capacitive element 1208 fluctuates somewhat, the original signal can be accurately read out.) conductive state or non - conductive state) of the transistor 1210 and read out from the circuit 1202. Therefore, even if the potential corresponding to the signal held by the capacitive element 1208 fluctuates somewhat, the original signal can be accurately read out.) Therefore, even if the potential corresponding to the signal held by the capacitive element 1208 fluctuates somewhat, the original signal can be accurately read out.) signal can be accurately read out.)

[0260] By using such a memory element 1200 in a memory device such as a register or a cache memory possessed by a processor, it is possible to prevent the loss of data in the memory device due to the stop of the power voltage supply.) Also, after the resumption of the power voltage supply, it can return to the state before the power supply stop in a short time.) Therefore, in the entire processor or one or a plurality of logic circuits constituting the processor, since the power supply can be stopped even for a short time, the power consumption can be suppressed.) Although an example of using the memory element 1200 in a CPU has been described, the memory element 1200 can be used in a DSP ( suppressed.)

[0261] Although an example of using the memory element 1200 in a CPU has been described, the memory element 1200 can be used in a DSP ( Digital Signal Processor), custom LSI, LSI such as PLD (Pr ogrammable Logic Device), and can also be applied to RF-ID (Radi o Frequency Identification).

[0262] <Display device> Hereinafter, a configuration example of a display device according to an aspect of the present invention will be described.

[0263] [Configuration example] FIG. 23(A) shows a top view of a display device according to an aspect of the present invention. Also, FIG. 23(B) shows a pixel circuit in the case where a liquid crystal element is used for a pixel of a display device according to an aspect of the present invention. Also, FIG. 23(C) shows a pixel circuit in the case where an organic EL element is used for a pixel of a display device according to an aspect of the present invention.

[0264] As the transistor used for the pixel, the above-described transistor can be used. Here, an example using an n-channel type transistor is shown. Note that the transistor used for the pixel and the transistor manufactured through the same process may be used as a drive circuit. In this way, by using the above-described transistor for the pixel and the drive circuit, a display device with high display quality and / or high reliability can be obtained.

[0265] An example of a top view of an active matrix type display device is shown in FIG. 23(A). On the substrate 5000 of the display device, a pixel portion 5001, a first scan line drive circuit 5002, a second scan line drive circuit 5003, and a signal line drive circuit 5004 are arranged. The pixel portion 5001 is electrically connected to the signal line drive circuit 5004 by a plurality of signal lines and to the first scan line by a plurality of scan lines ​It is electrically connected to the drive circuit 5002 and the second scanning line drive circuit 5003. Note that Pixels each having a display element are arranged in regions separated by scanning lines and signal lines. Also, the substrate 5000 of the display device is electrically connected to a timing control circuit (also referred to as a controller or control IC) via a connection portion such as an FPC (Flexible Printed Circuit).

[0266] The first scanning line drive circuit 5002, the second scanning line drive circuit 5003, and the signal line drive circuit 5004 are formed on the same substrate 5000 as the pixel portion 5001. Therefore, compared with the case of separately manufacturing the drive circuit, the cost of manufacturing the display device can be reduced. Also, when the drive circuit is separately manufactured, the number of connections between wirings increases. Therefore, by providing the drive circuit on the same substrate 5000, the number of connections between wirings can be reduced, and the reliability can be improved, and / or the yield can be improved.

[0267] [Liquid Crystal Display Device] Also, an example of the circuit configuration of a pixel is shown in FIG. 23(B). Here, a pixel circuit applicable to pixels of a VA type liquid crystal display device and the like is shown.

[0268] This pixel circuit can be applied to a configuration in which a plurality of pixel electrodes are provided in one pixel. Each pixel electrode is connected to a different transistor, and each transistor is configured to be drivable by a different gate signal. Thereby, the signal applied to each pixel electrode of a pixel designed with a multi-domain can be independently controlled.

[0269] The gate wiring 5012 of the transistor 5016 and the gate wiring 50 of the transistor 5017 ​​​​​​​​​​​13 is separated so that different gate signals can be applied. On the other hand, data The source electrode or drain electrode 5014 functioning as a data line is commonly used by the transistor 5016 and the transistor 5017. The transistors 5016 and 50 17 can be appropriately used as the above-described transistors. Thereby, a liquid crystal display device with high display quality and / or high reliability can be provided.

[0270] The shape of the first pixel electrode electrically connected to the transistor 5016 and the shape of the second pixel electrode electrically connected to the transistor 5017 will be described. The first pixel electrode and the second pixel electrode are separated by a slit. The first pixel electrode has a shape that spreads in a V shape, and the second pixel electrode is formed so as to surround the outside of the first pixel electrode.

[0271] The gate electrode of the transistor 5016 is electrically connected to the gate wiring 5012, and the gate electrode of the transistor 5017 is electrically connected to the gate wiring 5013. Different gate signals are applied to the gate wiring 5012 and the gate wiring 5013 to make the operation timings of the transistor 5016 and the transistor 5017 different, and the liquid crystal alignment can be controlled.

[0272] Also, a capacitive element may be formed by the capacitive wiring 5010, the gate insulator functioning as a dielectric, and the capacitive electrode electrically connected to the first pixel electrode or the second pixel electrode.

[0273] The multi-domain structure includes a first liquid crystal element 5018 and a second liquid crystal element 5019 in one pixel. The first liquid crystal element 5018 is composed of the first pixel electrode, the counter electrode, and the liquid crystal layer therebetween. The second liquid crystal element 5019 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer therebetween. It is.

[0274] Note that the display device according to one aspect of the present invention is not limited to the pixel circuit shown in FIG. 23(B). For example, a switch, a resistance element, a capacitance element, a transistor, a sensor, or a logic circuit, etc. may be newly added to the pixel circuit shown in FIG. 23(B). It may be added.

[0275] 〔Organic EL display device〕 Another example of the circuit configuration of a pixel is shown in FIG. 23(C). Here, the pixel structure of a display device using an organic EL element is shown. It shows.

[0276] In the organic EL element, by applying a voltage to the light-emitting element, electrons are injected from one of a pair of electrodes of the organic EL element into the layer containing the light-emitting organic compound, and holes are injected from the other, and a current flows. Then, when the electrons and holes recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. Electrons are injected from one of a pair of electrodes of the organic EL element into the layer containing the light-emitting organic compound, and holes are injected from the other, and a current flows. Then, when the electrons and holes recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. And when the electrons and holes recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. And when the excited state returns to the ground state, light is emitted. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0277] FIG. 23(C) is a diagram showing an example of a pixel circuit. Here, an example of using two n-channel type transistors for one pixel is shown. Note that the above-described transistors can be used for the n-channel type transistors. Also, the pixel circuit can apply digital time gradation driving. It shows an example of using two n-channel type transistors for one pixel. Note that the above-described transistors can be used for the n-channel type transistors. Also, the pixel circuit can apply digital time gradation driving. It can be applied.

[0278] The configuration of the applicable pixel circuit and the operation of the pixel when digital time gradation driving is applied will be described. It will be described.

[0279] Pixel 5020 includes a switching transistor 5021, a driving transistor 5022, a light-emitting element 5024, and a capacitor element 5023. The switching transistor 5021 has its gate electrode connected to the scanning line 5026, one of its first electrodes (either the source electrode or the drain electrode) connected to the signal line 5025, and the other of its second electrodes (either the source electrode or the drain electrode) connected to the gate electrode of the driving transistor 5022. The driving transistor 5022 has its gate electrode connected to the power supply line 5027 via the capacitor element 5023, its first electrode connected

[0280] to the power supply line 5027, and its second electrode connected to the first electrode (pixel electrode) of the light-emitting element 5024. The second electrode of the light-emitting element 5024 corresponds to

[0281] the common electrode 5028. The common electrode 5028 is electrically connected to a common potential line formed on the same substrate. The switching transistor 5021 and the driving transistor 5022 can use the transistors described above. As a result, an organic EL display device with high display quality and / or high reliability can be obtained. The potential of the second electrode (common electrode 5028) of the light-emitting element 5024 is set to a low power supply

[0282] Note that the capacitive element 5023 may be omitted by substituting the gate capacitance of the driving transistor 5022. Regarding the gate capacitance of the driving transistor 5022, a capacitance may be formed between the channel formation region and the gate electrode. Next, the signal input to the driving transistor 5022 will be described. In the case of the voltage input voltage driving method, a binary signal that causes the driving transistor 5022 to be in one of two states, on or off, is input to the driving transistor 5022. In order to operate the driving transistor 5022 in the linear region, a voltage higher than the voltage of the power supply line 5027 is applied to the gate electrode of the driving transistor 5022. Also, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 5022 to the power supply line voltage is applied to the signal line 5025.

[0283] Next, the signal input to the driving transistor 5022 will be described. In the case of the voltage input voltage driving method, a binary signal that causes the driving transistor 5022 to be in one of two states, on or off, is input to the driving transistor 5022. In the case of the voltage input voltage driving method, a binary signal that causes the driving transistor 5022 to be in one of two states, on or off, is input to the driving transistor 5022. Note that, in order to operate the driving transistor 5022 in the linear region, a voltage higher than the voltage of the power supply line 5027 is applied to the gate electrode of the driving transistor 5022. Also, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 5022 to the power supply line voltage is applied to the signal line 5025. 2 is input to the driving transistor 5022. Also, in order to operate the driving transistor 5022 in the linear region, a voltage higher than the voltage of the power supply line 5027 is applied to the gate electrode of the driving transistor 5022. Also, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 5022 to the power supply line voltage is applied to the signal line 5025. voltage is applied.

[0284] When performing analog gradation driving, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 5022 to the forward voltage of the light emitting element 5024 is applied to the gate electrode of the driving transistor 5022. Note that a video signal is input so that the driving transistor 5022 operates in the saturation region, and a current is passed through the light emitting element 5024. Also, in order to operate the driving transistor 5022 in the saturation region, the potential of the power supply line 5027 is made higher than the gate potential of the driving transistor 5022. By making the video signal analog, a current corresponding to the video signal can be passed through the light emitting element 5024, and analog gradation driving can be performed. When performing analog gradation driving, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 5022 to the forward voltage of the light emitting element 5024 is applied to the gate electrode of the driving transistor 5022. Note that a video signal is input so that the driving transistor 5022 operates in the saturation region, and a current is passed through the light emitting element 5024. Also, in order to operate the driving transistor 5022 in the saturation region, the potential of the power supply line 5027 is made higher than the gate potential of the driving transistor 5022. By making the video signal analog, a current corresponding to the video signal can be passed through the light emitting element 5024, and analog gradation driving can be performed. voltage, and analog gradation driving can be performed.

[0285] Note that the display device according to one aspect of the present invention is not limited to the pixel configuration shown in FIG. 23(C). ​​​​​​For example, a switch, a resistive element, a capacitive element, a sensor, a transistor, or a logic circuit, etc. may be added to the pixel circuit shown in Fig. 23(C).

[0286] When applying the transistor described above to the circuit illustrated in Fig. 23, a source electrode ( the first electrode) is electrically connected to the low potential side, and a drain electrode (the second electrode) is electrically connected to the high potential side, respectively, to form a configuration. Further, the potential of the first gate electrode is controlled by a control circuit or the like, and a potential such as a potential lower than the potential applied to the source electrode can be input to the second gate electrode, and a configuration may be adopted that enables input of the potential exemplified above.

[0287] For example, in this specification and the like, a display element, a display device that is a device having the display element, a light-emitting element, and a light-emitting device that is a device having the light-emitting element can use various forms or have various elements. The display element, the display device, the light-emitting element, or the light-emitting device can be, for example, an EL element (an EL element including an organic and an inorganic substance, an organic EL element, an inorganic EL element), an LED (a white LED, a red LED, a green LED, a blue LED, etc.), a transistor (a transistor that emits light in response to current), an electron-emitting element, a liquid crystal element, electronic ink, an electrophoretic element, a grating light valve (GLV), a plasma display panel (PDP), a display element using MEMS (micro electro mechanical system), a digital micromirror device (DMD), a digital micro shutter (DMS), an IMOD (interference modulation) element, a shutter-type MEMS display element, a light interference-type MEMS display element, an electro-wetting element, a piezoelectric ceramic display, a display element using a carbon nanotube, etc., and has at least one of them. (interference modulation) element, a shutter-type MEMS display element, a light interference-type MEMS display element, an electro-wetting element, a piezoelectric ceramic display, a display element using a carbon nanotube, etc., and has at least one of them. ​​​​ In addition, electrical or magnetic effects can be used to improve contrast, brightness, reflectance, and transmittance. The display device may have a display medium in which the light-emitting diode (EL) element changes. An example of a display device using electron emission elements is a field emission display. Field Emission Display (FED) or Single Edge Displacement (SED) Flat Panel Display :Surface-conduction Electron-emitter Dis An example of a display device using liquid crystal elements is a liquid crystal display ( Transmissive LCD, Semi-transmissive LCD, Reflective LCD, Direct-view LCD LCD, liquid crystal display, projection LCD, etc. Electronic ink, or electrophoretic An example of a display device using the element is electronic paper. In order to realize a reflective LCD or a reflective liquid crystal display, some or all of the pixel electrodes are For example, a part or the whole of the pixel electrode may be formed as a reflective electrode. The material may be aluminum, silver, or the like. In this case, the area under the reflective electrode may be It is also possible to provide a memory circuit such as an SRAM in addition to the EEPROM. This will further reduce power consumption. can be reduced.

[0288] In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) is white light (W In order to display full color on a display device, a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B) , yellow (Y), etc. can be used in appropriate combination. Color reproducibility can be improved compared to the case where no coloring layer is used. At this time, by arranging the region having the coloring layer and the region not having the coloring layer, white light in the region not having the coloring layer can be directly used for display. By arranging a region that does not have a coloring layer in part, the decrease in luminance due to the coloring layer can be reduced during bright display, and the power consumption can be reduced by about 20% to 30%. However, when performing full-color display using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having their respective emission colors. By using a self-luminous element, the power consumption may be further reduced compared to the case where a coloring layer is used. By arranging the region having the coloring layer and the region not having the coloring layer, white light in the region not having the coloring layer can be directly used for display. By arranging a region that does not have a coloring layer in part, the decrease in luminance due to the coloring layer can be reduced during bright display, and the power consumption can be reduced by about 20% to 30%. However, when performing full-color display using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having their respective emission colors. By arranging a region that does not have a coloring layer in part, the decrease in luminance due to the coloring layer can be reduced during bright display, and the power consumption can be reduced by about 20% to 30%. However, when performing full-color display using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having their respective emission colors. By using a self-luminous element, the power consumption may be further reduced compared to the case where a coloring layer is used. However, when performing full-color display using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having their respective emission colors. By using a self-luminous element, the power consumption may be further reduced compared to the case where a coloring layer is used. By using a self-luminous element, the power consumption may be further reduced compared to the case where a coloring layer is used.

[0289] <Module> Hereinafter, a display module to which a semiconductor device according to one aspect of the present invention is applied will be described with reference to FIG. 24. Hereinafter, a display module to which a semiconductor device according to one aspect of the present invention is applied will be described with reference to FIG. 24.

[0290] The display module 8000 shown in FIG. 24 includes a touch panel 8004 connected to an FPC 8003, a cell 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed circuit board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. Note that there may be a case where the backlight unit 8007, the battery 8011, the touch panel 8004, etc. are not included. The display module 8000 shown in FIG. 24 includes a touch panel 8004 connected to an FPC 8003, a cell 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed circuit board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. The display module 8000 shown in FIG. 24 includes a touch panel 8004 connected to an FPC 8003, a cell 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed circuit board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. The display module 8000 shown in FIG. 24 includes a touch panel 8004 connected to an FPC 8003, a cell 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed circuit board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. Note that there may be a case where the backlight unit 8007, the battery 8011, the touch panel 8004, etc. are not included. Note that there may be a case where the backlight unit 8007, the battery 8011, the touch panel 8004, etc. are not included.

[0291] A semiconductor device according to one aspect of the present invention can be used for, for example, the cell 8006.

[0292] The upper cover 8001 and the lower cover 8002 can be appropriately changed in shape and dimensions according to the sizes of the touch panel 8004 and the cell 8006. The upper cover 8001 and the lower cover 8002 can be appropriately changed in shape and dimensions according to the sizes of the touch panel 8004 and the cell 8006.

[0293] The touch panel 8004 can be used by superimposing a touch panel of a resistive film type or a capacitive type on the cell 8006 It is also possible to provide the touch panel function on the counter substrate (sealing substrate) of the cell 8006. Or, an optical sensor may be provided in each pixel of the cell 8006 to form an optical touch panel. Or, a touch sensor electrode may be provided in each pixel of the cell 8006 to form a capacitive touch panel. It is also possible to provide the touch panel function on the counter substrate (sealing substrate) of the cell 8006. Or, an optical sensor may be provided in each pixel of the cell 8006 to form an optical touch panel. Or, a touch sensor electrode may be provided in each pixel of the cell 8006 to form a capacitive touch panel. It is also possible to provide the touch panel function on the counter substrate (sealing substrate) of the cell 8006. Or, an optical sensor may be provided in each pixel of the cell 8006 to form an optical touch panel. Or, a touch sensor electrode may be provided in each pixel of the cell 8006 to form a capacitive touch panel. It is also possible to provide the touch panel function on the counter substrate (sealing substrate) of the cell 8006. Or, an optical sensor may be provided in each pixel of the cell 8006 to form an optical touch panel. Or, a touch sensor electrode may be provided in each pixel of the cell 8006 to form a capacitive touch panel. It is also possible to provide the touch panel function on the counter substrate (sealing substrate) of the cell 8006. Or, an optical sensor may be provided in each pixel of the cell 8006 to form an optical touch panel. Or, a touch sensor electrode may be provided in each pixel of the cell 8006 to form a capacitive touch panel.

[0294] The backlight unit 8007 has a light source 8008. The light source 8008 may be provided at the end of the backlight unit 8007, and a light diffusion plate may be used. The backlight unit 8007 has a light source 8008. The light source 8008 may be provided at the end of the backlight unit 8007, and a light diffusion plate may be used.

[0295] In addition to the protection function of the cell 8006, the frame 8009 may have a function as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed circuit board 8010. The frame 8009 may also have a function as a heat sink. In addition to the protection function of the cell 8006, the frame 8009 may have a function as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed circuit board 8010. The frame 8009 may also have a function as a heat sink. In addition to the protection function of the cell 8006, the frame 8009 may have a function as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed circuit board 8010. The frame 8009 may also have a function as a heat sink.

[0296] The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As the power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply by a separately provided battery 8011 may be used. When using a commercial power supply, the battery 8011 may not be provided. The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As the power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply by a separately provided battery 8011 may be used. When using a commercial power supply, the battery 8011 may not be provided. The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As the power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply by a separately provided battery 8011 may be used. When using a commercial power supply, the battery 8011 may not be provided. The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As the power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply by a separately provided battery 8011 may be used. When using a commercial power supply, the battery 8011 may not be provided.

[0297] In addition, members such as a polarizing plate, a retardation plate, and a prism sheet may be additionally provided in the display module 8000. In addition, members such as a polarizing plate, a retardation plate, and a prism sheet may be additionally provided in the display module 8000.

[0298] <Electronic device> A semiconductor device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium. It can be used in an image playback device (typically a device having a display capable of playing a recording medium such as a DVD: Digital Versatile Disc and displaying the image). In addition, electronic devices that can use the semiconductor device according to one aspect of the present invention include mobile phones, game machines including portable types, portable data terminals, electronic book terminals, video cameras , cameras such as digital still cameras, goggle-type displays (head-mounted displays ), navigation systems, audio playback devices (such as car audio, digital audio players), copiers, facsimiles, printers, printer multifunction devices, automated teller machines (ATMs), vending machines, and the like. Specific examples of these electronic devices are shown in FIG. 25.

[0299] FIG. 25(A) is a portable game machine, which has a housing 901, a housing 902, a display unit 903, a display unit 904, a microphone 905, a speaker 906, operation keys 907, a stylus 908 , etc. Note that the portable game machine shown in FIG. 25(A) has two display units 903 and a display unit 904, but the number of display units of the portable game machine is not limited to this.

[0300] FIG. 25(B) is a portable data terminal, which has a first housing 911, a second housing 912, a first display unit 9 13, a second display unit 914, a connection unit 915, operation keys 916, etc. The first display unit 913 is provided in the first housing 911, and the second display unit 914 is provided in the second housing 912. And the first housing 911 and the second housing 912 are connected by a connection unit 915. The angle between the first housing 911 and the second housing 912 can be changed by the connection part 915. . The video on the first display part 913 may be switched according to the angle between the first housing 911 and the second housing 9 12 at the connection part 915. Also, at least one of the first display part 913 and the second display part 914 may use a display device with a function as a position input device. Note that the function as a position input device can be added by providing a touch panel on the display device. Or, the function as a position input device can also be added by providing a photoelectric conversion element, also called a photosensor, in the pixel part of the display device.

[0301] Figure 25(C) is a notebook personal computer, which has a housing 921, a display part 922, a keyboard 923, a pointing device 924, etc.

[0302] Figure 25(D) is an electric refrigerator-freezer, which has a housing 931, a refrigerator door 932, a freezer door 93 3, etc.

[0303] Figure 25(E) is a video camera, which has a first housing 941, a second housing 942, a display part 943, operation keys 944, a lens 945, a connection part 946, etc. The operation keys 944 and the lens 945 are provided on the first housing 941, and the display part 943 is provided on the second housing 942. And the first housing 941 and the second housing 942 are connected by the connection part 946, and the angle between the first housing 941 and the second housing 942 can be changed by the connection part 946. The video on the display part 943 may be switched according to the angle between the first housing 941 and the second housing 94 2 at the connection part 946. ​​​​​​

[0304] Figure 25(F) is an ordinary automobile and has a vehicle body 951, wheels 952, a dashboard 953, a wiper 954, etc. and so on.

[0305] <Electronic device having a curved surface in a display area or a light-emitting area> Hereinafter, an electronic device having a curved surface in a display area or a light-emitting area, which is an example of an electronic device according to an aspect of the present invention, will be described with reference to FIG. 26. Here, as an example of the electronic device, an information device, particularly a portable information device (portable device) will be described. Examples of the portable information device include, for example, a mobile phone (tablet, smartphone (smartphone)), a tablet terminal (slate PC), and the like. and so on. Figure 26(A-1) is a perspective view for explaining the outer shape of the portable device 1300A. Figure 26(A-2) is a top view of the portable device 1300A. Figure 26(A-3) is a view for explaining the usage state of the portable device 1300A. and so on. and so on.

[0306] Figures 26(B-1) and 26(B-2) are perspective views for explaining the outer shape of the portable device 1300B. and so on. and so on.

[0307] Figures 26(C-1) and 26(C-2) are perspective views for explaining the outer shape of the portable device 1300C. and so on.

[0308] and so on. and so on.

[0309] <Portable device> The portable device 1300A has one or more functions selected from functions such as, for example, a telephone, creation / browsing of an e-mail, a memo, or information browsing. and so on.

[0310] The portable device 1300A is provided with a display unit along a plurality of surfaces of the housing. For example, A display device having a certain property may be provided by arranging it along the inner side of the housing. . Thereby, character information, image information, etc. can be displayed in the first region 1311 and / or the second region 1312.

[0311] For example, an image for three operations can be displayed in the first region 1311 (see Fig. 26(A-1)). Also, as shown by the dashed rectangle in the figure, character information, etc. can be displayed in the second region 1312 (see Fig. 26(A-2)).

[0312] When the second region 1312 is arranged at the upper part of the portable device 1300A, the user can easily confirm the characters and image information displayed in the second region 1312 of the portable device 1300A while the portable device 1300A is stored in the breast pocket of the clothes (see Fig. 26(A-3) ). For example, the phone number or name of the caller of an incoming call can be observed from above the portable device 130 0A. Note that the portable device 1300A may have an input device, etc. between the display device and the housing, inside the display device, or on the housing. The input device may use, for example, a touch sensor, an optical sensor, an ultrasonic sensor, etc. When the input device is arranged between the display device and the housing or on the housing, a touch panel such as a matrix switch method, a resistive film method, an ultrasonic surface acoustic wave method, an infrared method, an electromagnetic induction

[0313] method, or a capacitance method may be used. Also, when the input device is arranged inside the display device, an in-cell type sensor, an on-cell type sensor, etc. may be used . .

[0314]

[0314] Note that the mobile device 1300A includes a vibration sensor and a storage device that stores a program for shifting to a mode of rejecting an incoming call based on the vibration detected by the vibration sensor or the like. Thus, the user can shift to the mode of rejecting an incoming call by lightly tapping the mobile device 1300A from above the clothes to apply vibration.

[0315] The mobile device 1300B has a display unit having a first region 1311 and a second region 1312, and a housing 1310 that supports the display unit.

[0316] The housing 1310 includes a plurality of bent portions, and the longest bent portion included in the housing 1310 is sandwiched between the first region 1311 and the second region 1312.

[0317] The mobile device 1300B can be used with the second region 1312 provided along the longest bent portion facing the side.

[0318] The mobile device 1300C has a display unit having a first region 1311 and a second region 1312, and a housing 1310 that supports the display unit.

[0319] The housing 1310 includes a plurality of bent portions, and the second longest bent portion included in the housing 1310 is sandwiched between the first region 1311 and the second region 1312.

[0320] The mobile device 1300C can be used with the second region 1312 facing upward.

Explanation of Reference Numerals

[0321] 102 Insulator 104 Conductor 106a Semiconductor 106b Semiconductor 106c Semiconductor ​​​​​​​108 Insulator 112 Insulator 116a Conductor 116b Conductor 124a Region 124b Region 400 Substrate 402 Insulator 404 Conductor 405 Conductor 406a Semiconductor 406b Semiconductor 406c Semiconductor 408 Insulator 412 Insulator 413 Conductor 416a Conductor 416b Conductor 418 Insulator 424a Conductor 424b Conductor 426a Conductor 426b Conductor 428 Insulator 800 RF Tag 801 Communicator 802 Antenna 803 Radio Signal 804 Antenna 805 Rectifier Circuit 806 Constant Voltage Circuit 807 Demodulation Circuit 808 Modulation Circuit 809 Logic Circuit 810 Memory Circuit 811 ROM 901 Housing 902 Housing 903 Display Unit 904 Display Unit 905 Microphone 906 Speaker 907 Operation Key 908 Stylus 911 Housing 912 Housing 913 Display Unit 914 Display Unit 915 Connection Part 916 Operation key 921 Housing 922 Display unit 923 Keyboard 924 Pointing device 931 Housing 932 Refrigerator door 933 Freezer door 941 Housing 942 Housing 943 Display unit 944 Operation key 945 Lens 946 Connection part 951 Vehicle body 952 Wheel 953 Dashboard 954 Light 1189 ROM interface 1190 Substrate 1191 ALU 1192 ALU controller 1193 Instruction decoder 1194 Interrupt controller 1195 Timing controller 1196 Register 1197 Register controller 1198 Bus interface 1199 ROM 1200 Memory element 1201 Circuit 1202 Circuit 1203 Switch 1204 Switch 1206 Logic element 1207 Capacitance element 1208 Capacitance element 1209 Transistor 1210 Transistor 1213 Transistor 1214 Transistor 1220 Circuit 1300A Portable device 1300B Portable device 1300C Mobile device 1310 Housing 1311 Area 1312 Area 2100 Transistor 2200 Transistor 2201 Insulator 2202 Conductor 2203 Conductor 2204 Insulator 2205 Conductor 2206 Conductor 2207 Insulator 2208 Insulator 2211 Semiconductor substrate 2212 Insulator 2213 Gate electrode 2214 Gate insulator 2215 Source region and drain region 3001 Wiring 3002 Wiring 3003 Wiring 3004 Wiring 3005 Wiring 3200 Transistor 3300 Transistor 3400 Capacitor element 4000 RF tag 5000 Substrate 5001 Pixel section 5002 Scanning line drive circuit 5003 Scanning line drive circuit 5004 Signal line drive circuit 5010 Capacitive wiring 5012 Gate wiring 5013 Gate wiring 5014 Drain electrode 5016 Transistor 5017 Transistor 5018 Liquid crystal element 5019 Liquid crystal element 5020 Pixel 5021 Switching transistor 5022 Driving transistor 5023 Capacitance element 5024 Light-emitting element 5025 Signal line 5026 Scanning line 5027 Power supply line 5028 Common electrode 5100 Pellet 5120 Substrate 5161 Region 8000 Display module 8001 Upper cover 8002 Lower cover 8003 FPC 8004 Touch panel 8005 FPC 8006 Cell 8007 Backlight unit 8008 Light source 8009 Frame 8010 Printed circuit board 8011 Battery< / cpu>

Claims

1. a first conductive layer serving as a first gate electrode of a transistor; a first insulating layer having a region overlying the first conductive layer; an oxide semiconductor layer including a region located above the first conductive layer with the first insulating layer interposed therebetween and including a channel formation region of the transistor; a second conductive layer having a region in contact with a top surface of the oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive layer having a region in contact with a top surface of the oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a second insulating layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region overlapping with the oxide semiconductor layer with the second insulating layer interposed therebetween and functioning as a second gate electrode of the transistor; when viewed in a cross section of the transistor in a channel length direction, one end of the oxide semiconductor layer overlaps with the second conductive layer and the other end of the oxide semiconductor layer overlaps with the third conductive layer; the oxide semiconductor layer has a first region overlapping with the second conductive layer and not overlapping with the first conductive layer and the third conductive layer, a second region overlapping with each of the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer, a third region overlapping with the first conductive layer and not overlapping with each of the second conductive layer, the third conductive layer, and the fourth conductive layer, and a fourth region overlapping with each of the first conductive layer and the third conductive layer, When seen in a plan view of the transistor, the first region is connected to the fourth region via the second region and the third region in this order, the second conductive layer does not have a region overlapping with the first conductive layer and does not have a region overlapping with the fourth conductive layer in a plan view of the transistor; the third conductive layer has a region overlapping with the fourth conductive layer in a plan view of the transistor; In a cross-sectional view of the transistor in a channel length direction, at least one end of the second insulating layer overlaps an upper portion of the oxide semiconductor layer.

2. a first conductive layer serving as a first gate electrode of a transistor; a first insulating layer having a region overlying the first conductive layer; an oxide semiconductor layer including a region located above the first conductive layer with the first insulating layer interposed therebetween and including a channel formation region of the transistor; a second conductive layer having a region in contact with a top surface of the oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive layer having a region in contact with a top surface of the oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a second insulating layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region overlapping with the oxide semiconductor layer with the second insulating layer interposed therebetween and functioning as a second gate electrode of the transistor; when viewed in a cross section of the transistor in a channel length direction, one end of the oxide semiconductor layer overlaps with the second conductive layer and the other end of the oxide semiconductor layer overlaps with the third conductive layer; the oxide semiconductor layer has a first region overlapping with the second conductive layer and not overlapping with the first conductive layer and the third conductive layer, a second region overlapping with each of the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer, a third region overlapping with the first conductive layer and not overlapping with each of the second conductive layer, the third conductive layer, and the fourth conductive layer, and a fourth region overlapping with each of the first conductive layer and the third conductive layer, When seen in a plan view of the transistor, the first region is connected to the fourth region via the second region and the third region in this order, the second conductive layer does not have a region overlapping with the first conductive layer and does not have a region overlapping with the fourth conductive layer in a plan view of the transistor; the third conductive layer has a region overlapping with the fourth conductive layer in a plan view of the transistor; in a cross-sectional view of the transistor in a channel length direction, at least one end of the second insulating layer overlaps an upper portion of the oxide semiconductor layer, a width of the second conductive layer in a channel width direction of the transistor is larger than a width of the oxide semiconductor layer in the channel width direction of the transistor; a width of the third conductive layer in a channel width direction of the transistor is larger than a width of the oxide semiconductor layer in the channel width direction of the transistor.

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