Printed circuit board
The printed circuit board design addresses the brittleness and stress issues of inorganic materials by using insulating layers and materials with low thermal expansion at the edges, resulting in a robust and fine-circuit-capable substrate.
Patent Information
- Application Number
- JP2024208648
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-06
- Filing Date
- 2024-11-29
- Publication Date
- 2025-06-18
AI Technical Summary
Existing package substrates using organic materials as cores face challenges in realizing fine circuits and controlling warpage due to low modulus, and inorganic materials like glass are brittle and prone to cracks from external shocks and residual stresses.
A printed circuit board design that uses an inorganic material like glass as a core, with insulating layers on both sides and insulating materials with a low coefficient of thermal expansion at the edges to reduce tensile stress from thermal shrinkage.
This design effectively prevents cracks and warpage in printed circuit boards due to external impacts and residual stresses, while allowing for the use of inorganic materials that enable finer circuits and better warpage control.
Smart Images
Figure 2025091378000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a printed circuit board.
Background Art
[0002] Currently, package substrates used for high-end semiconductor products are required to achieve fine circuits in order to accommodate a very large number of input / output terminals, and are also required to have a large area in order to mount multiple chips. On the other hand, general package substrates using an organic material as a core have difficulty in realizing fine circuits and may have limitations in controlling warpage due to low modulus and the like. Therefore, research on package substrates using an inorganic material such as glass as a core instead of an organic material has been underway. However, glass materials are brittle and may be vulnerable to external shocks and residual stresses caused by processes.
Summary of the Invention
Problems to be Solved by the Invention
[0003] One of the various objects of the present disclosure is to provide a printed circuit board that can prevent cracks and the like in response to external shocks and residual stresses caused by processes even when using an inorganic material such as glass as a core.
Means for Solving the Problems
[0004] One of the various solutions proposed through the present disclosure is to use a substrate containing an inorganic material such as glass as a core, and build up an insulating layer and the like on the upper and lower sides of the substrate, respectively. However, an insulating material containing a material having a relatively low coefficient of thermal expansion compared to the substrate is disposed at the edge portion of the outer side of the substrate to reduce the tensile stress generated by the shrinkage behavior of the insulating layer having a high coefficient of thermal expansion.
[0005] For example, a printed circuit board according to an example includes a substrate having first and second outer portions on opposite sides in the length direction, a first insulating layer disposed on the upper side of the substrate, a second insulating layer disposed on the lower side of the substrate, a first insulating material covering at least a part of the first outer portion of the substrate, and a second insulating material covering at least a part of the second outer portion of the substrate, wherein the first and second insulating layers each have a coefficient of thermal expansion that is even greater than that of the substrate, and the first and second insulating materials each have a coefficient of thermal expansion that is even smaller than that of the substrate.
[0006] For example, a printed circuit board according to an example includes a substrate having first and second outer portions on opposite sides in the length direction, a first insulating layer disposed on the upper side of the substrate, a second insulating layer disposed on the lower side of the substrate, a first insulating material covering at least a part of the first outer portion of the substrate, and a second insulating material covering at least a part of the second outer portion of the substrate, wherein at least a part of the outer surface of the substrate in each of the first and second outer portions is exposed from the first and second insulating materials.
Advantages of the Invention
[0007] Among various effects according to the present disclosure, as one effect, it is possible to provide a printed circuit board that can prevent cracks and the like in response to external impacts and residual stresses caused by processes even when an inorganic material such as glass is used as a core.
Brief Description of the Drawings
[0008]
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Mode for Carrying Out the Invention
[0009] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. The shape, size, etc. of the elements in the drawings may be enlarged, reduced (or emphasized or simplified) for clearer explanation.
[0010] Electronic device FIG. 1 is a block diagram schematically showing an example of an electronic device system.
[0011] Referring to the drawings, the electronic device 1000 houses a main board 1010. On the main board 1010, chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected. These, in combination with other electronic components described later, form various signal lines 1090.
[0012] Examples of the chip-related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory, application processor chips such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller, and logic chips such as an analog-digital converter and an ASIC (application-specific IC). However, the chip-related components 1020 are not limited to these, and other forms of chip-related electronic components may also be included. Furthermore, these chip-related components 1020 can be combined with each other. The chip-related components 1020 can also be in a package form including the above-described chips or electronic components.
[0013] Examples of the network-related components 1030 include Wi-Fi (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth (registered trademark), 3G, 4G, 5G, and any other wireless and wired protocols designated as such and later. However, the network-related components 1030 are not limited to these, and any of a number of other wireless or wired standards or protocols may also be included. Also, the network-related components 1030 can be combined with the chip-related components 1020 with each other.
[0014] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (Low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCC (Multi-Layer Ceramic Condensers), etc. However, it is not limited to these, and passive elements in the form of chip components used for various other purposes may also be included. In addition, the other components 1040 can be combined with the chip-related components 1020 and / or the network-related components 1030 with each other.
[0015] Depending on the type of the electronic device 1000, the electronic device 1000 can include other electronic components that are physically and / or electrically connected or not connected to the main board 1010. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, a battery 1080, etc. However, it is not limited to these, and audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. can also be mentioned. In addition, depending on the type of the electronic device 1000, other electronic components used for various purposes can also be included.
[0016] The electronic device 1000 can be, for example, a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an Automotive, etc. However, it is not limited thereto, and it can also be any other electronic device that processes data.
[0017] FIG. 2 is a perspective view schematically showing an example of an electronic device.
[0018] Referring to the drawings, the electronic device can be, for example, a smart phone 1100. Inside the smart phone 1100, a motherboard 1110 is housed, and various components 1120 are physically and / or electrically connected to such a motherboard 1110. Further, other components that are physically and / or electrically connected or not connected to the motherboard 1110, such as a camera module 1130 and / or a speaker 1140, are housed inside. Some of the components 1120 can be the chip-related components described above, for example, a component package 1121, but it is not limited thereto. The component package 1121 can be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Or, the component package 1121 can also be in the form of a printed circuit board with active components and / or passive components built-in. On the other hand, the electronic device is not necessarily limited to the smart phone 1100, and it can also be other electronic devices as described above.
[0019] Printed Circuit Board FIG. 3 is a cross-sectional view schematically showing an example of a printed circuit board, and FIGS. 4a and 4b are cross-sectional views schematically showing the printed circuit board of FIG. 3 when viewed from the A direction and the B direction, respectively.
[0020] Referring to the drawings, a printed circuit board 500A according to an example may include a substrate 110 having first and second outer portions 111 and 112 on opposite sides in the length direction, a first insulating layer 210 disposed on the upper side of the substrate 110, a second insulating layer 310 disposed on the lower side of the substrate 110, a first insulating material 410 covering at least a part of the first outer portion 111, and a second insulating material 420 covering at least a part of the second outer portion 112. The first and second outer portions 111 and 112 may each have a predetermined region from both ends in the length direction of the substrate 110 in cross section. The respective predetermined regions of the first and second outer portions 111 and 112 may be approximately the same size as the first and second insulating materials 410 and 420. The first and second insulating layers 210 and 310 may each have a coefficient of thermal expansion even greater than that of the substrate 110, and the first and second insulating materials 410 and 420 may each have a coefficient of thermal expansion even smaller than that of the substrate 110. For example, the first and second insulating materials 410 and 420 having a coefficient of thermal expansion smaller than that of the substrate 110 can be disposed adjacent to the respective edges of the first and second outer portions 111 and 112 of the substrate 110, thus reducing the tensile stress generated by the shrinkage behavior of the first and second insulating layers 210 and 310 having a coefficient of thermal expansion greater than that of the substrate. Therefore, even when an inorganic material such as glass is used as the material of the substrate 110, cracks and the like can be prevented in response to external impacts and residual stresses caused by the process. On the other hand, when an inorganic material such as glass is used as the material of the substrate 110, it can be advantageous for warpage control due to high modulus and high glass transition temperature, and the substrate 110 can be made larger in area. Also, due to the low surface roughness and high processability of the substrate 110, it can be advantageous for realizing a fine circuit.
[0021] On the one hand, the coefficient of thermal expansion can be measured by cutting each component in the printed circuit board that needs to be measured into the same size to obtain samples, and using the same thermomechanical analyzer, such as TMA 8310, TATMA Q400, etc. to measure. For example, the substrate, insulating layer, insulating material, etc. in the manufactured printed circuit board can be cut into the same size afterwards to obtain each sample, and each sample can be cut so that the coefficient of thermal expansion of each sample can be measured in the same direction, for example, in the length direction based on the manufactured printed circuit board. At this time, the coefficient of thermal expansion of each sample can be measured under the same conditions. For example, after each sample is mounted on the thermomechanical analyzer, the sample is heated from room temperature to 170 °C in a tensile mode with a load of 0.1 N, and then the average value of the coefficient of thermal expansion in the range of 50 °C to 80 °C is obtained during the process of cooling the sample to room temperature, whereby the coefficient of thermal expansion can be measured, but the conditions are not necessarily limited to this.
[0022] On the one hand, the first insulating material 410 can include a first-1 insulating material 411 disposed above the first outer portion 111 and a first-2 insulating material 412 disposed below the first outer portion 111. The first-1 insulating material 411 and the first-2 insulating material 412 can be separated with the first outer portion 111 therebetween. The second insulating material 420 can include a second-1 insulating material 421 disposed above the second outer portion 112 and a second-2 insulating material 422 disposed below the second outer portion 112. The second-1 insulating material 421 and the second-2 insulating material 422 can be separated with the second outer portion 112 therebetween. The substrate 110 can have first and second protrusions P1 and P2 at each of the first and second outer portions 111 and 112. The thickness of each of the first and second protrusions P1 and P2 can be thinner than the thickness in the remaining region of the substrate 110. The first-1 insulating material 411 can be disposed between the first protrusion P1 and the first insulating layer 210, and the first-2 insulating material 412 can be disposed between the first protrusion P1 and the second insulating layer 310. The second-1 insulating material 421 can be disposed between the second protrusion P2 and the first insulating layer 210, and the second-2 insulating material 422 can be disposed between the second protrusion P2 and the second insulating layer 310. At least a part of the outer surface of each of the first and second protrusions P1 and P2 and at least a part of the outer surface of each of the first and second insulating layers 210 and 310 can be exposed from the first and second insulating materials 410 and 420. With such a structure, the above-described technical effects can be effectively realized.
[0023] On the one hand, the first and second insulating materials 410 and 420 can be disposed adjacent to not only the edge portions of the outer side portions 111 and 112 on both sides in the length direction of the substrate 110 but also the edge portions of the outer side portions on both sides in the width direction. For example, the first and second insulating materials 410 and 420, for example, the first-1, first-2, second-1, and second-2 insulating materials 411, 412, 421, and 422 can be disposed in substantially the same form as the cross-section in the above-described length-thickness direction even in the cross-section in the width-thickness direction. If necessary, the first-1 and second-1 insulating materials 411 and 421 can be connected to each other, and the first-2 and second-2 insulating materials 412 and 422 can be connected to each other. For example, the first and second insulating materials 410 and 420 can be disposed so as to continuously surround the outer side portion of the substrate 110 on the plane. However, it is not limited thereto. On the other hand, when the lamination direction of the first and second insulating layers 210 and 310 with respect to the substrate 110 is the thickness direction, the length direction can be any one direction perpendicular to the thickness direction, and the width direction can be another one direction perpendicular to both the length direction and the thickness direction. At this time, the length direction can be substantially parallel to at least one outer surface of the printed circuit board 500A, and the thickness direction can be substantially parallel to at least one other outer surface of the printed circuit board 500A.
[0024] On the one hand, a printed circuit board 500A according to an example may further include a plurality of first wiring layers 220 disposed in a first insulating layer 210, a plurality of first via layers 230 disposed in the first insulating layer 210 and each connected to at least one of the plurality of first wiring layers 220, a plurality of second wiring layers 320 disposed in a second insulating layer 310, a plurality of second via layers 330 disposed in the second insulating layer 310 and each connected to at least one of the plurality of second wiring layers 320, and at least one through via 130 penetrating the substrate 110. For example, a printed circuit board 500A according to an example can be a large-area multilayer circuit board, and thus can be used as a package substrate. On the other hand, at least a part of the lowermost first via layer 231 among the plurality of first via layers 230 can be connected to the upper side of the through via 130. Also, at least a part of the uppermost second via layer 331 among the plurality of second via layers 330 can be connected to the lower side of the through via 130. For example, wiring layers may not be directly formed on the upper and lower surfaces of the substrate 110, and the through via 130 can be directly connected to the lowermost first via layer 231 and the uppermost second via layer 331 respectively.
[0025] Hereinafter, with reference to the drawings, the components of a printed circuit board 500A according to an example will be described in more detail.
[0026] The substrate 110 can be a core layer. The substrate 110 can include an inorganic insulating material. The inorganic insulating material can be glass, silicon (Si), ceramic, etc. For example, the substrate 110 can include a glass substrate, a silicon substrate, or a ceramic substrate. Preferably, the substrate can include a glass substrate, and more preferably a glass substrate having a coefficient of thermal expansion (CTE) of about 6 ppm / °C to 10 ppm / °C. On the other hand, the glass substrate can include glass, and the glass can include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, etc. However, it is not limited thereto, and alternative glass materials, such as fluoroglass, phosphate glass, chalcogen glass, etc., can also be used as the material of the glass layer. Furthermore, in order to form glass having specific physical properties, other additives can also be further included. Such additives can include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of such elements and other elements. On the other hand, the glass can be distinguished from the glass fiber, glass cloth, and glass fabric included in the organic insulating material. Also, the silicon substrate can include silicon (Si), and if necessary, can also include an oxide layer formed on the silicon (Si). It can also include a nitride layer formed on the oxide layer. The oxide layer can include a silicon oxide film, and the nitride layer can include a silicon nitride film, but is not limited thereto. Also, the ceramic substrate can include ceramic. The ceramic can include, for example, alumina (Al2O3), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride (Si3N4), etc., but is not limited thereto.
[0027] Each of the through vias 130 can contain metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The through via 130 can be a TGV (Through Glass Via), a TSV (Through Silicon Via), etc., depending on the material of the substrate 110. A plugging material can be disposed inside the through via 130 as needed, and the plugging material can include an insulating material or a conductive material. The through via 130 can have side surfaces that are substantially perpendicular in cross-section and can have a columnar form such as a cylinder, an elliptical cylinder, a square column, etc., but is not limited thereto. The through via 130 can perform various functions according to the design. For example, it can include a ground via, a power via, a signal via, etc. The through via 130 can include a sputtering layer and an electroplating layer (or electrolytic copper). Optionally, it can include an electroless plating layer (or chemical copper) instead of the sputtering layer, or can include both. There can be a plurality of through vias 130, and in this case, they can contain substantially the same metal as each other.
[0028] The first and second insulating layers 210 and 310 can each be build-up insulating layers. The first and second insulating layers 210 and 310 can each include an organic insulating material. The organic insulating material can include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) together with the resin. For example, the organic insulating material can be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film), PPG (prepreg, Prepreg), etc., but is not limited thereto, and other polymer materials can also be used. Preferably, the first and second insulating layers 210 and 310 can each include ABF (Ajinomoto Build-up Film), and more preferably, ABF (Ajinomoto Build-up Film) having a coefficient of thermal expansion (CTE) of more than about 10 ppm / °C, for example, about 35 ppm / °C to about 45 ppm / °C can be included. The first and second insulating layers 210 and 310 can each include a plurality of insulating layers, and each insulating layer can include substantially the same organic insulating material as each other. Therefore, the layer boundary may be unclear.
[0029] The first and second wiring layers 220 and 320 can each be a build-up wiring layer. The first and second wiring layers 220 and 320 can each include a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first and second wiring layers 220 and 320 can each perform various functions according to the design. For example, it can include a signal pattern, a power pattern, a ground pattern, etc. These patterns can each have various forms such as lines, planes, pads, etc. The first and second wiring layers 220 and 320 can each include a seed layer and a plating layer formed on the seed layer. The seed layer can be an electroless plating layer (or electroless copper) and / or a sputtering layer, and the plating layer can be an electrolytic plating layer (or electroplated copper), but is not limited thereto. The first and second wiring layers 220 and 320 can each include a plurality of wiring layers, and each wiring layer can include substantially the same metal as each other.
[0030] The first and second via layers 230 and 330 can be build-up via layers. The first and second via layers 230 and 330 can each include a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first and second via layers 230 and 330 can each include filled vias filling via holes, but can also include conformal vias disposed along the wall surfaces of the via holes. The first and second via layers 230 and 330 can perform various functions according to the design. For example, it can include ground vias, power vias, signal vias, etc. The first and second via layers 230 and 330 can be tapered in opposite directions to each other. For example, the first via layer 230 can have a wider width at the upper end than at the lower end in cross-section, and the second via layer 330 can have a wider width at the lower end than at the upper end in cross-section. The first and second via layers 230 and 330 can each include an electroless plating layer (or electroless copper) and an electroplating layer (or electroplated copper). Instead of the electroless plating layer (or electroless copper), a sputtering layer can be included, or both can be included. The first and second via layers 230 and 330 can each include a plurality of via layers, and each via layer can include substantially the same metal as each other.
[0031] The first and second insulating materials 410 and 420 can each be a stress reduction layer. The first and second insulating materials 410 and 420 can each include a material having a low coefficient of thermal expansion. For example, the first and second insulating materials 410 and 420 can each include an organic insulating material having a low coefficient of thermal expansion, an inorganic insulating material having a low coefficient of thermal expansion, and the like. For example, the first and second insulating materials can each include a PPG (Prepreg), ABF (Ajinomoto Build-up Film), or ceramic having a coefficient of thermal expansion (CTE) of less than 6 ppm / °C, for example, about 1 ppm / °C to 5 ppm / °C. The first insulating material 410 can include a first-1 insulating material 411 and a first-2 insulating material 412, and the second insulating material 420 can include a second-1 insulating material 421 and a second-2 insulating material 422. The first-1 insulating material 411, the first-2 insulating material 412, the second-1 insulating material 421, and the second-2 insulating material 422 can include substantially the same organic or inorganic insulating material as each other, and thus can have substantially the same coefficient of thermal expansion as each other.
[0032] FIG. 5 is a cross-sectional view schematically showing another example of a printed circuit board, and FIGS. 6A and 6B are cross-sectional views schematically showing the printed circuit board of FIG. 5 when viewed from the C direction and the D direction, respectively.
[0033] Referring to the drawings, a printed circuit board 500B according to another example may include a substrate 110 having first and second outer portions 111 and 112 on opposite sides in the length direction, a first insulating layer 210 disposed above the substrate 110, a second insulating layer 310 disposed below the substrate 110, a first insulating material 410 covering at least a part of the first outer portion 111, and a second insulating material 420 covering at least a part of the second outer portion 112. The first and second outer portions 111 and 112 can each have a predetermined region from both ends in the length direction of the substrate 110 in cross section. The respective predetermined regions of the first and second outer portions 111 and 112 can be approximately the same size as the first and second insulating materials 410 and 420. The first and second insulating layers 210 and 310 may each have a coefficient of thermal expansion even greater than that of the substrate 110, and the first and second insulating materials 410 and 420 may each have a coefficient of thermal expansion even smaller than that of the substrate 110. For example, the first and second insulating materials 410 and 420 having a coefficient of thermal expansion smaller than that of the substrate 110 can be disposed adjacent to the respective edges of the first and second outer portions 111 and 112 of the substrate 110, thus reducing the tensile stress generated by the shrinkage behavior of the first and second insulating layers 210 and 310 having a coefficient of thermal expansion greater than that of the substrate. Therefore, even when an inorganic material such as glass is used as the material of the substrate 110, cracks and the like can be prevented in response to external impacts and residual stresses caused by the process. On the other hand, when an inorganic material such as glass is used as the material of the substrate 110, it can be advantageous for warpage control due to high modulus and high glass transition temperature, etc., and the substrate 110 may be able to be made larger in area. Also, the low surface roughness and high processability of the substrate 110 can be advantageous for realizing a fine circuit.
[0034] On the one hand, the first insulating material 410 can include a first-1 insulating material 411 disposed above the first outer portion 111 and a first-2 insulating material 412 disposed below the first outer portion 111. The first-1 insulating material 411 and the first-2 insulating material 412 can be separated with the first outer portion 111 therebetween. The second insulating material 420 can include a second-1 insulating material 421 disposed above the second outer portion 112 and a second-2 insulating material 422 disposed below the second outer portion 112. The second-1 insulating material 421 and the second-2 insulating material 422 can be separated with the second outer portion 112 therebetween. The first-1 insulating material 411 can be disposed on the upper surface of the substrate 110 at the first outer portion 111 and can cover at least a part of the outer surface of the first insulating layer 210. The first-2 insulating material 412 can be disposed on the lower surface of the substrate 110 at the first outer portion 111 and can cover at least a part of the outer surface of the second insulating layer 310. The second-1 insulating material 421 can be disposed on the upper surface of the substrate 110 at the second outer portion 112 and can cover at least another part of the outer surface of the first insulating layer 210. The second-2 insulating material 422 can be disposed on the lower surface of the substrate 110 at the second outer portion 112 and can cover at least another part of the outer surface of the second insulating layer 310. At least a part of the outer surface of the substrate at each of the first and second outer portions 111, 112 can be exposed from the first and second insulating materials 410, 420. Such a structure can effectively achieve the above-described technical effects.
[0035] On the one hand, the first and second insulating materials 410 and 420 can be arranged adjacent to not only the edge portions of the outer portions 111 and 112 on both sides in the length direction of the substrate 110 but also the edge portions of the outer portions on both sides in the width direction. For example, the first and second insulating materials 410 and 420, such as the first-1, first-2, second-1, and second-2 insulating materials 411, 412, 421, and 422, can be arranged in substantially the same form as the cross-section in the above-described length-thickness direction even in the cross-section in the width-thickness direction. If necessary, the first-1 and second-1 insulating materials 411 and 421 can be connected to each other, and the first-2 and second-2 insulating materials 412 and 422 can be connected to each other. For example, the first and second insulating materials 410 and 420 can be arranged so as to continuously surround the outer portion of the substrate 110 on the plane. However, it is not limited thereto. On the other hand, when the lamination direction of the first and second insulating layers 210 and 310 with respect to the substrate 110 is the thickness direction, the length direction can be any one direction perpendicular to the thickness direction, and the width direction can be another one direction perpendicular to both the length direction and the thickness direction. At this time, the length direction can be substantially parallel to at least one outer surface of the printed circuit board 500B, and the thickness direction can be substantially parallel to at least one other outer surface of the printed circuit board 500B.
[0036] On the other hand, a printed circuit board 500B according to another example may further include a plurality of first wiring layers 220 disposed in the first insulating layer 210, a plurality of first via layers 230 disposed in the first insulating layer 210 and respectively connected to at least one of the plurality of first wiring layers 220, a plurality of second wiring layers 320 disposed in the second insulating layer 310, a plurality of second via layers 330 disposed in the second insulating layer 310 and respectively connected to at least one of the plurality of second wiring layers 320, and at least one through via 130 penetrating the substrate 110. For example, a printed circuit board 500B according to another example can be a large-area multilayer circuit board and thus can be used as a package substrate. On the other hand, at least a part of the lowermost first via layer 231 among the plurality of first via layers 230 can be connected above the through via 130. Also, at least a part of the uppermost second via layer 331 among the plurality of second via layers 330 can be connected below the through via 130. For example, wiring layers may not be directly formed on the upper and lower surfaces of the substrate 110, and the through via 130 can be directly connected to the lowermost first via layer 231 and the uppermost second via layer 331, respectively.
[0037] The description of the components of a printed circuit board 500B according to another other example can be substantially the same as that described for the printed circuit board 500A according to the example described above.
[0038] FIG. 7a and FIG. 7b schematically show the thermal stress generation mechanism and the thermal stress analysis results of a glass substrate when insulating layers are disposed on the upper and lower sides of the glass substrate, respectively.
[0039] Referring to the drawings, when a panel in which insulating layers 210' and 310' having a relatively high coefficient of thermal expansion, for example, ABF having a coefficient of thermal expansion of about 39 ppm / °C, are disposed on the upper and lower sides of a glass substrate 110' having a coefficient of thermal expansion of about 7.2 ppm / °C is cut in unit units, high tensile stress may be generated in the edge portion of the glass substrate 110' due to the strong contraction behavior of the insulating layers 210' and 310'. Therefore, cracks may occur in the horizontal direction of the glass substrate 110', for example, the length direction and / or the width direction. Here, the normalized tensile stress can be about 1.00.
[0040] Figures 8a and 8b schematically show the mechanism of thermal stress generation and the results of thermal stress analysis of the glass substrate in the structure of the printed circuit board of FIG. 3, respectively.
[0041] Referring to the drawings, when insulating materials 410 and 420 having a relatively small coefficient of thermal expansion, for example, PPG having a coefficient of thermal expansion of about 4 ppm / °C and a modulus of about 14 GPa, are disposed in the first and second insulating materials 410 and 420 of the printed circuit board of FIG. 3, and a panel having a structure in which insulating layers 210 and 310 having a relatively high coefficient of thermal expansion, for example, ABF having a coefficient of thermal expansion of about 39 ppm / °C, are disposed in the first and second insulating layers 210 and 310 of the printed circuit board of FIG. 3 is cut in unit units, the contraction behavior of the first and second insulating layers 210 and 310 in the edge portion of the glass substrate 110 can be reduced. Therefore, the tensile stress applied thereto can be reduced. Accordingly, it is possible to prevent cracks from occurring in the horizontal direction of the glass substrate 110, for example, the length direction and / or the width direction. Here, the normalized tensile stress can be about 0.60.
[0042] Figures 9a and 9b schematically show the thermal stress generation mechanism and the thermal stress analysis results of the glass substrate in the structure of the printed circuit board of FIG. 5, respectively.
[0043] Referring to the drawings, when insulating materials 410 and 420 with relatively small coefficients of thermal expansion, for example, PPG with a coefficient of thermal expansion of about 4 ppm / °C and a modulus of about 14 GPa, are disposed on a glass substrate 110 with a coefficient of thermal expansion of about 7.2 ppm / °C as the first and second insulating materials 410 and 420 of the printed circuit board of FIG. 5, and when a panel in which insulating layers 210 and 310 with relatively high coefficients of thermal expansion, for example, ABF with a coefficient of thermal expansion of about 39 ppm / °C, are disposed on the first and second insulating layers 210 and 310 of the printed circuit board of FIG. 5 is cut in unit units, the shrinkage behavior of the first and second insulating layers 210 and 310 at the edge portion of the glass substrate 110 can be reduced, and thus the tensile stress applied thereto can be reduced. Therefore, it is possible to prevent cracks from occurring in the horizontal direction of the glass substrate 110, for example, the length direction and / or the width direction. Here, the normalized tensile stress can be about 0.57.
[0044] In the present disclosure, the expression "cover" can include not only the case of covering entirely but also the case of covering at least a part, and can include not only the case of directly covering but also the case of indirectly covering. Further, the expression "fill" can include not only the case of completely filling but also the case of filling at least a part, and can include the case of roughly filling. For example, it can include the case where there are some voids or voids. Further, the expression "surround" can include not only the case of completely surrounding but also the case of partially surrounding and the case of roughly surrounding. Further, "exposing" can include not only the case of completely exposing but also the case of partially exposing, and the exposure can mean exposing from embedding the corresponding configuration. Further, "adjacent" can mean that at least a part abuts against each other.
[0045] In the present disclosure, it can be determined by substantially including process errors, positional deviations, measurement errors, etc. that occur during the manufacturing process. For example, being substantially coplanar can include not only the case of being completely on the same plane but also the case of being roughly on the same plane. Also, substantially the same insulating material can include not only the case where the composition is completely the same but also the case where the composition is roughly the same.
[0046] In the present disclosure, the meaning of "cross-section" can mean the cross-sectional shape when the object is cut perpendicularly, or the cross-sectional shape when the object is cut perpendicularly, or the cross-sectional shape when the object is viewed in a side view. Also, the meaning of "plane" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed in a top view or a bottom view.
[0047] In the present disclosure, "lower side", "lower part", "lower surface", etc. are used to mean the downward direction based on the cross-section of the drawing for convenience, and "upper side", "upper part", "upper surface", etc. are used to mean the opposite direction. However, this is to define the direction for convenience of explanation, and it goes without saying that the scope of rights in the claims is not particularly limited by the description of such a direction, and the concept of up / down can change at any time.
[0048] In the present disclosure, the meaning of "connected" is a concept that includes not only the case of being directly connected but also the case of being indirectly connected via an adhesive layer or the like. Also, the meaning of "electrically connected" is a concept that includes all cases of being physically connected and not being connected. Furthermore, expressions such as "first", "second", etc. are used to distinguish one component from another component, and do not limit the order and / or importance of the said component. In some cases, without departing from the scope of rights, the first component can also be named the second component, and similarly the second component can also be named the first component.
[0049] In the present disclosure, thickness, width, length, depth, line width, interval, pitch, etc. can be measured by a scanning microscope, an optical microscope, etc. based on a cross-section obtained by polishing or cutting a printed circuit board. The cut cross-section can be a vertical cross-section or a horizontal cross-section, and numerical values can be measured respectively based on the required cut cross-section. For example, the width of the upper end and / or the lower end of a via can be measured on a cross-section obtained by cutting along the central axis of the via. At this time, when the numerical values are not constant, the numerical values can be determined as the average value of the values measured at any five points. On the other hand, the minimum numerical value can be determined as the numerical value measured as the smallest value in the corresponding layer, the corresponding region, etc.
[0050] The expression of "an example used in the present disclosure" does not mean the same embodiment, but is provided to emphasize and explain each different unique feature. However, the above-provided example does not exclude being implemented in combination with the features of another example. For example, even if a matter described in a specific example is not described in another example, it can be understood as an explanation related to the other example as long as there is no explanation contrary to or conflicting with that matter in the other example.
[0051] The terms used in the present disclosure are merely used to explain an example and are not intended to limit the present disclosure. At this time, the singular expression includes plural expressions unless it clearly means something different in the context.
Explanation of Reference Numerals
[0052] 1000 Electronic device 1010 Main board 1020 Chip-related components 1030 Network-related components 1040 Other components 1050 Camera 1060 Antenna 1070 Display 1080 Battery 1090 Signal line 1100 Smartphone 1110 Motherboard 1120 Parts 1121 Parts Package 1130 Camera Module 1140 Speaker 500A, 500B Printed Circuit Board 110 Substrate 111, 112 Outer Part P1, P2 Protrusion 130 Through-Hole via 210, 310 Insulation Layer 220, 320 Wiring Layer 230, 330, 231, 331 via Layer 410, 420, 411, 412, 421, 422 Insulating Material
Claims
1. a substrate having first and second longitudinally opposed outer sides; a first insulating layer disposed over the substrate; a second insulating layer disposed below the substrate; a first insulating material covering at least a portion of the first outer portion of the substrate; a second insulating material covering at least a portion of the second outer portion of the substrate; the first insulating layer and the second insulating layer each have a thermal expansion coefficient greater than that of the substrate; The first insulating layer and the second insulating material each have a lower coefficient of thermal expansion than the substrate.
2. The first insulating material includes a first-1 insulating material disposed on an upper side of the first outer portion and a first-2 insulating material disposed on a lower side of the first outer portion, 2. The printed circuit board of claim 1, wherein the second insulating material includes a second-1 insulating material disposed on an upper side of the second outer portion and a second-2 insulating material disposed on a lower side of the second outer portion.
3. The first-1 insulating material and the first-2 insulating material are spaced apart from each other with the first outer portion therebetween, The printed circuit board of claim 2 , wherein the second-1 insulating material and the second-2 insulating material are spaced apart with the second outer portion therebetween.
4. the substrate has a first protrusion and a second protrusion on the first outer portion and the second outer portion, respectively; a thickness of each of the first protruding portion and the second protruding portion is thinner than a thickness of a remaining region of the substrate excluding the first protruding portion and the second protruding portion; the first-1 insulating material is disposed between the first protrusion and the first insulating layer; the first-second insulating material is disposed between the first protrusion and the second insulating layer; the second-1 insulating material is disposed between the second protrusion and the first insulating layer; The printed circuit board of claim 3 , wherein the second-second insulating material is disposed between the second protrusion and the second insulating layer.
5. 5. The printed circuit board of claim 4, wherein at least a portion of an outer surface of each of the first protrusion and the second protrusion and at least a portion of an outer surface of each of the first insulating layer and the second insulating layer are exposed from the first insulating material and the second insulating material.
6. the first-first insulating material is disposed on the top surface of the substrate in the first outer portion and covers at least a portion of an outer surface of the first insulating layer; the first-second insulating material is disposed on the lower surface of the substrate in the first outer portion and covers at least a portion of the outer surface of the second insulating layer; the second-1 insulating material is disposed on the upper surface of the substrate in the second outer portion and covers at least another part of the outer surface of the first insulating layer; 4. The printed circuit board of claim 3, wherein the second-2 insulating material is disposed on the lower surface of the board in the second outer portion and covers at least another portion of the outer surface of the second insulating layer.
7. The printed circuit board of claim 6 , wherein at least a portion of an outer surface of the substrate in each of the first and second outer portions is exposed from the first and second insulating materials.
8. a plurality of first wiring layers disposed in the first insulating layer; a plurality of first via layers disposed in the first insulating layer and each connected to at least one of the plurality of first wiring layers; a plurality of second wiring layers disposed in the second insulating layer; The printed circuit board according to claim 1 , further comprising: a plurality of second via layers disposed in the second insulating layer and each of the second via layers being coupled to at least one of the plurality of second wiring layers.
9. further comprising at least one through via extending through the substrate; At least a portion of a first via layer arranged at a lowermost side among the plurality of first via layers is connected to an upper side of the through via, The printed circuit board according to claim 8 , wherein at least a portion of the second via layer arranged on the uppermost side of the plurality of second via layers is connected to a lower side of the through via.
10. 10. The printed circuit board of claim 1, wherein the substrate comprises a glass substrate having a coefficient of thermal expansion of 6 ppm / .degree. C. to 10 ppm / .degree. C.
11. 11. The printed circuit board of claim 10, wherein the first insulating layer and the second insulating layer each comprise Ajinomoto Build-up Film (ABF) having a thermal expansion coefficient of greater than 10 ppm / .degree. C.
12. 11. The printed circuit board of claim 10, wherein the first insulating material and the second insulating material each include a PPG (Prepreg), an ABF (Ajinomoto Build-up Film), or a ceramic having a thermal expansion coefficient of less than 6 ppm / °C.
13. a substrate having first and second longitudinally opposed outer sides; a first insulating layer disposed over the substrate; a second insulating layer disposed below the substrate; a first insulating material covering at least a portion of a first outer portion of the substrate; a second insulating material covering at least a portion of a second outer portion of the substrate; A printed circuit board, wherein at least a portion of an outer surface of the board in each of the first and second outer portions is exposed from the first and second insulating materials.
14. The first insulating material includes a first-1 insulating material disposed on an upper side of the first outer portion and a first-2 insulating material disposed on a lower side of the first outer portion, The second insulating material includes a second-1 insulating material disposed on an upper side of the second outer portion and a second-2 insulating material disposed on a lower side of the second outer portion, The first-1 insulating material and the first-2 insulating material are spaced apart from each other with the first outer portion therebetween, The printed circuit board of claim 13 , wherein the second-1 insulating material and the second-2 insulating material are spaced apart with the second outer portion therebetween.
15. the substrate has a first protrusion and a second protrusion on the first outer portion and the second outer portion, respectively; a thickness of each of the first protruding portion and the second protruding portion is thinner than a thickness of a remaining region of the substrate excluding the first protruding portion and the second protruding portion; the first-1 insulating material is disposed between the first protrusion and the first insulating layer; the first-second insulating material is disposed between the first protrusion and the second insulating layer; the second-1 insulating material is disposed between the second protrusion and the first insulating layer; The printed circuit board of claim 14, wherein the second-second insulating material is disposed between the second protrusion and the second insulating layer.
16. the first-first insulating material is disposed on the top surface of the substrate in the first outer portion and covers at least a portion of an outer surface of the first insulating layer; the first-second insulating material is disposed on the lower surface of the substrate in the first outer portion and covers at least a portion of the outer surface of the second insulating layer; the second-1 insulating material is disposed on the upper surface of the substrate in the second outer portion and covers at least another part of the outer surface of the first insulating layer; The printed circuit board of claim 14, wherein the second-2 insulating material is disposed on the lower surface of the board in the second outer portion and covers at least a portion of another outer surface of the second insulating layer.
17. a plurality of first wiring layers disposed in the first insulating layer; a plurality of first via layers disposed in the first insulating layer and each connected to at least one of the plurality of first wiring layers; a plurality of second wiring layers disposed in the second insulating layer; a plurality of second via layers disposed in the second insulating layer and each connected to at least one of the plurality of second wiring layers; at least one through via extending through the substrate; At least a portion of a first via layer arranged at a lowermost side among the plurality of first via layers is connected to an upper side of the through via, The printed circuit board according to claim 13 , wherein at least a portion of the second via layer arranged on the uppermost side of the plurality of second via layers is connected to a lower side of the through via.
18. The substrate includes a glass substrate having a thermal expansion coefficient of 6 ppm / °C to 10 ppm / °C; The first insulating layer and the second insulating layer each contain ABF (Ajinomoto Build-up Film) having a thermal expansion coefficient of more than 10 ppm / °C; 14. The printed circuit board of claim 13, wherein the first insulating material and the second insulating material each include a PPG (Prepreg), an ABF (Ajinomoto Build-up Film), or a ceramic having a thermal expansion coefficient of less than 6 ppm / °C.