Gate driver circuit, motor drive device using same, and electronic apparatus

Abstract

To provide a gate driver circuit capable of detecting abnormality, while suppressing an increase in a circuit area.SOLUTION: A high-side sensor 280 asserts a high-side detection signal HDET when a potential difference between two nodes of a high-side transistor MH constituting an inverter circuit 110 crosses a predetermined threshold level. A high-side driver 220 is capable of supplying a high voltage or a low voltage between a gate and a source of the high-side transistor MH and having a controllable driving capability. A control circuit 210 causes the high-side driver 220 to generate a high voltage when a control signal SCTRL instructs turning-on of the high-side transistor MH, and changes the driving capability of the high-side driver 220 in response to an assertion of the high-side detection signal HDET. The control circuit 210 determines that abnormality has occurred when the assertion of the high-side detection signal HDET does not occur within a predetermined time.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a gate driver circuit.

Background Art

[0002] A motor driver circuit includes a bridge circuit and a gate driver circuit that drives the bridge circuit. The bridge circuit is a half-bridge circuit, an H-bridge circuit, a three-phase bridge circuit (hereinafter collectively referred to as a bridge circuit), etc., and includes a high-side transistor and a low-side transistor.

[0003] The gate driver circuit includes a high-side driver that drives the high-side transistor and a low-side driver that drives the low-side transistor. When the gate voltage of the high-side transistor or the low-side transistor is changed steeply, a through current or ringing caused by the reverse recovery current of the flywheel diode occurs.

[0004] In order to suppress the through current and ringing, the high-side driver and the low-side driver are configured such that the driving ability (current supply ability) is controllable (switchable). The gate driver circuit includes a group of sensors that compares the voltage between the gate and drain and / or the voltage between the gate and source of each of the high-side transistor and the low-side transistor with a threshold voltage. Then, in response to a change in the output of the sensor group, the driving ability of the high-side transistor and the low-side transistor is changed according to the on / off degree of the high-side transistor and the low-side transistor.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

[0006] [Summary] In a gate driver circuit, when it is desired to detect abnormalities such as an open circuit or a short circuit at the output terminal of a bridge circuit, it has been necessary to provide a sensor group for abnormality detection separately from the sensor group for controlling the driving ability. As a result, the circuit area has increased and / or the power consumption has increased.

[0007] The present disclosure has been made in view of such problems, and an exemplary object of one of its aspects is to provide a gate driver circuit capable of detecting abnormalities while suppressing an increase in circuit area.

[0008] A gate driver circuit according to an aspect of the present disclosure includes a high-side sensor that asserts a high-side detection signal when the potential difference between two nodes of a high-side transistor constituting an inverter circuit crosses a predetermined threshold level, a high-side driver capable of supplying a high voltage or a low voltage between the gate and source of the high-side transistor and configured to be capable of controlling the driving ability, and a control circuit that generates a high voltage for the high-side driver when a control signal instructs the high-side transistor to turn on and changes the driving ability of the high-side driver in response to the assertion of the high-side detection signal. The control circuit determines that there is an abnormality when the assertion of the high-side detection signal does not occur within a predetermined time.

[0009] In addition, combinations of the above components arbitrarily, and those obtained by mutually substituting the components and expressions of the present disclosure among methods, devices, systems, etc. are also effective as aspects of the present invention.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

[0011] [Detailed Description] (Overview of Embodiment) An overview of some exemplary embodiments of the present disclosure will be described. This overview is a prelude to the detailed description to follow and is for the purpose of providing a basic understanding of the embodiments by simplifying and explaining some concepts of one or more embodiments, and is not intended to limit the scope of the invention or disclosure. For convenience, "one embodiment" may be used to refer to one embodiment (example or modification) or a plurality of embodiments (examples or modifications) disclosed in this specification.

[0012] This overview is not an exhaustive overview of all possible embodiments and is not intended to identify the important elements of all embodiments or to delineate the scope of some or all aspects. Its sole purpose is to present, in a simplified form, some concepts of one or more embodiments as a prelude to the more detailed description to be presented later.

[0013] The gate driver circuit according to one embodiment includes a high-side sensor that asserts a high-side detection signal when the potential difference between two nodes of a high-side transistor constituting an inverter circuit crosses a predetermined threshold level, a high-side driver capable of supplying a high voltage or a low voltage between the gate and source of the high-side transistor and configured to have controllable driving ability, and a control circuit that generates a high voltage for the high-side driver when a control signal instructs the high-side transistor to turn on and changes the driving ability of the high-side driver in response to the assertion of the high-side detection signal. The control circuit determines that there is an abnormality when the assertion of the high-side detection signal does not occur within a predetermined time.

[0014] According to this aspect, one sensor can be used for both controlling the driving ability of the high-side driver and detecting an abnormality, and an abnormality detection function can be added while suppressing an increase in circuit area.

[0015] In one embodiment, the high-side sensor may monitor the drain-source voltage of the high-side transistor.

[0016] In one embodiment, the high-side sensor may monitor the gate-source voltage of the high-side transistor.

[0017] In one embodiment, the predetermined time may be longer than the turn-on time of the high-side transistor during normal operation.

[0018] In one embodiment, the control circuit may determine that there is an abnormality when the high-side detection signal is negated after being once asserted.

[0019] In one embodiment, the gate driver circuit may further include a low-side sensor that asserts a low-side detection signal when the potential difference between two nodes of the low-side transistor constituting the inverter circuit crosses a predetermined threshold level, and a low-side driver that can supply a high voltage or a low voltage between the gate and the source of the low-side transistor and is configured such that its driving ability is controllable. When the control signal instructs the low-side transistor to turn on, the control circuit generates a high voltage for the low-side transistor and changes the driving ability of the low-side driver in response to the assertion of the low-side detection signal. The control circuit may determine that there is an abnormality when the assertion of the low-side detection signal does not occur within a predetermined time.

[0020] In one embodiment, the control circuit may determine that there is an abnormality when the low-side detection signal is negated after being once asserted.

[0021] In one embodiment, the gate driver circuit may be integrally integrated on one semiconductor substrate.

[0022] A motor drive device according to one embodiment may include an inverter circuit including a high-side transistor and a low-side transistor, and any of the above-described gate driver circuits that drive the high-side transistor and the low-side transistor.

[0023] An electronic device according to one embodiment may include a motor and the above-described motor drive device that drives the motor.

[0024] (Embodiment) Hereinafter, preferred embodiments will be described with reference to the drawings. The same or equivalent components, members, and processes shown in each drawing are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. Also, the embodiments are illustrative and not restrictive of the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0025] In this specification, the phrase "member A is in a state of being connected to member B" includes not only the case where member A and member B are physically directly connected, but also the case where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their connection.

[0026] Similarly, the phrase "member C is in a state of being provided between member A and member B" includes not only the case where member A and member C, or member B and member C are directly connected, but also the case where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their connection.

[0027] FIG. 1 is a circuit diagram of a switching circuit 100 including a gate driver circuit 200 according to an embodiment. The switching circuit 100 includes a bridge circuit 110 and a gate driver circuit 200. Here, only the configuration of one phase of the switching circuit 100 is shown, but the switching circuit 100 may be three-phase or an H-bridge circuit.

[0028] The bridge circuit 110 includes an upper arm 112 provided between a power line (input line) 102 and an output terminal (output line) 104, and a lower arm 114 provided between the output line 104 and a ground line 106. The upper arm 112 includes a high-side transistor MH and a flywheel diode (freewheeling diode) DH connected in parallel. The lower arm 114 includes a low-side transistor ML and a flywheel diode DL connected in parallel. In the present embodiment, the high-side transistor MH and the low-side transistor ML are N-channel MOSFETs, and their respective body diodes also serve as the flywheel diodes DH and DL. Depending on the application, a shunt resistor for current detection may be inserted between the low-side transistor ML and the ground line 106.

[0029] The gate driver circuit 200 has a control signal S CTRLBased on this, the high-side transistor MH and the low-side transistor ML of the bridge circuit 110 are controlled. The control signal S CTRL can take three states φ1 to φ3.

[0030] The first state φ1 is a high output state (V OUT =V IN ) where the high-side transistor MH is on and the low-side transistor ML is off.

[0031] The second state φ2 is a low output state (V OUT = 0V) where the high-side transistor MH is off and the low-side transistor ML is on.

[0032] The third state φ3 is a high impedance state (V OUT = HiZ) where the high-side transistor MH is off and the low-side transistor ML is off.

[0033] The gate driver circuit 200 includes a control circuit 210, a high-side driver 220, a low-side driver 260, a high-side sensor 280, and a low-side sensor 290, and is a functional IC integrated on a single semiconductor substrate.

[0034] The high-side gate pin HG of the gate driver circuit 200 is connected to the gate of the high-side transistor MH, and the low-side gate pin LG is connected to the gate of the low-side transistor ML. The ground pin GND is connected to the source of the low-side transistor ML. The switching pin SW is connected to the output line 104. A bootstrap capacitor C BST is externally connected between the bootstrap pin BST and the switching pin SW.

[0035] The bootstrap line 202 is connected to the bootstrap pin BST, the switching line 204 is connected to the switching pin SW, and the ground line 206 is connected to the GND pin. A fixed voltage V REG is applied to the bootstrap line 202 via a rectifying element 208. The rectifying element 208 and the bootstrap capacitor C BST form a bootstrap circuit, and by utilizing the switching operation of the bridge circuit 110, a bootstrap voltage V OUT that is higher than the voltage (switching voltage) V BST of the switching line 204 by a predetermined voltage ΔV is generated on the bootstrap line 202. When the forward voltage of the rectifying element 208 is Vf, ΔV = V REG - Vf.

[0036] When the control signal S CTRL is in the first state φ1, the high-side transistor MH is turned on and the low-side transistor ML is turned off. When the control signal S CTRL is in the second state φ2, the high-side transistor MH is turned off and the low-side transistor ML is turned on. When the control signal S CTRL is in the third state φ3, the high-side control signal HCTRL and the low-side control signal LCTRL are generated such that the high-side transistor MH is turned off and the low-side transistor ML is turned off.

[0037] The high-side driver 220 controls the gate voltage V HG of the high-side transistor MH according to the high-side control signal HCTRL. The upper power supply node 221 of the high-side driver 220 is connected to the bootstrap line 202, and the bootstrap voltage V BST is supplied. The lower power supply node 222 is connected to the switching line 204, and the switching voltage V OUT is supplied. The high-side driver 220 generates either a high voltage V BST or a low voltage V OUT at the high-side gate pin HG according to the high-side control signal HCTRL.

[0038] The high-side driver 220 is configured such that its driving ability is controllable. The high-side driver 220 is configured as a current-driven type or a voltage-driven type. In the case of a current-driven type high-side driver, its driving ability can be understood as the amount of current sourced to or sunk from the gate of the high-side transistor MH. In the case of a voltage-driven type high-side driver, its driving ability can be understood as the output impedance. In short, the high-side driver 220 is configured such that the slope (slew rate) of the gate voltage V HG generated at the high-side gate pin HG can be switched.

[0039] The low-side driver 260 controls the gate voltage V LG of the low-side transistor ML in response to the low-side control signal LCTRL. The upper power supply node 261 of the low-side driver 260 is supplied with the power supply voltage V DD , and the lower power supply node 262 of the low-side driver 260 is supplied with the ground voltage.

[0040] Similar to the high-side driver 220, the low-side driver 260 is configured such that its driving ability is controllable, and the slope of the gate voltage V LG generated at the low-side gate pin LG can be switched.

[0041] The high-side sensor 280 compares the voltage between two nodes of the high-side transistor MH with a predetermined threshold level V TH(H) . When the potential difference between the two nodes crosses the threshold level V TH(H) , the high-side detection signal HDET is asserted (e.g., high). In this embodiment, the high-side sensor 280 compares the drain-source voltage V DS(H) of the high-side transistor MH with the threshold level V TH(H) during the turn-on sequence of the high-side transistor MH, and when V DS(H) < V TH(H)When this occurs, the high-side detection signal HDET is asserted.

[0042] The control circuit 210, when the control signal S CTRL is in the first state φ1, that is, when instructing the high-side transistor MH to turn on, generates a high voltage V BST to the high-side driver 220. And in response to the assertion of the high-side detection signal HDET, the driving ability of the high-side driver 220, that is, the rising speed of the gate voltage V HG is changed.

[0043] The low-side sensor 290 compares the voltage between two nodes of the low-side transistor ML with a predetermined threshold level V TH(L) . The high-side sensor 280 asserts the low-side detection signal LDET when the potential difference between the two nodes crosses the threshold level V TH(L) . In this embodiment, the low-side sensor 290 compares the voltage V DS(L) between the drain and source of the low-side transistor ML with the threshold level V TH(L) during the turn-on sequence of the low-side transistor ML, and when V DS(L) <V TH(L) occurs, the low-side detection signal LDET is asserted.

[0044] The control circuit 210, when the control signal S CTRL is in the second state φ2, that is, when instructing the low-side transistor ML to turn on, generates a high voltage V DD to the low-side driver 260. And in response to the assertion of the low-side detection signal LDET, the driving ability of the low-side driver 260, that is, the rising speed of the gate voltage V LG is changed.

[0045] The control circuit 210, when the control signal SCTRL is in the first state φ1, that is, during the turn-on period of the high-side transistor MH, if the assertion of the high-side detection signal HDET lasts for a predetermined time τ HWhen it does not occur internally, it is determined as an abnormality. This abnormality can be caused by, for example, a short circuit of the output line 104. When the control circuit 210 detects an abnormality, it asserts an error signal ERR. A predetermined time τ H can be set longer than the turn-on time of the high-side transistor MH in the normal state. For example, the predetermined time τ H can be set to 1 to 10 times the turn-on time. When the turn-on time is 500 ns, the predetermined time τ H can be set in the range of 500 ns to 5 μs.

[0046] Also, when the control signal SCTRL is in the second state φ2, that is, during the turn-on period of the low-side transistor ML, if the assertion of the low-side detection signal LDET does not occur within a predetermined time τ L it is determined as an abnormality. This abnormality can be caused by, for example, an open circuit of the output line 104. When the control circuit 210 detects an abnormality, it asserts an error signal ERR.

[0047] The control circuit 210 includes a logic circuit 212 and a timer circuit 214. The logic circuit 212 uses the timer circuit 214 to measure a predetermined time τ H and determines it as an abnormality when the high-side detection signal HDET is not asserted during the measurement period. Similarly, the logic circuit 212 uses the timer circuit 214 to measure a predetermined time τ L and determines it as an abnormality when the low-side detection signal LDET is not asserted during the measurement period.

[0048] The above is the configuration of the switching circuit 100. Next, its operation will be described.

[0049] FIG. 2 is a waveform diagram for explaining the operation of the switching circuit 100 of FIG. 1 in the normal state. Here, the transition from the low output to the high output will be explained.

[0050] Before time t0, the control signal S CTRLindicates the second state φ2, with the high-side control signal HCTRL being low and the low-side control signal LCTRL being high.

[0051] At time t0, the control signal S CTRL changes to the first state φ1. The control circuit 210 switches the low-side control signal LCTRL to low. As a result, the low-side driver 260 reduces the gate voltage V LG of the low-side transistor ML. When the turn-off of the low-side transistor ML is detected by a sensor (not shown) at time t1, the control circuit 210 switches the high-side control signal HCTRL to high.

[0052] When the high-side control signal HCTRL is high, the high-side driver 220 increases the gate voltage V HG of the high-side transistor MH. Initially, the driving ability of the high-side driver 220 is set relatively low. When the gate-source voltage V GS(H) of the high-side transistor MH exceeds the gate threshold of the MOSFET, the high-side transistor MH turns on. When the high-side transistor MH turns on, the output voltage V OUT starts to rise.

[0053] As the output voltage V OUT rises, the drain-source voltage V DS(H) of the high-side transistor MH decreases. Then, when the drain-source voltage V DS(H) becomes smaller than the threshold level V TH(H) at time t2, the high-side detection signal HDET is asserted. In response to the assertion of the high-side detection signal HDET, the driving ability of the high-side driver 220 is increased. As a result, the rising speed of the high-side gate voltage V HG becomes faster, and the rising speed of the output voltage V OUT also becomes faster.

[0054] The above is the operation of the normal state of the switching circuit 100. Subsequently, the operation in the abnormal state where the output line 104 is grounded will be described.

[0055] FIG. 3 is a waveform diagram for explaining the operation of the switching circuit 100 of FIG. 1 in an abnormal state. Up to time t1, it is the same as FIG. 2.

[0056] At time t1, the high-side driver 220 raises the gate voltage V HG of the high-side transistor MH. Initially, the driving ability of the high-side driver 220 is set relatively low. When the voltage V GS(H) between the gate and source of the high-side transistor MH exceeds the gate threshold of the MOSFET, the high-side transistor MH turns on. When the high-side transistor MH turns on, the output voltage V OUT starts to rise.

[0057] However, if the output line 104 is grounded, the output voltage V OUT cannot rise and remains near 0V. Therefore, the voltage V DS(H) between the drain and source of the high-side transistor MH does not become smaller than the threshold level V TH(H) , and the high-side detection signal HDET continues to be negated.

[0058] During a predetermined time τ H from time t1, since the high-side detection signal HDET is not asserted, the control circuit 210 determines that it is abnormal and asserts the error signal ERR.

[0059] In this way, according to the switching circuit 100, a ground fault of the output line 104 can be detected.

[0060] Subsequently, the transition from the high output to the low output will be described.

[0061] FIG. 4 is a waveform diagram for explaining the operation of the switching circuit 100 of FIG. 1 in a normal state.

[0062] Before time t0, the control signal S CTRL indicates the first state φ1, the high-side control signal HCTRL is high, and the low-side control signal LCTRL is low.

[0063] At time t0, the control signal S CTRL changes to the second state φ2. The control circuit 210 switches the high-side control signal HCTRL low. As a result, the high-side driver 220 reduces the gate voltage V HG of the high-side transistor MH. At time t1, when the turn-off of the high-side transistor MH is detected by a sensor (not shown), the control circuit 210 switches the low-side control signal LCTRL high.

[0064] The low-side driver 260 increases the gate voltage V LG of the low-side transistor ML when the low-side control signal LCTRL is high. Initially, the driving ability of the low-side driver 260 is set to be relatively low. When the voltage V GS(L) between the gate and source of the low-side transistor ML exceeds the gate threshold of the MOSFET, the low-side transistor ML turns on, and the output voltage V OUT starts to decrease.

[0065] Due to the decrease in the output voltage V OUT , the voltage V DS(L) between the drain and source of the low-side transistor ML decreases. Then, at time t2, when the voltage V DS(L) between the drain and source becomes smaller than the threshold level V TH(L) , the low-side detection signal LDET is asserted. In response to the assertion of the low-side detection signal LDET, the driving ability of the low-side driver 260 is increased. As a result, the rising speed of the low-side gate voltage V LG becomes faster, and the decreasing speed of the output voltage V OUT also becomes faster.

[0066] The above is the operation of the normal state of the switching circuit 100. Subsequently, the operation in the abnormal state where the output line 104 is short-circuited will be described.

[0067] FIG. 5 is a waveform diagram for explaining the operation of the switching circuit 100 of FIG. 1 in an abnormal state. Up to time t1, it is the same as FIG. 4.

[0068] At time t1, the low-side driver 260 raises the gate voltage V of the low-side transistor ML. LG Initially, the driving ability of the low-side driver 260 is set relatively low. When the voltage V between the gate and source of the low-side transistor ML exceeds the gate threshold of the MOSFET, the low-side transistor ML turns on, and the output voltage V GS(L) starts to decrease. OUT

[0069] However, if the output line 104 is shorted to the power supply, the output voltage V OUT cannot decrease and remains near the input voltage V IN . Therefore, the voltage V between the drain and source of the low-side transistor ML does not become smaller than the threshold level V DS(L) , and the low-side detection signal LDET continues to be negated. TH(L)

[0070] During a predetermined time τ L from time t1, since the low-side detection signal LDET is not asserted, the control circuit 210 determines that an abnormality has occurred and asserts an error signal ERR.

[0071] In this way, the switching circuit 100 can detect a short circuit of the output line 104.

[0072] Subsequently, a modification of the abnormality detection will be described.

[0073] As shown in FIG. 2, after normally transitioning to the high-output state, if the high-side detection signal HDET, which has once been asserted, returns to being negated, the control circuit 210 may determine that an abnormality has occurred and assert an error signal ERR.

[0074] FIG. 6 is a diagram for explaining a modification of the abnormality detection in the switching circuit 100 of FIG. 1.

[0075] Before time t4, it is the same as the waveform diagram in FIG. 2. When the output line 104 is short-circuited at time t4, the output voltage V OUT drops to near 0V. As a result, the drain-source voltage V DS(H) of the high-side transistor MH becomes small and becomes larger than the threshold level V TH(H) . Consequently, the high-side detection signal H DET is negated. The control circuit 210 determines that there is an abnormality based on the negation of the high-side detection signal H DET and asserts the error signal ERR.

[0076] As shown in FIG. 4, after normally transitioning to the low-output state, if the low-side detection signal LDET that has once been asserted returns to being negated, the control circuit 210 may determine that there is an abnormality and assert the error signal ERR.

[0077] FIG. 7 is a circuit diagram showing a configuration example of the high-side sensor 280. The high-side sensor 280 includes a resistor R11, a current source CS11, and a comparator COMP11. The current source CS11 generates a constant current Ic. A voltage drop R11×Ic proportional to the constant current Ic occurs across the resistor R11. The comparator COMP11 compares the source voltage of the high-side transistor MH, that is, the output voltage V OUT with the voltage Vx (=V IN -R11×I C ) at one end of the resistor R11. That is, the voltage drop R11×I C across the resistor R11 becomes the threshold value V TH(H) .

[0078] The configuration of the high-side sensor 280 is not limited to that in FIG. 7. For example, instead of a comparator, a MOSFET may be used as the voltage comparison means.

[0079] (Modification Example 1) FIG. 8 is a circuit diagram of a switching circuit 100A including a gate driver circuit 200A according to Modification 1. In FIG. 1, the high-side sensor 280 and the low-side sensor 290 monitor the voltage between the gate and drain of the power transistor, but in this modification, the voltage between the gate and source is monitored.

[0080] The high-side sensor 280A of the gate driver circuit 200A compares the voltage V GS(H) between the gate and source of the high-side transistor MH with a threshold voltage V TH(H) and asserts a high-side detection signal HDETA when the two voltages cross. That is, the high-side detection signal HDETA is asserted when V GS(H) >V TH(H) .

[0081] The control circuit 210A relatively lowers the driving ability of the high-side driver 220 while the high-side detection signal HDETA is negated. Then, when the high-side detection signal HDETA is asserted, the control circuit 210A relatively raises the driving ability of the high-side driver 220.

[0082] The low-side sensor 290A compares the voltage V GS(L) between the gate and source of the low-side transistor ML with a threshold voltage V TH(L) and asserts a low-side detection signal LDETA when the two voltages cross. That is, the low-side detection signal LDETA is asserted when V GS(L) >V TH(L) .

[0083] The control circuit 210A relatively lowers the driving ability of the low-side driver 260 while the low-side detection signal LDETA is negated. Then, when the low-side detection signal LDETA is asserted, the control circuit 210A relatively raises the driving ability of the low-side driver 260.

[0084] (Modification 2) FIG. 9 is a circuit diagram of a switching circuit 100B including a gate driver circuit 200B according to a second modification. The switching circuit 100B includes high-side sensors 280, 280A and low-side sensors 290, 290A, and the voltage V DS(H) between the gate and drain of the high-side transistor MH, the voltage V GS(H) between the gate and source, the voltage V DS(L) between the gate and drain of the low-side transistor ML, and the voltage V GS(L) between the gate and source are monitored.

[0085] When turning on the high-side transistor MH, the control circuit 210B uses at least one of the high-side sensors 280, 280A and the low-side sensors 290, 290A to switch the driving ability of the high-side driver 220. For example, when the driving ability of the high-side driver 220 can be switched in n or more steps (n ≧ 3), the driving ability of the high-side driver 220 is switched with reference to the outputs of n - 1 of the high-side sensors 280, 280A and the low-side sensors 290, 290A.

[0086] Then, if any of the n - 1 detected signals to be referred to is not asserted during a predetermined time τ H , it can be determined that there is an abnormality.

[0087] When turning on the low-side transistor ML, the control circuit 210B uses at least one of the high-side sensors 280, 280A, 290, 290A to switch the driving ability of the low-side driver 260. For example, when the driving ability of the low-side driver 260 can be switched in n or more steps (n ≧ 3), the driving ability of the low-side driver 260 is switched with reference to the outputs of n - 1 of the high-side sensors 280, 280A and the low-side sensors 290, 290A.

[0088] Subsequently, the application of the switching circuit 100 will be described. The switching circuit 100 can be suitably used for a driving circuit of a motor.

[0089] FIG. 10 is a circuit diagram of a motor driving device 300 including a switching circuit 100 according to an embodiment. The motor driving device 300 drives a three-phase motor 302 as a load and controls its rotation state.

[0090] The motor driving device 300 includes a bridge circuit 110 and a gate driver circuit 200. The bridge circuit 110 is a three-phase inverter and has legs for the U-phase, V-phase, and W-phase. Each leg of each phase has an upper arm and a lower arm.

[0091] The gate driver circuit 200 includes a control circuit 210 and high-side drivers 220U to 220W and low-side drivers 260U to 260W. The control circuit 210 generates control signals indicating the states of the six arms constituting the bridge circuit 110 based on the state of the three-phase motor 302 as a load.

[0092] The high-side drivers 220U to 220W are configured with the architecture of the high-side driver 220 described above. Also, the low-side drivers 260U to 260W are configured with the architecture of the low-side driver 260 described above.

[0093] Here, a three-phase motor is taken as an example, but a single-phase motor may also be used. In this case, the bridge circuit 110 becomes an H-bridge circuit.

[0094] Subsequently, the applications of the motor driving device 300 will be described. The motor driving device 300 can be used for controlling the spindle motor of a hard disk and for controlling the lens driving motor of an imaging device. Alternatively, it can be used for driving the head driving motor of a printer or the paper feeding motor. Alternatively, the motor driving device 300 can be used for driving motors in electric vehicles, hybrid vehicles, etc.

[0095] The embodiments are examples, and those skilled in the art will understand that various modifications are possible in the combination of each of their components and each processing process, and such modifications are also within the scope of the present disclosure or the present invention. Hereinafter, such modifications will be described.

[0096] (Modification Example 1) The application of the switching circuit 100 is not limited to the motor drive device 300. For example, the switching circuit 100 can be suitably used for a switching regulator (DC / DC converter), various power conversion devices (inverters and converters), an inverter for lighting a discharge lamp, a digital audio amplifier, and the like. Therefore, the switching circuit 100 can be used in consumer devices including electronic devices and home appliances, automobiles and in-vehicle parts, industrial vehicles and industrial machines.

[0097] The embodiments described using specific terms only show the principles and applications of the present invention. In the embodiments, many modifications and arrangement changes are allowed without departing from the idea of the present invention defined in the claims.

[0098] (Appendix) The following technologies are disclosed in this specification.

[0099] (Item 1) A high-side sensor that asserts a high-side detection signal when the potential difference between two nodes of a high-side transistor constituting an inverter circuit crosses a predetermined threshold level, A high-side driver capable of supplying a high voltage or a low voltage between the gate and source of the high-side transistor and configured to have controllable driving ability, A control circuit that generates the high voltage to the high-side driver when a control signal instructs the high-side transistor to turn on, and changes the driving ability of the high-side driver in response to the assertion of the high-side detection signal, Comprising, The control circuit is a gate driver circuit that determines an abnormality when the assertion of the high-side detection signal does not occur within a predetermined time.

[0100] (Item 2) The high-side sensor is the gate driver circuit according to item 1 that monitors the voltage between the drain and source of the high-side transistor.

[0101] (Item 3) The high-side sensor is the gate driver circuit according to item 1 that monitors the voltage between the gate and source of the high-side transistor.

[0102] (Item 4) The predetermined time is longer than the turn-on time of the high-side transistor during normal operation. The gate driver circuit according to any one of items 1 to 3.

[0103] (Item 5) When the high-side detection signal is once asserted and then negated, the control circuit determines it as an abnormality. The gate driver circuit according to any one of items 1 to 4.

[0104] (Item 6) A low-side sensor that asserts a low-side detection signal when the potential difference between two nodes of the low-side transistor constituting the inverter circuit crosses a predetermined threshold level, A low-side driver that can supply a high voltage or a low voltage between the gate and source of the low-side transistor and is configured such that its driving ability is controllable, and further includes When the control signal instructs the turn-on of the low-side transistor, the control circuit generates the high voltage for the low-side transistor and changes the driving ability of the low-side driver in response to the assertion of the low-side detection signal. When the assertion of the low-side detection signal does not occur within a predetermined time, the control circuit determines it as an abnormality. The gate driver circuit according to any one of items 1 to 5.

[0105] (Item 7) The gate driver circuit according to item 6, wherein the control circuit determines an abnormality when the low-side detection signal is negated after being once asserted.

[0106] (Item 8) The gate driver circuit according to any one of items 1 to 6, which is integrally formed on a single semiconductor substrate.

[0107] (Item 9) An inverter circuit including a high-side transistor and a low-side transistor, and the gate driver circuit according to any one of items 1 to 8 for driving the high-side transistor and the low-side transistor. A motor drive device comprising the same.

[0108] (Item 10) A motor, and the motor drive device according to item 9 for driving the motor. An electronic device comprising the same.

Explanation of Reference Numerals

[0109] 100 Switching circuit 102 Power supply line 104 Output line 106 Ground line 110 Bridge circuit 112 Upper arm 114 Lower arm MH High-side transistor ML Low-side transistor DH, DL Flywheel diode 200 Gate driver circuit 210 Control circuit 220 High-side driver 260 Low-side driver 280 High-side sensor 290 Low-side sensor 300 Motor drive device 302 Three-phase motor

Claims

1. A high-side sensor that asserts a high-side detection signal when the potential difference between two nodes of a high-side transistor constituting an inverter circuit crosses a predetermined threshold level; A high-side driver capable of supplying a high voltage or a low voltage between the gate and source of the high-side transistor and configured to have a controllable driving ability; A control circuit that generates the high voltage for the high-side driver when the control signal instructs the high-side transistor to turn on and changes the driving ability of the high-side driver in response to the assertion of the high-side detection signal; comprising The control circuit determines an abnormality when the assertion of the high-side detection signal does not occur within a predetermined time. A gate driver circuit.

2. The high-side sensor monitors the voltage between the drain and source of the high-side transistor. The gate driver circuit according to claim 1.

3. The high-side sensor monitors the voltage between the gate and source of the high-side transistor. The gate driver circuit according to claim 1.

4. The predetermined time is longer than the turn-on time of the high-side transistor during normal operation. The gate driver circuit according to any one of claims 1 to 3.

5. The control circuit determines an abnormality when the high-side detection signal is negated after being once asserted. The gate driver circuit according to any one of claims 1 to 3.

6. A low-side sensor that asserts a low-side detection signal when the potential difference between two nodes of a low-side transistor constituting the inverter circuit crosses a predetermined threshold level; A low-side driver capable of supplying a high voltage or a low voltage between the gate and source of the low-side transistor and configured to have a controllable driving ability; further comprising When the control signal instructs the on state of the low-side transistor, the control circuit generates the high voltage for the low-side transistor and changes the driving ability of the low-side driver in response to the assertion of the low-side detection signal. The gate driver circuit according to any one of claims 1 to 3, wherein the control circuit determines an abnormality when the assertion of the low-side detection signal does not occur within a predetermined time.

7. The gate driver circuit according to claim 6, wherein the control circuit determines an abnormality when the low-side detection signal is negated after being once asserted.

8. The gate driver circuit according to any one of claims 1 to 3, which is integrally formed on a single semiconductor substrate.

9. An inverter circuit including a high-side transistor and a low-side transistor, The gate driver circuit according to any one of claims 1 to 3 for driving the high-side transistor and the low-side transistor, A motor drive device comprising

10. A motor, The motor drive device according to claim 9 for driving the motor, An electronic device comprising

Images