Solar cell and photovoltaic module

Abstract

To provide a solar cell and a photovoltaic module in a field of solar cells.SOLUTION: The solar cell includes a first polysilicon-doped layer and a second polysilicon-doped layer on both sides of a substrate facing each other. The first polysilicon-doped layer is doped with an n-type doping element. The surface of the first polysilicon-doped layer has a first roughness. The second polysilicon-doped layer is doped with a p-type doping element. The surface of the second polysilicon-doped layer has a second roughness. The second roughness is smaller than the first roughness. The solar cell includes a first electrode and a second electrode. The first electrode is electrically connected to the first polysilicon doped layer by passing through a first passivation layer. The second electrode is electrically connected to the second polysilicon doped layer by passing through a second passivation layer. The solar cell and a photovoltaic module provided in the present invention can improve the photoelectric conversion efficiency of the solar cell.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The embodiments of the present application relate to the field of solar cells, and in particular, to solar cells and photovoltaic modules.

Background Art

[0002] Currently, with the depletion of fossil energy, solar cells are being increasingly widely used as an alternative for new energy. A solar cell is a device that converts solar light energy into electrical energy. Solar cells utilize the principle of photovoltaic effect to generate carriers and extract the carriers at the electrodes, thereby contributing to the effective utilization of electrical energy.

[0003] Currently, solar cells mainly include IBC (Interdigitated Back Contact) cells, TOPCON (Tunnel Oxide Passivated Contact) cells, PERC cells (Passivated Emitter and Real Cell), and heterojunction cells, etc. By installing different film layers and limiting functionality, optical losses are reduced, the recombination of photo-generated carriers on the surface and inside the silicon substrate is reduced, and the photoelectric conversion efficiency of the solar cell is increased.

[0004] However, currently, the photoelectric conversion efficiency of solar cells is still not good.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The embodiments of the present application provide solar cells and photovoltaic modules that are at least advantageous for improving the photoelectric conversion efficiency of solar cells.

Means for Solving the Problems

[0006] According to some embodiments of the present application, in one aspect of the embodiments of the present application, a solar cell is provided, which includes a substrate having a first surface and a second surface disposed opposite to each other, a first dielectric layer located on the first surface and a first polysilicon doped layer located on the first dielectric layer, a second dielectric layer located on the second surface and a second polysilicon doped layer located on the second dielectric layer, a first passivation layer located on the first polysilicon doped layer and a second passivation layer located on the second polysilicon doped layer, a first electrode and a second electrode. The first polysilicon doped layer is doped with an N-type doping element, the surface of the first polysilicon doped layer away from the first dielectric layer has a first roughness, the second polysilicon doped layer is doped with a P-type doping element, here, the surface of the second polysilicon doped layer away from the second dielectric layer has a second roughness, the second roughness is smaller than the first roughness, the first electrode penetrates through the first passivation layer and is electrically connected to the first polysilicon doped layer, and the second electrode penetrates through the second passivation layer and is electrically connected to the second polysilicon doped layer.

[0007] In some embodiments, the first polysilicon doped layer includes a plurality of first silicon crystal particles, the surface of the plurality of first silicon crystal particles constitutes the surface of the first polysilicon doped layer having the first roughness, the second polysilicon doped layer includes a plurality of second silicon crystal particles, the surface of the plurality of second silicon crystal particles constitutes the surface of the second polysilicon doped layer having the second roughness, and the crystal grain size of the first silicon crystal particles is smaller than the crystal grain size of the second silicon crystal particles.

[0008] In some embodiments, the range of the crystal grain size of the first silicon crystal particles includes 10 nm to 300 nm.

[0009] In some embodiments, the range of the crystal grain size of the second silicon crystal particles includes 100 nm to 900 nm.

[0010] In some embodiments, the shape of the first silicon crystal particles includes spherical particles or quasi-spherical particles.

[0011] In some embodiments, the shape of the second silicon crystal particles includes sheet-like, plate-like or particle-like.

[0012] In some embodiments, the one-dimensional dimension in the radial direction of the first silicon crystal particles is smaller than that of the second silicon crystal particles in the radial direction, and the height of the first silicon crystal particles is larger than the height of the second silicon crystal particles.

[0013] In some embodiments, the solar cell includes electrode regions and non-electrode regions arranged alternately, the first dielectric layer and the first polysilicon doped layer are located in the electrode regions, the first passivation layer is located in the electrode regions and the non-electrode regions, the first surface facing the electrode regions has a first texture structure, the first dielectric layer covers the first texture structure, the first surface facing the non-electrode regions has a second texture structure, and the first passivation layer further covers the second texture structure.

[0014] In some embodiments, the minimum distance between the first texture structure and the second surface is a first distance, the minimum distance between the second texture structure and the second surface is a second distance, and the first distance is larger than the second distance.

[0015] In some embodiments, the solar cell includes electrode regions and non-electrode regions arranged alternately, the second dielectric layer and the second polysilicon doped layer are located in the electrode regions, the second passivation layer is located in the electrode regions and the non-electrode regions, the second surface facing the electrode regions has a first texture structure, the second dielectric layer covers the first texture structure, the second surface facing the non-electrode regions has a second texture structure, and the second passivation layer covers the second texture structure.

[0016] In some embodiments, the minimum distance between the first texture structure and the first surface is a first distance, the minimum distance between the second texture structure and the first surface is a second distance, and the first distance is greater than the second distance.

[0017] In some embodiments, the range of the difference between the first distance and the second distance includes 0.5 to 10 μm.

[0018] In some embodiments, the first surface of the substrate further includes a third texture structure, the third texture structure is interposed at the boundary between the non-electrode region and the electrode region, and some of the third texture structures include a first side surface and a second side surface, the first side surface faces the electrode region, and the first dielectric layer covers the first side surface, the second side surface faces the non-electrode region, and the radial length of the first side surface is smaller than the radial length of the second side surface.

[0019] In some embodiments, the third texture structure includes a prismatic structure, a pyramid structure, or a tetrahedral structure.

[0020] In some embodiments, at least one of the first texture structure or the second texture structure includes a platform protrusion structure or a pyramid texture structure.

[0021] In some embodiments, the first surface is a front surface, and an N-type doping element is doped in the substrate.

[0022] In some embodiments, the average thickness of the first polysilicon doped layer is less than or equal to the average thickness of the second polysilicon doped layer.

[0023] In some embodiments, the material of at least one of the first dielectric layer or the second dielectric layer includes silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or silicon carbide.

[0024] According to some embodiments of the present application, in another aspect of the embodiments of the present application, a photovoltaic module is further provided. This photovoltaic module includes a cell string in which solar cells in any one of the plurality of above-described embodiments are connected by a connection member, a sealing layer for covering the surface of the cell string, and a cover plate for covering the surface of the sealing layer away from the cell string.

Advantages of the Invention

[0025] The technical solution provided by the embodiments of the present application has at least the following advantages.

[0026] In the solar cell provided by the embodiment of the present application, the solar cell includes a first polysilicon doped layer and a second polysilicon doped layer. The first polysilicon doped layer is located on the first surface, and the second polysilicon doped layer is located on the second surface. Through the design of the full passivation contact cell structure, the recombination current of the cell is reduced to the maximum extent, and the open-circuit voltage of the cell is increased. Further, in the process of manufacturing the full passivation contact cell, there is no design of a high-temperature diffusion layer. The first polysilicon doped layer and the second polysilicon doped layer are used as carrier transport layers to eliminate the influence of the recombination current of the diffusion layer and improve the open-circuit voltage of the cell. The first polysilicon doped layer is doped with an N-type doping element, the surface of the first polysilicon doped layer has a first roughness, the second polysilicon doped layer is doped with a P-type doping element, the surface of the second polysilicon doped layer has a second roughness, and the second roughness is smaller than the first roughness. Thereby, based on the morphological difference between the first polysilicon doped layer and the second polysilicon doped layer, for the first polysilicon doped layer with a higher roughness, the surface of the first polysilicon doped layer can enhance the internal reflection of incident light and reduce the optical loss of the solar cell. The first polysilicon doped layer can further increase the contact area between the first electrode and the first polysilicon doped layer and improve the contact performance and solder tensile strength of the first polysilicon doped layer. For the second polysilicon doped layer with a lower roughness, the surface of the second polysilicon doped layer is smooth, the uniformity of the second passivation layer deposited thereon is good, and the passivation performance of the second passivation layer is good, which can improve the problem of recombination defects of the solar cell.

Brief Description of the Drawings

[0027] One or more embodiments are exemplarily illustrated in the figures in the corresponding accompanying drawings. However, these exemplary illustrations do not limit the embodiments. Unless otherwise specified, the figures in the accompanying drawings are not limited by scale. To more clearly explain the embodiments of the present application or the technical solutions in the prior art, the drawings necessary for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative labor.

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

DETAILED DESCRIPTION OF THE INVENTION

[0028] As can be seen from the background art, currently, the photoelectric conversion efficiency of solar cells is not good.

[0029] Embodiments of the present application provide a solar cell and a photovoltaic module. The solar cell includes a first polysilicon doped layer and a second polysilicon doped layer. The first polysilicon doped layer is located on the first surface, and the second polysilicon doped layer is located on the second surface. By designing a full passivation contact battery structure, the recombination current of the battery is reduced to the maximum extent, and the open-circuit voltage of the battery is increased. Further, in the process of manufacturing the full passivation contact battery, there is no design of a high-temperature diffusion layer. The first polysilicon doped layer and the second polysilicon doped layer are used as carrier transport layers to remove the influence of the recombination current of the diffusion layer and improve the open-circuit voltage of the battery. The first polysilicon doped layer is doped with an N-type doping element, the surface of the first polysilicon doped layer has a first roughness, the second polysilicon doped layer is doped with a P-type doping element, the surface of the second polysilicon doped layer has a second roughness, and the second roughness is smaller than the first roughness. Thereby, based on the morphological difference between the first polysilicon doped layer and the second polysilicon doped layer, for the first polysilicon doped layer with a higher roughness, the surface of the first polysilicon doped layer can enhance the internal reflection of incident light and reduce the optical loss of the solar cell. The first polysilicon doped layer can further increase the contact area between the first electrode and the first polysilicon doped layer and improve the contact performance and solder tensile strength of the first polysilicon doped layer. For the second polysilicon doped layer with a low roughness, the surface of the second polysilicon doped layer is smooth, the uniformity of the second passivation layer deposited thereon is good, and the passivation performance of the second passivation layer is good, which can improve the problem of recombination defects of the solar cell.

[0030] Hereinafter, each embodiment of the present application will be described in detail in combination with the drawings. However, as those skilled in the art can understand, in order to enable readers to better understand the present application, although a number of technical details are proposed in the embodiments of the present application, the technical solutions claimed by the embodiments of the present application can be realized even without these technical details and various changes and modifications based on the following embodiments.

[0031] FIG. 1 is a diagram showing the structure of a solar cell provided in an embodiment of the present application, FIG. 2 is a diagram showing a cross-sectional structure along the A1-A2 cross-section of FIG. 1, FIG. 3 is a scanning electron micrograph of a first polysilicon doped layer in a solar cell provided in an embodiment of the present application, and FIG. 4 is a scanning electron micrograph of a second polysilicon doped layer in a solar cell provided in an embodiment of the present application.

[0032] As shown in FIGS. 1 and 2, according to some embodiments of the present application, in one aspect of the embodiments of the present application, a solar cell for improving the photoelectric conversion efficiency is provided. The solar cell includes a substrate 100, and the substrate 100 is provided with a first surface 11 and a second surface 12 that are oppositely disposed.

[0033] In some embodiments, the material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material may consist of a single element, for example, silicon or germanium. Here, the elemental semiconductor material may be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single crystal state and an amorphous state is called a microcrystalline state). For example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0034] In some embodiments, the material of the substrate 100 may be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, materials such as silicon germanium, silicon carbide, gallium arsenide, indium gallium arsenide, perovskite, cadmium telluride, copper indium selenide, etc. The substrate 100 may be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

[0035] In some embodiments, the substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. In the N-type semiconductor substrate, an N-type doping element is doped, and the N-type doping element may be any of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). In the P-type semiconductor substrate, a P-type doping element is doped, and the P-type doping element may be any of group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0036] In some embodiments, the first surface 11 of the substrate 100 may be the front surface and the second surface 12 may be the back surface, or the first surface 11 of the substrate 100 may be the back surface and the second surface 12 may be the front surface. That is, the solar cell is a single-sided cell, and the front surface is used as the light-receiving surface to receive incident light, and the back surface can be used as the backlight surface. In some embodiments, the solar cell is a double-sided cell, that is, both the first surface and the second surface of the substrate can be used as light-receiving surfaces to receive incident light. Here, the backlight surface can also receive incident light, but the efficiency of receiving incident light is lower than that of the light-receiving surface.

[0037] In the solar cells shown in FIGS. 2, 6, and 8, the first surface of the substrate is the front surface and the second surface of the substrate is the back surface. That is, by improving the front surface of the solar cell, the parasitic absorption of the front surface of the solar cell is reduced, and by improving the back surface of the solar cell, the passivation performance of the back surface of the solar cell is enhanced. In the solar cells shown in FIGS. 2, 6, and 8, the side facing up on the substrate is used as the light-receiving surface, and the side facing down on the substrate is used as the backlight surface.

[0038] In addition, in the solar cells shown in FIGS. 2, 6, and 8, the case where the first surface of the substrate is the front surface and the second surface of the substrate is the back surface is taken as an example for explanation. In some embodiments of the present application, solar cells in which the first surface is the back surface and the second surface is the front surface are further provided.

[0039] As shown in FIG. 2, the solar cell includes a first dielectric layer 111 located on the first surface 11 and a first polysilicon doped layer 112 located on the first dielectric layer 111. The first polysilicon doped layer 112 is doped with an N-type doping element, and the surface of the first polysilicon doped layer 112 away from the first dielectric layer 111 has a first roughness.

[0040] In some embodiments, the material of the first dielectric layer 111 includes silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or silicon carbide.

[0041] In some embodiments, the first dielectric layer 111 may include a first tunnel dielectric layer. A passivation contact structure is formed between the first tunnel dielectric layer and the first polysilicon doped layer 112, and the first polysilicon doped layer 112 can form a band bend on the surface of the substrate 100. The first tunnel dielectric layer causes an asymmetric offset in the band on the surface of the substrate 100, and the potential barrier for majority carriers in the carriers is lower than the potential barrier for minority carriers in the carriers. Thereby, majority carriers can easily pass through the first tunnel dielectric layer and perform quantum tunneling, while minority carriers are difficult to pass through the first tunnel dielectric layer, so that selective transport of carriers can be realized.

[0042] In addition, the first tunnel dielectric layer exhibits the effect of chemical passivation. Specifically, since interface state defects exist at the interface between the substrate 100 and the first tunnel dielectric layer, the interface state density on the front surface of the substrate 100 increases. Due to the increase in the interface state density, the recombination of photo-generated carriers is promoted, increasing the back factor, short-circuit current, and open-circuit voltage of the solar cell, and enhancing the photoelectric conversion efficiency of the solar cell. By installing the first tunnel dielectric layer so that it is located on the first surface 11 of the substrate 100, the first tunnel dielectric layer exerts the effect of chemical passivation on the surface of the substrate 100. Specifically, by saturating the dangling bonds of the substrate 100, reducing the defect level density of the substrate 100, and reducing the recombination centers of the substrate 100, the recombination rate of carriers is reduced.

[0043] The first polysilicon doped layer 112 exhibits the effect of field passivation. Specifically, an electrostatic field directed from the surface of the substrate 100 into the substrate 100 is formed on the surface of the substrate 100. When minority carriers escape from the interface, the minority carrier concentration is reduced, the carrier recombination rate at the interface of the substrate 100 is decreased, the open-circuit voltage, short-circuit current, and back factor of the solar cell are increased, and the photoelectric conversion efficiency of the solar cell is enhanced.

[0044] The first polysilicon doped layer 112 may be doped with a doping element of the same type as the substrate 100. For example, the type of the doping element of the substrate 100 is N-type.

[0045] The concentration of the doping element in the first polysilicon doped layer 112 is greater than the concentration of the doping element in the substrate 100, thereby forming a sufficiently high potential barrier on the surface of the substrate 100 to enable the majority carriers in the substrate 100 to pass through the first tunnel dielectric layer and reach the first polysilicon doped layer 112.

[0046] In some embodiments, a doping element of a type different from that of the substrate 100 may be doped in the first polysilicon doped layer 112. For example, when the type of the doping element of the substrate 100 is P-type, the type of the doping element in the first polysilicon doped layer 112 may be N-type. Thereby, a PN junction is constructed between the first polysilicon doped layer 112 and the substrate. When sunlight irradiates the PN junction, new hole-electron pairs are formed. Due to the built-in electric field of the P-N junction, the photo-generated holes flow to the P region, and the photo-generated electrons flow to the N region. When the circuit is turned on, a current is generated.

[0047] In some embodiments, the thickness of the first tunnel dielectric layer is 0.5 nm to 5 nm. The thickness range of the first tunnel dielectric layer is 0.5 nm to 1.3 nm, 1.3 nm to 2.6 nm, 2.6 nm to 4.1 nm, or 4.1 nm to 5 nm. If the first tunnel dielectric layer is within any of the above ranges, the thickness of the first tunnel dielectric layer is thin, and majority carriers can easily perform quantum tunneling through the first tunnel dielectric layer, while minority carriers are difficult to pass through the first tunnel dielectric layer. Therefore, selective transport of carriers can be realized. In some embodiments, the thickness of the first polysilicon doped layer 112 is 10 nm to 300 nm. Optionally, the thickness of the first polysilicon doped layer 112 is 10 nm to 60 nm, 60 nm to 130 nm, 130 nm to 250 nm, or 250 nm to 300 nm.

[0048] As shown in FIG. 3, the first polysilicon doped layer 112 includes a plurality of first silicon crystal particles 1121, and the surfaces of the plurality of first silicon crystal particles 1121 constitute the surface of the first polysilicon doped layer 112 having a first roughness.

[0049] In the process of forming the first polysilicon doped layer 112, silicon atoms are arranged in a large number of crystal nuclei in the form of a diamond lattice. These crystal nuclei grow into crystal grains with different crystal plane orientations and combine these crystal grains to crystallize into polycrystalline silicon. Here, the first silicon crystal particles refer to crystal particles with different crystal plane orientations that make up polycrystalline silicon.

[0050] From the scanning electron microscope photograph in FIG. 3, the surface morphology of the first polysilicon doped layer 112 can be intuitively observed. The first polysilicon doped layer 112 is composed of a plurality of first silicon crystal particles 1121. The uneven surface of the first polysilicon doped layer 112 is constructed by the unevenness of the plurality of first silicon crystal particles 1121, and thus the surface of the first polysilicon doped layer 112 has a first roughness.

[0051] In some embodiments, the crystal grain size range of the first silicon crystal particles 1121 includes 10 nm to 300 nm. The crystal grain size of the first silicon crystal particles may be 10 nm to 53 nm, 53 nm to 95.3 nm, 95.3 nm to 138.2 nm, 138.2 nm to 200.6 nm, 200.6 nm to 248 nm, or 248 nm to 300 nm. The crystal grain size of the first silicon crystal particles 1121 is within any of the above ranges so that the roughness of the surface composed of the first silicon crystal particles 1121 increases. When the crystal grain size of the first silicon crystal particles 1121 is within any of the above ranges, the stability between the first silicon crystal particles 1121 is good, and the first polysilicon doped layer 112 is less likely to undergo crystalline deformation. Also, when the crystal grain size of the first silicon crystal particles 1121 is within the above range, the stress of the first polysilicon doped layer 112 on the first dielectric layer 111 and the first passivation layer becomes smaller, and the film layer performance between the first polysilicon doped layer 112 and the first dielectric layer 111 and between the first polysilicon doped layer 112 and the first passivation layer can be improved.

[0052] In some embodiments, the shape of the first silicon crystal particles 1121 includes particulate shapes. Compared with a massive structure, there are fewer grain boundaries between the particulate shapes and the space between the grain boundaries is larger. Therefore, the N-type doping elements in the first polysilicon doped layer 112 can move through the space between the grain boundaries and can finally be collected by the first electrode.

[0053] In some embodiments, the particulate shape includes spherical particulate shape or quasi-spherical particulate shape.

[0054] Note that the shape of the first silicon crystal particles including the shape of the second silicon crystal particles described below is observed by inspection means having a magnification such as an electron microscope or an optical microscope, and the electron microscope is a normal measurement means including a scanning electron microscope (SEM) or an AFM (Atomic Force Microscope). FIG. 3 is a micrograph of the first silicon crystal particles taken by a scanning electron microscope. As can be seen from FIG. 3, the first silicon crystal particles exhibit a particulate shape with equal length in three-dimensional directions. FIG. 4 is a micrograph of the second silicon crystal particles taken by a scanning electron microscope. As can be seen from FIG. 4, the second silicon crystal particles exhibit a sheet shape extending in two-dimensional directions.

[0055] As shown in FIG. 2, the solar cell includes a second dielectric layer 121 located on the second surface and a second polysilicon doped layer 122 located on the second dielectric layer 121. The second polysilicon doped layer 122 is doped with a P-type doping element. Here, the surface of the second polysilicon doped layer 122 away from the second dielectric layer 121 has a second roughness, and the second roughness is smaller than the first roughness.

[0056] In some embodiments, the material of the second dielectric layer 121 includes silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or silicon carbide.

[0057] In some embodiments, the second dielectric layer 121 may include a second tunnel dielectric layer, a passivation contact structure is formed between the second tunnel dielectric layer and the second polysilicon doped layer 122, the second polysilicon doped layer 122 can form a band bend on the surface of the substrate 100, the second tunnel dielectric layer causes an asymmetric offset in the band on the surface of the substrate 100, and the potential barrier for majority carriers in the carriers is lower than the potential barrier for minority carriers in the carriers. Therefore, majority carriers can easily perform quantum tunneling through the tunnel dielectric layer, while minority carriers are difficult to pass through the tunnel dielectric layer, so selective transport of carriers can be realized.

[0058] In addition, the second tunnel dielectric layer exhibits the effect of chemical passivation. Specifically, since there are interface state defects at the interface between the substrate 100 and the second tunnel dielectric layer, the interface state density on the back surface of the substrate 100 increases. The increase in the interface state density promotes the recombination of photo-generated carriers, increases the back factor, short-circuit current and open-circuit voltage of the solar cell, and improves the photoelectric conversion efficiency of the solar cell. By installing the second tunnel dielectric layer so as to be located on the second surface 12 of the substrate 100, the second tunnel dielectric layer exerts the effect of chemical passivation on the surface of the substrate 100. Specifically, the dangling bonds of the substrate 100 are saturated, the density of defect levels of the substrate 100 is reduced, and the recombination centers of the substrate 100 are reduced, thereby reducing the carrier recombination rate.

[0059] The second polysilicon doped layer 122 exhibits the effect of field passivation. Specifically, an electrostatic field directed from the surface of the substrate 100 into the substrate 100 is formed on the surface of the substrate 100, and by causing minority carriers to escape from the interface, the minority carrier concentration is reduced, the carrier recombination rate at the substrate 100 interface is decreased, the open-circuit voltage, short-circuit current and back factor of the solar cell are increased, and the photoelectric conversion efficiency of the solar cell is improved.

[0060] The second polysilicon doped layer 122 may be doped with the same type of doping element as the substrate 100. For example, the type of doping element of the substrate 100 is P-type.

[0061] The concentration of the doping element in the second polysilicon doped layer 122 is greater than the concentration of the doping element in the substrate 100, forming a sufficiently high potential barrier on the surface of the substrate 100, so that the majority carriers in the substrate 100 can pass through the second tunnel dielectric layer and reach the second polysilicon doped layer 122.

[0062] In some embodiments, the thickness of the second tunnel dielectric layer is 0.5 nm to 5 nm. The thickness range of the second tunnel dielectric layer is 0.5 nm to 1.3 nm, 1.3 nm to 2.6 nm, 2.6 nm to 4.1 nm, or 4.1 nm to 5 nm. If the second tunnel dielectric layer is within any of the above ranges, the thickness of the second tunnel dielectric layer is thin, and the majority carriers can easily pass through the second tunnel dielectric layer to perform quantum tunneling. However, since the minority carriers are difficult to pass through the second tunnel dielectric layer, selective transport of carriers can be realized.

[0063] In the case of the solar cell shown in FIG. 2, in some embodiments, the first polysilicon doped layer 112 and the substrate 100 are doped with doping elements of different conductivity types, forming a PN junction between the first polysilicon doped layer 112 and the substrate 100, and using the first polysilicon doped layer 112 as an emitter. In some embodiments, the second polysilicon doped layer 122 and the substrate are doped with doping elements of different conductivity types, forming a PN junction between the second polysilicon doped layer 122 and the substrate 100, and using the second polysilicon doped layer 122 as an emitter.

[0064] FIG. 5 is a diagram showing the structure of a solar cell provided in another embodiment of the present application, and FIG. 6 is a diagram showing the cross-sectional structure along the A1-A2 cross-section of FIG. 5.

[0065] In some embodiments, as shown in FIG. 6, the second dielectric layer 221 may include an intrinsic dielectric layer, form a heterojunction structure between the intrinsic dielectric layer and the substrate, and the intrinsic dielectric layer can have a good passivation effect on the substrate surface, greatly avoid carrier recombination, and achieve a high minority carrier lifetime and open-circuit voltage.

[0066] The materials of the intrinsic dielectric layer include intrinsic amorphous silicon, intrinsic microcrystalline silicon, intrinsic silicon oxide, intrinsic nanocrystalline silicon, or intrinsic silicon carbide. The selectable range of the thickness of the intrinsic dielectric layer is 2 μm to 10 μm, preferably 5 μm. In some cases, due to the influence of the diffusion or doping process conditions of other film layers to be manufactured later, this intrinsic dielectric layer may contain a small amount of doping elements, but the intrinsic dielectric layer with a small amount of doping elements is still regarded as an intrinsic type dielectric layer.

[0067] In some embodiments, the thickness range of the second polysilicon doped layer 222 is 20 nm to 500 nm, and further, the thickness range of the second polysilicon doped layer 222 is 200 nm to 400 nm. The thickness range of the second polysilicon doped layer 222 may be 20 nm to 103 nm, 103 nm to 139 nm, 139 nm to 161 nm, 161 nm to 218 nm, 218 nm to 298 nm, or 298 nm to 500 nm.

[0068] In some embodiments, as shown in FIG. 6, the solar cell further includes a transparent conductive layer 202 located on the surface of the second polysilicon doped layer 222, and the second electrode is in electrical contact with the transparent conductive layer 202.

[0069] In some embodiments, the material of the transparent conductive layer 202 may include at least one of indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), cerium-doped indium oxide, and tungsten-doped indium oxide.

[0070] In the case of the solar cell shown in FIG. 6, in some embodiments, the first polysilicon doped layer 212 and the substrate 200 are doped with doping elements of different conductivity types, a PN junction is formed between the first polysilicon doped layer 212 and the substrate 200, and the first polysilicon doped layer 212 serves as an emitter. In some embodiments, the second polysilicon doped layer 222 and the substrate 200 are doped with doping elements of different conductivity types, a PN junction is formed between the second polysilicon doped layer 222 and the substrate 200, and the second polysilicon doped layer 222 serves as an emitter. Here, a PN junction is formed between the second polysilicon doped layer 222 and the substrate 200. An intrinsic dielectric layer is inserted as a buffer layer between the PN junctions. The intrinsic dielectric layer has a good passivation effect on the surface of the substrate 200, can significantly avoid carrier recombination, and can achieve a high minority carrier lifetime and open-circuit voltage.

[0071] As shown in FIGS. 2 and 4, the second polysilicon doped layer 122 includes a plurality of second silicon crystal particles 1221, the surfaces of the plurality of second silicon crystal particles 1221 constitute the surface of the second polysilicon doped layer 122 having a second roughness, and the crystal grain size of the first silicon crystal particles 1121 is smaller than the crystal grain size of the second silicon crystal particles 1221.

[0072] In some embodiments, the "roughness" in "the first roughness and the second roughness" refers to setting an average horizontal line for a sampled length and taking the arithmetic mean value of the absolute value of the vertical deviation amount of the peaks and valleys within the sampled length with respect to the average horizontal line. The roughness can be measured by a comparison method, an optical cutting method, an interference method, and a probe scanning method.

[0073] In some embodiments, the crystal grain size of the second silicon crystal particles 1221 ranges from 100 nm to 900 nm. The crystal grain size of the second silicon crystal particles 1221 may be 100 nm to 250 nm, 250 nm to 360 nm, 360 nm to 490 nm, 490 nm to 584 nm, 584 nm to 610 nm, 610 nm to 790 nm, or 790 nm to 900 nm. When the crystal grain size of the second silicon crystal particles 1221 is within any of the above ranges, the grain boundaries between the second silicon crystal particles 1221 are small, and carriers can easily pass through the second polysilicon doped layer 122, thereby increasing the carrier migration speed and contributing to the improvement of the battery efficiency.

[0074] In some embodiments, the shape of the second silicon crystal particles 1221 includes sheet-like, plate-like, or particle-like. The micro-morphology of the second silicon crystal particles shown in FIG. 4 is sheet-like.

[0075] FIG. 3 and FIG. 4 show the surface morphologies of the first polysilicon doped layer 112 and the second polysilicon doped layer 122 at the same magnification. As can be seen from FIGS. 3 and 4, the surface of the first polysilicon doped layer 112 is rougher than the surface of the second polysilicon doped layer 122, that is, the first roughness is greater than the second roughness. Thus, based on the morphological difference between the first polysilicon doped layer 112 and the second polysilicon doped layer 122, for the first polysilicon doped layer 112 with a higher roughness, the surface of the first polysilicon doped layer 112 can enhance the internal reflection of incident light and reduce the optical loss of the solar cell. In addition, the first polysilicon doped layer 112 can increase the contact area between the first electrode and the first polysilicon doped layer 112, and thus improve the contact performance and solder tensile strength of the first polysilicon doped layer 112. For the second polysilicon doped layer 122 with a lower roughness, the surface of the second polysilicon doped layer 122 is smooth, the uniformity of the second passivation layer deposited thereon is good, and the passivation performance of the second passivation layer is good, which can improve the problem of recombination defects in the solar cell.

[0076] In some embodiments, the crystal grain size of the first silicon crystal particles 1121 being smaller than that of the second silicon crystal particles 1221 includes that the one-dimensional dimension in the radial direction of the first silicon crystal particles 1121 is smaller than the one-dimensional dimension in the radial direction of the second silicon crystal particles 1221, and the height of the first silicon crystal particles 1121 is greater than the height of the second silicon crystal particles 1221. Thereby, the roughness of the first polysilicon doped layer 112 composed of the first silicon crystal particles 1121 is greater than the roughness of the second polysilicon doped layer 122 composed of the second silicon crystal particles 1221.

[0077] Here, the one-dimensional dimension in the radial direction of the first silicon crystal particles 1121 refers to the average line length (or diameter) of the first silicon crystal particles 1121. The height of the first silicon crystal particles 1121 refers to the distance between the side of the first silicon crystal particles 1121 close to the first dielectric layer 111 and the side of the first silicon crystal particles 1121 away from the first dielectric layer 111.

[0078] Similarly, the one-dimensional dimension in the radial direction of the second silicon crystal particles 1221 refers to the average line length (or diameter) of the second silicon crystal particles 1221. The height of the second silicon crystal particles 1221 refers to the distance between the side of the second silicon crystal particles 1221 close to the second dielectric layer 121 and the side of the second silicon crystal particles 1221 away from the second dielectric layer 121.

[0079] In some embodiments, the shape of the first silicon crystal particles 1121 is three-dimensionally equilateral particle shape, the height of the first silicon crystal particles 1121 is equal to the average line length of the first silicon crystal particles 1121, the shape of the second silicon crystal particles 1221 is a two-dimensionally extended sheet shape, and the height of the second silicon crystal particles 1221 is smaller than the average line length of the second silicon crystal particles 1221. The height of the second silicon crystal particles 1221 is the line length in the non-extending plane direction.

[0080] Here, the size of the crystal grains is referred to as the crystal grain size. Commonly used representation methods include the number of crystal grains per unit volume (ZV), the number of crystal grains per unit area (ZS), or the average line length or diameter of the crystal grains. The average line length of the crystal grains refers to the line length of the plane of extension in the extension direction of the crystal grains. The crystal grain size in the embodiments of the present application may be the average line length of the crystal grains.

[0081] In some embodiments, the average thickness of the first polysilicon doped layer 112 is less than or equal to the average thickness of the second polysilicon doped layer 122. Thereby, the average thickness of the first polysilicon doped layer 112 located on the front surface is small, and the parasitic absorption of the first polysilicon doped layer 112 with respect to the incident light irradiated on the front surface can be reduced. The average thickness of the second polysilicon doped layer 122 located on the back surface is large, and the risk that the second electrode melts the second polysilicon doped layer 122 and diffuses the P-type doping element into the substrate due to the second polysilicon doped layer 122 being too thin is reduced. The problem that the P-type doping element of the second polysilicon doped layer 122 accumulates at the substrate interface to form a "dead layer" is avoided, the carrier transport efficiency is increased, and the generation of carrier recombination centers is reduced.

[0082] As shown in FIG. 2, the solar cell includes a first passivation layer 113 covering the surface of the first polysilicon doped layer 112 away from the first dielectric layer 111, a second passivation layer 123 covering the surface of the second polysilicon doped layer 122 away from the second dielectric layer 121, a first electrode 114 located in the first passivation layer 113 and electrically connected to the first polysilicon doped layer 112 through the first passivation layer 113, and a second electrode 124 located in the second passivation layer 123 and electrically connected to the second polysilicon doped layer 122 through the second passivation layer 123.

[0083] In some embodiments, the first passivation layer 113 may have a single-layer structure or a stacked structure, and the material of the first passivation layer 113 may be one or more of materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbon oxynitride, titanium oxide, hafnium oxide, and aluminum oxide.

[0084] In some embodiments, the second passivation layer 123 may have a single-layer structure or a stacked structure, and the material of the second passivation layer 123 may be one or more of materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbon oxynitride, titanium oxide, hafnium oxide, or aluminum oxide.

[0085] In some embodiments, the materials of the first passivation layer 113 and the second passivation layer 123 are the same, and the first passivation layer 113 and the second passivation layer 123 can be manufactured in the same process steps.

[0086] In some embodiments, the pitch range in the first direction X between the first electrodes 114 is 0.5 mm to 2 mm. The pitch range in the first direction X between the first electrodes 114 is 0.5 mm to 0.8 mm, 0.8 mm to 1.15 mm, 1.15 mm to 1.28 mm, 1.28 mm to 1.46 mm, 1.46 mm to 1.68 mm, 1.68 mm to 1.84 mm, or 1.84 mm to 2 mm.

[0087] In some embodiments, the width range of the first electrode 114 in the first direction X is 5 μm to 50 μm. The width range of the first electrode 114 in the first direction X is 5 μm to 9 μm, 9 μm to 14 μm, 14 μm to 23 μm, 23 μm to 34 μm, 34 μm to 42 μm, 42 μm to 45 μm, 45 μm to 48 μm, or 48 μm to 50 μm.

[0088] In some embodiments, the first electrode 114 can be formed by sintering a sputtered paste. The method of forming the first electrode 114 includes printing a metal paste on the surface of some of the first passivation layers 113 using a screen printing process. The metal paste can include at least one of silver, aluminum, copper, tin, gold, lead, or nickel. Then, a sintering process is performed on the metal paste, and the metal paste contains highly corrosive components such as glass powder. As a result, during sintering, the corrosive components corrode the first passivation layer 113, and the metal paste penetrates the first passivation layer 113 to come into electrical contact with the first polysilicon doped layer 112.

[0089] In some embodiments, the orthographic projection of the second surface of the second electrode 124 and the orthographic projection of the second surface of the first electrode 114 overlap, and the pitch in the first direction X between the second electrodes is 0.5 mm to 2 mm. The range of the width of the second electrode 124 in the first direction X is 5 μm to 50 μm.

[0090] In some embodiments, the second electrode 124 can be formed by sintering a sputtered paste. The method of forming the second electrode 124 includes printing a metal paste on the surface of some of the second passivation layers 123 using a screen printing process. The metal paste can include at least one of silver, aluminum, copper, tin, gold, lead, or nickel. Then, a sintering process is performed on the metal paste, and the metal paste contains highly corrosive components such as glass powder. As a result, during sintering, the corrosive components corrode the first passivation layer 123, and the metal paste penetrates the first passivation layer 123 to come into electrical contact with the first polysilicon doped layer 122.

[0091] As shown in FIG. 6, the method of forming the second electrode 224 includes printing a metal paste on the surface of a part of the second passivation layer 223 using a screen printing process. The metal paste can include at least one of silver, aluminum, copper, tin, gold, lead, or nickel. Then, a sintering process is performed on the metal paste, and the metal paste contains highly corrosive components such as glass powder. Thereby, during sintering, the corrosive component corrodes the first passivation layer 223, and the metal paste penetrates into the first passivation layer 223 to be in electrical contact with the transparent conductive layer 202.

[0092] In some embodiments, the materials of the first electrode 114 and the second electrode 124 are the same, and the first electrode 114 and the second electrode 124 can be manufactured in the same process steps.

[0093] In some embodiments, as shown in FIG. 2, the first surface 11 of the substrate 100 includes an original texture structure 13. The first surface 11 is a surface with a concavo-convex structure, which can increase the internal reflection of incident light and improve the utilization rate of the light of the solar cell, thereby enhancing the photoelectric conversion efficiency of the cell.

[0094] In some embodiments, the original texture structure 13 includes a plurality of protrusion structures 101, and the shape of the protrusion structure may include a pyramid shape, a parabolic shape, or an ellipsoidal shape.

[0095] In some embodiments, as shown in FIG. 2, the first surface is the front surface, and the substrate is doped with an N-type doping element. The N-type battery has advantages such as a higher conversion rate, a lower temperature coefficient, a higher bifaciality, and a higher carrier lifetime compared to the P-type battery. The first polysilicon doping layer 112 is located on the front surface of the solar cell, and the second polysilicon doping layer 122 is located on the back surface of the solar cell. The doping type of the second polysilicon doping layer 122 and the substrate is different, and a PN junction is formed between the substrate and the second polysilicon doping layer 122. By replacing the normal front contact battery with a back contact battery, the recombination efficiency at the front surface of the incident light can be reduced, and the recombination defects of the substrate can be reduced. Since the first roughness of the first polysilicon doping layer 112 is large, the degree of unevenness on the front surface is large, and the incident light can be greatly reflected, which can increase the internal reflectivity of the solar cell and improve the photoelectric conversion efficiency of the solar cell. Since the second roughness of the second polysilicon doping layer 122 is small, the performance of the film layer of the second passivation layer deposited thereon can be improved, the passivation performance of the second passivation layer can be enhanced, and the efficiency of the battery can be improved.

[0096] Regarding the substrate 200, the first passivation layer 213, the first dielectric layer 211, the first polysilicon doping layer 212, the original texture structure 23, the protrusion structure 201, the first electrode 214, the first surface 21, and the second surface 22 in FIG. 6 above, reference can be made to the description of the substrate 100, the first passivation layer 113, the first dielectric layer 111, the first polysilicon doping layer 112, the original texture structure 13, the protrusion structure 101, the first electrode 114, the first surface 11, and the second surface 12 in FIG. 2. Here, the description is omitted.

[0097] In the solar cell provided by the embodiment of the present application, the solar cell includes a first polysilicon doped layer 112 and a second polysilicon doped layer 122. The first polysilicon doped layer 112 is located on the first surface, and the second polysilicon doped layer 122 is located on the second surface. Through the design of the full passivation contact cell structure, the cell recombination current is reduced to the maximum extent, and the open voltage of the cell is increased. Further, in the process of manufacturing the full passivation contact cell, there is no design of a high-temperature diffusion layer. The first polysilicon doped layer 112 and the second polysilicon doped layer 122 are used as carrier transport layers to remove the influence of the recombination current of the diffusion layer and improve the open voltage of the cell. The first polysilicon doped layer 112 is doped with an N-type doping element, the surface of the first polysilicon doped layer 112 has a first roughness, the second polysilicon doped layer 122 is doped with a P-type doping element, the surface of the second polysilicon doped layer 122 has a second roughness, and the second roughness is smaller than the first roughness. Thereby, based on the morphological difference between the first polysilicon doped layer 112 and the second polysilicon doped layer 122, for the first polysilicon doped layer 112 with a higher roughness, the surface of the first polysilicon doped layer 112 can enhance the internal reflection of incident light and reduce the optical loss of the solar cell. The first polysilicon doped layer 112 can further increase the contact area between the first electrode and the first polysilicon doped layer 112, and improve the contact performance and solder tensile strength of the first polysilicon doped layer 112. For the second polysilicon doped layer 122 with a lower roughness, the surface of the second polysilicon doped layer 122 is smooth, the uniformity of the second passivation layer deposited thereon is good, and the passivation performance of the second passivation layer is good, which can improve the problem of recombination defects of the solar cell.

[0098] FIG. 7 is a diagram showing the structure of a solar cell provided by another embodiment of the present application. FIG. 8 is a diagram showing the cross-sectional structure along the A1-A2 cross-section of FIG. 7. FIG. 9 is a partial enlarged view of C in FIG. 8. FIG. 10 is a first type of scanning electron micrograph of the boundary between the electrode region and the non-electrode region in FIG. 8. FIG. 11 is a second type of scanning electron micrograph of the boundary between the electrode region and the non-electrode region in FIG. 8.

[0099] In addition, some other embodiments of the present application further provide a solar cell. The difference from the above-described embodiments is that the solar cell provided in some other embodiments of the present application includes an electrode region and a non-electrode region, and the first surface facing the electrode region has a first texture structure, and the first surface facing the non-electrode region has a second texture structure. Regarding the same parts as the above-described embodiments, the description is omitted here.

[0100] As shown in FIG. 8, the solar cell includes a substrate 300, a first dielectric layer 311 located on the first surface 31 and a first polysilicon doped layer 312 located on the first dielectric layer 311, a second dielectric layer 321 located on the second surface 32 and a second polysilicon doped layer 322 located on the second dielectric layer 321, a first passivation layer 313 located on the first polysilicon doped layer 312 and a second passivation layer 323 located on the second polysilicon doped layer 322, and a first electrode 314 and a second electrode 324. The substrate 300 has opposed first and second surfaces 31 and 32. The first polysilicon doped layer 312 is doped with an N-type doping element, and the surface of the first polysilicon doped layer 312 away from the first dielectric layer 311 has a first roughness. The second polysilicon doped layer 322 is doped with a P-type doping element. Here, the surface of the second polysilicon doped layer 322 away from the second dielectric layer 321 has a second roughness, and the second roughness is smaller than the first roughness. The first electrode 314 is located on the first passivation layer 313, and the first electrode 314 penetrates the first passivation layer 313 and is in electrical contact with the first polysilicon doped layer 312. The second electrode 324 is located on the second passivation layer 323, and the second electrode 324 penetrates the second passivation layer 323 and is in electrical contact with the second polysilicon doped layer 322.

[0101] As shown in FIG. 8 or FIG. 10, the solar cell includes alternately arranged electrode regions 2 and non-electrode regions 1. The first dielectric layer 311 and the first polysilicon doped layer 312 are located in the electrode regions, and the first passivation layer 313 is located in the electrode regions 2 and the non-electrode regions 1.

[0102] In some embodiments, the electrode region 2 refers to the region within the substrate 300 that faces the first electrode 314 or the second electrode 324 in the thickness direction of the substrate 300, or the region where the orthographic projection of the first electrode 314 on the substrate 300 is located or the region where the orthographic projection of the second electrode 324 on the substrate 300 is located. Conversely, the region within the substrate 300 where the first electrode 314 and the second electrode 324 do not face each other is the non - electrode region 1. The area of the electrode region 2 is not less than the area of the orthographic projection of the first electrode 314 or the second electrode 324 on the substrate 300, thereby ensuring that all regions where the first electrode 314 or the second electrode 324 contacts are the electrode region 2.

[0103] In some embodiments, the width of the electrode region is 1 to 5 times the width of the first electrode. If the width of the electrode region is too large, it will affect the integrity and uniformity of the film in the non - electrode region 1, reduce the internal reflection of light, and be disadvantageous to improving the carrier surface recombination rate and the photovoltaic conversion efficiency of the solar cell. Here, the vertical bisector of the electrode region may overlap with the central axis of the first electrode or deviate by ±5% to the left or right.

[0104] In some embodiments, the first surface 31 facing the electrode region 2 has the first texture structure 35, the first dielectric layer 311 covers the first texture structure 35, the first surface 31 facing the non - electrode region 1 has the second texture structure 34, and the first passivation layer 313 further covers the second texture structure 34.

[0105] In some embodiments, the minimum distance between the first texture structure 35 and the second surface 32 is the first distance, the minimum distance between the second texture structure 34 and the second surface 32 is the second distance, and the first distance is greater than the second distance.

[0106] Here, the minimum distance between the first texture structure and the second surface refers to the distance between the part of the first texture structure closest to the second surface 32 and the second surface. The minimum distance between the second texture structure and the second surface refers to the distance between the part of the second texture structure closest to the second surface 32 and the second surface.

[0107] In some embodiments, the range of the difference between the first distance and the second distance includes 0.5 to 10 μm. The difference between the first distance and the second distance may be 0.5 μm to 2 μm, 2 μm to 3.8 μm, 3.8 μm to 6.9 μm, 6.9 μm to 7.6 μm, 7.6 μm to 8.3 μm, or 8.3 μm to 10 μm.

[0108] In some embodiments, the first texture structure 35 includes a plurality of first protrusion structures 304 arranged at intervals, and in actual applications, the arrangement method of the plurality of first protrusion structures 304 is not limited. Since the thicknesses of the first dielectric layer 311 and the first polysilicon doped layer 312 are thin, the first dielectric layer 311 and the first polysilicon doped layer 312 can represent the form of the first protrusion structure.

[0109] In some embodiments, as shown in FIG. 8, the second texture structure 34 includes a plurality of second protrusion structures 303. In actual applications, the arrangement method of the plurality of second protrusion structures 303 is not limited.

[0110] In some embodiments, at least one of the first texture structure 35 or the second texture structure 34 includes a platform protrusion structure or a pyramid texture structure.

[0111] In some embodiments, the solar cell includes electrode regions and non-electrode regions arranged alternately, the second dielectric layer and the second polysilicon doped layer are located in the electrode regions, the second passivation layer is located in the electrode regions and the non-electrode regions, the second surface facing the electrode region has the first texture structure, the second dielectric layer covers the first texture structure, the second surface facing the non-electrode region has the second texture structure, and the second passivation layer covers the second texture structure.

[0112] In some embodiments, the minimum distance between the first texture structure and the first surface is the first distance, the minimum distance between the second texture structure and the first surface is the second distance, and the first distance is greater than the second distance.

[0113] In some embodiments, as shown in FIGS. 9 and 10, the surface of the substrate 300 further includes a third texture structure 36, and the third texture structure 36 is interposed at the boundary between the non-electrode region 1 and the electrode region 2. Some of the third texture structures 36 include a first side surface 315 and a second side surface 325. The first side surface 315 faces the electrode region 2, and the first dielectric layer 311 covers the first side surface 315. The second side surface 325 faces the non-electrode region 1, and the radial length of the first side surface 315 is smaller than the radial length of the second side surface 325.

[0114] As shown in FIG. 11, the third texture structure 36 includes a plurality of third protrusion structures 305 arranged in a staggered manner. In addition to the discrete third protrusion structures 305, the third texture structure 36 further includes a fine protrusion structure 345. As a result, the probability that incident light incident on the boundary between the electrode region and the non-electrode region at different angles is absorbed by the substrate 300 through at least one reflection via the third protrusion structure 305 and / or the fine protrusion structure 345 is increased, and the probability that the incident light is reflected to the non-electrode region 1 through at least one reflection via the third protrusion structure 305 and / or the fine protrusion structure 345 and absorbed by the non-electrode region 1 is increased, which contributes to increasing the absorption rate of the incident light on the first surface 31. By improving the serious carrier recombination problem in the electrode region 2 and improving the absorption rate of the incident light on the first surface 31, the photoelectric conversion efficiency of the solar cell can be increased.

[0115] In some embodiments, the third texture structure 36 includes a prismatic structure, a pyramid structure, or a tetrahedral structure.

[0116] Hereinafter, the embodiments of the present application will be described in more detail with reference to the drawings.

[0117] In some embodiments, as shown in FIG. 11, the fine protrusion structure 345 includes at least one of a prismatic structure inclined toward the electrode region 2, a second pyramid structure, or a triangular plate-like structure.

[0118] In FIG. 11, an example is shown in which the fine protrusion structure 345 includes three types: a prism structure, a second pyramid structure, or a triangular plate-like structure that inclines toward the electrode region 2. However, in actual applications, for the third texture structure 36 in the same region, the fine protrusion structure 345 may include only one or two of a second pyramid structure, a triangular plate-like structure, or a prism structure that inclines toward the electrode region 2. In addition to being any one of a prism structure, a second pyramid structure, or a triangular plate-like structure that inclines toward the electrode region 2, the fine protrusion structure 345 may also be an irregular particle-like structure.

[0119] As shown in FIG. 11, the one-dimensional dimension of the bottom of the fine protrusion structure 345 includes any one of the length, width, or diagonal length of the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300. In FIG. 10, an example is given where the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 is a regular quadrilateral. In this case, the one-dimensional dimension of the bottom of the fine protrusion structure 345 is any one of the length, width, or diagonal length of the regular quadrilateral.

[0120] In actual applications, the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 may be an irregular polygon. In this case, the length, width, or diagonal length of the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 is not an absolute value, but a one-dimensional dimension artificially defined to represent the bottom of the fine protrusion structure 345. For example, when the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 is an irregular quadrilateral, the length of the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 is defined as the length of the longest side of the irregular quadrilateral, the width of the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 is defined as the length of the shortest side of the irregular quadrilateral, and the diagonal length of the orthographic projection pattern of the bottom of the fine protrusion structure 345 on the substrate 300 can be defined as the length of the longest diagonal of the irregular quadrilateral. However, as can be understood, the above is only exemplary and can be flexibly defined according to actual needs.

[0121] In addition, the orthographic projection pattern of the substrate 300 at the bottom of the fine protrusion structure 345 may be an irregular quadrilateral, or other irregular polygons, a circle, or an irregular shape close to a circle. In this case, the one-dimensional dimension of the bottom of the fine protrusion structure 345 is obtained by selecting a plurality of regions with different specific areas at the bottom of the fine protrusion structure 345. This region of specific area can be flexibly defined according to actual needs, and the average value of the length, width, diagonal, or diameter of the regions of different specific areas can be obtained.

[0122] As shown in FIG. 11, the orthographic projection pattern of the substrate 300 at the bottom of the third protrusion structure 305 is generally a regular quadrilateral. In this case, the one-dimensional dimension of the bottom of the third protrusion structure 305 is any one of the length, width, or diagonal length of the regular quadrilateral. In actual applications, the orthographic projection pattern of the substrate 300 at the bottom of the third protrusion structure 305 may be an irregular quadrilateral. In this case, since it is similar to the definition of the one-dimensional dimension when the orthographic projection pattern of the substrate 300 at the bottom of the fine protrusion structure 345 is an irregular quadrilateral, the description is omitted here.

[0123] In addition, the one-dimensional dimensions of the bottoms of different third protrusion structures 305 may be different or the same, but the one-dimensional dimension of the bottom of the third protrusion structure 305 is within a certain numerical range. The one-dimensional dimensions of the bottoms of different fine protrusion structures 345 may be different or the same, but the one-dimensional dimension of the bottom of the third protrusion structure 305 is also within a certain numerical range. The fact that the one-dimensional dimension of the bottom of the fine protrusion structure 345 is smaller than the one-dimensional dimension of the bottom of the third protrusion structure 305 means that the average value of the one-dimensional dimensions of the bottoms of the plurality of fine protrusion structures 345 is smaller than the average value of the one-dimensional dimensions of the bottoms of the plurality of third protrusion structures 305.

[0124] Hereinafter, the specific characteristics of the prism structure will be described in detail.

[0125] In some embodiments, as shown in FIG. 11, the prism structure is located on the side surface of the third protrusion structure 305. In the arrangement method of the prism structure on the side surface of the third protrusion structure 305, there are two situations: one is that one prism structure is located on the side surface of one third protrusion structure 305; the other is that a plurality of prism structures are attached to the same side surface of one third protrusion structure 305, and each prism structure is in contact with and connected to the side surface.

[0126] In some other embodiments, as shown in FIG. 11, some of the prism structures are located in some regions near the electrode region 2 at the boundary. For example, the prism structure is located between the third protrusion structure 305 and the electrode region 2.

[0127] In some other embodiments, a plurality of prism structures are sequentially arranged along the direction away from the side surface of the third protrusion structure 305. For example, among the plurality of prism structures, only the prism structure closest to the side surface of the third protrusion structure 305 is in contact with and connected to the side surface of the third protrusion structure 305.

[0128] It should be noted that the plurality of prism structures located at the same boundary are at least one of the prism structures in the above three embodiments. That is, the plurality of prism structures located at the same boundary may respectively have the characteristics of the prism structures in the above three embodiments, or may have the characteristics of the prism structures in any two of the above embodiments, or may have the characteristics of the prism structures in any one of the above embodiments.

[0129] Hereinafter, the specific characteristics of the second pyramid structure will be described in detail.

[0130] In some embodiments, the bottom of the second pyramid structure is in contact with and connected to the bottom of the third protrusion structure 305. In some cases, a plurality of second pyramid structures can be surrounded around the bottom of the same third protrusion structure 305, and the bottom of each second pyramid structure is in contact with and connected to the bottom of the third protrusion structure 305.

[0131] In some other embodiments, at least one second pyramid structure is located at the interval between two adjacent third protrusion structures 305. In other words, the bottom of the second pyramid structure is not in contact with and connected to the bottom of the third protrusion structure 305.

[0132] It should be noted that the second pyramid structures located at the same boundary are at least one of the second pyramid structures in the above two embodiments. That is, a plurality of second pyramid structures located at the same boundary may each have the characteristics of the second pyramid structures in the above two embodiments, or may have the characteristics of the second pyramid structure in any one of the above embodiments.

[0133] Hereinafter, the specific characteristics of the triangular plate-like structure will be described in detail.

[0134] In some cases, one triangular plate-like structure is located on the side surface of one third protrusion structure 305. In some cases, a plurality of triangular plate-like structures are attached to the same side surface of one third protrusion structure 305, and each triangular plate-like structure is in contact with and connected to the side surface.

[0135] In some other embodiments, a plurality of triangular plate-like structures are sequentially arranged along the direction away from the side surface of the third protrusion structure 305. For example, among the plurality of triangular plate-like structures, only the triangular plate-like structure closest to the side surface of the third protrusion structure 305 is in contact with and connected to the side surface of the third protrusion structure 305.

[0136] It should be noted that the triangular plate-like structures located at the same boundary are at least one of the triangular plate-like structures in the above two embodiments. That is, a plurality of triangular plate-like structures located at the same boundary may each have the characteristics of the triangular plate-like structures in the above two embodiments, or may have the characteristics of the triangular plate-like structure in any one of the above embodiments.

[0137] In some embodiments, the third protrusion structure 305 is located in a partial region near the non-electrode region 1 at the boundary. In other words, in a partial region near the non-electrode region 1 at the boundary, there is a more typical third protrusion structure 305.

[0138] As described above for the third texture structure 36 at the boundary through each of the above-described embodiments, the structure of the third texture structure 36 has diversity. In some cases, at the same boundary, in addition to the third protrusion structure 305, there are further a plurality of fine protrusion structures 345. For example, one of the two adjacent boundaries has a prism structure and a second pyramid structure inclined toward the electrode region 2, and the other has a second pyramid structure and a triangular plate-like structure. The specific features of the plurality of fine protrusion structures 345 at different boundaries may be different.

[0139] As shown in FIG. 10, the third texture structure further includes a first prism structure 335. Along the inclination direction of the first prism structure 335, the first length of the third protrusion structure 305 is longer than the second length of the first prism structure 335, and at least a part of the first prism structure 335 is located on the side surface of the third protrusion structure 305 away from the electrode region 2. This contributes to further increasing the probability that the incident light incident on the boundary is absorbed by the boundary or the non-electrode region 1.

[0140] In the example shown in FIG. 10, the first length of the third protrusion structure 305 is defined as the inclined length of the shortest third protrusion structure 305 among the plurality of third protrusion structures 305, and the second length of the first prism structure 335 is defined as the inclined length of the longest first prism structure 335 among the plurality of first prism structures 335. Based on this, the fact that the first length of the third protrusion structure 305 is greater than the second length of the first prism structure 335 means that the inclined length of the shortest third protrusion structure 305 among the plurality of third protrusion structures 305 is greater than the inclined length of the longest first prism structure 335 among the plurality of first prism structures 335.

[0141] In actual applications, the first length of the third protrusion structure 305 may be defined as the average value of the inclined lengths of the plurality of third protrusion structures 305, and the second length of the first prism structure 335 may be defined as the average value of the inclined lengths of the plurality of first prism structures 335. Based on this, the fact that the first length of the third protrusion structure 305 is greater than the second length of the first prism structure 335 means that the average value of the inclined lengths of the plurality of third protrusion structures 305 is greater than the average value of the inclined lengths of the plurality of first prism structures 335.

[0142] In some embodiments, as shown in FIG. 10, for the arrangement of the second prism structures 335 on the side surface of the third protrusion structure 305 away from the electrode region 2, there are two situations: one is that one second prism structure 335 is located on the side surface of one third protrusion structure 305 away from the electrode region 2, and the other is that a plurality of first prism structures 335 are located on the side surface of the same second prism structure 335 away from the electrode region 2, and each first prism structure 335 is in contact with and connected to the side surface.

[0143] In some other embodiments, as shown in FIG. 10, a plurality of first prism structures 335 are sequentially arranged along the direction away from the side surface of the third protrusion structure 305. For example, among the plurality of first prism structures 335, only the first prism structure 335 closest to the side surface of the third protrusion structure 305 is in contact with and connected to the side surface of the third protrusion structure 305.

[0144] In some embodiments, as shown in FIG. 10, the third texture structure 36 may further include a first pyramid structure, and at least a part of the first pyramid structure is located in a part of the boundary region.

[0145] Here, the one-dimensional dimension of the bottom of the third protrusion structure is larger than the one-dimensional dimension of the bottom of the first protrusion structure, and the one-dimensional dimension of the bottom of the first protrusion structure is larger than the one-dimensional dimension of the bottom of the second protrusion structure.

[0146] Note that since the one-dimensional dimension of the bottom of the first protrusion structure and the one-dimensional dimension of the bottom of the second protrusion structure are both similar to the definition of the one-dimensional dimension of the bottom of the third protrusion structure in an embodiment of the present application, the description thereof is omitted here.

[0147] Also, the one-dimensional dimensions of the bottoms of different first protrusion structures may be different or the same, but the one-dimensional dimensions of the bottoms of the first protrusion structures are within a single numerical range. The one-dimensional dimensions of the bottoms of different second protrusion structures may be different or the same, but the one-dimensional dimensions of the bottoms of the second protrusion structures are also within a single numerical range. Based on this, the fact that the one-dimensional dimension of the bottom of the third protrusion structure is larger than the one-dimensional dimension of the bottom of the first protrusion structure means that the average value of the one-dimensional dimensions of the bottoms of a plurality of third protrusion structures is larger than the average value of the one-dimensional dimensions of the bottoms of the first protrusion structures. The fact that the one-dimensional dimension of the bottom of the first protrusion structure is larger than the one-dimensional dimension of the bottom of the second protrusion structure means that the average value of the one-dimensional dimensions of the bottoms of a plurality of first protrusion structures having the first polysilicon doped layer on the surface is larger than the average value of the one-dimensional dimensions of the bottoms of a plurality of second protrusion structures located in the non-electrode region 1.

[0148] Also, in an embodiment of the present application, the magnitude relationship between the one-dimensional dimension of the bottom of the second protrusion structure and the one-dimensional dimension of the bottom of the first protrusion structure is not limited, and the magnitude relationship between the one-dimensional dimension of the bottom of the second protrusion structure and the one-dimensional dimension of the bottom of the second protrusion structure is also not limited.

[0149] FIG. 12 is a diagram showing the structure of a photovoltaic module provided in another embodiment of the present application, and FIG. 13 is a diagram showing the cross-sectional structure along the M1-M2 cross-section of FIG. 12.

[0150] Correspondingly, according to some embodiments of the present application, some other embodiments of the present application provide a photovoltaic module that can include the solar cells of the above-described embodiments. For the same parts as the above-described embodiments, the description thereof is omitted here.

[0151] As shown in FIG. 12, the photovoltaic module includes a cell string in which a plurality of solar cells 40 in any of the above-described embodiments are connected by a connection member 406, a sealing layer 47 for covering the surface of the cell string, and a cover plate 48 for covering the surface of the sealing layer 47 away from the cell string.

[0152] Specifically, in some embodiments, a plurality of battery cells are electrically connected by a connection member 406, and the connection member 406 and the main grid 405 in the battery cell can be welded. FIG. 12 shows only the positional relationship between one solar cell, that is, the arrangement direction of the electrodes with the same polarity of the battery cells is the same so that the connection member connects different sides of two adjacent battery cells, or the electrodes with the positive polarity of each battery cell are all arranged toward the same side. In some embodiments, the battery cells may have electrodes of different polarities facing the same side, that is, when the electrodes of a plurality of adjacent battery cells are arranged in the order of the first polarity, the second polarity, and the first polarity, the connection member connects two adjacent battery cells on the same side.

[0153] In some embodiments, no gap is provided between the battery cells, that is, the battery cells overlap each other.

[0154] In some embodiments, the connection member and the sub-grid in the battery cell are welded, and the sub-grid includes a first electrode 414 and a second electrode 424.

[0155] In some embodiments, the sealing layer includes a first sealing layer and a second sealing layer, the first sealing layer covers one of the front or back surfaces of the solar cell, and the second sealing layer covers the other of the front or back surfaces of the solar cell. Specifically, at least one of the first sealing layer or the second sealing layer may be an organic sealing film such as a polyvinyl butyral (PVB) adhesive film, an ethylene vinyl acetate copolymer (EVA) adhesive film, a polyethylene-octene copolymer (POE) adhesive film, or a polyethylene terephthalate (PET) adhesive film.

[0156] Before the lamination process, there is a boundary line between the first sealing layer and the second sealing layer. After the lamination process, when the photovoltaic module is formed, the concepts of the first sealing layer and the second sealing layer no longer exist. That is, a sealing layer 47 is formed in which the first sealing layer and the second sealing layer are integrated.

[0157] In some embodiments, the cover plate 48 may be a cover plate having a light transmission function such as a glass cover plate or a plastic cover plate. Specifically, the surface of the cover plate 48 facing the sealing layer 47 may be an uneven surface, whereby the utilization rate of incident light can be increased. The cover plate 48 includes a first cover plate and a second cover plate, the first cover plate faces the first sealing layer, and the second cover plate faces the second sealing layer. Alternatively, the first cover plate faces one side of the solar cell, and the second cover plate faces the other side of the solar cell.

[0158] Accordingly, based on some embodiments of the present application, an embodiment of the present application further provides a method for manufacturing a solar cell for manufacturing the solar cell provided in the above-described embodiment. For the same technical features or corresponding technical features as those in the above-described embodiment, the description is omitted here.

[0159] Here, the method for manufacturing a solar cell shown in FIG. 8 is taken as an example.

[0160] The manufacturing method includes providing a substrate and performing polishing on both sides of the substrate disposed opposite to each other, and the polishing is used to reduce surface defects of the substrate.

[0161] In some embodiments, the substrate includes an electrode region and a non-electrode region disposed at intervals.

[0162] The manufacturing method includes performing texture forming processing on one side of a substrate so that one side of the substrate forms an original texture structure. The texture forming processing includes chemical etching. For example, the substrate can be cleaned with a mixed solution of potassium hydroxide and hydrogen peroxide solution. Specifically, by controlling the concentration ratio of potassium hydroxide and hydrogen peroxide solution, an original texture structure with a morphology conforming to the desired can be formed. In some embodiments, the original texture structure can also be formed by methods such as laser etching, mechanical method or plasma etching. In laser etching, by controlling the parameters of the laser process, an original texture structure with a morphology conforming to the desired can be obtained.

[0163] The manufacturing method includes sequentially forming a first passivation film and a first doped conductive film on the surface of the substrate, where the first passivation film covers the original texture structure and the first doped conductive film covers the surface of the first passivation film.

[0164] The manufacturing method includes sequentially forming a second dielectric layer and a second doped conductive film on the other side of the substrate.

[0165] In some embodiments, the first doped conductive film and the second doped conductive film may be crystallized simultaneously. In this process, the surface of the first doped conductive film away from the first passivation film has a first roughness, and the surface of the second doped conductive film away from the second passivation film has a second roughness. The crystallized second doped conductive film is used as a second polysilicon doped layer.

[0166] In some embodiments, the crystallization treatment includes annealing treatment or laser activation.

[0167] The manufacturing method includes performing shaping processing on the first passivation film, the first doped conductive film, and the substrate in the non-electrode region. The shaping processing is used to remove the first passivation film and the first doped conductive film in the non-electrode region. Here, the remaining first passivation film is used as the first dielectric layer, and the remaining first doped conductive film is used as the first polysilicon doped layer.

[0168] In some embodiments, before performing the shaping processing, it further includes forming a mask layer on the surface of the first doped conductive film in the electrode region so as to reduce the etching damage to the first polysilicon doped layer caused by the shaping processing. The material of the mask layer includes organic wax, metal, or silicon dioxide mask. The mask layer is formed using a printing process.

[0169] In some embodiments, after forming the first polysilicon doped layer, the mask layer can be removed in an etching process. The etching process can be any one of a dry etching process, a wet etching process, or a laser etching process.

[0170] In some embodiments, during the shaping processing, the original texture structure located in the non-electrode region is converted into a second texture structure, the original texture structure located at the boundary between the non-electrode region and the electrode region is converted into a third texture structure, and the original texture structure located in the electrode region is used as the first texture structure.

[0171] In some embodiments, the shaping processing includes a wet etching process or a laser etching process. The process parameters of the wet etching process include that the reaction solution contains an acid solution and the reaction time is 50 - 550 s.

[0172] In some embodiments, the steps of the wet etching process are: (1) Using a mixed acid solution containing HF, HNO3, and H2SO4, with mass concentrations of 10 - 25%, 5 - 10%, and 2 - 4% respectively, and using a screen printing method to pattern and act on the surface of the non-metal region, and the action amount is 0.05 - 0.8 mL / cm2 wherein the action time is 50 - 550 s, and (2) after the action, it is washed twice alternately with deionized water / low-concentration alkaline solution (0.5 - 1% NaOH) / low-concentration HCl (2.5 - 3.5%).

[0173] The manufacturing method includes forming a first passivation layer located on the surface of the substrate in the non-electrode region and the surface of the first polysilicon doped layer.

[0174] The manufacturing method includes forming electrodes sequentially arranged along a first direction, each electrode being located in an electrode region, and the electrode dissolving the first passivation layer to be in electrical contact with the first polysilicon doped layer.

[0175] In some embodiments, the manufacturing method includes forming a first passivation layer covering the surface of the first polysilicon doped layer away from the first dielectric layer, and a second passivation layer covering the surface of the second polysilicon doped layer away from the second dielectric layer; forming a first electrode located in the first passivation layer and penetrating the first passivation layer to be in electrical contact with the first polysilicon doped layer, and a second electrode located in the second passivation layer and penetrating the second passivation layer to be in electrical contact with the second polysilicon doped layer.

[0176] Although the present application is disclosed as above in preferred embodiments, it does not limit the scope of the claims. Those skilled in the art can make some possible variations and modifications without departing from the concept of the present application. Therefore, the protection scope of the present application should follow the scope defined by the claims of the present application. Also, the embodiments and drawings in the specification of the present application are merely illustrative and not all within the scope protected by the claims of the present application.

[0177] Those skilled in the art will understand that each of the above embodiments is a specific example for implementing the present application. However, in practical applications, various changes can be made in form and details without departing from the spirit and scope of the present application. Any person skilled in the art can make changes and modifications respectively as long as they do not depart from the spirit and scope of the present application. Therefore, the protection scope of the present application should be based on the scope defined by the claims.

Claims

1. a substrate having a first surface and a second surface disposed opposite to each other; a first dielectric layer overlying the first surface and a first polysilicon doped layer overlying the first dielectric layer; a second dielectric layer located on the second surface and a second polysilicon doped layer located on the second dielectric layer; a first passivation layer overlying the first polysilicon doped layer and a second passivation layer overlying the second polysilicon doped layer; a first electrode and a second electrode, the first polysilicon doped layer is doped with an N-type doping element, and a surface of the first polysilicon doped layer remote from the first dielectric layer has a first roughness; the second polysilicon doped layer is doped with a P-type doping element, wherein a surface of the second polysilicon doped layer remote from the second dielectric layer has a second roughness, the second roughness being smaller than the first roughness; the first electrode passes through the first passivation layer and is electrically connected to the first polysilicon doped layer, and the second electrode passes through the second passivation layer and is electrically connected to the second polysilicon doped layer; A solar cell characterized by:

2. the first polysilicon doped layer includes a plurality of first silicon crystal grains, the surfaces of the plurality of first silicon crystal grains constitute a surface of the first polysilicon doped layer having the first roughness; the second polysilicon doped layer includes a plurality of second silicon crystal grains, the surfaces of the plurality of second silicon crystal grains constitute a surface of the second polysilicon doped layer having the second roughness; and the grain size of the first silicon crystal grains is smaller than the grain size of the second silicon crystal grains; The solar cell according to claim 1 .

3. The range of the grain size of the first silicon crystal grains includes 10 nm to 300 nm; The solar cell according to claim 2 .

4. The range of the crystal grain size of the second silicon crystal grains includes 100 nm to 900 nm; The solar cell according to claim 2 .

5. The shape of the first silicon crystal grains includes spherical grains or quasi-spherical grains. The solar cell according to claim 2 .

6. The shape of the second silicon crystal grains includes a sheet shape, a plate shape, or a particle shape. The solar cell according to claim 2 .

7. a radial one-dimensional dimension of the first silicon crystal grain is smaller than a radial one-dimensional dimension of the second silicon crystal grain, and a height of the first silicon crystal grain is larger than a height of the second silicon crystal grain; The solar cell according to claim 2 .

8. The solar cell includes alternating electrode and non-electrode regions, the first dielectric layer and the first polysilicon doped layer being located in the electrode regions, the first passivation layer being located in the electrode regions and the non-electrode regions, the first surface opposite the electrode regions having a first texture structure, the first dielectric layer covering the first texture structure, the first surface opposite the non-electrode regions having a second texture structure, and the first passivation layer further covering the second texture structure. The solar cell according to claim 1 .

9. a minimum distance between the first texture structure and the second surface is a first distance, a minimum distance between the second texture structure and the second surface is a second distance, and the first distance is greater than the second distance; The solar cell according to claim 8 .

10. The solar cell includes alternating electrode and non-electrode regions, the second dielectric layer and the second polysilicon doped layer being located in the electrode regions, the second passivation layer being located in the electrode regions and the non-electrode regions, the second surface opposite the electrode regions having a first texture structure, the second dielectric layer covering the first texture structure, the second surface opposite the non-electrode regions having a second texture structure, and the second passivation layer covering the second texture structure. The solar cell according to claim 1 .

11. a minimum distance between the first texture structure and the first surface is a first distance, a minimum distance between the second texture structure and the first surface is a second distance, and the first distance is greater than the second distance; The solar cell according to claim 10 .

12. The difference between the first distance and the second distance is in the range of 0.5 to 10 μm. The solar cell according to claim 9 .

13. the first surface of the substrate further comprises a third texture structure, the third texture structure being interposed at a boundary between the non-electrode region and the electrode region, a portion of the third texture structure including a first side and a second side, the first side facing the electrode region, the first dielectric layer covering the first side, the second side facing the non-electrode region, and a radial length of the first side being smaller than a radial length of the second side; The solar cell according to claim 9 .

14. The third texture structure includes a prism structure, a pyramid structure, or a tetrahedron structure. The solar cell according to claim 13 .

15. At least one of the first texture structure or the second texture structure includes a platform protrusion structure or a pyramid texture structure. The solar cell according to claim 9 .

16. the first surface is a front surface, and the substrate is doped with an N-type doping element; The solar cell according to claim 9 .

17. the average thickness of the first polysilicon doped layer is less than or equal to the average thickness of the second polysilicon doped layer; 2. The solar cell according to claim 1 ,

18. A material of at least one of the first dielectric layer or the second dielectric layer includes silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or silicon carbide; The solar cell according to claim 1 .

19. A cell string formed by connecting a plurality of solar cells according to any one of claims 1 to 18 with a connecting member; a sealing layer for covering a surface of the cell string; a cover plate for covering a surface of the sealing layer remote from the cell string. A photovoltaic module comprising:

Images