Semiconductor device

Abstract

To provide a semiconductor device including a logic circuit with single polarity, and the like.SOLUTION: In a logic circuit formed of transistors with the same conductivity type, the decrease in output voltage is prevented using at least three transistors and a capacitor element. By using an oxide semiconductor in a semiconductor layer of a transistor, the logic circuit with high output voltage and high withstanding voltage can be obtained. In addition, by using the logic circuit, a semiconductor device with high output voltage and high withstanding voltage can be obtained.SELECTED DRAWING: Figure 12

Description

Technical Field

[0001] One aspect of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. Or, one aspect of the invention disclosed in this specification and the like relates to a process, a machine, a manufacture , or a composition of matter. In particular, one aspect of the invention disclosed in this specification and the like relates to a semiconductor device and an electronic device having the semiconductor device.

[0002] Note that in this specification and the like, the semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. A display device (such as a liquid crystal display device or a light-emitting display device), a lighting device, an electro-optical device, a power storage device, a memory device, a semiconductor circuit, an imaging device, and an electronic device may have a semiconductor device.

Background Art

[0003] In recent years, transistors using an oxide semiconductor (OS: Oxide Semiconductor) for a semiconductor layer in which a channel is formed (hereinafter also referred to as an "OS transistor") have attracted attention. Since an oxide semiconductor can be formed by a sputtering method or the like, for example, it can be used for the semiconductor layer of a transistor constituting a large display device. Further, since an OS transistor can be used by improving a part of the production equipment of a transistor using amorphous silicon for a semiconductor layer in which a channel is formed, there is an advantage in that capital investment can be suppressed.

[0004] In addition, it is known that an OS transistor has extremely low leakage current in a non-conducting state. For example, a low-power CPU that applies the characteristic of extremely low leakage current of an OS transistor is disclosed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] However, it is known that it is difficult to realize a p-channel type transistor with an OS transistor. Therefore, in order to configure a logic circuit using only OS transistors, it is necessary to configure a unipolar logic circuit (a logic circuit composed of transistors of the same conductivity type).

[0007] Further, even if a p-channel type transistor can be realized, fabricating p-channel type transistors and n-channel type transistors separately on the same substrate increases the number of manufacturing steps, resulting in an increase in the manufacturing cost of the semiconductor device and a decrease in productivity. Therefore, it is preferable that the thin film transistors fabricated on the same substrate are transistors of the same conductivity type. However, in a unipolar logic circuit composed of transistors of the same conductivity type, there is a problem that the output voltage decreases by an amount corresponding to the threshold voltage of the transistor (also referred to as "Vth").

[0008] One aspect of the present invention aims to provide a semiconductor device with good productivity. Another aspect aims to provide a semiconductor device with low power consumption. Or, one aspect aims to provide a semiconductor device with high reliability ​​​​​​​​​One of the problems is to provide a good semiconductor device or the like. Or, one aspect of the present invention is to provide a semiconductor device including a unipolar logic circuit in which the output voltage is less likely to decrease, etc., as one of the problems. Or, one of the problems is to provide a novel semiconductor device or the like.

[0009] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention is not required to solve all of these problems. Note that other problems will be naturally clarified from the description of the specification, drawings, claims, etc., and it is possible to extract these other problems from the description of the specification, drawings, claims, etc.

Means for Solving the Problems

[0010] In a logic circuit composed of transistors of the same conductivity type, at least three transistors and a capacitive element are used to prevent a decrease in the output voltage. Further, by using an oxide semiconductor for the semiconductor layer of the transistor, a logic circuit with a large output voltage and high breakdown voltage is realized. Further, by using the logic circuit, a semiconductor device with a large output voltage and high breakdown voltage is realized.

[0011] One aspect of the present invention has a first to third transistors and a capacitive element. The first transistor has a first gate and a second gate. One of the source or drain of the first transistor is electrically connected to the first wiring, and the other of the source or drain of the first transistor is electrically connected to the first gate of the first transistor. The second gate of the first transistor is electrically connected to the fourth wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor, and the source or drain of the second transistor is electrically connected to the first gate of the first transistor. The second gate of the first transistor is electrically connected to the fourth wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor, and the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor, and the source or​​ Alternatively, one of the drains is electrically connected to the second wiring, and the source or drain of the third transistor One of the drains is electrically connected to the third wiring, and the source or drain of the third transistor The other is electrically connected to one electrode of the capacitor element, the gate of the third transistor is electrically connected to the third wiring, and the other electrode of the capacitor element is electrically connected to the source or drain of the first transistor The other, characterized in that it is a semiconductor device. The other is electrically connected.

[0012] Alternatively, one aspect of the present invention has first to third transistors and a capacitor element. The first transistor and the third transistor each have a first gate and a second gate. One of the source or drain of the first transistor is electrically connected to the first wiring, and the other of the source or drain of the first transistor is electrically connected to the first gate of the first transistor. Continued, the second gate of the first transistor is electrically connected to the fourth wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor. The other of the source or drain of the second transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the third wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitor element. The first gate of the third transistor is electrically connected to the third wiring. The second gate of the third transistor is electrically connected to the other of the source or drain of the third transistor. The other electrode of the capacitor element is electrically connected to the other of the source or drain of the first transistor. Characterized in that it is continued, it is a semiconductor device. Connected, one of the source or drain of the third transistor is electrically connected to the third wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitor element. The first gate of the third transistor is electrically connected to the third wiring. The second gate of the third transistor is electrically connected to the other of the source or drain of the third transistor. The other electrode of the capacitor element is electrically connected to the other of the source or drain of the first transistor. Characterized in that it is continued, it is a semiconductor device.

[0013] Alternatively, one aspect of the present invention includes a first to fourth transistor and a capacitive element. The first tr ansistor has a first gate and a second gate. One of the source or drain of the first transistor is electrically connected to the first wiring, and the other of the source or drain of the first transistor is electrically connected to the first gate of the first transistor. The second gate of the first transistor is electrically connected to the second wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor. The other of the source or drain of the second transistor is electrically connected to the third wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. The gate of the third transistor is electrically connected to the fourth wiring. The other electrode of the capacitive element is electrically connected to the other of the source or drain of the first transistor. One of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor. The other of the source or drain of the fourth transistor is electrically connected to the second wiring. The gate of the fourth transistor is electrically connected to the gate of the second transistor. The semiconductor device is characterized by this structure. One of the source or drain of the first transistor is electrically connected to the first wiring, and the other of the source or drain of the first transistor is electrically connected to the first gate of the first transistor. One of the source or drain of the first transistor is electrically connected to the first wiring, and the other of the source or drain of the first transistor is electrically connected to the first gate of the first transistor. The second gate of the first transistor is electrically connected to the second wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor. The other of the source or drain of the second transistor is electrically connected to the third wiring. One of the source or drain of the second transistor is electrically connected to the other of the source or drain of the first transistor. The other of the source or drain of the second transistor is electrically connected to the third wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. The gate of the third transistor is electrically connected to the fourth wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. The gate of the third transistor is electrically connected to the fourth wiring. The other electrode of the capacitive element is electrically connected to the other of the source or drain of the first transistor. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. The gate of the third transistor is electrically connected to the fourth wiring. The other electrode of the capacitive element is electrically connected to the other of the source or drain of the first transistor. One of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor. One of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor. The other of the source or drain of the fourth transistor is electrically connected to the second wiring. One of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor. The other of the source or drain of the fourth transistor is electrically connected to the second wiring. The gate of the fourth transistor is electrically connected to the gate of the second transistor. One of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor. The other of the source or drain of the fourth transistor is electrically connected to the second wiring. The gate of the fourth transistor is electrically connected to the gate of the second transistor. The semiconductor device is characterized by this structure. That is.

[0014] Of the first gate or the second gate of the first transistor, one can function as a gate, and the other can function as a back gate. Of the first gate or the second gate of the third transistor, one can function as a gate, and the other can function as a back gate. Of the first gate or the second gate of the first transistor, one can function as a gate, and the other can function as a back gate. Of the first gate or the second gate of the third transistor, one can function as a gate, and the other can function as a back gate. Of the first gate or the second gate of the third transistor, one can function as a gate, and the other can function as a back gate. That is.

[0015] Further, at least one of the first transistor and the second transistor is preferably a transistor including an oxide semiconductor in a semiconductor layer in which a channel is formed.

Advantages of the Invention

[0016] It is possible to provide a semiconductor device with good productivity or the like. Or, it is possible to provide a semiconductor device with low power consumption or the like. Or, it is possible to provide a semiconductor device with good reliability or the like. Or, it is possible to provide a semiconductor device including a unipolar logic circuit with a less likely to decrease output voltage or the like. Or, it is possible to provide a novel semiconductor device or the like. Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

[0017]

Brief Description of the Drawings

[0018]

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Embodiments for Carrying Out the Invention

[0019] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same reference numerals are commonly used among different drawings for the same part or parts having the same function, and the repeated description may be omitted. Furthermore, the positions, sizes, ranges, etc. of the respective configurations shown in the drawings and the like may not represent the actual positions, sizes, ranges, etc. for the purpose of facilitating the understanding of the invention. For this reason, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like. Moreover, in the drawings and the like, the positions, sizes, ranges, etc. of the respective configurations shown may not represent the actual positions, sizes, ranges, etc. for the purpose of facilitating the understanding of the invention. For this reason, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like. In addition, the positions, sizes, ranges, etc. of the respective configurations shown in the drawings and the like may not represent the actual positions, sizes, ranges, etc. for the purpose of facilitating the understanding of the invention. For this reason, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like. In the configuration of the invention described below, the same reference numerals are commonly used among different drawings for the same part or parts having the same function, and the repeated description may be omitted. Furthermore, the positions, sizes, ranges, etc. of the respective configurations shown in the drawings and the like may not represent the actual positions, sizes, ranges, etc. for the purpose of facilitating the understanding of the invention. For this reason, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like.

[0020] Also, the positions, sizes, ranges, etc. of each configuration shown in the drawings and the like are for facilitating the understanding of the invention and may not represent the actual positions, sizes, ranges, etc. For this reason, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings and the like.

[0021] In the drawings, in some cases, descriptions of some components are omitted to facilitate understanding of the invention. In some cases, descriptions of some hidden lines and the like are also omitted.

[0022] Ordinal numbers such as "first" and "second" in this specification and the like are attached to avoid confusion of components, and do not indicate any order or ranking such as process order or stacking order. Even for terms without ordinal numbers in this specification and the like, ordinal numbers may be attached in the claims to avoid confusion of components. Also, even for terms with ordinal numbers in this specification and the like, different ordinal numbers may be attached in the claims. Further, even for terms with ordinal numbers in this specification and the like, ordinal numbers may be omitted in the claims and the like. Also, terms such as "electrode" and "wiring" in this specification and the like do not functionally define these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Further, the terms "electrode" and "wiring" also include cases where a plurality of "electrodes" and "wirings" are integrally formed.

[0023]

[0023] In addition, terms such as "electrode" and "wiring" in this specification and the like do not functionally define these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Further, the terms "electrode" and "wiring" also include cases where a plurality of "electrodes" and "wirings" are integrally formed. For example, an "electrode" may be used as part of a "wiring", and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where a plurality of "electrodes" and "wirings" are integrally formed.

[0024] Note that the terms "upper" and "lower" in this specification and the like do not limit the positional relationship of components to be directly above or directly below and in direct contact. For example, in the expression "electrode B on insulating layer A", it is not necessary for electrode B to be directly formed in contact with insulating layer A, and components including other components between insulating layer A and electrode B are not excluded. For example, in the expression "electrode B on insulating layer A", it is not necessary for electrode B to be directly formed in contact with insulating layer A, and components including other components between insulating layer A and electrode B are not excluded. For example, in the expression "electrode B on insulating layer A", it is not necessary for electrode B to be directly formed in contact with insulating layer A, and components including other components between insulating layer A and electrode B are not excluded. For example, in the expression "electrode B on insulating layer A", it is not necessary for electrode B to be directly formed in contact with insulating layer A, and components including other components between insulating layer A and electrode B are not excluded.

[0025] In addition, the functions of the source and drain can be interchanged depending on operating conditions, such as when transistors with different polarities are employed or when the direction of current changes during circuit operation. Therefore, it is difficult to limit which one is the source or the drain. For this reason, in this specification, the terms "source" and "drain" are assumed to be interchangeable. Also, when it is explicitly stated in this specification or the like that X and Y are connected, it is disclosed in this specification or the like that X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in a figure or text. Those other than the connection relationship shown in the figure or text are also considered to be described in the figure or text. In addition, in this specification or the like, "electrically connected" includes cases where they are connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. Therefore, even when expressed as "electrically connect", in an actual circuit, there may be a case where there is no physical connection part and only wiring extends.

[0026] In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region"). Also, when it is explicitly stated in this specification or the like that X and Y are connected, it is disclosed in this specification or the like that X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in a figure or text. Those other than the connection relationship shown in the figure or text are also considered to be described in the figure or text. In addition, in this specification or the like, "electrically connected" includes cases where they are connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. Therefore, even when expressed as "electrically connect", in an actual circuit, there may be a case where there is no physical connection part and only wiring extends. In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region").

[0027] Also, in this specification or the like, "electrically connected" includes cases where they are connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. Therefore, even when expressed as "electrically connect", in an actual circuit, there may be a case where there is no physical connection part and only wiring extends. In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region"). In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region").

[0028] In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region"). In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region"). In addition, the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the region where the channel is formed (also referred to as the "channel formation region"). , the distance between the source (source region or source electrode) and the drain (drain region or drain electrode ). In one transistor, the channel length may not be the same value in all regions . That is, the channel length of one transistor may not be determined by a single value . Therefore, in this specification, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed .

[0029] The channel width refers to, for example, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state ) and the gate electrode overlap each other, or the length of the portion where the source and the drain face each other in the region where the channel is formed . In one transistor, the channel width may not be the same value in all regions . That is, the channel width of one transistor may not be determined by a single value . Therefore, in this specification, the channel width is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed .

[0030] Note that depending on the structure of the transistor, the channel width in the region where the channel is actually formed (also referred to as the "effective channel width") may be different from the channel width shown in the top view of the transistor (also referred to as the "apparent channel width") . For example, when the gate electrode covers the side surface of the semiconductor layer, the effective channel width may be larger than the apparent channel width , and the influence may become non - negligible . For example, in a fine transistor with a gate electrode covering the side surface of the semiconductor, the proportion of the channel region formed on the side surface of the semiconductor is such that the effective channel width is larger than the apparent channel width, and the influence cannot be ignored . For example, in a transistor where the gate electrode is fine and covers the side surface of the semiconductor, the proportion of the channel region formed on the side surface of the semiconductor It may increase. In that case, the effective channel width becomes larger than the apparent channel width.

[0031] In such a case, it may be difficult to estimate the effective channel width by actual measurement. For example, in order to estimate the effective channel width from the design values, it is necessary to assume that the shape of the semiconductor is known. Therefore, when the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0032] Therefore, in this specification, the apparent channel width may be referred to as the "surrounded channel width (SCW: Surrounded Channel Width)". Also, in this specification, when simply described as the channel width, it may refer to the surrounded channel width or the apparent channel width. Or, in this specification, when simply described as the channel width, it may refer to the effective channel width. Note that the channel length, channel width, effective channel width, apparent channel width, surrounded channel width, etc. can be determined by analyzing a cross-sectional TEM image or the like.

[0033] In addition, when calculating the field-effect mobility of a transistor, the current value per channel width, etc., the surrounded channel width may be used for calculation. In that case, the value may be different from the case of calculating using the effective channel width.

[0034] Also, the transistors shown in this specification, etc. are enhancement-type (normally-off type) field-effect transistors unless otherwise specified.

[0035] Note that the impurities in a semiconductor refer to, for example, components other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% can be said to be an impurity. When impurities are included, for example, the DOS (Density of State) of the semiconductor may increase, the carrier mobility may decrease, or the crystallinity may decrease. When the semiconductor is an oxide semiconductor, examples of impurities that change the characteristics of the semiconductor include Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components of the oxide semiconductor. In particular, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. In the case of an oxide semiconductor, for example, the incorporation of impurities such as hydrogen may form oxygen vacancies. When the semiconductor is silicon, examples of impurities that change the characteristics of the semiconductor include Group 1 elements excluding oxygen and hydrogen, Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0036] In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Also, "perpendicular" and "orthogonal" refer to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Also, "substantially perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0037] Note that in this specification, etc., for numerical values and measured values, "identical", "the same", "equal When terms such as "uniform" (including these synonyms) are used, unless otherwise specified, it shall be assumed to include a plus or minus 20% error.

[0038] In addition, in this specification, in cases where an etching process is performed after a photolithography process, unless otherwise specified, the resist mask formed in the photolithography process shall be removed after the completion of the etching process.

[0039] In this specification, etc., the high power supply potential VDD (hereinafter, also simply referred to as "VDD" or "H potential"). ) indicates a power supply potential with a potential higher than the low power supply potential VSS. Also, the low power supply potential VSS (hereinafter, also simply referred to as "VSS" or "L potential") indicates a power supply potential with a potential lower than the high power supply potential VDD. Also, the ground potential can be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential. and when VSS is the ground potential, VDD is a potential higher than the ground potential.

[0040] Generally, "voltage" often refers to the potential difference between a certain potential and a reference potential (for example, the ground potential (GND potential) or the source potential, etc.). Also, "potential" is relative, and the potential applied to wiring, etc. may change depending on the reference potential. Therefore, " voltage" and "potential" may be interchangeable in some cases. In this specification, etc., unless otherwise specified, VSS is used as the reference potential.

[0041] Note that the term "film" and the term "layer" may be interchangeable in some cases or depending on the situation. For example, the term "conductive layer" can be used as "conductive film". It may be possible to change it to the term "". Or, for example, the term "insulating film" may be changed to the term "insulating layer".

[0042] Also, in this specification, when the crystal is trigonal or rhombohedral, it is expressed as a hexagonal system .

[0043] (Embodiment 1) A semiconductor device 100 according to an aspect of the present invention will be described with reference to the drawings. FIG. 1(A) is a circuit diagram for explaining the configuration of the semiconductor device 100.

[0044] (Configuration example of semiconductor device 100) The semiconductor device 100 includes transistors 111 to 113 and a capacitor element 11 7. The transistors 111 to 113 are n-channel transistors having a source, a drain, and a gate. Note that the transistor 111 also has a back gate in addition to the gate . A back gate may also be provided for the transistor 112 and / or the transistor 113 .

[0045] The gate and the back gate are arranged so as to sandwich the channel formation region of the semiconductor layer therebetween. Therefore, the back gate can function in the same manner as the gate. Note that the potential of the back gate may be the same potential as the gate, or may be a ground potential (GND potential) or an arbitrary potential . Also, by changing the potential of the back gate independently without being linked to the gate, the threshold voltage of the transistor can be changed. In this specification and the like, either the gate or the back gate is referred to as the "first gate", and the other is also referred to as the "second gate".

[0046] In the semiconductor device 100, one of the source or drain of the transistor 111 is electrically connected to the wiring 121 and the other of the source or drain is electrically connected to the node 131 Also, one of the first gate or the second gate of the transistor 111 is electrically connected to the node 131 and the other of the first gate or the second gate is electrically connected to the wiring 124 Also, one of the source or drain of the transistor 112 is electrically connected to the node 131 and the other of the source or drain is electrically connected to the wiring 122 Also, the gate of the transistor 112 is electrically connected to the terminal 102. Also, the one of the source or drain of the transistor 113 is electrically connected to the wiring 123, and the other of the source or drain is electrically connected to the node 132. Also, the gate of the transistor 113 is electrically connected to one of the source or drain of the transistor 113 Also, one electrode of the capacitor element 117 is electrically connected to the node 131, and the other electrode is electrically connected to the node 132. Also, the node 131 is electrically connected to the terminal 105 Note that the terminal 105 is assumed to be connected to an element with a high input impedance such as a capacitor element or the gate of a transistor

[0047] Also, as in the semiconductor device 100a shown in the circuit diagram of Fig. 2(A), a back gate may be provided for the transistor 113, and the back gate may be electrically connected to one of the source or drain of the transistor 113

[0048] Also, as in the semiconductor device 100b shown in the circuit diagram of Fig. 2(B), a back gate may be provided for the transistor 112 ​​​A back gate may be provided and electrically connected to the gate of the transistor 112. This is also acceptable.

[0049] Also, like the semiconductor device 100c shown in the circuit diagram of FIG. 2(C), a back gate may be provided for the transistor 112 and electrically connected to the other of the source or drain of the transistor 112. This is also acceptable. This is also acceptable.

[0050] Also, like the semiconductor device 100d shown in the circuit diagram of FIG. 2(D), the gate of the transistor 113 may not be connected to one of the source or drain of the transistor 113 and may be connected to the wiring 125 continuously. Since the on-state and off-state of the transistor 113 can be controlled by the potential supplied to the wiring 125, the node 132 can be set to an arbitrary potential. This is also acceptable. This is also acceptable. This is also acceptable.

[0051] By providing a back gate in addition to the gate, when the transistor is in the on-state, the region where carriers flow becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of the transistor increases and the field-effect mobility increases. Therefore, a transistor having a back gate can reduce the occupied area of the transistor with respect to the required on-current. Also, by covering the semiconductor layer with the gate and the back gate, the influence of an external electric field on the channel formation region can be reduced, and the reliability of the semiconductor device can be improved. The back gate will be described in detail later. This is also acceptable. This is also acceptable. This is also acceptable. This is also acceptable. This is also acceptable. This is also acceptable.

[0052] Also, there is no particular limitation on the semiconductor material used for the semiconductor layer in which the channels of the transistors 111 to 113 are formed. However, for the transistors 111 to 11 This is also acceptable. It is preferable to use a transistor (hereinafter also referred to as an "OS transistor") in which the semiconductor layer in which the channel is formed is an oxide semiconductor for 3. Since the band gap of the oxide semiconductor is 2 eV or more, a transistor using an oxide semiconductor for the semiconductor layer in which the channel is formed can make the off-current extremely small. Also, the OS transistor has a high breakdown voltage between the source and the drain. By using the OS transistor, a semiconductor device with a large output voltage and high breakdown voltage can be provided. In particular, it is preferable to use an OS transistor for at least one or both of the transistor 111 and the transistor 112. Also, the capacitance of the capacitor element 117 is preferably larger than the capacitance generated between the gate and the source of the transistor 113. Also, the capacitance generated between the gate and the source of the transistor 113 is preferably larger than the capacitance generated between the gate and the source of the transistor 111. Since there is, the transistor using an oxide semiconductor for the semiconductor layer in which the channel is formed can make the off-current extremely small. Also, the OS transistor has a high breakdown voltage between the source and the drain. By using the OS transistor, a semiconductor device with a large output voltage and high breakdown voltage can be provided. In particular, it is preferable to use an OS transistor for at least one or both of the transistor 111 and the transistor 112.

[0053] Also, the capacitance of the capacitor element 117 is preferably larger than the capacitance generated between the gate and the source of the transistor 113. Also, the capacitance generated between the gate and the source of the transistor 113 is preferably larger than the capacitance generated between the gate and the source of the transistor 111. Also, the capacitance generated between the gate and the source of the transistor 113 is preferably larger than the capacitance generated between the gate and the source of the transistor 111.

[0054] <Operating example of semiconductor device 100> The semiconductor device 100 can function as an inverter circuit. Specifically, when an H potential is input to the terminal 102, an L potential is output from the terminal 105, and when an L potential is input to the terminal 102, an H potential can be output from the terminal 105. When an H potential is input to the terminal 102, an L potential is output from the terminal 105, and when an L potential is input to the terminal 102, an H potential can be output from the terminal 105.

[0055] The operating example of the semiconductor device 100 will be described with reference to the timing chart of FIG. 3 and the circuit diagrams of FIGS. 4 to 6. In the present embodiment, the threshold voltages of all of the transistors 111 to 113 are the same. Also, Vth is larger than 0 volts and less than (VDD - VSS) / 2. Also, an H potential (VDD) is supplied to the wiring 121, and the wiring 1 In the present embodiment, the threshold voltages of all of the transistors 111 to 113 are the same. Also, Vth is larger than 0 volts and less than (VDD - VSS) / 2. Also, an H potential (VDD) is supplied to the wiring 121, and the wiring 1 113 are all the same. Also, Vth is larger than 0 volts and less than (VDD - VSS) / 2. Also, an H potential (VDD) is supplied to the wiring 121, and the wiring 1 The L potential (VSS) is supplied to 22. Also, to the wiring 124, the inverted signal of the signal input to the terminal 102 is input. For example, when an H potential is input to the terminal 102, an L potential is input to the wiring 124.

[0056] Note that the inverted signal of the signal input to the terminal 102 may be input to the wiring 121. In this case, without providing the wiring 121, either the source or the drain of the transistor 111 may be electrically connected to the wiring 124 (see Fig. 1(B)).

[0057] As an initial state, the state of the semiconductor device 100 immediately before the time T1 is shown in Fig. 4(A). In Fig. 4(A ), the transistors 111 to 113 are in the off state, the potential of the node 13 1 is the H potential, and the potential of the node 132 is H - Vth. Also, an L potential is input to the terminal 102.

[0058] 〔Period 151: H potential input period〕 At the time T1, an H potential is input to the terminal 102, an L potential is input to the wiring 124, and an L potential is input to the wiring 123. Then, the transistor 112 becomes in the on state. When the transistor 112 becomes in the on state, the potential of the node 131 becomes the L potential, and an L potential is output from the terminal 105. Also, when the potential of the node 131 becomes the L potential, the potential of the node 132 connected through the capacitive element 117 becomes L - Vth (see Fig. 4(B)). Note that the timing for inputting the H potential to the terminal 102 is preferably after inputting the L potential to the wiring 123.

[0059] 〔Period 152: L potential input period〕 At the time T2, an L potential is input to the terminal 102, and an H potential is supplied to the wiring 124. Then, the transistor 112 turns off and the transistor 111 turns on. Then, the potential of the node 131 becomes H-Vth. Also, the potential of the node 132 connected via the capacitive element 117 becomes H-2×Vth (see Fig. 5(A)).

[0060] At time T3, an H potential is supplied to the wiring 123. Then, the transistor 113 turns on and the potential of the node 132 becomes H-Vth. At this time, the potential of the node 132 rises by Vth, which is the potential difference between H-2×Vth and H-Vth. Also, the potential of the node 131 connected to the node 132 via the capacitive element 117 also rises by Vth. Thus, the potential of the node 131 becomes the H potential (see Fig. 5(B)). In this way, an H potential is supplied from the terminal 105. Also, since the potentials of the first gate, second gate, source, and drain of the transistor 111 become the H potential, the transistor 111 turns off. and the potential of the node 131 connected via the capacitive element 117 also rises by Vth. Thus, the potential of the node 131 becomes the H potential (see Fig. 5(B)). In this way, an H potential is supplied from the terminal 105. Also, since the potentials of the first gate, second gate, source, and drain of the transistor 111 become the H potential, the transistor 111 turns off. and the potential of the node 131 connected via the capacitive element 117 also rises by Vth. Thus, the potential of the node 131 becomes the H potential (see Fig. 5(B)). In this way, an H potential is supplied from the terminal 105. Also, since the potentials of the first gate, second gate, source, and drain of the transistor 111 become the H potential, the transistor 111 turns off. and the potential of the node 131 connected via the capacitive element 117 also rises by Vth. Thus, the potential of the node 131 becomes the H potential (see Fig. 5(B)). In this way, an H potential is supplied from the terminal 105. Also, since the potentials of the first gate, second gate, source, and drain of the transistor 111 become the H potential, the transistor 111 turns off. and the potential of the node 131 connected via the capacitive element 117 also rises by Vth. Thus, the potential of the node 131 becomes the H potential (see Fig. 5(B)). In this way, an H potential is supplied from the terminal 105. Also, since the potentials of the first gate, second gate, source, and drain of the transistor 111 become the H potential, the transistor 111 turns off.

[0061] Also, as shown at time T4 in Fig. 6, when the potential of the node 132 becomes H-Vth, the transistor 113 turns off. Also, as shown at time T4 in Fig. 6, when the potential of the node 132 becomes H-Vth, the transistor 113 turns off.

[0062] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like. This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0063] (Embodiment 2) In this embodiment, a semiconductor device 110 having a configuration different from that of the semiconductor device 100 will be described with reference to the drawings. Fig. 7(A) is a circuit diagram for explaining the configuration of the semiconductor device 110. In this embodiment, to avoid repetition of the description, mainly the parts different from the semiconductor device 100 will be described. In this embodiment, to avoid repetition of the description, mainly the parts different from the semiconductor device 100 will be described. This will be described in minutes. For parts not described in this embodiment, other embodiments or common general knowledge in the art may be referred to. This is sufficient for those skilled in the art to consider.

[0064] <Configuration Example of Semiconductor Device 110> The semiconductor device 110 has a back gate provided for the transistor 113 included in the semiconductor device 100 shown in FIG. 1(A), and has a configuration in which the back gate is electrically connected to the other of the source or drain of the transistor 113.

[0065] Note that an inverted signal of the signal input to the terminal 102 may be input to the wiring 121. In this case, without providing the wiring 121, one of the source or drain of the transistor 111 may be electrically connected to the wiring 124 (see FIG. 7(B)).

[0066] Also, as in the semiconductor device 110a shown in the circuit diagram of FIG. 7(C), a back gate may be provided for the transistor 112 of the semiconductor device 110, and the back gate may be electrically connected to the gate of the transistor 112.

[0067] Also, as in the semiconductor device 110b shown in the circuit diagram of FIG. 7(D), a back gate may be provided for the transistor 112 of the semiconductor device 110, and the back gate may be electrically connected to the other of the source or drain of the transistor 112.

[0068] The semiconductor device 110, the semiconductor device 110a, and the semiconductor device 110b can also operate in the same manner as the semiconductor device 100. However, in the semiconductor device 110, the semiconductor device 110a, and the semiconductor device 110b, when an L potential is supplied to the wiring 123 in the period 151, the potential of the node 132 becomes Vth.

[0069] <Operation example of semiconductor device 110> An operation example of the semiconductor device 110 will be described with reference to the timing chart of FIG. 8 and the circuit diagrams of FIGS. 9 to 11. The semiconductor device 110 can operate substantially in the same manner as the semiconductor device 100. Here, the parts different from the operation of the semiconductor device 100 will be described. Here, the parts different from the operation of the semiconductor device 100 will be described. Here, the parts different from the operation of the semiconductor device 100 will be described.

[0070] In this embodiment as well, the threshold voltages (also referred to as “Vth”) of transistors 111 to 113 are all the same. Also, an H potential (VDD) is supplied to the wiring 121, and an L potential (VSS) is supplied to the wiring 122. Further, an inverted signal of the signal input to the terminal 102 is input to the wiring 124. (Also referred to as “Vth”.) are all the same. Also, an H potential (VDD) is supplied to the wiring 121, and an L potential (VSS) is supplied to the wiring 122. Further, an inverted signal of the signal input to the terminal 102 is input to the wiring 124. In this embodiment as well, the threshold voltages (also referred to as “Vth”) of transistors 111 to 113 are all the same. Also, an H potential (VDD) is supplied to the wiring 121, and an L potential (VSS) is supplied to the wiring 122. Further, an inverted signal of the signal input to the terminal 102 is input to the wiring 124. In this embodiment as well, the threshold voltages (also referred to as “Vth”) of transistors 111 to 113 are all the same. Also, an H potential (VDD) is supplied to the wiring 121, and an L potential (VSS) is supplied to the wiring 122. Further, an inverted signal of the signal input to the terminal 102 is input to the wiring 124.

[0071] Note that an inverted signal of the signal input to the terminal 102 may be input to the wiring 121. In this case, without providing the wiring 121, one of the source or drain of the transistor 111 may be electrically connected to the wiring 124 (see FIG. 7(B)). Note that an inverted signal of the signal input to the terminal 102 may be input to the wiring 121. In this case, without providing the wiring 121, one of the source or drain of the transistor 111 may be electrically connected to the wiring 124 (see FIG. 7(B)). Note that an inverted signal of the signal input to the terminal 102 may be input to the wiring 121. In this case, without providing the wiring 121, one of the source or drain of the transistor 111 may be electrically connected to the wiring 124 (see FIG. 7(B)).

[0072] As an initial state, the state of the semiconductor device 110 immediately before the time T1 is shown in FIG. 9(A). In FIG. 9(A), the transistors 111 to 113 are in an off state, the potential of the node 131 is H + Vth, and the potential of the node 132 is H - Vth. Also, an L potential is input to the terminal 102. As an initial state, the state of the semiconductor device 110 immediately before the time T1 is shown in FIG. 9(A). In FIG. 9(A), the transistors 111 to 113 are in an off state, the potential of the node 131 is H + Vth, and the potential of the node 132 is H - Vth. Also, an L potential is input to the terminal 102. As an initial state, the state of the semiconductor device 110 immediately before the time T1 is shown in FIG. 9(A). In FIG. 9(A), the transistors 111 to 113 are in an off state, the potential of the node 131 is H + Vth, and the potential of the node 132 is H - Vth. Also, an L potential is input to the terminal 102. As an initial state, the state of the semiconductor device 110 immediately before the time T1 is shown in FIG. 9(A). In FIG. 9(A), the transistors 111 to 113 are in an off state, the potential of the node 131 is H + Vth, and the potential of the node 132 is H - Vth. Also, an L potential is input to the terminal 102.

[0073] [Period 151: H potential input period] At the time T1, an H potential is input to the terminal 102, an L potential is input to the wiring 124, and an L potential is input to the wiring 123. Then, the transistor 112 turns on. The transistor At the time T1, an H potential is input to the terminal 102, an L potential is input to the wiring 124, and an L potential is input to the wiring 123. Then, the transistor 112 turns on. The transistor When the dissta 112 is in the on state, the node 131 becomes the L potential. Also, from the terminal 105 the L potential is output. Further, when the potential of the node 131 becomes the L potential, via the capacitive element 117 the potential of the node 132 which is connected becomes L - Vth (see Fig. 9(B)).

[0074] 〔Period 152: L potential input period〕 At time T2, an L potential is input to the terminal 102, and an H potential is supplied to the wiring 124. Then, the transistor 112 becomes the off state and the transistor 111 becomes the on state. Then, the potential of the node 131 rises from the L potential to H - Vth. At this time, the potential of the node 131 and the potential of the node 132 which is connected via the capacitive element 117 also tries to rise. However when the potential of the node 132 exceeds the Vth of the transistor 113, the transistor 113 becomes the on state. Thus, the potential of the node 132 becomes Vth (see Fig. 10(A)). Also when the potential of the node 132 becomes Vth, the transistor 113 becomes the off state.

[0075] At time T3, an H potential is supplied to the wiring 123. Then, the transistor 113 becomes the on state and the potential of the node 132 becomes H - Vth. At this time, the potential of the node 132 is raised by H - 2×Vth which is the potential difference between Vth and H - Vth. Also, the potential of the node 131 which is connected to the node 132 via the capacitive element 117 is also raised by H - 2×Vth. Therefore, the potential of the node 131 instantaneously becomes 2×H - 3×Vth (see Fig. 10(B). ).

[0076] Also, when the potential of the node 131 exceeds H + Vth, since the charge of the node 131 moves to the wiring 121 the potential of the node 131 drops.

[0077] Then, as shown at time T4 in FIG. 11, when the potential of node 131 becomes H + Vth, the transistor 111 turns off. Also, when the potential of node 132 becomes H - Vth, the transistor 113 turns off. In this way, a potential equal to or higher than the H potential can be supplied from terminal 105.

[0078] Note that in the operation example of the semiconductor device 110 shown in this embodiment, it is important that VDD - 2×Vth is larger than Vth. In other words, it is important that Vth is less than one-third of VDD.

[0079] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0080] (Embodiment 3) In this embodiment, a semiconductor device 120 having a configuration different from that of the semiconductor device 100 will be described with reference to the drawings. FIG. 12(A) is a circuit diagram for explaining the configuration of the semiconductor device 120. In order to avoid repetition of the description, in this embodiment, mainly the parts different from the semiconductor device 100 will be described. For the parts not described in this embodiment, reference may be made to other embodiments and the common general knowledge of those skilled in the art for understanding.

[0081] <Configuration Example of Semiconductor Device 120> The semiconductor device 120 has a configuration in which a transistor 114 is added to the semiconductor device 100 shown in FIG. 1(A). One of the source or drain of the transistor 114 included in the semiconductor device 120 is electrically connected to node 132, and the other of the source or drain is connected to wiring 12. ​​​​​​​​​is electrically connected to 2. Also, the gate of transistor 114 is electrically connected to terminal 102.

[0082] Also, like the semiconductor device 120a shown in the circuit diagram of FIG. 12(B), the other of the source or drain of transistor 114 may be electrically connected to wiring 126. By connecting the other of the source or drain of transistor 11 4 to a wiring different from wiring 122, it is possible to supply a potential different from that of wiring 122 to the other of the source or drain of transistor 11 4.

[0083] Also, like the semiconductor device 120b shown in the circuit diagram of FIG. 12(C), a back gate may be provided for transistor 112 and the back gate may be electrically connected to the gate of transistor 112 Also, a back gate may be provided for transistor 114 and the back gate may be electrically connected to the gate of transistor 114.

[0084] Also, like the semiconductor device 120c shown in the circuit diagram of FIG. 12(D), a back gate may be provided for transistor 112 and the back gate may be electrically connected to the other of the source or drain of transistor 112 Also, a back gate may be provided for transistor 114 and the back gate may be electrically connected to the other of the source or drain of transistor 114.

[0085] <Operating Example of Semiconductor Device 120> An operating example of the semiconductor device 120 will be described with reference to the timing chart of FIG. 13 and the circuit diagrams of FIGS. 14 to 16. The semiconductor device 120 operates substantially in the same manner as the semiconductor device 100. ​​​​​​​Here, differences in operation from the semiconductor device 100 will be described.

[0086] In this embodiment, the threshold voltages ( In addition, the H potential (VDD) is supplied to the wiring 121. The line 121 is connected to the terminal 102, and the L potential (VSS) is supplied to the line 122. Alternatively, an inverted signal of the signal to be input may be input.

[0087] As an initial state, the state of the semiconductor device 120 immediately before time T1 is shown in FIG. In (A), the transistors 111 to 114 are in an off state, and The potential of the terminal 131 is H+Vth, and the potential of the node 132 is H-Vth. An L potential is input to 102.

[0088] [Period 151: High potential input period] At time T1, an H potential is input to the terminal 102, an L potential is input to the wiring 124, and An L potential is input to the line 123. Then, the transistors 112 and 114 When the transistor 112 and the transistor 114 are turned on, The nodes 131 and 132 are at the L potential. Also, the L potential is output from the terminal 105. (See FIG. 14(B)).

[0089] [Period 152: L potential input period] At time T2, the terminal 102 is at L potential, the wire 124 is at H potential, and the wire 123 is at 2×Vth In this embodiment, a potential of 2×Vth or more is supplied to the wiring 123. Then, the transistor 112 and the transistor 114 are turned off, and The potential of node 131 becomes H-Vth, and the potential of node 132 becomes Vth (see Fig. 15(A ).).

[0090] At time T3, the potential of wiring 123 is set to the H potential. Then, the potential of node 132 rises from Vth to H-Vth. At this time, the potential of node 132 rises by H-2×Vth, which is the potential difference between Vth and H-Vth. Also, the potential of node 131 connected via node 132 and capacitor element 117 also rises by H-2×Vth. Therefore, the potential of node 131 instantaneously becomes 2×H-3×Vth (see Fig. 15(B)).

[0091] However, when the potential of node 131 exceeds H+Vth, the charge of node 131 moves to wiring 121 , so the potential of node 131 decreases.

[0092] Then, as shown at time T4 in Fig. 16, when the potential of node 131 becomes H+Vth, the transistor 111 turns off. Also, since the potential of node 132 is H-Vth , the transistor 113 is in the off state. In this way, a potential of H or higher can be supplied from terminal 105 .

[0093] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0094] (Embodiment 4) In this embodiment, a structural example of a transistor that can be used in the semiconductor device shown in the above embodiment will be described.

[0095] <Structural Example of Transistor> A semiconductor device according to an aspect of the present invention includes a bottom-gate type transistor, a top-gate type transistor,​ It can be manufactured using various forms of transistors such as transistors. Therefore, according to the existing manufacturing line, the material of the semiconductor layer and the transistor structure to be used can be easily replaced .

[0096] 〔Bottom Gate Transistor〕 FIG. 17(A1) is a cross-sectional view of a channel protection type transistor 410, which is a type of bottom gate transistor. The transistor 410 has an electrode 246 on a substrate 271 via an insulating layer 272. Further, a semiconductor layer 242 is provided on the electrode 246 via an insulating layer 226. The electrode 246 can function as a gate electrode. The insulating layer 226 can function as a gate insulating layer. Moreover, an insulating layer 225 is provided on the channel formation region of the semiconductor layer 242. Also, in contact with a part of the semiconductor layer 2 42, electrodes 244a and 244b are provided on the insulating layer 226. A part of the electrode 244a and a part of the electrode 244b are formed on the insulating layer 225. The insulating layer 225 can function as a channel protection layer. By providing the insulating layer 225 on the channel formation region, it is possible to prevent the exposure of the semiconductor layer 242 that occurs during the formation of the electrodes 244a and 244b. Therefore, it is possible to prevent the channel formation region of the semiconductor layer

[0097] 242 from being etched during the formation of the electrodes 244a and 244b. According to one aspect of the present invention , a transistor with good electrical characteristics can be realized. Also, the transistor 410 has an insulating layer 228 on the electrodes 244a, 244b and the insulating layer 225, and an insulating layer 229 on the insulating layer 228.

[0098] The insulating layer 225 can function as a channel protection layer. By providing the insulating layer 225 on the channel formation region, it is possible to prevent the exposure of the semiconductor layer 242 that occurs during the formation of the electrodes 244a and 244b. Therefore, it is possible to prevent the channel formation region of the semiconductor layer from being etched during the formation of the electrodes 244a and 244b. According to one aspect of the present invention , a transistor with good electrical characteristics can be realized. 242 from being etched during the formation of the electrodes 244a and 244b. According to one aspect of the present invention , a transistor with good electrical characteristics can be realized.

[0099] Also, the transistor 410 has an insulating layer 228 on the electrodes 244a, 244b and the insulating layer 225, and an insulating layer 229 on the insulating layer 228. The transistor 410 has an insulating layer 228 on the electrodes 244a, 244b and the insulating layer 225, and an insulating layer 229 on the insulating layer 228.

[0100] When an oxide semiconductor is used for the semiconductor layer 242, the electrodes 244a and 244b At least in the portion in contact with the semiconductor layer 242, oxygen is taken from a part of the semiconductor layer 242, and oxygen is It is preferable to use a material capable of generating oxygen vacancies. The carrier concentration in the region where the defect occurs increases, and the region becomes n-type, and the n-type region (n + layer) and Therefore, the region can function as a source region or a drain region. As an example of a material that can remove oxygen from an oxide semiconductor and cause oxygen vacancies, , tungsten, titanium, etc.

[0101] The source region and the drain region are formed in the semiconductor layer 242, whereby the electrode 244a In addition, the contact resistance between the electrode 244b and the semiconductor layer 242 can be reduced. The electrical characteristics of the transistor, such as the effective mobility and threshold voltage, can be improved. can.

[0102] When a semiconductor such as silicon is used for the semiconductor layer 242, the semiconductor layer 242 and the electrode 244a and between the semiconductor layer 242 and the electrode 244b, as an n-type semiconductor or a p-type semiconductor. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. It can function as a source or drain region of a transistor.

[0103] The insulating layer 229 has a function of preventing or reducing the diffusion of impurities from the outside into the transistor. It is preferable to form the insulating layer 229 using a material having the above structure. It is also possible.

[0104] In the case where an oxide semiconductor is used for the semiconductor layer 242, the insulating layer 229 is formed before or after the insulating layer 229 is formed. Alternatively, heat treatment may be performed before or after the formation of the insulating layer 229. The oxygen contained in the insulating layer 229 and other insulating layers is diffused into the semiconductor layer 242, Alternatively, the insulating layer 229 can be formed while heating. By this, oxygen vacancies in the semiconductor layer 242 can be compensated for.

[0105] The transistor 411 shown in FIG. 17A2 has an insulating layer 229 and functions as a back gate. The transistor 410 differs from the transistor 410 in that it has an electrode 223 that can be connected to the electrode 246. It can be formed using the same materials and methods as those described above.

[0106] [About the back gate] Here, we will explain the gate and backgate of a transistor. The backgate is formed of a conductive layer, and the channel forming region of the semiconductor layer is sandwiched between the gate and backgate. Therefore, the back gate can function similarly to a gate. The back gate may be at the same potential as the gate electrode, or at the GND potential or any other potential. The potential of the back gate may be changed independently of the gate. In this way, the threshold voltage of the transistor can be changed.

[0107] Both the electrode 246 and the electrode 223 can function as a gate. The insulating layer 226, the insulating layer 228, and the insulating layer 229 each function as a gate insulating layer. The electrode 223 may be provided between the insulating layer 228 and the insulating layer 229. good.

[0108] In the case where one of the electrodes 246 or 223 is referred to as a "gate" or "gate electrode", the other is referred to as a "back gate" or "back gate electrode". For example, in the transistor 411, when the electrode 223 is referred to as the "gate electrode", the electrode 246 is referred to as the "back gate electrode". When the electrode 223 is used as the "gate electrode", the transistor 4 11 can be considered as a kind of top-gate type transistor. Also, either one of the electrodes 246 and 223 may be referred to as a "first gate" or "first gate electrode", and the other as a "second gate" or "second gate electrode".

[0109] By providing the electrodes 246 and 223 with the semiconductor layer 242 therebetween, and further, by setting the electrodes 24 6 and 223 to the same potential, the region where carriers flow in the semiconductor layer 242 becomes larger in the film thickness direction, so that the amount of carrier movement increases. As a result, the on-current of the transistor 411 increases and the field-effect mobility becomes higher. Therefore, the transistor 411 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 411 can be

[0110] made smaller with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be made smaller. Thus, according to one aspect of the present invention, a semiconductor device with a high degree of integration can be realized.

[0111]

[0111] Also, since the gate and the back gate are formed of a conductive layer, the electricity generated outside the transistor The boundary has a function of preventing the outside from acting on the semiconductor layer where the channel is formed (especially an electric field shielding function against static electricity, etc.). Note that by forming the back gate larger than the semiconductor layer and covering the semiconductor layer with the back gate, the electric field shielding function can be enhanced. In addition, since the electrode 246 (gate) and the electrode 223 (back gate) each have a function of shielding an external electric field, charges such as charged particles generated on the insulating layer 272 side or above the electrode 223 do not affect the channel formation region of the semiconductor layer 242. As a result, deterioration due to a stress test (for example, a -GBT (Gate Bias - Temperature) stress test in which a negative charge is applied to the gate) is suppressed. Also, the phenomenon in which the gate voltage (turn - on voltage) at which the on - current starts to flow changes depending on the magnitude of the drain voltage can be reduced. Note that this effect occurs when the electrode 246 and the electrode 223 are at the same potential or different potentials. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor.

[0112] Also, by having the electrode 246 and the electrode 223 and making the electrode 246 and the electrode 223 at the same potential, the amount of variation in the threshold voltage is reduced. For this reason, the variation in the electrical characteristics among a plurality of transistors is also reduced at the same time. The boundary has a function of preventing the outside from acting on the semiconductor layer where the channel is formed (especially an electric field shielding function against static electricity, etc.). Note that by forming the back gate larger than the semiconductor layer and covering the semiconductor layer with the back gate, the electric field shielding function can be enhanced. In addition, since the electrode 246 (gate) and the electrode 223 (back gate) each have a function of shielding an external electric field, charges such as charged particles generated on the insulating layer 272 side or above the electrode 223 do not affect the channel formation region of the semiconductor layer 242. As a result, deterioration due to a stress test (for example, a -GBT (Gate Bias - Temperature) stress test in which a negative charge is applied to the gate) is suppressed. Also, the phenomenon in which the gate voltage (turn - on voltage) at which the on - current starts to flow changes depending on the magnitude of the drain voltage can be reduced. Note that this effect occurs when the electrode 246 and the electrode 223 are at the same potential or different potentials. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. In addition, since the electrode 246 (gate) and the electrode 223 (back gate) each have a function of shielding an external electric field, charges such as charged particles generated on the insulating layer 272 side or above the electrode 223 do not affect the channel formation region of the semiconductor layer 242. As a result, deterioration due to a stress test (for example, a -GBT (Gate Bias - Temperature) stress test in which a negative charge is applied to the gate) is suppressed. Also, the phenomenon in which the gate voltage (turn - on voltage) at which the on - current starts to flow changes depending on the magnitude of the drain voltage can be reduced. Note that this effect occurs when the electrode 246 and the electrode 223 are at the same potential or different potentials. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. In addition, since the electrode 246 (gate) and the electrode 223 (back gate) each have a function of shielding an external electric field, charges such as charged particles generated on the insulating layer 272 side or above the electrode 223 do not affect the channel formation region of the semiconductor layer 242. As a result, deterioration due to a stress test (for example, a -GBT (Gate Bias - Temperature) stress test in which a negative charge is applied to the gate) is suppressed. Also, the phenomenon in which the gate voltage (turn - on voltage) at which the on - current starts to flow changes depending on the magnitude of the drain voltage can be reduced. Note that this effect occurs when the electrode 246 and the electrode 223 are at the same potential or different potentials. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor.

[0113] Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor.

[0114] In addition, by having the electrode 246 and the electrode 223 and making the electrode 246 and the electrode 223 at the same potential, the amount of variation in the threshold voltage is reduced. For this reason, the variation in the electrical characteristics among a plurality of transistors is also reduced at the same time. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor. Note that the GBT stress test is a type of acceleration test and can evaluate the characteristic changes (aging changes) of transistors that occur over a long period of time in a short time. In particular, the amount of variation in the threshold voltage of the transistor before and after the GBT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage, the higher the reliability of the transistor.

[0115] In addition, a transistor having a back gate applies a positive charge to the gate, and the +GBT stress The variation in the threshold voltage before and after the test is also smaller than that of a transistor without a back gate. Smaller.

[0116] Further, by forming the back gate with a conductive film having light-shielding properties, it is possible to prevent light from entering the semiconductor layer from the back gate side. Therefore, it is possible to prevent light deterioration of the semiconductor layer and deterioration of electrical characteristics such as a shift in the threshold voltage of the transistor. According to one aspect of the present invention, a highly reliable transistor can be realized. In addition, A highly reliable semiconductor device can be realized.

[0117] FIG. 17(B1) shows a cross-sectional view of a channel protection type transistor 420, which is one of the bottom gate type transistors. The transistor 420 has substantially the same Structure as the transistor 410, but is different in that the insulating layer 225 covers the semiconductor layer 242. By providing the insulating layer 2

[0118] 225, it is possible to prevent the exposure of the semiconductor layer 242 that occurs when forming the electrodes 244a and 244b. Therefore, it is possible to prevent thinning of the semiconductor Layer 242 when forming the electrodes 244a and 244b. Layer 242. By providing 225, it is possible to prevent the exposure of the semiconductor layer 242 that occurs when forming the electrodes 244a and 244b. Therefore, it is possible to prevent thinning of the semiconductor layer 242 when forming the electrodes 244a and 244b. Layer 242. Layer 242 can be prevented.

[0119] In addition, in the opening formed by selectively removing a part of the insulating layer 225 overlapping the semiconductor layer 242, The semiconductor layer 242 and the electrode 244a are electrically connected. Also, in another opening formed by selectively removing a part of the insulating layer 225 overlapping the semiconductor layer 242, the semiconductor layer 242 and the electrode 244b are electrically connected. A part of the insulating layer 229 that overlaps the channel formation region Of the insulating layer 229 that overlaps the channel formation region The resulting region can function as a channel protection layer.

[0120] The transistor 421 shown in Fig. 17(B2) is different from the transistor 420 in that it has an electrode 223 that can function as a back gate on the insulating layer 229. Also, the distance between the electrode 244a and the electrode 246, and the distance between the electrode 244b and the electrode 246 are longer in the transistors 420 and 421 than in the transistors 410 and 411. Therefore, the parasitic capacitance generated between the electrode 244a and the electrode 246 can be reduced. Also, the parasitic capacitance generated between the electrode 244b and the electrode 246 can be reduced. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized.

[0121] In addition, the transistors 420 and 421 have a longer distance between the electrode 244a and the electrode 246, and a longer distance between the electrode 244b and the electrode 246 than the transistors 410 and 411. Thus, the parasitic capacitance generated between the electrode 244a and the electrode 246 can be reduced. Also, the parasitic capacitance generated between the electrode 244b and the electrode 246 can be reduced. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased.

[0122] The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased. The transistor 425 shown in Fig. 17(C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 425 forms the electrodes 244a and 244b in contact with the semiconductor layer 242 without providing the insulating layer 225. Therefore, a part of the semiconductor layer 242 exposed during the formation of the electrodes 244a and 244b may be etched. On the other hand, since the insulating layer 229 is not provided, the productivity of the transistor can be increased.

[0123] The transistor 426 shown in Fig. 17(C2) is different from the transistor 425 in that it has an electrode 223 that can function as a back gate on the insulating layer 229. The transistor 426 shown in Fig. 17(C2) is different from the transistor 425 in that it has an electrode 223 that can function as a back gate on the insulating layer 229.

[0124] 〔Top gate type transistor〕 Fig. 18(A1) shows a cross-sectional view of a transistor 430, which is a type of top-gate transistor. The transistor 430 has a semiconductor layer 242 on a substrate 271 via an insulating layer 272, and has an electrode 244a in contact with a part of the semiconductor layer 242, and an electrode 244b in contact with a part of the semiconductor layer 242 on the semiconductor layer 242 and the insulating layer 272. The transistor 430 has an insulating layer 226 on the semiconductor layer 242, the electrode 244a, and the electrode 244b, and has an electrode 246 on the insulating layer 226. Since the electrode 246 and the electrode 244a, and the electrode 246 and the electrode 244b do not overlap, the parasitic capacitance generated between the electrode 246 and the electrode 244a, and the parasitic capacitance generated between the electrode 246 and the electrode 244b can be reduced.

[0125] After forming the electrode 246, by using the electrode 246 as a mask to introduce impurities 255 into the semiconductor layer 242, a self-aligned impurity region can be formed in the semiconductor layer 242 (see Fig. 18(A3)). According to one aspect of the present invention, a transistor with good electrical characteristics can be realized.

[0126] Note that the introduction of the impurities 255 can be performed using an ion implantation device, an ion doping device, or a plasma processing device.

[0126] As the impurities 255, for example, at least one type of element among Group 13 elements or Group 15 elements can be used. When an oxide semiconductor is used for the semiconductor layer 242, at least one type of element among noble gases, hydrogen, and nitrogen can also be used as the impurities 255.

[0127]

[0128]

[0128]

[0128] The transistor 431 shown in FIG. 18(A2) is different from the transistor 430 in that it has the electrode 223 and the insulating layer 227. The transistor 431 has the electrode 223 formed on the insulating layer 272 and has the insulating layer 227 formed on the electrode 223. The electrode 223 can function as a back gate. Therefore, the insulating layer 227 can function as a gate insulating layer. The insulating layer 227 can be formed by the same material and method as the insulating layer 226.

[0129] Similar to the transistor 411, the transistor 431 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 431 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be realized.

[0130] The transistor 440 illustrated in FIG. 18(B1) is one of the top-gate type transistors. The transistor 440 is different from the transistor 430 in that the semiconductor layer 242 is formed after forming the electrodes 244a and 244b. Also, the transistor 441 illustrated in FIG. 18(B2) is different from the transistor 440 in that it has the electrode 223 and the insulating layer 227. In the transistor 440 and the transistor 441, a part of the semiconductor layer 242 is formed on the electrode 244a, and another part of the semiconductor layer 242 is formed on the electrode 244b.

[0131] Similar to the transistor 411, the transistor 441 is a transistor having a large on-current with respect to the occupied area.​​​​​​​​​​​​​​ It is a transistor having. That is, for the required on-current, the occupation area of transistor 4 41 can be reduced. According to one aspect of the present invention, the occupation area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device with high integration can be realized.

[0132] The transistor 442 illustrated in FIG. 19(A1) is one of the top-gate type transistors . The transistor 442 has an electrode 244a and an electrode 244b on the insulating layer 229 . The electrode 244a and the electrode 244b are electrically connected to the semiconductor layer 242 at the openings formed in the insulating layer 228 and the insulating layer 229.

[0133] Also, a part of the insulating layer 226 that does not overlap with the electrode 246 is removed. Also, a part of the insulating layer 226 that the transistor 442 has extends beyond the end of the electrode 246.

[0134] By introducing the impurity 255 into the semiconductor layer 242 using the electrode 246 and the insulating layer 226 as a mask, an impurity region can be formed self-alignedly in the semiconductor layer 242 (see FIG. 19(A3)).

[0135] At this time, the impurity 255 is not introduced into the region of the semiconductor layer 242 that overlaps with the electrode 246, and the impurity 255 is introduced into the region that does not overlap with the electrode 246. Also, the impurity concentration in the region of the semiconductor layer 242 where the impurity 255 is introduced through the insulating layer 226 is lower than that in the region where the impurity 255 is introduced without passing through the insulating layer 226. Therefore, an LDD (Lightly Doped Drain) region is formed in the region adjacent to the electrode 246 in the semiconductor layer 242. ​

[0136] The transistor 443 shown in FIG. 19(A2) has an electrode 223 below the semiconductor layer 242, which is different from the transistor 442. Also, the electrode 223 overlaps the semiconductor layer 242 via the insulating layer 272. The electrode 223 can function as a back gate electrode. Also, as in the transistor 444 shown in FIG. 19(B1) and the transistor 445 shown in FIG. 19(B2), all regions that do not overlap the electrode 246 of the insulating layer 226 may be removed. Also, as in the transistor 446 shown in FIG. 19(C1) and the transistor 447 shown in FIG. 19(C2), regions other than the openings of the insulating layer 226 may be left without being removed.

[0137] Also, as in the transistor 444 to the transistor 447, after forming the electrode 246, impurities 255 can be introduced into the semiconductor layer 242 using the electrode 246 as a mask, thereby self-alignedly forming impurity regions in the semiconductor layer 242.

[0138]

[0139] 〔s-channel type transistor〕 FIG. 20 shows an example of a transistor structure using an oxide semiconductor as the semiconductor layer 242. FIG. 20(A) is a top view of the transistor 451. FIG. 20(B) is a cross-sectional view (cross-sectional view in the channel length direction) of the portion L1 - L2 indicated by the dashed line in FIG. 20(A). FIG. 20(C) is a cross-sectional view (cross-sectional view in the channel width direction) of the portion W1 - W2 indicated by the dashed line in FIG. 20(A).

[0140]

[0140] The transistor 451 includes a semiconductor layer 242, an insulating layer 226, an insulating layer 272, an insulating layer 282, an insulating It has an insulating layer 274, electrodes 224, 243, 244a, and 244b. The electrode 243 can function as a gate. The electrode 224 can function as a back gate. The insulating layers 226, 272, 282, and 274 can function as gate insulating layers. The electrode 244a can function as one of a source electrode or a drain electrode. The electrode 244b can function as the other of the source electrode or the drain electrode.

[0141] An insulating layer 275 is provided on a substrate 271, and the electrode 224 and the insulating layer 27 3 are provided on the insulating layer 275. Also, the insulating layer 274 is provided on the electrode 224 and the insulating layer 273. Also, the insulating layer 282 is provided on the insulating layer 274, and the insulating layer 27 2 is provided on the insulating layer 282.

[0142] A semiconductor layer 242a is provided on a convex portion formed in the insulating layer 272, and a semiconductor layer 242b is provided on the semiconductor layer 242a. Also, the electrode 244a and the electrode 244b are provided on the semiconductor layer 242b. The region of the semiconductor layer 242b that overlaps with the electrode 244a can function as one of the source or the drain of the transistor 451. The region of the semiconductor layer 242 b that overlaps with the electrode 244b can function as the other of the source or the drain of the transistor 451. b that overlaps with the electrode 244b can function as the other of the source or the drain of the transistor 451. can function as the other of the source or the drain of the transistor 451.

[0143] Also, a semiconductor layer 242c is provided in contact with a part of the semiconductor layer 242b. Also, the insulating layer 226 is provided on the semiconductor layer 242c, and the electrode 243 is provided on the insulating layer 226. The transistor 451, in the portion W1 - W2, has the upper surface and side surfaces of the semiconductor layer 242b, is provided.

[0144] the upper surface and side surfaces of the semiconductor layer 242b, and has a structure in which the side surface of the semiconductor layer 242a is covered with the semiconductor layer 242c. Also, by providing the semiconductor layer 242b above the convex portion provided in the insulating layer 272, the side surface of the semiconductor layer 242b can be covered with the electrode 243. That is, the transistor 451 has a structure that can electrically surround the semiconductor layer 242b by the electric field of the electrode 243. In this way, a structure of a transistor that electrically surrounds a semiconductor layer in which a channel is formed by the electric field of a conductive film is called a surrounded channel (s-channel) structure . Also, a transistor having an s-channel structure is also referred to as an "s-channel type transistor" or an "s-channel transistor". In the s-channel structure, a channel can be formed in the entire bulk of the semiconductor layer 242b. In the s-channel structure, the drain current of the transistor can be increased

[0145] , and a larger on-current can be obtained. Also, the entire region of the channel formation region formed in the semiconductor layer 242b can be depleted by the electric field of the electrode 243 . Therefore, in the s-channel structure, the off-current of the transistor can be further reduced . . .

[0146] Note that by increasing the convex portion of the insulating layer 272 and reducing the channel width, the effect of increasing the on-current and the effect of reducing the off-current due to the s-cha nnel structure can be enhanced more effectively. Also, the exposed semiconductor layer 242a may be removed during the processing of the semiconductor layer 242b . In this case, the side surfaces of the semiconductor layer 242a and the semiconductor layer 242b may be aligned. .

[0147] An insulating layer 228 is provided on the transistor 451, and an insulating layer 229 is provided on the insulating layer 228. An electrode 225a, an electrode 225b, and an electrode 2 25c are provided on the insulating layer 229. The electrode 225a is provided in an opening formed in the insulating layer 229 and the insulating layer 228, and is electrically connected to the electrode 244a through a contact plug. The electrode 225b is provided in an opening formed in the insulating layer 229 and the insulating layer 228, and is electrically connected to the electrode 244b through a contact plug. The electrode 225c is provided in an opening formed in the insulating layer 229 and the insulating layer 228, and is electrically connected to the electrode 244c through a contact plug. Note that by forming the insulating layer 282 with hafnium oxide, aluminum oxide, tantalum oxide, aluminum silicate, etc., the insulating layer 282 can function as a charge trapping layer. By injecting electrons into the insulating layer 282, it is possible to vary the threshold voltage of the transistor. The injection of electrons into the insulating layer 282 can be achieved, for example, by utilizing the tunnel effect. By applying a positive voltage to the electrode 224, tunnel electrons can be injected into the insulating layer 282.

[0148] <Energy Band Structure (1) of Semiconductor Layer 242> Here, the functions and effects of the semiconductor layer 242 formed by laminating the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c will be described with reference to the energy band structure diagram shown in FIG. 28(A). FIG. 28(A) shows the energy band structure of the portion indicated by the dashed line D1 - D2 in FIG. 20(B). That is, FIG. 28(A) shows the transistor Note that by forming the insulating layer 282 with hafnium oxide, aluminum oxide, tantalum oxide, aluminum silicate, etc., the insulating layer 282 can function as a charge trapping layer. By injecting electrons into the insulating layer 282, it is possible to vary the threshold voltage of the transistor. The injection of electrons into the insulating layer 282 can be achieved, for example, by utilizing the tunnel effect. By applying a positive voltage to the electrode 224, tunnel electrons can be injected into the insulating layer 282. Here, the functions and effects of the semiconductor layer 242 formed by laminating the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c will be described with reference to the energy band structure diagram shown in FIG. 28(A). FIG. 28(A) shows the energy band structure of the portion indicated by the dashed line D1 - D2 in FIG. 20(B). That is, FIG. 28(A) shows the transistor Note that by forming the insulating layer 282 with hafnium oxide, aluminum oxide, tantalum oxide, aluminum silicate, etc., the insulating layer 282 can function as a charge trapping layer. By injecting electrons into the insulating layer 282, it is possible to vary the threshold voltage of the transistor.

[0149] <Energy Band Structure (1) of Semiconductor Layer 242> Here, the functions and effects of the semiconductor layer 242 formed by laminating the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c will be described with reference to the energy band structure diagram shown in FIG. 28(A). FIG. 28(A) shows the energy band structure of the portion indicated by the dashed line D1 - D2 in FIG. 20(B). That is, FIG. 28(A) shows the transistor formed by laminating the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c. FIG. 28(A) shows the energy band structure of the portion indicated by the dashed line D1 - D2 in FIG. 20(B). That is, FIG. 28(A) shows the transistor formed by laminating the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c. 4 shows the energy band structure of the channel formation region of the transistor 451.

[0150] In Figure 28(A), Ec382, Ec383a, Ec383b, Ec383c, and Ec386 are the insulating layer 272, the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c, respectively. , indicates the energy of the conduction band minimum of the insulating layer 226.

[0151] Here, the electron affinity is the energy difference between the vacuum level and the top of the valence band (the "ionization potential"). The band gap is calculated by subtracting the band gap from the total energy of the material. Using a spectroscopic ellipsometer (HORIBA JOBIN YVON UT-300) The energy difference between the vacuum level and the top of the valence band can be measured by ultraviolet photoelectron spectroscopy ( UPS:Ultraviolet Photoelectron Spectrosco This can be measured using a PHI VersaProbe device.

[0152] The In-Ga target with an atomic ratio of In:Ga:Zn=1:3:2 was used. The band gap of a-Zn oxide is about 3.5 eV and the electron affinity is about 4.5 eV. In addition, the In-Ga was formed using a target with an atomic ratio of In:Ga:Zn=1:3:4. The band gap of -Zn oxide is about 3.4 eV and the electron affinity is about 4.5 eV. The In-Ga- was formed using a target with an atomic ratio of In:Ga:Zn=1:3:6. The band gap of Zn oxide is about 3.3 eV and the electron affinity is about 4.5 eV. In-Ga-Z was formed using a target with an atomic ratio of In:Ga:Zn=1:6:2. The band gap of n-oxide is about 3.9 eV and the electron affinity is about 4.3 eV. In-Ga-Zn formed using a target with an atomic ratio of In:Ga:Zn = 1:6:8 The band gap of the oxide is approximately 3.5 eV and the electron affinity is approximately 4.4 eV. Also, the atomic In-Ga-Zn formed using a target with an atomic ratio of In:Ga:Zn = 1:6:10 The band gap of the oxide is approximately 3.5 eV and the electron affinity is approximately 4.5 eV. Also, the atomic In-Ga-Zn oxide formed using a target with an atomic ratio of In:Ga:Zn = 1:1:1 has a band gap of approximately 3.2 eV and an electron affinity of approximately 4.7 eV. Also, the atomic number In-Ga-Zn oxide formed using a target with an atomic ratio of In:Ga:Zn = 3:1:2 has a band gap of approximately 2.8 eV and an electron affinity of approximately 5.0 eV.

[0153] Since the insulating layer 272 and the insulating layer 226 are insulators, Ec382 and Ec386 are closer to the vacuum level than Ec38 3a, Ec383b, and Ec383c (with a smaller electron affinity). )

[0154] Also, Ec383a is closer to the vacuum level than Ec383b. Specifically, Ec383a is closer to the vacuum level than Ec383b by 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0 .7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less. This is preferable.

[0155] Also, Ec383c is closer to the vacuum level than Ec383b. Specifically, Ec383c is closer to the vacuum level than Ec383b by 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0 .7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less. This is preferable.

[0156] Here, between the semiconductor layer 242a and the semiconductor layer 242b, there may be a mixed region between the semiconductor layer 242a and the semiconductor layer 242b. Also, between the semiconductor layer 242b and the semiconductor layer 242c there may be a mixed region between the semiconductor layer 242b and the semiconductor layer 242c. The mixed region has a low interface state density. Therefore, the stack of the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c has a band structure in which energy changes continuously (also called a continuous junction) in the vicinity of each interface.

[0157] At this time, electrons mainly move in the semiconductor layer 242b rather than in the semiconductor layer 242a and the semiconductor layer 242c. Therefore, by reducing the interface state density at the interface between the semiconductor layer 242a and the semiconductor layer 242b and the interface state density at the interface between the semiconductor layer 242b and the semiconductor layer 242c, the movement of electrons in the semiconductor layer 242b is less inhibited, and the on-current of the transistor 451 can be increased.

[0158] Also, although trap levels 390 caused by impurities and defects may be formed near the interfaces between the semiconductor layer 242a and the insulating layer 272 and between the semiconductor layer 242c and the insulating layer 226, the presence of the semiconductor layer 242a and the semiconductor layer 242c can keep the semiconductor layer 242b away from the trap levels.

[0159] When the transistor 451 has an s-channel structure, in the portion W1 - W2, a channel is formed throughout the semiconductor layer 242b. Therefore, the thicker the semiconductor layer 242b, the larger the channel region. That is, the thicker the semiconductor layer 242b, the greater the ​​​​​​​​​​The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used.

[0160] In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm.

[0161] In addition, in order to improve reliability, it is preferable that the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, a semiconductor layer 242a having a thickness in a region of 10 nm or more, preferably 20 nm or more, more preferably 40 nm or more, and still more preferably 60 nm or more may be used. The on-current of the transistor 451 can be increased. For example, a semiconductor layer 242b having a thickness in a region of 10 nm or more, preferably 40 nm or more, more preferably 60 nm or more, and still more preferably 100 nm or more may be used. However, since the productivity of the semiconductor device having the transistor 451 may decrease, for example, a semiconductor layer 242b having a thickness in a region of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less may be used. Note that as the channel formation region is reduced, the electrical characteristics of the transistor may be improved when the semiconductor layer 242b is thinner. Therefore, the thickness of the semiconductor layer 242b may be less than 10 nm. Also, in order to increase the on-current of the transistor 451, it is most preferable that the thickness of the semiconductor layer 242c is small. For example, a semiconductor layer 242c having a thickness in a region of less than 10 nm, preferably 5 nm or less, and more preferably 3 nm or less may be used. On the other hand, the semiconductor layer 242c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the adjacent insulator from entering the semiconductor layer 242b in which the channel is formed. Therefore, it is preferable that the semiconductor layer 242c has a certain thickness. For example, a semiconductor layer 242c having a thickness in a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. By increasing the thickness of the semiconductor layer 242a, the adjacent insulator and the semiconductor layer 242a The distance from the interface with the semiconductor layer 242b where the channel is formed can be increased. However, the productivity of a semiconductor device having the transistor 451 may decrease. For example, the thickness is 200 nm or less, preferably 120 nm or less, and more preferably 80 nm or less. The semiconductor layer 242a may have the above-mentioned region.

[0162] Note that silicon in an oxide semiconductor can become a carrier trap or a carrier generation source. Therefore, the lower the silicon concentration of the semiconductor layer 242b, the more preferable it is. Between the layer 242b and the semiconductor layer 242a, for example, secondary ion mass spectrometry (SIMS: 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than, more Preferably 2 x 10 18 atoms / cm 3 The silicon concentration is less than 100%. In addition, between the semiconductor layer 242b and the semiconductor layer 242c, 1×10 19 a toms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 2×10 18 atoms / cm 3 The silicon concentration is less than 100 nm.

[0163] In order to reduce the hydrogen concentration in the semiconductor layer 242b, the semiconductor layer 242a and the semiconductor layer It is preferable to reduce the hydrogen concentration in the semiconductor layer 242a and the semiconductor layer 242c. , 2×10 in SIMS 20 atoms / cm 3 Less than or equal to 5×10 19 a toms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below are some more Preferably 5 x 10 18 atoms / cm 3 The hydrogen concentration is in the range of 100 to 2000 m / s. In order to reduce the nitrogen concentration in the conductor layer 242b, the semiconductor layer 242a and the semiconductor layer 242c are It is preferable to reduce the nitrogen concentration in the semiconductor layer 242a and the semiconductor layer 242c. In S, 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 More preferably, 5×10 17 atoms / cm 3 The nitrogen concentration ranges as follows:

[0164] Note that when copper is mixed into an oxide semiconductor, electron traps may be generated. The flip-flop may cause the threshold voltage of the transistor to shift in the positive direction. The copper concentration on the surface or inside of the semiconductor layer 242b is preferably as low as possible. Layer 242b has a copper concentration of 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 It is preferred that the region stomach.

[0165] The above-mentioned three-layer structure is an example. For example, Alternatively, the semiconductor layer 242a may be formed on the upper or lower side, or the semiconductor layer 242c, a semiconductor layer 242a, a semiconductor layer 242b, and a semiconductor layer 242c Alternatively, the semiconductor may have a four-layer structure having any one of the semiconductors exemplified as above. Above layer 242a, below semiconductor layer 242a, above semiconductor layer 242c, below semiconductor layer 242c The semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are It may be an n-layer structure (n is an integer of 5 or more) having any one of the semiconductors exemplified above. do not have.

[0166] In particular, the transistor 451 illustrated in this embodiment has a semiconductor The upper surface and side surfaces of the layer 242b are in contact with the semiconductor layer 242c, and the lower surface of the semiconductor layer 242b is in contact with the semiconductor layer In this manner, the semiconductor layer 242b is formed in contact with the semiconductor layer 242a. By covering the semiconductor layer 242c, the influence of the trap level can be further reduced. This can be done.

[0167] The band gaps of the semiconductor layer 242a and the semiconductor layer 242c are It is preferable that the band gap is wider than that of b.

[0168] According to one embodiment of the present invention, a transistor with little variation in electrical characteristics can be provided. Therefore, a semiconductor device with little variation in electrical characteristics can be realized. According to one embodiment of the present invention, a highly reliable transistor can be realized. A semiconductor device with excellent properties can be realized.

[0169] In addition, since the band gap of the oxide semiconductor is 2 eV or more, a transistor using the oxide semiconductor for the semiconductor layer where the channel is formed can make the off-current extremely small. Specifically, when the voltage between the source and the drain is 3.5 V and at room temperature (25 °C), the off-current per 1-μm channel width can be less than 1×10 A, less than 1×10 A, or -20 less than 1×10 -22 A. That is, the on-off ratio can be 20 digits or more and 150 digits or less. Also, the OS transistor has a high breakdown voltage between the source and the drain. By using the OS transistor, a semiconductor device with a large output voltage and high breakdown voltage can be provided. -24

[0170] According to one aspect of the present invention, a transistor with low power consumption can be realized. Therefore, a semiconductor device with low power consumption can be realized.

[0171] Also, depending on the purpose, the electrode 224 that can function as a back gate may not be provided. FIG. 21(A) is a top view of the transistor 451a. FIG. 21(B) is a cross-sectional view of the portion L1-L2 indicated by the dashed-dotted line in FIG. 21(A). FIG. 21(C) is a cross-sectional view of the portion W1-W2 indicated by the dashed-dotted line in FIG. 21(A). The transistor 451a has a configuration in which the electrode 224, the insulating layer 273, the insulating layer 274, and the insulating layer 282 are omitted from the transistor 451. By not providing these electrodes and insulating layers, the productivity of the transistor can be increased. Therefore, the productivity of the semiconductor device can be increased. ​​​​​​​​​​

[0172] Another example of an s-channel type transistor is shown in FIG. 22. FIG. 22(A) is a top view of the transistor 452. FIGS. 22(B) and 22(C) are cross-sectional views of the portions L1-L2 and W1-W2 indicated by a dashed line in FIG. 22(A).

[0173] The transistor 452 has a configuration similar to that of the transistor 451, but is different in that the electrodes 244a and 244b are in contact with the side surfaces of the semiconductor layers 242a and 242b. Further, as the insulating layer 228 covering the transistor 452, an insulating layer having a flat surface similar to that of the transistor 451 may be used. Also, electrodes 225a, 225b, and 225c may be provided on the insulating layer 229.

[0174] Another example of an s-channel type transistor is shown in FIG. 23. FIG. 23(A) is a top view of the transistor 453. FIG. 23(B) is a cross-sectional view of the portions L1-L2 and W1-W2 indicated by a dashed line in FIG. 23(A). The transistor 453 is also similar to the transistor 451 in that the semiconductor layers 242a and 242b are provided on the convex portions provided on the insulating layer 272. Also, the electrodes 244a and 244b are provided on the semiconductor layer 242b. The region overlapping with the electrode 244a of the semiconductor layer 242b can function as one of the source or drain of the transistor 453. The region overlapping with the electrode 244b of the semiconductor layer 242b can function as the other of the source or drain of the transistor 453. Therefore, the region 269 of the semiconductor layer 242b sandwiched between the electrodes 244a and 244b can function as a channel formation region.

[0175] ​​​​​​​​​​​​​​​ Transistor 453 has an opening provided in a region overlapping region 269 by removing a part of insulating layer 228, and semiconductor layer 242c is provided along the side and bottom surfaces of the opening. Also, insulating layer 226 is provided in the opening, via semiconductor layer 242c and along the side and bottom surfaces of the opening. Also, electrode 243 is provided in the opening, via semiconductor layer 242c and insulating layer 226 and along the side and bottom surfaces of the opening. Note that the opening is provided larger than semiconductor layer 242a and semiconductor layer 242b in the cross-section in the channel width direction. Therefore, in region 269, the side surfaces of semiconductor layer 242a and semiconductor layer 242b are covered by semiconductor layer 242c.

[0176]

[0177] Also, insulating layer 229 is provided on insulating layer 228, and insulating layer 277 is provided on insulating layer 229. Also, electrodes 225a, 225b, and 225c are provided on insulating layer 277. Electrode 225a is electrically connected to electrode 244a via a contact plug in an opening formed by removing a part of insulating layer 277, insulating layer 229, and insulating layer 228. Also, electrode 225b is electrically connected to electrode 244b via a contact plug in an opening formed by removing a part of insulating layer 277, insulating layer 229, and insulating layer 228. Also, electrode 225c is electrically connected to electrode 243 via a contact plug in an opening formed by removing a part of insulating layer 277 and insulating layer 229.

[0178] Also, depending on the purpose, electrode 224 that can function as a back gate may not be provided. ​​​​​​​​​FIG. 24A is a top view of the transistor 453a. 1 is a cross-sectional view of a portion L1-L2 and a portion W1-W2 indicated by a dashed line in FIG. 453a is a transistor 453 from the electrode 224, the insulating layer 274, and the insulating layer 282 By not providing these electrodes and insulating layers, the productivity of the transistor is improved. Therefore, the productivity of the semiconductor device can be improved.

[0179] Another example of an s-channel transistor is shown in FIG. FIG. 25(B) is a top view of the portion L1 indicated by the dashed line in FIG. 25(A). FIG. 25(C) is a cross-sectional view of the portion W1-W2 shown by the dashed line in FIG. FIG. 2 is a cross-sectional view of FIG.

[0180] The transistor 454 is a type of bottom-gate transistor having a back gate electrode. In the transistor 454, the electrode 243 is formed over the insulating layer 274. An insulating layer 226 is provided to cover the electrode 243. The semiconductor layer 242 included in the transistor 454 is a semiconductor It has a laminate of a conductor layer 242a and a semiconductor layer 242b.

[0181] In addition, an electrode 244a and an electrode 244b are provided on the insulating layer 226 in contact with a part of the semiconductor layer 242. In addition, an electrode 244a and an electrode 244b are formed in contact with a part of the semiconductor layer 242. An insulating layer 228 is formed on 44b. An insulating layer 229 is formed on the insulating layer 228. An electrode 224 is formed on the insulating layer 229 in a region overlapping with the semiconductor layer 242. It is being done.

[0182] The electrode 224 provided on the insulating layer 229 is electrically connected to the electrode 243 at the openings 247a and 247b provided in the insulating layer 229, the insulating layer 228, and the insulating layer 226. Therefore, the same potential is supplied to the electrode 224 and the electrode 243. Also, either one of the openings 247a and 247b may not be provided. Further, neither of the openings 247 a and 247b needs to be provided. When neither of the openings 247a and 247b is provided, different potentials can be supplied to the electrode 224 and the electrode 243.

[0183] <Energy band structure (2) of the semiconductor layer 242> FIG. 28(B) is an energy band structure diagram of the site indicated by the dashed-dotted line D3 - D4 in FIG. 25(B). FIG. 28(B) shows the energy band structure of the channel formation region of the transistor 454.

[0184] In FIG. 28(B), Ec384 indicates the energy at the lower end of the conduction band of the insulating layer 228. By forming the semiconductor layer 242 into two layers, namely the semiconductor layer 242a and the semiconductor layer 242b, the productivity of the transistor can be increased. Note that, since the semiconductor layer 242c is not provided, it is more susceptible to the influence of the trap level 390, but a higher field-effect mobility can be realized compared to the case where the semiconductor layer 242 has a single-layer structure.

[0185] Also, depending on the purpose, the electrode 224 that can function as a back gate may not be provided. FIG. 26(A) is a top view of the transistor 454a. FIGS. 26(B) and 26(C) are cross-sectional views of the sites L1 - L2 and W1 - W2 indicated by the dashed-dotted line in FIG. 26(A). ​​​​​​Yes. The transistor 454a has a configuration in which the electrode 224, the opening 247a, and the opening 247b are omitted from the transistor 454. By not providing these electrodes and openings, the productivity of the transistor can be increased. Therefore, the productivity of the semiconductor device can be increased.

[0186] Fig. 27 shows an example of a transistor having an s-channel structure. The transistor 448 illustrated in Fig. 27 has substantially the same configuration as the transistor 447 described above. The transistor 448 is a type of top-gate transistor having a back gate. Fig. 27(A) is a top view of the transistor 448. Fig. 27(B) is a cross-sectional view of the portion L1-L2 indicated by the dashed line in Fig. 27(A). Fig. 27(C) is a cross-sectional view of the portion W1-W2 indicated by the dashed line in Fig. 27(A).

[0187] Fig. 27 shows a configuration example when an inorganic semiconductor layer such as silicon is used for the semiconductor layer 242 constituting the transistor 448. In Fig. 27, an electrode 224 is provided on a substrate 271, and an insulating layer 272 is provided on the electrode 224. Further, a semiconductor layer 242 is formed on the convex portion of the insulating layer 272.

[0188] The semiconductor layer 242 has a semiconductor layer 242i, two semiconductor layers 242t, and two semiconductor layers 2 42u. The semiconductor layer 242i is disposed between the two semiconductor layers 242t. Further, the semiconductor layer 242i and the two semiconductor layers 242t are disposed between the two semiconductor layers 242u. Also, an electrode 243 is provided in a region overlapping the semiconductor layer 242i.

[0189] ​​​​When the transistor 448 is in the on state, a channel is formed in the semiconductor layer 242i. Therefore , the semiconductor layer 242i functions as a channel formation region. Also, the semiconductor layer 242t functions as a lightly doped impurity region (LDD). Further, the semiconductor layer 242u functions as a heavily doped impurity region. Note that, of the two semiconductor layers 242t, one or both of the semiconductor layers 242t may not be provided. Also, of the two semiconductor layers 242u, one semiconductor layer 242u functions as a source region and the other semiconductor layer 242u functions as a drain region.

[0190] The electrode 244a provided on the insulating layer 229 is electrically connected to one of the semiconductor layers 242u at the opening 247c provided in the insulating layer 226, the insulating layer 228, and the insulating layer 229. Also, the electrode 244b provided on the insulating layer 229 is electrically connected to the other of the semiconductor layers 242u at the opening 247d provided in the insulating layer 226, the insulating layer 228, and the insulating layer 229.

[0191] The electrode 243 provided on the insulating layer 226 is electrically connected to the electrode 224 at the openings 247a and 247b provided in the insulating layer 226 and the insulating layer 272. Therefore, the same potential is supplied to the electrode 243 and the electrode 224. Also, either one of the openings 247a and 247b may not be provided. Further, both of the openings 247a and 247b may not be provided. In the case where both of the openings 247a and 247b are not provided, different potentials can be supplied to the electrode 243 and the electrode 224.

[0192] <Regarding the film formation method> ​The conductive layers, insulating layers, and semiconductor layers such as electrodes shown in this specification can be formed using the CVD (Chemical Vapor Deposition) method, evaporation method, sputtering method, or the like. Generally, the CVD method can be classified into a plasma CVD (PECVD: Plasma Enhanced CVD) method that utilizes plasma, a thermal CVD (TCVD: Thermal CVD) method that utilizes heat, and the like. There is also an atmospheric pressure CVD (APCVD: Atmospheric Pressure CVD) method for film formation under atmospheric pressure . Furthermore, depending on the raw material gas used, it can be classified into a metal CVD (MCVD: Metal CVD) method, a metal organic CVD (MOCVD: Metal Organic CVD) method, and the like . In general, the evaporation method can be classified into a resistance heating evaporation method, an electron beam evaporation method, an MBE (Molecular Beam Epitaxy) method, a PLD (Pulsed Laser Deposit

[0193] ion) method, an IAD (Ion beam Assisted Deposition) method , an ALD (Atomic Layer Deposition) method, and the like . The plasma CVD method can obtain a high-quality film at a relatively low temperature. Also, when using a film formation method that does not use plasma during film formation, such as the MOCVD method or the evaporation method, damage occurs to the surface to be formed

[0194] , and a film with few defects can be obtained . In general, the sputtering method can be classified into a DC sputtering method, a magnetron sputtering

[0195] ing method, an RF sputtering method, an ion beam sputtering method, an ECR (Electro magnetic n Cyclotron Resonance) sputtering method, facing target sputtering method, etc. It can be classified into methods such as the facing target sputtering method.

[0196] In the facing target sputtering method, since the plasma is confined between the targets, the plasma damage to the substrate can be reduced. Also, depending on the inclination of the target, the incident angle of the sputtering particles on the substrate can be made shallow, so the step coverage can be increased.

[0197] Note that the CVD method and the ALD method are film formation methods in which a film is formed by a reaction on the surface of the object to be processed, different from the film formation method in which particles emitted from a target or the like are deposited. Therefore, it is a film formation method that is less affected by the shape of the object to be processed and has good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity, so it is suitable for covering the surface of an opening with a high aspect ratio. However, since the ALD method has a relatively slow film formation rate, it may be preferable to use it in combination with other film formation methods such as the CVD method with a high film formation rate. The CVD method and the ALD method can control the composition of the obtained film by the flow rate ratio of the source gases. For example, in the CVD method and the ALD method, a film with an arbitrary composition can be formed by the flow rate ratio of the source gases. Also, for example, in the CVD method and the ALD method, by changing the flow rate ratio of the source gases while forming a film, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, compared with the case of forming a film using a plurality of film formation chambers, the time required for film formation is shortened by the time required for transfer and pressure adjustment.

[0198] ​​​​​​​​This is possible. Therefore, the productivity of transistors and semiconductor devices can be increased. There are cases.

[0199] <Regarding the constituent materials such as transistors> 〔Substrate〕 There are no major restrictions on the material used as the substrate 271. Depending on the purpose, it may be determined in consideration of the presence or absence of translucency and heat resistance sufficient to withstand heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. Also, as the substrate 271, a semiconductor substrate, a flexible substrate (flexible substrate), a laminated film, a base film, etc. may be used. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. Also, as the substrate 271, a semiconductor substrate, a flexible substrate (flexible substrate), a laminated film, a base film, etc. may be used. (Flexible substrate), laminated film, base film, etc. may be used.

[0200] Examples of semiconductor substrates include single semiconductor substrates made of materials such as silicon or germanium, or compound semiconductor substrates made of materials such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Also, Examples of semiconductor substrates include single semiconductor substrates made of materials such as silicon or germanium, or compound semiconductor substrates made of materials such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Also, Examples of semiconductor substrates include single semiconductor substrates made of materials such as silicon or germanium, or compound semiconductor substrates made of materials such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Also, The semiconductor substrate may be a single crystal semiconductor or a polycrystalline semiconductor.

[0201] Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc. Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc. Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc. Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc. Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc. Examples of materials for flexible substrates, laminated films, base films, etc. include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polytetrafluoroethylene (PTFE), polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic resin, etc.

[0202] The flexible substrate used for the substrate 271 is preferably one with a lower coefficient of linear expansion, as it is less prone to deformation due to environmental factors. The flexible substrate used for the substrate 271, for example, has a coefficient of linear expansion of 1×10 -3 / K or less, 5 ×10 -5 / K or less, or 1×10 -5 / K or less. A material with such a property can be used. In particular, aramid is suitable as a flexible substrate because it has a low coefficient of linear expansion.

[0203] 〔Insulating Layer〕 The insulating layers 272, 273, 274, 275, 282, 22 8, 226, 229, and 277 are made of materials selected from aluminum nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, magnesium oxide, silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc., and are used either as a single layer or laminated. Also, among oxide materials, nitride materials, oxynitride materials, and nitride oxide materials, a material obtained by mixing a plurality of materials may be used. In this specification, aluminum oxynitride refers to a compound with a higher nitrogen content than oxygen.

[0204] Also, aluminum nitride oxide refers to a compound with a higher oxygen content than nitrogen. The content of each element can be measured, for example, using the Rutherford backscattering spectrometry (RBS) or the like.

[0205] In particular, the insulating layer 275 and the insulating layer 229 are preferably formed using an insulating material through which impurities hardly permeate. For example, an insulating material containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, al uminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a laminated form. For example, as an insulating material through which impurities hardly permeate, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, silicon nitride, etc. can be mentioned. Also, as the insulating layer 273 or the insulating layer 229, highly insulating indium tin zinc oxide (I n-Sn-Zn oxide), etc. may be used.

[0206] By using an insulating material through which impurities hardly permeate for the insulating layer 275, diffusion of impurities from the substrate 271 side can be suppressed, and the reliability of the transistor can be improved. By using an insulating material through which impurities hardly permeate for the insulating layer 229, diffusion of impurities from the insulating layer 229 side can be suppressed and the reliability of the transistor can be improved.

[0207] As the insulating layer 272, the insulating layer 273, the insulating layer 274, the insulating layer 282, the insulating layer 228, the insulating layer 22 6, the insulating layer 229, and the insulating layer 277, insulating layers formed of these materials may be laminated and used. The method for forming the insulating layer 272, the insulating layer 273, the insulating layer 274, the insulating layer 282, the insulating layer 228, the insulating layer 226, the insulating layer 229, and the insulating layer 277 is not particularly limited Instead, various formation methods such as sputtering method, CVD method, MBE method, PLD method, ALD method, spin coating method can be used.

[0208] For example, when forming aluminum oxide using the thermal CVD method, a raw material gas obtained by vaporizing a liquid (such as TMA) containing a solvent and an aluminum precursor compound and two types of gases, H2O as an oxidizing agent, are used. The chemical formula of trimethylaluminum is Al(CH3)3. In addition, other material liquids include tris(dimethylamide)aluminum, triisobutylaluminum, aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate), etc.

[0209] When an oxide semiconductor is used as the semiconductor layer 242, it is preferable to reduce the hydrogen concentration in the insulating layer in order to prevent an increase in the hydrogen concentration in the semiconductor layer 242. In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer 242. Specifically, the hydrogen concentration in the insulating layer is 2×10 atoms / cm or less in SIMS, preferably 5×10 atoms / cm 20 3 or less, more preferably 1×10 19 atoms / cm 3 or less, still more preferably 5×10 19 atoms / cm 3 or less, and even more preferably 5×10 18 atoms / cm 3 or less. Also, in order to prevent an increase in the nitrogen concentration in the semiconductor layer 242, it is preferable to reduce the nitrogen concentration in the insulating layer. In particular, it is preferable to reduce the nitrogen concentration in the insulating layer in contact with the semiconductor layer 242. Specifically, the nitrogen concentration in the insulating layer is 5×10 atoms / cm or less in SIMS, 19 3 ​​​​​​Less than, preferably is 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, even more preferably 5×10 17 atoms / cm 3 or less.

[0210] Note that the concentration measured by SIMS analysis includes fluctuations of plus or minus 40%. There is.

[0211] Also, when an oxide semiconductor is used as the semiconductor layer 242, the insulating layer is preferably formed using an insulating layer from which oxygen is released by heating. In particular, the insulating layer in contact with the semiconductor layer 242 is preferably an insulating layer from which oxygen is released by heating. For example, in the temperature-programmed desorption gas analysis method (TDS: Thermal Desorption Spe ctroscopy) performed at a surface temperature of the insulating layer of 100°C or higher and 700°C or lower, preferably 100°C or higher and 500°C or lower, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 a toms / cm 18 a toms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably is 1.0×10 20 atoms / cm 3 or more. It is advisable to use an insulating layer that is In this specification and the like, oxygen released by heating is also referred to as "excess oxygen". Also, an insulating layer from which oxygen is released by heating is also referred to as an "insulating layer containing excess oxygen". released.

[0212] Also, the insulating layer containing excess oxygen can also be formed by performing a process of adding oxygen to the insulating layer. It can be carried out. The process of adding oxygen can be performed by heat treatment in an oxygen atmosphere, or using an ion implantation device, an ion doping device, or a plasma treatment device. The gas used for adding oxygen can be oxygen gas such as O2 or O2, nitrous oxide gas, or ozone 16 O2, etc. In this specification, the process of adding oxygen is also referred to as "oxygen doping 18 process". process". process".

[0213] Also, by forming an insulating layer by sputtering in an atmosphere containing oxygen, oxygen can be introduced into the layer to be formed. to be formed.

[0214] Generally, a capacitive element has a configuration in which a dielectric is sandwiched between two opposing electrodes. The thinner the thickness of the dielectric (the shorter the distance between the two opposing electrodes), and the larger the dielectric constant of the dielectric the larger the capacitance value. However, reducing the thickness of the dielectric to increase the capacitance value of the capacitive element makes it easier for a current (hereinafter also referred to as "leakage current") that flows unintentionally between the two electrodes to increase due to the tunnel effect or the like, and also makes it easier for the breakdown voltage of the capacitive element to decrease. makes it easier for a current (hereinafter also referred to as "leakage current") that flows unintentionally between the two electrodes to increase due to the tunnel effect or the like, and also makes it easier for the breakdown voltage of the capacitive element to decrease. current") to increase, and also makes it easier for the breakdown voltage of the capacitive element to decrease. to decrease.

[0215] The portion where the gate electrode, gate insulating layer, and semiconductor layer of the transistor overlap functions as a capacitive element (hereinafter also referred to as "gate capacitance"). Note that a channel is formed in the region of the semiconductor layer that overlaps the gate electrode via the gate insulating layer. That is, the gate electrode and the channel formation region function as the two electrodes of the capacitive element. Also, the gate insulating layer functions as the dielectric of the capacitive element. It is preferable that the capacitance value of the gate capacitance is larger, but if the gate insulating layer is thinned to increase the capacitance value, the increase in the leakage current and the decrease in the breakdown voltage as described above will occur. That is, the gate electrode and the channel formation region function as the two electrodes of the capacitive element. Also, the gate insulating layer functions as the dielectric of the capacitive element. It is preferable that the capacitance value of the gate capacitance is larger, but if the gate insulating layer is thinned to increase the capacitance value, the increase in the leakage current and the decrease in the breakdown voltage as described above will occur. That is, the gate electrode and the channel formation region function as the two electrodes of the capacitive element. Also, the gate insulating layer functions as the dielectric of the capacitive element. It is preferable that the capacitance value of the gate capacitance is larger, but if the gate insulating layer is thinned to increase the capacitance value, the increase in the leakage current and the decrease in the breakdown voltage as described above problems are likely to occur.

[0216] Therefore, as the dielectric, hafnium silicate (HfSi x O y (x>0, y>0)), hafnium silicate with nitrogen added (HfSi x O y N z (x>0, y>0, z>0 )), hafnium aluminate with nitrogen added (HfAl x O y N z (x>0, y>0 , z>0)), hafnium oxide, or yttrium oxide, etc., high-k materials are used , even if the dielectric is thickened, it becomes possible to sufficiently secure the capacitance value of the capacitive element.

[0217] For example, when using a high-k material with a large dielectric constant as the dielectric, even if the dielectric is thickened , a capacitance value equivalent to that in the case of using silicon oxide as the dielectric can be realized, so that the leakage current generated between the two electrodes forming the capacitive element can be reduced. Note that the dielectric may have a laminated structure of a high-k material and another insulating material.

[0218] Also, the insulating layer 228 is an insulating layer having a flat surface. As the insulating layer 228, in addition to the above insulating materials, organic materials having heat resistance such as polyimide, acrylic resin, benzocyclobutene resin, poly amide, and epoxy resin can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane resins, PSG (phosphorus glass), BPSG (borophosphosilicate glass), etc. can be used. Note that a plurality of insulating layers formed of these materials may be laminated.

[0219] The siloxane-based resin is a Si-O- formed material that is formed from a siloxane-based material. This corresponds to a resin containing Si bonds. Siloxane-based resins have organic groups (e.g., arsenic) as substituents. Alternatively, the organic group may have a fluoro group. It's fine if you're there.

[0220] The method for forming the insulating layer 228 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, etc.), printing Printing methods (screen printing, offset printing, etc.) may be used.

[0221] In addition, the sample surface may be subjected to CMP treatment. This reduces unevenness and improves the coverage of the insulating layer and conductive layer that will be formed later.

[0222] [Semiconductor Layer] The semiconductor layer 242 may be formed of a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like. Examples of the semiconductor material include silicon and germanium. Silicon germanium, silicon carbide, gallium arsenide, oxide Compound semiconductors such as nitride semiconductors and organic semiconductors can be used. .

[0223] In addition, when an organic semiconductor is used as the semiconductor layer 242, a low molecular weight organic material having an aromatic ring is used. and π-electron conjugated conductive polymers. For example, rubrene, tetracene, etc. , pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polya Cetylene, polyparaphenylenevinylene, etc. can be used.

[0224] Also, as described above, since the band gap of the oxide semiconductor is 2 eV or more, when the oxide semiconductor is used for the semiconductor layer 2 42, a transistor with an extremely small off-current can be realized. Also, the OS transistor has a high breakdown voltage between the source and the drain. Therefore, a transistor with good reliability can be provided. Also, a transistor with a large output voltage and a high breakdown voltage can be provided. Also, a semiconductor device with good reliability can be provided. Also, a semiconductor device with a large output voltage and a high breakdown voltage can be provided. In the present embodiment, the case where an oxide semiconductor is used as the semiconductor layer 242 will be described.

[0225] In the present embodiment, the case where an oxide semiconductor is used as the semiconductor layer 242 will be described. As the oxide semiconductor used for the semiconductor layer 242, for example, an oxide semiconductor containing indium (In) is preferably used. When the oxide semiconductor contains, for example, indium, the carrier mobility (electron mobility) becomes high. Also, it is preferable that the oxide semiconductor contains an element M. When the oxide semiconductor contains, for example, indium, the carrier mobility (electron mobility) becomes high. Also, it is preferable that the oxide semiconductor contains an element M.

[0226] The element M is preferably aluminum, gallium, yttrium, tin, or the like. As elements applicable to other elements M, there are boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium , tantalum, tungsten, magnesium, and the like. However, as the element M, there may be cases where a plurality of the aforementioned elements are combined. The element M is, for example, an element with a high binding energy with oxygen. The element M is, for example, an element with a high binding energy with oxygen. The element M is, for example, an element having a function of increasing the energy gap of the oxide semiconductor. Also, it is preferable that the oxide semiconductor contains zinc. When the oxide semiconductor contains zinc, it may be easier to crystallize. The element M is, for example, an element with a high binding energy with oxygen. The element M is, for example, an element having a function of increasing the energy gap of the oxide semiconductor. Also, it is preferable that the oxide semiconductor contains zinc. When the oxide semiconductor contains zinc, it may be easier to crystallize. The element M is, for example, an element with a high binding energy with oxygen. The element M is, for example, an element having a function of increasing the energy gap of the oxide semiconductor. Also, it is preferable that the oxide semiconductor contains zinc. When the oxide semiconductor contains zinc, it may be easier to crystallize. When the oxide semiconductor contains zinc, it may be easier to crystallize.

[0227] However, the oxide semiconductor used for the semiconductor layer 242 is not limited to an oxide containing indium. The oxide semiconductor may be, for example, an oxide containing zinc but not indium, such as zinc tin oxide, gallium tin oxide, or gallium oxide, an oxide containing gallium, or an oxide containing tin, such as a semiconductor.

[0228] For example, when forming an InGaZnO X (X>0) film by thermal CVD as the semiconductor layer 242, trimethylindium (In(CH3)3), trimethylgallium (Ga(CH 3)3), and dimethylzinc (Zn(CH3)2) are used. Further, it is not limited to these combinations, and triethylgallium (Ga(C2H5) 3) can be used instead of trimethylgallium, and diethylzinc (Zn(C2H5)2) can be used instead of dimethylzinc.

[0229] For example, when forming an InGaZnO X (X>0) film by ALD as the semiconductor layer 242, In(CH3)3 gas and O3 gas are sequentially and repeatedly introduced to form an InO2 layer, and then Ga(CH3)3 gas and O3 gas are sequentially and repeatedly introduced to form a GaO layer, and then Zn(CH3)2 gas and O3 gas are sequentially and repeatedly introduced to form a ZnO layer. Note that the order of these layers is not limited to this example. Also, mixed compound layers such as InGaO 2 layers, InZnO2 layers, GaInO layers, ZnInO layers, and GaZnO layers may be formed. Note that instead of O3 gas, H 2O gas obtained by bubbling water with an inert gas such as Ar may be used, but it is preferable to use O3 gas not containing H. Also, In( Instead of (CH3)3 gas, In(C2H5)3 gas or tris(acetylacetonato)indium may be used. Note that tris(acetylacetonato)indium is also called In(acac)3. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas or tris(acetylacetonato)gallium may be used. Note that tris(acetylacetonato)gallium is also called Ga(acac)3. Further, Zn(CH3)2 gas or zinc acetate may be used. These gas species are not limited thereto. When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced. Also, as described above, when forming an oxide semiconductor film by sputtering, the atomic ratio of the target may be, for example, In:M:Zn being 3:1:1, 3:1:2, 3:1:4, 1:1:0.5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, 5:1:6, and the vicinity thereof. Note that when forming an oxide semiconductor film by sputtering, an oxide semiconductor with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may deviate from the atomic ratio of the target. Instead of (CH3)3 gas, In(C2H5)3 gas or tris(acetylacetonato)indium may be used. Note that tris(acetylacetonato)indium is also called In(acac)3. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas or tris(acetylacetonato)gallium may be used. Note that tris(acetylacetonato)gallium is also called Ga(acac)3. Further, Zn(CH3)2 gas or zinc acetate may be used. These gas species are not limited thereto. When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced.

[0230] When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced. Also, as described above, when forming an oxide semiconductor film by sputtering, the atomic ratio of the target may be, for example, In:M:Zn being 3:1:1, 3:1:2, 3:1:4, 1:1:0.5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, 5:1:6, and the vicinity thereof. Note that when forming an oxide semiconductor film by sputtering, an oxide semiconductor with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may deviate from the atomic ratio of the target. Instead of (CH3)3 gas, In(C2H5)3 gas or tris(acetylacetonato)indium may be used. Note that tris(acetylacetonato)indium is also called In(acac)3. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas or tris(acetylacetonato)gallium may be used. Note that tris(acetylacetonato)gallium is also called Ga(acac)3. Further, Zn(CH3)2 gas or zinc acetate may be used. These gas species are not limited thereto. When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced. When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced.

[0231] Also, as described above, when forming an oxide semiconductor film by sputtering, the atomic ratio of the target may be, for example, In:M:Zn being 3:1:1, 3:1:2, 3:1:4, 1:1:0.5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, 5:1:6, and the vicinity thereof. Also, as described above, when forming an oxide semiconductor film by sputtering, the atomic ratio of the target may be, for example, In:M:Zn being 3:1:1, 3:1:2, 3:1:4, 1:1:0.5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, 5:1:6, and the vicinity thereof. Note that when forming an oxide semiconductor film by sputtering, an oxide semiconductor with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may deviate from the atomic ratio of the target. Note that when forming an oxide semiconductor film by sputtering, an oxide semiconductor with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may deviate from the atomic ratio of the target.

[0232] Note that when forming an oxide semiconductor film by sputtering, an oxide semiconductor with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may deviate from the atomic ratio of the target. When forming an oxide semiconductor film by sputtering, it is preferable to use a target containing indium in order to reduce the number of particles. Also, when using an oxide target with a high atomic ratio of element M, the conductivity of the target may decrease. When using a target containing indium, the conductivity of the target can be increased, making DC discharge and AC discharge easier, and thus facilitating correspondence to a large-area substrate. Therefore, the productivity of the semiconductor device can be enhanced. The atomic ratio of the formed film may be smaller than that. Specifically, it may be the case when it is about 40 atomic% or more and 90 atomic% or less of the atomic ratio of zinc contained in the target. It may be the case when it is about 40 atomic% or more and 90 atomic% or less of the atomic ratio of zinc contained in the target. There is.

[0233] The semiconductor layers 242a, 242b, and 242c are preferably formed of a material containing one or both of In or Ga. Typically, In-Ga oxide (oxide containing In and Ga), In-Zn oxide (oxide containing In and Zn), In-M -Zn oxide (oxide containing In, element M, and Zn. Element M is one or more elements selected from Al, Ti, Ga, Y , Zr, La, Ce, Nd, or Hf, and is a metal element having a stronger bonding force with oxygen than In.) There is. The semiconductor layers 242a and 242c are preferably formed of a material containing one or more of the same metal elements among the metal elements constituting the semiconductor layer 242b. When using such a material, it is possible to make it difficult to generate interface levels at the interfaces between the semiconductor layers 242a and 242b, and between the semiconductor layers

[0234] 242c and 242b. Thus, it is possible to make it difficult for carrier scattering and capture to occur at the interface, and it is possible to improve the field-effect mobility of the transistor. In addition, it is possible to reduce the variation in the threshold voltage of the transistor. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. Moreover, when the semiconductor layer 242b is In-M-Zn oxide and the semiconductor layers 242a and 242 c are also In-M-Zn oxide, the semiconductor layers 242a and 242 c and the semiconductor layer 242b. Thus, it is possible to make it difficult for carrier scattering and capture to occur at the interface, and it is possible to improve the field-effect mobility of the transistor. In addition, it is possible to reduce the variation in the threshold voltage of the transistor. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. It becomes possible. It becomes possible.

[0235] In addition, when the semiconductor layer 242b is In-M-Zn oxide and the semiconductor layers 242a and 242 c are also In-M-Zn oxide, the semiconductor layers 242a and 242 Let c be In:M:Zn = x1:y1:z1 [atomic ratio], and the semiconductor layer 242b be In:M:Z n = x2:y2:z2 [atomic ratio], then y1 / x1 is larger than y2 / x2 The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b can be selected in such a way that This is possible. Preferably, the semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b are selected such that y1 / x1 is 1.5 times or more larger than y2 / x2 More preferably The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b are selected such that y1 / x1 is 2 times or more larger than y2 / x2 Even more preferably The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b are selected such that y1 / x1 is 3 times or more larger than y2 / x2 When y1 is equal to or more than x1, stable electrical characteristics can be imparted to the transistor, which is preferable. However, when y1 becomes 3 times or more of x1, the field-effect mobility of the transistor decreases, so y1 is preferably less than 3 times of x1. By configuring the semiconductor layer 242a and the semiconductor layer 242c as described above, the semiconductor layer 242a and the semiconductor layer 242c can be made into layers less likely to have oxygen deficiency than the semiconductor layer 242b

[0236] When the semiconductor layer 242a and the semiconductor layer 242c are In-M-Zn oxides, when the sum of In and element M is 100 atomic%, the atomic ratio of In to element M is preferably less than 50 atomic% for In and 50 atomic% or more for element M, more preferably less than 25 atomic% for In and 75 atomic% or more for element M. Also When the semiconductor layer 242b is In-M-Zn oxide, when the sum of In and element M is 100 ​​​​​​When expressed as atomic%, the atomic ratio of In to element M is preferably such that In is 25 atom ic% or more and element M is less than 75 atomic%, more preferably In is 34 atomi c% or more and element M is less than 66 atomic%.

[0237] For example, as the semiconductor layer 242a containing In or Ga, and the semiconductor layer 242c, In:Ga:Zn = 1:3:2, 1:3:4, 1:3:6, 1:4:5, 1:6:4, or 1:9:6 and targets of atomic ratios in the vicinity thereof are used for formation of In-Ga-Zn oxide, targets of atomic ratios such as In:Ga = 1:9 are used for formation of In-Ga oxide, gallium oxide, etc. can be used. Further, as the semiconductor layer 242b, In:Ga:Zn = 3:1:2, 1:1:1, 5:5:6, 5:1:7 , or 4:2:4.1 and targets of atomic ratios in the vicinity thereof are used for formation of I n-Ga-Zn oxide can be used. Note that the atomic ratios of the semiconductor layer 242a, the semiconductor layer 242 b, and the semiconductor layer 242c each include fluctuations of plus or minus 20% of the above atomic ratios as an error.

[0238] A state where the impurity concentration is low and the density of defect levels is low (less oxygen deficiency) is called high-purity intrinsic or substantially high-purity intrinsic. In order to impart stable electrical characteristics to the OS transistor, impurities and oxygen deficiency in the oxide semiconductor layer are reduced to achieve high-purity intrinsic, and the semiconductor layer 242 is made into an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. Further, it is preferable that at least the channel formation region in the semiconductor layer 242 is made into an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic.

[0239] ​ In particular, impurities and oxygen deficiencies in the semiconductor layer 242b are reduced to achieve high-purity intrinsic conversion, and the semiconductor layer 242b is preferably an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. Also, it is preferable that at least the channel formation region in the semiconductor layer 242b is a semiconductor layer that can be regarded as intrinsic or substantially intrinsic.

[0240] Note that an oxide semiconductor layer that can be regarded as substantially intrinsic means that the carrier density in the oxide semiconductor layer is less than 8×10 11 / cm 3 , preferably less than 1×10 11 / cm 3 , more preferably less than 1×10 10 / cm 3 , and an oxide semiconductor layer with 1×10 -9 / cm 3 or more is what is called such.

[0241] Also, when an oxide semiconductor layer is used for the semiconductor layer 242, it is preferable to use CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor ). CAAC-OS is one of the oxide semiconductors having a plurality of c-axis oriented crystal parts.

[0242] Also, for the oxide semiconductor layer used for the semiconductor layer 242, it is preferable that the region that is not CAAC is less than 20% of the entire oxide semiconductor layer.

[0243] CAAC-OS has dielectric anisotropy. Specifically, for CAAC-OS, the dielectric constant in the c-axis direction is larger than the dielectric constants in the a-axis direction and the b-axis direction. For a transistor in which a gate electrode is arranged in the c-axis direction using CAAC-OS for the semiconductor layer in which a channel is formed, the dielectric constant in the c-axis direction ​​​Since the dielectric constant is large, the electric field generated from the gate electrode easily reaches throughout the CAAC-OS. Thus, the subthreshold swing value (S value) can be reduced. In addition, in a transistor using CAAC-OS for the semiconductor layer, an increase in the S value due to miniaturization is less likely to occur.

[0244] In addition, since CAAC-OS has small dielectric constants in the a-axis direction and the b-axis direction, the influence of the electric field generated between the source and the drain is mitigated. Therefore, the channel length modulation effect and the short-channel effect , etc. are less likely to occur, and the reliability of the transistor can be enhanced.

[0245] Here, the channel length modulation effect refers to a phenomenon in which when the drain voltage is higher than the threshold voltage, the depletion layer spreads from the drain side, and the effective channel length becomes shorter. In addition, the short-channel effect refers to a phenomenon in which, due to a shortening of the channel length, deterioration of electrical characteristics such as a decrease in the threshold voltage occurs. In finer transistors, deterioration of electrical characteristics due to these phenomena is more likely to occur. After the formation of the oxide semiconductor layer, oxygen doping treatment may be performed. In addition, in order to further reduce impurities such as moisture or hydrogen contained in the oxide semiconductor layer and purify the oxide semiconductor layer,

[0246] it is preferable to perform heat treatment. For example, under a reduced-pressure atmosphere, an inert atmosphere such as nitrogen or a rare gas, an oxidizing atmosphere, or ultra-dry air (the moisture content measured using a dew point meter of the CRDS (cavity ring-down laser spectroscopy) method is 20 ppm (dew point conversion -55 °C) or less, preferably 1 ppm or less,

[0247] preferably 10 ppb or less of air) atmosphere, heat treatment is performed on the oxide semiconductor layer. Note that ​​An oxidizing atmosphere is an atmosphere containing 10 ppm or more of oxidizing gas such as oxygen, ozone, or nitrogen oxide. An inert atmosphere is an atmosphere in which the above-mentioned oxidizing gases are less than 10 ppm. or an atmosphere filled with nitrogen or a rare gas.

[0248] In addition, by performing a heat treatment, the oxygen contained in the insulating layer 226 is removed at the same time as the impurities are released. The oxygen vacancies in the oxide semiconductor layer can be reduced by diffusing the oxygen vacancies in the oxide semiconductor layer. After the heat treatment in an inert atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. Heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more. The heat treatment may be performed at any time after the oxide semiconductor layer is formed.

[0249] There is no particular limitation on the heating device used for the heat treatment. The apparatus may be an apparatus for heating the workpiece by heat radiation or heat generation. For example, an electric furnace or a LR furnace may be used. TA (Lamp Rapid Thermal Anneal) equipment, GRTA (Gas Rapid Thermal Annealing (RTA) equipment The LRTA device uses a halogen lamp, Metal halide lamps, xenon arc lamps, carbon arc lamps, high pressure sodium The light (electromagnetic waves) emitted from lamps such as mercury lamps and high-pressure mercury lamps is used to heat the material being treated. The GRTA device is a device that uses high-temperature gas to perform heat treatment.

[0250] The heat treatment is carried out at a temperature of 250° C. to 650° C., preferably 300° C. to 500° C. The treatment time should be within 24 hours. Heat treatment for more than 24 hours will lead to a decrease in productivity. Therefore, it is not preferable.

[0251] [[ELECTRODE]] As the conductive material for forming electrode 243, electrode 224, electrode 244a, electrode 244b, electrode 225a, and electrode 22 5b, a material containing one or more metal elements selected from aluminum, chromium, iron, copper, silver, gold, platinum, tantalum, nickel, cobalt, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, etc. can be used. Also, a semiconductor with high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, or any silicide such as nickel silicide can be used. A plurality of conductive layers formed of these materials may be laminated and used.

[0252] Also, indium tin oxide (ITO: Indium Tin Oxide), indium oxide containing tungsten oxide, tungsten oxide containing indium zinc oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium gallium zinc oxide, conductive materials containing oxygen such as indium tin oxide added with silicon, titanium nitride, tantalum nitride, and other conductive materials containing nitrogen can be applied as the conductive material for forming electrode 243, electrode 224, electrode 244a, electrode 244b, electrode 225a, and electrode 225b. Also, a laminated structure combining the material containing the above-described metal element and the conductive material containing oxygen can be formed. Further, a laminated structure combining the material containing the above-described metal element and the conductive material containing nitrogen can also be formed. This is also the case. Additionally, a laminated structure can be formed by combining the materials containing the aforementioned metal elements, the conductive materials containing oxygen, and the conductive materials containing nitrogen. There is no particular limitation on the method for forming the conductive material, and various forming methods such as vapor deposition, CVD method, and sputtering method can be used.

[0253] 〔Contact Plug〕 As the contact plug, for example, highly embeddable conductive materials such as tungsten and polysilicon can be used. In addition, the side surfaces and the bottom surface of the material may be covered with a barrier layer (diffusion prevention layer) composed of a titanium layer, a titanium nitride layer, or a laminate thereof. In this case, it may be referred to as a contact plug including the barrier layer.

[0254] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments.

[0255] (Embodiment 5) The semiconductor device disclosed in the above embodiment can be used in the drive circuit of a display device. In this embodiment, an example of using the semiconductor device disclosed in the above embodiment in a display device will be described with reference to the drawings.

[0256] <An Example of a Display Device> FIG. 29(A) is a block diagram for explaining a configuration example of a display device 500. The display device 500 shown in FIG. 29(A) has a drive circuit 511, drive circuits 521a and 521b, and a display area 531. Note that the drive circuit 511, the drive circuit 521a, and the drive circuit 521b may be collectively referred to as a "drive circuit" or a "peripheral drive circuit".

[0257] The drive circuits 521a and 521b can function as, for example, a scanning line drive circuit. Also , the drive circuit 511 can function as, for example, a signal line drive circuit. Note that either only the drive circuit 521a , or only the drive circuit 521b may be used. Also, some circuit may be provided at a position facing the drive circuit 511 with the display area 531 interposed therebetween.

[0258] Also, the display device 500 illustrated in FIG. 29(A) has m wirings 5 35 that are each disposed substantially in parallel and whose potentials are controlled by the drive circuit 521a, and / or the drive circuit 521b, and n wirings 5 36 that are each disposed substantially in parallel and whose potentials are controlled by the drive circuit 511. Further, the display area 531 has a plurality of pixels 532 disposed in a matrix. Each pixel 532 has a pixel circuit 534 and a display element.

[0259] Full-color display can also be realized by causing three pixels 532 to function as one pixel. Each of the three pixels 532 controls, for example, the transmittance, reflectance, or emission light amount of red light, green light, or blue light. Note that the colors of light controlled by the three pixels 532 are not limited to combinations of red, green, and blue, and may be yellow, cyan, or magenta.

[0260] Also, a pixel 532 that controls white light may be added to the pixels that control red light, green light, and blue light, and the four pixels 532 may be made to function as one pixel. By adding the pixel 532 that controls white light, the luminance of the display area can be increased. Also, by increasing the number of pixels 532 that function as one pixel and appropriately combining red, green, blue, yellow, cyan, and magenta, the reproducible color gamut can be expanded.

[0261] When pixels are arranged in a 1920×1080 matrix, a display device 500 that can display at a resolution of so-called full high vision (also referred to as " 2K resolution", "2K1K", "2K", etc.) can be realized. Also, for example, when pixels are arranged in a 3840×2160 matrix pattern, a display device 500 that can display at a resolution of so-called ultra high vision (also referred to as " 4K resolution", "4K2K", " 4K", etc.) can be realized. Also, for example, when pixels are arranged in a 7680×4320 matrix, a display device 500 that can display at a resolution of so-called super high vision (also referred to as " 8K resolution", "8K4K", "8K", etc.) can be realized. By increasing the number of pixels, it is also possible to realize a display device 500 that can display at a resolution of 1 6K or 32K.

[0262] The wiring 535_i in the i-th row (where i is a natural number from 1 to m) is electrically connected to the n pixels 532 arranged in the i-th row among the plurality of pixels 532 arranged in m rows and n columns (both m and n are natural numbers of 1 or more) in the display area 531. Also, the wiring 536_j in the j-th column (where j is a natural number from 1 to n) is electrically connected to the m pixels 532 arranged in the j-th column among the pixels 532 arranged in m rows and n columns. (j is a natural number from 1 to n) is electrically connected to the m pixels 532 arranged in the j-th column among the pixels 532 arranged in m rows and n columns.

[0263] 〔Display element〕 The display device 500 can use various forms or have various display elements. As an example of a display element, an EL (electroluminescence) element (organic EL element, inorganic EL element, or an EL element containing organic and inorganic substances), an LED (white LED, red LED, etc.), LEDs (such as green LEDs and blue LEDs), transistors (transistors that emit light according to current), electron-emitting elements, liquid crystal elements, electronic ink, electrophoretic elements, grating light valves (GLVs), display elements using MEMS (Micro-Electro-Mechanical System), digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., there are those having a display medium in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. There are also display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element. Examples of display devices using MEMS (Micro-Electro-Mechanical System) include digital micromirror devices (DMDs), DMSs (Digital Micro Shutters), MIRASOL (registered trademark), IMOD (Interferometric Modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc., in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Further, quantum dots may be used as the display element.

[0264] Examples of display devices using EL elements include EL displays, etc. Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) Examples of display devices using electron-emitting elements include field emission displays (FEDs) or SED-type flat panel displays (SED: Surface-conduction Electron-emitter Display), etc. Examples of display devices using quantum dots include quantum dot displays, etc. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. Examples of display devices using electronic ink, electronic powder fluid (registered trademark), or electrophoretic elements include electronic paper, etc. Display devices include plasma display panels (PDPs) may be also possible.

[0265] In order to realize a semi-transmissive or reflective LCD, the pixel voltage must be A part or the whole of the electrode may function as a reflective electrode. For example, A part or the whole of the pixel electrode may be made of aluminum, silver, or the like. In this case, it is also possible to provide a memory circuit such as an SRAM under the reflective electrode. This further reduces power consumption.

[0266] When using an LED, graphene or graphene is placed under the LED electrode or nitride semiconductor. Graphene and graphite can be arranged in layers to form a multilayer film. In this way, by providing graphene or graphite, it is possible to form a nitride on the graphene or graphite. Semiconductors, for example, n-type GaN semiconductor layers having crystals can be easily formed. Furthermore, a p-type GaN semiconductor layer having crystals is formed on top of it to form an LED. In addition, the graphene or graphite and the n-type GaN semiconductor layer having crystals can be An AlN layer may be provided between the GaN and the GaN layers. However, by providing graphene, the GaN semiconductor of the LED is The layer can also be deposited by sputtering.

[0267] 29(B), 29(C), 30(A), and 30(B) show the structure used for pixel 532. 1 shows an example of a circuit configuration that can be implemented.

[0268] [An example of a pixel circuit for a light-emitting display device] The pixel circuit 534 shown in FIG. 29B includes a transistor 461, a capacitor 463, and a transistor It has a transistor 468 and a transistor 464. Also, the pixel circuit 534 shown in Fig. 29(B) is electrically connected to a light-emitting element 469 that can function as a display element. One of the source electrode and the drain electrode of transistor 461 is electrically connected to wiring 536_j. Further, the gate electrode of transistor 461 is electrically connected to wiring 535_i. A video signal is supplied from wiring 536_j.

[0269]

[0270] Transistor 461 has a function of controlling the writing of the video signal to node 465.

[0271] One of the pair of electrodes of capacitor element 463 is electrically connected to node 465, and the other is electrically connected to node 467. Also, the other of the source electrode and the drain electrode of transistor 461 is electrically connected to node 465.

[0272] Capacitor element 463 has a function as a holding capacitor for holding the data written to node 465.

[0273] One of the source electrode and the drain electrode of transistor 468 is electrically connected to the potential supply line VL_a, and the other is electrically connected to node 467. Further, the gate electrode of transistor 468 is electrically connected to node 465.

[0274] One of the source electrode and the drain electrode of transistor 464 is electrically connected to the potential supply line V0, and the other is electrically connected to node 467. Further, the gate electrode of transistor 464 is electrically connected to wiring 535_i.

[0275] One of the anode or cathode of the light-emitting element 469 is electrically connected to the potential supply line VL_b and the other is electrically connected to the node 467.

[0276] As the light-emitting element 469, for example, an organic electroluminescence element (also referred to as an organic EL element) etc. can be used. However, the light-emitting element 469 is not limited thereto, for example, an inorganic EL element made of an inorganic material may be used.

[0277] For example, a high power supply potential VDD is applied to one of the potential supply line VL_a or the potential supply line VL_b, and a low power supply potential VSS is applied to the other.

[0278] In the display device 500 having the pixel circuit 534 of FIG. 29(B), the driving circuit 521a, and / or the driving circuit 521b sequentially selects the pixels 532 of each row, turns on the transistors 461, and the transistor 464, and writes the video signal to the node 465.

[0279] The pixel 532 in which data is written to the node 465 becomes a holding state when the transistors 461 and the transistor 464 are turned off. Further, the amount of current flowing between the source electrode and the drain electrode of the transistor 468 is controlled according to the potential of the data written to the node 465, and the light-emitting element 469 emits light with a luminance corresponding to the amount of current flowing. By sequentially performing this each time, an image can be displayed.

[0280] Also, as shown in FIG. 30(A), transistors having a back gate may be used as the transistors 461, the transistor 464, and the transistor 468. FIG. 30( The transistors 461 and 464 shown in (A) have gates electrically connected to the back gate. Thus, the gate and the back gate are always at the same potential. Also, the transistor 468 has its back gate electrically connected to node 467. Thus, the back gate is always at the same potential as node 467.

[0281] [An example of a pixel circuit for a liquid crystal display device] The pixel circuit 534 shown in Fig. 29(C) has a transistor 461 and a capacitor element 463. Also, the pixel circuit 534 shown in Fig. 29(C) is electrically connected to a liquid crystal element 462 that can function as a display element.

[0282] One potential of a pair of electrodes of the liquid crystal element 462 is appropriately set according to the specifications of the pixel circuit 534. For example, a common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 462, or it may be set to the same potential as the capacitance line CL. Also, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 462 for each pixel 532. The other of the pair of electrodes of the liquid crystal element 462 is electrically connected to node 466. The liquid crystal element 462 has its alignment state set by the data written to node 466.

[0283] As a driving method for a display device including the liquid crystal element 462, for example, TN (Twisted Nematic) mode, STN (Super Twisted Nematic) mode, VA mode, ASM (Axially Symmetric Aligned Mi cro-cell) mode, OCB (Optically Compensated B irefringence) mode, FLC (Ferroelectric Liqui d crystal) mode, etc. d Crystal mode, AFLC (AntiFerroelectric Liquid Crystal) mode, MVA mode, PVA (Patterned Vertical Alignment) mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may be used. uid Crystal) mode, MVA mode, PVA (Patterned Ver tical Alignment) mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may be used. In addition, as a driving method of the display device, in addition to the driving methods described above, ECB (Electrically Controlled Birefringence) mode, PDLC (Polymer Dispersed Liquid Crystal) mode, PNLC ally Controlled Birefringence) mode, PDLC (P olymer Dispersed Liquid Crystal) mode, PNLC (Polymer Network Liquid Crystal) mode, guest - host mode, etc. are available. However, it is not limited to this, and various liquid crystal elements and their driving methods can be used. When using a liquid crystal element as the display element, thermotropic liquid crystal, low - molecular liquid crystal, polymer liquid

[0284] crystal, polymer - dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials may exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. of these liquid crystal materials may exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. The liquid crystal materials may exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0285] In addition, a liquid crystal showing a blue phase (Blue Phase) without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, it is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with 5 wt% or more of a chiral agent is used in the liquid crystal layer to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a response speed Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with 5 wt% or more of a chiral agent is used in the liquid crystal layer to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a response speed is fast. It is as short as 1 msec or less, is optically isotropic, so no alignment treatment is required, and the viewing angle dependence is small. Also, since no alignment film needs to be provided, rubbing treatment is not required either, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects and damages of the liquid crystal display device during the manufacturing process can be reduced. Therefore, it is possible to improve the productivity of the liquid crystal display device.

[0286] Also, a method called multi-domain formation or multi-domain design, in which pixels are divided into several regions (sub-pixels) and molecules are arranged to be tilted in different directions can be used.

[0287] Also, the intrinsic resistance of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, more preferably 1×10 12 Ω·cm or more. Note that the value of the intrinsic resistance in this specification is the value measured at 20°C.

[0288] In the pixel circuit 534 at the i-th row and j-th column, one of the source electrode and the drain electrode of the transistor 461 is electrically connected to the wiring 536_j, and the other is electrically connected to the node 466. The gate electrode of the transistor 461 is electrically connected to the wiring 535_i. A video signal is supplied from the wiring 536_j. The transistor 461 has a function of controlling the writing of the video signal to the node 466.

[0289] One of the pair of electrodes of the capacitor element 463 is electrically connected to a wiring (hereinafter referred to as the capacitor line CL ) to which a specific potential is supplied, and the other is electrically connected to the node 466. Note that the capacitor line CL The value of the potential is appropriately set according to the specifications of the pixel circuit 534. The capacitive element 463 has a function as a holding capacitor for holding the data written to the node 466.

[0290] For example, in the display device 500 having the pixel circuit 534 of FIG. 29(C), the driving circuits 521a , and / or the driving circuit 521b sequentially select the pixel circuits 534 in each row, turn on the transistor 461, and write a video signal to the node 466.

[0291] The pixel circuit 534 in which the video signal is written to the node 466 enters the holding state when the transistor 461 is turned off. By sequentially performing this for each row, an image can be displayed in the display area 531.

[0292] Also, as shown in FIG. 30(B), a transistor having a back gate may be used for the transistor 461. The transistor 461 shown in FIG. 30(B) has its gate electrically connected to the back gate. Therefore, the gate and the back gate always have the same potential.

[0293] 〔Configuration Example of Peripheral Circuit〕 Next, a configuration example of the driving circuit 511 will be described with reference to FIG. 31(A). The driving circuit 511 includes a shift register 512 and a DA conversion output circuit 513.

[0294] The shift register 512 has n registers SR (register SR_1 to register SR_n). A start pulse SP, a clock signal CLK, etc. are input to the shift register 512. The circuits constituting the shift register 512 can use the semiconductor device disclosed in the above embodiment.

[0295] The DA conversion output circuit 513 has n conversion output circuits CA (conversion output circuits CA_1 to CA_n). Also, a digital signal including video information is input to the DA conversion output circuit 513. The conversion output circuit CA has a function of converting the input digital signal into an analog voltage signal.

[0296] 〔Operation example of peripheral circuits〕 In this embodiment, the operation of the drive circuit 511 supplying a video signal to the wiring 536_j connected to the pixel circuit 534 in the i-th row will be described.

[0297] When the wiring 535_i in the i-th row is selected, a start pulse SP is input to the shift register 512. The outputs of the registers SR_1 to SR_n of the shift register 512 are sequentially fed forward in synchronization with the clock signal CLK starting from the start pulse SP. Therefore, the operating conversion output circuit CA_j is sequentially selected in synchronization with the clock signal CLK.

[0298] Specifically, when a start pulse SP is input to the shift register 512, first, a column selection signal indicating that the first column has been selected is input to the conversion output circuit CA_1 from the first register SR_1. Thus, the column selection signal indicating that the j-th column has been selected is input to the conversion output circuit CA_j.

[0299] The conversion output circuit CA_j to which the column selection signal is input converts the digital signal input to the conversion output circuit CA_j into an analog voltage signal (video signal) and outputs it to the wiring 536_j.

[0300] When the above operation is repeated until m rows and n columns are completed, the writing of the next frame is started. In this way, an image can be displayed on the display area 531.

[0301] Also, as shown in FIG. 31(B), a level shifter 514 may be provided between the shift register 512 and the DA conversion output circuit 513. The level shifter 514 has shifters LS (shifters LS_1 to LS_n) corresponding to each column. The shifter LS_j in the j-th column has a function of increasing the voltage amplitude of the signal output from the shift register 512 and inputting it to the conversion output circuit CA_j. By providing the level shifter 514, the operating voltage of the shift register 512 can be reduced. Therefore, the power consumption of the display device 500 can be reduced.

[0302] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0303] (Embodiment 6) Using the transistor and the semiconductor device shown in the above embodiment, part or all of the driving circuit including the transistor is integrally formed on the same substrate as the pixel portion to form a system-on-panel. A configuration example of a display device that can use the transistor shown in the above embodiment will be described with reference to FIGS. 32 and 33.

[0304] [[An example of a liquid crystal display device and an example of an EL display device]] As an example of a display device, a display device using a liquid crystal element and a display device using an EL element will be described. In FIG. 32(A), a sealing material 4005 is provided so as to surround the pixel portion 4002 provided on the first substrate 4001 and is sealed by the second substrate 4006. In FIG. 32(A), a signal line driving circuit 4003 and a scanning line driving circuit 4004 formed of single-crystalline semiconductors or polycrystalline semiconductors are mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. Also, various signals and potentials supplied to the signal line driving circuit 4003, the scanning line driving circuit 4004, or the pixel portion 4002 are supplied from FPC (Flexible printed circuit) 4018a and FPC 4018b.

[0305] In FIGS. 32(B) and 32(C), a sealing material 4005 is provided so as to surround the pixel portion 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001. Also, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line driving circuit 4004. Therefore, the pixel portion 4002 and the scanning line driving circuit 4004 are sealed together with the display element by the first substrate 4001, the sealing material 4005, and the second substrate 4006. In FIGS. 32(B) and 32(C), a signal line driving circuit 4003 formed of single-crystalline semiconductors or polycrystalline semiconductors is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. In FIGS. 32(B) and 32(C), various signals and potentials supplied to the signal line driving circuit 4003, the scanning line driving circuit 4004, or the pixel portion 4002 are supplied from FPC 4018.

[0306] Also, in FIGS. 32(B) and 32(C), an example in which the signal line driving circuit 4003 is separately formed and mounted on the first substrate 4001 is shown, but the present invention is not limited to this configuration. ​​​​​​​​​​It is also possible to separately form and implement the drive circuit, or to separately form and implement only a part of the signal line drive circuit or a part of the scanning line drive circuit only.

[0307] Note that the connection method of the separately formed drive circuit is not particularly limited, and wire bonding ing, COG (Chip On Glass), TCP (Tape Carrier Package), COF (Chip On Film), etc. can be used. FIG 32(A) is an example in which the signal line drive circuit 4003 and the scanning line drive circuit 4004 are implemented by COG, and FIG. 32(B) is an example in which the signal line drive circuit 4003 is implemented by COG , and FIG. 32(C) is an example in which the signal line drive circuit 4003 is implemented by TCP.

[0308] In addition, the display device may include a panel in a state where the display element is sealed, and a module in a state where an IC including a controller is mounted on the panel.

[0309] Also, the pixel portion and the scanning line drive circuit provided on the first substrate have a plurality of transistors , and the transistors shown in the above embodiment can be applied.

[0310] FIGS. 33(A) and 33(B) are cross-sectional views showing the cross-sectional configuration of the portion indicated by the chain line N1-N2 in FIG. 32(B). The display device shown in FIGS. 33(A) and 33(B) has an electrode 401 5, and the electrode 4015 is electrically connected to the terminal of the FPC 4018 via the anisotropic conductive layer 4019 . Also, the electrode 4015 is electrically connected to the wiring 4014 at the opening formed in the insulating layer 4112, the insulating layer 41 11, and the insulating layer 4110 .

[0311] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030, and the wiring 4014 is the same as the source electrodes and drain electrodes of the transistors 4010 and 4011. and is formed of the same conductive layer.

[0312] Also, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 have a plurality of transistors. In FIGS. 33(A) and 33(B), the transistor 4010 included in the pixel portion 4002 and the transistor 4011 included in the scanning line driving circuit 4004 are exemplified. In FIG. 33(A), an insulating layer 4112, an insulating layer 4111, and an insulating layer 4110 are provided on the transistors 4010 and 4011. In FIG. 33(B), a partition wall 4510 is formed on the insulating layer 4112. 1 are illustrated. In FIG. 33(A), an insulating layer 4112, an insulating layer 4111, and an insulating layer 4110 are provided on the transistors 4010 and 4011. In FIG. 33(B), a partition wall 4510 is formed on the insulating layer 4112. 11. In FIG. 33(A), an insulating layer 4112, an insulating layer 4111, and an insulating layer 4110 are provided on the transistors 4010 and 4011. In FIG. 33(B), a partition wall 4510 is formed on the insulating layer 4112.

[0313] Also, the transistors 4010 and 4011 are provided on the insulating layer 4102. Also, the transistors 4010 and 4011 have an electrode 4017 formed on the insulating layer 4102, and an insulating layer 4103 is formed on the electrode 4017. The electrode 4017 can function as a back gate electrode.

[0314] The transistors 4010 and 4011 can use the transistors shown in the above embodiment. The transistors exemplified in the above embodiment have suppressed electrical property variations and are electrically stable. Therefore, the display device of the embodiment shown in FIGS. 33(A) and 33(B) can be made into a highly reliable display device.

[0315] In FIGS. 33(A) and 33(B), as the transistors 4010 and 4011, cases where transistors having the same structure as the transistor 452 shown in the above embodiment are used are illustrated. The transistors have the same structure as the transistor 452 shown in the above embodiment. are illustrated.

[0316] Also, the display device shown in FIGS. 33(A) and 33(B) has a capacitive element 4020. The capacitive element 4020 has a region where one part of the source electrode or the drain electrode of the transistor 4010 overlaps with the electrode 4021 via the insulating layer 4103. The electrode 4021 is formed of the same conductive layer as the electrode 4017. has a region where one part of the source electrode or the drain electrode of the transistor 4010 overlaps with the electrode 4021 via the insulating layer 4103. The electrode 4021 is formed of the same conductive layer as the electrode 4017. is formed of the same conductive layer as the electrode 4017.

[0317] Generally, the capacitance of the capacitive element provided in the display device is set so that it can hold charges for a predetermined period in consideration of the leakage current etc. of the transistor arranged in the pixel portion. The capacitance of the capacitive element may be set in consideration of the off-current etc. of the transistor. is set so that it can hold charges for a predetermined period in consideration of the leakage current etc. of the transistor arranged in the pixel portion. The capacitance of the capacitive element may be set in consideration of the off-current etc. of the transistor. may be set in consideration of the off-current etc. of the transistor.

[0318] For example, by using an OS transistor in the pixel portion of a liquid crystal display device, the capacitance of the capacitive element can be made 1 / 3 or less, and further 1 / 5 or less, with respect to the liquid crystal capacitance. By using an OS transistor, the formation of the capacitive element can also be omitted. can be made 1 / 3 or less, and further 1 / 5 or less, with respect to the liquid crystal capacitance. By using an OS transistor, the formation of the capacitive element can also be omitted. can also be omitted.

[0319] The transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element. FIG. 33(A) is an example of a liquid crystal display device using a liquid crystal element as the display element. In FIG. 33(A), the liquid crystal element 4013 which is the display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 which function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is an example of a liquid crystal display device using a liquid crystal element as the display element. In FIG. 33(A), the liquid crystal element 4013 which is the display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 which function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 which function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 Note that insulating layers 4032 and 4033 which function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 It is provided on the side of the second substrate 4006, and the first electrode layer 4030 and the second electrode layer 4031 overlap via the liquid crystal layer 4008.

[0320] The spacer 4035 is a columnar spacer obtained by selectively etching an insulating layer, and is provided to control the interval (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that spherical spacers may be used.

[0321] Note that it is preferable to use OS transistors as the transistors 4010 and 4011. The OS transistor can lower the current value (off-current value) in the off state. Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and the writing interval can also be set long in the power-on state. Therefore, the frequency of the refresh operation can be reduced, and the effect of suppressing power consumption can be achieved.

[0322] In addition, since the OS transistor can obtain a relatively high field-effect mobility, it can be driven at high speed. Therefore, by using the transistor in the pixel portion of the display device, a high-quality image can be provided. Also, since it is possible to separately fabricate the drive circuit portion or the pixel portion on the same substrate, the number of components of the display device can be reduced.

[0323] In addition, in the display device, optical members (optical substrates) such as a black matrix (light-shielding layer), a polarizing member, a retardation member, and an antireflection member may be appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Also, a backlight, a side light, etc. may be used as the light source.

[0324] ​​​​​​​​​​​In addition, as a display element included in the display device, a light-emitting element that utilizes electroluminescence (also referred to as an "EL element") can be applied. The EL element has a layer containing a light-emitting compound (also referred to as an "EL layer") between a pair of electrodes. When a potential difference greater than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light. The EL element is also classified according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element. In the organic EL element, when a voltage is applied, electrons are injected into the EL layer from one electrode, and holes are injected into the EL layer from the other electrode. Then, when these carriers (electrons and holes) recombine, a light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. Due to such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. When a potential difference greater than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light.

[0325] In addition, the EL element is classified according to whether the light-emitting material is an organic compound or an inorganic compound, and generally, the former is called an organic EL element and the latter is called an inorganic EL element.

[0326] In the organic EL element, when a voltage is applied, electrons are injected into the EL layer from one electrode, and holes are injected into the EL layer from the other electrode. Then, when these carriers (electrons and holes) recombine, a light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. Due to such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0327] Note that in addition to the light-emitting compound, the EL layer may also contain a substance with high hole injection property, a substance with high hole transport property, a hole blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property). The EL layer can be formed by any method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0328] The EL layer can be formed by any method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0329] Inorganic EL elements are classified into distributed inorganic EL elements and thin-film inorganic EL elements according to their element configurations. Distributed inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and their light-emitting mechanism is donor-acceptor recombination emission that utilizes donor levels and acceptor levels. Thin-film inorganic EL elements have a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and their light-emitting mechanism is localized emission that utilizes inner-shell electron transitions of metal ions. Here, an organic EL element is used as the light-emitting element for explanation.

[0330] For the light-emitting element to extract light, at least one of a pair of electrodes may be transparent. Then, a transistor and a light-emitting element are formed on a substrate, and top emission (top emission) in which light is extracted from the surface opposite to the substrate, bottom emission (bottom emission) in which light is extracted from the surface on the substrate side, and dual emission (dual emission) in which light is extracted from both surfaces. There are light-emitting elements with these emission structures, and any light-emitting element with any emission structure can be applied.

[0331] FIG. 33(B) is an example of a light-emitting display device (also referred to as an "EL display device") using a light-emitting element as a display element. The light-emitting element 4513, which is a display element, is electrically connected to a transistor 4010 provided in a pixel portion 4002. The configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, but it is not limited to this configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of light extracted from the light-emitting element 4513 and the like.

[0332] ​​​​The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, a photosensitive resin material is used to form an opening on the first electrode layer 4030, and it is preferably formed such that the side surface of the opening becomes an inclined surface formed with a continuous curvature .

[0333] The light-emitting layer 4511 may be composed of a single layer or may be configured such that a plurality of layers are laminated .

[0334] A protective layer may be formed on the second electrode layer 4031 and the partition wall 4510 so that oxygen, hydrogen, moisture, carbon dioxide, etc. do not enter the light-emitting element 4513. As the protective layer, silicon nitride , silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride , aluminum nitride oxynitride, DLC (Diamond Like Carbon), etc. can be formed . Further, a filling material 4514 is provided and sealed in the space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 40 05. In this way, it has high airtightness so as not to be exposed to the outside air, and it is preferable to package (encase) it with a protective film (laminated film, ultraviolet curable resin film, etc.) or a cover material with little outgassing .

[0335] As the filling material 4514, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate), etc. can be used. Further, the filling material 4514 may contain a desiccant.

[0336] ​​ For the sealing material 4005, glass materials such as glass frit, and resin materials such as two-component mixed resins, cured resins that cure at room temperature, photo-curable resins, and thermosetting resins can be used. Also, the sealing material 4005 may contain a desiccant.

[0337] Further, if necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), or a color filter may be appropriately provided on the light-emitting surface of the light-emitting element. Also, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, an antiglare treatment that diffuses reflected light due to surface irregularities and reduces reflection can be performed.

[0338] Further, by forming the light-emitting element into a microcavity structure, light with high color purity can be extracted. Also, by combining the microcavity structure and the color filter, reflection can be reduced and the visibility of the display image can be improved.

[0339] In the first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, an opposing electrode layer, etc.) to which a voltage is applied to the display element, the light-transmitting property and the reflectivity may be selected according to the direction of the light to be extracted, the location where the electrode layer is provided, and the pattern structure of the electrode layer.

[0340] For the first electrode layer 4030 and the second electrode layer 4031, a conductive material having light-transmitting properties such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can be used.

[0341] In addition, the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more of metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), etc., or an alloy thereof, or a metal nitride thereof. .

[0342] In addition, as the first electrode layer 4030 and the second electrode layer 4031, a conductive composition containing a conductive polymer (also referred to as a conductive polymer) can be used. As the conductive polymer , a so-called π-electron conjugated system conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives , or a copolymer or its derivatives composed of two or more of aniline, pyrrole, and thiophene, etc. can be mentioned.

[0343] In addition, since the transistor is easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element.

[0344] By using the transistor shown in the above embodiment, a reliable display device can be provided. In addition, by using the transistor shown in the above embodiment, high definition and , large areaization are possible, and a display device with good display quality can be provided. In addition, a display device with reduced power consumption can be provided.

[0345] <An example of a display module> As an example of a semiconductor device using the transistor described above, a display module will be described. The display module 6000 shown in FIG. 34 has a touch sensor 6004 connected to an FPC 6003, an FPC 6005 connected between an upper cover 6001 and a lower cover 600 2, a display panel 6006, a backlight unit 6007, a frame 6009, a printed circuit board 6010, and a battery 6011. Note that the backlight unit 6007, the battery 6011, the touch sensor 6004, etc. may not be provided in some cases.

[0346] The semiconductor device according to one aspect of the present invention can be used, for example, in an integrated circuit mounted on a touch sensor 6004, a display panel 6006, a printed circuit board 6010, etc. For example, the display panel 6006 can use the display device described above.

[0347] The upper cover 6001 and the lower cover 6002 can be appropriately changed in shape and dimensions according to the sizes of the touch sensor 6004, the display panel 6 006, etc.

[0348] The touch sensor 6004 can be used by superimposing a resistive film type or a capacitive type touch sensor on the display panel 6 006. It is also possible to add the function of a touch sensor to the display panel 6006. For example, it is also possible to provide touch sensor electrodes in each pixel of the display panel 6006 to add a capacitive touch panel function. Or, by providing a photosensor in each pixel of the display panel 6006, it is also possible to add the function of an optical touch sensor in this way.

[0349] The backlight unit 6007 has a light source 6008. The light source 6008 is provided at the end of the backlight unit 6007, and it may be configured to use a light diffusing plate. Also, when a light-emitting display device or the like is used for the display panel 6006, the backlight unit 6007 can be omitted.

[0350] The frame 6009 has a function as an electromagnetic shield for blocking electromagnetic waves generated from the printed circuit board 6010 side in addition to the protection function of the display panel 6006. Also, the frame 6 009 may have a function as a heat sink.

[0351] The printed circuit board 6010 has a power supply circuit, a signal processing circuit for outputting video signals and clock signals, and the like. As the power supply for supplying power to the power supply circuit, a battery 6011 may be used, or a commercial power supply may be used. When a commercial power supply is used as the power supply , the battery 6011 can be omitted.

[0352] Also, members such as a polarizing plate, a retardation plate, and a prism sheet may be additionally provided in the display module 6000.

[0353] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0354] (Embodiment 7) The semiconductor device shown in the above embodiment can be used in an illumination device or the like. As an example , FIG. 35(A) shows a block diagram of an illumination device 1100. The illumination device 1100 includes a controller 1101, a pre-driver 1102, a voltage generation circuit 1103, and a light-emitting unit 1104. ​​​​​It has. The semiconductor device shown in the above embodiment can be used, for example, in the pre-driver 1102 for example.

[0355] The light emitting unit 1104 has one or more LEDs 1114. In this embodiment, although an LED is exemplified as the light emitting element other light emitting elements may be used. The voltage generation circuit 1103 is a circuit for generating a voltage to be supplied to the light emitting unit 1104. As the voltage generation circuit 1103 for example, a switching regulator may be used. The pre-driver 1102 is a circuit for driving the voltage generation circuit 1103. Therefore, the voltage output from the voltage generation circuit 1103 is controlled by the pre-driver 1102.

[0356] The controller 1101 has, for example, a brightness adjustment circuit, a light emitting unit short circuit detection circuit, a dimming PWM signal generation unit, etc. (not shown). The controller 1101 supplies a signal for determining the light emission brightness of the light emitting unit 1104 to the pre-driver 1102. Also, separately, detectors such as a temperature sensor and a light sensor are provided, and a signal taking into account the information obtained from these detectors can also be supplied to the pre-driver 1102.

[0357] In addition, the lighting device 1100 can be applied to lighting devices in various fields. For example, indoor lighting devices (LED bulbs and LED fluorescent lamps), outdoor lighting devices, backlight devices for liquid crystal displays (LCDs) lighting devices for vehicles (automobiles, motorcycles, etc.), lighting devices for railway vehicles, signal lights, electric bulletin boards, electric signs, etc. For example, as a lighting device for vehicles, there are headlamps (headlights), front combination lamps, daytime running lamps, rear combination lamps, direction indicator lamps, room lamps, etc. ​​

[0358] In addition, the semiconductor device shown in the above embodiment can be used for any motor drive device that controls the operation of a motor. As an example, FIG. 35(B) shows a block diagram of a motor drive device 1200. The motor drive device 1200 includes a controller 1201, a pre-driver 120 2, a voltage generation circuit 1203, and a motor 1204. The semiconductor device shown in the above embodiment can be used, for example, for the pre-driver 1202. The voltage generation circuit 1203 is a circuit for generating a voltage to be supplied to the motor 1204. As the voltage generation circuit 1203, for example, a power transistor may be used. The pre-driver 1 202 is a circuit for driving the voltage generation circuit 1203. Therefore, the voltage output from the voltage generation circuit 1203 is controlled by the pre-driver 1202.

[0359] The controller 1201 supplies a signal for determining the output of the motor 1204 to the pre-driver 1202. The controller 1201 can determine the output of the motor 1204 based on information obtained from a separately provided detector.

[0360]

[0361]

[0362] This embodiment can be appropriately combined with other embodiments and examples shown in this specification.

[0362] (Embodiment 8) In this embodiment, an example of applying the semiconductor device and the like described in the above embodiment to electronic components, and an example of an electronic device including the electronic components will be described with reference to FIGS. 36 and 37. Note that an electronic component is also referred to as a semiconductor package or an IC package. An electronic component ​, there are multiple standards and names depending on the terminal extraction direction and the shape of the terminal. Therefore, in this embodiment, an example of an electronic component will be described.

[0363] In the assembly process (post-process), the electronic component is completed by combining the semiconductor device shown in the above embodiment and components other than the semiconductor device.

[0364] The post-process will be described using the flowchart shown in Fig. 36(A). After the element substrate having the semiconductor device shown in the above embodiment is completed in the pre-process, a "back grinding process" of grinding the back surface of the element substrate ( the surface on which no semiconductor device or the like is formed) is performed (step S1). By thinning the element substrate by grinding, warping of the element substrate can be reduced, and miniaturization of the electronic component can be achieved.

[0365] Next, a "dicing process" of separating the element substrate into a plurality of chips is performed (step S2). Then, a "die bonding ding process" of individually picking up the separated chips and bonding them onto a lead frame is performed (step S3). The bonding between the chip and the lead frame in the die bonding process can be appropriately selected according to the product, such as bonding with resin or bonding with tape. Note that the chip may be bonded onto an interposer substrate instead of the lead frame.

[0366] Next, a "wire bonding process" of electrically connecting the leads of the lead frame and the electrodes on the chip with a thin metal wire (wire) is performed (step S4). As the thin metal wire, silver wire or gold wire can be used. Also, for wire bonding, ball bonding or wedge bonding can be used.

[0367] The wire-bonded chip is subjected to a "sealing process (molding process)" sealed with an epoxy resin or the like (step S5). By performing the sealing process, the inside of the electronic component is filled with resin, and the circuit portion built in the chip and the wire connecting the chip and the lead are mechanically protected from external force, and deterioration of characteristics (reduction in reliability) due to moisture and dust can be reduced.

[0368] Next, a "lead plating process" for plating the leads of the lead frame is performed (step S6). The plating process prevents the leads from rusting and enables more reliable soldering when later mounted on a printed circuit board. Next, a "shaping process" for cutting and shaping the leads is performed (step S7).

[0369] Next, a "marking process" for performing printing processing (marking) on the surface of the package is performed (step S8). Then, through an "inspection process" (step S9) for examining the quality of the external appearance shape and the presence or absence of malfunction, the electronic component is completed.

[0370] The electronic component described above can be configured to include the transistor described in the above embodiment. Therefore, malfunction at high temperatures can be reduced, and a semiconductor device with suppressed manufacturing costs can be realized. The electronic component includes a semiconductor device with reduced malfunction at high temperatures and suppressed manufacturing costs, so it is an electronic component with relaxed usage environment restrictions and miniaturization.

[0371] Also, a perspective schematic diagram of the completed electronic component is shown in Fig. 36(B). In Fig. 36(B), the electronic component ​​​​​​​​​​​As an example of a product, a perspective schematic diagram of a QFP (Quad Flat Package) is shown. The electronic component 700 shown in Fig. 36(B) shows leads 705 and a semiconductor device 703. As the semiconductor device 703, the semiconductor devices shown in the above embodiments can be used. It is possible.

[0372] The electronic component 700 shown in Fig. 36(B) is mounted on, for example, a printed circuit board 702. In this way, a plurality of such electronic components 700 are combined, and each is electrically connected on the printed circuit board 702, so that a substrate (mounted substrate 704) on which the electronic components are mounted is completed. The completed mounted substrate 704 is used in electronic devices and the like.

[0373] Next, with reference to Fig. 37, an application example in which the above-described electronic components are applied to a drive circuit that drives inverters, motors, etc., provided in vehicles (such as bicycles) driven by the power of a fixed power source will be described. It will be described.

[0374] Fig. 37(A) shows an electric bicycle 1010 as an application example. The electric bicycle 1010 obtains power by passing an electric current through a motor 1011. Also, the electric bicycle 1 010 has a power storage device 1012 for supplying an electric current to be passed through the motor 1011, and a drive circuit 1013 for driving the motor 1011. In Fig. 37(A), pedals are shown, but they may not be present. It is shown, but it may not be necessary.

[0375] The drive circuit 1013 is mounted with a mounted substrate provided with an electronic component having a semiconductor device shown in the previous embodiment. Therefore, it is possible to realize an electric bicycle equipped with miniaturized electronic components. Also, it is possible to realize an electric bicycle with low power consumption and a long cruising range. It can be realized. Also, an electric bicycle with low power consumption and a long cruising range can be realized. It is possible. In addition, an electric bicycle with good reliability can be realized.

[0376] FIG. 37(B) shows an electric vehicle 1020 as another application example. The electric vehicle 10 20 obtains power by passing an electric current through a motor 1021. The electric vehicle 1020 also includes a power storage device 1022 for supplying the electric current flowing through the motor 1021, and a drive circuit 1023 for driving the motor 1021.

[0377] The drive circuit 1023 is mounted with a mounting board provided with electronic components having the semiconductor device shown in the previous embodiment. Therefore, an electric vehicle equipped with miniaturized electronic components can be realized. In addition, an electric vehicle with low power consumption and a long cruising range can be realized. In addition, an electric vehicle with good reliability can be realized.

[0378] In addition, the electronic components having the semiconductor device shown in the previous embodiment can be used not only for electric vehicles (EVs), but also for hybrid vehicles (HEVs), plug-in hybrid vehicles (PHEVs), and the like.

[0379] As described above, the electronic device shown in this embodiment is mounted with a mounting board provided with electronic components having the semiconductor device according to the previous embodiment. For this reason, an electronic device equipped with miniaturized electronic components can be realized. In addition, an electronic device with low power consumption can be realized. In addition, an electronic device with good reliability can be realized.

[0380] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like.

[0381] (Embodiment 9) A semiconductor device according to an aspect of the present invention can be used in control circuits of various electronic devices. FIG. 38 shows a specific example of an electronic device using a semiconductor device according to an aspect of the present invention.

[0382] Examples of electronic devices using a semiconductor device according to an aspect of the present invention include display devices such as televisions and monitors , lighting devices, desktop or notebook personal computers, word processing ers, image playback devices that play still images or moving images stored on recording media such as DVDs (Digital Versatile Discs), portable CD players, radios, tape recorders, headphone stereos, stereos, table clocks, wall clocks, cordless telephone handsets , transceivers, mobile phones, car phones, portable game machines, tablet terminals, pachinko machines and other large game machines, calculators, portable information terminals, electronic notebooks, e-book terminals, electronic translators, voice input devices, video cameras, digital still cameras, electric shavers, high-frequency heating devices such as microwave ovens, rice cookers, washing machines, vacuum cleaners, water heaters, fans, hair dryers, air conditioners, humidifiers, dehumidifiers and other air conditioning equipment, dishwashers, dish dryers, clothes dryers , futon dryers, refrigerators, freezers, refrigerator-freezers, DNA storage freezers, flashlights , tools such as chain saws, smoke detectors, medical devices such as dialysis devices, and the like. Furthermore, moving bodies propelled by electric motors using power from power storage devices are also within the scope of electronic devices In addition, industrial devices such as induction lamps, traffic lights, belt conveyors, elevators, escalators, industrial robots , power storage systems, power storage devices for power leveling and smart grids, etc. can be mentioned.

[0383] Also, mobile bodies propelled by electric motors using power from a power storage device are also within the category of electronic devices It shall be included in the above. As the above moving body, for example, an electric vehicle (EV), a hybrid vehicle (HEV) having both an internal combustion engine and an electric motor, a plug-in hybrid vehicle (PHEV), a rail vehicle obtained by changing these tire wheels to endless tracks, a motorized bicycle including an electric assist bicycle, a motorized bicycle, a motorcycle, an electric wheelchair, a golf cart, a small or large ship, a submarine, a helicopter, an aircraft, a rocket, a satellite, a space probe or a planetary probe, a spaceship, etc. can be mentioned. .

[0384] Fig. 38 shows an example of an electronic device. In Fig. 38, a display device 8000 is an example of an electronic device using a semiconductor device 8004 according to an aspect of the present invention. Specifically, the display device 800 0 corresponds to a display device for receiving TV broadcasts, and has a housing 8001, a display unit 8002, a speaker unit 8003, a semiconductor device 8004, a power storage device 8005, etc. The semiconductor device 8004 according to an aspect of the present invention is provided inside the housing 8001. By the semiconductor device 8004 , it is possible to control the driving of a cooling device such as a cooling fan inside the display device 8000 and the adjustment of the emission luminance. Further, the display device 8000 can receive power supply from a commercial power supply , or can use the power stored in the power storage device 8005. The display unit 8002 can use a display device such as a liquid crystal display device, a light emitting device having a light emitting element such as an organic EL element in each pixel, an electrophoretic display device, a DMD (Digital Micromirror Devi ce), a PDP (Plasma Display Panel), a FED (Field

[0385] Emission Display). ce), a PDP (Plasma Display Panel), a FED (Field Emission Display), etc.

[0386] In addition to being used for receiving TV broadcasts, the display device also includes display devices for personal computers, advertising displays, etc. All display devices for information display are included.

[0387] In FIG. 38, the installed lighting device 8100 is an example of an electronic device using the semiconductor device 8 103 according to one aspect of the present invention. Specifically, the lighting device 8100 includes a housing 8101, a light source 8102, a semiconductor device 8103, a power storage device 8105, etc. In FIG. 38, the semiconductor device 8103 is illustrated as being provided inside the ceiling 8104 where the housing 8101 and the light source 8102 are installed. However, the semiconductor device 8103 may be provided inside the housing 8101. The semiconductor device 8103 can control the emission luminance of the light source 8102, etc. In addition, the lighting device 8100 can receive power supply from a commercial power source or use the power stored in the power storage device.

[0388] In FIG. 38, the installed lighting device 8100 provided on the ceiling 8104 is illustrated. However, the semiconductor device according to one aspect of the present invention can also be used for installed lighting devices provided on, for example, side walls 8405, floors 8406, windows 8407, etc., other than the ceiling 8104, and can also be used for desktop lighting devices, etc.

[0389] In addition, as the light source 8102, an artificial light source that artificially obtains light using power can be used. Specifically, incandescent bulbs, discharge lamps such as fluorescent lamps, and light-emitting elements such as LEDs and organic EL elements can be cited as examples of the above artificial light sources.

[0390] In FIG. 38, an air conditioner having an indoor unit 8200 and an outdoor unit 8204 An example of an electronic device using the semiconductor device 8203 according to one aspect of the present invention. Specifically, the room indoor unit 8200 includes a housing 8201, an air outlet 8202, a semiconductor device 8203, a power storage device 820 5, etc. In FIG. 38, the case where the semiconductor device 8203 is provided in the indoor unit 8200 is illustrated, but the semiconductor device 8203 may be provided in the outdoor unit 8204. Alternatively, the semiconductor device 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204. The operation of the motor used in the compressor of the air conditioner can be controlled by the semiconductor device 8203. In addition, the air conditioner can receive power supply from a commercial power source, and can also use the power stored in the power storage device 8205.

[0391] Note that in FIG. 38, a separate type air conditioner composed of an indoor unit and an outdoor unit is illustrated, but the semiconductor device according to one aspect of the present invention can also be used in an integrated type air conditioner having the functions of the indoor unit and the outdoor unit in one housing.

[0392] In FIG. 38, the electric refrigerator 8300 is an example of an electronic device using the semiconductor device 8304 according to one aspect of the present invention. Specifically, the electric refrigerator 8300 includes a housing 8301, a refrigerator door 8302, a freezer door 8303, a semiconductor device 8304, a power storage device 8305, etc. In FIG. 38, the power storage device 8305 can control the operation of the motor used in the compressor of the electric refrigerator 8300 by the semiconductor device 8304 provided inside the housing 8301. In addition, the electric refrigerator 8300 can receive power supply from a commercial power source. ​​​​It can also receive power, or use the power stored in the power storage device 8305.

[0393] The portable game machine 2900 shown in FIG. 39(A) includes a housing 2901, a housing 2902, a display unit 2 903, a display unit 2904, a microphone 2905, a speaker 2906, an operation switch 29 07, etc. The portable game machine 2900 also includes an antenna and a battery inside the housing 2901. Note that the portable game machine shown in FIG. 39(A) has two display units 29 03 and a display unit 2904, but the number of display units is not limited to this. The display unit 2 903 is provided with a touch screen as an input device and can be operated with a stylus 2908 or the like.

[0394] The information terminal 2910 shown in FIG. 39(B) includes a housing 2911, a display unit 2912, a microphone 29 17, a speaker unit 2914, a camera 2913, an external connection unit 2916, and an operation switch 2915, etc. The display unit 2912 is provided with a display panel and a touch screen using a flexible substrate. The information terminal 2910 also includes an antenna and a battery inside the housing 2911. The information terminal 2910 can be used, for example, as a smartphone, a mobile phone, a tablet type information terminal, a tablet personal computer, an e-book terminal, etc.

[0395] The notebook personal computer 2920 shown in FIG. 39(C) includes a housing 2921, a display unit 2922, a keyboard 2923, and a pointing device 2924, etc. In addition, the notebook personal computer 2920 includes an antenna and a battery inside the housing 2921.

[0396] The video camera 2940 shown in FIG. 39(D) includes a housing 2941, a housing 2942, a display unit 29 43, an operation switch 2944, a lens 2945, a connection part 2946, etc. The operation switch 2944 and the lens 2945 are provided on the housing 2941, and the display unit 294 3 is provided on the housing 2942. Further, the video camera 2940 includes an antenna, a battery, etc. inside the housing 2941. And the housing 2941 and the housing 2942 are connected by a connection part 2946, and the angle between the housing 2941 and the housing 2942 can be changed by the connection part 29 46. Depending on the angle of the housing 2942 with respect to the housing 2941, the orientation of the image displayed on the display unit 2943 can be changed, and the display / non-display of the image can be switched.

[0397] An example of a bangle-type information terminal is shown in FIG. 39(E). The information terminal 2950 includes a housing 2951 , and a display unit 2952, etc. Further, the information terminal 2950 includes an antenna, a battery, etc. inside the housing 2951. The display unit 2952 is supported by a housing 2951 having a curved surface . Since the display unit 2952 is provided with a display panel using a flexible substrate, a flexible, lightweight, and easy-to-use information terminal 2950 can be provided.

[0398] An example of a wristwatch-type information terminal is shown in FIG. 39(F). The information terminal 2960 includes a housing 2961, a display unit 2962, a band 2963, a buckle 2964, an operation switch 2965, an input / output terminal 2966, etc. Further, the information terminal 2960 includes an antenna, a battery, etc. inside the housing 2961. The information terminal 2960 can be used for mobile phones, e-mails, text viewing and creation, ​​​​​It is possible to execute various applications such as music playback, Internet communication, and computer games. It can be executed.

[0399] The display surface of the display unit 2962 is curved, and display can be performed along the curved display surface. In addition, the display unit 2962 is provided with a touch sensor and can be operated by touching the screen with a finger or a stylus. For example, an application can be launched by touching the icon 2967 displayed on the display unit 2962. The operation switch 2965 can have various functions such as time setting, power on / off operation, wireless communication on / off operation, execution and cancellation of the silent mode, and execution and cancellation of the power saving mode. For example, the functions of the operation switch 29 65 can also be set by the operating system incorporated in the information terminal 2960. It is also possible to set the functions of the operation switch 29

[0400] In addition, the information terminal 2960 can execute short-range wireless communication conforming to a communication standard. For example, it is also possible to make a hands-free call by communicating with a wireless communication-enabled headset. In addition, the information terminal 2960 is provided with input / output terminals 2966 and can directly exchange data with other information terminals via a connector. It is also possible to perform charging via the input / output terminals 296 6. Note that the charging operation may be performed by wireless power supply without using the input / output terminals 2966. It may be performed by wireless power supply without using the input / output terminals 2966.

[0401] FIG. 39(G) is an external view showing an example of an automobile. The automobile 2980 has a vehicle body 2981, wheels 2982, a dashboard 2983, and lights 2984, etc. In addition, the automobile 2980 is provided with an antenna, a battery, etc.

[0402] The semiconductor device according to one aspect of the present invention can be used for the display unit, light emitting unit, motor, etc. of the above-described electronic device such as the control unit. Among the above-described electronic devices, in particular, high-frequency heating devices such as microwave ovens and electronic devices such as rice cookers require high power in a short period of time. In addition, it is necessary to stably control high power for a certain period of time. By using the semiconductor device according to one aspect of the present invention, the power can be stably controlled, so that a highly reliable electronic device can be realized.

[0403] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like is possible.

Example

[0404] The operation of the semiconductor device 100 was verified using the circuit simulator Smartspice version 4.10.6.R of Silvaco. The circuit model used for the verification is shown in FIG. 40 . Since there is no model of a transistor with a back gate in the circuit simulator, a model in which transistor 111a and transistor 111b are connected in parallel was used as transistor 111 .

[0405] The main setting parameters are Level = 36, VTO = 0.4197 V, the thickness of the gate insulating layer = 20 nm, L / W of transistor 111a = 0.5 μm / 300 μm, L / W of transistor 111b = 0.5 μm / 300 μm, L / W of transistor 112 = 0.5 μm / 1000 μm, L / W of transistor 113 = 0.5 μm / 400 μm, capacitance of capacitor element 11 7 = 10 pF, VDD = 3.3 V, GND = VSS = 0 V.

[0406] ​​​​ In the circuit diagram shown in FIG. 40, VIN indicates the signal supplied to terminal 102. Also, VO UT indicates the signal supplied to terminal 105. Also, VINB1 indicates the signal supplied to wiring 124. Also, VINB2 indicates the signal supplied to wiring 123. Also, VF1 indicates the potential of node 132.

[0407] FIG. 41 shows the verification results. When VIN becomes the H potential (VDD) in period 151, VO UT becomes the L potential (GND = VSS). Also, when VIN becomes the L potential in period 152, VOUT becomes equal to or higher than the H potential. From the verification results, it was confirmed that the semiconductor device 100 can function as an inverter circuit.

Description of Reference Numerals

[0408] 100 Semiconductor device 102 Terminal 105 Terminal 110 Semiconductor device 111 Transistor 112 Transistor 113 Transistor 114 Transistor 117 Capacitor element 120 Semiconductor device 121 Wiring 122 Wiring 123 Wiring 124 Wiring 125 Wiring 126 Wiring 131 Node 132 Node 151 Period 152 Period 223 Electrode 224 Electrode 225 Insulating layer 226 Insulating layer 227 Insulating layer 228 Insulating layer 229 Insulating layer 242 Semiconductor layer 243 Electrode 246 Electrode 255 Impurity 269 Region 271 Substrate 272 Insulating layer 273 Insulating layer 274 Insulating layer 275 Insulating layer 277 Insulating layer 282 Insulating layer 382 Ec 384 Ec 386 Ec 390 Trap level 410 Transistor 411 Transistor 420 Transistor 421 Transistor 425 Transistor 426 Transistor 430 Transistor 431 Transistor 440 Transistor 441 Transistor 442 Transistor 443 Transistor 444 Transistor 445 Transistor 446 Transistor 447 Transistor 448 Transistor 451 Transistor 452 Transistor 453 Transistor 454 Transistor 461 Transistor 462 Liquid crystal element 463 Capacitor element 464 Transistor 465 Node 466 Node 467 Node 468 Transistor 469 Light-emitting element 500 indicating device 511 drive circuit 512 shift register 513 DA conversion output circuit 514 level shifter 531 display area 532 pixel 534 pixel circuit 535 wiring 536 wiring 700 electronic component 702 printed circuit board 703 semiconductor device 704 mounting board 705 lead 1010 electric bicycle 1011 motor 1012 power storage device 1013 drive circuit 1020 electric vehicle 1021 motor 1022 power storage device 1023 drive circuit 1100 lighting device 1101 controller 1102 pre-driver 1103 voltage generation circuit 1104 light emitting part 1114 LED 1200 motor drive device 1201 controller 1202 pre-driver 1203 voltage generation circuit 1204 motor 2900 portable game machine 2901 housing 2902 housing 2903 display unit 2904 display unit 2905 microphone 2906 speaker 2907 operation switch 2908 stylus 2910 information terminal 2911 housing 2912 Display unit 2913 Camera 2914 Speaker unit 2915 Operation switch 2916 External connection part 2917 Microphone 2920 Notebook personal computer 2921 Housing 2922 Display unit 2923 Keyboard 2924 Pointing device 2940 Video camera 2941 Housing 2942 Housing 2943 Display unit 2944 Operation switch 2945 Lens 2946 Connection part 2950 Information terminal 2951 Housing 2952 Display unit 2960 Information terminal 2961 Housing 2962 Display unit 2963 Band 2964 Buckle 2965 Operation switch 2966 Input / output terminal 2967 Icon 2980 Automobile 2981 Vehicle body 2982 Wheel 2983 Dashboard 2984 Light 4001 Substrate 4002 Pixel part 4003 Signal line drive circuit 4004 Scanning line drive circuit 4005 Sealing material 4006 Substrate 4008 Liquid crystal layer 4010 Transistor 4011 Transistor 4013 Liquid crystal element 4014 Wiring 4015 Electrode 4017 Electrode 4018 FPC 4019 Anisotropic Conductive Layer 4020 Capacitor Element 4021 Electrode 4030 Electrode Layer 4031 Electrode Layer 4032 Insulating Layer 4033 Insulating Layer 4035 Spacer 4102 Insulating Layer 4103 Insulating Layer 4110 Insulating Layer 4111 Insulating Layer 4112 Insulating Layer 4510 Partition Wall 4511 Light Emitting Layer 4513 Light Emitting Element 4514 Filling Material 6000 Display Module 6001 Upper Cover 6002 Lower Cover 6003 FPC 6004 Touch Sensor 6005 FPC 6006 Display Panel 6007 Backlight Unit 6008 Light Source 6009 Frame 6010 Printed Circuit Board 6011 Battery 8000 Display Device 8001 Housing 8002 Display Section 8003 Speaker Section 8004 Semiconductor Device 8005 Power Storage Device 8100 Lighting Device 8101 Housing 8102 Light Source 8103 Semiconductor Device 8104 Ceiling 8105 Power Storage Device 8200 Indoor Unit 8201 Housing 8202 Air outlet 8203 Semiconductor device 8204 Outdoor unit 8205 Energy storage device 8300 Electric refrigerator-freezer 8301 Housing 8302 Door for refrigerator compartment 8303 Door for freezer compartment 8304 Semiconductor device 8305 Energy storage device 8405 Side wall 8406 Floor 8407 Window 100a Semiconductor device 100b Semiconductor device 100c Semiconductor device 100d Semiconductor device 110a Semiconductor device 110b Semiconductor device 111a Transistor 111b Transistor 120a Semiconductor device 120b Semiconductor device 120c Semiconductor device 225a Electrode 225b Electrode 225c Electrode 242a Semiconductor layer 242b Semiconductor layer 242c Semiconductor layer 242i Semiconductor layer 242t Semiconductor layer 242u Semiconductor layer 244a Electrode 244b Electrode 244c Electrode 247a Opening 247b Opening 247c Opening 247d Opening 383a Ec 383b Ec 383c Ec 4018b FPC 451a Transistor 453a Transistor 454a transistor 521a drive circuit 521b drive circuit 535_i wiring 536_j wiring

Claims

1. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate only above a channel forming region; the third transistor has a gate only above a channel formation region; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

2. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate above a channel forming region; the second transistor does not have a gate below a channel formation region; the third transistor has a gate above a channel forming region; the third transistor does not have a gate below a channel formation region; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

3. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate above a channel forming region; the second transistor does not have a back gate; the third transistor has a gate above a channel forming region; the third transistor does not have a back gate; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

4. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; a semiconductor layer in which a channel of the first transistor is formed, a semiconductor layer in which a channel of the second transistor is formed, and a semiconductor layer in which a channel of the third transistor is formed each contain an oxide semiconductor; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate only above a channel forming region; the third transistor has a gate only above a channel formation region; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

5. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; a semiconductor layer in which a channel of the first transistor is formed, a semiconductor layer in which a channel of the second transistor is formed, and a semiconductor layer in which a channel of the third transistor is formed each contain an oxide semiconductor; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate above a channel forming region; the second transistor does not have a gate below a channel formation region; the third transistor has a gate above a channel forming region; the third transistor does not have a gate below a channel formation region; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

6. a first transistor, a second transistor, a third transistor, and a capacitance element; the first transistor, the second transistor, and the third transistor are n-channel transistors; a semiconductor layer in which a channel of the first transistor is formed, a semiconductor layer in which a channel of the second transistor is formed, and a semiconductor layer in which a channel of the third transistor is formed each contain an oxide semiconductor; the first transistor has a first gate on one of an upper side and a lower side of a channel formation region; the first transistor has a second gate on the other of the upper side and the lower side of the channel formation region; the second transistor has a gate above a channel forming region; the second transistor does not have a back gate; the third transistor has a gate above a channel forming region; the third transistor does not have a back gate; one of a source and a drain of the first transistor is electrically connected to a first wiring; a first gate of the first transistor is electrically connected to the other of the source and the drain of the first transistor; a second gate of the first transistor is electrically connected to a fourth wiring; one of a source and a drain of the second transistor is electrically connected to a second wiring; the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor; one of a pair of electrodes of the capacitance element is electrically connected to the other of the source or the drain of the second transistor; one of a source and a drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the pair of electrodes of the capacitance element; a gate of the third transistor is electrically connected to a fifth wiring.

7. In any one of claims 4 to 6, The semiconductor device, wherein the oxide semiconductor contains indium.

Images