Memory system, host device, and control method

Abstract

To provide a memory system capable of efficiently executing garbage collection.SOLUTION: A controller of a memory system manages a plurality of zones by using first information storing correspondence among the plurality of zones and a plurality of storage areas of a non-volatile memory, and the status of each of the plurality of zones. The status includes a first status indicating that data has been written in the whole of a logical address area corresponding to the zone, and a second status indicating that the zone has been reset. The controller transmits, in response to reception of a first command requesting a zone to be applied to garbage collection, a first list containing information indicating the zone to be applied to garbage collection which is determined on the basis of the first information.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] Embodiments of the present invention relate to a memory system, a host device, and a control method.

Background Art

[0002] In recent years, memory systems equipped with non-volatile memories have become widespread. In an information processing system including a memory system and a host device that accesses the memory system, when updating data, the data is not directly overwritten on the non-volatile memory. Instead, the information processing system writes new data to a storage location different from the storage location where the old data is written on the non-volatile memory. Then, the information processing system updates the mapping so that the storage location of the data is changed from the old storage location to the new storage location. Thereby, the information processing system executes data update.

[0003] If such data updates are continued, data fragmentation may occur in the memory system. As a result, the storage area of the memory system stores invalid data that is not accessed by the host device. That is, the storage area of the memory system is consumed uselessly. Therefore, it is necessary to perform garbage collection on the data stored in the memory system. However, when garbage collection is executed in the memory system, problems may occur. This problem is, for example, deterioration of write amplification (WAF) in the memory system, and deterioration of QoS (Quality of Service) due to overlap between access to the host device and garbage collection.

[0004] Therefore, a technique that can efficiently execute garbage collection is required.

Prior Art Documents

Patent Documents

[0005] Patent Document 1 Japanese Patent Application Laid-Open No. 2020-046963 Patent Document 2 U.S. Patent Application Publication No. 2022 / 0318133 SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0006] A problem to be solved by one embodiment of the present invention is to provide a memory system, a host device, and a control method capable of efficiently performing garbage collection. MEANS FOR SOLVING THE PROBLEMS

[0007] According to an embodiment, the memory system is connectable to a host device. The memory system includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of storage areas. The controller controls access including writing and reading of data to and from the non-volatile memory based on a command received from the host device. The controller manages the plurality of zones using first information storing a correspondence between the plurality of zones and the plurality of storage areas and statuses of the plurality of zones respectively. The zone corresponds to a logical address range within a logical address space used in access from the host device to the memory system. The status includes a first status indicating that data has been written over the entire logical address range corresponding to the zone, and a second status indicating that the zone has been reset. In response to receiving a first command requesting a zone to be garbage collected from the host device, the controller transmits a first list including information indicating the zone to be garbage collected determined based on the first information to the host device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008]

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Mode for Carrying Out the Invention

[0009] Hereinafter, embodiments will be described with reference to the drawings.

[0010] FIG. 1 is a block diagram showing a configuration example of an information processing system 101 including a memory system 105 and a host device 102 according to the embodiment. The information processing system 101 includes a host device (host) 102 and a memory system 105. The host device 102 and the memory system 105 can be communicably connected via, for example, a bus.

[0011] The host device 102 is an information processing device. The host device 102 is, for example, a personal computer, a server computer, or a mobile device. The host device 102 accesses the memory system 105. Specifically, the host device 102 sends a command for controlling the memory system 105 to the memory system 105. The commands include, for example, input / output (I / O) commands and management commands. The I / O commands include commands for writing data to the non-volatile memory 112 or reading data from the non-volatile memory 112. The I / O commands include, for example, a write command or a read command. Also, the management commands include commands for the host device 102 to control zones. Details of the zones and management commands will be described later.

[0012] The memory system 105 is a storage device connectable to the host device 102. The memory system 105 includes, for example, Universal Flash Storage (UFS) or a solid state drive (SSD). The memory system 105 includes the non-volatile memory 112. The memory system 105 can be used, for example, as an external storage device for the host device 102. The memory system 105 may be an embedded flash memory or an SSD that complies with, for example, the UFS standard, the eMMC standard, or the NVMe TM standard and executes communication with the host device 102.

[0013] When at least a part of the storage area of the memory system 105 is controlled using a control method called zoned storage, the information processing system 101 including the host device 102 and the memory system 105 manages a plurality of zones. The memory system 105 associates one storage area in the memory system 105 with one zone. Each of the plurality of zones corresponds to a part of the logical address range within the logical address space used in the access from the host device 102 to the memory system 105. That is, a zone is a set of consecutive logical addresses. A logical address is an address that logically specifies a storage location within the logical address space in the memory system 105. As the logical address, for example, a logical block address (LBA) or the like can be used.

[0014] When file systems such as Flash-Friendly File System (F2FS) or databases using the Log Structure Merged (LSM) tree method are used, hierarchical data is managed by the host. At this time, the host manages data updates by changing the data pointer from the address before update to the address after update. Then, the host executes garbage collection to move new data and delete old data among the hierarchical data. However, when access from the host to the memory system is executed only by LBA-based access, it is difficult to appropriately manage hierarchical data in the memory system, and garbage collection is required not only in the host management but also in the memory system management. Therefore, control methods have been proposed that can eliminate the need for garbage collection in the management of the memory system, such as Zoned Namespace (ZNS) and Flexible Data Placement (FDP). For example, in ZNS, zones corresponding to logical address ranges are managed, and the memory system allows only sequential writes within the zone. The memory system allocates a storage area for the zone. Then, the memory system determines the storage area corresponding to the specified zone as the write destination storage area based on the identifier specifying the zone included in the write command received from the host. For this reason, each piece of data associated with a write command specifying the same zone will be stored in the same storage area. As a result, among the hierarchical data managed by the host, data at the same level is managed as data in the same zone and thus stored in the same storage area in the memory system. This can reduce garbage collection in the management of the memory system, thereby lowering the WAF of the memory system.

[0015] The zone transitions to one of a plurality of statuses based on the status of the zone. The plurality of statuses includes full, empty, open, and the like.

[0016] Full means that data is written over the entire logical address range corresponding to the zone. That is, a full zone is a zone where data writing starts from the logical address at the beginning of the zone and is executed up to the logical address at the end of the zone. Alternatively, a zone for which writing has been completed transitions to a full zone. Also, a full zone stores at least valid data. Valid data is data that may be accessed from the host device 102. Data that has no possibility of being accessed from the host device 102 is called invalid data.

[0017] Empty is the state of a reset zone. An empty zone is a zone that stores only data that has no possibility of being accessed from the host device 102, that is, invalid data. An empty zone is a zone where data writing is possible starting from the logical address at the beginning of the zone.

[0018] Open is the state during writing. When the host device 102 designates a zone as the write destination, it transitions that zone to open. When the host device 102 newly opens a zone, it selects an arbitrary zone from the empty zones and transitions it to open.

[0019] Next, the configuration of the host device 102 will be described. The host device 102 includes a host controller 103 and a host memory 104.

[0020] The host controller 103 is, for example, a central processing unit (CPU). The host controller 103 is also referred to as a processor. The host controller 103 can be configured as a system-on-a-chip (SoC). The host controller 103 can be composed of one or more processors. The host controller 103 executes software (host software) loaded from the memory system 105 or another storage device connected to the host device 102 into the host memory 104. The host software includes, for example, an operating system, a file system, and application programs. The host controller 103 executes, for example, a file system compliant with F2FS.

[0021] The host controller 103 manages whether the data stored in each zone is valid data. That is, the host controller 103 manages the correspondence between the information specifying the data and the information indicating the logical address within the zone in the host device 102. Information indicating the logical address within the zone managed by the host controller 103 uses, for example, segments. The data stored in the segment associated with the information specifying the data is valid data. On the other hand, the data stored in the segment not associated with the information specifying the data is invalid data. The host controller 103 can use metadata as data for managing the correspondence between the information specifying the data and the segment. Details of the metadata will be described later.

[0022] The host memory 104 is, for example, a volatile memory. The host memory 104 is also referred to as the main memory or the system memory. The host memory 104 is, for example, a dynamic random access memory (DRAM). A part of the storage area of the host memory 104 is used, for example, as a working area for the host controller 103.

[0023] Next, the configuration of the memory system 105 will be described. The memory system 105 includes a controller 106, a buffer memory 111, and a non-volatile memory 112.

[0024] The controller 106 is a circuit that functions as a memory controller. The controller 106 is a semiconductor device such as, for example, a system-on-a-chip (SoC). The controller 106 is electrically connected to the non-volatile memory 112. The controller 106 executes a write process and a read process based on each of the I / O commands received from the host device 102. The write process is a process for writing data to the non-volatile memory 112. The read process is a process for reading data from the non-volatile memory 112. As a standard for the interface that electrically connects the controller 106 and the non-volatile memory 112, for example, a Toggle interface or an Open NAND Flash Interface (ONFI) is used. Also, the controller 106 may be electrically connected to the buffer memory 111. The controller 106 executes writing of data to the buffer memory 111 and reading of data from the buffer memory 111. The functions of each part of the controller 106 can be realized by dedicated hardware, a processor that executes a program, or a combination of this dedicated hardware and the processor.

[0025] The buffer memory 111 is, for example, a volatile memory. The buffer memory 111 is, for example, a DRAM or a static RAM (SRAM). The buffer memory 111 is used, for example, as a working area of the controller 106. A part of the storage area of the buffer memory 111 is used as a write buffer for temporarily storing data received from the host device 102. Also, another part of the storage area of the buffer memory 111 is used as a read buffer for temporarily storing data read from the non-volatile memory 112. Furthermore, another part of the storage area of the buffer memory 111 may be used for temporarily storing tables and lists for the management of the memory system 105. The tables and lists used for the management of the memory system 105 include, for example, a lookup table (LUT), a zone status management table, and a garbage collection (GC) recommended zone list. Details of the lookup table, the zone status management table, and the GC recommended zone list will be described later.

[0026] The non-volatile memory 112 is a semiconductor memory device. The non-volatile memory 112 is realized, for example, by a NAND-type flash memory. Hereinafter, the case where the non-volatile memory 112 is realized as a NAND-type flash memory will be assumed for explanation. The non-volatile memory 112 is, for example, a flash memory having a plurality of memory cells in a two-dimensional structure or a three-dimensional structure. The non-volatile memory 112 includes a plurality of blocks. Each of the plurality of blocks is a unit of data erasure operation. In the NAND-type flash memory, data overwrite is not directly executed on a storage area where data has been written once. In the NAND-type flash memory, after a data erasure operation is executed on a storage area where data has been written once, new data is written again.

[0027] The data written to the non-volatile memory 112 is managed by a mapping between the physical address indicating the storage location of the non-volatile memory 112 and the logical address used in access by the host device 102. This mapping is managed by the controller 106 using a lookup table. When data is written to the non-volatile memory 112 based on a write command received from the host device 102, the mapping between the physical address indicating the storage location where the data was written and the logical address specified by this write command is recorded in the lookup table. Thereafter, when new data is written to another storage location of the non-volatile memory 112 based on a new write command specifying the same logical address, in the lookup table, for this logical address, the physical address indicating the other storage location where the new data was written is mapped. Thereby, the data is updated, and the data written to the original storage location becomes invalid data in the memory system 105. That is, since the physical address indicating the storage location storing the invalid data is not associated with the logical address, there is no possibility of being accessed by the host device 102. Also, in the lookup table, the data stored in the storage location indicated by the physical address associated with the logical address is referred to as valid data in the memory system 105. That is, valid data is data that may be accessed by the host device 102.

[0028] The valid data and invalid data in the memory system 105 described herein do not necessarily match the valid data and invalid data managed in the host device 102 described above. Specifically, in the host device, a process such as writing updated data to another zone (logical address) is performed. As a result, within the zone of the memory system 105, unupdated data and old data to which updated data has been written in another zone are mixed. This is referred to as fragmentation. In this case, from the perspective of the memory system 105, since only a write to another zone has occurred, it is impossible to determine that the data in the original zone has been updated. As a result, in the valid data in the memory system 105, the valid data and invalid data in the host device 102 are mixed. Hereinafter, the valid data in the host device 102 is simply referred to as valid data.

[0029] Next, the internal configuration of the controller 106 will be described. The controller 106 includes, for example, a host interface 107, a buffer interface 108, a memory interface 109, and a CPU 110. The host interface 107, the buffer interface 108, the memory interface 109, and the CPU 110 may be interconnected via an internal bus. The controller 106 is configured as an electronic circuit including these components.

[0030] The host interface 107 is an interface circuit that executes communication with the host device 102. The host interface 107 executes, for example, a process of receiving a command issued by the host device 102 and a process of transmitting a completion response to the host device 102. The completion response indicates that the execution of the command issued from the host device 102 has been completed.

[0031] The buffer interface 108 is an interface circuit that executes communication with the buffer memory 111. The buffer interface 108 controls the communication between the controller 106 and the buffer memory 111. The buffer interface 108 is, for example, an interface circuit that enables access to the buffer memory 111 at DDR (Double-Data-Rate). The buffer interface 108 stores data in the buffer memory 111. Also, the buffer interface 108 reads out the data stored in the buffer memory 111.

[0032] The memory interface 109 is an interface circuit that controls the non-volatile memory 112. The memory interface 109 is electrically connected to a plurality of flash dies included in the non-volatile memory 112. The flash die is a non-volatile memory die. The flash die is also referred to as a memory chip or simply a die. The memory interface 109 is connected to each of the flash dies 113-1 to 18 via a plurality of channels. For example, the flash dies 113-1 to 18 can be treated as one bank. A bank is a unit that operates a plurality of flash dies in parallel by an interleaving operation.

[0033] The CPU 110 is a processor. The CPU 110 loads a control program (firmware) stored in the non-volatile memory 112 or a ROM (not shown) into an SRAM (not shown). Then, the CPU 110 performs various processes by executing this firmware. Note that the firmware may be loaded into the buffer memory 111. The CPU 110 may be composed of one or a plurality of processors.

[0034] When the memory system 105 is controlled using a control method called zoned storage, the CPU 110 manages a plurality of zones. As described above, a zone corresponds to a partial logical address range within the logical address space. The CPU 110 manages the correspondence between each of the plurality of zones and the storage area of the memory system 105. When a new zone is opened, the CPU 110 allocates one storage area to the opened zone. Also, when a zone is reset, the CPU 110 releases the allocation between the reset zone and the storage area.

[0035] The memory system 105 allows only sequential data writing within one zone. As a result, from the perspective of the memory system 105, fragmentation does not occur within the zone, so it is not necessary to execute garbage collection in the memory system 105. By not executing garbage collection in the memory system 105, write amplification does not increase. Therefore, it also does not occur that the access performance (QoS) from the host device 102 deteriorates due to the conflict between the execution of garbage collection and the access from the host device 102.

[0036] However, from the perspective of the host device 102, fragmentation may occur within the zone. Therefore, in the information processing system 101, as described below, the memory system 105 executes garbage collection based on commands issued from the host device 102. When the host device 102 identifies a zone for which garbage collection should be executed, it performs an operation of rewriting the valid data stored in the identified zone to another zone as garbage collection. For example, the host device 102 sends a read command for reading data stored in the zone for which garbage collection should be executed and a write command for writing the read data to another zone to the memory system 105. Alternatively, the host device 102 may send a copy command for copying the valid data stored in the zone for which garbage collection should be executed to another zone to the memory system 105. At this time, the zone to which the data is written may be a newly opened zone or an already opened zone in the middle of writing. Such garbage collection is a data write based on a command issued by the host device 102, so it has little impact on the WAF and QoS of the memory system 105.

[0037] When a zone that contains only invalid data occurs, the host device 102 issues a zone reset command for designating and resetting that zone. Upon receiving the zone reset command, the memory system 105 transitions the zone specified by the zone reset command to empty. An empty zone is a zone capable of executing a data erasure operation. When the size of the zone matches the data erasure unit or is a multiple of the data erasure unit, the memory system 105 can execute a data erasure operation on the zone that has transitioned to empty.

[0038] However, in recent years, as the stacking of NAND flash memories has advanced, the size of data that can be stored in one physical block has increased. Therefore, in order to avoid the data management unit from becoming too large, it is assumed that the size of the zone is smaller than the data erasure unit. That is, it is assumed that a single data erasure unit contains multiple zones. At this time, the memory system 105 cannot execute a data erasure operation on the data erasure unit until all the zones within the data erasure unit become empty. That is, even if a certain zone transitions to empty, if the data erasure unit containing that zone also contains non-empty (e.g., full) zones, the memory system 105 cannot execute a data erasure operation on that zone.

[0039] This problem can be addressed by performing garbage collection within the memory system 105 to rewrite non-empty zones within a certain data erasure unit to other data erasure units. However, performing garbage collection within the memory system 105 will cause deterioration of the WAF and QoS of the memory system 105. Furthermore, since garbage collection will be executed under the management of both the host device 102 and the memory system 105, it becomes an inefficient control method.

[0040] Therefore, in this embodiment, the memory system 105 provides the host device 102 with information on the zones to be garbage collected. The zones to be garbage collected are also referred to as garbage collection recommended zones or garbage collection candidate zones. Then, based on the information on the zones to be garbage collected provided by the memory system 105, the host device 102 determines the valid data to be rewritten by garbage collection. Thereby, it is possible to solve the problems that occur when the size of the zone is smaller than the data erasure unit without performing garbage collection under the management of the memory system 105.

[0041] Next, the internal configuration of the flash die will be described. FIG. 2 is a block diagram showing a configuration example of the flash die included in the memory system 105 according to the embodiment. Here, the flash die 113-1 will be illustrated and described as an example, but the other flash dies 113-2 to 113-18 also have the same configuration as the flash die 113-1.

[0042] The flash die 113-1 includes two planes (plane PLN1 and plane PLN2) and two peripheral circuits (peripheral circuit 114-1 and peripheral circuit 114-2) corresponding to the two planes respectively.

[0043] Each of the plane PLN1 and the plane PLN2 includes a memory cell array. The memory cell arrays of each of the plane PLN1 and the plane PLN2 include physical blocks BLK1 to physical block BLKx. Each of the physical blocks BLK1 to physical block BLKx is also referred to as a flash block or a memory block. Each of the physical blocks BLK1 to physical block BLKx includes pages P1 to page Py. Each of the pages P1 to page Py is a unit of data writing operation and data reading operation. Each of the pages P1 to page Py includes, for example, a plurality of memory cells connected to the same word line.

[0044] Each of the peripheral circuit 114-1 and the peripheral circuit 114-2 is a circuit that controls the memory cell array of the corresponding plane. The peripheral circuit 114-1 corresponds to the plane PLN1. Also, the peripheral circuit 114-2 corresponds to the plane PLN2. Each of the peripheral circuit 114-1 and the peripheral circuit 114-2 includes, for example, a row decoder, a column decoder, a sense amplifier, and a page buffer. Each of the peripheral circuit 114-1 and the peripheral circuit 114-2 executes a program operation, a read operation, or an erase operation on the memory cell array of the corresponding plane in response to receiving an address and a command from the memory interface 109.

[0045] Next, the super block will be described. FIG. 3 is a block diagram showing a configuration example of a super block in the memory system 105 according to the embodiment. The memory system 105 constitutes a super block which is a set of physical blocks. The set of physical blocks constituting the super block is a set of physical blocks each selected one by one from planes capable of parallel operation. The super block is also referred to as a logical block. Here, the case where the number of channels is 18, the number of banks is 1, and the number of planes is 2 will be described.

[0046] One super block includes a total of 36 physical blocks each selected one by one from each plane of 18 flash dies corresponding to a configuration of 18 channels × 1 bank. In addition, when each of the flash dies 113-1 to 18 has a configuration of only one plane, one super block includes a total of 18 physical blocks each selected one by one from the flash dies 113-1 to 18.

[0047] In FIG. 3, one super block SB5 (super block 5) including 36 physical blocks is illustrated. Here, the super block SB5 is constituted by the physical blocks BLK5 of the planes PLN1 and PLN2 of each of the flash dies 113-1 to 18.

[0048] The memory system 105 can execute a data erasure operation in units of super blocks. Hereinafter, it is assumed that in the memory system 105, a data erasure operation is executed in units of super blocks. That is, the memory system 105 executes a data erasure operation on the super block SB5 when all the data of the super block SB5 is invalid data in the memory system 105.

[0049] For example, one superblock includes at least two memory areas. Each of the at least two memory areas spans a plurality of physical blocks that make up the superblock. Also, each of the at least two memory areas corresponds to each of at least two zones. The controller 106 determines, for example, that the superblock SB5 is a superblock capable of executing a data erasure operation when all the zones included in the superblock SB5 are empty. Therefore, when at least one of the zones included in the superblock SB5 is not empty, the memory system 105 does not execute a data erasure operation on the superblock SB5.

[0050] Next, the functional configuration of the information processing system 101 will be described. FIG. 4 is a block diagram showing a functional configuration example of the information processing system 101 including the memory system 105 and the host device 102 according to the embodiment.

[0051] First, the functional configuration of the host controller 103 of the host device 102 will be described. The host controller 103 includes an application 201 and a VFS (Virtual File System) / database 202. The application 201 accesses the VFS / database 202 in order to generate an access to the memory system 105.

[0052] The VFS / database 202 includes an API (Application Programing Interface) processing unit 203, an I / O transmission unit 204, a garbage collection (GC) processing unit 205, and an I / O completion processing unit 207.

[0053] The API processing unit 203 receives accesses from the application 201. The API processing unit 203 interprets the received accesses. Then, the API processing unit 203 instructs the I / O transmission unit 204 to create commands to be issued to the memory system 105. Also, the API processing unit 203 may notify the GC processing unit 205 that there has been no access from the application 201 for a certain period of time or more.

[0054] The I / O transmission unit 204 creates commands to be transmitted to the memory system 105. The I / O transmission unit 204 creates commands based on instructions from the API processing unit 203. Also, the I / O transmission unit 204 creates commands based on instructions from the GC processing unit 205. The I / O transmission unit 204 transmits the created commands to the host interface 107 of the memory system 105. The I / O transmission unit 204 transmits, for example, I / O commands and management commands.

[0055] Examples of I / O commands include a write command, a read command, and a copy command.

[0056] The write command is a command for writing data to the non-volatile memory 112. The write command is a command that specifies a logical address and the size of the write data, and requests writing of the write data to the storage location corresponding to the specified logical address. The logical address specified by the write command is also referred to as the start logical address (start LBA) or the logical address of the write destination. Specifically, the write command specifies the start logical address (start LBA), the size of the write data, and an address indicating the storage location in the host memory 104 where the write data is stored. Also, when a plurality of zones are managed in the memory system 105, the start logical address specified by the write command may include information specifying the write destination zone among the plurality of zones. In this case, the write command includes information indicating the offset from the start logical address of the write destination zone to the storage location where the write data is written.

[0057] Also, a zone append command may be used as a command for writing data to the memory system 105. The zone append command includes information specifying the zone to be written instead of the start logical address. For writing data based on the zone append command, the write destination logical address is determined by the controller 106 so that the data is written sequentially in the write destination zone. Therefore, the completion response corresponding to the zone append command includes the logical address (offset) corresponding to the written data.

[0058] The read command is a command for reading data from the non-volatile memory 112. The read command is a command that specifies a logical address and requests reading of data from the storage location corresponding to the logical address. The logical address specified by the read command is also referred to as the start logical address (start LBA). Specifically, the read command specifies a logical address, the size of the data to be read, and an address indicating the storage location in the host memory 104 to which the read data is transferred. Also, when a plurality of zones are managed in the memory system 105, the start logical address specified by the read command includes information indicating the zone to be read and information indicating the offset from the start logical address of the read destination zone to the storage location where the data read is stored.

[0059] The copy command is a command that requests to copy the data written at the memory location corresponding to the source logical address to the memory location corresponding to the destination logical address. The copy command specifies the source logical address, the destination logical address, and the size of the data to be copied. The copying of data from the memory location corresponding to the source logical address to the memory location corresponding to the destination logical address is executed inside the memory system 105. Therefore, in the data copy operation, the transfer of data from the memory system 105 to the host device 102 and the transfer of data from the host device 102 to the memory system 105 are not executed. The data to be copied is read from the memory location corresponding to the source logical address among the plurality of memory locations included in the memory area corresponding to the source zone including the source logical address. The read data is written to the memory location corresponding to the destination logical address among the plurality of memory locations included in the memory area corresponding to the destination zone including the destination logical address.

[0060] The management commands include, for example, a zone reset command.

[0061] The zone reset command is a command for transitioning a zone to empty. The zone reset command includes information specifying the zone. The memory system 105 that has received the zone reset command transitions the zone specified by the zone reset command to empty.

[0062] The GC processing unit 205 performs garbage collection. The GC processing unit 205 starts garbage collection, for example, when a certain period of time has elapsed since the previous access to the application 201 and a write of a predetermined amount or more of data has occurred since the previous garbage collection was performed. When starting garbage collection, the GC processing unit 205 instructs the I / O transmission unit 204 to issue a command for acquiring the zone to be garbage collected. A command for acquiring the zone to be garbage collected is also referred to as a garbage collection (GC) recommended zone acquisition command.

[0063] The I / O completion processing unit 207 processes the completion response received from the memory system 105. By processing the completion response, the I / O completion processing unit 207 notifies the application 201 that the processing based on the command corresponding to the completion response has been completed. Also, in response to receiving a completion response corresponding to a write command, the I / O completion processing unit 207 updates the metadata indicating the correspondence between the data associated with the write command and the logical address. In response to receiving a completion response corresponding to a read command, the I / O completion processing unit 207 acquires the data read from the non-volatile memory 112. In response to receiving a completion response corresponding to the GC recommended zone acquisition command, the I / O completion processing unit 207 acquires information indicating the zone to be garbage collected from the memory system 105. The I / O completion processing unit 207 transmits the acquired information indicating the zone to be garbage collected to the GC processing unit 205.

[0064] The GC processing unit 205 includes a Victim segment determination unit 206.

[0065] The Victim segment determination unit 206 determines valid data to be moved by garbage collection. For example, the Victim segment determination unit 206 determines a zone to be garbage-collected based on information indicating a zone to be garbage-collected provided from the memory system 105 via the I / O completion processing unit 207 and mapping information managed in the host device 102. The zone to be garbage-collected is also referred to as the Victim zone. Then, the Victim segment determination unit 206 determines the valid data stored in the determined Victim zone as the Victim segment. At this time, the Victim segment determination unit 206 determines the data to be moved so that the size of the data to be moved is a multiple of the unit (segment) of data writing. The data to be moved is also referred to as the Victim segment. The segment is set by the host device 102 or the memory system 105. For a logical block address (LBA) of 4 KiB, the segment is, for example, 2 MiB. Also, the Victim segment determination unit 206 may determine the Victim segment so that all the valid data included in the Victim zone is moved to other zones.

[0066] The GC processing unit 205 executes garbage collection for rewriting data corresponding to the Victim segment determined by the Victim segment determination unit 206 to other zones. For example, the GC processing unit 205 instructs the I / O transmission unit 204 to issue a read command specifying the Victim segment and to issue a write command for writing the read valid data to other zones. Alternatively, the GC processing unit 205 may instruct the I / O transmission unit 204 to issue a copy command for copying the valid data corresponding to the Victim segment to other zones.

[0067] Next, the functional configuration of the CPU 110 in the memory system 105 will be described. The CPU 110 includes a memory conversion layer 208 and a garbage collection (GC) recommended zone acquisition unit 209.

[0068] The memory conversion layer 208 manages mapping information between the logical addresses used by the host device 102 and the physical addresses indicating storage locations within the non-volatile memory 112. In response to receiving a command from the host device 102, the memory conversion layer 208 performs an address conversion from a logical address to a physical address. The memory conversion layer 208 refers to a lookup table to obtain the corresponding physical address for the logical address specified by the command transmitted from the host device 102. Based on the obtained physical address, the memory conversion layer 208 transmits instructions for writing and reading data to the memory interface 109.

[0069] The GC recommended zone acquisition unit 209 identifies the zone to be garbage-collected (GC recommended zone). In response to receiving a GC recommended zone acquisition command via the host interface 107, the GC recommended zone acquisition unit 209 identifies the GC recommended zone and transmits the identified GC recommended zone to the host device 102 via the host interface 107. The GC recommended zone acquisition unit 209 selects the GC recommended zone by referring to the zone status management table. Here, the GC recommended zone acquisition unit 209 may select two or more zones as the GC recommended zones.

[0070] Also, in response to receiving a GC recommended zone acquisition command, the GC recommended zone acquisition unit 209 may create a GC recommended zone list including information indicating zones to be garbage collected. Then, the GC recommended zone acquisition unit 209 transmits the created GC recommended zone list to the host device 102 via the host interface 107. The GC recommended zone acquisition unit 209 may create a GC recommended zone list in advance. For example, the GC recommended zone acquisition unit 209 stores the created GC recommended zone list in a buffer memory 111 or the like. In that case, in response to receiving a GC recommended zone acquisition command from the host device 102, the GC recommended zone acquisition unit 209 reads out the GC recommended zone list from the buffer memory 111. Then, the GC recommended zone acquisition unit 209 transmits the read-out GC recommended zone list to the host device 102.

[0071] Next, each process executed in the information processing system 101 will be described.

[0072] First, the write process will be described. The write process starts when the application 201 requests the API processing unit 203 to write data to the memory system 105.

[0073] Based on the data write request from the application 201, the API processing unit 203 assigns a logical address of the write destination to the data to be written. Then, the API processing unit 203 instructs the I / O transmission unit 204 to create a write command specifying the assigned logical address.

[0074] Based on the instruction from the API processing unit 203, the I / O transmission unit 204 creates a write command and transmits the created write command to the host interface 107 of the memory system 105.

[0075] Via host interface 107, the memory conversion layer 208 of CPU 110 receives a write command. Based on the logical address specified by the received write command, the memory conversion layer 208 determines the physical address of the write destination. The memory conversion layer 208 designates the determined physical address and instructs the non-volatile memory 112 to write data via the memory interface 109. The memory conversion layer 208 may determine a storage location within the storage area to which the zone is assigned based on the zone to which the logical address of the write destination belongs. The non-volatile memory 112 executes the data writing based on the instruction from the memory interface 109.

[0076] The host interface 107 transmits a completion response corresponding to the received write command to the I / O completion processing unit 207.

[0077] In response to receiving the completion response, the I / O completion processing unit 207 notifies the application 201 that the processing based on the write command has been completed. Also, the I / O completion processing unit 207 updates the correspondence between the data and the logical address based on the completion of the data writing.

[0078] Next, the read process will be described. The read process starts when the application 201 requests the API processing unit 203 to read data from the memory system 105.

[0079] Based on the request from the application 201 to read data, the API processing unit 203 acquires the logical address corresponding to the data to be read. Then, the API processing unit 203 instructs the I / O transmission unit 204 to create a read command specifying the acquired logical address.

[0080] Based on the instruction from the API processing unit 203, the I / O transmission unit 204 creates a read command and transmits the created read command to the host interface 107 of the memory system 105.

[0081] Via host interface 107, the memory conversion layer 208 of CPU 110 receives a read command. Based on the logical address specified by the received read command, the memory conversion layer 208 determines the physical address of the read target. The memory conversion layer 208 specifies the determined physical address and instructs the non-volatile memory 112 to read data via the memory interface 109. The memory conversion layer 208 may determine the storage position within the storage area to which the zone is allocated based on the zone to which the logical address of the read target belongs. The non-volatile memory 112 executes data reading based on the instruction from the memory interface 109.

[0082] The host interface 107 transmits the completion response corresponding to the received read command and the data read from the non-volatile memory 112 to the I / O completion processing unit 207.

[0083] In response to receiving the completion response, the I / O completion processing unit 207 notifies the application 201 that the data reading process based on the read command has been completed.

[0084] Next, the garbage collection operation will be described. The GC processing unit 205 starts the garbage collection operation. The GC processing unit 205 starts the garbage collection operation, for example, when the free capacity of the memory system 105 falls below the threshold, when fragmentation is detected by writing data to the memory system 105, or when a certain amount of time has elapsed since the previous garbage collection. The GC processing unit 205 may execute the garbage collection operation in response to being notified by the API processing unit 203 that there has been no access from the application 201 for a certain period of time.

[0085] First, the GC processing unit 205 instructs the I / O transmission unit 204 to issue a GC recommended zone acquisition command. The I / O transmission unit 204 creates a GC recommended zone acquisition command and transmits the created GC recommended zone acquisition command to the memory system 105.

[0086] The GC recommended zone acquisition unit 209 of the memory system 105 receives the GC recommended zone acquisition command via the host interface 107. In response to receiving the GC recommended zone acquisition command, the GC recommended zone acquisition unit 209 transmits a GC recommended zone list including information indicating the zones to be garbage-collected, which is determined based on the zone status management table, to the host device 102. For example, the GC recommended zone acquisition unit 209 selects a superblock composed only of full zones and empty zones, in which the ratio of full zones is lower than a threshold. Then, the GC recommended zone acquisition unit 209 stores information indicating each of one or more full zones included in the selected superblock in the GC recommended zone list. That is, the GC recommended zone list stores information indicating zones such that when the zones become empty, a data erasure operation can be executed on the superblock to which the zones belong.

[0087] The I / O completion processing unit 207 receives the GC recommended zone list via the host interface 107. Then, the I / O completion processing unit 207 transmits the received GC recommended zone list to the Victim segment determination unit 206 of the GC processing unit 205.

[0088] The Victim segment determination unit 206 determines the zones to be garbage-collected based on the received GC recommended zone list. At this time, the Victim segment determination unit 206 refers not only to the GC recommended zone list but also to the mapping of valid data within each zone to determine the zones to be garbage-collected.

[0089] Then, the Victim segment determination unit 206 determines valid data within the zone targeted for garbage collection as the Victim segment.

[0090] The GC processing unit 205 instructs the I / O transmission unit 204 to issue a read command specifying the Victim segment determined by the Victim segment determination unit 206.

[0091] When data is read based on this read command, the GC processing unit 205 determines the logical address of the write destination of the read Victim segment. Then, the GC processing unit 205 instructs the I / O transmission unit 204 to issue a write command for writing the read data to the new logical address.

[0092] As a result, the Victim segment is moved from the zone targeted for garbage collection to a new zone. Then, the zone targeted for garbage collection becomes a zone containing only invalid data. Therefore, the I / O transmission unit 204 issues a zone reset command specifying the zone targeted for garbage collection to the memory system 105.

[0093] Upon receiving the zone reset command, the CPU 110 of the memory system 105 transitions the zone specified by the zone reset command to empty. In response to the zone being transitioned to empty, the CPU 110 updates the zone status management table.

[0094] Here, in the case where a read command and a write command are transmitted from the host device 102 to the memory system 105 during data movement in garbage collection, it has been described. However, a copy command may be used instead of the read command and the write command.

[0095] Next, a configuration example of the host memory 104 will be described. FIG. 5 is a block diagram showing a configuration example of the host memory 104 included in the host device 102 according to the embodiment.

[0096] The storage area of the host memory 104 includes a storage area used as the command transmission queue 301, a storage area used as the command completion queue 302, and a storage area used as the data buffer area 303.

[0097] The command transmission queue 301 stores commands to be transmitted to the memory system 105. The I / O transmission unit 204 of the host controller 103 stores the generated commands in the command transmission queue 301 in order to transmit the commands to the memory system 105. Then, the host interface 107 of the memory system 105 acquires (fetches) the commands stored in the command transmission queue 301. Thereby, commands are transmitted from the host device 102 to the memory system 105. The command transmission queue 301 is also referred to as a submission queue (SQ).

[0098] The command completion queue 302 stores the completion responses generated by the controller 106. The controller 106 generates a completion response based on the command received from the host device 102 and stores the generated completion response in the command completion queue 302. The completion response corresponding to the write command includes, for example, information indicating that the data writing based on the write command has been executed normally. The completion response corresponding to the read command includes, for example, information indicating that the data reading based on the read command has been executed normally. When processing the completion response corresponding to the read command, the host controller 103 acquires the data read based on the read command from the data buffer area 303.

[0099] In addition, the completion response corresponding to the GC recommended zone acquisition command includes information indicating, for example, that the process of acquiring the GC recommended zone list has been executed normally. When processing the completion response corresponding to the GC recommended zone acquisition command, the host controller 103 acquires the GC recommended zone list from the data buffer area 303. Hereinafter, for simplicity, the process of processing the completion response and transferring data from the memory system 105 to the host device 102 is referred to as transmitting the completion response and data from the memory system 105 to the host device 102.

[0100] The command transmission queue 301 and the command completion queue 302 may be realized by, for example, a ring buffer. The ring buffer includes a plurality of entries. The ring buffer is managed using two pointers, a head pointer and a tail pointer. The head pointer is a pointer indicating the entry in which the next command or completion response to be processed is stored. The tail pointer is a pointer indicating the entry in which the next command or completion response is to be stored.

[0101] The data buffer area 303 is a storage area where data is temporarily stored. The data buffer area 303 temporarily stores data to be written to the non-volatile memory 112 based on a write command. The data buffer area 303 temporarily stores data read from the non-volatile memory 112 based on a read command. In addition, the data buffer area 303 temporarily stores the GC recommended zone list received from the memory system 105 based on the GC recommended zone list acquisition command.

[0102] Next, the procedure of the Victim zone determination process will be described. FIG. 6 is a sequence diagram showing the procedure of the Victim zone determination process executed in the information processing system 101 including the memory system 105 and the host device 102 according to the embodiment.

[0103] The GC processing unit 205 starts garbage collection including victim zone determination processing when, for example, fragmentation has occurred after writing of a predetermined amount or more of data and there is no access from the host device 102 to the memory system 105. Also, the GC processing unit 205 may start garbage collection when a certain period of time has elapsed since the previous garbage collection was executed. Furthermore, the GC processing unit 205 starts garbage collection when the free capacity of the memory system 105 decreases. When garbage collection is started, the GC processing unit 205 executes victim zone determination processing for determining a zone to be the target of garbage collection.

[0104] First, the GC processing unit 205 of the host device 102 transmits a GC recommended zone acquisition command to the memory conversion layer 208 of the memory system 105 (S101).

[0105] In response to receiving the GC recommended zone acquisition command in S101, the memory conversion layer 208 requests a GC recommended zone list from the GC recommended zone acquisition unit 209 (S102).

[0106] The GC recommended zone acquisition unit 209 that has received the request in S102 creates a GC recommended zone list based on the zone status management table (S103). Here, the GC recommended zone acquisition unit 209 may read out the GC recommended zone list created in advance based on the zone status management table and stored in the buffer memory 111 from the buffer memory 111.

[0107] The GC recommended zone acquisition unit 209 transmits the GC recommended zone list created in S103 to the memory conversion layer 208 (S104).

[0108] The memory conversion layer 208 transmits a completion response corresponding to the GC recommended zone acquisition command received in S101 and the GC recommended zone list received in S104 to the GC processing unit 205 (S105).

[0109] Based on the GC recommended zone list received in S105, the GC processing unit 205 determines the Victim zone (S106). The GC processing unit 205 may determine the Victim zone with reference not only to the GC recommended zone list received in S105 but also to the metadata indicating the valid data within each zone managed in the host device 102.

[0110] Thereby, the memory system 105 can provide the host device 102 with the zone to be garbage collected. Then, the host device 102 can determine the zone to be garbage collected (Victim zone) based on the information (GC recommended zone list) indicating the zone to be garbage collected provided from the memory system 105.

[0111] Therefore, the memory system 105 can provide the host device 102 with the GC recommended zone list so that garbage collection can be performed to ensure more free space for the size of the data to be rewritten.

[0112] Next, the logical units in the memory system 105 will be described. FIG. 7 is a diagram showing a configuration example of the logical units in the memory system 105 according to the embodiment. Here, a case where the memory system 105 and the host device 102 manage two logical units (Logical Unit: LU) is shown. When accessing the memory system 105, for example, the host device 102 selects one of the logical units and executes the access. The memory system 105 and the host device 102 may manage a namespace instead of the LU.

[0113] LU1 is a logical storage area used to store management data. LU1 is also referred to as a block area, for example. Among the plurality of blocks included in flash dies 113-1 to 113-18 of the memory system 105, any block can be used as a block area. The management data stored in LU1 is data used to manage, for example, the data stored in the memory system 105 by the host device 102. LU1 is a logical space that is randomly accessed by the host device 102, for example. The blocks included in LU1 store a checkpoint 508 and metadata 509.

[0114] The metadata 509 is data indicating the correspondence between user data and logical addresses. The metadata 509 includes, for example, for user data, an identifier indicating the zone where the user data was written, an offset from the start position of the zone, and the size of the data. The size of the data may be, for example, the number of segments. The host device 102 manages whether the user data within each zone is valid data by referring to the metadata 509.

[0115] The checkpoint 508 is a copy of the metadata 509 at a specific timing. For example, when the metadata 509 is updated in response to the completion of writing data based on a write command, the host device 102 generates a copy of the metadata 509. The host device 102 updates the checkpoint 508 with the generated copy of the metadata 509. The checkpoint 508 is used to reconstruct the metadata 509, for example, when the memory system 105 is restarted after a power-off.

[0116] LU2 is a logical storage area used to store user data. LU2 is also referred to as, for example, a zone area or a main area. LU2 is divided by a plurality of zones. The host device 102 designates, for example, the zone into which each user data is written so that the user data is classified based on the characteristics of the user data. Also, the memory system 105 manages the status of each zone and the write pointer corresponding to each zone. The write pointer indicates the logical address at which data is to be written next in the corresponding zone. That is, the write pointer indicates the logical address next to the logical address at the end of the logical addresses at which data has been written in the corresponding zone. If the corresponding zone has not yet had data written to it, the write pointer indicates the logical address at the beginning of the zone. The controller 106 controls the writing of data so that the writing of data to the zone is executed sequentially in terms of the logical address range by using the write pointer. Also, the host device 102 issues a write command to execute the writing of data sequentially for each zone. When data is written to a zone, the memory system 105 updates the write pointer according to the size of the written data. Also, when the controller 106 receives a zone reset command, it updates the write pointer corresponding to the zone specified by the zone reset command so as to indicate the logical address at the beginning of the zone. This process is also referred to as a zone reset. Thereby, the zone specified by the zone reset command becomes a zone in which data can be written from the beginning of the zone.

[0117] In FIG. 7, LU2 shows six zones from zone 1 to zone 6. For example, zones 1, 2, and 3 are the main areas used to store nodes. Also, zones 4, 5, and 6 are the main areas used to store user data. The nodes stored in zones 1 to 3 are, for example, data that directly or indirectly specify the user data stored in zones 4 to 6. Write pointers 501, 502, …, 506 are write pointers corresponding to zones 1, 2, …, 6, respectively.

[0118] Also, each of zones 1 to 6 may be managed to store data having different characteristics. For example, hot data with a high update frequency among the nodes is stored in zone 1, cold data with a low update frequency among the nodes is stored in zone 3, and data with an intermediate (warm) update frequency among the nodes is stored in zone 2. Also, for example, hot data with a high update frequency among the data is stored in zone 4, cold data with a low update frequency among the nodes is stored in zone 6, and data with an intermediate (warm) update frequency among the nodes is stored in zone 5. When F2FS is used, examples of the data stored in each zone are as follows. Zone 1 stores the direct node block of the directory. Zone 2 stores the direct node block of the file. Zone 3 stores the indirect node block. Zone 4 stores the directory. Zone 5 stores the updated data. Zone 6 stores user-specified data, data moved by garbage collection, and multimedia data.

[0119] Here, the case where the characteristics of the data stored in each zone are different has been described, but it is not necessarily required that the characteristics of the data stored in each zone be managed to be the same.

[0120] Next, the data movement in garbage collection will be described. FIG. 8 is a diagram showing an example of garbage collection executed by the memory system 105 and the host device 102 according to the embodiment. Here, the case where zones 5 and 6 are determined as the Victim zones will be described.

[0121] The upper part of FIG. 8 shows zones 5 and 6 before garbage collection is executed. Zone 5 stores valid data 605-1 and valid data 605-2. In other storage areas of zone 5, invalid data is stored. Zone 6 stores valid data 606-1 and valid data 606-2. In other storage areas of zone 6, invalid data is stored.

[0122] Here, the GC processing unit 205 determines zones 5 and 6 as the Victim zones. The GC processing unit 205 determines the Victim zones based on, for example, the GC recommended zone list, the time elapsed since data was written to the zone, and the amount of valid data included in the zone. When the Victim segment determination unit 206 of the GC processing unit 205 determines zones 5 and 6 as the Victim zones, it determines the segments corresponding to the valid data among the data stored in zones 5 and 6 as the Victim segments. Here, the valid data 605-1, 605-2 stored in zone 5 and the valid data 606-1, 606-2 stored in zone 6 are determined as the Victim segments.

[0123] First, the host device 102 executes a process for reading out valid data.

[0124] The host device 102 sends a read command to the memory system 105 to read the valid data 605-1, 605-2, 606-1, and 606-2. Based on the received read command, the memory system 105 reads the valid data 605-1, 605-2, 606-1, and 606-2 and sends them to the host device 102. For example, the host device 102 sends a first read command to read the valid data 605-1, a second read command to read the valid data 605-2, a third read command to read the valid data 606-1, and a fourth read command to read the valid data 606-2 to the memory system 105.

[0125] Next, the host device 102 starts a process to write the read valid data to another zone. The host device 102 selects an arbitrary zone from the empty zones managed in the host device 102. For example, the host device 102 sends a command to the memory system 105 to open zone 7, which is an empty zone. The command to open zone 7 may simply be a write command that designates zone 7 as the write destination zone. In response to receiving this command, the memory system 105 allocates a storage area where new data can be written for zone 7. For example, the memory system 105 selects a superblock where a data erasure operation can be performed and allocates a part of the storage area included in the selected superblock to zone 7. Also, instead of an empty zone, the host device 102 may select an already open zone where data writing is in progress as the write destination zone.

[0126] Then, the host device 102 sends a write command to the memory system 105 to write the valid data 605-1, 605-2, 606-1, 606-1 read from zone 5 or zone 6 to zone 7. The memory system 105 writes the valid data 605-1, 605-2, 606-1, 606-1 to zone 7 based on the received write command. Then, the memory system 105 updates the write pointer 507 corresponding to zone 7 in response to the data being written to zone 7.

[0127] The host device 102 receives a completion response corresponding to the write command, and updates the metadata 509 so that the data stored in zone 5 and zone 6 becomes invalid data in response to the data being written successfully. After updating the metadata 509, the host device 102 generates a copy of the updated metadata 509. Then, the host device 102 updates the checkpoint 508 with the generated copy of the metadata 509.

[0128] In response to zone 5 and zone 6 becoming zones that store only invalid data, the host device 102 sends a zone reset command specifying zone 5 and zone 6 to the memory system 105. The controller 106 of the memory system 105 that has received the zone reset command transitions zone 5 and zone 6 to empty. As a result, when all the zones included in the superblock to which zone 5 or zone 6 belongs become empty, the controller 106 can perform a data erasure operation on that superblock.

[0129] Here, although the case where garbage collection is performed by the host device 102 sending read commands and write commands to the memory system 105 has been described, a copy command may be sent instead of the read commands and write commands. At this time, the copy command to be sent designates the logical addresses corresponding to the valid data 605-1, 605-2, 606-1, 606-2 stored in zone 5 and zone 6 as the source addresses for copying, and designates zone 7 as the destination logical address for copying. When garbage collection is performed by such a copy command, it is not necessary to transmit and receive the data moved in garbage collection between the host device 102 and the memory system 105.

[0130] Next, the correspondence relationship between the superblock and the zones will be described. FIG. 9 is a block diagram showing an example of the correspondence relationship between the superblock and the zones in the memory system 105 according to the embodiment.

[0131] Also in FIG. 9, similar to the example described with reference to FIG. 3, one superblock is composed of 36 physical blocks. The 36 physical blocks are physical blocks each selected from planes capable of parallel operation. In FIG. 9, the block BLK1 of the plane PLN1 of the flash die 113-1, the block BLK1 of the plane PLN2 of the flash die 113-1, the block BLK1 of the plane PLN1 of the flash die 113-2, the block BLK1 of the plane PLN2 of the flash die 113-2,..., the block BLK1 of the plane PLN1 of the flash die 113-18, and the block BLK1 of the plane PLN2 of the flash die 113-18 constitute the superblock SB1.

[0132] Each of the multiple storage areas included in the superblock SB1 corresponds to zone ZN1, zone ZN2, zone ZN3, and zone ZN4. That is, one superblock includes storage areas corresponding to four zones. Also, the storage area corresponding to one zone spans each of the physical blocks that make up the superblock.

[0133] Accordingly, when accessing a zone, each physical block can be operated in parallel. Therefore, when the sizes of the zones are the same, access can be performed at a higher speed compared to the case where the storage area corresponding to a zone does not span multiple physical blocks.

[0134] Next, the zones to be garbage collected will be described. FIG. 10 is a block diagram showing an example of a garbage collection recommended zone in the memory system 105 according to the embodiment. In FIG. 10, the correspondence between the same superblock SB1 as in FIG. 9 and four zones (zone ZN1, zone ZN2, zone ZN3, and zone ZN4) is illustrated.

[0135] Among the four zones included in the superblock SB1, only zone ZN3 is a zone having a full status. A full zone is a zone in which writing of data is completed for the entire zone and which includes at least valid data. That is, the storage area corresponding to zone ZN3 stores valid data.

[0136] Among the four zones included in the superblock SB1, zone ZN1, zone ZN2, and zone ZN4 are empty zones. The empty zones are zones that have been reset based on a zone reset command received from the host device 102. The host device 102 transmits a zone reset command to the memory system 105 that designates a zone that contains no valid data and stores only invalid data. That is, zone ZN1, zone ZN2, and zone ZN4, each of which is an empty zone, are zones that store only invalid data.

[0137] When all the zones included in a superblock are empty, the controller 106 of the memory system 105 can perform a data erasure operation on that superblock. When the controller 106 performs a data erasure operation on a certain superblock, it releases the correspondence between that superblock and the zones belonging to that superblock. Then, the superblock on which the data erasure operation has been performed becomes a superblock into which new data can be written again. That is, the memory system 105 can newly allocate zones to that superblock.

[0138] In FIG. 10, among the zones included in the superblock SB1, the zones other than zone ZN3 are empty zones. Therefore, the memory system 105 cannot perform a data erasure operation on the superblock SB1 until zone ZN3 becomes empty. In other words, if zone ZN3 transitions to an empty state, the memory system 105 can perform a data erasure operation on the superblock SB1 and can use the superblock SB1 for writing new data.

[0139] The controller 106 stores the information indicating the zone ZN3 in the GC recommended zone list. That is, the controller 106 selects the zone ZN3 as the zone to be garbage-collected in consideration of the correspondence between the storage area of the non-volatile memory 112 and the zones, and the status of each zone. Then, the controller 106 stores the selected zone ZN3 in the GC recommended zone list.

[0140] In response to receiving the GC recommended zone acquisition command, the memory system 105 can cause the zone ZN3 to be preferentially selected as the Victim zone by providing the GC recommended zone list to the host device 102. Thereby, the memory system 105 can execute garbage collection in consideration of the data erasure unit in the memory system 105 based on an instruction from the host device 102. Such garbage collection is efficient in that the capacity of the storage recovered with respect to the size of the data to be moved is larger (cost-benefit) compared to the conventional host-based garbage collection.

[0141] Next, the zone status management table will be described. FIG. 11 is a diagram showing a configuration example of the zone status management table used in the memory system 105 according to the embodiment. The zone status management table is a table that stores the correspondence between the zones and the super blocks, and the status of each zone.

[0142] In FIG. 11, a case where the zone status management table is a table for managing empty or full zones is shown. The zone status management table stores information for identifying a zone, information for identifying the super block to which the zone belongs, and information indicating the status of the zone.

[0143] When the writing of data for a certain zone is completed and the zone becomes full, the controller 106 of the memory system 105 adds an entry regarding that zone to the zone status management table. Also, when the controller 106 resets a certain zone based on a zone reset command received from the host device 102, it updates the zone status management table so that the status of that zone becomes empty. Furthermore, when the controller 106 executes a data erasure operation on a certain superblock, it releases all the entries in which the information of the zones belonging to that superblock is stored.

[0144] In the zone status management table of FIG. 11, information regarding zone ZN1, zone ZN2, zone ZN3, zone ZN4, zone ZN5, and zone ZN7 is managed.

[0145] In the first entry of the zone status management table, information regarding zone ZN1 is stored. Zone ZN1 is a zone corresponding to the storage area included in superblock SB1. Zone ZN1 is Empty. That is, zone ZN1 is a zone in which only invalid data is stored and is a zone that has already been reset.

[0146] In the second entry of the zone status management table, information regarding zone ZN2 is stored. Zone ZN2 is a zone corresponding to the storage area included in superblock SB1. Zone ZN2 is Empty. That is, zone ZN2 is a zone in which only invalid data is stored and is a zone that has already been reset.

[0147] In the third entry of the zone status management table, information regarding zone ZN3 is stored. Zone ZN3 is a zone corresponding to the storage area included in superblock SB1. Zone ZN3 is Full. That is, zone ZN3 is a zone in which the writing of data has been completed and is a zone that stores at least valid data.

[0148] The fourth entry of the zone status management table stores information about zone ZN4. Zone ZN4 corresponds to the memory area included in superblock SB1. Zone ZN4 is Empty. That is, zone ZN4 is a zone in which only invalid data is stored and is a zone that has already been reset.

[0149] The fifth entry of the zone status management table stores information about zone ZN5. Zone ZN5 corresponds to the memory area included in superblock SB2. Zone ZN5 is Full. That is, zone ZN5 is a zone in which data writing has been completed and is a zone that stores at least valid data.

[0150] The sixth entry of the zone status management table stores information about zone ZN6. Zone ZN6 corresponds to the memory area included in superblock SB2. Zone ZN6 is Full. That is, zone ZN6 is a zone in which data writing has been completed and is a zone that stores at least valid data.

[0151] The GC recommended zone acquisition unit 209 creates a GC recommended zone list based on the zone status management table. For example, the GC recommended zone acquisition unit 209 selects a superblock composed only of full zones and empty zones, and if the ratio of full zones in the selected superblock is lower than the threshold, all full zones included in that superblock are added to the GC recommended zone list. The threshold may be a predetermined value or a value determined based on the number of blocks in the memory system 105 where new data can be written (the number of free blocks). Alternatively, the GC recommended zone acquisition unit 209 may select a predetermined number of superblocks with a low ratio of full zones among the superblocks composed only of full zones and empty zones, and add all full zones included in the selected predetermined number of superblocks to the GC recommended zone list.

[0152] When referring to the zone status management table shown in FIG. 11, the controller 106 stores, for example, information indicating zone ZN3 in the GC recommended zone list. In response to receiving a GC recommended zone acquisition command from the host device 102, the controller 106 provides the host device 102 with information indicating zone ZN3. Then, the host device 102 executes garbage collection processing so that all data stored in zone ZN3 becomes invalid data, and transmits a zone reset command specifying zone ZN3 to the controller 106. Thereby, the controller 106 resets zone ZN3 to transition zone ZN3 to empty in the zone status management table.

[0153] Thereby, in response to all zones included in the superblock SB1 becoming empty, the controller 106 can execute a data erasure operation on the superblock SB1. Then, the controller 106 releases the entries corresponding to the zones included in the superblock SB1 in the zone status management table, respectively.

[0154] Next, the process of sending a garbage collection (GC) recommended zone acquisition command will be described. FIG. 12 is a flowchart showing the procedure of the GC recommended zone acquisition command transmission process executed in the host device 102 according to the embodiment. When the GC processing unit 205 starts garbage collection, the host device 102 starts the GC recommended zone acquisition command transmission process.

[0155] The host controller 103 of the host device 102 acquires the device handle of the memory system 105 (S201). As a result, the host controller 103 can access the memory system 105.

[0156] The host controller 103 creates a GC recommended zone acquisition command (S202).

[0157] The host controller 103 stores (enqueues) the GC recommended zone acquisition command created in S202 in the command transmission queue 301 of the host memory 104 (S203).

[0158] As a result, the GC recommended zone acquisition command can be transmitted from the host device 102 to the memory system 105.

[0159] Next, the process of sending a garbage collection (GC) recommended zone list will be described. FIG. 13 is a flowchart showing the procedure of the GC recommended zone list transmission process executed in the memory system 105 according to the embodiment. When the GC recommended zone acquisition command is stored in the command transmission queue 301, the memory system 105 starts the GC recommended zone list transmission process.

[0160] First, the controller 106 of the memory system 105 acquires the GC recommended zone acquisition command from the command transmission queue 301 of the host memory 104 (S301).

[0161] In response to acquiring the GC recommended zone acquisition command in S301, the controller 106 creates a GC recommended zone list based on the zone status management table (S302). Instead of creating a GC recommended zone list, the controller 106 may acquire the GC recommended zone list by reading out the GC recommended zone list that has been created in advance and stored in the buffer memory 111 from the buffer memory 111.

[0162] The controller 106 stores the completion response corresponding to the GC recommended zone acquisition command received in S301 in the command completion queue 302 of the host memory 104 (S303). The completion response stored in the command completion queue 302 includes information indicating that the process of acquiring the GC recommended zone list created in S302 has been executed normally.

[0163] Next, the garbage collection (GC) recommended zone list reception process will be described. FIG. 14 is a flowchart showing the procedure of the GC recommended zone list reception process executed in the host device 102 according to the embodiment. When a completion response corresponding to the GC recommended zone acquisition command is stored in the command completion queue 302, the host device 102 starts the GC recommended zone list reception process.

[0164] The host controller 103 processes the completion response stored in the command queue in S303 of FIG. 13, which corresponds to the GC recommended zone acquisition command (S401).

[0165] After processing the completion response in S401, the host controller 103 acquires the GC recommended zone list from the memory system 105 (S402). For example, the host controller 103 acquires the GC recommended zone list from the data buffer area 303 of the host memory 104.

[0166] The host controller 103 transmits the GC recommended zone list acquired in S402 to the Victim segment determination unit 206 (S403).

[0167] As a result, when determining the data to be moved by garbage collection, the Victim segment determination unit 206 can refer to the information indicating the zone to be garbage collected provided from the memory system 105.

[0168] Next, the zone status management table construction process will be described. FIG. 15 is a flowchart showing the procedure of the zone status management table construction process executed in the memory system 105 according to the embodiment. The memory system 105 starts the zone status management table construction process, for example, at startup.

[0169] First, the controller 106 of the memory system 105 acquires a lookup table (LUT) from the nonvolatile memory 112 or the buffer memory 111 (S501). By referring to the LUT, the controller 106 can grasp the status of each zone in the memory system 105.

[0170] The controller 106 selects a superblock composed only of full zones and empty zones by referring to the LUT acquired in S501 (S502).

[0171] The controller 106 stores the information of the zone corresponding to the superblock selected in S502 in the zone status management table (S503).

[0172] Thereby, the controller 106 can construct the zone status management table based on the startup state of the memory system 105. Further, the controller 106 may store the zone status management table in the nonvolatile memory 112 when the power of the memory system 105 is turned off, and then reconstruct the zone status management table by reading the zone status management table from the nonvolatile memory 112 when the memory system 105 restarts.

[0173] Next, the zone status management table update process will be described. FIG. 16 is a flowchart showing the procedure of the zone status management table update process executed in the memory system 105 according to the embodiment.

[0174] The controller 106 determines whether the command received from the host device 102 is a zone reset command or a write command (S601).

[0175] If the received command is a zone reset command (zone reset command in S601), the controller 106 resets the zone specified by the zone reset command (S602). By resetting, the controller 106 transitions the zone specified by the zone reset command to empty.

[0176] The controller 106 updates the zone status management table so as to indicate that the zone reset in S602 is empty (S603).

[0177] If the received command is a write command (write command in S601), the controller 106 executes writing of data to the zone specified by the write command (S604).

[0178] The controller 106 determines whether the zone where the data is written in S604 has become full (S605).

[0179] If the zone has not become full by the data writing in S604 (No in S605), the controller 106 ends the zone status management table update process.

[0180] If the zone has become full by the data writing in S604 (Yes in S605), the controller 106 updates the zone status management table so as to indicate that the zone where the data was written in S604 is full (S603).

[0181] As a result, when any of the zones managed in the memory system 105 transitions to full or empty, the controller 106 can update the zone status management table.

[0182] In addition, when any zone transitions to empty and a superblock composed only of empty zones is generated, the controller 106 can perform a data erasure operation on that block. Then, the controller 106 releases the entry in the zone status management table that stores information about the zone belonging to the superblock on which the data erasure operation can be performed.

[0183] Furthermore, when reading the GC recommended zone list from the buffer memory 111 in response to the GC recommended zone acquisition command, the controller 106 may update the GC recommended zone list according to the update of the zone status management table. Thereby, even when the controller 106 provides the pre-created GC recommended zone list to the host device 102, it can provide the host device 102 with the zones to be garbage-collected that match the status of the latest zones.

[0184] Next, the procedure of garbage collection will be described. FIG. 17 is a flowchart showing the procedure of garbage collection executed in the host device 102 according to the embodiment. The host controller 103 of the host device 102 starts garbage collection, for example, when there is no access from the host device 102 to the memory system 105 for a certain period of time or more and a predetermined amount of data has been written since the previous execution of garbage collection.

[0185] The host controller 103 transmits a GC recommended zone acquisition command to the memory system 105 (S701).

[0186] The host controller 103 receives a GC recommended zone list from the memory system 105 (S702).

[0187] The host controller 103 determines whether to perform garbage collection (S703). The host controller 103 determines whether to perform garbage collection by referring to the GC recommended zone list and metadata received in S702.

[0188] If garbage collection is not performed (No in S703), the host controller 103 ends the garbage collection. For example, when there is little fragmentation in the zone as viewed from the host device 102, the host controller 103 determines not to perform garbage collection.

[0189] If garbage collection is to be performed (Yes in S703), the host controller 103 determines a Victim zone (S704). The host controller 103 uses the GC recommended zone list received in S702 to determine the Victim zone.

[0190] The host controller 103 transmits a read command specifying the valid data of the Victim zone determined in S704 to the memory system 105. Thereby, the host controller 103 reads the valid data from the Victim zone (S705).

[0191] The host controller 103 causes the zone of the write destination to transition to the open state (S706). The zone that has transitioned to the open state becomes a state where data can be written. If the zone of the write destination is already open, the host controller 103 skips the procedure of S706.

[0192] The host controller 103 designates the zone that has transitioned to open at S706 as the write destination, and transmits a write command for writing the data read at S705 to the memory system 105. Thereby, the host controller 103 writes the data read at S705 to the zone that has transitioned to open at S706 (S707).

[0193] In response to the completion of the write at S707, the host controller 103 updates the checkpoint (S708). The host controller 103 updates the metadata 509 in response to the completion of the writing of the data at S707. The host controller 103 updates the checkpoint 508 so as to save the updated metadata 509.

[0194] The host controller 103 causes the Victim zone determined at S704 to be reset (S709). In response to the Victim zone having become a zone that stores only invalid data due to the completion of the writing of the data at S707, the host controller 103 transmits a zone reset command designating the Victim zone to the memory system 105. The controller 106 of the memory system 105 that has received the zone reset command causes the Victim zone to transition to empty by resetting the Victim zone.

[0195] Thereby, the host device 102 can execute garbage collection based on the zone to be garbage-collected provided from the memory system 105.

[0196] As described above, in response to receiving a GC recommended zone acquisition command from the host device 102, the controller 106 of the memory system 105 according to the embodiment transmits a GC recommended zone list to the host device 102. The GC recommended zone list stores information indicating zones to be garbage collected, which is determined based on the zone status management table. That is, the controller 106 selects zones to be garbage collected in consideration of the correspondence between the storage areas of the nonvolatile memory 112 and the zones, and the status of each zone.

[0197] The host controller 103 of the host device 102 determines valid data to be moved in the garbage collection process based on the received GC recommended zone list. Then, the host controller 103 transmits a read command, a write command, or a copy command specifying the determined valid data to the memory system 105.

[0198] Therefore, in the information processing system 101 according to the present embodiment, garbage collection by the host device 102 can be executed in consideration of the correspondence between the zones and the super blocks managed only by the memory system 105.

[0199] Since the garbage collection by the host device 102 is completed only, the host device 102 can manage the WAF of the memory system 105. Factors that increase the WAF of the memory system 105 other than garbage collection include, for example, updating the LUT, reducing the size of writable data in the super block due to a failure of a plane, etc., and adding an error correction code to the written data. However, any of these factors only results in writing data of a small size with respect to the size of the user data write. Therefore, for example, the host device 102 can maintain the WAF of the memory system 105 at approximately 1.

[0200] Also, in the memory system 105, it is possible to suppress the occurrence of garbage collection at an unintended timing of the host device 102. That is, since no conflict occurs between the I / O access of the host device 102 and the garbage collection by the memory system 105, the QoS of the memory system 105 can be improved.

[0201] In addition, since the memory system 105 can provide the host device 102 with a GC recommended zone list, the memory system 105 can perform garbage collection in consideration of the data erasure unit in the memory system 105. Thereby, the memory system 105 can also solve the problems that occur when the size of the zone is smaller than the data erasure unit. And the memory system 105 can perform efficient garbage collection such that the capacity of the recovered storage is larger than the size of the data to be moved, as compared with the conventional host-based garbage collection.

[0202] Also, although the case where the non-volatile memory 112 of the memory system 105 is a semiconductor memory device has been described as an example, the non-volatile memory 112 may be a magnetic disk such as a hard disk drive (HDD).

[0203] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalent scope.

[0204] (Appendix) [1] A host device connectable to a memory system, an interface circuit configured to be connected to the memory system, A processor configured to send a command instructing access to the memory system including writing and reading data via the interface circuit comprising the processor manages a plurality of zones, each corresponding to any logical address range within the logical address space used in the access and any storage area of the plurality of storage areas provided in the memory system, sends a first command requesting a zone to be garbage collected to the memory system among the plurality of zones, receives from the memory system a first list including information indicating one or more zones to be garbage collected determined based on the correspondence between the plurality of zones and the plurality of storage areas and the status of each of the plurality of zones in response to the first command, the status includes a first status indicating that data has been written over the entire logical address range corresponding to the zone and a second status indicating that the zone has been reset, is configured as a host device. [2] the processor sends a second command instructing the memory system to rewrite at least valid data among the data of the one or more zones to be garbage collected included in the first list to other zones, receives a response to the second command from the memory system, after the one or more zones to be garbage collected are in a state where they do not store the valid data, sends a third command instructing the memory system to reset the one or more zones to be garbage collected, is configured as the host device according to [1].

Explanation of Signs

[0205] 101... Information processing system, 102... Host device, 103... Host controller, 104... Host memory, 105... Memory system, 106... Controller, 107... Host interface, 108... Buffer interface, 109... Memory interface, 110... CPU, 111... Buffer memory, 112... Non-volatile memory, 113... Flash die, 114... Peripheral circuit, 201... Application, 202... VFS / Database, 203... API processing unit, 204... I / O transmission unit, 205... GC processing unit, 206... Victim segment determination unit, 207... I / O completion processing unit, 208... Memory conversion layer, 209... GC recommended zone acquisition unit, 301... Command transmission queue, 302... Command completion queue, 303... Data buffer area.

Claims

1. A memory system connectable to a host device, comprising: a non-volatile memory including a plurality of storage areas; a controller configured to control access including writing and reading of data to and from the non-volatile memory based on commands received from the host device; and the controller manages the plurality of zones using first information storing a correspondence between the plurality of zones and the plurality of storage areas and statuses of the plurality of zones respectively, the zone corresponds to a logical address range within a logical address space used in the access from the host device to the memory system, the status includes a first status indicating that data has been written over the entire logical address range corresponding to the zone, and a second status indicating that the zone has been reset, in response to receiving a first command requesting a zone to be garbage collected from the host device, transmits a first list including information indicating the zone to be garbage collected determined based on the first information to the host device; and is configured as such. A memory system.

2. The memory system further comprises a volatile memory configured to store the first list, and the controller in response to receiving the first command from the host device, reads the first list from the volatile memory, and transmits the read first list to the host device. and is configured as such. The memory system according to claim 1.

3. The controller when data is written over the entire corresponding logical address range for a first zone among the plurality of zones, updates the first information to indicate that the first zone is in the first status, when the first zone is reset based on a second command received from the host device, updates the first information to indicate that the first zone is in the second status, and in response to the first information being updated, updates the first list in the volatile memory based on the first information. and is configured as such. The memory system according to claim 2.

4. The non-volatile memory includes a plurality of physical blocks, the controller manages a plurality of logical blocks, each of which is a set of the physical blocks, each of the plurality of logical blocks includes at least two storage areas corresponding to each of at least two zones, and each of the at least two storage areas spans a plurality of physical blocks included in each of the plurality of logical blocks, the first list is information indicating one or more of the first-status zones included in the logical blocks, among the plurality of logical blocks composed of only the first-status zone and the second-status zone, where the ratio of the first-status zone is lower than a first threshold, as the information indicating the zone to be garbage-collected and includes it as configured as The memory system according to claim 1.

5. The first information is configured to store, as the correspondence between the plurality of zones and the plurality of storage areas, information indicating in which logical block among the plurality of logical blocks each of the plurality of zones is included. and is configured as The memory system according to claim 4.

6. The controller is after transmitting the first list to the host device, based on a second command received from the host device, writes valid data included in the zone to be garbage-collected, which is included in the first list, to another zone. and is configured as The memory system according to claim 1.

7. The controller is at the time of startup of the memory system, reads second information storing the correspondence between the logical addresses in the logical address space and the plurality of storage areas from the non-volatile memory, and constructs the first information with reference to the second information. and is configured as The memory system according to claim 1.

8. A host device connectable to a memory system, comprising an interface circuit configured to be connected to the memory system, and a processor configured to transmit a command instructing access including writing and reading data to and from the memory system via the interface circuit. and comprises The processor is managing a plurality of zones, each corresponding to any logical address range within the logical address space used in the access and any storage area of the plurality of storage areas provided in the memory system; sending a first command requesting a zone to be garbage collected among the plurality of zones to the memory system; receiving, as a response to the first command, a first list including information indicating one or more zones to be garbage collected determined based on the correspondence between the plurality of zones and the plurality of storage areas and the status of each of the plurality of zones from the memory system; wherein the status includes a first status indicating that data has been written over the entire logical address range corresponding to the zone and a second status indicating that the zone has been reset; is configured as; a host device.

9. A method for controlling a memory system connectable to a host device, comprising: managing the plurality of zones using first information storing a correspondence between the plurality of storage areas included in the non-volatile memory of the memory system and the plurality of zones and the status of each of the plurality of zones; wherein the zone corresponds to a logical address range within a logical address space used in an access from the host device to the memory system; wherein the status includes a first status indicating that data has been written over the entire logical address range corresponding to the zone and a second status indicating that the zone has been reset; sending, in response to receiving a first command requesting a zone to be garbage collected from the host device to the memory system, a first list including information indicating a zone to be garbage collected determined based on the first information to the host device; comprising: a control method.

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