Sound output device, and electronic apparatus

Abstract

To provide a sound output device capable of outputting sounds with a quality as good as the sound output from a speaker with a simple configuration, and an electronic apparatus.SOLUTION: A sound output device 3 includes: a control unit 31 that outputs a PWM signal SG; an amplifier 32 that amplifies the PWM signal SG; and a piezoelectric element 33 that outputs sounds depending on the PWM signal SL output by the amplifier 32. The control unit 31 outputs at least one of a first PWM signal SG1 corresponding to the sound, a second PWM signal SG2 with the duty ratio RD smaller than the average duty ratio RDA, which is the average value of the duty ratio RD of the first PWM signal SG1, which is output before the first PWM signal SG1, and a third PWM signal SG3 with the duty ratio RD smaller than the average duty ratio RDA, which is output after the first PWM signal SG1.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present disclosure relates to a sound output device and an electronic device.

Background Art

[0002] Patent Document 1 discloses an induction heating rice cooker including a speaker and a voice output means for outputting a voice signal to the speaker.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides a sound output device and an electronic device that can output sound with a quality comparable to that of the sound output from a speaker with a simple configuration.

Means for Solving the Problems

[0005] The sound output device in the present disclosure includes a control unit that outputs a PWM signal, an amplifier that amplifies the PWM signal, and a piezoelectric element that outputs sound in response to the PWM signal output from the amplifier. The control unit outputs at least one of a first PWM signal that is a PWM signal corresponding to the sound, a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than an average duty ratio that is a substantially average value of the duty ratio of the first PWM signal, and a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than an average value of the average duty ratio.

[0006] In addition, the electronic device in the present disclosure includes a control unit that outputs a PWM signal, an amplifier that amplifies the PWM signal, and a piezoelectric element that outputs sound in response to the PWM signal output by the amplifier. The control unit outputs a first PWM signal that is a PWM signal corresponding to the sound, a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than an average duty ratio that is a substantially average value of the duty ratio of the first PWM signal, and at least one of a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio.

Effect of the Invention

[0007] The sound output device and the electronic device in the present disclosure output, via an amplifier, to a piezoelectric element at least one of a first PWM signal that is a PWM signal corresponding to sound, a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than an average duty ratio that is a substantially average value of the duty ratio of the first PWM signal, and a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio. By outputting a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than the average duty ratio, noise generated when the piezoelectric element starts outputting sound corresponding to the first PWM signal can be suppressed. Also, by outputting a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average value of the average duty ratio, noise generated when the piezoelectric element ends outputting sound corresponding to the first PWM signal can be suppressed. Therefore, with a simple configuration, sound with a quality comparable to that of the sound output from a speaker can be output.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Mode for Carrying Out the Invention

[0009] (Findings etc. on which the present disclosure is based) When the inventors arrived at the present disclosure, there were electronic devices (especially household electronic devices) such as a heating cooker equipped with a sound output device that outputs sound. Conventionally, the sound output device in such an electronic device has had a speaker and an amplifier IC (Integrated Circuit) that amplifies an audio signal. On the other hand, there was a piezoelectric element as an inexpensive element that outputs sound. Also, it has been known that by generating a PWM (Pulse Width Modulation) signal whose duty ratio is modulated by an audio signal, amplifying this PWM signal, and inputting it to a piezoelectric element, sound can be output from the piezoelectric element. However, when outputting sound or the like from a piezoelectric element, the inventors discovered the problem that noise is generated when starting the output of sound or the like and when ending the output of sound or the like, and in order to solve that problem, they arrived at constituting the subject matter of the present disclosure. Therefore, the present disclosure provides a sound output device and an electronic device that can output sound with a quality comparable to that output from a speaker with a simple configuration.

[0010] Hereinafter, embodiments will be described in detail with reference to the drawings. However, there may be cases where more detailed explanations than necessary are omitted. For example, there may be cases where detailed explanations of already well-known matters or duplicate explanations for substantially the same configurations are omitted. Note that the accompanying drawings and the following description are provided for those skilled in the art to fully understand the present disclosure, and are not intended to limit the subject matter described in the claims.

[0011] (Embodiment 1) [1-1. Configuration] [1-1-1. Configuration of the cooker] FIG. 1 is a perspective view showing the cooker 1. FIG. 2 is a perspective view showing the cooker 1 when the lid 11 is in an open state. In each of FIGS. 1, 2, and 4, the X-axis, Y-axis, and Z-axis are described. The X-axis, Y-axis, and Z-axis are orthogonal to each other. The X-axis and Y-axis are parallel to the horizontal direction. The Z-axis is parallel to the vertical direction. The X-axis indicates the left-right direction. The Y-axis indicates the front-back direction. The positive direction of the X-axis indicates the right direction. The positive direction of the Y-axis indicates the front direction. The positive direction of the Z-axis indicates the upward direction. The cooker 1 corresponds to an example of an "electronic device".

[0012] The cooker 1 includes a main body 10 and a lid 11. The main body 10 and the lid 11 are connected by a support portion 12. Thereby, the lid 11 can be opened and closed with respect to the main body 10 by rotating around the support portion 12. The support portion 12 is disposed on the back side of the main body 10. The back side is the side in the negative direction of the Y-axis.

[0013] The main body 10 has a container shape with an upper opening in the installed state of the cooker 1, and a recess 14 capable of accommodating the inner pot 13 is formed. The inner pot 13 is a container with an upper opening in the state of being accommodated in the recess 14. A convex portion 15 is formed substantially at the center of the inner bottom surface of the inner pot 13. A stirring member for stirring the foodstuffs accommodated in the inner pot 13, a plate on which the foodstuffs are placed when steaming the foodstuffs accommodated in the inner pot 13, etc. are attached to the convex portion 15.

[0014] The lid body 11 includes an inner lid 16 and an outer lid 17. The inner lid 16 is made of a predetermined metal material and closes the opening of the inner pot 13 when the lid body 11 is in the closed state. The inner lid 16 is provided with a packing on its outer peripheral portion. The inner lid 16 is detachably disposed on the inner surface of the outer lid 17 by fitting a predetermined portion such as the outer peripheral portion to the outer lid 17.

[0015] A steam discharge port 18 is formed in the lid body 11. The steam discharge port 18 discharges steam to keep the pressure inside the inner pot 13 constant.

[0016] A handle 19 for fixing the lid body 11 in the closed state is provided on the outer surface of the outer lid 17. The handle 19 is rotatable within a predetermined range in the direction indicated by the symbol R around the central portion of the outer surface on the outer surface of the outer lid 17.

[0017] An operation display unit 20 is provided on the outer surface of the outer lid 17. FIG. 3 is a diagram showing an example of the operation display unit 20. The operation display unit 20 includes a display 201. The operation display unit 20 also includes a back button 202, a cancel button 203, a first switching button 204, an OK button 205, a second switching button 206, and a start button 207. The operation display unit 20 also includes an LED (Light Emitting Diode) 208. Each of the back button 202, the cancel button 203, the first switching button 204, the OK button 205, the second switching button 206, and the start button 207 is constituted by, for example, a touch sensor.

[0018] The display 201 displays various images. The back button 202 is a button for transitioning the screen displayed on the display 201 to the previous screen. The cancel button 203 is a button for canceling the operation in the operation display unit 20. The cancel button 203 is also a button for aborting or ending the cooking and heat preservation being performed by the cooker 1. The first switching button 204 and the second switching button 206 are buttons for switching the information displayed on the display 201. Also, the first switching button 204 and the second switching button 206 are buttons for switching the target selected on the display 201. The confirmation button 205 is a button for confirming the selection made on the display 201. The start button 207 is a button for causing the cooker 1 to start cooking. The LED 208 is a lamp for notifying the communication connection status between the cooker 1 and a communication device (not shown). The communication device is connected to a network composed of a public switched telephone network, a dedicated line, or other communication circuits, and communicates with a server device via the network.

[0019] As described above, the cooker 1 can display a cooking history, a reservation list, and a menu list by the display operation unit 20. When displaying the cooking history, the reservation list, and the menu list, the display operation unit 20 can display the menus one by one in a switchable manner. FIG. 3 shows a menu with the menu name "cream stew" among the menus included in the cooking history. Note that the menu name indicates the name of the menu. When the first switching button 204 or the second switching button 206 is operated, the display operation unit 20 switches the menu to be displayed from the menu with the menu name "cream stew" to another menu.

[0020] [1-1-2. Configuration of Sound Output Device] FIG. 4 is a diagram showing the position of the sound output device 3 in the cooker 1 in the first embodiment. FIG. 4 is a view of the back side of the cooker 1. The back side of the cooker 1 is the side where the support portion 12 described with reference to FIG. 2 is arranged. As shown in FIG. 4, a back cover 101 is arranged on the back side of the cooker 1. The back side is the side in the negative direction of the Y axis. The sound output device 3 is housed inside the back cover 101. The back cover 101 may be formed with an opening such as a slit so that the sound output from the sound output device 3 can be easily transmitted to the outside.

[0021] FIG. 5 is a diagram showing the configuration of the sound output device 3. As shown in FIG. 5, the sound output device 3 includes a control unit 31, an amplifier 32, and a piezoelectric element 33. The control unit 31 controls each part of the sound output device 3. Further, the control unit 31 may control each part of the cooker 1.

[0022] The control unit 31 includes a processor 31A and a memory 31B. The processor 31A is composed of a CPU (Central Processing Unit), an MPC (Micro Processing Unit), or the like. The memory 31B is composed of a ROM (Read Only Memory) or the like.

[0023] The processor 31A may be composed of a plurality of processors or a single processor. The processor 31A may be hardware programmed to realize the functions of each part described later. That is, the processor 31A may have a configuration in which the control program PG is mounted as a hardware circuit. In this case, for example, the processor 31A is composed of an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or the like. In the following description, a case where the processor 31A executes the control program PG to realize various functions of the control unit 31 will be described.

[0024] The memory 31B has a storage area for storing programs executed by the processor 31A and data processed by the processor 31A. The memory 31B stores the control program PG executed by the processor 31A and various voice data and the like related to the operation of the sound output device 3. Memory 31B has a non-volatile memory area that stores programs and data non-volatilely. The memory 31B may include, for example, a ROM, an HDD (Hard Disk Drive), an SSD (Solid State Drive), etc. as the non-volatile memory area. Further, the memory 31B may include a volatile memory area and constitute a work area that temporarily stores programs executed by the processor 31A and data to be processed. The memory 31B may include, for example, a RAM (Random Access Memory), etc. as the volatile memory area.

[0025] The control unit 31 generates a PWM signal SG and outputs the generated PWM signal SG to the amplifier 32. The PWM signal SG is composed of a first PWM signal SG1, a second PWM signal SG2, and a third PWM signal SG3. The first PWM signal SG1 is a PWM signal corresponding to sound. The second PWM signal SG2 is a PWM signal output before the first PWM signal. For example, the second PWM signal SG2 is output immediately before the first PWM signal. The third PWM signal SG3 is a PWM signal output after the first PWM signal. For example, the third PWM signal SG3 is output immediately after the first PWM signal. The second PWM signal SG2 will be further described with reference to FIG. 7. The third PWM signal SG3 will be further described with reference to FIG. 8.

[0026] The amplifier 32 amplifies the PWM signal SG output from the control unit 31. The amplifier 32 outputs the amplified PWM signal SL to the piezoelectric element 33. The amplifier 32 will be further described with reference to FIG. 6.

[0027] The piezoelectric element 33 outputs a sound corresponding to the PWM signal SL from the amplifier 32. The piezoelectric element 33 is composed of, for example, a first piezoelectric element 331 and a second piezoelectric element 332. In each of the first piezoelectric element 331 and the second piezoelectric element 332, a diaphragm is disposed on at least one electrode. When the diaphragm vibrates, sound is output. The piezoelectric element 33 will be further described with reference to FIG. 6. In the following description, the case where the sound output device 3 outputs voice will be described. "Voice" corresponds to an example of "sound".

[0028] In the present embodiment, the case where the piezoelectric element 33 is composed of the first piezoelectric element 331 and the second piezoelectric element 332 will be described, but the present disclosure is not limited thereto. For example, the piezoelectric element 33 may be composed of one piezoelectric element. Further, for example, the piezoelectric element 33 may be composed of three or more piezoelectric elements. The more the piezoelectric element 33 is composed of a large number of piezoelectric elements, the louder the volume output from the piezoelectric element 33 can be.

[0029] [1-1-3. Configuration of the control unit] Next, with reference to FIG. 5, the configuration of the control unit 31 will be described. As shown in FIG. 5, the control unit 31 includes a carrier generation unit 311, a first signal generation unit 312, a second signal generation unit 313, a third signal generation unit 314, a signal output unit 315, and a voice storage unit 316. Specifically, the processor 31A of the control unit 31 functions as the carrier generation unit 311, the first signal generation unit 312, the second signal generation unit 313, the third signal generation unit 314, and the signal output unit 315 by executing the control program PG. Further, the processor 31A of the control unit 31 causes the memory 31B to function as the voice storage unit 316 by executing the control program PG.

[0030] The voice storage unit 316 stores a plurality of voice signals in advance. Each of the plurality of voice signals indicates, for example, guidance output to the user of the cooker 1 according to the state of the cooker 1. For example, when the user touches the start button 207 shown in FIG. 3 and the cooker 1 starts cooking, the sound output device 3 outputs guidance such as "Cooking will start." The voice signal indicating the guidance "Cooking will start." corresponds to an example of a plurality of voice signals.

[0031] The carrier generation unit 311 generates a carrier signal SGC with a constant duty ratio RD. The carrier signal SGC is generated at a frequency higher than the frequency of the human audible range. The frequency of the carrier signal SGC is, for example, 64 KHz. Note that the frequency of the human audible range is 20 Hz to 20 KHz. Also, the carrier signal SGC is a rectangular wave. The duty ratio RD of the carrier signal SGC is, for example, 50%.

[0032] In the present embodiment, the case where the frequency of the carrier signal SGC is 64 KHz will be described, but the present disclosure is not limited to this. The frequency of the carrier signal SGC may be higher than the frequency of the human audible range. For example, the frequency of the carrier signal SGC may be 32 KHz. Also, for example, the frequency of the carrier signal SGC may be 128 KHz. The higher the sampling rate of the voice signal stored in the voice storage unit 316 and the frequency of the carrier signal SGC, the more possible it is to output high-quality voice. The lower the sampling rate of the voice signal stored in the voice storage unit 316 and the frequency of the carrier signal SGC, the more the storage capacity required by the voice storage unit 316 and the load on the processor 31A required for the processing of the first signal generation unit 312 can be reduced.

[0033] The first signal generation unit 312 generates a first PWM signal SG1. The first signal generation unit 312 generates the first PWM signal SG1, for example, by modulating the duty ratio RD of the carrier signal SGC with a voice signal. The first signal generation unit 312, for example, reads out one voice signal from a plurality of voice signals stored in the voice memory unit 316, and modulates the duty ratio RD of the carrier signal SGC with the read-out one voice signal, thereby generating a first PWM signal SG1. The first period P1, which is the period during which the voice corresponding to the first PWM signal SG1 is output, is, for example, several seconds to 10 seconds.

[0034] The second signal generation unit 313 generates a second PWM signal SG2. The second PWM signal SG2 is, for example, a signal output immediately before the first PWM signal SG1. The second PWM signal SG2 is a signal with a duty ratio RD smaller than the average duty ratio RDA. The average duty ratio RDA is the average value of the duty ratio RD of the first PWM signal. Note that the average duty ratio RDA may be the duty ratio RD of the carrier signal SGC. In this case, the average duty ratio RDA is, for example, 50%. Also, in this case, the process of calculating the average value of the duty ratio RD of the first PWM signal can be omitted.

[0035] The second PWM signal SG2 is a signal with a gradually increasing duty ratio RD. The second PWM signal SG2 is, for example, a signal with a stepwise increasing duty ratio RD. Also, the second PWM signal SG2 may be, for example, a signal with a smoothly increasing duty ratio RD. The second period P2, which is the period during which the second PWM signal SG2 is output, is a period equal to or longer than a preset first threshold TH1. The first threshold TH1 is, for example, 2 msec. The second period P2 is, for example, 3 msec to 10 msec. The second PWM signal SG2 will be further described with reference to FIG. 7.

[0036] The third signal generation unit 314 generates a third PWM signal SG3. The third PWM signal SG3 is, for example, a signal output immediately after the first PWM signal. The third PWM signal SG3 is a signal with a duty ratio RD smaller than the average duty ratio RDA.

[0037] The third PWM signal SG3 is a signal whose duty ratio RD gradually decreases. The third PWM signal SG3 is, for example, a signal whose duty ratio RD decreases stepwise. Also, the third PWM signal SG3 may be, for example, a signal whose duty ratio RD decreases smoothly. The third period P3, which is the period during which the third PWM signal SG3 is output, is a period equal to or longer than a preset second threshold TH2. The second threshold TH2 is, for example, 2 msec. The second period P2 is, for example, 3 msec to 10 msec. The third PWM signal SG3 will be further described with reference to FIG. 8.

[0038] The signal output unit 315 outputs the PWM signal SG to the amplifier 32. The PWM signal SG is composed of a first PWM signal SG1, a second PWM signal SG2, and a third PWM signal SG3. In other words, the signal output unit 315 synthesizes, for example, the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3 to generate the PWM signal SG. Then, the signal output unit 315 outputs the generated PWM signal SG to the amplifier 32.

[0039] In the present embodiment, the case where the signal output unit 315 synthesizes the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3 to generate the PWM signal SG will be described, but the present disclosure is not limited thereto.

[0040] For example, the PWM signal SG may be generated as follows. First, the carrier generation unit 311 generates a carrier signal SGC corresponding to the signal output period PA. The signal output period PA is the sum of a first period P1, a second period P2, and a third period P3. Then, the first signal generation unit 312 modulates the carrier signal SGC of the first period P1 to generate a first PWM signal SG1. Also, the second signal generation unit 313 uses the carrier signal SGC of the second period P2 immediately before the first period P1 to generate a second PWM signal SG2. Further, the third signal generation unit 314 uses the carrier signal SGC of the third period P3 immediately after the first period P1 to generate a second PWM signal SG2. In this way, the PWM signal SG may be generated. In this case, the signal output unit 315 can omit the process of synthesizing the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3.

[0041] [1-1-4. Configuration of the Amplifier] Next, with reference to FIG. 6, the configuration of the amplifier 32 will be described. As shown in FIG. 6, the amplifier 32 includes a transistor 321, an input resistor RA, a first resistor R1, and a second resistor R2. The transistor 321 is a so-called bipolar transistor. The PWM signal SG is input from the control unit 31 to one end of the input resistor RA. The other end of the input resistor RA is connected to the base of the transistor 321. That is, the PWM signal SG from the control unit 31 is input to the base of the transistor 321 via the input resistor RA.

[0042] The first resistor R1 and the second resistor R2 are so-called voltage dividing resistors. One end of the first resistor R1 is connected to the collector of the transistor 321. The other end of the first resistor R1 is connected to the second resistor R2. The piezoelectric element 33 is connected in parallel with the first resistor R1. Specifically, each of the first piezoelectric element 331 and the second piezoelectric element 332 is connected in parallel with the first resistor R1. One end of the second resistor R2 is pulled up to the voltage VC. The other end of the second resistor R2 is connected to the first resistor R1. The emitter of transistor 321 is grounded.

[0043] When the PWM signal SG is OFF, no voltage is applied to the base of transistor 321, so transistor 321 is in the OFF state. In this case, no current flows through the first resistor R1 and the second resistor R2. As a result, the voltage across both ends of the first resistor R1 becomes "0", and the voltage input to the piezoelectric element 33 becomes "0".

[0044] When the PWM signal SG is ON, a voltage is applied to the base of transistor 321, so transistor 321 is in the ON state. In this case, current flows through the first resistor R1 and the second resistor R2. As a result, a voltage division voltage VD defined by the following equation (1) is applied across both ends of the first resistor R1, and the voltage division voltage VD is applied to the piezoelectric element 33. VD = VC × R1 / (R1 + R2) (1) Here, R1 represents the resistance value of the first resistor R1, and R2 represents the resistance value of the second resistor R2. The voltage division voltage VD is, for example, 25V.

[0045] In this way, the PWM signal SG is amplified by the control unit 31, and the amplified PWM signal SL is applied to the piezoelectric element 33. The amplitude of the PWM signal SG is, for example, 5V. The amplitude of the PWM signal SL is, for example, 25V. That is, the amplifier 32 amplifies from 5V to 25V.

[0046] In this embodiment, the case where the transistor 321 is a bipolar transistor will be described, but the present disclosure is not limited thereto. The transistor 321 may be, for example, a semiconductor amplification element such as a MOSFET (Metal - Oxide - Semiconductor Field - Effect Transistor). Also, the circuit configuration of the amplifier 32 may be a half - bridge type using a plurality of semiconductor amplification elements (bipolar transistors, MOSFETs, etc.), or a full - bridge type configuration using a plurality of semiconductor amplification elements (bipolar transistors, MOSFETs, etc.).

[0047] [1-2. Second PWM Signal] Next, an example of the second PWM signal SG2 will be described with reference to FIG. 7. FIG. 7 shows three graphs. In each of the three graphs, the horizontal axis is time T, and the vertical axis is the duty ratio RD of the PWM signal SG.

[0048] In each of the three graphs, before time T is "0", the duty ratio RD is "0%". Also, in each of the three graphs, when time T is at time TA, the duty ratio RD is the average duty ratio RDA. The average duty ratio RDA is the average value of the duty ratio RD of the first PWM signal. The average duty ratio RDA is, for example, 50%. In each of the three graphs, in the second period P2 from time T = "0" to time TA, the duty ratio RD of the second PWM signal SG2 gradually increases. Also, the period from time T = "0" to time TA corresponds to the second period P2. The second period P2 is the period during which the second PWM signal SG2 is output. The second period P2 is, for example, 4 msec. The period after time T = TA corresponds to the first period P1. The first period P1 is the period during which the first PWM signal SG1 is output. The first period P1 is, for example, 4 seconds.

[0049] In the left graph of FIG. 7, the duty ratio RD of the second PWM signal SG2 gradually increases. Also, the duty ratio RD of the second PWM signal SG2 increases stepwise. The graph G11 shown in the left graph of FIG. 7 shows the change in the duty ratio RD of the second PWM signal SG2. As shown in graph G11, when time T is "0", the duty ratio RD of the second PWM signal SG2 increases stepwise from "0%" to the duty ratio RDC. The duty ratio RDC is, for example, "17%". Also, as shown in graph G11, in the period from time T = "0" to time TB, the duty ratio RD is held at the duty ratio RDC. Time TB is, for example, "2 msec".

[0050] Then, as shown in graph G11, when time T is at time TB, the duty ratio RD of the second PWM signal SG2 increases stepwise from duty ratio RDC to duty ratio RDB. The duty ratio RDB is larger than the duty ratio RDC and smaller than the average duty ratio RDA. The duty ratio RDB is, for example, "34%". Also, as shown in graph G11, during the period when time T is from time TB to time TA, the duty ratio RD is held at the duty ratio RDB. Time TA is, for example, "4 msec". That is, the second period P2 is, for example, "4 msec". Furthermore, as shown in graph G11, when time T is at time TA, the duty ratio RD of the second PWM signal SG2 increases stepwise from duty ratio RDB to the average duty ratio RDA. Time TA corresponds to the time at the boundary between the first period P1 and the second period P2. In other words, time TA corresponds to the time at the start point of the first PWM signal SG1.

[0051] In the left diagram of FIG. 7, the case where the duty ratio RD of the second PWM signal SG2 increases in three steps from "0%" to the average duty ratio RDA will be described, but the present disclosure is not limited thereto. The duty ratio RD of the second PWM signal SG2 may increase from "0%" to the average duty ratio RDA in, for example, two steps. Also, the duty ratio RD of the second PWM signal SG2 may increase from "0%" to the average duty ratio RDA in, for example, four or more steps.

[0052] In the left diagram of FIG. 7, the case where the increase amount of the duty ratio RD at each step is substantially constant (about 17%) will be described, but the present disclosure is not limited thereto. The increase amount of the duty ratio RD at each step may increase gradually, for example.

[0053] As shown in the left diagram of FIG. 7, when the duty ratio RD of the second PWM signal SG2 has three levels and increases from "0%" to the average duty ratio RDA, the duty ratio RD may increase as follows. For example, the duty ratio RD during the period when time T is from "0" to time TB is, for example, "10%". For example, during the period when time T is from time TB to time TA, the duty ratio RD is, for example, "25%". In this case, when time T is "0", the duty ratio RD increases from "0%" to "10%". And when time T is time TB, the duty ratio RD increases from "10%" to "25%". Further, when time T is time TA, the duty ratio RD increases from "25%" to "50%".

[0054] In the central diagram of FIG. 7, the duty ratio RD of the second PWM signal SG2 increases gradually. Also, the duty ratio RD of the second PWM signal SG2 increases smoothly. Specifically, the duty ratio RD of the second PWM signal SG2 increases linearly. The graph G12 shown in the central diagram of FIG. 7 shows the change in the duty ratio RD of the second PWM signal SG2. As shown in graph G12, when time T is "0", the duty ratio RD is "0%", and when time T is time TA, the duty ratio RD increases linearly so as to become the average duty ratio RDA.

[0055] In the right diagram of FIG. 7, the duty ratio RD of the second PWM signal SG2 increases gradually. Also, the duty ratio RD of the second PWM signal SG2 increases smoothly. Specifically, the duty ratio RD of the second PWM signal SG2 increases in a smooth curve shape. The graph G13 shown in the right diagram of FIG. 7 shows the change in the duty ratio RD of the second PWM signal SG2. As shown in graph G13, the curve corresponding to graph G13 is a convex-down curve. The curve corresponding to graph G13 is, for example, a quadratic curve. Also, the curve corresponding to graph G13 is, for example, a logarithmic curve. As shown in graph G13, when time T is "0", the duty ratio RD is "0%", and when time T is time TA, the duty ratio RD increases in a curve so as to become the average duty ratio RDA.

[0056] [1-3. Third PWM signal] Next, an example of the third PWM signal SG3 will be described with reference to FIG. 8. FIG. 8 shows three graphs. In each of the three graphs, the horizontal axis is time T, and the vertical axis is the duty ratio RD of the PWM signal SG.

[0057] In each of the three graphs, before time T is time TC, the duty ratio RD is the average duty ratio RDA. Also, in each of the three graphs, after time T is time TE, the duty ratio RD is "0%". The average duty ratio RDA is the average value of the duty ratio RD of the first PWM signal. The average duty ratio RDA is, for example, 50%. In each of the three graphs, in the third period P3 from time TC to time TE of time T, the duty ratio RD of the third PWM signal SG3 gradually decreases. Also, the period from time TC to time TE of time T corresponds to the third period P3. The third period P3 is the period during which the third PWM signal SG3 is output. The third period P3 is, for example, 4 msec. The period before time T is time TC corresponds to the first period P1. The first period P1 is the period during which the first PWM signal SG1 is output. The first period P1 is, for example, 4 seconds.

[0058] In the left graph of FIG. 8, the duty ratio RD of the third PWM signal SG3 gradually decreases. Specifically, the duty ratio RD of the third PWM signal SG3 decreases step by step. The graph G21 shown in the left graph of FIG. 8 shows the change in the duty ratio RD of the third PWM signal SG3. As shown in graph G21, when time T is at time TC, the duty ratio RD of the third PWM signal SG3 decreases stepwise from the average duty ratio RDA to the duty ratio RDB. The duty ratio RDB is, for example, 34%. Also, as shown in graph G21, when time T is in the period from time TC to time TD, the duty ratio RD is held at the duty ratio RDB. Time TD is, for example, 2 msec after time TC. Time TC corresponds to the time at the boundary between the first period P1 and the third period P3. In other words, time TC corresponds to the time at the end point of the first PWM signal SG1.

[0059] Then, as shown in graph G21, when time T is at time TD, the duty ratio RD of the third PWM signal SG3 decreases stepwise from the duty ratio RDB to the duty ratio RDC. The duty ratio RDC is smaller than the duty ratio RDB and larger than "0%". The duty ratio RDC is, for example, 17%. Also, as shown in graph G21, when time T is in the period from time TD to time TE, the duty ratio RD is held at the duty ratio RDC. Furthermore, as shown in graph G21, when time T is at time TE, the duty ratio RD of the third PWM signal SG3 decreases stepwise from the duty ratio RDC to "0%". After time T is past time TE, the duty ratio RD of the PWM signal SG is held at "0%".

[0060] In the left diagram of FIG. 8, the case where the duty ratio RD of the third PWM signal SG3 decreases in three steps from the average duty ratio RDA to "0%" will be described, but the present disclosure is not limited thereto. The duty ratio RD of the third PWM signal SG3 may decrease from the average duty ratio RDA to "0%" in, for example, two steps. Also, the duty ratio RD of the third PWM signal SG3 may decrease from the average duty ratio RDA to "0%" in, for example, four or more steps.

[0061] In the left figure of FIG. 8, the case where the decrease amount of the duty ratio RD at each stage is substantially constant (about 17%) will be described, but the present disclosure is not limited thereto. The increase amount of the duty ratio RD at each stage may, for example, gradually decrease.

[0062] As shown in the left figure of FIG. 8, when the duty ratio RD of the third PWM signal SG3 decreases in three stages from the average duty ratio RDA to "0%", the duty ratio RD may decrease as follows. For example, the duty ratio RD during the period when time T is from time TC to time TD is, for example, "25%". For example, during the period when time T is from time TD to time TE, the duty ratio RD is, for example, "10%". In this case, when time T is at time TC, the duty ratio RD decreases from "50%" to "25%". Then, when time T is at time TD, the duty ratio RD decreases from "25%" to "10%". Further, when time T is at time TE, the duty ratio RD decreases from "10%" to "0%".

[0063] In the central figure of FIG. 8, the duty ratio RD of the third PWM signal SG3 gradually decreases, and the duty ratio RD of the third PWM signal SG3 decreases smoothly. Specifically, the duty ratio RD of the third PWM signal SG3 decreases linearly. The graph G22 shown in the central figure of FIG. 8 shows the change in the duty ratio RD of the third PWM signal SG3. As shown in the graph G22, when time T is at time TC, the duty ratio RD is the average duty ratio RDA, and when time T is at time TE, the duty ratio RD decreases linearly so as to become "0%".

[0064] In the right figure of FIG. 8, the duty ratio RD of the third PWM signal SG3 gradually decreases, and the duty ratio RD of the third PWM signal SG3 decreases smoothly. The duty ratio RD of the third PWM signal SG3 decreases in a smooth curve. The graph G23 shown in the right figure of FIG. 8 shows the change in the duty ratio RD of the third PWM signal SG3. As shown in graph G23, the curve corresponding to graph G23 is a downwardly convex curve. The curve corresponding to graph G23 is, for example, a quadratic curve. Also, the curve corresponding to graph G23 is, for example, a logarithmic curve. As shown in graph G23, when the time T is at time TC, the duty ratio RD is the average duty ratio RDA, and when the time T is at time TE, the duty ratio RD decreases in a curve shape so as to become "0%".

[0065] [Graph showing the effect] FIG. 9 explains the sound output by the piezoelectric element 33. FIG. 9 shows two graphs. In each of the two graphs, the horizontal axis is the time T, and the vertical axis is the amplitude A of the sound output by the piezoelectric element 33. The first period P1 is the period during which the first PWM signal is output. The first period P1 is, for example, 4 seconds. The second period P2 immediately before the first period P1 is the period during which the second PWM signal SG2 is output. The second period P2 is, for example, 4 msec. The third period P3 immediately after the first period P1 is the period during which the third PWM signal SG3 is output. The third period P3 is, for example, 4 msec.

[0066] Of the two graphs, the upper graph G31 shows the change in the amplitude A of the sound output by the piezoelectric element 33 when the PWM signal SG output by the control unit 31 is composed of only the first PWM signal SG1. Of the two graphs, the lower graph G32 shows the change in the amplitude A of the sound output by the piezoelectric element 33 when the PWM signal SG output by the control unit 31 is composed of the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3.

[0067] As shown in graph G31, when the PWM signal SG output by the control unit 31 is composed of only the first PWM signal SG1, the sound output by the piezoelectric element 33 includes noise NS in the second period P2. The noise NS is a pulsed signal. The amplitude A of the noise NS is approximately the same as the amplitude A of the voice signal. Also, as shown in graph G31, when the PWM signal SG output by the control unit 31 is composed of only the first PWM signal SG1, the sound output by the piezoelectric element 33 includes noise NE in the third period. The noise NE is a pulsed signal. The amplitude A of the noise NE is approximately the same as the amplitude A of the audio signal. The noise NS and the noise NE are so-called pop noises.

[0068] As shown in graph G32, when the PWM signal SG output by the control unit 31 is composed of the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3, the sound output by the piezoelectric element 33 does not include the noise NS. In this way, by outputting the second PWM signal SG2 in the second period P2, the generation of the noise NS can be effectively suppressed.

[0069] Also, as shown in graph G32, when the PWM signal SG output by the control unit 31 is composed of the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3, the sound output by the piezoelectric element 33 does not include the noise NE. In this way, by outputting the third PWM signal SG3 in the third period P3, the generation of the noise NE can be effectively suppressed.

[0070] [1-5. Processing of the Control Unit] Next, with reference to FIG. 10, the processing of the control unit 31 will be described. FIG. 10 is a flowchart showing the processing of the control unit 31. First, in step S101, the carrier generation unit 311 generates a carrier signal SGC with a constant duty ratio RD. The duty ratio RD of the carrier signal SGC is, for example, 50%. Next, in step S103, the first signal generation unit 312 reads out one audio signal from among the plurality of audio signals stored in the audio storage unit 316. Next, in step S105, the first signal generation unit 312 generates a first PWM signal SG1 by modulating the duty ratio RD of the carrier signal SGC with one audio signal read in step S103.

[0071] Next, in step S107, the second signal generation unit 313 generates a second PWM signal SG2. The second PWM signal SG2 is, for example, a signal output immediately before the first PWM signal SG1. Also, the second PWM signal SG2 is a signal with a duty ratio RD smaller than the average duty ratio RDA. The average duty ratio RDA is the average value of the duty ratio RD of the first PWM signal. Next, in step S109, the third signal generation unit 314 generates a third PWM signal SG3. The third PWM signal SG3 is, for example, a signal output immediately after the first PWM signal. Also, the third PWM signal SG3 is a signal with a duty ratio RD smaller than the average duty ratio RDA.

[0072] Next, in step S111, the signal output unit 315 generates a PWM signal SG by synthesizing, for example, the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3. Next, in step S113, the signal output unit 315 outputs the PWM signal SG generated in step S111 to the amplifier 32. Then, the process ends. Note that the amplifier 32 amplifies the PWM signal SG to generate a PWM signal SL. Also, the amplifier 32 outputs the generated PWM signal SL to the piezoelectric element 33. The piezoelectric element 33 outputs sound.

[0073] [1-6. Configuration, and Effect] As described above, the sound output device 3 includes a control unit 31 that outputs a PWM signal SG, an amplifier 32 that amplifies the PWM signal SG, and a piezoelectric element 33 that outputs sound in response to the PWM signal SL output by the amplifier 32. The control unit 31 outputs a first PWM signal SG1 that is a PWM signal corresponding to the sound, a second PWM signal SG2 that is output before the first PWM signal SG1 and has a duty ratio RD smaller than an average duty ratio RDA that is an average value of the duty ratio RD of the first PWM signal SG1, and at least one of a third PWM signal SG3 that is output after the first PWM signal SG1 and has a duty ratio RD smaller than the average duty ratio RDA.

[0074] According to this, by outputting the second PWM signal SG2, the noise NS generated before the first PWM signal SG1 can be suppressed. Also, by outputting the third PWM signal SG3, the noise NE generated after the first PWM signal SG1 can be suppressed. Therefore, with a simple configuration, sound with a quality comparable to the sound output from the speaker can be output.

[0075] In the sound output device 3, the duty ratio RD of the second PWM signal SG2 gradually increases.

[0076] According to this, by outputting the second PWM signal SG2, the noise NS generated before the first PWM signal SG1 can be effectively suppressed.

[0077] In the sound output device 3, the duty ratio RD of the second PWM signal SG2 increases stepwise.

[0078] According to this, by outputting the second PWM signal SG2, the noise NS generated before the first PWM signal SG1 can be effectively suppressed. Also, the second PWM signal SG2 can be generated with a simple process.

[0079] In the sound output device 3, the duty ratio RD of the second PWM signal SG2 increases smoothly.

[0080] According to this, by outputting the second PWM signal SG2, the noise NS generated before the first PWM signal SG1 can be effectively suppressed.

[0081] In the sound output device 3, the second PWM signal SG2 is output during a period that is equal to or longer than a preset first threshold value TH1.

[0082] According to this, by setting the first threshold value TH1 to an appropriate value and outputting the second PWM signal SG2, the noise NS generated before the first PWM signal SG1 can be effectively suppressed.

[0083] In the sound output device 3, the duty ratio RD of the third PWM signal SG3 gradually decreases.

[0084] According to this, by outputting the third PWM signal SG3, the noise NE generated after the first PWM signal SG1 can be effectively suppressed.

[0085] In the sound output device 3, the duty ratio RD of the third PWM signal SG3 decreases step by step.

[0086] According to this, by outputting the third PWM signal SG3, the noise NE generated after the first PWM signal SG1 can be effectively suppressed. Also, the third PWM signal SG3 can be generated with simple processing.

[0087] In the sound output device 3, the duty ratio RD of the third PWM signal SG3 decreases smoothly.

[0088] According to this, by outputting the third PWM signal SG3, the noise NE generated after the first PWM signal SG1 can be effectively suppressed.

[0089] In the sound output device 3, the third PWM signal RD is output during a period that is equal to or longer than a preset second threshold value TH2.

[0090] According to this, by setting the second threshold value TH2 to an appropriate value and outputting the third PWM signal SG3, the noise NE generated after the first PWM signal SG1 can be effectively suppressed.

[0091] In the sound output device 3, the PWM signal SG is output at a frequency higher than the frequency of the human audible range.

[0092] According to this, it is possible to effectively suppress the generation of noise in the frequency range of the human audible range when the PWM signal SG is output.

[0093] In the sound output device 3, the first PWM signal SG1 is generated by modulating the duty ratio RD of a carrier signal SGC with a constant duty ratio with a signal corresponding to the sound.

[0094] According to this, the first PWM signal SG1 can be generated with a simple configuration.

[0095] In the sound output device 3, the sound includes at least one of voice and melody.

[0096] According to this, at least one of voice and melody can be output with good quality comparable to the case of being output from a speaker.

[0097] In the sound output device 3, the amplifier 32 includes a transistor 321.

[0098] According to this, the amplifier 32 can be realized with a simple configuration.

[0099] In the sound output device 3, the piezoelectric element 33 includes a plurality of piezoelectric elements, and the plurality of piezoelectric elements are connected in parallel.

[0100] According to this, the volume of the sound output from the piezoelectric element 33 can be increased with a simple configuration.

[0101] The cooker 1 includes a control unit 31 that outputs a PWM signal SG, an amplifier 32 that amplifies the PWM signal SG, and a piezoelectric element 33 that outputs sound in response to the PWM signal SL output by the amplifier 32. The control unit 31 outputs at least one of a first PWM signal SG1 that is a PWM signal corresponding to the sound, a second PWM signal SG2 that is output before the first PWM signal SG1 and has a duty ratio RD smaller than an average duty ratio RDA that is an average value of the duty ratio RD of the first PWM signal SG1, and a third PWM signal SG3 that is output after the first PWM signal SG1 and has a duty ratio RD smaller than the average duty ratio RDA.

[0102] According to this, the cooker 1 exhibits the same effects as those of the sound output device 3 described above.

[0103] (Other embodiments) As described above, as an example disclosed in the present application, the above-described Embodiment 1 has been described. However, the technology in the present disclosure is not limited to this, and can also be applied to embodiments in which changes, replacements, additions, omissions, etc. are made. Also, it is possible to form a new embodiment by combining the respective components described in the above-described Embodiment 1. Therefore, other embodiments will be exemplified below.

[0104] In the above-described Embodiment 1, the cooker 1 that performs cooking has been exemplified as the "electronic device" of the present disclosure. The "electronic device" of the present disclosure is not limited to the cooker 1. The "electronic device" of the present disclosure may be a so-called home electric appliance (household electronic device) such as a home baker, a rice cooker, a coffee maker, a microwave oven, a refrigerator, a washing machine, etc. Also, the "electronic device" of the present disclosure may be an industrial electronic device.

[0105] In the above-described Embodiment 1, the case where the sound output device 3 outputs voice has been mainly described, but the present disclosure is not limited to this. The sound output device 3 may output sound. For example, the sound output device 3 may output a melody.

[0106] In the above-described Embodiment 1, the case where the control unit 31 outputs the first PWM signal SG1, the second PWM signal SG2, and the third PWM signal SG3 has been described. However, the present disclosure is not limited thereto. The control unit 31 may output at least one of the first PWM signal SG1 and at least one of the second PWM signal SG2 and the third PWM signal SG3. For example, the control unit 31 may output the first PWM signal SG1 and the second PWM signal SG2. Further, for example, the control unit 31 may output the first PWM signal SG1 and the third PWM signal SG3.

[0107] In the above-described Embodiment 1, the case where the duty ratio RD of the second PWM signal SG2 is gradually increased has been described. However, the present disclosure is not limited thereto. For example, the amplitude of the second PWM signal SG2 may be gradually increased. Also, in the above-described Embodiment 1, the case where the duty ratio RD of the third PWM signal SG3 is gradually decreased has been described. However, the present disclosure is not limited thereto. For example, the amplitude of the second PWM signal SG2 may be gradually decreased.

[0108] In the above-described Embodiment 1, as shown in FIGS. 7 and 8, the case where the duty ratio RD of the second PWM signal SG2 changes has been described. However, the present disclosure is not limited to the graph shapes shown in FIGS. 7 and 8. The duty ratio RD of the second PWM signal SG2 may have, for example, a graph shape that combines a stepwise change and a smooth change. For example, in an initial predetermined period, the duty ratio RD of the second PWM signal SG2 may change stepwise, and in a period after the predetermined period, the duty ratio RD of the second PWM signal SG2 may change smoothly. Further, for example, in an initial predetermined period, the duty ratio RD of the second PWM signal SG2 may change smoothly, and in a period after the predetermined period, the duty ratio RD of the second PWM signal SG2 may change stepwise. Further, when the duty ratio RD of the second PWM signal SG2 changes stepwise, the period during which the duty ratio RD is constant may be changed. For example, in the left diagram of FIG. 7, the period from time “0” to time TB may be longer or shorter than the period from time TB to time TA. Also, for example, in the left diagram of FIG. 8, the period from time TC to time TD may be longer or shorter than the period from time TD to time TE.

[0109] In the above-described Embodiment 1, with reference to FIG. 7, the case where the duty ratio RD of the second PWM signal SG2 increases linearly and the case where the duty ratio RD of the second PWM signal SG2 increases in a downwardly convex curve shape have been described. However, the present disclosure is not limited to this. The duty ratio RD of the second PWM signal SG2 may increase smoothly. In other words, in the curve showing the change in the duty ratio RD of the second PWM signal SG2, for example, the curvature may change continuously.

[0110] In the above-described Embodiment 1, with reference to FIG. 8, the case where the duty ratio RD of the third PWM signal SG3 decreases linearly and the case where the duty ratio RD of the third PWM signal SG3 decreases in a downwardly convex curve shape have been described. However, the present disclosure is not limited to this. The duty ratio RD of the third PWM signal SG3 may decrease smoothly. In other words, in the curve showing the change in the duty ratio RD of the third PWM signal SG3, for example, the curvature may change continuously.

[0111] In the above-described Embodiment 1, the case where the piezoelectric element 33 is composed of the first piezoelectric element 331 and the second piezoelectric element 332 has been described. However, the present disclosure is not limited to this. The piezoelectric element 33 may be composed of one piezoelectric element. Also, the piezoelectric element 33 may be composed of three or more piezoelectric elements.

[0112] Generally, the piezoelectric buzzer has a high sound pressure at 2 kHz to 4 kHz, and a low sound pressure in other frequency bands. Therefore, by performing "pre-emphasis processing" according to the frequency characteristics of the piezoelectric buzzer on the voice data stored in the voice memory unit 316, the sound can be reproduced with higher sound quality. "Pre-emphasis processing" is a process of increasing in advance the sound pressure of the voice data in the band where the sound pressure is expected to decrease by the piezoelectric buzzer.

[0113] By adding voice data equivalent to gradually increasing the duty ratio RD before the voice data stored in the voice memory unit 316, it is possible to reduce the processing of the second signal generation unit 313. Also, by adding voice data equivalent to gradually decreasing the duty ratio RD after the voice data stored in the voice memory unit 316, it is possible to reduce the processing of the third signal generation unit 314.

[0114] The configuration of the sound output device 3 shown in FIG. 5 is an example, and the specific implementation form is not particularly limited. That is, it is not necessarily required that hardware corresponding to each part be individually implemented, and it is also possible to adopt a configuration in which one processor executes a program to realize the functions of each part. Also, a part of the functions realized by software in the above-described embodiment may be implemented as hardware, or a part of the functions realized by hardware may be realized by software.

[0115] The step units of the processing shown in FIG. 10 are divided according to the main processing content for easy understanding of the processing, and the processing is not limited by the way of dividing the processing units and the names. Depending on the processing content, it may be further divided into more step units. Also, one step unit may be divided to include more processing. Also, the order of the steps may be appropriately changed within the scope that does not hinder the gist of the present disclosure.

[0116] Note that the above-described embodiments are for exemplifying the technology in the present disclosure, and thus various changes, replacements, additions, omissions, etc. can be made within the scope of the claims or the equivalent scope thereof.

[0117] (Addendum) From the description of the above embodiments, the following technology is disclosed.

[0118] (Technology 1) A sound output device including a control unit that outputs a PWM signal, an amplifier that amplifies the PWM signal, and a piezoelectric element that outputs sound in response to the PWM signal output by the amplifier, wherein the control unit outputs at least one of a first PWM signal that is a PWM signal corresponding to the sound, a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than an average duty ratio that is a substantially average value of the duty ratio of the first PWM signal, and a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio. According to this configuration, by outputting the second PWM signal, noise generated before the first PWM signal can be suppressed. By outputting the third PWM signal, noise generated after the first PWM signal can be suppressed. Therefore, with a simple configuration, sound with a quality comparable to the sound output from a speaker can be output.

[0119] (Technology 2) The sound output device according to Technology 1, wherein the second PWM signal has a gradually increasing duty ratio. According to this configuration, by outputting the second PWM signal, noise generated before the first PWM signal can be effectively suppressed.

[0120] (Technology 3) The sound output device according to Technology 1 or Technology 2, wherein the second PWM signal has a stepwise increasing duty ratio. According to this configuration, by outputting the second PWM signal, noise generated before the first PWM signal can be effectively suppressed. Also, the second PWM signal can be generated by simple processing.

[0121] (Technology 4) The second PWM signal is the sound output device according to Technology 1 or Technology 2 in which the duty ratio increases smoothly. According to this configuration, by outputting the second PWM signal, the noise generated before the first PWM signal can be effectively suppressed.

[0122] (Technology 5) The second PWM signal is the sound output device according to any one of Technologies 1 to 4, which is output in a period equal to or longer than a preset first threshold value. According to this configuration, by setting the first threshold value to an appropriate value and outputting the second PWM signal, the noise generated before the first PWM signal can be effectively suppressed.

[0123] (Technology 6) The third PWM signal is the sound output device according to any one of Technologies 1 to 5, in which the duty ratio gradually decreases. According to this configuration, by outputting the third PWM signal, the noise generated after the first PWM signal can be effectively suppressed.

[0124] (Technology 7) The third PWM signal is the sound output device according to any one of Technologies 1 to 6, in which the duty ratio decreases stepwise. According to this configuration, by outputting the third PWM signal, the noise generated after the first PWM signal can be effectively suppressed. Also, the third PWM signal can be generated by simple processing.

[0125] (Technology 8) The third PWM signal is the sound output device according to any one of Technologies 1 to 6, in which the duty ratio decreases smoothly. According to this configuration, by outputting the third PWM signal, the noise generated after the first PWM signal can be effectively suppressed.

[0126] (Technology 9) The third PWM signal is the sound output device according to any one of Technologies 1 to 8, which is output in a period equal to or longer than a preset second threshold value. According to this configuration, by setting the second threshold value to an appropriate value and outputting the third PWM signal, the noise generated after the first PWM signal can be effectively suppressed.

[0127] (Technical 10) The sound output device according to any one of Technologies 1 to 9, wherein the PWM signal is output at a frequency higher than the frequency of the human audible range. According to this configuration, it is possible to effectively suppress the generation of noise having a frequency in the human audible range when the PWM signal is output.

[0128] (Technical 11) The sound output device according to any one of Technologies 1 to 10, wherein the first PWM signal is generated by modulating the duty ratio of a carrier signal having a constant duty ratio with a signal corresponding to the sound. According to this configuration, the first PWM signal can be generated with a simple configuration.

[0129] (Technical 12) The sound output device according to any one of Technologies 1 to 11, wherein the sound includes at least one of voice and melody. According to this configuration, at least one of voice and melody can be output with a quality as good as that when output from a speaker.

[0130] (Technical 13) The sound output device according to any one of Technologies 1 to 12, wherein the amplifier has a semiconductor amplification element including a transistor. According to this configuration, the amplifier can be realized with a simple configuration.

[0131] (Technical 14) The sound output device according to any one of Technologies 1 to 13, wherein the piezoelectric element includes a plurality of piezoelectric elements, and the plurality of piezoelectric elements are connected in parallel. According to this configuration, the volume of the sound output from the piezoelectric element can be increased with a simple configuration.

[0132] (Technology 15) An electronic device comprising: a control unit that outputs a PWM signal; an amplifier that amplifies the PWM signal; and a piezoelectric element that outputs sound in response to the PWM signal output by the amplifier, wherein the control unit outputs at least one of: a first PWM signal that is a PWM signal corresponding to the sound; a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than an average duty ratio that is a substantially average value of the duty ratio of the first PWM signal; and a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio. According to this configuration, the same effects as those of the sound output device described in Technology 1 are achieved.

Industrial Applicability

[0133] As described above, the sound output device and the electronic device according to the present invention have a simple configuration and can be used for applications that output sound with a quality comparable to that of the sound output from a speaker.

Explanation of Signs

[0134] 1 Cooker (electronic device) 3 Sound output device 31 Control unit 31A Processor 311 Carrier generation unit 312 First signal generation unit 313 Second signal generation unit 314 Third signal generation unit 315 Signal output unit 31B Memory 316 Voice storage unit 32 Amplifier 321 Transistor 33 Piezoelectric element 331 First piezoelectric element 332 Second piezoelectric element NS, NE Noise PG Control program RD Duty ratio RDA Average duty ratio SG, SL PWM signal SG1 First PWM signal SG2 2nd PWM signal SG3 3rd PWM signal SGC Carrier signal

Claims

1. A control unit that outputs a PWM signal, an amplifier that amplifies the PWM signal, a piezoelectric element that outputs sound in response to the PWM signal output by the amplifier, comprising: the control unit, a first PWM signal that is a PWM signal corresponding to the sound, a second PWM signal that is output before the first PWM signal and has a duty ratio smaller than the average duty ratio that is the substantially average value of the duty ratio of the first PWM signal, and at least one of a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio, A sound output device that outputs.

2. The second PWM signal has a gradually increasing duty ratio, The sound output device according to claim 1.

3. The second PWM signal has a stepwise increasing duty ratio, The sound output device according to claim 1.

4. The second PWM signal has a smoothly increasing duty ratio, The sound output device according to claim 1.

5. The second PWM signal is output during a period equal to or longer than a preset first threshold value, The sound output device according to claim 1.

6. The third PWM signal has a gradually decreasing duty ratio, The sound output device according to claim 1.

7. The third PWM signal has a stepwise decreasing duty ratio, The sound output device according to claim 1.

8. The third PWM signal has a smoothly decreasing duty ratio, The sound output device according to claim 1.

9. The third PWM signal is output during a period equal to or longer than a preset second threshold value, The sound output device according to claim 1.

10. The PWM signal is output at a frequency higher than the frequency of the human audible range, The sound output device according to any one of claims 1 to 9.

11. The first PWM signal is generated by modulating the duty ratio of a carrier signal having a constant duty ratio with a signal corresponding to the sound, The sound output device according to any one of claims 1 to 9.

12. The sound includes at least one of voice and melody, The sound output device according to any one of claims 1 to 9.

13. The amplifier has a semiconductor amplification element including a transistor, The sound output device according to any one of claims 1 to 9.

14. The piezoelectric element includes a plurality of piezoelectric elements, The plurality of piezoelectric elements are connected in parallel. The sound output device according to any one of claims 1 to 9.

15. A control unit that outputs a PWM signal, An amplifier that amplifies the PWM signal, A piezoelectric element that outputs sound in response to the PWM signal output by the amplifier, Comprising, The control unit, A first PWM signal that is a PWM signal corresponding to the sound, A second PWM signal that is output before the first PWM signal and has a duty ratio smaller than the average duty ratio that is the substantially average value of the duty ratio of the first PWM signal, and a third PWM signal that is output after the first PWM signal and has a duty ratio smaller than the average duty ratio, at least one of them, An electronic device that outputs.

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