Circuit apparatus

Abstract

To make it possible to perform efficient measurements when measuring output signals from a plurality of measuring objects.SOLUTION: A circuit apparatus comprises: a measuring terminal unit connected to a measuring object device; an interface terminal unit connected to a master apparatus; a measuring circuit for measuring the output signal of the measuring object device inputted via the measuring terminal unit; a holding circuit for holding measuring data obtained by the measuring circuit; and an interface circuit for transmitting the measuring data to the master apparatus via the interface terminal unit.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a circuit device.

Background Art

[0002] Conventionally, a technique for measuring the frequency of an oscillation signal has been known. For example, in Patent Document 1, a frequency measurement circuit is disclosed that processes a measurement target clock signal and a reference clock signal based on a time digital conversion circuit to measure the frequency of the measurement target clock signal.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the conventional technology, when measuring the frequencies of oscillation signals output from a plurality of measurement targets, it is necessary to input the oscillation signals of the measurement targets one by one into a frequency measurement circuit and measure the frequencies one by one. Therefore, when measuring output signals from a plurality of measurement targets, efficient measurement could not be performed.

Means for Solving the Problems

[0005] A circuit device according to an embodiment includes a measurement terminal unit connected to a measurement target device, an interface terminal unit connected to a master device, a measurement circuit that measures an output signal of the measurement target device input via the measurement terminal unit, a holding circuit that holds measurement data obtained by the measurement circuit, and an interface circuit that transmits the measurement data to the master device via the interface terminal unit.

Brief Description of the Drawings

[0006]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0007] Here, embodiments of the present invention will be described in the following order. (1) Configuration of the measurement system (2) Configuration of the circuit device (3) Configuration of the device under measurement (4) Measurement process (5) Other embodiments, etc.

[0008] (1) Configuration of the measurement system: FIG. 1 is a configuration diagram showing a measurement system using a circuit device 10 according to an embodiment of the present invention. In the present embodiment, a plurality of circuit devices 10 are connected to one master device 20. Each circuit device 10 is controlled by the master device 20. Further, a measurement target device 30 is connected to each of the plurality of circuit devices 10, and the output signal of the measurement target device 30 is measured in the circuit device 10. The reference oscillation signal source 40 is a device that outputs a reference oscillation signal REFCLK, which is an oscillation signal of a known frequency. The reference oscillation signal source 40 is connected to each circuit device 10, and the reference oscillation signal REFCLK is input to each circuit device 10.

[0009] The heater 50 is a heating device for adjusting each measurement target device 30 to a desired temperature. The temperature sensor 51 is a device that detects the temperature of the measurement target device 30. The master device 20 is a device capable of communicating with the plurality of circuit devices 10, the measurement target device 30, the heater 50, and the temperature sensor 51, and can be realized, for example, by a computer equipped with a general-purpose processor. In the present embodiment, the master device 20 controls the plurality of circuit devices 10, the measurement target device 30, the heater 50, and the temperature sensor 51. Of course, the master device 20 may be divided into a plurality of devices. For example, a device that controls the plurality of circuit devices 10 and the measurement target device 30 to perform measurement, and a device that controls the heater 50 and the temperature sensor 51 to perform temperature adjustment are separated, and each device may cooperate with each other.

[0010] The master device 20 can perform serial communication with the circuit device 10 in the SPI (Serial Peripheral Interface) mode. For this reason, the circuit device 10 is connected to the master device 20 via a CS (Chip Select) terminal, a CLK (Clock) terminal, an SDI (Serial Data Input) terminal, and an SDO (Serial Data Output) terminal. Further, in the present embodiment, the circuit device 10 includes a TRG (Trigger) terminal, and the circuit device 10 is connected to the master device via the TRG terminal. In the present embodiment, these CS terminal, CLK terminal, SDI terminal, SDO terminal, and TRG terminal provided in the circuit device 10 are referred to as an interface terminal portion.

[0011] The device under measurement 30 may be any device that outputs an output signal to be measured, and is an oscillator in the present embodiment. The device under measurement 30 has, for example, a size of 1 mm square, and measurement may be performed in a state where a plurality of oscillators are formed on a wafer. On the other hand, the circuit device 10 has, for example, a size of about 5 mm square, and a state where a plurality of circuit devices 10 are formed on a substrate can be assumed.

[0012] Then, the circuit device 10 formed on the substrate and the device under test 30 formed on the wafer are connected one-to-one for measurement. In the present embodiment, the circuit device 10 and the device under test 30 are connected by the IO1 terminal and the IO2 terminal. The device under test 30 can perform serial communication with the master device 20 in the I2C (Inter-Integrated Circuit) mode via these terminals. That is, when the master device 20 and the device under test 30 communicate, the signals input to the CLK terminal and the SDI terminal from the master device 20 pass through the circuit device 10 and are output from the IO1 terminal and the IO2 terminal. The output signals are input to the IO1 terminal and the IO2 terminal of the device under test 30. Also, the signals input to the IO1 terminal and the IO2 terminal from the device under test 30 pass through the circuit device 10 and are output from the CLK terminal and the SDI terminal. The output signals are input to the master device 20. In this state, the master device 20 can perform serial communication with the device under test 30 in the I2C mode.

[0013] The output signal of the device under test output from the device under test 30 is not limited, but in the present embodiment, any one of an oscillation signal, an analog voltage signal, and an analog current signal becomes the output signal. When the oscillation signal becomes the output signal, the frequency of the oscillation signal becomes the measurement target. When the analog voltage signal becomes the output signal, the voltage value is the measurement target, and when the analog current signal becomes the output signal, the current value is the measurement target. In the device under test 30, serial communication with the master device 20 can be performed via the IO1 terminal and the IO2 terminal. However, when set to the measurement mode in the serial communication, it becomes a mode of outputting an oscillation signal from the IO1 terminal and an analog voltage signal or an analog current signal from the IO2 terminal. The details of the configuration of the device under test 30 will be described later. The oscillation signal of the device under test output from the device under test 30 via the IO1 terminal is hereinafter referred to as the oscillation signal OBJCLK.

[0014] (2) Configuration of the circuit device: FIG. 2 is a block diagram showing the configuration of the circuit device 10. The circuit device 10 includes a measurement terminal section, an interface terminal section, an interface circuit 11, a measurement circuit 12, and a holding circuit 13. The measurement terminal section is a terminal provided in the circuit device 10 for electrically connecting the measurement target device 30 to the circuit device 10, and includes an IO1 terminal and an IO2 terminal. The interface terminal section is each terminal of a CS terminal, a CLK terminal, an SDI terminal, an SDO terminal, and a TRG terminal connected to the master device 20. The holding circuit 13 is a circuit that holds the measurement data obtained by the circuit device 10, and includes a register and a non-volatile memory in the present embodiment.

[0015] The measurement circuit 12 is a circuit that measures the output signal of the measurement target device 30 input via the measurement terminal section. In the present embodiment, the interface circuit 11 includes a first switch circuit SW1, a second switch circuit SW2, and a communication control circuit 11a. The first switch circuit SW1 is a circuit that switches the electrical connection destination of the CLK terminal electrically connected to the master device 20, and the connection destination is either the IO1 terminal or the CLK terminal provided in the communication control circuit 11a. The second switch circuit SW2 is a circuit that switches the electrical connection destination of the SDI terminal electrically connected to the master device 20, and the connection destination is either the IO2 terminal or the SDI terminal provided in the communication control circuit 11a.

[0016] Before the measurement starts, the interface circuit 11 relays the I2C serial communication between the master device 20 and the measurement target device 30 in order to control the measurement target device 30 from the master device 20 to shift to the measurement mode. That is, before the measurement starts, the interface circuit 11 electrically connects the CLK terminal and the IO1 terminal by the first switch circuit SW1, and electrically connects the SDI terminal and the IO2 terminal by the second switch circuit SW2.

[0017] Therefore, the signals input from the master device 20 via the CLK terminal and the SDI terminal pass through the circuit device 10 including the interface circuit 11 and are input to the device under measurement 30 via the IO1 terminal and the IO2 terminal. In this state, the master device 20 controls the device under measurement 30 by serial communication in the I2C system and causes it to shift from the normal mode to the measurement mode. When the measurement mode is entered and the measurement is started, the device under measurement 30 outputs the output signal of the object to be measured from the IO1 terminal and the IO2 terminal. According to the above configuration, the device under measurement 30 connected to the circuit device 10 can be easily controlled by the master device 20.

[0018] Furthermore, in this state, the interface circuit 11 is in a state of performing serial communication with the master device 20 in the SPI system via the interface terminal section. Specifically, when the master device 20 sets the voltage level of the CS terminal to active, the connection destinations of the first switch circuit SW1 and the second switch circuit SW2 are switched. That is, the signal input to the CLK terminal from the master device 20 is input to the CLK terminal of the communication control circuit 11a. Also, the signal input to the SDI terminal from the master device 20 is input to the SDI terminal of the communication control circuit 11a.

[0019] The measurement circuit 12 includes a third switch circuit SW3, a fourth switch circuit SW4, a fifth switch circuit SW5, a counter 12a, a signal processing circuit 12b, a resistance element 12c, an A / D (analog / digital) conversion circuit 12d, and an arithmetic circuit 12e. The third switch circuit SW3 is a circuit for selecting the electrical connection destination of the fourth switch circuit SW4. That is, when the third switch circuit SW3 is connected to terminal 1, the connection destination becomes the IO1 terminal; when connected to terminal 2, the connection destination becomes the IO2 terminal; and when connected to terminal 3, the connection destination becomes non-connected. The fourth switch circuit SW4 is a circuit for selecting the electrical connection destination of the third switch circuit SW3. That is, when the fourth switch circuit SW4 is connected to terminal 1, the connection destination becomes the counter 12a; when connected to terminal 2, the connection destination becomes the fifth switch circuit SW5; and when connected to terminal 3, the connection destination becomes the resistance element 12c. The fifth switch circuit SW5 is a circuit for selecting the electrical connection destination of the A / D conversion circuit 12d. That is, when the fifth switch circuit SW5 is connected to terminal 1, the connection destination becomes the signal processing circuit 12b; when connected to terminal 2, the connection destination becomes the fourth switch circuit SW4; and when connected to terminal 3, the connection destination becomes the resistance element 12c.

[0020] The communication control circuit 11a includes a processor that performs processing related to SPI communication and has a CS terminal, a CLK terminal, an SDI terminal, and an SDO terminal. These terminals are electrically connected to the CS terminal, CLK terminal, SDI terminal, and SDO terminal respectively through which the circuit device 10 and the master device 20 are electrically connected. Also, the communication control circuit 11a is connected to the arithmetic circuit 12e and can control the third switch circuit SW3, the fourth switch circuit SW4, and the fifth switch circuit SW5 according to an instruction from the arithmetic circuit 12e to switch the connection destination.

[0021] Specifically, when the output signal of the measurement target is the oscillation signal OBJCLK output from the measurement target device 30, the oscillation signal OBJCLK is input to the circuit device 10 from the IO1 terminal. Therefore, the communication control circuit 11a controls the third switch circuit SW3 to connect the terminal 1, and electrically connects the IO1 terminal and the fourth switch circuit SW4. When the output signal of the measurement target is an analog voltage signal or an analog current signal output from the measurement target device 30, the analog voltage signal or the analog current signal is input to the circuit device 10 from the IO2 terminal. Therefore, the communication control circuit 11a controls the third switch circuit SW3 to connect the terminal 2, and electrically connects the IO2 terminal and the fourth switch circuit SW4. When not set to the measurement mode for measuring the output signal from the measurement target device 30, the communication control circuit 11a controls the third switch circuit SW3 to connect the terminal 3, and sets the fourth switch circuit SW4 to a non-connected state where it is not electrically connected to either the IO1 terminal or the IO2 terminal.

[0022] Furthermore, when the output signal of the measurement target is the oscillation signal OBJCLK output from the measurement target device 30, the communication control circuit 11a controls the fourth switch circuit SW4 to connect the terminal 1, and electrically connects the third switch circuit SW3 and the counter 12a. Also, the communication control circuit 11a controls the fifth switch circuit SW5 to connect the terminal 1, and electrically connects the signal processing circuit 12b and the A / D conversion circuit 12d. As a result, the oscillation signal OBJCLK input from the IO1 terminal is processed by the counter 12a, the signal processing circuit 12b, and the A / D conversion circuit 12d.

[0023] An oscillation signal OBJCLK is input to the counter 12a via the fourth switch circuit SW4. Also, a reference oscillation signal REFCLK is input to the counter 12a. The counter 12a includes a counter that counts the number of pulses of each of the reference oscillation signal REFCLK and the oscillation signal OBJCLK. The respective count results of the reference oscillation signal REFCLK and the oscillation signal OBJCLK are output to the arithmetic circuit 12e as the first count data CNT1 and the second count data CNT2.

[0024] Also, the counter 12a outputs a measurement start signal STA that transitions at a timing corresponding to the reference oscillation signal REFCLK and transitions at a predetermined period, and outputs a measurement end signal STP that transitions at a timing corresponding to the oscillation signal OBJCLK and transitions at a predetermined period. The first count data CNT1 is the number of counts of the pulses of the reference oscillation signal REFCLK from the rising edge of the measurement start signal STA to the next rising edge. The second count data CNT2 is the number of counts of the pulses of the oscillation signal OBJCLK from the rising edge of the measurement end signal STP to the next rising edge.

[0025] The signal processing circuit 12b, together with the A / D conversion circuit 12d, constitutes a time digital conversion circuit. That is, in a state where the output signal of the signal processing circuit 12b is output to the A / D conversion circuit 12d by the fifth switch circuit SW5, when the analog voltage signal generated by the signal processing circuit 12b is supplied to the A / D conversion circuit 12d, the A / D conversion circuit 12d outputs time difference information corresponding to the time difference between the rising edge of the measurement start signal START and the rising edge of the measurement end signal STOP.

[0026] The arithmetic circuit 12e is electrically connected to the TRG terminal. The master device 20 transmits a common trigger signal for instructing the start of measurement to all of the plurality of circuit devices 10. When a trigger signal is input to the arithmetic circuit 12e via the TRG terminal, the arithmetic circuit 12e starts measuring the frequency.

[0027] Specifically, the arithmetic circuit 12e performs an arithmetic operation based on the time difference information input from the A / D conversion circuit 12d and the first count data CNT1 and the second count data CNT2 input from the counter 12a, and obtains the frequency of the oscillation signal OBJCLK. The second count data CNT2 corresponds to the time with the period of the oscillation signal OBJCLK as the resolution, and the first count data CNT1 corresponds to the time with the period of the reference oscillation signal REFCLK as the resolution. In addition to these, the arithmetic circuit 12e can accurately measure the frequency of the oscillation signal OBJCLK with the period of the reference oscillation signal REFCLK as a reference by using the time difference information input from the A / D conversion circuit 12d. That is, the arithmetic circuit 12e constitutes a frequency measurement circuit that measures the frequency of the oscillation signal OBJCLK, which is a clock signal.

[0028] Note that the signal processing circuit 12b can use a configuration similar to that of a known time digital conversion circuit. For example, it can be composed of an integration period signal generation circuit, a polarity switching signal generation circuit, and an integration circuit. The integration period signal generation circuit is a circuit that receives the measurement start signal STA and the measurement end signal STP respectively, and outputs an integration period signal for each of them. The polarity switching signal generation circuit is a circuit that outputs a signal that transitions from a low level to a high level at a timing synchronized with the reference oscillation signal REFCLK during the integration period determined by the integration period signal, and a signal that transitions from a low level to a high level after a predetermined number of clocks of the reference oscillation signal REFCLK from the transition timing of the signal. The integration processing circuit is a circuit that performs integration processing based on the output of the polarity switching signal generation circuit.

[0029] When the arithmetic circuit 12e calculates the frequency, the arithmetic circuit 12e causes the register and the non-volatile memory of the holding circuit 13 to hold the measurement data indicating the frequency. The master device 20 can issue a read instruction for the measurement data via the SDI terminal. When the read instruction is issued, the arithmetic circuit 12e receives the instruction via the communication control circuit 11a and acquires the measurement data from the register or the non-volatile memory of the holding circuit 13. Then, the arithmetic circuit 12e transmits the measurement data to the master device 20 using the SDO terminal via the communication control circuit 11a. That is, the interface circuit 11 transmits the measurement data to the master device 20 via the interface terminal section under the control of the arithmetic circuit 12e.

[0030] As a result, the master device 20 can acquire the measurement data indicating the frequency of the measurement target device 30. In the present embodiment, the master device 20 and the plurality of circuit devices 10 are electrically connected to the TRG terminal by a common wiring. Therefore, the trigger signal output from the master device 20 is input to all of the plurality of circuit devices 10. For this reason, all of the plurality of circuit devices 10 start measurement synchronously. For this reason, the measurement results in the plurality of circuit devices 10 can be regarded as the measurement results measured at the same temperature. Thereby, the variation in the measurement conditions can be suppressed for each of the plurality of circuit devices 10. Further, since the difference between the temperature read by the temperature sensor 51 and the temperature of the measurement result is reduced, the accuracy of the temperature compensation of the frequency in the measurement target device 30 can be improved.

[0031] When the output signal to be measured is an analog voltage signal output from the device under measurement 30, the communication control circuit 11a controls the third switch circuit SW3 to connect terminal 2, controls the fourth switch circuit SW4 to connect terminal 2, and controls the fifth switch circuit SW5 to connect terminal 2. As a result, the analog voltage signal input from the IO2 terminal is processed by the A / D conversion circuit 12d. In this case, the A / D conversion circuit 12d operates based on the reference oscillation signal REFCLK and functions as a circuit that digitally converts the analog voltage input from the outside.

[0032] When the master device 20 transmits a common trigger signal for instructing the start of measurement to all of the plurality of circuit devices 10, the trigger signal is input to the arithmetic circuit 12e via the TRG terminal. The arithmetic circuit 12e starts measuring the voltage value in response to the input of the trigger signal. Specifically, an analog voltage signal to be measured is input to the IO2 terminal. The analog voltage signal is converted into a digital voltage signal by the A / D conversion circuit 12d, and the arithmetic circuit 12e acquires the voltage value of the digital voltage signal. That is, the arithmetic circuit 12e constitutes a voltage measurement circuit assuming a digital voltage signal.

[0033] When the arithmetic circuit 12e obtains the voltage value, the arithmetic circuit 12e causes the register and the non-volatile memory of the holding circuit 13 to hold the measurement data indicating the voltage value. When the master device 20 issues an instruction to read the measurement data via the SDI terminal, the arithmetic circuit 12e receives the instruction via the communication control circuit 11a and acquires the measurement data from the register or the non-volatile memory of the holding circuit 13. Then, the arithmetic circuit 12e transmits the measurement data to the master device 20 using the SDO terminal via the communication control circuit 11a. That is, the interface circuit 11 transmits the measurement data to the master device 20 via the interface terminal section under the control of the arithmetic circuit 12e.

[0034] As a result of the above, the master device 20 can acquire measurement data indicating the voltage value of the device under measurement 30. In the present embodiment, the master device 20 and the plurality of circuit devices 10 are electrically connected to the TRG terminal by a common wiring. Therefore, the trigger signal output from the master device 20 is input to all of the plurality of circuit devices 10. For this reason, all of the plurality of circuit devices 10 start measurement synchronously. For this reason, the measurement results in the plurality of circuit devices 10 can be regarded as measurement results measured at the same temperature. Thereby, variations in measurement conditions can be suppressed for each of the plurality of circuit devices 10.

[0035] When the output signal of the measurement target is an analog current signal output from the device under measurement 30, the communication control circuit 11a controls the third switch circuit SW3 to connect terminal 2, controls the fourth switch circuit SW4 to connect terminal 3, and controls the fifth switch circuit SW5 to connect terminal 3. As a result, the analog current signal input from the IO2 terminal is processed by the resistance element 12c and the A / D conversion circuit 12d. In this case, the A / D conversion circuit 12d operates based on the reference oscillation signal REFCLK and functions as a circuit that digitally converts an externally input analog voltage.

[0036] When the master device 20 transmits a common trigger signal for instructing the start of measurement to all of the plurality of circuit devices 10, the trigger signal is input to the arithmetic circuit 12e via the TRG terminal. The arithmetic circuit 12e starts measuring the current value in response to the input of the trigger signal. Specifically, an analog current signal of the measurement target is input to the IO2 terminal. The analog current signal is converted into an analog voltage signal by the resistance element 12c. This configuration can be realized, for example, by a configuration in which an analog current signal flows through the resistance element 12c and the voltage drop of the resistance element 12c due to the flowing current becomes an analog voltage signal.

[0037] The analog voltage signal output from the resistance element 12c is converted into a digital voltage signal by the A / D conversion circuit 12d, and the arithmetic circuit 12e acquires the voltage value of the digital voltage signal. When the voltage value is obtained, the arithmetic circuit 12e acquires the current value based on the voltage value. For example, in the above-described configuration, the arithmetic circuit 12e acquires the current value by dividing the voltage value by the resistance value that provides the voltage drop.

[0038] When the arithmetic circuit 12e obtains the current value, the arithmetic circuit 12e causes the register and the non-volatile memory of the holding circuit 13 to hold the measurement data indicating the current value. When the master device 20 issues a read instruction for the measurement data via the SDI terminal, the arithmetic circuit 12e receives the instruction via the communication control circuit 11a and acquires the measurement data from the register or the non-volatile memory of the holding circuit 13. Then, the arithmetic circuit 12e transmits the measurement data to the master device 20 using the SDO terminal via the communication control circuit 11a. That is, the interface circuit 11 transmits the measurement data to the master device 20 via the interface terminal section under the control of the arithmetic circuit 12e.

[0039] As a result, the master device 20 can acquire the measurement data indicating the current value of the measurement target device 30. In the present embodiment, the master device 20 and the plurality of circuit devices 10 are electrically connected to the TRG terminal by a common wiring. Therefore, the trigger signal output from the master device 20 is input to all of the plurality of circuit devices 10. For this reason, all of the plurality of circuit devices 10 start measurement synchronously. For this reason, the measurement results in the plurality of circuit devices 10 can be regarded as the measurement results measured at the same temperature. Thereby, the variation in the measurement conditions can be suppressed for each of the plurality of circuit devices 10.

[0040] (3) Configuration of the measurement target device Figure 3 is a block diagram showing the configuration of the device under measurement 30. The device under measurement 30 according to this embodiment includes a vibrator 3, an oscillation control circuit 30a, an output circuit 30b, a compensation voltage generation circuit 30c, a temperature sensor 30d, a regulator circuit 30e, a memory unit 30f, a serial interface (I / F) circuit 30g, and a digital control circuit 30h.

[0041] Based on the power supply voltage supplied from the VDD terminal, the regulator circuit 30e generates a constant voltage that serves as the power supply voltage or reference voltage for some or all of the oscillation control circuit 30a, the output circuit 30b, the compensation voltage generation circuit 30c, the digital control circuit 30h, etc. Of course, there are also regulator circuits and the like in the circuit device 10 and the master device 20, but these are omitted in FIGS. 1 and 2.

[0042] The serial interface circuit 30g is a circuit that serves as an interface for serial communication with the circuit device 10 and external devices. In this embodiment, the serial interface circuit 30g is a circuit that performs communication in the I2C format. Of course, the communication format is not limited to the I2C format. Also, in the measurement mode, the serial interface circuit 30g functions as a circuit for outputting the output signal of the measurement target. That is, in the measurement mode, the serial interface circuit 30g causes the oscillation signal OBJCLK output by the output circuit 30b to be output from the IO1 terminal, and causes the analog voltage signal or analog current signal generated by the regulator circuit 30e to be output from the IO2 terminal.

[0043] The oscillation control circuit 30a is a circuit that controls the oscillation of the vibrator 3. Specifically, the oscillation control circuit 30a amplifies the output signal of the vibrator 3 and feeds it back to the vibrator 3 to oscillate the vibrator 3, and outputs an oscillation signal OBJCLK based on the oscillation of the vibrator 3. In this embodiment, the oscillation control circuit 30a includes a variable capacitance element for temperature adjustment, and the frequency of the oscillation signal OBJCLK output from the oscillation control circuit 30a can be changed by changing the voltage applied to the variable capacitance element.

[0044] FIG. 4 is a diagram showing the circuit related to frequency control provided in the oscillation control circuit 30a and the oscillator 3 together. FIG. 4 is a schematic circuit diagram, and capacitive elements and the like may be added as appropriate. The oscillation control circuit 30a includes a power supply node Vcc to which a high potential is applied, a ground node GND which is a low potential node, an input node Vin, and an output node Vout. A voltage generated by the compensation voltage generation circuit 30c is applied to the input node Vin.

[0045] A voltage dividing resistors R1 and R2 are connected in series between the power supply node Vcc and the ground node GND. An oscillator 3 and a variable capacitance element (varicap diode) VC1 are connected in series between a voltage dividing node Nd between the voltage dividing resistors R1 and R2 and the ground node GND. One end of a resistor R5 is connected to the node between the oscillator 3 and the variable capacitance element VC1. The other end of the resistor R5 is the input node Vin.

[0046] The oscillation control circuit 30a has an oscillation amplification transistor Tr1. A resistor R4 is connected between the collector of the oscillation amplification transistor Tr1 and the power supply node Vcc. A capacitive element Co is connected between the collector of the oscillation amplification transistor Tr1 and the output node Vout. The voltage dividing node Nd of the voltage dividing resistors R1 and R2 is connected to the base of the oscillation amplification transistor Tr1. A resistor R3 is connected between the emitter of the oscillation amplification transistor Tr1 and the ground node GND.

[0047] Furthermore, in the oscillation control circuit 30a, a capacitive element C1 and a capacitive element C2 are connected in series between the voltage dividing node Nd and the ground node GND. The node between the capacitive element C1 and the capacitive element C2 is connected to the node between the emitter of the oscillation amplification transistor Tr1 and the resistor R3.

[0048] With the above configuration, the oscillation control circuit 30a becomes a Colpitts oscillator circuit, and the oscillation signal OBJCLK generated based on the oscillator 3 is output from the output node Vout. The temperature compensation voltage output from the compensation voltage generation circuit 30c is supplied to the input node Vin of the oscillation control circuit 30a. When the temperature compensation voltage is applied to the input node Vin, the capacitance of the variable capacitor element VC1 changes via the resistor R5, and as a result, the oscillation frequency of the oscillator 3 changes. Therefore, if a voltage that cancels out the frequency change of the oscillation signal OBJCLK due to temperature is applied to the variable capacitor element VC1, temperature compensation can be performed so that the frequency does not change with respect to a temperature change within a predetermined range. Note that the oscillation control circuit is not limited to a Colpitts oscillator circuit. Any circuit that controls the oscillation of the oscillator 3 may be used, and various oscillator circuits such as a Pierce type can be used.

[0049] The temperature sensor 30d is a temperature-sensitive element that outputs a signal (for example, a voltage corresponding to the temperature) according to the temperature around it. The temperature sensor 30d may have a positive polarity in which the output voltage increases as the temperature increases, or a negative polarity in which the output voltage decreases as the temperature increases. Note that as the temperature sensor 30d, it is desirable that the output voltage changes as linearly as possible with respect to temperature within the desired temperature range in which the operation of the measurement target device 30 is guaranteed. In the present embodiment, the output voltage corresponding to the temperature detected by the temperature sensor 30d is input to the digital control circuit 30h via an analog-to-digital conversion circuit (not shown).

[0050] The digital control circuit 30h is a processor that performs various digital processes. The various digital processes include control processing for the compensation voltage generation circuit 30c and switching processing between the normal mode and the measurement mode.

[0051] The memory unit 30f has a register and a non-volatile memory. The register and the non-volatile memory can store various kinds of data. In this embodiment, temperature compensation data is stored in the register and the non-volatile memory. The temperature compensation data is data for correcting the frequency-temperature characteristics, which is calculated in the temperature compensation adjustment process of the oscillator that is the measurement target device 30. The temperature compensation data may be defined in various manners. For example, it is a value for causing the compensation voltage generation circuit 30c to output a voltage corresponding to each order component from the 0th to the nth order of the frequency-temperature characteristics of the oscillation signal OBJCLK of the resonator 3. If the resonator 3 is an AT-cut crystal resonator, since the frequency-temperature characteristics exhibit a cubic curve, an integer value of 3 or more is selected as n. Note that the temperature compensation data may include compensation data for all orders from the 0th to the nth order, or may include only compensation data for some orders from the 0th to the nth order.

[0052] Various data including the temperature compensation data stored in the non-volatile memory of the memory unit 30f is transferred from the non-volatile memory to the register and held in the register when the power of the measurement target device 30 is turned on (when the voltage of the VDD terminal rises from 0V to a desired voltage). Then, the digital control circuit 30h performs temperature compensation of the resonator 3 by inputting the temperature compensation data (0th order temperature compensation data, ···, nth order temperature compensation data) held in the register to the compensation voltage generation circuit 30c.

[0053] In the control process for the compensation voltage generation circuit 30c, the digital control circuit 30h outputs a control signal for instructing a temperature compensation voltage based on the temperature compensation data stored in the register. The compensation voltage generation circuit 30c generates a temperature compensation voltage for compensating the frequency-temperature characteristics of the resonator 3 based on the control signal from the digital control circuit 30h and applies it to one end of the variable capacitance element VC1 of the oscillation control circuit 30a. Thereby, the oscillation frequency of the oscillation control circuit 30a is controlled to be substantially constant regardless of the temperature.

[0054] The oscillator configured as described above functions as a voltage-controlled temperature-compensated oscillator (VC-TCXO (Voltage Controlled Temperature Compensated Crystal Oscillator) if the resonator 3 is a crystal resonator) that outputs an oscillation signal OBJCLK with a constant frequency regardless of temperature within a desired temperature range.

[0055] As described above, in order to make the oscillator function as a temperature-compensated oscillator, it is necessary to define temperature compensation data in advance. The temperature compensation data is calculated by measuring the frequencies of the oscillation signal OBJCLK at a plurality of temperatures. For example, in order to compensate for the third-order frequency-temperature characteristic, in a state where temperature compensation by the compensation voltage generation circuit 30c is not performed, the frequencies of the oscillation signal OBJCLK are specified at four or more temperatures, and it is necessary to calculate the coefficients of the 0th to 3rd orders indicating the frequency characteristics. Once the coefficients are obtained, the temperature compensation voltage is specified based on the coefficients, and the temperature compensation data for outputting the temperature compensation voltage is specified. Note that in this embodiment, the measurement target device 30 performs temperature compensation by digital control, but the temperature compensation method is not limited to this. For example, analog temperature compensation that generates a temperature compensation voltage by an analog circuit based on an analog signal from a temperature sensor may be used.

[0056] (4) Measurement process In this embodiment, it is assumed that the frequencies of the oscillation signal OBJCLK are measured at a plurality of temperatures in order to perform such processing. In this embodiment, the measurement system shown in FIG. 1 is configured to measure the frequencies of the oscillation signal OBJCLK output by each of the plurality of measurement target devices 30.

[0057] When the measurement system is configured, Figure 5 shows that the measurement process is performed. When the measurement process starts, the master device 20 performs temperature adjustment (step S100). Specifically, a plurality of target temperatures are set in advance, and the master device 20 outputs a control signal to the heater 50 to control the heater 50 so that the device under measurement 30 matches one of the target temperatures. Next, the master device 20 waits until it is determined that the device under measurement 30 has reached the target temperature (step S105). That is, the master device 20 acquires the temperature of the device under measurement 30 based on the output signal of the heater 50 and determines whether the temperature matches the target temperature.

[0058] In step S105, when it is determined that the device under measurement 30 has reached the target temperature, the master device 20 sets the CS of all the circuit devices 10 to unselected (step S110). That is, the master device 20 sets the voltage level of the CS terminal to inactive for all the circuit devices 10. As a result, the first switch circuit SW1 of the interface circuit 11 electrically connects the CLK terminal and the IO1 terminal, and the second switch circuit SW2 electrically connects the SDI terminal and the IO2 terminal.

[0059] Next, the master device 20 sets all the devices under measurement 30 to the measurement mode by I2C communication (step S115). The mode setting in the device under measurement 30 may be implemented by various procedures. For example, assume that after power is supplied to the device under measurement 30 from the power source, the device under measurement 30 is capable of I2C communication during a predetermined period. In this case, the master device 20 starts supplying power to each device under measurement 30 in step S115, and then outputs a command for shifting to the measurement mode by I2C communication using the CLK terminal and the SDI terminal during the subsequent predetermined period. Each device under measurement 30 receives the command by I2C communication and starts the measurement mode. As a result, each device under measurement 30 enters a state where the oscillation signal OBJCLK is output from the IO1 terminal and the analog voltage signal is output from the IO2 terminal by the serial interface circuit 30g.

[0060] Next, the master device 20 sets the CS of all the circuit devices 10 to the select state (step S120). That is, the master device 20 sets the voltage level of the CS terminal to active for all the circuit devices 10. As a result, the first switch circuit SW1 of the interface circuit 11 switches so that the signal input to the CLK terminal from the master device 20 is input to the CLK terminal of the communication control circuit 11a. Also, the second switch circuit SW2 of the interface circuit 11 switches so that the signal input to the SDI terminal from the master device 20 is input to the SDI terminal of the communication control circuit 11a.

[0061] Next, the master device 20 sets all the circuit devices 10 to the measurement mode for the desired measurement target (step S125). The desired measurement target is any one of the frequency of the oscillation signal OBJCLK, the voltage value of the analog voltage signal, and the current value of the analog current signal. The master device 20 has received a designation of the desired measurement target from the user in advance. Then, the master device 20 outputs a command designating the desired measurement target by SPI communication using the CLK terminal, the SDI terminal, and the SDO terminal. Each circuit device 10 receives the command by SPI communication and sets the measurement circuit 12 to measure the desired measurement target.

[0062] For example, when the measurement target is the oscillation signal OBJCLK, the communication control circuit 11a controls the third switch circuit SW3, the fourth switch circuit SW4, and the fifth switch circuit SW5 to set the state where the IO1 terminal and the counter 12a are electrically connected and the signal processing circuit 12b and the A / D conversion circuit 12d are electrically connected. When the measurement target is an analog voltage signal, the communication control circuit 11a controls the third switch circuit SW3, the fourth switch circuit SW4, and the fifth switch circuit SW5 to set the state where the IO2 terminal and the A / D conversion circuit 12d are electrically connected. When the measurement target is an analog current signal, the communication control circuit 11a controls the third switch circuit SW3, the fourth switch circuit SW4, and the fifth switch circuit SW5 to set the state where the IO2 terminal and the resistor element 12c are electrically connected and the resistor element 12c and the A / D conversion circuit 12d are electrically connected.

[0063] Next, the master device 20 outputs a trigger signal to all the circuit devices 10 (step S130). That is, the master device 20 outputs a common trigger signal for instructing the start of measurement to all of the plurality of circuit devices 10. When the trigger signal is output, the arithmetic circuit 12e of the circuit device 10 acquires the trigger signal via the TRG terminal. When the trigger signal is input to the arithmetic circuit 12e, the arithmetic circuit 12e starts measuring the frequency.

[0064] Next, each circuit device 10 holds measurement data based on the output signal from the measurement target device 30 (step S135). That is, when the arithmetic circuit 12e acquires the frequency, voltage value, and current value of the measurement target, the arithmetic circuit 12e stores the measurement data indicating these values in the holding circuit 13. As a result of the above, the measurement data indicating the value of the measurement target at the target temperature is held in each circuit device 10.

[0065] Next, the master device 20 performs temperature adjustment again (step S140). Specifically, the master device 20 outputs a control signal to the heater 50 and controls the heater 50 so that it matches one of the plurality of target temperatures preset for the device under measurement 30 that has not been measured yet. If there is no unmeasured target temperature, step S140 is skipped.

[0066] Next, in steps S145 to S155, the master device 20 sequentially reads out the measurement data held in each circuit device 10. Specifically, the master device 20 sets the CS of one of the circuit devices 10 to select (step S145). Specifically, the master device 20 selects one device from the circuit devices 10 from which the measurement data has not been read out yet, and sets the voltage level of the CS terminal to active. Also, the master device 20 sets the voltage level of the CS terminals of the circuit devices 10 that have not been selected to inactive.

[0067] Next, the master device 20 reads out the measurement data from the selected circuit device 10 (step S150). Specifically, the master device 20 outputs a read command for the measurement data by SPI communication using the CLK terminal, the SDI terminal, and the SDO terminal. The arithmetic circuit 12e of the circuit device 10 acquires the measurement data from the holding circuit 13 according to the command, and outputs the measurement data to the master device 20 via the communication control circuit 11a. As a result, the master device 20 acquires the measurement data from the circuit device 10 selected in step S145.

[0068] Next, the master device 20 determines whether or not the measurement data has been read out for all the circuit devices 10 (step S155). That is, the master device 20 determines that the measurement data has been read out for all the circuit devices 10 when the loop processing of steps S145 to S155 for each circuit device 10 has all ended. In step S155, if it is not determined that the measurement data has been read out for all the circuit devices 10, the master device 20 repeats the processing after step S145.

[0069] In step S155, when it is determined that reading has been completed for all the circuit devices 10, the master device 20 determines whether the measurement has ended (step S160). That is, when the reading of the measurement data from each circuit device 10 has been completed for all of the plurality of target temperatures, the master device 20 regards the measurement as having ended and ends the measurement process shown in FIG. 5. If it is determined in step S160 that the measurement has not ended, the master device 20 repeats the processes after step S105. That is, the master device 20 waits until the temperature of the measurement target device 30 reaches the target temperature set in step S140, and when the target temperature is reached, repeats the processes after step S110.

[0070] In the above process, after the temperature adjustment in step S140 is started, it takes a certain amount of time for the temperature to reach the target temperature. For this reason, in the present embodiment, after the temperature adjustment in step S140 is started and before it is confirmed whether the target temperature has been reached, the reading of the measurement data is performed. Therefore, the reading of the measurement data can be performed during the waiting for the temperature adjustment. The reading during the waiting can be realized because the circuit device 10 includes the holding circuit 13 and can read the measurement data at an arbitrary timing. For this reason, according to the present embodiment, the waiting time for the temperature adjustment that inevitably occurs can be effectively utilized, and the measurement process can be advanced efficiently.

[0071] On the other hand, in a configuration in which measurements based on output signals output from a plurality of measurement target devices 30 are sequentially performed as in the prior art, it is necessary to repeatedly execute the measurement of the measurement target device 30 and the transfer of the measurement data. For this reason, it takes time from the start of the measurement of the first measurement target device 30 to the end of the measurement of the last measurement target device 30. In the present embodiment, the measurements based on the output signals output from the plurality of measurement target devices 30 can be simultaneously executed by the trigger signal output from the master device 20. Therefore, even if there are a plurality of measurement target devices 30, the measurements can be simultaneously executed by the plurality of measurement target devices 30, and thus the time required for the measurement is very short.

[0072] Furthermore, since measurements regarding a plurality of devices under measurement 30 are executed simultaneously, the temperatures of the plurality of devices under measurement 30 are constant. On the other hand, in a configuration where measurements of the devices under measurement 30 are executed sequentially, for example, since it takes time from the start of measurement of the first device under measurement 30 to the end of measurement of the last device under measurement 30, it is very difficult to keep the temperatures of both constant. For this reason, for example, when the measurement target is the frequency-temperature characteristic of the oscillation signal OBJCLK of the device under measurement 30, if the temperatures measured for the plurality of devices under measurement 30 are different, the process for generating temperature compensation data becomes complicated. However, in the present embodiment, since the temperatures measured for the plurality of devices under measurement 30 are the same, the process for generating temperature compensation data becomes a very simple process.

[0073] (5) Other embodiments, etc. The above-described embodiments are examples for implementing the present invention, and various other embodiments can also be adopted. For example, the circuit device 10 may be able to measure any one of the frequency, voltage, and current of the oscillation signal OBJCLK, or may be able to select and measure two of these, or may be able to measure other measurement targets.

[0074] Also, the measurement system using the circuit device 10 is not limited to the configuration shown in FIG. 1. For example, the circuit device 10 may be configured not to include a TRG terminal. FIG. 6 is a diagram showing the configuration of the circuit device 10 that does not include a TRG terminal. As shown in FIG. 6, the circuit device 10 does not include a TRG terminal. Therefore, in this configuration, the circuit device 10 does not start measurement in synchronization with a trigger signal. Instead, for example, in response to an instruction to start the measurement mode in response to a command from the master device 20, the circuit device 10 starts measuring the output signal of the device under measurement 30. The circuit device shown in FIG. 6 can be realized with the same configuration as the configurations shown in FIGS. 1 and 2 except that it does not include a TRG terminal.

[0075] In this case, the measurement process can be realized by the process shown in FIG. 7, which omits the process related to the trigger signal, that is, step S130, from the process shown in FIG. 5. Even in the configurations shown in FIGS. 6 and 7, after the temperature adjustment by step S140 is started, since it takes a certain amount of time until the temperature reaches the target temperature, the measurement data is read before confirming whether the target temperature has been reached after the temperature adjustment is started. Therefore, the measurement data can be read during the standby for temperature adjustment, the standby time for temperature adjustment that inevitably occurs can be effectively utilized, and the measurement process can be advanced efficiently.

[0076] Furthermore, in step S125, in response to setting all the circuit devices to the measurement mode of the desired measurement target, measurements regarding the plurality of measurement target devices 30 are executed. For this reason, the measurements are executed almost simultaneously, and the temperatures of the plurality of measurement target devices 30 are almost constant. For this reason, the temperatures measured for the plurality of measurement target devices 30 can be regarded as being the same, and the process for generating the temperature compensation data becomes a very simple process.

[0077] Furthermore, the communication mode between the master device 20 and the circuit device 10 is not limited to the SPI communication as shown in FIGS. 1 and 6. FIG. 8 shows a configuration example in a mode in which bidirectional communication can be performed between the master device 20 and the circuit device 10 via one terminal. In the configuration shown in FIG. 8, an SDIO terminal is provided instead of the SDI terminal, and a DIR terminal is provided instead of the SDO terminal.

[0078] In this configuration, the master device 20 indicates the communication direction via the SDIO terminal according to the voltage level of the DIR terminal. For example, when the voltage level of the DIR terminal is the first level, data is transmitted from the master device 20 to the circuit device 10 via the SDIO terminal, and when the voltage level of the DIR terminal is the second level, data is transmitted from the circuit device 10 to the master device 20 via the SDIO terminal.

[0079] Even in such a configuration, measurement can be performed by adopting the same measurement process as in FIG. 5. However, in step S125, a command for instructing the measurement mode is transmitted while data is being transmitted from the master device 20 to the circuit device 10 via the SDIO terminal. Also, in step S150, measurement data is transmitted to the master device 20 while data is being transmitted from the circuit device 10 to the master device 20 via the SDIO terminal. As described above, communication between the master device 20 and the circuit device 10 may be realized in various communication modes. Of course, communication between the circuit device 10 and the measurement target device 30 may also be realized in various communication modes.

[0080] Furthermore, the configuration shown in FIG. 1 and the configuration shown in FIG. 8 may be configured to be switched according to writing to the storage device included in the circuit device 10.

[0081] Furthermore, the configurations described above are examples of embodiments, and various other configurations may be adopted. For example, the first switch circuit SW1 to the fifth switch circuit SW5 may be switched according to an instruction from the arithmetic circuit 12e. Also, the reference oscillation signal REFCLK may be output from the master device 20 to the circuit device 10, or the reference oscillation signal REFCLK may be generated using the oscillation signal input to the CLK terminal.

[0082] The measurement terminal section includes terminals connected to the measurement device, and communication between the circuit device and the measurement target device and communication between the master device and the measurement target device may be performed via the measurement terminal section. The communication method is not limited to the I2C method, and may be serial communication such as SPI or parallel communication.

[0083] The interface terminal section includes terminals connected to the master device, and communication between the circuit device and the master device and communication between the master device and the measurement target device may be performed via the interface terminal section. The communication method is not limited to the SPI method, and may be serial communication such as I2C or parallel communication.

[0084] The measurement circuit only needs to be able to measure the output signal of the device under test input through the measurement terminal part. The device under test can be any device and is not limited to the oscillator as in the above-described embodiment. Also, the output signal of the device under test is not limited. Therefore, it is not limited to an oscillation signal, a voltage signal, or a current signal, and a signal for measuring other measurement objects may be the output signal of the device under test.

[0085] The holding circuit only needs to be a circuit that holds the measurement data obtained by the measurement circuit, and the storage method is not limited. For example, it is not limited to a combination of a non-volatile memory and a register as in the above-described configuration, and various types of memories may be adopted, or a configuration without a non-volatile memory and with a register may also be acceptable. In any case, the holding circuit only needs to be able to hold the measurement data and output the measurement data to the master device at an arbitrary timing in response to a request from the master device or the like.

[0086] The interface circuit only needs to be able to transmit the measurement data to the master device through the interface terminal part. That is, the interface circuit only needs to be able to transmit the measurement data held in the holding circuit to the master device at an arbitrary timing, and the transmission may be performed by any communication method.

Explanation of Signs

[0087] 3... oscillator, 10... circuit device, 11... interface circuit, 11a... communication control circuit, 12... measurement circuit, 12a... counter, 12b... signal processing circuit, 12c... resistance element, 12d... A / D conversion circuit, 12e... arithmetic circuit, 13... holding circuit, 20... master device, 30... device under measurement, 30a... oscillation control circuit, 30b... output circuit, 30c... compensation voltage generation circuit, 30d... temperature sensor, 30e... regulator circuit, 30f... memory unit, 30g... serial interface circuit, 30h... digital control circuit, 40... reference oscillation signal source, 50... heater, 51... temperature sensor, SW1... first switch circuit, SW2... second switch circuit, SW3... third switch circuit, SW4... fourth switch circuit, SW5... fifth switch circuit

Claims

1. A measurement terminal unit connected to a device under measurement, An interface terminal unit connected to a master device, A measurement circuit that measures an output signal of the device under measurement input via the measurement terminal unit, A holding circuit that holds measurement data obtained by the measurement circuit, An interface circuit that transmits the measurement data to the master device via the interface terminal unit, A circuit device comprising the above.

2. The measurement circuit measures the output signal at a timing corresponding to a trigger signal transmitted from the master device via the interface terminal unit. The circuit device according to Claim 1.

3. The output signal is a clock signal, The measurement circuit includes a time-to-digital conversion circuit and a frequency measurement circuit that measures the frequency of the clock signal. The circuit device according to Claim 1.

4. The output signal is an analog voltage signal, The measurement circuit includes an A / D conversion circuit that converts the analog voltage signal into a digital voltage signal and a voltage measurement circuit that measures the digital voltage signal. The circuit device according to Claim 1.

5. The interface circuit performs serial communication with the master device in the SPI mode via the interface terminal unit. The circuit device according to Claim 1.

6. The interface circuit relays serial communication in the I2C mode between the master device and the device under measurement via the interface terminal unit and the measurement terminal unit. The circuit device according to Claim 1.

7. The interface circuit Before the start of measurement by the measurement circuit, outputs a signal input from the master device via the interface terminal unit to the measurement terminal unit. After the start of measurement by the measurement circuit, transmits the measurement data to the master device according to a signal input from the master device via the interface terminal unit. The circuit device according to Claim 1.

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