Control system for flying object, flying object, control method for flying object, and program

Abstract

To provide a control system for a flying object, which can suppress generation of an abnormality signal during switching of a plurality of control signals.SOLUTION: This control system for the flying object, which receives a plurality of control signals from a plurality of controllers, comprises a processor configured to execute the following steps. In a reception step, the control signals and a request signal instructing an output signal to be output to a device to be controlled among the control signals are received. In a signal switching control step, switching timing for switching the output signal from a first signal to a second signal is determined on the basis of the position of a signal block in the first signal which is a current output signal and the position of a signal block in the second signal instructed as an output signal by the request signal among the control signals.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a control system for a flying object, a flying object, a control method for a flying object, and a program.

Background Art

[0002] When a remotely operated flying object performs a long-distance flight, when the flying object passes through an area where radio waves are interrupted, operations using a plurality of controllers (transceivers) are performed. In this case, as disclosed in the following documents, on the flying object side, it is necessary to simultaneously receive a plurality of signals from a plurality of controllers and switch the signal used for control based on a request signal.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When switching the signal used for controlling the flying object among a plurality of signals transmitted from a plurality of controllers, problems may occur in the signals. For example, as shown in FIG. 10, when the output signal OS is switched from the first signal CS1 to the second signal CS2 at the time T0 when the signal block B of the second signal CS2 is received, the signal block B of the second signal CS2 may be blocked. Further, for example, as shown in FIG. 11, when the output signal OS is switched from the first signal CS1 to the second signal CS2 at the time T0 when the interval between the signal block B of the first signal CS1 and the signal block B of the second signal CS2 is narrow, in the output signal OS, the signal block B of the first signal CS1 and the signal block B of the second signal CS2 may be connected as one signal block.

[0005] Thus, when the signal block is blocked or connected, the part where these occur becomes an abnormal signal, and there is a risk that the controlled device may behave unexpectedly.

[0006] In view of the above circumstances, the present invention aims to provide a control system for an aircraft that can suppress the generation of abnormal signals when switching between a plurality of control signals.

Means for Solving the Problem

[0007] According to one aspect of the present invention, there is provided a control system for an aircraft that receives a plurality of control signals from a plurality of controllers. This control system includes a processor configured to execute the following steps. In the reception step, a plurality of control signals and a request signal for instructing an output signal output to a controlled device among the plurality of control signals are received. In the signal switching control step, based on the position of the signal block in the first signal which is the current output signal and the position of the signal block in the second signal which is instructed as the output signal by the request signal among the plurality of control signals, the switching timing for switching the output signal from the first signal to the second signal is determined.

[0008] According to such an aspect, in each of the signal block in the first signal as the switching source and the signal block in the second signal as the switching destination, the timing at which blocking or connection is unlikely to occur is considered, and the output signal to the controlled device can be switched. That is, the generation of abnormal signals when switching between a plurality of control signals can be suppressed.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

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Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Various characteristic matters shown in the following embodiments can be combined with each other.

[0011] Incidentally, the program for realizing the software appearing in this embodiment may be provided as a non-transitory computer-readable medium that can be read by a computer, may be provided so as to be downloadable from an external server, or may be provided so that the program is started on an external computer and its functions are realized on a client terminal (so-called cloud computing).

[0012] In addition, in the present embodiment, the "unit" may include, for example, hardware resources implemented by a circuit in a broad sense and information processing of software that can be specifically realized by these hardware resources. Also, in the present embodiment, various types of information are handled. These types of information are represented, for example, by physical values of signal values representing voltage and current, the high and low of signal values as a set of binary bits composed of 0 or 1, or quantum superposition (so-called quantum bits), and communication and calculation can be executed on a circuit in a broad sense.

[0013] In addition, a circuit in a broad sense is a circuit realized by appropriately combining at least a circuit, circuitry, a processor, a memory, etc. That is, it includes an application specific integrated circuit (ASIC), programmable logic devices (for example, a simple programmable logic device (SPLD), a complex programmable logic device (CPLD), and a field programmable gate array (FPGA)), etc.

[0014] 1. Hardware Configuration In this section, the hardware configuration will be described.

[0015] <Aircraft 1> FIG. 1 is a schematic diagram of the aircraft 1. The aircraft 1 is, for example, a rotary-wing unmanned aerial vehicle (drone). Specifically, the aircraft 1 is a remotely operated unmanned aerial vehicle that receives a plurality of control signals from a plurality of controllers 100 (see FIG. 3). The aircraft 1 includes a main body 2, a plurality of propellers 3, and a control box 5 (flight control system 51).

[0016] <Main Body 2> As shown in the plan view of FIG. 1A and the rear view of FIG. 1B, the main body 2 has a fuselage 21, a frame 22, and skids 23. The fuselage 21 houses or holds various devices including the control box 5. When the flying object 1 is a manned aircraft, a cockpit is provided in the fuselage 21.

[0017] The frame 22 is connected to the fuselage 21. The frame 22 holds a plurality of propellers 3. Wings (ladders) or the like for controlling the attitude of the flying object 1 are provided on the frame 22. The skids 23 are the legs that contact the ground when the flying object 1 lands. The skids 23 are attached to the fuselage 21 so as to protrude downward from the fuselage 21. Note that the skids 23 may be configured to be foldable during horizontal flight.

[0018] <Propeller 3> The plurality of propellers 3 are respectively attached to the frame 22. By being rotated by a power source such as a motor, the propellers 3 generate buoyancy and thrust of the flying object 1. Also, the attitude of the flying object 1 is adjusted by controlling the thrust (rotation speed) of each of the plurality of propellers 3. The rotation speed and rotation direction of the propellers 3 are controlled by the control box 5.

[0019] <Control box 5> The control box 5 performs flight control of the flying object 1. FIG. 2 is a block diagram showing the configuration of the control box 5. The control box 5 is held by the main body 2. As shown in FIG. 2, the control box 5 has a flight control system 51 (information processing device), a multiplexer 52, a plurality of ESC 53, an FCU 54, a battery 55, and a plurality of receivers 56.

[0020] The flight control system 51 is a microcomputer that controls the signals output by the multiplexer 52. The configuration of the flight control system 51 will be described later.

[0021] The FCU54 (Flight Control Unit) is configured to control the rotational speed and direction of each of a plurality of propellers 3. Specifically, the FCU54 controls the rotation speed and direction of each propeller 3 by controlling the motor 3A of each propeller 3 based on an operation command. By the control of the FCU54, the aircraft 1 performs operations such as ascending, descending, horizontal flight, and hovering based on the control signal CS (output signal OS).

[0022] The receiver 56 receives a signal from the corresponding controller 100. Specifically, the receiver 56 receives the control signal CS and the request signal RS from the controller 100 that are associated one-to-one respectively.

[0023] FIG. 3 is a block diagram schematically showing signal processing in the flight control system 51 and the multiplexer 52. As shown in FIG. 3, one control signal CS is input from each of a plurality of receivers 56 to the multiplexer 52. The multiplexer 52 outputs, as the output signal OS, one control signal CS instructed by the flight control system 51 among the plurality of input control signals CS to the controlled device. The controlled device to which the output signal OS is output is typically the FCU54. However, the output signal OS may be transmitted (branched) to a controlled device that performs operations such as turning ON / OFF a relay for cutting off the power circuit and raising / lowering a hoist.

[0024] The control signal CS is an electric signal for controlling a controlled device. The controller 100 is a transceiver constituting a proportional system. The controller 100 receives operation inputs such as takeoff / landing, horizontal flight, and hovering of the aircraft 1 from the operator, and wirelessly transmits a control signal CS for realizing these operations to the control box 5 (corresponding receiver 56).

[0025] The ESC53 (Electric Speed Controller) shown in FIG. 2 controls the rotational speed of the motor 3A that rotates the propeller 3. The ESC53 is provided one by one for each of the plurality of propellers 3. The battery 55 of the control box 5 supplies power to the flight control system 51, the motor 3A, etc.

[0026] The control box 5 receives the output of the camera sensor 6 of the flying object 1. The control box 5 uses the output received from the camera sensor 6 for the processing of the flight control system 51 or transmits it to the controller 100.

[0027] <Flight control system 51> The flight control system 51 is configured to control the switches in the multiplexer 52. The flight control system 51 consists of one or more information processing devices or components. Hereinafter, these components will be described.

[0028] FIG. 4 is a block diagram showing the hardware configuration of the flight control system 51. The flight control system 51 includes a communication bus 510, a communication unit 511, a storage unit 512, and a processor 513. The communication unit 511, the storage unit 512, and the processor 513 are electrically connected via the communication bus 510 inside the flight control system 51.

[0029] <Communication unit 511> The communication unit 511 preferably uses wired communication means such as USB, IEEE1394, Thunderbolt (registered trademark), wired LAN network communication, etc., but may include wireless LAN network communication, mobile communication such as 3G / LTE / 5G, BLUETOOTH (registered trademark) communication, etc. as required. That is, it is more preferable to implement it as a collection of these multiple communication means. That is, the flight control system 51 may communicate various information from the outside via the communication unit 511 and the network.

[0030] <Storage unit 512> The memory unit 512 stores various information defined by the foregoing description. This can be implemented, for example, as a storage device such as a Solid State Drive (SSD) that stores various programs and the like related to the flight control system 51 executed by the processor 513, or as a memory such as a Random Access Memory (RAM) that stores temporarily necessary information (arguments, arrays, etc.) related to the operation of the program. The memory unit 512 stores various programs, variables, etc. related to the flight control system 51 executed by the processor 513.

[0031] <Processor 513> The processor 513 performs processing and control of the overall operation related to the flight control system 51. The processor 513 is, for example, a Central Processing Unit (CPU). The processor 513 realizes various functions related to the flight control system 51 by reading a predetermined program stored in the memory unit 512. That is, the information processing by software stored in the memory unit 512 is specifically realized by the processor 513, which is an example of hardware, and can be executed as each functional unit included in the processor 513. These will be described in more detail in the next section. Note that the processor 513 is not limited to being single, and may be implemented to have a plurality of processors 513 for each function, or a combination thereof may also be possible.

[0032] The flight control system 51 may be in an on-premises form or a cloud form. As the flight control system 51 in the cloud form, for example, it may provide the above-described functions and processes in the form of Software as a Service (SaaS), cloud computing.

[0033] 2. Functional Configuration In this section, the functional configuration of this embodiment will be described. The information processing by software stored in the storage unit 512 is specifically realized by the processor 513, which is an example of hardware, and can be executed as each functional unit included in the processor 513.

[0034] FIG. 5 is a block diagram showing the functions realized by the flight control system 51 (processor 513). Specifically, the flight control system 51 (processor 513) includes a transmission / reception unit 5131, a reception unit 5133, and a signal switching control unit 5134.

[0035] <Transmission / Reception Unit 5131> The transmission / reception unit 5131 is configured to receive signals from a plurality of receivers 56 that respectively receive data from the controller 100. The transmission and reception between the receiver 56 and the controller 100 are performed by wireless communication.

[0036] The data sent from the controller 100 to the transmission / reception unit 5131 via the receiver 56 includes an operation command (i.e., control signal CS) for instructing the operation (ascending, descending, horizontal flight, hovering, etc.) of the aircraft 1 and a request signal RS for switching the control signal CS (i.e., switching the controller 100 that receives the operation command).

[0037] The controller 100 may generate the request signal RS manually according to the instructions of the administrator, or may generate the request signal RS automatically according to the position of the aircraft 1 and the communication status of the controller 100.

[0038] <Reception Unit 5133> The reception unit 5133 is configured to receive a plurality of control signals CS and a request signal RS that indicates an output signal OS to be output to a controlled device (e.g., FCU 54) among the plurality of control signals CS. The control signal CS is continuously transmitted from the controller 100. The request signal RS is transmitted from the controller 100 at an arbitrary timing. The request signal RS includes information on which receiver 56 (controller 100) transmitted it (i.e., which control signal CS the switching request is for). The reception unit 5133 includes an operation signal reception unit to which the control signal CS is input and a switching request reception unit to which the request signal RS is input.

[0039] <Signal switching control unit 5134> The signal switching control unit 5134 is configured to switch the output signal OS output by the multiplexer 52. Specifically, the signal switching control unit 5134 determines the switching timing for switching the output signal OS from the first signal CS1, which is the current output signal OS, to the second signal CS2, which is the signal indicated as the output signal OS by the request signal RS among the plurality of control signals CS, based on the position of the signal block in the first signal CS1 and the position of the signal block in the second signal CS2.

[0040] The signal switching control unit 5134 receives the request signal RS, determines the switching timing, and sends a switching command CO for the output signal OS to the multiplexer 52. The switching command CO includes information for identifying (designating) the control signal CS to which the output signal OS is to be switched and the switching timing (the time to switch the output signal OS). Specifically, the signal switching control unit 5134 transmits the switching command CO to the multiplexer 52 as the states of a plurality of contacts that can each take an ON / OFF or HIGH / LOW state. The multiplexer 52 switches the output signal OS by closing the switch corresponding to the received switching command CO and opening the other switches.

[0041] FIG. 6 is a schematic diagram showing an example of the relationship between the first signal CS1, the second signal CS2, and the output signal OS (transition of the output signal OS). The horizontal axis in each signal of FIG. 6 is the time axis. As shown in FIG. 6, the first signal CS1 and the second signal CS2 include a plurality of signal blocks B. The signal block B is a collection of signals transferred from the controller 100 to the aircraft 1 (control box 5) in one communication. The signal block B is composed of, for example, a plurality of pulses with different time widths arranged at intervals of a certain value or less. As the protocol of the control signal CS (the first signal CS1 and the second signal CS2), for example, known protocols such as S.BUS, PWM, and EX-BUS are used.

[0042] In FIG. 6, the first time T1 is the time when the flight control system 51 receives the request signal RS. The second time T2 is the time (i.e., the switching timing) when the signal switching control unit 5134 switches the output signal OS from the first signal CS1 to the second signal CS2. The second time T2 is a time later than the first time T1.

[0043] At the second time T2 in FIG. 6, there is no signal block B in either the first signal CS1 or the second signal CS2. That is, the signal switching control unit 5134 sets the point in time when there is no signal block B in both the first signal CS1 and the second signal CS2 as the switching timing. Thereby, it is possible to suppress that only a part of the signal block B of the first signal CS1 (i.e., a fragment of the signal block B) or only a part of the signal block B of the second signal CS2 is output as the signal block B of the output signal OS.

[0044] In the example of FIG. 6, at the first time T1, there is a signal block B in the second signal CS2. Therefore, the signal switching control unit 5134 sets the second time T2, which is later than the first time T1 when it receives the instruction to switch the output signal OS by the request signal RS, as the switching timing. The second time T2 is the time when the signal block B no longer exists in both the first signal CS1 and the second signal CS2. On the other hand, when the signal block B does not exist in both the first signal CS1 and the second signal CS2 at the first time T1, the signal switching control unit 5134 directly sets the first time T1, when it receives the instruction to switch the output signal OS by the request signal RS, as the switching timing.

[0045] As shown in FIG. 6, before the switching timing (the second time T2 in the example of FIG. 6), the first signal CS1 is output from the multiplexer 52 as the output signal OS. On the other hand, after the switching timing, the second signal CS2 specified by the request signal RS is output from the multiplexer 52 as the output signal OS.

[0046] FIG. 7 is a schematic diagram showing another example of the relationship between the first signal CS1, the second signal CS2, and the output signal OS (the transition of the output signal OS). The horizontal axis in each signal of FIG. 7 is the time axis. Similar to FIG. 6, the first time T1 in FIG. 7 is the time when the request signal RS is received, and the second time T2 is the time when the signal switching control unit 5134 switches the output signal OS from the first signal CS1 to the second signal CS2 (that is, the switching timing).

[0047] At the second time T2 in FIG. 7, there is no signal block B in either the first signal CS1 or the second signal CS2. Also, the second time T2 is a time when both the time interval Δt1 from the immediately preceding signal block B in the first signal CS1 and the time interval Δt2 from the immediately preceding signal block B in the second signal CS2 are equal to or greater than a certain value. That is, the signal switching control unit 5134 sets the time point at which both the time interval Δt1 from the signal block B in the first signal CS1 and the time interval Δt2 from the signal block B in the second signal CS2 are equal to or greater than a predetermined threshold value as the switching timing. In other words, the signal switching control unit 5134 sets the time point at which the time interval from the signal block B that is temporally later (in the example of FIG. 7, the signal block B in the second signal CS2) among the signal block B in the first signal CS1 and the signal block B in the second signal CS2 becomes equal to or greater than the threshold value as the switching timing. Thereby, it is possible to suppress the integrated signal block B of the signal block B of the first signal CS1 and the signal block B of the second signal CS2 from being output as the signal block B of the output signal OS.

[0048] The threshold value of the time interval for the signal switching control unit 5134 to determine the switching timing is, for example, set to a value larger than the maximum time interval of a plurality of pulses constituting the signal block B.

[0049] In the example of FIG. 7, at the first time T1, there is no signal block B in the second signal CS2, but the time interval from the immediately preceding signal block B in the first signal CS1 is less than the threshold value. Therefore, the signal switching control unit 5134 sets the second time T2, which is later than the first time T1 when it receives the instruction to switch the output signal OS by the request signal RS, as the switching timing. The second time T2 is a time when there is no signal block B in both the first signal CS1 and the second signal CS2, and the time intervals from these respective signal blocks B are equal to or greater than a predetermined threshold value. In the example of FIG. 7, the second time T2 is the time after one signal block B in the second signal CS2 has passed after the first time T1 in the temporal direction.

[0050] On the other hand, when there is no signal block B in both the first signal CS1 and the second signal CS2 at the first time T1, and the time intervals between the first time T1 and each of these signal blocks B are equal to or greater than a predetermined threshold value, the signal switching control unit 5134 uses the first time T1 at which it receives an instruction to switch the output signal OS by the request signal RS as the switching timing as it is.

[0051] FIG. 8 is a schematic diagram showing still another example of the relationship (transition of the output signal OS) between the first signal CS1, the second signal CS2, and the output signal OS. As shown in FIG. 8, when the signal blocks B of the first signal CS1 and the signal blocks B of the second signal CS2 exist alternately, at the second time T2 when both the time interval Δt1 between the signal block B in the first signal CS1 and the time interval Δt2 between the signal block B in the second signal CS2 are equal to or greater than a predetermined threshold value, a signal block B may exist in the first signal CS1 and the output signal OS may not be switched. Such a situation may occur when the signal blocks B of the first signal CS1 and the second signal CS2 exist alternately at intervals shorter than the time interval obtained by adding the maximum time interval between the signal blocks B in each of the first signal CS1 and the second signal CS2 and the time required for the signal switching control unit 5134 (microcomputer) to determine the end of the block.

[0052] Therefore, the signal switching control unit 5134 provides an invalid period Δt0 during which the output of the multiplexer 52 is invalidated (that is, neither signal CSn is output) from the end of the signal block B in the first signal CS1 to the end of the signal block B in the second signal CS2 that is temporally close. The invalid period Δt0 is the period from the third time T3 at which the determination of the end of the block of the first signal CS1 by the signal switching control unit 5134 is completed to the fourth time T4 at which the determination of the end of the block of the second signal CS2 by the signal switching control unit 5134 immediately after that is completed. The signal switching control unit 5134 uses the time point when the invalid period Δt0 has elapsed (that is, the fourth time T4) as the switching timing.

[0053] When the output signal OS (that is, the first signal CS1 input to the multiplexer 52 or the output signal OS output from the multiplexer 52) cannot be detected, the signal switching control unit 5134 may switch the output signal OS to the control signal CS that was selected as the output signal OS immediately before the first signal CS1 among the plurality of control signals CS. Thereby, when the first signal CS1 is not input to the control box 5 due to disconnection or the like, or when an appropriate output signal OS is not output after signal switching due to a malfunction of the control box 5, the control of the aircraft 1 can be restored.

[0054] 3. Control Method of Aircraft In this section, a control method of an aircraft using the flight control system 51 will be described. In this control method of the aircraft, each part of the flight control system 51 is executed by a computer as each step.

[0055] Specifically, the control method of the aircraft includes a reception step and a signal switching control step. In the reception step, a plurality of control signals CS and a request signal RS that indicates the output signal OS to be output to the controlled device among the plurality of control signals CS are received. In the signal switching control step, based on the position of the signal block B in the first signal CS1 which is the current output signal OS and the position of the signal block B in the second signal CS2 which is indicated as the output signal OS by the request signal RS among the plurality of control signals CS, the switching timing for switching the output signal OS from the first signal CS1 to the second signal CS2 is determined.

[0056] FIG. 9 is a flowchart showing the flow of information processing (control signal switching processing) executed by the flight control system 51. Hereinafter, the information processing will be described along each step of this flowchart.

[0057] The switching process of the control signal for the aircraft 1 is executed simultaneously with the start of flight control of the flight control system 51. First, the flight control system 51 initializes various parameters, settings, etc. (step S110). At this time, the control signal CS output as the output signal OS at the start of the process is also set. The control signal CS is selected from a plurality of control signals CS that can be received at the start of the process. Note that, in parallel with the switching process of the control signal, the flight control process of the aircraft 1 by the control signal CS received by the multiplexer 52 is executed.

[0058] After initialization, the flight control system 51 checks the output signal OS output from the multiplexer 52 (step S120). Subsequently, the flight control system 51 determines whether the output signal OS is detected (is output normally) (step S130). If the output signal OS is not output normally (S130: NO), the flight control system 51 switches the output signal OS from the control signal CS (that is, the first signal CS1) that has been the output signal OS until now to another control signal CS being received (step S140). At this time, if the switching of the output signal OS described later has already been executed, the flight control system 51 may be configured to switch the output signal OS to the control signal CS selected as the output signal OS immediately before the first signal CS1.

[0059] When the output signal OS is being output normally (S130: YES), or after executing the switching of the output signal OS (S140), the flight control system 51 reads the request signal RS and acquires the source of the request signal RS (receiver 56) (step S150). Subsequently, the flight control system 51 reads the signal content (position of the signal block B) of each of the first signal CS1, which is the current output signal OS, and the second signal CS2, which is the switching destination (step S160). Note that the reading of the request signal RS may be executed after the reading of the first signal CS1 and the second signal CS2, or the reading of the request signal RS and the reading of the first signal CS1 and the second signal CS2 may be executed in parallel. Furthermore, the reading of the first signal CS1 and the second signal CS2 may be executed only when there is a request signal RS.

[0060] After reading the signals, the flight control system 51 determines whether there is a request signal RS (that is, whether there is a switching request) (step S170). When there is a request signal RS (S170: YES), the flight control system 51 determines whether the current time is the switching timing (that is, whether the current time satisfies the conditions as the switching timing) (step S180). As described above, the switching timing is determined based on the position of the signal block B in the first signal CS1 and the position of the signal block B in the second signal CS2 indicated as the output signal OS. When the current time is the switching timing (S180: YES), the flight control system 51 switches the output signal OS to the second signal CS2 specified by the request signal RS (step S190). On the other hand, when there is no request signal RS (S170: NO), or when there is a request signal RS but the current time is not the switching timing (S180: NO), the flight control system 51 does not switch the output signal OS.

[0061] After the process for switching the output signal OS, the flight control system 51 determines the end of the flight control of the aircraft 1 (step S200). When the flight control has ended (the end condition is satisfied) (S200: YES), the flight control system 51 ends the switching process of the control signal. On the other hand, when the flight control has not ended (the end condition is not satisfied) (S200: NO), the flight control system 51 repeats steps from S120 to step 170. That is, the switching process of the control signal is continued until the flight control ends.

[0062] 4. Operation Summarizing the operation of the present embodiment, it is as follows. That is, in each of the signal blocks in the first signal CS1 of the switching source and the signal blocks in the second signal CS2 of the switching destination, by timing when interruption or connection is unlikely to occur, the output signal OS to the controlled device can be switched. That is, generation of abnormal signals during switching of a plurality of control signals CS can be suppressed.

[0063] As described above, the embodiments of the present invention have been described, but the present invention is not limited thereto and can be appropriately changed without departing from the technical idea of the invention.

[0064] 5. Others The aspect of the present embodiment is not limited to the flight control system 51, and may be a control method for an aircraft or a program. The control method for an aircraft includes each step executed by the flight control system 51. The program causes a computer to function as the flight control system 51.

[0065] The flight control system 51 does not necessarily have to be installed on the aircraft 1. For example, the flight control system 51 may be configured by an information processing device installed in a facility outside the aircraft 1.

[0066] It may also be provided in each of the aspects described below.

[0067] (1) A control system for an aircraft that receives a plurality of control signals from a plurality of controllers, comprising a processor configured to execute the following steps. In a reception step, the plurality of control signals and a request signal indicating an output signal output to a controlled device among the plurality of control signals are received. In a signal switching control step, based on the position of a signal block in a first signal that is the current output signal and the position of a signal block in a second signal indicated as the output signal by the request signal among the plurality of control signals, a switching timing for switching the output signal from the first signal to the second signal is determined. A control system for an aircraft.

[0068] (2) In the control system for an aircraft according to (1) above, in the signal switching control step, a point in time when there is no signal block in both the first signal and the second signal is set as the switching timing. A control system for an aircraft.

[0069] (3) In the control system for an aircraft according to (2) above, in the signal switching control step, a point in time when both the time interval from the signal block in the first signal and the time interval from the signal block in the second signal are equal to or greater than a predetermined threshold is set as the switching timing. A control system for an aircraft.

[0070] (4) In the control system for an aircraft according to any one of (1) to (3) above, in the signal switching control step, when the output signal cannot be detected, the output signal is switched to a control signal that was selected as the output signal immediately before the first signal among the plurality of control signals. A control system for an aircraft.

[0071] (5) An aircraft comprising an information processing device as the control system for an aircraft according to any one of (1) to (4) above.

[0072] (6) A method for controlling an aircraft, comprising each step executed by the aircraft control system according to any one of (1) to (4) above.

[0073] (7) A program for causing a computer to function as the aircraft control system according to any one of (1) to (4) above. Of course, this is not the limit.

[0074] Finally, although various embodiments according to the present disclosure have been described, these are presented as examples and are not intended to limit the scope of the invention. The novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. The embodiments and their modifications are included in the scope and gist of the invention and are included in the invention described in the claims and its equivalent scope.

Explanation of Signs

[0075] 1: Aircraft 2: Main body 3: Propeller 3A: Motor 5: Control box 6: Sensor 21: Hull 22: Frame 23: Skid 51: Aircraft control system 52: Multiplexer 53: ESC 54: FCU 55: Battery 56: Receiver 100: Controller 200: Request generator 510: Communication bus 511: Communication unit 512: Storage unit 513: Processor 5131: Transceiver 5133: Reception unit 5134: Signal switching control unit B: Signal block CO: Switching instruction CS: Control signal CS1: First signal CS2: Second signal OS: Output signal RS: Request signal T1: First time T2: Second time

Claims

1. A control system for an aircraft that receives a plurality of control signals from a plurality of controllers, comprising a processor configured to execute the following steps: In a reception step, receive the plurality of control signals and a request signal that indicates an output signal to be output to a controlled device among the plurality of control signals; In a signal switching control step, based on the position of a signal block in a first signal that is the current output signal and the position of a signal block in a second signal that is indicated as the output signal by the request signal among the plurality of control signals, determine a switching timing for switching the output signal from the first signal to the second signal. A control system for an aircraft.

2. In the control system for an aircraft according to Claim 1, in the signal switching control step, a point in time when there are no signal blocks in both the first signal and the second signal is set as the switching timing. A control system for an aircraft.

3. In the control system for an aircraft according to Claim 2, in the signal switching control step, a point in time when both the time interval from the signal block in the first signal and the time interval from the signal block in the second signal are equal to or greater than a predetermined threshold is set as the switching timing. A control system for an aircraft.

4. In the control system for an aircraft according to Claim 1, in the signal switching control step, when the output signal cannot be detected, switch the output signal to a control signal that was selected as the output signal immediately before the first signal among the plurality of control signals. A control system for an aircraft.

5. An aircraft, comprising an information processing device as the control system for an aircraft according to any one of Claims 1 to 4. An aircraft.

6. A control method for an aircraft, comprising each step executed by the control system for an aircraft according to any one of Claims 1 to 4. A control method for an aircraft.

7. A program, a program for causing a computer to function as the control system for an aircraft according to any one of Claims 1 to 4.

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