Magnetism detection circuit and sewing machine

Abstract

To reduce the number of components and the substrate area of a magnetism detection circuit and reduce errors.SOLUTION: A magnetism detection circuit comprises: a detection circuit unit including first and second hall elements and having a common terminal pair connected to both of the first and the second hall elements, a dedicated first terminal pair of the first hall element, and a dedicated second terminal pair of the second hall element; a power supply unit for applying a power supply to the detection circuit unit; a switching circuit for switching a connection among the power supply unit and the common terminal pair, the first terminal pair, and the second terminal pair; an amplification circuit for amplifying an output voltage output from the switching circuit; and an arithmetic circuit for performing an offset cancellation arithmetic operation for removing offset signal components of the first and second hall elements on the basis of the output voltage of the amplification circuit. The amplification circuit includes one common amplifier connectable to each of the common terminal pair, the first terminal pair, and the second terminal pair via the switching circuit.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The technology disclosed in this specification relates to a magnetic detection circuit and a sewing machine.

Background Art

[0002] Patent Document 1 discloses an offset cancellation circuit that cancels the offset component of a Hall element in a magnetic detection circuit using two Hall elements. In Patent Document 1, the two Hall elements have a common terminal to which a pair of terminals are connected to each other, and a plurality of independent terminals in which a pair of terminals are independent of each other. The magnetic detection circuit of Patent Document 1 includes three amplifiers: two first amplifiers respectively connected to the independent terminals of the first Hall element and the second Hall element, and one second amplifier connected to the common terminal of the two Hall elements. The magnetic detection circuit of Patent Document 1 includes a power supply, a number of switches that perform connection switching between the power supply and each terminal of the two Hall elements, and an adder.

[0003] In Patent Document 1, the offset component of the first Hall element is canceled by adding, by an adder, the output voltage from the first amplifier when a power supply is applied to the common terminal of the first Hall element and the output voltage from the second amplifier when a power supply is applied to the independent terminal of the first Hall element. Similarly, the offset component of the second Hall element is canceled by adding, by an adder, the output voltage from the first amplifier when a power supply is applied to the common terminal of the second Hall element and the output voltage from the second amplifier when a power supply is applied to the independent terminal of the second Hall element.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the above Patent Document 1, since a total of three amplifier circuits are configured, one for each of the independent terminals of the first Hall element, the independent terminals of the second Hall element, and the common terminal of each Hall element, the number of components is large and the substrate area is increased. Further, since variations (individual differences) of each of the three amplifiers are involved in a complex manner, it is difficult to eliminate errors caused by amplifier variations.

[0006] The technology disclosed in this specification aims to reduce the number of components and the substrate area of a magnetic detection circuit and to reduce errors.

Means for Solving the Problem

[0007] This specification discloses a magnetic detection circuit. The magnetic detection circuit includes a first Hall element and a second Hall element, a common terminal pair connected to both the first Hall element and the second Hall element, a first terminal pair dedicated to the first Hall element, and a second terminal pair dedicated to the second Hall element, a detection circuit unit having a detection circuit unit, a power supply unit that applies power to the detection circuit unit, a power supply unit that detects an offset signal component, a switching circuit that switches connections between the common terminal pair, the first terminal pair, and the second terminal pair, an amplifier circuit that amplifies the output voltage output from the switching circuit, and an offset cancellation operation that removes the offset signal components of the first Hall element and the second Hall element based on the output voltage of the amplifier circuit. And a calculation unit that performs the operation, and the amplifier circuit has one common amplifier that can be connected to each of the common terminal pair, the first terminal pair, and the second terminal pair via the switching circuit.

[0008] This specification discloses a sewing machine. The sewing machine includes a sewing machine body, a magnet provided on a movable part of the sewing machine body, the above magnetic detection circuit that detects a magnetic force generated from the magnet, and a displacement detection unit that detects a displacement of the movable part based on an output of the magnetic detection circuit.

Advantages of the Invention

[0009] According to the technology disclosed in this specification, it is possible to reduce the number of components and the substrate area of the magnetic detection circuit, and to reduce errors.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments according to the present disclosure will be described with reference to the drawings, but the present disclosure is not limited to the embodiments.

[0012] [Magnetic Detection Circuit] FIG. 1 is a diagram showing a magnetic detection circuit 1 according to an embodiment. The magnetic detection circuit 1 according to the embodiment is a circuit that constitutes a magnetic sensor for detecting magnetism by a Hall element. The magnetic detection circuit 1 includes a detection circuit unit 2, a power supply unit 3, a switching circuit 4, an amplifier circuit 5, and an arithmetic unit 6. The detection circuit unit 2, the power supply unit 3, the switching circuit 4, the amplifier circuit 5, and the arithmetic unit 6 are provided on a circuit board (not shown).

[0013] (Detection Circuit Unit) The detection circuit unit 2 includes a plurality of Hall elements, and the Hall elements generate a detection signal of a magnetic field. The detection circuit unit 2 is composed of a Hall IC on which a plurality of Hall elements are mounted. The detection circuit unit 2 includes a first Hall element 7 and a second Hall element 8. The detection circuit unit 2 has a plurality of terminal pairs for making electrical connections to the plurality of Hall elements. The detection circuit unit 2 has a common terminal pair 9, a first terminal pair 10, and a second terminal pair 11. The common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 each consist of a pair (two) of terminals.

[0014] FIG. 2 is a circuit diagram showing each terminal of the Hall element according to the embodiment. The first Hall element 7 and the second Hall element 8 can each be equivalently represented by a bridge circuit as shown in FIG. 2. The Hall element has four terminals t1, t2, t3, and t4. The line connected to terminal t1 is connected in parallel to the two terminals t2 and t3, and the lines extending from terminals t2 and t3 merge and are connected to terminal t4. In the example of FIG. 2, power supply (V CC ) is applied to terminal t1, and current flows toward the ground GND connected to terminal t4. When a magnetic field is applied in the direction passing through the Hall element (the direction perpendicular to the paper surface of FIG. 2), a voltage is generated between terminals t2 and t3 at the bridge midpoint. The voltage between terminals t2 - t3 (the first voltage Vh1 and the second voltage Vh2 in FIG. 2) becomes an output signal corresponding to the magnetic field. The first Hall element 7 and the second Hall element 8 are Hall elements of the same specification, and their input / output resistances are substantially equal.

[0015] The output voltage of the Hall element includes an offset signal component caused by, for example, imbalance of bridge resistances, stress of the package, and stress during mounting. The Hall element has an offset signal component of zero when the resistance values of the four resistance components in FIG. 2 are all equal, but in reality, they do not match and become an offset component. In the embodiment, an offset cancellation process for canceling the offset component included in the output voltage of this Hall element (the first Hall element 7 and the second Hall element 8) is performed. Details of the offset cancellation process will be described later.

[0016] In the detection circuit unit 2 shown in FIG. 1, two Hall elements shown in FIG. 2 are connected in parallel, and they are the first Hall element 7 and the second Hall element 8 respectively. The common terminal pair 9 is a terminal pair that connects to both the first Hall element 7 and the second Hall element 8. One terminal of the common terminal pair 9 is connected in parallel to each terminal t1 of the first Hall element 7 and the second Hall element 8, for example. The other terminal of the common terminal pair 9 is connected in parallel to each terminal t4 of the first Hall element 7 and the second Hall element 8, for example. Therefore, when the power supply V CC and the ground GND are connected respectively, both the first Hall element 7 and the second Hall element 8 are in the connection state shown in FIG. 2. In the connection state shown in FIG. 2, the common terminal pair 9 functions as an input terminal pair to which the power supply is applied.

[0017] The first terminal pair 10 is a dedicated terminal pair for the first Hall element 7. The second terminal pair 11 is a dedicated terminal pair for the second Hall element 8. Here, the dedicated terminal pair means that, unlike the common terminal pair 9, it is connected to only one of the first Hall element 7 and the second Hall element 8 and not to the other. One terminal of the first terminal pair 10 is connected to the terminal t2 of the first Hall element 7, and the other terminal of the first terminal pair 10 is connected to the terminal t3 of the first Hall element 7. The first terminal pair 10 is not connected to any terminal of the second Hall element 8. Therefore, in the connection state shown in FIG. 2, the first terminal pair 10 functions as an output terminal pair for the magnetic detection signal of the first Hall element 7. Similarly, one terminal of the second terminal pair 11 is connected to the terminal t2 of the second Hall element 8, and the other terminal of the second terminal pair 11 is connected to the terminal t3 of the second Hall element 8. The second terminal pair 11 is not connected to any terminal of the first Hall element 7. Therefore, in the connection state shown in FIG. 2, the second terminal pair 11 functions as an output terminal pair for the magnetic detection signal of the second Hall element 8.

[0018] In the offset cancellation process described later, the switching circuit 4 applies power to the first terminal pair 10 and the second terminal pair 11 to measure the voltage from the common terminal pair 9. In that case, the first terminal pair 10 and the second terminal pair 11 function as input terminal pairs, and the common terminal pair 9 functions as an output terminal pair. Therefore, these terminal pairs function as both input terminal pairs and output terminal pairs.

[0019] (Power supply unit) The power supply unit 3 applies power to the detection circuit unit 2. The power supply unit 3 is connected to the detection circuit unit 2 via the switching circuit 4. The power supply unit 3 is selectively connected to any one of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 by the switching circuit 4. The power supply unit 3 connects one terminal of the connected terminal pair to the power supply V CC and connects the other terminal of the connected terminal pair to the ground GND to apply power (that is, to pass a current through the Hall element).

[0020] (Switching circuit) The switching circuit 4 is connected to the power supply unit 3, the detection circuit unit 2, and the amplifier circuit 5, respectively. The switching circuit 4 includes a plurality of switches. In FIG. 1, the switching circuit 4 includes six switches: switch SW1, switch SW2, switch SW3, switch SW4, switch SW5, and switch SW6. In FIG. 1, for the sake of convenience, the terminal pairs are shown as one unit, but in reality, each terminal pair is composed of two terminals, and the circuit is provided with a plurality of wirings individually connected to each terminal. Therefore, these switches SW1 to SW6 are actually composed of one or a plurality of switches.

[0021] In the example of FIG. 1, switches SW1 to SW6 are on-off switches. Switches SW1, SW2, and SW3 are input selection switches for selecting the object to which the power supply unit 3 is connected (i.e., the object to which power is applied). Switches SW1, SW2, and SW3 are alternatively switched so that any one of them is turned on and the other two are turned off at that time. When switch SW1 is turned on, the power supply unit 3 and the first terminal pair 10 are connected. When switch SW2 is turned on, the power supply unit 3 and the second terminal pair 11 are connected. When switch SW3 is turned on, the power supply unit 3 and the common terminal pair 9 are connected.

[0022] Switches SW4, SW5, and SW6 are output selection switches for selecting the object to which the amplifier circuit 5 is connected (i.e., the object for measuring the output voltage). Switches SW4, SW5, and SW6 are alternatively switched so that any one of them is turned on and the other two are turned off at that time. When switch SW4 is turned on, the first terminal pair 10 is connected to the amplifier circuit 5. When switch SW5 is turned on, the second terminal pair 11 is connected to the amplifier circuit 5. When switch SW6 is turned on, the common terminal pair 9 is connected to the amplifier circuit 5.

[0023] The switching circuit 4 switches the connection between the power supply unit 3 and the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 so as to detect an offset signal component. Specifically, the switching circuit 4 outputs the first voltage Vh1 of the first terminal pair 10 when power is applied to the common terminal pair 9, the second voltage Vh2 of the second terminal pair 11 when power is applied to the common terminal pair 9, the third voltage Vh3 of the common terminal pair 9 when power is applied to the first terminal pair 10, and the fourth voltage Vh4 of the common terminal pair 9 when power is applied to the second terminal pair 11, to the amplifier circuit 5 by switching switches SW1 to SW6.

[0024] FIG. 3 is a diagram for explaining the switching patterns of switches SW1 to SW6 of the switching circuit 4. The first voltage Vh1 is measured by turning on switches SW3 and SW4. In this case, power is applied from the power supply unit 3 to the common terminal pair 9, and the voltage of the first terminal pair 10 (i.e., the first voltage Vh1) is output to the amplifier circuit 5. The second voltage Vh2 is measured by turning on switches SW3 and SW5. In this case, power is applied from the power supply unit 3 to the common terminal pair 9, and the voltage of the second terminal pair 11 (i.e., the second voltage Vh2) is output to the amplifier circuit 5. The third voltage Vh3 is measured by turning on switches SW1 and SW6. In this case, power is applied from the power supply unit 3 to the first terminal pair 10, and the voltage of the common terminal pair 9 (i.e., the third voltage Vh3) is output to the amplifier circuit 5. The fourth voltage Vh4 is measured by turning on switches SW2 and SW6. In this case, power is applied from the power supply unit 3 to the second terminal pair 11, and the voltage of the common terminal pair 9 (i.e., the fourth voltage Vh4) is output to the amplifier circuit 5.

[0025] The switching circuit 4 receives a switching control signal from the arithmetic unit 6 and switches the switches SW1 to SW6 according to the received switching control signal. The switching circuit 4 is controlled to periodically switch the four patterns of switch on / off states shown in FIG. 3 in order.

[0026] (Amplifier circuit) The amplifier circuit 5 amplifies the output voltage output from the switching circuit 4. In the embodiment, the amplifier circuit 5 has a single common amplifier 12 that can be connected to each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 via the switching circuit 4. That is, a single common amplifier 12 amplifies the output signals (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, the fourth voltage Vh4) of each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11. Therefore, the number of amplifiers and the installation area of the amplifier circuit 5 are reduced compared to the case where an amplifier is provided individually for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11.

[0027] The common amplifier 12 amplifies and outputs an input signal at a predetermined amplification factor. The input of the common amplifier 12 is connected in parallel to the switches SW4, SW5, and SW6 of the switching circuit 4. The common amplifier 12 is connected to the first terminal pair 10 via the switch SW4, to the second terminal pair 11 via the switch SW5, and to the common terminal pair 9 via the switch SW6. Therefore, when the switch of the switching circuit 4 is switched as shown in FIG. 3, the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 are selectively input to the common amplifier 12.

[0028] The common amplifier 12 amplifies each of the first voltage Vh1 of the first terminal pair 10 when power is applied to the common terminal pair 9, the second voltage Vh2 of the second terminal pair 11 when power is applied to the common terminal pair 9, the third voltage Vh3 of the common terminal pair 9 when power is applied to the first terminal pair 10, and the fourth voltage Vh4 of the common terminal pair 9 when power is applied to the second terminal pair 11, at the same amplification factor (Av + At) and outputs them to the arithmetic unit 6. Let the set value of the amplification factor of the common amplifier 12 be Av. The correction value At will be described later. Note that the correction value At changes according to the temperature. The common amplifier 12 amplifies a set of four voltages (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, the fourth voltage Vh4) that can be regarded as the same time, at the same amplification factor (Av + At).

[0029] The common amplifier 12 is connected to the arithmetic unit 6. The output voltage of the common amplifier 12 is input to the AD (analog-digital) conversion unit 13 of the arithmetic unit 6 and converted into a digital signal. In the AD conversion process by the AD conversion unit 13, the error may increase for a minute input voltage below the linearly convertible voltage range. Therefore, in the embodiment, the amplifier circuit 5 has a voltage adjustment unit 5A that adjusts the voltage output from the common amplifier 12 to a range according to the input voltage characteristics of the AD conversion unit 13. The voltage adjustment unit 5A adds a preset bias voltage V off to the output voltage of the common amplifier 12. A voltage obtained by adding the bias voltage V off to the output voltage of the common amplifier 12 is input to the AD conversion unit 13.

[0030] Also, the sensitivity characteristics of the first Hall element 7 and the second Hall element 8 change with temperature. Therefore, the magnetic detection circuit 1 according to the embodiment further includes a temperature detection unit 5B. The temperature detection unit 5B includes, for example, a thermistor. And the amplifier circuit 5 has a temperature compensation unit 5C. The temperature compensation unit 5C adjusts the amplification factor of the common amplifier 12 according to the output of the temperature detection unit 5B. The temperature compensation unit 5C generates a correction value At of the amplification factor according to the output of the temperature detection unit 5B. The temperature compensation unit 5C adds the generated correction value At to the amplification factor Av of the common amplifier 12. The common amplifier 12 amplifies the input signal with a compensation amplification factor (Av + At) obtained by adding the correction value At of the temperature compensation unit 5C to the preset amplification factor Av. The temperature compensation unit 5C generates a correction value At that reduces the change in the output voltage due to the temperature characteristics of the Hall element (the first Hall element 7 and the second Hall element 8). For example, when the output voltage of the Hall element decreases as the temperature rises, the temperature compensation unit 5C increases the correction value At as the temperature rises. The influence of the change in the sensitivity characteristics according to the temperature of the Hall element is reduced by the change in the amplification factor of the common amplifier 12.

[0031] (Arithmetic unit) The arithmetic unit 6 includes an AD conversion unit 13, an adjustment arithmetic unit 14, a removal arithmetic unit 15, a detected value arithmetic unit 16, an output unit 17, and a switching circuit control unit 18. The arithmetic unit 6 is a computer having a processor such as an MPU (Micro Processing Unit), a non-volatile memory such as a ROM (Read Only Memory) and a volatile memory such as a RAM (Random Access Memory), and an input / output circuit. The arithmetic unit 6 realizes the functions of the AD conversion unit 13, the adjustment arithmetic unit 14, the removal arithmetic unit 15, the detected value arithmetic unit 16, and the switching circuit control unit 18 by the processor executing a program stored in the memory. The output unit 17 is realized by the input / output circuit being controlled by the processor. The arithmetic unit 6 may include the AD conversion unit 13, the adjustment arithmetic unit 14, the removal arithmetic unit 15, the detected value arithmetic unit 16, and the switching circuit control unit 18 as individual hardware.

[0032] The AD conversion unit 13 receives the output signal of the common amplifier 12. The AD conversion unit 13 AD-converts each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12. By the AD conversion unit 13, each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12 is converted into a voltage value of a digital signal.

[0033] The adjustment calculation unit 14 equalizes the magnitudes of the offset signal components of the AD-converted first voltage Vh1, second voltage Vh2, third voltage Vh3, and fourth voltage Vh4. When the input / output resistances of the first Hall element 7 and the second Hall element 8 are equal, the Hall voltage and the offset component included in the third voltage Vh3 are each 1 / 2 of the Hall voltage and the offset signal component included in the first voltage Vh1, and the Hall voltage and the offset component included in the fourth voltage Vh4 are each 1 / 2 of the Hall voltage and the offset signal component included in the second voltage Vh2. Therefore, the adjustment calculation unit 14 doubles the voltage values of the third voltage Vh3 and the fourth voltage Vh4, respectively. In the embodiment, a bias voltage V off is added to the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 by the voltage adjustment unit 5A in the amplifier circuit 5. Therefore, the adjustment calculation unit 14 subtracts the bias voltage V off from each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4. Then, the adjustment calculation unit 14 doubles the third voltage Vh3 and the fourth voltage Vh4 from which the bias voltage V off has been subtracted, respectively.

[0034] The removal calculation unit 15 removes the offset signal components of equal magnitude by offset cancellation calculation. Here, the offset signal component included in the first voltage Vh1 and the offset signal component included in the third voltage Vh3 have opposite signs. Therefore, the removal calculation unit 15 obtains the addition average of the first voltage Vh1 and the third voltage Vh3 after the calculation by the adjustment calculation unit 14, and sets it as the first Hall voltage V1 of the first Hall element 7. The first Hall voltage V1 is represented by the following formula (1). V1={(Vh1 - V off) + 2×(Vh3 - V off )} / 2 ···(1) Here, (Vh1 - V off ) is the first voltage Vh1 from which the bias voltage V off is subtracted, and represents the calculation result by the adjustment calculation unit 14. 2×(Vh3 - V off ) is the calculation result by the adjustment calculation unit 14, which is obtained by doubling the third voltage Vh3 from which the bias voltage V off is subtracted.

[0035] Similarly, the offset signal component included in the second voltage Vh2 and the offset signal component included in the fourth voltage Vh4 have opposite signs to each other. The removal calculation unit 15 obtains the addition average of the second voltage Vh2 and the fourth voltage Vh4 after the calculation by the adjustment calculation unit 14, and uses it as the second Hall voltage V2 of the second Hall element 8. The second Hall voltage V2 is represented by the following formula (2). V2 = {(Vh2 - V off ) + 2×(Vh4 - V off )} / 2 ···(2) Here, (Vh2 - V off ) is the second voltage Vh2 from which the bias voltage V off is subtracted, and represents the calculation result by the adjustment calculation unit 14. 2×(Vh4 - V off ) is the calculation result by the adjustment calculation unit 14, which is obtained by doubling the fourth voltage Vh4 from which the bias voltage V off is subtracted.

[0036] By the offset cancellation calculation of the removal calculation unit 15, for the first Hall element 7, the offset signal component included in the first voltage Vh1 and the offset signal component included in the third voltage Vh3 cancel each other out and are removed. For the second Hall element 8, the offset signal component included in the second voltage Vh2 and the offset signal component included in the fourth voltage Vh4 cancel each other out and are removed. The first Hall voltage V1 is the magnetic detection signal of the first Hall element 7 from which the offset signal component has been removed. The second Hall voltage V2 is the magnetic detection signal of the second Hall element 8 from which the offset signal component has been removed.

[0037] The detection value calculation unit 16 calculates the detection value of the magnetic detection circuit 1 by performing calculations based on the first Hall voltage V1 and the second Hall voltage V2. In the embodiment, the detection value calculation unit 16 calculates a voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2. The voltage ratio is represented by the following formula (3). Voltage ratio (V out ) = A × (V1 - V2) / (V1 + V2) + V DD / 2 ··(3) Here, A is a coefficient (constant) set in advance. V DD is the voltage value of the drive voltage input to the calculation unit 6. The voltage ratio in formula (3) obtains the gradient distribution of the magnetic field applied to each Hall element based on the detection values (first Hall voltage V1, second Hall voltage V2) of the first Hall element 7 and the second Hall element 8, and represents the position of the magnetic source. In formula (3), at the neutral position where the magnetic field from the magnetic source acts equally on the first Hall element 7 and the second Hall element 8, the voltage ratio = V DD / 2, and this can be used as the origin. As the magnetic source approaches the first Hall element 7, the voltage ratio changes in the positive direction from the origin, and as the magnetic source approaches the second Hall element 8, the voltage ratio changes in the negative direction from the origin. Therefore, the position of the magnetic source can be grasped from the voltage ratio.

[0038] The output unit 17 outputs the calculation result of the detection value calculation unit 16 as the output signal of the magnetic detection circuit 1. That is, the output unit 17 outputs the value of the voltage ratio obtained by formula (3) as the output value V out . In this way, the calculation unit 6 calculates the first Hall voltage V1 and the second Hall voltage V2 from which the offset signal component has been removed by offset cancellation calculation, and outputs the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2.

[0039] The switching circuit control unit 18 controls the control operation of the switching circuit 4. The switching circuit control unit 18 controls the on / off states of each of the switches SW1 to SW6 of the switching circuit 4 by outputting switching control signals to each of the switches SW1 to SW6. The switching circuit control unit 18 sequentially outputs switching control signals that realize the four patterns shown in FIG. 3. The switching circuit control unit 18 periodically executes the input of the switching control signals that realize the four patterns. As a result, the arithmetic unit 6 periodically acquires the voltage values of the amplified first voltage Vh1, second voltage Vh2, third voltage Vh3, and fourth voltage Vh4, and outputs an output value V as a detection result. out Outputs it at a predetermined period. The output value V out enables the position of the magnetic source at each detection time to be grasped.

[0040] (Magnetic detection method) FIG. 4 is a flowchart for explaining a magnetic detection method using the magnetic detection circuit 1 according to the embodiment. FIG. 5 is a diagram showing the switch switching state at the time of acquiring the first voltage Vh1. FIG. 6 is a diagram showing the switch switching state at the time of acquiring the third voltage Vh3. The operation of the magnetic detection circuit 1 will be described below.

[0041] First, the arithmetic unit 6 acquires the first voltage Vh1, second voltage Vh2, third voltage Vh3, and fourth voltage Vh4 respectively (step S10). The switching circuit control unit 18 transmits switching control signals to the switching circuit 4 so as to switch the switches SW1 to SW6 of the switching circuit 4 to the four patterns shown in FIG. 3. For example, the first voltage Vh1 is acquired by turning on the switches SW3 and SW4 and turning off the other switches.

[0042] As shown in FIG. 5, the power supply unit 3 is connected to the common terminal pair 9 via the switch SW3, and power is applied to the common terminal pair 9 of the first Hall element 7 and the second Hall element 8. The first terminal pair 10 is connected to the common amplifier 12 via the switch SW4, and the first voltage Vh1 of the first Hall element 7 is input to the common amplifier 12. The arithmetic unit 6 acquires the first voltage Vh1 amplified by the common amplifier 12. In the state of FIG. 5, if the switch SW4 is turned off and the switch SW5 is turned on, the second terminal pair 11 is connected to the common amplifier 12, and the second voltage Vh2 of the second Hall element 8 is input to the common amplifier 12.

[0043] The third voltage Vh3 is obtained by turning on the switches SW1 and SW6 and turning off the other switches. As shown in FIG. 6, the power supply unit 3 is connected to the first terminal pair 10 via the switch SW1, and power is applied to the first terminal pair 10 of the first Hall element 7. The common terminal pair 9 is connected to the common amplifier 12 via the switch SW6, and the third voltage Vh3 of the first Hall element 7 is input to the common amplifier 12. The arithmetic unit 6 acquires the third voltage Vh3 amplified by the common amplifier 12. If the switch SW1 is turned off and the switch SW2 is turned on, the second terminal pair 11 is connected to the power supply unit 3, and the fourth voltage Vh4 of the second Hall element 8 is input to the common amplifier 12 via the common terminal pair 9.

[0044] The arithmetic unit 6 acquires the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 during a period that can be regarded as substantially the same time. The first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 are respectively AD-converted by the AD conversion unit 13 and stored in the memory.

[0045] Next, the adjustment arithmetic unit 14 equalizes the magnitudes of the Hall voltage and the offset signal component of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 that have been AD-converted (step S11). The adjustment arithmetic unit 14 obtains the bias voltage V from each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4. offAfter taking the difference, the third voltage Vh3 and the fourth voltage Vh4 are each doubled. As a result, the magnitudes (absolute values) of the Hall voltages and offset signal components of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 become equal.

[0046] Next, the removal calculation unit 15 removes the offset signal components with aligned magnitudes by offset cancellation calculation (step S12). The removal calculation unit 15 acquires the first Hall voltage V1 from which the offset signal component has been removed according to Equation (1). The removal calculation unit 15 acquires the second Hall voltage V2 from which the offset signal component has been removed according to Equation (2).

[0047] Next, the detection value calculation unit 16 calculates the detection value of the magnetic detection circuit 1 by calculating the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2 (step S13). The detection value calculation unit 16 obtains the voltage ratio of the first Hall voltage V1 and the second Hall voltage V2 according to Equation (3) and sets it as the output value V out The calculation unit 6 outputs the output value V out through the output unit 17. Thereby, magnetic detection by the magnetic detection circuit 1 is performed.

[0048] [Sewing Machine] Next, an application example of the magnetic detection circuit 1 according to the embodiment will be described. In the embodiment, an example in which the magnetic detection circuit 1 is applied to a sewing machine 100 will be described.

[0049] FIG. 7 is a diagram showing a sewing machine 100 according to the embodiment. The sewing machine 100 is a so-called straight sewing machine. As shown in FIG. 7, the sewing machine 100 includes a sewing machine main body 21 and a control device 40. The sewing machine main body 21 has a sewing machine frame 23 installed on a sewing machine table 22.

[0050] The sewing machine frame 23 has an arm 23A, a bed 23B, a base 23C, and a head 23D. The arm 23A is long in the left - right direction. The bed 23B is disposed below the arm 23A. The bed 23B is long in the left - right direction. The bed 23B faces the arm 23A. The base 23C connects the right end portion of the arm 23A and the bed 23B. The base 23C is long in the up - down direction. The head 23D is provided at the left end portion of the arm 23A. The head 23D protrudes downward from the left end portion of the arm 23A.

[0051] The sewing machine main body 21 includes a needle bar 25, a balance 26, a needle plate 27, a presser foot 28, a thread conditioner 29, feed teeth 30, a sewing machine motor 31, and a presser motor 32.

[0052] The needle bar 25 holds the sewing machine needle 24. The needle bar 25 reciprocates in the up - down direction. The needle bar 25 is supported by the head 23D. The sewing machine needle 24 has a thread - passing hole through which the upper thread passes. The sewing machine needle 24 holds the upper thread on the inner surface of the thread - passing hole. When the needle bar 25 reciprocates in the up - down direction, the sewing machine needle 24 reciprocates in the up - down direction while holding the upper thread.

[0053] The balance 26 supplies the upper thread to the sewing machine needle 24. The balance 26 reciprocates in the up - down direction. The balance 26 is supported by the arm 23A. The balance 26 reciprocates in the up - down direction while holding the upper thread. The balance 26 has a holding hole through which the upper thread passes. The balance 26 holds the upper thread on the inner surface of the holding hole. By reciprocating in the up - down direction, the balance 26 pays out the upper thread used for sewing the sewing object K (see FIG. 8) or pulls up the upper thread.

[0054] The needle plate 27 is disposed below the needle bar 25. The needle plate 27 supports the sewing object K from below. The needle plate 27 supports the sewing object K below the needle bar 25. The sewing machine needle 24 held by the needle bar 25 and the needle plate 27 face each other. The needle plate 27 has a needle hole through which the sewing machine needle 24 can pass. The sewing machine needle 24 passing through the sewing object K supported by the needle plate 27 passes through the needle hole. A bobbin is disposed below the needle plate 27. The bobbin supplies the lower thread to the sewing object K.

[0055] The presser foot 28 presses the sewing object K supported by the needle plate 27 from above. The presser foot 28 is disposed at least partially around the sewing needle 24. The presser foot 28 is supported by the head 23D. The presser foot 28 is movable in the vertical direction.

[0056] The thread conditioner 29 applies tension to the upper thread supplied to the sewing needle 24 between the balance 26 and the needle bar 25. The thread conditioner 29 is supported by the head 23D.

[0057] The feed dog 30 operates to feed the sewing object K supported by the needle plate 27 forward. The feed dog 30 feeds the sewing object K forward by moving along a predetermined feed path. The feed dog 30 is disposed below the needle plate 27. The feed dog 30 protrudes from and retracts into an opening provided in the needle plate 27 by moving along the feed path. When feeding the sewing object K, at least a part of the feed dog 30 protrudes upward from the upper surface of the needle plate 27 through the opening provided in the needle plate 27.

[0058] The sewing machine motor 31 generates power for operating each of the needle bar 25, the feed dog 30, and the bobbin. The sewing machine motor 31 generates power for reciprocating the needle bar 25 in the vertical direction. The sewing machine motor 31 generates power for rotating the bobbin. The sewing machine motor 31 generates power for moving the feed dog 30 along the feed path. The sewing machine motor 31 includes, for example, a pulse motor. The sewing machine motor 31 is supported by the right portion of the arm 23A.

[0059] The presser motor 32 generates power for operating the presser foot 28. The presser motor 32 generates power for reciprocating the presser foot 28 in the vertical direction. The presser motor 32 is connected to a presser bar 28A (see FIG. 8) that supports the presser foot 28 via a link mechanism. The presser motor 32 includes, for example, a pulse motor. The presser motor 32 is provided inside the arm 23A.

[0060] The control device 40 includes a computer system. The computer system includes a processor such as a CPU (Central Processing Unit), a main memory including a non-volatile memory such as a ROM and a volatile memory such as a RAM, a storage such as a hard disk drive or a flash memory, and an interface including an input / output circuit. The control device 40 controls the operation of the sewing machine 100.

[0061] FIG. 8 is a schematic explanatory diagram showing a movable part MV and a magnetic detection circuit 1 according to an embodiment. In the embodiment, the sewing machine body 21 includes a magnet 33 provided on a movable part MV of the sewing machine body 21, a magnetic detection circuit 1 that detects a magnetic force generated from the magnet 33, and a displacement detection unit 41 that detects the displacement of the movable part MV based on the output of the magnetic detection circuit 1.

[0062] The movable part MV is not particularly limited as long as it is a part whose position changes with the operation of the sewing machine 100. The movable part MV may be a part that is moved by a drive source such as a motor, a part that moves with the movement of a medium (sewing thread, lubricating oil, etc.) used by the sewing machine 100, or a part that is moved by a sewing operator who uses the sewing machine 100.

[0063] In the example of FIG. 8, the movable part MV includes the presser foot 28 of the sewing machine body 21. The presser foot 28 is provided at the lower end of the presser bar 28A and moves in the height direction (vertical direction) together with the presser bar 28A. The presser foot 28 linearly moves in the height direction (vertical direction) between the raised position and the pressing position by the presser motor 32. The presser foot 28 is disposed at a position spaced upward from the needle plate 27 in the raised position. The presser foot 28 is disposed at a position where it can contact the needle plate 27 in the pressing position. By being disposed at the pressing position, the presser foot 28 presses the sewing object K supported on the needle plate 27 so as to sandwich it between the presser foot 28 and the needle plate 27. The presser foot 28 has its height position displaced according to the thickness of the sewing object K in the pressing position. When there is no sewing object K on the needle plate 27, the presser foot 28 is disposed on the surface of the needle plate 27. When there is a sewing object K on the needle plate 27, the presser foot 28 is displaced upward from the needle plate 27 by the thickness of the sewing object K. The greater the thickness of the sewing object K, the greater the displacement amount of the presser foot 28. In the embodiment, the displacement of the presser foot 28 in the height direction (vertical direction) in this pressing position is detected using the magnetic detection circuit 1.

[0064] Specifically, the magnet 33 is fixed to the presser foot 28 which is the movable part MV via the presser bar 28A. The magnet 33 is attached to the presser bar 28A via the bracket 28B inside the head 23D of the sewing machine body 21. The magnet 33 moves up and down integrally with the presser foot 28.

[0065] The magnetic detection circuit 1 is disposed inside the head 23D of the sewing machine body 21 at a position near the magnet 33. The magnetic detection circuit 1 is disposed such that the first Hall element 7 and the second Hall element 8 are located near the magnet 33. The first Hall element 7 and the second Hall element 8 are disposed so as to be arranged along the vertical direction. A magnetic field generated from the magnet 33 is applied to the first Hall element 7 and the second Hall element 8. Thereby, the magnetic detection circuit 1 detects the magnetic force generated from the magnet 33 and outputs an output value V out corresponding to the magnetic force to the displacement detection unit 41.

[0066] The displacement detection unit 41 is provided in the control device 40. The displacement detection unit 41 is realized programmatically by the processor of the control device 40 executing a program stored in the main memory. The displacement detection unit 41 is based on the output value V of the magnetic detection circuit 1 out to obtain the position of the magnet 33 in the height direction. Based on the known positional relationship between the magnet 33 and the presser foot 28, the displacement of the presser foot 28 in the height direction (vertical direction) can be obtained.

[0067] The control device 40 adjusts the parameters of the sewing operation of the sewing machine body 21 according to the displacement in the height direction of the presser foot 28 obtained by the displacement detection unit 41. The displacement in the height direction of the presser foot 28 at the presser position represents the thickness of the sewing object K. The control device 40 adjusts, for example, parameters such as the sewing speed, the number of stitches, and the pitch of the sewing machine body 21 to values suitable for the thickness of the sewing object K according to the displacement of the presser foot 28.

[0068] In addition, the movable part MV may be, for example, a float indicating the amount of lubricating oil. Although not shown, in the sewing machine body 21, lubricating oil may be circulated and supplied to sliding parts such as the bobbin case. In this case, the sewing machine body 21 is provided with an oil storage part such as an oil pan or an oil tank, an oil pump for sending lubricating oil to the sliding part, and an oil flow path connecting the sliding part and the oil storage part. The float is arranged in the oil storage part and is displaced up and down according to the amount of oil in the oil storage part. The magnetic detection circuit 1 detects the magnetism of the magnet 33 provided on the float and outputs the output value V out to the displacement detection unit 41. The displacement detection unit 41 obtains the position of the magnet 33 in the height direction, that is, the amount of lubricating oil, based on the output value V out of the magnetic detection circuit 1.

[0069] [Effect] As described above, according to the embodiment, the magnetic detection circuit 1 includes a first Hall element 7 and a second Hall element 8, a common terminal pair 9 connected to both the first Hall element 7 and the second Hall element 8, a dedicated first terminal pair 10 of the first Hall element 7, and a dedicated second terminal pair 11 of the second Hall element 8, a detection circuit unit 2 having these; a power supply unit 3 that applies power to the detection circuit unit 2; a switching circuit 4 that switches the connection between the power supply unit 3 and the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 so as to detect an offset signal component; an amplifier circuit 5 that amplifies the output voltage output from the switching circuit 4; and an arithmetic unit 6 that performs an offset cancellation operation for removing the offset signal components of the first Hall element 7 and the second Hall element 8 based on the output voltage of the amplifier circuit 5. The amplifier circuit 5 has a single common amplifier 12 that can be connected to each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11 via the switching circuit 4. Thereby, compared with the case where an amplifier is provided separately for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, only one common amplifier 12 needs to be provided, so that the number of components and the board area can be reduced accordingly. Further, when an amplifier is provided separately for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, there are variations (individual differences) in each amplifier, so it is difficult to appropriately remove the offset signal component and it is difficult to reduce the error caused by the amplifier. On the other hand, in the embodiment, since only one common amplifier 12 is provided, it is not necessary to consider the individual differences between the amplifiers. Thus, according to the embodiment, the number of components and the board area of the magnetic detection circuit 1 can be reduced, and error reduction can be achieved.

[0070] Also, when a power supply is applied to the common terminal pair 9, the common amplifier 12 amplifies the first voltage Vh1 of the first terminal pair 10, the second voltage Vh2 of the second terminal pair 11, the third voltage Vh3 of the common terminal pair 9 when a power supply is applied to the first terminal pair 10, and the fourth voltage Vh4 of the common terminal pair 9 when a power supply is applied to the second terminal pair 11, each with the same amplification factor and outputs them to the arithmetic unit 6. That is, in order to make the magnitudes of the offset signal components uniform, it is not necessary to amplify the first voltage Vh1 and the second voltage Vh2, and the third voltage Vh3 and the fourth voltage Vh4, respectively, with different amplification factors. Therefore, the circuit configuration can be simplified, and the number of components and the substrate area of the magnetic detection circuit 1 can be effectively reduced.

[0071] Further, the arithmetic unit 6 includes an AD conversion unit 13 that AD-converts each of the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 amplified by the common amplifier 12, an adjustment arithmetic unit 14 that makes the magnitudes of the offset signal components of the AD-converted first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 uniform, and a removal arithmetic unit 15 that removes the offset signal components with uniform magnitudes by offset cancellation arithmetic. Thereby, for the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4 after AD conversion, after making the magnitudes of the offset signal components uniform, an offset cancellation arithmetic can be performed. As a result, since it is not necessary to separately provide an amplifier circuit for making the magnitudes of the offset signal components uniform, the number of components and the substrate area of the magnetic detection circuit 1 can be effectively reduced.

[0072] The amplifier circuit 5 has a voltage adjustment unit 5A that adjusts the voltage output from the common amplifier 12 to a range corresponding to the input voltage characteristics of the AD conversion unit 13. As a result, a voltage within a range corresponding to the input voltage characteristics of the AD conversion unit 13 can be input, so that error reduction related to AD conversion can be easily achieved. Further, the magnetic detection circuit 1 further includes a temperature detection unit 5B, and the amplifier circuit 5 has a temperature compensation unit 5C that adjusts the amplification factor of the common amplifier 12 according to the output of the temperature detection unit 5B. Here, when an amplifier is provided separately for each of the common terminal pair 9, the first terminal pair 10, and the second terminal pair 11, temperature compensation is performed separately for each amplifier, and it becomes necessary to consider variations in temperature compensation for each amplifier. In contrast, in the embodiment, since temperature compensation is performed by one common amplifier 12, error reduction due to temperature changes can be easily achieved.

[0073] Further, the arithmetic unit 6 calculates a first Hall voltage V1 and a second Hall voltage V2 from which an offset signal component has been removed by offset cancellation arithmetic, and calculates a voltage ratio (output value V out ) based on the first Hall voltage V1 and the second Hall voltage V2 and outputs it. Thereby, the position of the magnetic source with respect to the Hall element can be detected by the voltage ratio. In the embodiment, since the voltage ratio is obtained from the voltage values (the first voltage Vh1, the second voltage Vh2, the third voltage Vh3, and the fourth voltage Vh4) amplified by the same common amplifier 12 and subjected to offset cancellation, there are no variations in amplifier amplification or temperature compensation between the first Hall voltage V1 and the second Hall voltage V2 as in the case of using separate amplifiers. Therefore, error reduction can be easily achieved.

[0074] Further, according to the embodiment, the sewing machine 100 includes a sewing machine body 21, a magnet 33 provided in a movable part MV of the sewing machine body 21, a magnetic detection circuit 1 for detecting a magnetic force generated from the magnet 33, and a displacement detection part 41 for detecting the displacement of the movable part MV based on the output of the magnetic detection circuit 1. Thereby, it is possible to reduce the number of components and the substrate area, and to perform displacement detection of the sewing machine 100 using the magnetic detection circuit 1 capable of reducing errors. For example, in an industrial sewing machine or the like, even when there is a request for temperature rise due to continuous operation or for equalizing the quality among a large number of sewing machines 100, the magnetic detection circuit 1 of the present embodiment, which enables effective error reduction and can reduce individual differences, is suitable.

[0075] Further, the movable part MV includes the presser foot 28 of the sewing machine body 21, and the displacement detection part 41 detects the displacement of the presser foot 28 in the height direction. Thereby, it is possible to detect the thickness of the sewing object K based on the displacement of the presser foot 28 in the height direction. The thickness of the sewing object K greatly affects the quality of the sewing finish by the sewing machine 100. By reducing the detection error of the thickness of the sewing object K by the magnetic detection circuit 1 of the present embodiment, stable sewing with high quality can be realized.

[0076] [Other Embodiments] In the above embodiment, an example in which the voltage adjustment part 5A is provided in the amplifier circuit 5 is shown, but the voltage adjustment part 5A may not be provided. Further, in the above embodiment, an example in which the temperature compensation part 5C is provided in the amplifier circuit 5 is shown, but the temperature compensation part 5C may not be provided.

[0077] Further, in the above embodiment, an example in which the voltage ratio based on the first Hall voltage V1 and the second Hall voltage V2 is output as the output value V out is shown, but the magnetic detection circuit 1 may output another calculation value other than the voltage ratio as the output value V out and output it. The magnetic detection circuit 1 may output the values of the first Hall voltage V1 and the second Hall voltage V2 respectively.

[0078] In addition, in the above-described embodiment, an example in which the magnetic detection circuit 1 is applied to the sewing machine 100 has been shown. However, the magnetic detection circuit 1 may be used for any application other than sewing machines.

Explanation of Reference Numerals

[0079] 1... Magnetic detection circuit, 2... Detection circuit unit, 3... Power supply unit, 4... Switching circuit, 5... Amplifier circuit, 5A... Voltage adjustment unit, 5B... Temperature detection unit, 5C... Temperature compensation unit, 6... Arithmetic unit, 7... First Hall element, 8... Second Hall element, 9... Common terminal pair, 10... First terminal pair, 11... Second terminal pair, 12... Common amplifier, 13... AD conversion unit, 14... Adjustment arithmetic unit, 15... Removal arithmetic unit, 16... Detection value arithmetic unit, 17... Output unit, 18... Switching circuit control unit, 21... Sewing machine body, 22... Sewing machine table, 23A... Arm, 23B... Bed, 23C... Base, 23D... Head, 23... Sewing machine frame, 24... Sewing machine needle, 25... Needle bar, 26... Balance, 27... Needle plate, 28... Presser foot, 28A... Presser bar, 28B... Bracket, 29... Thread tension, 30... Feed teeth, 31... Sewing machine motor, 32... Presser motor, 33... Magnet, 40... Control device, 41... Displacement detection unit, 100... Sewing machine, At... Correction value, Av... Amplification factor, K... Sewing object, MV... Movable part, t1, t2, t3, t4... Terminals, V1... First Hall voltage, V2... Second Hall voltage, Vh1... First voltage, Vh2... Second voltage, Vh3... Third voltage, Vh4... Fourth voltage, V off ... Bias voltage, V out ... Output value.

Claims

1. A detection circuit unit including a first hole element and a second hole element, a common terminal pair connected to both the first hole element and the second hole element, a first terminal pair dedicated to the first hole element, and a second terminal pair dedicated to the second hole element; A power supply unit for applying power to the detection circuit unit; A switching circuit for switching the connection between the power supply unit and the common terminal pair, the first terminal pair, and the second terminal pair so as to detect an offset signal component; An amplifier circuit for amplifying the output voltage output from the switching circuit; An arithmetic unit for performing an offset cancellation operation for removing the offset signal components of the first hole element and the second hole element based on the output voltage of the amplifier circuit, and The amplifier circuit has a common amplifier connectable to each of the common terminal pair, the first terminal pair, and the second terminal pair via the switching circuit, A magnetic detection circuit.

2. The common amplifier Amplifies each of the first voltage of the first terminal pair when power is applied to the common terminal pair, The second voltage of the second terminal pair when power is applied to the common terminal pair, The third voltage of the common terminal pair when power is applied to the first terminal pair, The fourth voltage of the common terminal pair when power is applied to the second terminal pair, With the same amplification factor and outputs to the arithmetic unit, The magnetic detection circuit according to claim 1.

3. The arithmetic unit An AD conversion unit for AD-converting each of the first voltage, the second voltage, the third voltage, and the fourth voltage amplified by the common amplifier, An adjustment arithmetic unit for equalizing the magnitudes of the offset signal components of the AD-converted first voltage, second voltage, third voltage, and fourth voltage, And a removal arithmetic unit for removing the offset signal components with equalized magnitudes by the offset cancellation operation, The magnetic detection circuit according to claim 2.

4. The amplifier circuit has a voltage adjustment unit for adjusting the voltage output from the common amplifier to a range corresponding to the input voltage characteristics of the AD conversion unit, The magnetic detection circuit according to claim 3.

5. Further comprising a temperature detection unit, The amplifier circuit has a temperature compensation unit for adjusting the amplification factor of the common amplifier according to the output of the temperature detection unit, The magnetic detection circuit according to claim 1.

6. The calculation unit calculates a first Hall voltage and a second Hall voltage from which an offset signal component has been removed by the offset cancellation calculation, and outputs a voltage ratio based on the first Hall voltage and the second Hall voltage. The magnetic detection circuit according to claim 1.

7. A sewing machine body, A magnet provided on a movable part of the sewing machine body, The magnetic detection circuit according to any one of claims 1 to 6, which detects a magnetic force generated from the magnet, A displacement detection unit that detects displacement of the movable part based on an output of the magnetic detection circuit. A sewing machine.

8. The movable part includes a presser foot of the sewing machine body, The displacement detection unit detects displacement in the height direction of the presser foot. The sewing machine according to claim 7.

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