Display panel and method of manufacturing the same
The display panel achieves high resolution and efficient manufacturing through an optical structure layer with bank openings and light control patterns, enhancing pixel regions and inkjet process efficiency.
Patent Information
- Application Number
- JP2024228955
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-04
- Filing Date
- 2024-12-25
- Publication Date
- 2025-07-16
AI Technical Summary
Existing display panels face challenges in achieving high resolution while maintaining efficient manufacturing processes.
The display panel incorporates an optical structure layer with bank openings and light control patterns, including quantum dots to convert light wavelengths, and a color filter layer to enhance resolution and efficiency.
This design allows for high-resolution displays with improved manufacturing process efficiency by optimizing pixel regions and inkjet process landing areas.
Smart Images

Figure 2025106806000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a display panel and a method for manufacturing the same, and more particularly, to a display panel and a method for manufacturing the same in which the manufacturing process efficiency is improved while the resolution is increased.
Background Art
[0002] Display panels include transmissive display panels that selectively transmit source light generated from a light source, and emissive display panels that generate source light by the display panel itself. The display panel may include different types of light control patterns by pixels to generate a color image. The light control pattern can transmit only a partial wavelength range of the source light or convert the color of the source light. Some light control patterns may not change the color of the source light but may change the characteristics of the light.
Summary of the Invention
Problems to be Solved by the Invention
[0003] An object of the present invention is to provide a display panel capable of achieving high resolution and having improved manufacturing process efficiency.
[0004] Another object of the present invention is to provide a method for manufacturing a display panel with improved manufacturing process efficiency.
Means for Solving the Problems
[0005] A display panel according to an embodiment of the present invention includes a display element layer including a light-emitting element that outputs source light, and an optical structure layer disposed on the light-emitting element that transmits the source light or converts the source light into light of another wavelength. The optical structure layer includes a bank disposed on the light-emitting element and including a first bank opening, a light control layer including a first light control pattern disposed in the first bank opening, and a color filter layer disposed on the light control layer and including a first color filter disposed in a first filter region. The first bank region defined by the first bank opening has a first width along a first direction and includes a first sub-region having a first length along a second direction intersecting the first direction, and a second sub-region having a second width greater than the first width along the first direction. The first filter region overlaps the first sub-region and a part of the second sub-region. The width of the first filter region in the first direction is equal to or less than the first width, and the length of the first filter region in the second direction is equal to or greater than the first length.
[0006] The bank may further include a second bank opening spaced apart from the first bank opening, and a third bank opening spaced apart from each of the first bank opening and the second bank opening. The light control layer may further include a second light control pattern disposed in the second bank opening and a third light control pattern disposed in the third bank opening.
[0007] The second bank region defined by the second bank opening may include a third sub-region having a third width along the first direction and a second length along the second direction, and a fourth sub-region having a fourth width along the first direction. The fourth width may be greater than the third width.
[0008] A third bank region may be defined by the third bank opening. The widths of the first sub-region, the third sub-region, and the third bank region in the first direction may be substantially the same.
[0009] The first bank region, the second bank region, and the third bank region may be sequentially arranged along the first direction. The first sub-region and the third sub-region may be separated by a first separation interval along the first direction, and the third sub-region and the third bank region may be separated by a second separation interval along the first direction. The first separation interval and the second separation interval may be substantially the same.
[0010] The color filter layer may further include a second color filter disposed in a second filter region separated from the first filter region, and a third color filter disposed in a third filter region separated from the first filter region and the second filter region.
[0011] The second filter region may overlap the third sub-region and may overlap a part of the fourth sub-region. The width of the second filter region in the first direction may be equal to or less than the third width, and the length of the second filter region in the second direction may be equal to or greater than the second length.
[0012] The widths of the first filter region, the second filter region, and the third filter region in the first direction may be substantially the same. The length of the first filter region in the second direction may be greater than the length of the second filter region in the second direction. The length of the second filter region in the second direction may be greater than the length of the third filter region in the second direction.
[0013] The second length may be shorter than the first length.
[0014] The third bank region may be defined by the third bank opening. The third bank region may have a rectangular shape on a plane.
[0015] The length of the third bank region in the second direction may be shorter than the lengths of the first bank region and the second bank region in the second direction.
[0016] The first light control pattern may include a first quantum dot that converts the source light into light of the first wavelength. The second light control pattern may include a second quantum dot that converts the source light into light of the second wavelength.
[0017] The second light control pattern may include a photosensitive resin.
[0018] The display panel according to an embodiment of the present invention may further include a circuit element layer including a pixel circuit electrically connected to the light emitting element. The light emitting element may include a first electrode disposed on the circuit element layer, an intermediate layer disposed on the first electrode and including a light emitting layer, and a second electrode disposed on the intermediate layer. The display element may be disposed on the circuit element layer and may further include an auxiliary electrode electrically connected to the second electrode. At least a part of the connection region where the auxiliary electrode is disposed may overlap with the second sub-region in a plane.
[0019] The first sub-region may extend along the second direction and include a first-1 side and a first-2 side spaced apart from each other along the first direction. The second sub-region may extend along the second direction and include a second-1 side and a second-2 side spaced apart from each other along the first direction. The first-2 side and the second-2 side may be aligned side by side along the second direction.
[0020] The second sub-region may include a first chamfered portion that is drawn into the inside of the second sub-region by the 2-1 side.
[0021] The first filter region may include a first sub-filter region overlapping the first sub-region and a second sub-filter region overlapping the second sub-region. The width of the second sub-filter region in the first direction may be larger than the width of the first sub-filter region in the first direction.
[0022] The display element layer may be divided into a display area where the light-emitting element is disposed and a non-display area surrounding at least a part of the display area. The first bank area may include a first-1 bank area disposed in the display area and a first-2 bank area disposed in the non-display area.
[0023] A display panel according to an embodiment of the present invention includes a light-emitting element that outputs source light, and an optical structure layer disposed on the light-emitting element and configured to transmit the source light or convert the source light into light of another wavelength. The optical structure layer includes a bank disposed on the light-emitting element and defining a first bank opening, a second bank opening, and a third bank opening, a first light control pattern disposed in the first bank opening, a second light control pattern disposed in the second bank opening, a third light control pattern disposed in the third bank opening, a light control layer including the third light control pattern, a first color filter disposed on the light control layer and overlapping the first light control pattern, a second color filter disposed on the light control layer and overlapping the second light control pattern, and a third color filter disposed on the light control layer and overlapping the third light control pattern. The first bank area defined by the first bank opening includes a first sub-area having a first width along a first direction and a second sub-area having a second width along the first direction. The second bank area defined by the second bank opening includes a third sub-area having a third width along the first direction and a fourth sub-area having a fourth width along the first direction. The second width is greater than the first width, and the fourth width is greater than the third width. The third bank area is defined by the third bank opening. The widths of the first sub-area, the third sub-area, and the third bank area in the first direction are substantially the same.
[0024] A method for manufacturing a display panel according to an embodiment of the present invention may include a step of preparing a display element layer including a light-emitting element that outputs source light, and a step of forming an optical structure on the light-emitting element. The step of forming the optical structure may include a step of forming a bank in which a first bank opening, a second bank opening, and a third bank opening are formed on the light-emitting element, a step of patterning a photoresist material in the third bank opening to form a third light control pattern, and a step of forming a first light control pattern and a second light control pattern by an inkjet process in the first bank opening and the second bank opening, respectively. The first bank region defined by the first bank opening includes a first sub-region having a first width along a first direction and a second sub-region having a second width along the first direction. The second bank region defined by the second bank opening includes a third sub-region having a third width along the first direction and a fourth sub-region having a fourth width along the first direction. The second width is greater than the first width, and the fourth width is greater than the third width.
Effects of the Invention
[0025] According to an embodiment of the present invention, by including sub-regions corresponding to pixel regions having a small width in the bank opening region provided in the light control layer, high resolution can be achieved while other sub-regions in the bank opening region are formed to have a wide width for the inkjet process, ensuring the landing region of the inkjet process and improving the process efficiency of the display panel manufacturing process.
Brief Description of the Drawings
[0026]
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Embodiments for Carrying Out the Invention
[0027] Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0028] In this specification, when a certain component (or region, layer, part, etc.) is referred to as being "on", "coupled to", or "bonded to" another component, it means that it is directly connected or bonded onto the other component, or a third component is disposed therebetween.
[0029] The same reference numerals refer to the same components. Also, in the drawings, the thickness, ratio, and dimensions of the components are exaggerated for an effective explanation of the technical content. "And / or" includes all combinations of one or more of the related configurations defined.
[0030] Terms such as first, second, etc. may be used to describe various components, and the above components are not limited to the above terms. The above terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may also be named the first component. A singular surface includes plural expressions unless the context clearly indicates otherwise.
[0031] Also, terms such as "below", "downward", "above", "upward", etc. are used to explain the relationship of the configurations shown in the drawings. The above terms are relative concepts and are explained based on the directions shown in the drawings.
[0032] Terms such as "comprising" or "having" are intended to identify that there are features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and should not be construed as precluding the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.
[0033] As used herein, "directly disposed" may mean that there are no additional layers, films, regions, plates, etc. added between parts such as layers, films, regions, plates, etc. and other parts. For example, "directly disposed" may mean disposed without using additional members such as adhesive members between two layers or two members.
[0034] Unless otherwise defined, all terms (including technical and scientific terms) used herein shall have the same meaning as commonly understood by one of ordinary skill in the technical field to which the present invention pertains. Also, terms that are the same as those defined in commonly used dictionaries shall be construed to have a meaning consistent with the meaning they have in the context of the relevant art, and should not be construed in an overly ideal or formal sense unless explicitly defined herein.
[0035] Hereinafter, with reference to the drawings, a display panel and a method for manufacturing a display panel according to an embodiment of the present invention will be described.
[0036] FIG. 1a is a perspective view of a display panel according to an embodiment of the present invention. FIG. 1b is a cross-sectional view of a display panel according to an embodiment of the present invention. FIG. 1c is a plan view of a display panel according to an embodiment of the present invention.
[0037] As shown in FIG. 1a, the display panel DP may display an image via the display surface DP-IS. The display surface DP-IS is parallel to the plane defined by the first direction axis DR1 and the second direction axis DR2. The display surface DP-IS may include a display area DA and a non-display area NDA. Pixels PX are arranged in the display area DA, and no pixels PX are arranged in the non-display area NDA. The non-display area NDA is defined along the edge of the display surface DP-IS. The non-display area NDA may surround the display area DA. However, the present invention is not limited thereto. In one embodiment of the present invention, the non-display area NDA may be omitted or arranged only on one side of the display area DA.
[0038] The normal direction of the display surface DP-IS, that is, the thickness direction of the display panel DP, is indicated by the third direction axis DR3. The front (or top) and back (or bottom) of each layer or unit described below are distinguished by the third direction DR3. However, the first to third direction DR1, DR2, DR3 illustrated in this embodiment are merely examples.
[0039] In one embodiment of the present invention, a display panel DP having a flat display surface DP-IS is shown, but the present invention is not limited thereto. The display panel DP may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface may include a plurality of display areas indicating different directions from each other.
[0040] As shown in FIG. 1b, the display panel DP includes a base substrate BS, a circuit element layer DP-CL, a display element layer DP-LED, and an optical structure layer OSL. The base substrate BS may include a synthetic resin substrate or a glass substrate. The circuit element layer DP-CL includes at least one insulating layer and circuit elements. The circuit elements include signal lines, pixel driving circuits, etc. The circuit element layer DP-CL may be formed by a process of forming insulating layers, semiconductor layers, and conductive layers by coating, vapor deposition, etc. and a patterning process of insulating layers, semiconductor layers, and conductive layers by photolithography. The display element layer DP-LED includes at least display elements. The optical structure layer OSL may convert the color of light provided from the display elements. The optical structure layer OSL may include a light control pattern and a structure for increasing the light conversion efficiency.
[0041] FIG. 1c shows the planar arrangement relationship of signal lines GL1 to GLn, DL1 to DLm, and pixels PX11 to PXnm. The signal lines GL1 to GLn, DL1 to DLm may include a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm.
[0042] Each of the pixels PX11 to PXnm is connected to a corresponding gate line among the plurality of gate lines GL1 to GLn and a corresponding data line among the plurality of data lines DL1 to DLm. Each of the pixels PX11 to PXnm may include a pixel driving circuit and a display element. More types of signal lines may be provided in the display panel DP depending on the configuration of the pixel driving circuits of the pixels PX11 to PXnm.
[0043] The gate driving circuit GDC may be integrated into the display panel DP by an OSG (oxide silicon gate driver circuit) or ASG (amorphous silicon gate driver circuit) process.
[0044] FIG. 2 is an enlarged plan view of a part of the display panel according to an embodiment of the present invention. FIG. 3 is a cross-sectional view of a part of the display panel according to an embodiment of the present invention. FIGS. 4a to 4d are cross-sectional views of a part of the display panel according to an embodiment of the present invention. In FIG. 3, a cross-section corresponding to the cutting line I-I' shown in FIG. 2 is shown. In FIGS. 4a to 4d, cross-sections corresponding to the cutting line II-II' shown in FIG. 2 are shown.
[0045] In FIG. 2, in the display panel DP (see FIG. 1a) of one embodiment, the arrangement relationship of a plurality of pixel regions arranged in the display region DA is shown. In one embodiment of the present invention, the light-emitting regions PXA-R, PXA-G, and PXA-B shown in FIG. 2 may be repeatedly arranged throughout the display region DA (see FIG. 1a).
[0046] Referring to FIG. 2, a peripheral region NPXA is arranged around the first to third pixel regions PXA-R, PXA-G, and PXA-B. The peripheral region NPXA sets the boundaries of the first to third pixel regions PXA-R, PXA-G, and PXA-B. The peripheral region NPXA may surround the first to third pixel regions PXA-R, PXA-G, and PXA-B.
[0047] On the other hand, the first to third pixel regions PXA-R, PXA-G, and PXA-B may correspond to the first to third filter regions FA1, FA2, and FA3. Each of the first to third filter regions FA1, FA2, and FA3 may be a region defined by a color filter described later.
[0048] In the peripheral region NPXA, a structure for preventing color mixing between the first to third pixel regions PXA-R, PXA-G, and PXA-B, for example, a pixel definition film PDL (see FIG. 3) or a bank BMP (see FIG. 3), etc., may be arranged. In the peripheral region NPXA, two or more of the color filters described later may be superimposed and arranged.
[0049] As shown in FIG. 2, each of the first to third pixel regions PXA-R, PXA-G, and PXA-B may have a rectangular shape. Each of the first to third pixel regions PXA-R, PXA-G, and PXA-B may have a rectangular shape having a short side extending along a first direction DR1 and a long side extending along a second direction DR2. The areas of the first to third pixel regions PXA-R, PXA-G, and PXA-B are set according to the emitted color. It is also possible that among the primary colors, the area of the pixel region that emits red light is the largest and the area of the pixel region that emits blue light is the smallest. That is, the area of the first pixel region PXA-R that emits red light may be the largest, and the area of the third pixel region PXA-B that emits blue light may be the smallest.
[0050] Although FIG. 2 shows the first to third pixel regions PXA-R, PXA-G, and PXA-B having a rectangular shape, it is not limited to this. On a plane, some of the first to third pixel regions PXA-R, PXA-G, and PXA-B may have other polygonal shapes (including substantially polygonal shapes). In one embodiment, the first to third pixel regions PXA-R, PXA-G, and PXA-B may have a rectangle (substantially rectangular) with rounded corners on the plane.
[0051] One of the first to third pixel regions PXA-R, PXA-G, and PXA-B may provide red light, another one may provide blue light, and the remaining one may provide green light. In this embodiment, the first pixel region PXA-R may provide red light, the second pixel region PXA-G may provide green light, and the third pixel region PXA-B may provide blue light. On the other hand, the first pixel region PXA-R may emit light with an emission wavelength of 620 nm or more and 700 nm or less, the second pixel region PXA-G may emit light with an emission wavelength of 520 nm or more and 600 nm or less, and the third pixel region PXA-B may emit light with an emission wavelength of 410 nm or more and 480 nm or less.
[0052] Although not shown, a bank well region may be defined in the display area DA. The bank well region may be a region where a bank well is formed to prevent defects due to misalignment in the process of printing a part of a plurality of light control patterns CCP-R, CCP-G, and CCP-B (see FIG. 4a) included in the light control layer CCL (see FIG. 4a). That is, the bank well region may be a region where a bank well is defined by removing a part of the bank BWP (see FIG. 4a).
[0053] Referring to FIG. 3, a display panel DP according to an embodiment may include a base substrate BS, a circuit element layer DP-CL disposed on the base substrate BS, and a display element layer DP-LED disposed on the circuit element layer DP-CL. In this specification, the base substrate BS, the circuit element layer DP-CL, and the display element layer DP-LED may be collectively referred to as a lower panel.
[0054] The base substrate BS may be a member that provides a reference plane on which the components included in the circuit element layer DP-CL are disposed. In one embodiment, the base substrate BS may be a glass substrate, a metal substrate, a polymer substrate, or the like. However, the embodiment is not limited thereto, and the base substrate BS may be an inorganic layer, a functional layer, or a composite material layer.
[0055] The base substrate BS may have a multilayer structure. For example, the base substrate BS may have a three-layer structure of a polymer resin layer, an adhesive layer, and a polymer resin layer. In particular, the polymer resin layer may include a polyimide-based resin. Also, the polymer resin layer may include at least one of an acrylic-based resin, a methacrylic-based resin, a polyisoprene-based resin, a vinyl-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. On the other hand, in this specification, the "α-based" resin means one containing a functional group of "α".
[0056] The circuit element layer DP-CL may be disposed on the base substrate BS. The circuit element layer DP-CL may include a transistor T-D as a circuit element. The configuration of the circuit element layer DP-CL may vary by designing the drive circuit of the pixel PX (see FIG. 1a), but FIG. 3 exemplarily shows one transistor T-D. The arrangement relationship of the active A-D, source S-D, drain D-D, and gate G-D that constitute the transistor T-D is exemplarily shown. The active A-D, source S-D, and drain D-D may be regions defined by the doping concentration or conductivity of the semiconductor pattern.
[0057] The circuit element layer DP-CL may include a lower buffer layer BRL disposed on the base substrate BS, a first insulating layer 10, a second insulating layer 20, and a third insulating layer 30. For example, the lower buffer layer BRL, the first insulating layer 10, and the second insulating layer 20 may be inorganic layers, and the third insulating layer 30 may be an organic layer.
[0058] The display element layer DP-LED may include a light-emitting element LED as a display element. The light-emitting element LED may generate source light. In one embodiment, the source light may be white light or blue light. In this embodiment, the display element layer DP-LED may include an organic light-emitting diode as a light-emitting element. That is, the light-emitting layer EML included in the light-emitting element LED may include an organic light-emitting substance as a light-emitting substance.
[0059] The light-emitting element LED includes a first electrode EL1, a second electrode EL2, and a light-emitting layer EML disposed therebetween. In the present embodiment, the display element layer DP-LED may include an organic light-emitting diode as the light-emitting element. In one embodiment of the present invention, the light-emitting element may include a quantum dot light-emitting diode. That is, the light-emitting layer EML included in the light-emitting element LED may include an organic light-emitting substance as the light-emitting substance, or the light-emitting layer EML may include quantum dots as the light-emitting substance. Alternatively, in the present embodiment, the display element layer DP-LED may include a super-small light-emitting element described later as the light-emitting element. The super-small light-emitting element includes, for example, a micro LED element and / or a nano LED element. The super-small light-emitting element may have a micro or nano-scale size and may be a light-emitting element including an active layer disposed between a plurality of semiconductor layers.
[0060] The first electrode EL1 is disposed on the third insulating layer 30. The first electrode EL1 may be directly or indirectly connected to the transistor T-D. In FIG. 3, the connection structure between the first electrode EL1 and the transistor T-D is not shown.
[0061] The display element layer DP-LED includes a pixel definition film PDL. For example, the pixel definition film PDL may be an organic layer. A light-emitting opening OH is defined in the pixel definition film PDL. The light-emitting opening OH of the pixel definition film PDL exposes at least a part of the first electrode EL1. In the present embodiment, a first light-emitting region EA1 may be defined by the light-emitting opening OH.
[0062] The hole control layer HTR, the light-emitting layer EML, and the electron control layer ETR overlap at least the first pixel region PXA-R. The hole control layer HTR, the light-emitting layer EML, the electron control layer ETR, and the second electrode EL2 may each be commonly disposed in the first to third pixel regions PXA-R, PXA-G, PXA-B (see FIG. 4a). The hole control layer HTR, the light-emitting layer EML, the electron control layer ETR, and the second electrode EL2 that overlap the first to third pixel regions PXA-R, PXA-G, PXA-B (see FIG. 4a) may each have an integral shape. However, without being limited thereto, at least one of the hole control layer HTR, the light-emitting layer EML, and the electron control layer ETR may be separately formed for each of the first to third pixel regions PXA-R, PXA-G, PXA-B (see FIG. 4a). In one embodiment, the light-emitting layer EML may be patterned within the light-emitting aperture OH and may be separately formed for each of the first to third pixel regions PXA-R, PXA-G, PXA-B (see FIG. 4a).
[0063] The hole control layer HTR includes a hole transport layer and may further include a hole injection layer.
[0064] The light-emitting layer EML may generate the third light which is the source light. The light-emitting layer EML may generate blue light. The blue light may include light having a wavelength from 410 nm to 480 nm. The emission spectrum of the blue light may have a maximum peak in the wavelength range from 440 nm to 460 nm.
[0065] The electron control layer ETR includes an electron transport layer and may further include an electron injection layer.
[0066] It is indicated that the element layer DP-LED may include a thin film encapsulation layer TFE that protects the second electrode EL2. The thin film encapsulation layer TFE may contain an organic substance or an inorganic substance. The thin film encapsulation layer TFE has a multilayer structure in which an inorganic layer / organic layer is repeated. In this embodiment, the thin film encapsulation layer TFE may include a first encapsulation inorganic layer IOL1 / encapsulation organic layer OL / second encapsulation inorganic layer IOL2. The first and second encapsulation inorganic layers IOL1 / IOL2 protect the light emitting element LED from external moisture, and the encapsulation organic layer OL can prevent the indentation defect of the light emitting element LED caused by foreign matter flowing in during the manufacturing process. Although not shown, the display panel DP may further include a refractive index control layer for improving the light extraction efficiency on the upper side of the thin film encapsulation layer TFE.
[0067] As shown in FIG. 3, an optical structure layer OSL may be disposed on the thin film encapsulation layer TFE. The optical structure layer OSL may include a light control layer CCL, a low refractive index layer LR, a color filter layer CFL, and a base layer BL. In this specification, the optical structure layer OSL may be referred to as an upper panel.
[0068] The light control layer CCL may be disposed on the display element layer DP-LED including the light emitting element LED. The light control layer CCL may include a bank, a first light control pattern CCP-R, and a first barrier layer CAP1.
[0069] The bank BMP may include a base resin and an additive. The base resin BR can generally be composed of various resin compositions called binders. The additive may include a coupling agent and / or a photoinitiator. The additive may further include a dispersant.
[0070] The bank BMP may include a black coloring agent to block light. The bank BMP may include a black dye or a black pigment mixed in the base resin. In one embodiment, the black component may include carbon black, a metal such as chromium, or oxides thereof.
[0071] Bank BMP may include a first bank opening BOH1 corresponding to the light-emitting opening OH. On a plane, the first bank opening BOH1 overlaps the light-emitting opening OH and has an area larger than that of the light-emitting opening OH. That is, the first bank opening BOH1 may have an area larger than that of the first light-emitting region EA1 defined by the light-emitting opening OH. On the other hand, in this specification, "corresponding" means that two components overlap when viewed from the thickness direction DR3 of the display panel DP, and they do not necessarily have the same area.
[0072] A first light control pattern CCP-R may be disposed inside the first bank opening BOH1. The first light control pattern CCP-R may change the optical properties of the source light.
[0073] The first light control pattern CCP-R may include quantum dots for changing the optical properties of the source light. The first light control pattern CCP-R may include first quantum dots for converting the source light into light of other wavelengths. In the first light control pattern CCP-R that overlaps the first pixel region PXA-R, the first quantum dots may convert the source light into red light.
[0074] In this specification, "quantum dots" means crystals of semiconductor compounds. Quantum dots may emit light of various emission wavelengths depending on the crystal size. Quantum dots may emit light of various emission wavelengths by adjusting the elemental ratio in the above quantum dot compounds.
[0075] The diameter of the above quantum dots may be, for example, about 1 nm to 10 nm.
[0076] The above quantum dots may be synthesized by a wet chemical process, a metalorganic chemical vapor deposition process, a molecular beam epitaxy process, or a process similar thereto.
[0077] The above wet chemical process is a method of growing particle crystals of quantum dots after mixing an organic solvent and a precursor substance. When the above crystals grow, the organic solvent may act as a dispersant that is naturally coordinated to the surface of the quantum dot crystals to regulate the growth of the crystals. Therefore, the wet chemical process is easier than vapor deposition methods such as metal organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE), and the growth of quantum dot particles can be controlled by a low-cost process.
[0078] The core of the quantum dot may be selected from group II-VI compounds, group III-V compounds, group III-VI compounds, group II-IV-V compounds, group I-III-VI compounds, group IV-VI compounds, group IV elements, group IV compounds, and combinations thereof.
[0079] The II-VI compounds may be selected from the group consisting of binary compounds selected from the group consisting of CdSe, CdTe, CdS, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS, and mixtures thereof, ternary compounds selected from the group consisting of CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HeZnSe, HeZnTe, MgZnSe, MgZnS, and mixtures thereof, and quaternary compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe, and mixtures thereof. On the other hand, the II-VI compounds may further contain Group I metals and / or Group IV elements. The I-II-VI compounds may be selected from CuSnS or CuZnS, and the II-IV-VI compounds may be selected from ZnSnS or the like. The I-II-IV-VI compounds may be selected from quaternary compounds selected from the group consisting of Cu2ZnSnS2, Cu2ZnSnS4, Cu2ZnSnSe4, Ag2ZnSnS2, and mixtures thereof.
[0080] The III-VI compounds may include binary compounds such as In2S3, In2Se3, etc., ternary compounds such as InGaS3, InGaSe3, etc., or any combination thereof.
[0081] The I-III-VI compounds may be selected from ternary compounds selected from the group consisting of AgInS, AgInS2, CuInS, CuInS2, AgGaS2, CuGaS2, CuGaO2, AgGaO2, AgAlO2, and mixtures thereof, or quaternary compounds such as AgInGaS2, CuInGaS2, etc.
[0082] The group-III-V compounds may be selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof, ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InAlP, InNP, InNAs, InNSb, InPAs, InPSb, and mixtures thereof, and quaternary compounds selected from the group consisting of GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof. On the other hand, the group-III-V compounds may further contain group-II metals. For example, InZnP etc. may be selected as the group-III-II-V compounds.
[0083] The group-IV-VI compounds may be selected from the group consisting of binary compounds selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof, ternary compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof, and quaternary compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof.
[0084] Examples of the group-II-IV-V compounds may be ternary compounds selected from the group consisting of ZnSnP, ZnSnP2, ZnSnAs2, ZnGeP2, ZnGeAs2, CdSnP2, and CdGeP2, and mixtures thereof.
[0085] The group-IV elements may be selected from the group consisting of Si, Ge, and mixtures thereof. The group-IV compounds may be binary compounds selected from the group consisting of SiC, SiGe, and mixtures thereof.
[0086] Each element contained in the multi-element compounds such as the above binary compounds, ternary compounds, and quaternary compounds may be present in the particles at a uniform concentration or a non-uniform concentration. That is, the above chemical formula means the types of elements contained in the compound, and the element ratios within the compound may be different. For example, AgInGaS2 may mean AgIn x Ga 1-x S2 (X is a real number between 0 and 1).
[0087] At this time, the binary compound, ternary compound, or quaternary compound may be present in the particles at a uniform concentration or may be divided into a state where the concentration distributions are partially different and present in the same particle. Also, one quantum dot may have a core / shell structure surrounding another quantum dot. In the core / shell structure, there may be a concentration gradient where the concentration of the elements present in the shell decreases towards the core.
[0088] In some embodiments, the quantum dot may have a core-shell structure including a core containing the above-described nanocrystal and a shell surrounding the core. The shell of the above quantum dot may serve as a protective layer for preventing chemical modification of the core and maintaining semiconductor properties, and / or as a charging layer for imparting electrophoretic properties to the quantum dot. The shell may be a single layer or a multilayer. Examples of the shell of the above quantum dot include metal or non-metal oxides, semiconductor compounds, or combinations thereof.
[0089] For example, the above metal or non-metal oxides include binary compounds such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, NiO, or ternary compounds such as MgAl2O4, CoFe2O4, NiFe2O4, CoMn2O4, etc., but the present invention is not limited thereto.
[0090] In addition, examples of the semiconductor compound include, but are not limited to, CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, and AlSb.
[0091] The quantum dots have a full width of half maximum (FWHM) of the emission wavelength spectrum of about 45 nm or less, preferably about 40 nm or less, and more preferably about 30 nm or less. In this range, color purity and color reproducibility can be improved. Further, since the light emitted through such quantum dots is emitted in all directions, the light viewing angle can be improved.
[0092] Also, the form of the quantum dots is not particularly limited as long as it is a form generally used in the art. More specifically, forms such as spherical, pyramid-shaped, multi-arm-shaped, cubic nanoparticles, nanotubes, nanowires, nanofibers, and nanoplates may be used.
[0093] Since the energy band gap can be adjusted by adjusting the size of the quantum dots or the element ratio in the quantum dot compound, light in various wavelength bands can be obtained in the quantum dot light-emitting layer. Therefore, by using the above-described quantum dots (either using quantum dots of different sizes or having different element ratios in the quantum dot compound), a light-emitting device that emits light of various wavelengths can be realized. Specifically, the adjustment of the size of the above-described quantum dots and the element ratio in the quantum dot compound may be selected so that red, green, and / or blue light is emitted. Further, the above-described quantum dots may be configured to emit white light by combining light of various colors.
[0094] In one embodiment, the quantum dots included in the first light control pattern CCP-R that overlaps with the first pixel region PXA-R may have a red emission color. The smaller the particle size of the quantum dots, the more likely they are to emit light in the short wavelength region. For example, in quantum dots having the same core, the particle size of the quantum dots that emit green light may be smaller than the particle size of the quantum dots that emit red light. Also, in quantum dots having the same core, the particle size of the quantum dots that emit blue light may be smaller than the particle size of the quantum dots that emit green light. However, the embodiment is not limited thereto, and even for quantum dots having the same core, the particle size may be adjusted by the shell formation material, the shell thickness, etc.
[0095] On the other hand, if the quantum dots have various emission hues such as blue, red, and green, the quantum dots having different emission colors can have different core materials.
[0096] The first light control pattern CCP-R may further include a scatterer. The first light control pattern CCP-R may include one quantum dot that converts blue light into red light and a scatterer that scatters light.
[0097] The scatterer may be an inorganic particle. For example, the scatterer may include at least one of TiO2, ZnO, Al2O3, SiO2, and hollow silica. The scatterer may include at least any one of TiO2, ZnO, Al2O3, SiO2, and hollow silica, or may be a mixture of two or more substances selected from TiO2, ZnO, Al2O3, SiO2, and hollow silica.
[0098] The first light control pattern CCP-R may include a base resin in which the first quantum dots and the scatterers are dispersed. The base resin is a medium in which the first quantum dots and the scatterers are dispersed, and may be composed of various resin compositions generally referred to as binders. For example, the base resin may be an acrylic resin, a urethane resin, a silicon resin, an epoxy resin, or the like. The base resin may be a transparent resin.
[0099] In this embodiment, the first light control pattern CCP-R may be formed by an inkjet process. A liquid composition may be provided within the bank opening BOH. The composition polymerized by a thermosetting process or a photocuring process has a reduced volume after curing.
[0100] The light control layer CCL may include a first barrier layer CAP1 disposed on one surface of the first light control pattern CCP-R. The first barrier layer CAP1 may serve to prevent the penetration of moisture and / or oxygen (hereinafter referred to as "moisture / oxygen") and adjust the refractive index to improve the optical characteristics of the optical structure layer OSL. The first barrier layer CAP1 is disposed on the upper or lower surface of the first light control pattern CCP-R to block the exposure of the first light control pattern CCP-R to moisture / oxygen, and in particular, to block the exposure of the quantum dots contained in the first light control pattern CCP-R to moisture / oxygen. The first barrier layer CAP1 may also serve to protect the first light control pattern CCP-R from external impacts.
[0101] In one embodiment, the first barrier layer CAP1 may be disposed spaced apart from the display element layer DP-LED with the first light control pattern CCP-R therebetween. That is, the first barrier layer CAP1 may be disposed on the upper surface of the first light control pattern CCP-R. In one embodiment, the light control layer CCL may include a second barrier layer CAP2 disposed between the first light control pattern CCP-R and the display element layer DP-LED. The first barrier layer CAP1 covers the upper surface of the first light control pattern CCP-R adjacent to the low refractive index layer LR, and the second barrier layer CAP2 may cover the lower surface of the first light control pattern CCP-R adjacent to the display element layer DP-LED. On the other hand, in this specification, the "upper surface" may be a surface located above with reference to the third direction DR3, and the "lower surface" may be a surface located below with reference to the third direction DR3.
[0102] Also, the first barrier layer CAP1 and the second barrier CAP2 may cover not only the first light control pattern CCP-R but also one surface of the bank BMP.
[0103] The first barrier layer CAP1 may cover one surface of the bank BMP and the first light control pattern CCP-R adjacent to the low refractive index layer LR. The first barrier layer CAP1 may be directly disposed below the low refractive index layer LR. The second barrier layer CAP2 may be directly disposed above the thin film encapsulation layer TFE. The light control layer CCL may be disposed on the display element layer DP-LED and the thin film encapsulation layer TFE with the second barrier layer CAP2 therebetween. The light control patterns CCP-R, CCP-G, and CCP-B of the light control layer CCL may be formed in a continuous process on the second barrier layer CAP2 disposed on the thin film encapsulation layer TFE.
[0104] The first barrier layer CAP1 and the second barrier layer CAP2 can include inorganic substances. In the display panel DP of one embodiment, the first barrier layer CAP1 may include silicon oxynitride (SiON). Both the first barrier layer CAP1 and the second barrier layer CAP2 may include silicon oxynitride. However, without being limited thereto, each of the first barrier layer CAP1 and the second barrier layer CAP2 may include silicon oxide (SiO x ) or silicon nitride (SiN x ). In one embodiment, the first barrier layer CAP1 disposed on top of the first light control pattern CCP-R may include silicon oxynitride, and the second barrier layer CAP2 disposed below the first light control pattern CCP-R may include silicon oxide.
[0105] A color filter layer CFL may be disposed on the light control layer CCL. The color filter layer CFL includes at least one color filter. The color filter transmits light in a specific wavelength range and blocks light outside the corresponding wavelength range. The color filter layer CF1 corresponding to the first pixel region PXA-R can transmit red light and block green and blue light.
[0106] The first color filter CF1 includes a base resin and a dye and / or pigment dispersed in the base resin. The base resin is a medium in which the dye and / or pigment is dispersed and may generally be composed of various resin compositions referred to as binders.
[0107] The first color filter CF1 may have a uniform thickness within the first pixel region PXA-R. The light converted from the source light, which is blue light, to red light by the first light control pattern CCP-R may be provided to the outside with a uniform luminance within the first pixel region PXA-R.
[0108] The optical structure layer OSL may further include a filling layer FML disposed between the light control layer CCL and the color filter layer CFL. In one embodiment, the filling layer FML may fill the space between the light control layer CCL and the color filter layer CFL. The filling layer FML may be disposed directly on the first barrier layer CAP1, and the color filter layer CFL may be disposed directly on the filling layer FML. The lower surface of the filling layer FML may contact the upper surface of the first barrier layer CAP1, and the upper surface of the filling layer FML may contact the lower surfaces of the color filters CF1, CF2, and CF3 of the color filter layer CFL.
[0109] The filling layer FML can function as a buffer between the light control layer CCL and the color filter layer CFL. In one embodiment, the filling layer FML can perform functions such as shock absorption and increase the strength of the display panel DP. The filling layer FML may be composed of a filling resin containing a polymer resin. For example, the filling layer FML may be made of a filling resin containing an acrylic resin or an epoxy resin, etc.
[0110] On the other hand, the filling layer FML may be disposed between the light control layer CCL and the color filter layer CFL and function as an optical functional layer such as increasing the light extraction efficiency or preventing reflected light from entering the light control layer CCL. The filling layer FML may be a layer with a refractive index smaller than that of the adjacent layers.
[0111] In one embodiment, the display panel DP may further include a base layer BL disposed on the color filter layer CFL. The base layer BL may be a member that provides a reference surface on which the color filter layer CFL, the low refractive index layer LR, the light control layer CCL, etc. are disposed. The base layer BL may be a glass substrate, a metal substrate, a plastic substrate, etc. However, the embodiment is not limited thereto, and the base layer BL may be an inorganic layer, an organic layer, or a composite material layer. Also, different from the illustration, in one embodiment, the base layer BL may be omitted.
[0112] Although not shown, an antireflection layer may be disposed on the base layer BL. The antireflection layer may be a layer that reduces the reflectance of external light incident from the outside. The antireflection layer may be a layer that selectively transmits the light emitted from the display panel DP. In one embodiment, the antireflection layer may be a single layer containing a dye and / or pigment dispersed in a base resin. The antireflection layer may be provided as a single continuous layer that entirely overlaps the entire first to third pixel regions PXA-R, PXA-G, PXA-B (see FIG. 4a).
[0113] The antireflection layer may not include a polarizing layer. Thereby, the light incident on the display element layer DP-LED side passing through the antireflection layer may be unchanged light. The display element layer DP-LED may receive non-polarized light from above the antireflection layer.
[0114] Referring to FIG. 4a, the display panel DP may include a base substrate BS and a circuit element layer DP-CL disposed on the base substrate BS. The circuit element layer DP-CL may be disposed on the base substrate BS. The circuit element layer DP-CL may include an insulating layer, a semiconductor pattern, a conductive pattern, a signal line, and the like. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base substrate BS by methods such as coating and vapor deposition, and then the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by a plurality of photolithography processes. Next, the semiconductor pattern, the conductive pattern, and the signal line included in the circuit element layer DP-CL may be formed. In one embodiment, the circuit element layer DP-CL may include a transistor, a buffer layer, and a plurality of insulating layers.
[0115] According to one embodiment, the light-emitting element LED may include a first electrode EL1, a second electrode EL2 facing the first electrode EL1, and a light-emitting layer EML disposed between the first electrode EL1 and the second electrode EL2. The light-emitting layer EML included in the light-emitting element LED may include an organic light-emitting substance as a light-emitting substance or may include quantum dots. The light-emitting element LED may further include a hole control layer HTR and an electron control layer ETR. On the other hand, although not shown, the light-emitting element LED may further include a capping layer (not shown) disposed on the upper portion of the second electrode EL2.
[0116] The pixel definition film PDL may be disposed on the circuit element layer DP-CL and cover a part of the first electrode EL1. A light-emitting opening OH is defined in the pixel definition film PDL. The light-emitting opening OH of the pixel definition film PDL exposes at least a part of the first electrode EL1. In the present embodiment, the light-emitting regions EA1, EA2, and EA3 are defined to correspond to a partial region of the first electrode EL1 exposed by the light-emitting opening OH.
[0117] The display element layer DP-LED may include a first light-emitting region EA1, a second light-emitting region EA2, and a third light-emitting region EA3. The first light-emitting region EA1, the second light-emitting region EA2, and the third light-emitting region EA3 may be regions defined by the pixel definition film PDL. The first light-emitting region EA1, the second light-emitting region EA2, and the third light-emitting region EA3 may respectively correspond to the first light-emitting region PXA-R, the second light-emitting region PXA-G, and the third light-emitting region PXA-B.
[0118] The light-emitting regions EA1, EA2, and EA3 may overlap with the pixel regions PXA-R, PXA-G, and PXA-B. When viewed from above, the areas of the pixel regions PXA-R, PXA-G, and PXA-B defined by the color filters CF1, CF2, and CF3 may be substantially the same as the areas of the light-emitting regions EA1, EA2, and EA3 defined by the pixel definition film PDL.
[0119] In the light-emitting element LED, the first electrode EL1 is disposed on the circuit element layer DP-CL. The first electrode EL1 may be an anode or a cathode. Further, the first electrode EL1 may be a pixel electrode. The first electrode EL1 may be a transmissive electrode, a semi-transmissive electrode, or a reflective electrode.
[0120] The hole control layer HTR may be disposed between the first electrode EL1 and the light-emitting layer EML. The hole control layer HTR may include at least one of a hole injection layer, a hole transport layer, and an electron blocking layer. The hole control layer HTR may be disposed as a common layer so as to overlap the entire light-emitting regions EA1, EA2, EA3 and the pixel definition film PDL that divides the light-emitting regions EA1, EA2, EA3. However, the embodiment is not limited thereto, and the hole control layer HTR may be provided in a patterned manner so as to be separately disposed corresponding to each of the light-emitting regions EA1, EA2, EA3.
[0121] The light-emitting layer EML is disposed on the hole control layer HRT. In one embodiment, the light-emitting layer EML may be provided as a common layer so as to overlap the entire light-emitting regions EA1, EA2, EA3 and the pixel definition film PDL that divides the light-emitting regions EA1, EA2, EA3. In one embodiment, the light-emitting layer EML may emit blue light. The light-emitting layer EML may overlap the entire hole control layer HTR and the electron control layer ETR.
[0122] However, the embodiment is not limited thereto. In one embodiment, the light-emitting layer EML may be disposed in the light-emitting opening OH. That is, the light-emitting layer EML may be separately formed corresponding to the light-emitting regions EA1, EA2, EA3 partitioned by the pixel definition film PDL. The light-emitting layer EML separately formed corresponding to the light-emitting regions EA1, EA2, EA3 may all emit blue light or may emit light in different wavelength regions from each other.
[0123] The light-emitting layer EML may have a single-layer structure composed of a single substance, a single-layer structure composed of a plurality of different substances, or a multilayer structure composed of a plurality of layers of different substances. The light-emitting layer EML may contain a fluorescent or phosphorescent substance. In a light-emitting device according to an embodiment, the light-emitting layer EML may contain an organic light-emitting material, a metal-organic complex, or a quantum dot as a light-emitting material. On the other hand, although FIGS. 3 and 4a exemplarily show a light-emitting device LED including one light-emitting layer EML, in one embodiment, the light-emitting device LED may include a plurality of light-emitting stacks each including at least one light-emitting layer.
[0124] FIG. 5 is a cross-sectional view of a light-emitting device according to an embodiment of the present invention. In FIG. 5, different from the light-emitting device of the embodiment shown in FIGS. 3 and 4a, a light-emitting device LED including a plurality of light-emitting stacks ST1, ST2, ST3, ST4 is exemplarily shown as an example.
[0125] Referring to FIG. 5, a light-emitting device LED according to an embodiment may include a first electrode EL1, a second electrode EL2 facing the first electrode EL1, and a plurality of first to fourth light-emitting stacks ST1, ST2, ST3, ST4 disposed between the first electrode EL1 and the second electrode EL2. On the other hand, although FIG. 5 exemplarily shows that the light-emitting device LED includes four light-emitting stacks, the number of light-emitting stacks included in the light-emitting device LED may be smaller or larger than this.
[0126] The light-emitting device LED may include first to third charge generation layers CGL1, CGL2, CGL3 disposed between the first to fourth light-emitting stacks ST1, ST2, ST3, ST4.
[0127] Each of the first to third charge generation layers CGL1, CGL2, and CGL3 may generate charges (electrons and holes) by forming a complex through an oxidation-reduction reaction when a voltage is applied. Next, the first to third charge generation layers CGL1, CGL2, and CGL3 may respectively provide the generated charges to the adjacent stacks ST1, ST2, ST3, and ST4. The first to third charge generation layers CGL1, CGL2, and CGL3 may double the efficiency of the current generated from the adjacent stacks ST1, ST2, ST3, and ST4 and may play a role in adjusting the charge balance between the adjacent stacks ST1, ST2, ST3, and ST4.
[0128] Each of the first to third charge generation layers CGL1, CGL2, and CGL3 may include an n-type layer and a p-type layer. The first to third charge generation layers CGL1, CGL2, and CGL3 may have a structure in which the n-type layer and the p-type layer are joined to each other. However, not limited thereto, the first to third charge generation layers CGL1, CGL2, and CGL3 may include only one of the n-type layer and the p-type layer. The n-type layer may be a charge generation layer that provides electrons to an adjacent stack. The n-type layer may be a layer in which an n-dopant is doped into a base material. The p-type layer may be a charge generation layer that provides holes to an adjacent stack.
[0129] In one embodiment, the thickness of each of the first to third charge generation layers CGL1, CGL2, and CGL3 may be 0.1 nm or more and 15 nm or less. The concentration of the n-dopant doped into the first to third charge generation layers CGL1, CGL2, and CGL3 is 0.1% or more and 3% or less, but may be 1% or less in detail. If the concentration is less than 0.1%, the effects of the first to third charge generation layers CGL1, CGL2, and CGL3 that adjust the charge balance may hardly occur. If the concentration is greater than 3%, the light efficiency of the light-emitting device LED may be reduced.
[0130] Each of the first to third charge generation layers CGL1, CGL2, and CGL3 may contain a charge generation compound composed of an organic compound of an arylamine-based substance, a metal, a metal oxide, a carbide, a fluoride, or a mixture thereof. For example, the arylamine-based organic compound may include α-NPD, 2-TNATA, TDATA, MTDATA, spiro-TAD, or spiro-NPB. The metal may include cesium (Cs), molybdenum (Mo), vanadium (V), titanium (Ti), tungsten (W), barium (Ba), or lithium (Li). The metal oxides, carbides, and fluorides may include Re2O7, MoO3, V2O5, WO3, TiO2, Cs2CO3, BaF, LiF, or CsF. However, the substances of the first to third charge generation layers CGL1, CGL2, and CGL3 are not limited to the above examples.
[0131] Each of the first to fourth light-emitting stacks ST1, ST2, ST3, and ST4 may include a light-emitting layer. The first light-emitting stack ST1 includes the first light-emitting layer BEML1, the second light-emitting stack ST2 includes the second light-emitting layer BEML2, the third light-emitting stack ST3 includes the third light-emitting layer BEML3, and the fourth light-emitting stack ST4 may include the fourth light-emitting layer GEML. Some of the light-emitting layers included in the first to fourth light-emitting stacks ST1, ST2, ST3, and ST4 may emit substantially the same color light, or some may emit different color lights from each other.
[0132] In one embodiment, the first to third light-emitting layers BEML1, BEML2, and BEML3 of the first to third light-emitting stacks ST1, ST2, and ST3 may emit substantially the same first color light. For example, the first color light may be blue light, which is the source light described above. The wavelength range of the light emitted by the first to third light-emitting layers BEML1, BEML2, and BEML3 may be about 420 nm or more and 480 nm or less.
[0133] The fourth light-emitting layer GEML of the fourth light-emitting stack ST4 may emit a second color light different from the first color light. For example, the second color light may be green light. The wavelength range of the light emitted by the fourth light-emitting layer GEML may be from about 520 nm to 600 nm.
[0134] The light-emitting element LED may emit light in the direction from the first electrode EL1 to the second electrode EL2. In the light-emitting element LED of one embodiment, each of the plurality of stacks ST1, ST2, ST3, and ST4 may include a hole transport region HTR1, HTR2, HTR3, HTR4 and an electron transport region ETR1, ETR2, ETR3, ETR4. The hole transport regions HTR1, HTR2, HTR3, and HTR4 may transmit holes provided from the first power source EL1 or the charge generation layers CGL1, CGL2, and CGL3 to the light-emitting layer. The electron transport regions ETR1, ETR2, ETR3, and ETR4 may transmit electrons provided from the second power source EL2 or the charge generation layers CGL1, CGL2, and CGL3 to the light-emitting layer.
[0135] In the light-emitting element LED of one embodiment, based on the direction in which light is emitted, the hole transport regions HTR1, HTR2, HTR3, and HTR4 are disposed below the light-emitting layers BEML1, BEML2, BEML3, and GEML included in the plurality of stacks ST1, ST2, ST3, and ST4, and the electron transport regions ETR1, ETR2, ETR3, and ETR4 are disposed above the light-emitting layers BEML1, BEML2, BEML3, and GEML included in the plurality of stacks ST1, ST2, ST3, and ST4, which exemplarily shows the structure. That is, the light-emitting element LED of one embodiment may have a forward element structure. However, the present invention is not limited thereto. The light-emitting element LED of one embodiment may have an inverted element structure in which, based on the direction in which light is emitted, the electron transport regions ETR1, ETR2, ETR3, and ETR4 are disposed below the light-emitting layers BEML1, BEML2, BEML3, and GEML included in the plurality of stacks ST1, ST2, ST3, and ST4, and the hole transport regions HTR1, HTR2, HTR3, and HTR4 are disposed above the light-emitting layers BEML1, BEML2, BEML3, and GEML included in the plurality of stacks ST1, ST2, ST3, and ST4.
[0136] Each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may include hole injection layers HIL1, HIL2, HIL3, and HIL4 and hole transport layers HTL1, HTL2, HTL3, and HTL4 disposed on the hole injection layers HIL1, HIL2, HIL3, and HIL4. The hole transport layers HTL1, HTL2, HTL3, and HTL4 may be in contact with the lower surface of the light emitting layer. However, not limited thereto, the hole transport regions HTR1, HTR2, HTR3, and HTR4 may further include a hole-side additional layer disposed on the hole transport layers HTL1, HTL2, HTL3, and HTL4. The hole-side additional layer may include at least one of a hole buffer layer, a light emission assisting layer, and an electron blocking layer. The hole buffer layer may be a layer that compensates for the resonance distance according to the wavelength of light emitted from the light emitting layer to increase the light emission efficiency. The electron blocking layer may be a layer that serves to prevent electron injection from the electron transport region to the hole transport region.
[0137] The electron transport regions ETR1, ETR2, ETR3, and ETR4 may include an electron transport layer. The electron transport regions ETR1, ETR2, ETR3, and ETR4 may further include an electron injection layer disposed on the electron transport layer. For example, the fourth electron transport region ETR4 included in the fourth light emitting stack ST4 may further include a fourth electron injection layer EIL4 disposed on the fourth electron transport layer ETL4. The electron transport regions ETR1, ETR2, ETR3, and ETR4 may further include an electron-side additional layer disposed between the electron transport layer and the light emitting layer. The electron-side additional layer may include at least one of an electron buffer layer and a hole blocking layer.
[0138] In a light-emitting element LED according to an embodiment, the first electrode EL1 may be a reflective electrode. For example, the first electrode EL1 includes Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, W, In, Zn, Sn, or a compound or mixture thereof (for example, a mixture of Ag and Mg) having a high reflectivity. Alternatively, the first electrode EL1 is a multilayer structure including a reflective film made of the above substances and a transparent conductive film made of ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), ITZO (indium tin zinc oxide), etc. For example, the first electrode EL1 may have a two-layer structure of ITO / Ag and a three-layer structure of ITO / Ag / ITO, but is not limited thereto. Further, the embodiment is not limited thereto, and the first electrode EL1 may include the above-described metal materials, a combination of two or more metal materials selected from the above-described metal materials, or an oxide of the above-described metal materials. The thickness of the first electrode EL1 is from about 70 nm to about 1000 nm. For example, the thickness of the first electrode EL1 may be from about 100 nm to about 300 nm.
[0139] In a light-emitting element LED according to an embodiment, each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may have a single-layer structure composed of a single substance, a single-layer structure composed of a plurality of different substances, or a multilayer structure composed of a plurality of layers of different substances.
[0140] Each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may be formed using various methods such as vacuum evaporation, spin coating, casting, LB method (Langmuir-Blodgett), inkjet printing, laser printing, laser induced thermal imaging (LITI), etc.
[0141] Each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 is a phthalocyanine compound such as copper phthalocyanine, DNTPD (N 1 ,N1’ -([1,1'-Biphenyl]-4,4'-diyl)bis(N 1 -phenyl-N 4 ,N 4 -di-m-tolylbenzene-1,4-diamine)), m-MTDATA (4,4',4''-[Tris(3-methylphenyl)phenylamino]triphenylamine), TDATA (4,4',4''-Tris(N,N-diphenylamino)triphenylamine), 2-TNATA (4,4',4''-Tris[N(2-naphthyl)-N-phenylamino]-triphenylamine), PEDOT / PSS (Poly(3,4-ethylenedioxythiophene) / Poly(4-styrenesulfonate)), PANI / DBSA (Polyaniline / Dodecylbenzenesulfonic acid), PANI / CSA (Polyaniline / Camphorsulfonic acid), PANI / PSS ((Polyaniline) / Poly(4-styrenesulfonate)), NPB (N,N'-Di(naphthalen-1-yl)-N,N'-diphenyl-benzidine), Polyetherketone containing triphenylamine (TPAPEK), 4-Isopropyl-4'-methyldiphenyliodonium tetrakis(pentafluorophenyl)borate, HATCN (Dipyrazino[2,3-f:2',3'-h]quinoxaline-2,3,6,7,10,11-hexacarbonitrile), etc. may be included.
[0142] Each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may include, for example, carbazole derivatives such as N-phenylcarbazole and polyvinylcarbazole, fluorene derivatives, triphenylamine derivatives such as TPD (N,N'-Bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine), TCTA (4,4',4''-Tris(N-carbazolyl)triphenylamine), NPB (N,N'-Di(naphthalen-1-yl)-N,N'-diphenyl-benzidine), TAPC (4,4'-Cyclohexylidenebis[N,N-bis(4-methylphenyl)benzenamine]), HMTPD (4,4'-Bis[N,N'-(3-tolyl)amino]-3,3'-dimethylbiphenyl), mCP (1,3-Bis(N-carbazolyl)benzene), etc.
[0143] Further, each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may contain CzSi (9-(4-tert-butylphenyl)-3,6-bis(triphenylsilyl)-9H-(carbazole)), CCP (9-phenyl-9H-3,9'-bicarbazole), or mDCP (1,3-bis(1,8-dimethyl-9H-carbazol-9-yl)benzene), etc.
[0144] The hole transport regions HTR1, HTR2, HTR3, and HTR4 may contain at least one of the compounds of the hole transport regions described above in the hole injection layers HIL1, HIL2, HIL3, HIL4, the hole transport layers HTL1, HTL2, HTL3, HTL4, and the hole side additional layer.
[0145] The thickness of each of the hole transport regions HTR1, HTR2, HTR3, and HTR4 may be from about 10 nm to about 1000 nm, for example, from about 10 nm to about 500 nm. The thickness of each of the hole injection layers HIL1, HIL2, HIL3, and HIL4 may be, for example, from about 5 nm to about 100 nm. The thickness of each of the hole transport layers HTL1, HTL2, HTL3, and HTL4 may be from about 5 nm to about 100 nm. When the hole transport regions HTR1, HTR2, HTR3, and HTR4 contain the hole side additional layer, the thickness of the hole side additional layer may be from about 1 nm to about 100 nm. If the thicknesses of the hole transport regions HTR1, HTR2, HTR3, and HTR4 and each layer contained therein satisfy the above-described ranges, hole transport characteristics of a satisfactory level can be obtained without a substantial increase in driving voltage.
[0146] Each of the positive hole transport regions HTR1, HTR2, HTR3, and HTR4 may further contain a charge generating substance in addition to the substances described above in order to improve conductivity. The charge generating substance may be uniformly or non-uniformly dispersed within the positive hole transport regions HTR1, HTR2, HTR3, and HTR4. The charge generating substance is, for example, a p-type dopant. The p-type dopant may include, but is not limited to, at least one of a metal halide compound, a quinone derivative, a metal oxide, and a cyano group-containing compound. For example, the p-type dopant may include metal halide compounds such as CuI and RbI, quinone derivatives such as TCNQ (tetracyanoquinodimethane) and F4-TCNQ (2,3,5,6-tetrafluoro-7,7’,8,8-tetracyanoquinodimethane), metal oxides such as tungsten oxide, and molybdenum oxide, but the embodiments are not limited thereto.
[0147] The blue light emitting layers BEML1, BEML2, BEML3 and the green light emitting layer GEML may contain the host materials and dopant materials described above. The blue light emitting layers BEML1, BEML2, BEML3 and the green light emitting layer GEML may contain a substance including a carbazole derivative partial structure or an amine derivative partial structure as a hole transporting host material. Each of the blue light emitting layers BEML1, BEML2, BEML3 and the green light emitting layer GEML may contain a substance including a nitrogen-containing aromatic ring structure such as a pyridine derivative partial structure, a pyridazine derivative partial structure, a pyrimidine derivative partial structure, a pyrazine derivative partial structure, and a triazine derivative partial structure as an electron transporting host material.
[0148] The blue light-emitting layers BEML1, BEML2, BEML3 and the green light-emitting layer GEML may contain an anthracene derivative, a pyrene derivative, a fluoranthene derivative, a chrysene derivative, a dihydrobenzanthracene derivative, or a triphenylene derivative, etc. as a host material. Further, the blue light-emitting layers BEML1, BEML2, BEML3 and the green light-emitting layer GEML may further contain common materials known in the art as a host material. For example, the blue light-emitting layers BEML1, BEML2, BEML3 and the green light-emitting layer GEML may contain at least one of DPEPO (bis[2-(diphenylphosphino)phenyl]ether oxide), CBP (4,4-bis(carbazol-9-yl)biphenyl), mCP (1,3-bis(carbazol-9-yl)benzene), PPF (2,8-bis(diphenylphosphoryl)dibenz[b,d]furan), TCTA (4,4’,4”-tris(carbazol-9-yl)-triphenylamine), and TPBi (1,3,5-tris(1-phenyl-1H-benzo[d]imidazol-2-yl)benzene) as a host material. However, it is not limited thereto. For example, Alq3 (tris(8-hydroxyquinolino)aluminum), PVK (poly(N-vinylcarbazole)), ADN (9,10-di(naphthalen-2-yl)anthracene), TBADN (3-tert-butyl-9,10-di(naphtho-2-yl)anthracene), DSA (distyrylarylene), CDBP (4,4’-bis(9-carbazolyl)-2,2’-dimethyl-biphenyl), MADN (2-methyl-9,10-bis(naphthalen-2-yl)anthracene), CP1 (hexaphenylcyclotriphosphazene), UGH2 (1,4-bis(triphenylsilyl)benzene), DPSiO3 (hexaphenylcyclotrisiloxane), DPSiO4 (octaphenylcyclotetrasiloxane), etc. may be used as a host material.
[0149] In one embodiment, the blue light-emitting layers BEML1, BEML2, and BEML3 may include, as known fluorescent dopant materials, styryl derivatives (e.g., 1,4-bis[2-(3-N-ethylcarbazolyl)vinyl]benzene (BCzVB), 4-(di-p-tolylamino)-4'-[(di-p-tolylamino)styryl]stilbene (DPAVB), N-(4-((E)-2-(6-((E)-4-(diphenylamino)styryl)naphthalen-2-yl)vinyl)phenyl)-N-phenylbenzenamine (N-BDAVBi)), 4,4'-bis[2-(4-(N,N-diphenylamino)phenyl)vinyl]biphenyl (DPAVBi)), perylene and its derivatives (e.g., 2,5,8,11-tetra-t-butylperylene (TBP)), pyrene and its derivatives (e.g., 1,1-dipyrene, 1,4-dipyrenylbenzene, 1,4-bis(N,N-diphenylamino)pyrene), etc.).
[0150] The green light-emitting layer GEML may include a known phosphorescent dopant substance. For example, as the phosphorescent dopant, a metal complex containing iridium (Ir), platinum (Pt), osmium (Os), gold (Au), titanium (Ti), zirconium (Zr), hafnium (Hf), europium (Eu), terbium (Tb), or thulium (Tm) may be used. Specifically, Flrpic (iridium(III) bis(4,6-difluorophenylpyridinato-N,C2') picolinate), Fir6 (bis(2,4-difluorophenylpyridinato)-tetrakis(1-pyrazolyl)borate iridium(III)), or PtOEP (platinum-octaethylporphyrin) may be used as the phosphorescent dopant.
[0151] Each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may have a single-layer structure composed of a single substance, a single-layer structure composed of a plurality of different substances, or a multilayer structure composed of a plurality of different substances. For example, at least a part of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may include an electron transport layer ETL4 and an electron injection layer EIL4.
[0152] Each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may be formed using various methods such as vacuum evaporation, spin coating, casting, LB method, inkjet printing, laser printing, laser thermal transfer method (LITI), and the like.
[0153] The electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain anthracene-based compounds. However, not limited thereto, each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain, for example, Alq3 (tris(8-hydroxyquinolinato)aluminum), 1,3,5-tri[(3-pyridyl)-phen-3-yl]benzene, 2,4,6-tris(3’-pyridin-3-yl)biphenyl-3-yl)-1,3,5-triazine, 2-(4-(N-phenylbenzimidazol-1-yl)phenyl)-9,10-dinaphthylanthracene, TPBi (1,3,5-tri(1-phenyl-1H-benzo[d]imidazol-2-yl)benzene), BCP (2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline), Bphen (4,7-diphenyl-1,10-phenanthroline), TAZ (3-(4-biphenylyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole), NTAZ (4-(naphthalen-1-yl)-3,5-diphenyl-4H-1,2,4-triazole), tBu-PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), BAlq (bis(2-methyl-8-quinolinolato-N1,O8)-(1,1’-biphenyl-4-olato)aluminum), Bebq2 (beryllium bis(benzoquinolin-10-olato), ADN (9,10-di(naphthalen-2-yl)anthracene), BmPyPhB (1,3-bis[3,5-di(pyridin-3-yl)phenyl]benzene), and mixtures thereof.
[0154] In addition, each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain a metal halide such as LiF, NaCl, CsF, RbCl, RbI, CuI, KI, a lanthanide metal such as Yb, or a co-evaporated material of the metal halide and the lanthanide metal. For example, each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain KI:Yb, RbI:Yb, etc. as the co-evaporated material. Each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may also contain two or more substances selected from Mg, Ag, Yb, and Al. For example, the electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain Mg and Yb.
[0155] On the other hand, for the electron transport regions ETR1, ETR2, ETR3, and ETR4, metal oxides such as Li2O and BaO, or Liq (8-hydroxy-lithium quinolate) can be used, but the embodiments are not limited thereto. Each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may also be composed of a substance in which an electron transport substance and an insulating organo metal salt are mixed. The organo metal salt may be a substance having an energy band gap of about 4 eV or more. Specifically, for example, the organo metal salt includes a metal acetate, a metal benzoate, a metal acetoacetate, a metal acetylacetonate, or a metal stearate.
[0156] In addition to the materials described above, each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may further contain at least one of BCP (2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline) and Bphen (4,7-diphenyl-1,10-phenanthroline), but is not limited thereto.
[0157] The electron transport regions ETR1, ETR2, ETR3, and ETR4 may contain the compounds of the electron transport region described above in the electron injection layer or the electron transport layer. If the electron transport regions ETR1, ETR2, ETR3, and ETR4 include an additional electron side layer, the additional electron side layer may contain the substances described above. In one embodiment, the electron injection layer EIL4 may be composed of two or more substances selected from Mg, Ag, Yb, and Al. The electron injection layer EIL4 may be composed of, for example, a mixture of Mg and Yb.
[0158] The thickness of each of the electron transport regions ETR1, ETR2, ETR3, and ETR4 may be, for example, from about 10 nm to about 150 nm. The thickness of the electron transport layer may be from about 0.1 nm to about 100 nm, for example, from about 0.3 nm to about 50 nm. If the thickness of the electron transport layer satisfies the range as described above, electron transport characteristics that can be satisfied can be obtained without a substantial increase in the driving voltage.
[0159] The second electrode EL2 is provided on the plurality of light emitting stacks ST1, ST2, ST3, and ST4. The second electrode EL2 may be a common electrode. The second electrode EL2 may be a cathode or an anode, but the embodiment is not limited thereto. For example, if the first electrode EL1 is an anode, the second electrode may be a cathode, and if the first electrode EL1 is a cathode, the second electrode EL2 may be an anode.
[0160] The second electrode EL2 is a semi-transmissive electrode or a transmissive electrode. If the second electrode EL2 is a transmissive electrode, the second electrode EL2 may be composed of a transparent metal oxide, for example, ITO, IZO, ZnO, ITZO, or the like.
[0161] When the second electrode EL2 is a semi-transmissive electrode or a reflective electrode, the second electrode EL2 may contain Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, Yb, W, In, Zn, Sn, or a compound or mixture containing these (for example, AgMg, AgYb, or MgAg). Alternatively, the second electrode EL2 may have a multi-layer structure including a reflective film or a semi-transmissive film made of the above substances and a transparent conductive film made of ITO, IZO, ZnO, ITZO, etc. For example, the second electrode EL2 may contain the above-described metal materials, a combination of two or more metal materials selected from the above-described metal materials, or an oxide of the above-described metal materials, etc.
[0162] Although not shown, the second electrode EL2 may be connected to an auxiliary electrode. When the second electrode EL2 is connected to the auxiliary electrode, the resistance of the second electrode EL2 can be reduced.
[0163] On the other hand, a capping layer CPL is further disposed on the second electrode EL2 of the light-emitting element LED of one embodiment. The capping layer CPL may include multiple layers or a single layer.
[0164] In one embodiment, the capping layer CPL may be an organic layer or an inorganic layer. For example, when the capping layer CPL contains an inorganic substance, the inorganic substance may include an alkali metal compound such as LiF, an alkaline earth compound such as MgF2, SiON, SiNx, SiOy, etc.
[0165] For example, when the capping layer CPL contains an organic substance, the organic substance may include α-NPD, NPB, TPD, m-MTDATA, Alq3, CuPc, TPD15 (N4, N4, N4’, N4’-tetra (biphenyl-4-yl) biphenyl-4,4’-diamine), TCTA (4,4’,4”-tris (carbazol-9-yl) triphenylamine), etc., or may include an epoxy resin or an acrylate such as methacrylate.
[0166] On the one hand, the refractive index of the capping layer CPL may be 1.6 or more. Specifically, for light in the wavelength range of 550 nm or more and 660 nm or less, the refractive index of the capping layer CPL may be 1.6 or more.
[0167] Referring further to FIG. 4a, in the light-emitting element LED of one embodiment, the electron control layer ETR may be disposed between the light-emitting layer EML and the second electrode EL2. The electron control layer ETR may include at least one of an electron injection layer, an electron transport layer, and a hole blocking layer. Referring to FIG. 4a, the electron control layer ETR may be disposed as a common layer so as to overlap the entire pixel definition film PDL that divides the light-emitting regions EA1, EA2, EA3 and the light-emitting regions EA1, EA2, EA3. However, the embodiment is not limited thereto, and the electron control layer ETR may be provided in a patterned manner so as to be separately disposed corresponding to each of the light-emitting regions EA1, EA2, EA3.
[0168] The second electrode EL2 may be provided on the electron control layer ETR. The second electrode EL2 may be a common electrode. The second electrode EL2 may be a cathode or an anode, but the embodiment is not limited thereto. For example, if the first electrode EL1 is an anode, the second electrode may be a cathode, and if the first electrode EL1 is a cathode, the second electrode EL2 may be an anode. The second electrode EL2 may be a transmissive electrode, a semi-transmissive electrode, or a reflective electrode.
[0169] The encapsulation layer TFE may be disposed on the light-emitting element LED. Specifically, in one embodiment, the encapsulation layer TFE may be disposed on the second electrode EL2. Further, if the light-emitting element LED includes a capping layer (not shown), the encapsulation layer TFE may be disposed on the capping layer (not shown). The encapsulation layer TFE includes at least one organic film and at least one inorganic film as described above, but the inorganic film and the organic film may be alternately disposed.
[0170] The display panel DP of one embodiment may include an optical structure layer OSL disposed on the display element layer DP-LED. The optical structure layer OSL may include a light control layer CCL, a color filter layer CFL, and a base layer BL.
[0171] The light control layer CCL may include a light converter. The light converter may be a quantum dot or a phosphor, etc. The light converter may be one that converts the provided light in wavelength and emits it. That is, the light control layer CCL may be a layer including quantum dots at least in part, or a layer including phosphors.
[0172] The light control layer CCL may include a plurality of light control patterns CCP-R, CCP-G, CCP-B. The light control patterns CCP-R, CCP-G, CCP-B may be spaced apart from each other. The light control patterns CCP-R, CCP-G, CCP-B may be spaced apart and arranged by a bank BMP. The light control patterns CCP-R, CCP-G, CCP-B may be arranged within bank openings BOH1, BOH2, BOH3 defined by the bank BMP. However, the embodiment is not limited thereto. In FIG. 4a, the bank BMP has a rectangular shape in cross section and is shown not to overlap with the light control patterns CCP-R, CCP-G, CCP-B, but some edges of the light control patterns CCP-R, CCP-G, CCP-B may at least partially overlap with the bank BMP. For example, the edge of the third light control pattern CCP-B may be arranged to overlap with the bank BMP on the plane. The bank BMP may have a rhombic shape in cross section. The bank BMP may have a shape in which the width in cross section becomes larger as it is closer to the display element layer DP-LED.
[0173] The light control patterns CCP-R, CCP-G, CCP-B may be portions that convert the wavelength of the light provided from the display element layer DP-LED or transmit the provided light.
[0174] The light control layer CCL may include a first light control pattern CCP-R that provides red light as the first light, a second light control pattern CCP-G that provides green light as the second light, and a third light control pattern CCP-B that provides blue light as the third light. The light control layer CCL may include a first light control pattern CCP-R that converts the source light provided from the light emitting element LED into the first light, a second light control pattern CCP-G that converts the source light into the second light, and a third light control pattern CCP-B that transmits the source light. At least a part of the light control patterns CCP-R, CCP-G, and CCP-B may include quantum dots that convert the source light into light of a specific wavelength.
[0175] A part of the light control patterns CCP-R, CCP-G, and CCP-B may be formed by an inkjet process. In one embodiment, the first light control pattern CCP-R and the second light control pattern CCP-G may be formed by an inkjet process. A liquid ink composition is provided inside each of the first bank opening BOH1 and the second bank opening BOH2, and the provided ink composition is polymerized by a heat curing process or a light curing process, and the first light control pattern CCP-R and the second light control pattern CCP-G may be formed. The remaining part of the light control patterns CCP-R, CCP-G, and CCP-B may be formed by a photoresist process. In one embodiment, the third light control pattern CCP-B may be formed by a photoresist process. After the photoresist composition is provided in at least the third bank opening BOH3, the provided photoresist composition may be cured to form the third light control pattern CCP-B.
[0176] The light control layer CCL may further include a scatterer. The first light control pattern CCP-R includes the first quantum dots and the scatterer, the second light control pattern CCP-G includes the second quantum dots and the scatterer, and the third light control pattern CCP-B may include the scatterer without including quantum dots. Each of the first light control pattern CCP-R, the second light control pattern CCP-G, and the third light control pattern CCP-B may further include a base resin that disperses the quantum dots and the scatterer. On the other hand, since the third light control pattern CCP-B is formed by a photoresist process as described later, it may include a photosensitive resin.
[0177] The light control layer CCL may include a first barrier layer CAP1 disposed on one surface of the first light control pattern CCP-R. The light control layer CCL may include a first barrier layer CAP1 that sandwiches the first light control pattern CCP-R and is separated from the display element layer DP-LED, and a second barrier layer CAP2 adjacent to the display element layer DP-LED.
[0178] In the display panel DP, the optical structure layer OSL includes a color filter layer CFL disposed on the light control layer CCL. The color filter layer CFL may include color filters CF1, CF2, and CF3. The color filter layer CFL may include a first color filter CF1 that transmits the first light, a second color filter CF2 that transmits the second light, and a third color filter CF3 that transmits the source light. In one embodiment, the first color filter CF1 may be a red filter, the second color filter CF2 may be a green filter, and the third color filter CF3 may be a blue filter.
[0179] Each of the color filters CF1, CF2, and CF3 includes a polymer photosensitive resin and a colorant. The first color filter CF1 may include a red colorant, the second color filter CF2 may include a green colorant, and the third color filter CF3 may include a blue colorant. The first color filter portion CF1 may include a red pigment or a red dye, the second color filter portion CF2 may include a green pigment or a blue dye, and the third color filter portion CF3 may include a blue pigment or a green dye.
[0180] Each of the first to third color filters CF1, CF2, and CF3 may be arranged corresponding to the first pixel region PXA-R, the second pixel region PXA-G, and the third pixel region PXA-B, respectively. Further, each of the first to third color filters CF1, CF2, and CF3 may be arranged corresponding to the first to third light control patterns CCP-R, CCP-G, and CCP-B, respectively.
[0181] Further, corresponding to the peripheral region NPXA arranged between the pixel regions PXA-R, PXA-G, and PXA-B, a plurality of color filters CF1, CF2, and CF3 that transmit different lights may be superimposed and arranged. In the third direction DR3 which is the thickness direction, a plurality of color filters CF1, CF2, and CF3 may be superimposed and arranged to divide the boundary between adjacent light-emitting regions PXA-R, PXA-G, and PXA-B. On the other hand, different from the illustration, the color filter layer CFL may further include a light-shielding portion (not shown) for dividing the boundary between adjacent color filters CF1, CF2, and CF3. The light-shielding portion (not shown) may be formed of a blue filter or may be formed including an organic light-shielding substance or an inorganic light-shielding substance containing a black pigment or a black dye.
[0182] The optical structure layer OSL may include a filling layer FML arranged between the light control layer CCL and the color filter layer CFL. The filling layer FML may be arranged between the light control patterns CCP-R, CCP-G, and CCP-B and the color filters CF1, CF2, and CF3. The filling layer FML is arranged on the upper part of the light control layer CCL and can block the light control patterns CCP-R, CCP-G, and CCP-B from being exposed to moisture / oxygen. Further, the filling layer FML may be arranged between the light control patterns CCP-R, CCP-G, and CCP-B and the color filters CF1, CF2, and CF3 to function as an optical functional layer such as increasing the light extraction efficiency or preventing the reflected light from being incident on the light control layer CCL. The filling layer FML may be a layer having a refractive index smaller than that of other adjacent layers.
[0183] In one embodiment, the optical structure layer OSL may further include a base layer BL disposed on the color filter layer CFL. The base layer BL may be a member that provides a base surface on which the color filter layer CFL, the light control layer CCL, and the like are disposed. The base layer BL may be a glass substrate, a metal substrate, a plastic substrate, or the like. However, the embodiment is not limited thereto, and the base layer BL may be an inorganic layer, an organic layer, or a composite material layer. Also, different from the illustration, in one embodiment, the base layer BL may be omitted.
[0184] Figures 4b and 4c each show a display panel DP of one embodiment shown in Figure 4a and display panels DP-1, DP-2, and DP-3 of other embodiments.
[0185] Referring to Figure 4b, a display panel DP-1 according to one embodiment may include a lower panel including a base substrate BS, a circuit element layer DP-CL disposed on the base substrate BS, and a display element layer DP-LED disposed on the circuit element layer DP-CL, and an optical structure layer OSL disposed on the lower panel. The optical structure layer OSL may include a light control layer CCL, a color filter layer CFL, and a base layer BL.
[0186] A display panel DP-1 of one embodiment includes a lower panel including a display element layer DP-LED and a display panel (optical structure layer OSL) including a light control layer CCL and a color filter layer CFL. In one embodiment, a filling layer FML may be disposed between the lower panel and the upper panel OSL.
[0187] In one embodiment, the filling layer FML may be one that fills the space between the display element layer DP-LED and the light control layer CCL. The filling layer FML may be disposed directly on the encapsulation layer TFE, and the second barrier layer CAP2 may be disposed directly on the filling layer FML. The lower surface of the filling layer FML may contact the upper surface of the encapsulation layer TFE, and the upper surface of the filling layer FML may contact the lower surface of the second barrier layer CAP2.
[0188] The filling layer FML may function as a buffer between the display element layer DP-LED and the light control layer CCL. In one embodiment, the filling layer FML functions such as shock absorption function, and can increase the strength of the display panel DP-1. The filling layer FML may be composed of a filling resin containing a polymer resin. For example, the filling layer FML may be composed of a filling resin containing an acrylic resin or an epoxy resin or the like.
[0189] Compared with the display panel DP shown in FIG. 4a, the display panel DP-1 according to one embodiment shown in FIG. 4b is an embodiment in which the filling layer FML is disposed between the display element layer DP-LED and the light control layer CCL. That is, in the display panel DP-1 of FIG. 4b, the lower panel has the upper surface of the base substrate BS as the base surface, and the circuit element layer DP-CL and the display element layer DP-LED are disposed, and the upper panel (optical structure layer OSL) has the upper surface of the base layer BL as the base surface, and after the color filter layer CFL and the light control layer CCL are disposed, the lower panel and the upper panel may be formed by bonding with the filling layer FML interposed therebetween.
[0190] In a display panel according to one embodiment, a step may occur between the lower surface of the bank BMP and the lower surfaces of the light control patterns CCP-R, CCP-G, and CCP-B. That is, the lower surface of the bank BMP may be defined higher than the lower surfaces of the light control patterns CCP-R, CCP-G, and CCP-B. The height difference between the lower surface of the bank BMP and the lower surfaces of the light control patterns CCP-R, CCP-G, and CCP-B may be, for example, from about 2 μm to about 3 μm.
[0191] The second barrier layer CAP2 may be disposed following the step between the bank BMP and the light control patterns CCP-R, CCP-G, and CCP-B. The second barrier layer CAP2 may be disposed directly on the upper portion of the filling layer FML.
[0192] The display panel DP-1 of one embodiment may include a low refractive index layer LR. The low refractive index layer LR may be disposed between the light control layer CCL and the color filter CFL. The low refractive index layer LR may be disposed on top of the light control layer CCL to block the light control patterns CCP-R, CCP-G, and CCP-B from being exposed to moisture / oxygen. Further, the low refractive index layer LR may be disposed between the light control patterns CCP-R, CCP-G, and CCP-B and the color filters CF1, CF2, and CF3 to perform functions of an optical functional layer such as increasing the light extraction efficiency or preventing reflected light from entering the light control layer CCL. The low refractive index layer LR may be a layer having a refractive index smaller than that of an adjacent layer.
[0193] The low refractive index layer LR may include at least one inorganic layer. For example, the low refractive index layer LR may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, silicon oxynitride, and a metal thin film with ensured light transmittance. However, the embodiment is not limited thereto, and the low refractive index layer LR may include an organic film. The low refractive index layer LR may have a structure in which a plurality of hollow particles are dispersed in an organic polymer resin, for example. The low refractive index layer LR may be composed of a single layer or a plurality of layers.
[0194] Referring to FIG. 4c, a display panel DP-2 according to one embodiment may include a lower panel including a base substrate BS, a circuit element layer DP-CL disposed on the base substrate BS, and a display element layer DP-LED disposed on the circuit element layer DP-CL, and an optical structure layer OSL-1 disposed on the lower panel. In the display panel DP-2 according to one embodiment, the optical structure layer OSL-1 may include a light control layer CCL-1, a low refractive index layer LR-1, a color filter layer CFL-1, and a base layer BL-1 sequentially laminated on the thin film encapsulation layer TFE. The optical structure layer OSL-1 may include a first barrier layer CAP1 and a second barrier layer CAP2 disposed on the upper surface and the lower surface of the light control layer CCL-1.
[0195] The light control layer CCL-1 may be disposed on the display element layer DP-LED and the thin film encapsulation layer TFE with the second barrier layer CAP2 interposed therebetween. The light control layer CCL-1 may include a plurality of banks BMP and light control patterns CCP-R, CCP-G, and CCP-B disposed between the banks BMP. A low refractive index layer LR may be disposed on the light control layer CCL-1.
[0196] The color filter layer CFL-1 may include a plurality of color filters CF1, CF2, CF3 and a light shielding portion BM.
[0197] Compared with the display panel DP-1 shown in FIG. 4b, the display panel DP-2 according to an embodiment shown in FIG. 4c is an embodiment in which the light control layer CCL-1, the low refractive index layer LR, and the color filter layer CFL-1 are disposed with the upper surface of the thin film encapsulation layer TFE as the base surface. That is, the light control patterns CCP-R, CCP-G, and CCP-B of the light control layer CCL-1 may be formed in a continuous process on the thin film encapsulation layer TFE, and the color filters CF1, CF2, and CF3 may be sequentially formed on the light control layer CCL-1 by a continuous process. The light control layer CCL-1 may be formed with the upper surface of the second barrier layer CAP2 disposed on the thin film encapsulation layer TFE as the base surface, and may have a shape that is upside down with respect to the shape of the light control layer CCL shown in FIG. 4a. Specifically, each of the plurality of banks BMP and the plurality of light control patterns CCP-R, CCP-G, and CCP-B may have a shape that is upside down with respect to that shown in FIG. 4a. The color filter layer CFL-1 may be formed with the upper surface of the light control layer CCL-1 as the base surface, and may have a shape different from that shown in FIG. 4a.
[0198] In the color filter layer CFL-1 of one embodiment, the light shielding portion BM may be a black matrix. The light shielding portion BM may be formed to include an organic light shielding substance or an inorganic light shielding substance containing a black pigment or a black dye. The light shielding portion BM may prevent a light leakage phenomenon and may demarcate the boundary between adjacent color filters CF1, CF2, and CF3.
[0199] Referring to FIG. 4d, the display element layer DP-LED1 included in the display panel DP-3 of one embodiment includes a light-emitting element LED-1, and the light-emitting element LED-1 may be a micro LED (Micro LED) element or a nano LED (Nano LED) element. The light-emitting element LED-1 is disposed between the pixel definition films PDL and may be electrically connected to the contact portion S-C, but the length and width of the light-emitting element LED-1 may be between several hundred nanometers and several hundred micrometers. The light-emitting element LED-1 may be an LED element including an active layer and at least one semiconductor material layer. The light-emitting element LED-1 may further include an insulating layer covering the surface of the semiconductor material layer in addition to the active layer. The light-emitting element LED-1 may be patterned and disposed so as to overlap the light-emitting regions PXA-R, PXA-G, and PXA-B respectively. The display panel DP-3 may include a buffer layer BFL disposed on the light-emitting element LED-1. The buffer layer BFL may be disposed on the light-emitting element LED-1 to cover the light-emitting element LED-1. On the other hand, in the display panel DP-3 of one embodiment shown in FIG. 4d, the buffer layer BFL may be omitted.
[0200] FIG. 6a is an enlarged plan view of a part of a display panel according to an embodiment of the present invention. FIG. 6b is an enlarged plan view of a part of a display panel according to an embodiment of the present invention. FIG. 7 is a cross-sectional view of a part of a display panel according to an embodiment of the present invention. In FIG. 6a, among the display regions DA shown in FIG. 2, the arrangement shapes of the filter regions FA1, FA2, FA3 and the bank openings BOH1, BOH2, BOH3 in the plane corresponding to one first filter region FA1, one second filter region FA2, and one third filter region FA3 are shown. In FIG. 6b, in the plane corresponding to FIG. 6a, the shape of the light-emitting opening OH formed in the pixel definition film PDL and the light-emitting regions EA1, EA2, EA3 defined thereby on the plane are shown. FIG. 7 shows a cross-section corresponding to the cutting line III-III' shown in FIG. 2.
[0201] Referring to FIGS. 2, 3, 4a, and 6a together, the first to third filter regions FA1, FA2, FA3 may respectively correspond to the first to third pixel regions PXA-R, PXA-G, PXA-B described above, and may be regions defined by color filters CF1, CF2, CF3. The first filter region FA1 may be defined by the first color filter CF1, the second filter region FA2 may be defined by the second color filter CF2, and the third filter region FA3 may be defined by the third color filter CF3. The first filter region FA1 may be a region where the first color filter CF1 overlaps and the second color filter CF2 and the third color filter CF3 do not overlap. The second filter region FA2 may be a region where the second color filter CF2 overlaps and the first color filter CF1 and the third color filter CF3 do not overlap. The third filter region FA3 may be a region where the third color filter CF3 overlaps and the first color filter CF1 and the second color filter CF2 do not overlap.
[0202] Each of the first to third filter regions FA1, FA2, FA3 may have a rectangular shape. Each of the first to third filter regions FA1, FA2, FA3 may have a rectangular shape having a short side extending along a first direction DR1 and a long side extending along a second direction DR2. The areas of the first to third filter regions FA1, FA2, FA3 may be set according to the emitted color. For example, the area of the first filter region FA1 that emits red light may be the largest, and the area of the third filter region FA3 that emits blue light may be the smallest.
[0203] The bank opening BOH defined in the bank BMP may include a first bank opening BOH1, a second bank opening BOH2, and a third bank opening BOH3. Inside the first bank opening BOH1, a first light control pattern CCP-R may be arranged. Inside the second bank opening BOH2, a second light control pattern CCP-G may be arranged. Inside the third bank opening BOH3, a third light control pattern CCP-B may be arranged. On the other hand, in this specification, the region defined by the first bank opening BOH1 may be described as a first bank region BA1, the region defined by the second bank opening BOH2 may be described as a second bank region BA2, and the region defined by the third bank opening BOH3 may be described as a third bank region BA3.
[0204] In one embodiment, the first bank region BA1 may include a first sub-region BSA1 and a second sub-region BSA2. The first sub-region BSA1 and the second sub-region BSA2 may be regions that have an integral shape and are connected to each other. Inside the first bank opening BOH1 that defines each of the first sub-region BSA1 and the second sub-region BSA2, the first light control pattern CCP-R may be arranged. That is, the first light control pattern CCP-R may be arranged so as to overlap both the first sub-region BSA1 and the second sub-region BSA2.
[0205] The first sub-region BSA1 has a first width W1 in a first direction DR1, and the second sub-region BSA2 has a second width W2 that is larger than the first width W1 in the first direction DR1. That is, the second sub-region BSA2 may be a region that has a larger width in the first direction DR1 than the first sub-region BSA1. The length of the second sub-region BSA2 in a second direction DR2 may be smaller than the length of the first sub-region BSA1 in the second direction DR2. The second sub-region BSA2 may be a region that has a smaller length in the second direction DR2 than the first sub-region BSA1. On the other hand, the first width W1 may be 25 μm or more and 30 μm or less, and the second width W2 may be 35 μm or more and 50 μm or less.
[0206] The first filter region FA1 overlaps the first sub-region BSA1 and also overlaps a part of the second sub-region BSA2. The first filter region FA1 has a first filter width W-F1 in the first direction DR1, and even if the first filter width W-F1 is smaller than the first width W1, it may be acceptable. The first sub-region BSA1 has a first length L1 in the second direction DR2, and the first filter region FA1 has a first filter length L-F1 in the second direction DR2, and even if the first filter length L-F1 is larger than the first length L1, it may be acceptable. That is, the first filter region FA1 is arranged to overlap the first sub-region BSA1 except for a part of the outer contour region of the first sub-region BSA1, the length of the first filter region FA1 in the second direction DR2 is longer than the length of the first sub-region BSA1 in the second direction DR2, and a part of the first filter region FA1 may be extended and arranged in the second sub-region BSA2.
[0207] On the other hand, a part of the second sub-region BSA2 may include a portion where the first filter region FA1 does not overlap. A connection region CNA, which will be described later, may overlap the portion of the second sub-region BSA2 where the first filter region FA1 does not overlap.
[0208] The first sub-region BSA1 may include a first-1 side S1-1 and a first-2 side S1-2 that are separated along the first direction DR1. The second sub-region BSA2 may include a second-1 side S2-1 and a second-2 side S2-2 that are separated along the first direction DR1. The above-mentioned first width W1 may be the separation distance between the first-1 side S1-1 and the first-2 side S1-2, and the second width W2 may be the separation distance between the second-1 side S2-1 and the second-2 side S2-2.
[0209] Based on the second direction DR2, the first-2 side S1-2 and the second-2 side S2-2 may be aligned. That is, the first-2 side S1-2 and the second-2 side S2-2 may define one side that extends in the second direction DR2. The distances by which the first-1 side S1-1 and the second-1 side S2-1 are separated from the first-2 side S1-2 and the second-2 side S2-2, which are aligned and extended, are different, and they may have different widths from each other.
[0210] In one embodiment, the second bank region BA2 may include a third sub-region BSA3 and a fourth sub-region BSA4. The third sub-region BSA3 and the fourth sub-region BSA4 may be regions that have an integral shape and are connected to each other. Inside the second bank opening BOH2 that defines each of the third sub-region BSA3 and the fourth sub-region BSA4, a second light control pattern CCP-G may be disposed. That is, the second light control pattern CCP-G may be disposed so as to overlap both the third sub-region BSA3 and the fourth sub-region BSA4.
[0211] The third sub-region BSA3 has a third width W3 in the first direction DR1, and the fourth sub-region BSA4 has a fourth width W4 that is larger than the third width W3 in the first direction DR1. That is, the fourth sub-region BSA4 may be a region that has a larger width in the first direction DR1 than the third sub-region BSA3. The length of the fourth sub-region BSA4 in the second direction DR2 may be smaller than the length of the third sub-region BSA3 in the second direction DR2. The fourth sub-region BSA4 may be a region that has a smaller length in the second direction DR2 than the third sub-region BSA3. On the other hand, the third width W3 may be 25 μm or more and 30 μm or less, and the fourth width W4 may be 35 μm or more and 50 μm or less. The third width W3 may be substantially the same as the first width W1. The fourth width W4 may be substantially the same as the second width W2.
[0212] The second filter region FA2 overlaps with the third sub-region BSA3 and partially overlaps with the fourth sub-region BSA4. The second filter region FA2 has a second filter width W-F2 in the first direction DR1, and the second filter width W-F2 may be smaller than the third width W3. The third sub-region BSA3 has a second length L2 in the second direction DR2, and the second filter region FA2 has a second filter length L-F2 in the second direction DR2, and the second filter length L-F2 may be larger than the second length L2. That is, the second filter region FA2 is arranged to overlap with the third sub-region BSA3 except for a part of the outer region of the third sub-region BSA3, the length of the second filter region FA2 in the second direction DR2 is longer than the length of the third sub-region BSA3 in the second direction DR2, and a part of the second filter region FA2 may be extended and arranged in the fourth sub-region BSA4.
[0213] On the other hand, a part of the fourth sub-region BSA4 may include a portion where the second filter region FA2 does not overlap. A connection region CNA described later may overlap with a portion of the fourth sub-region BSA4 where the second filter region FA2 does not overlap.
[0214] The third sub-region BSA3 may include a third-1 side S3-1 and a third-2 side S3-2 that are separated along the first direction DR1. The fourth sub-region BSA4 may include a fourth-1 side S4-1 and a fourth-2 side S4-2 that are separated along the first direction DR1. The above-described first width W1 may be the separation distance between the third-1 side S3-1 and the second-2 side S3-2, and the second width W2 may be the separation distance between the fourth-1 side S4-1 and the fourth-2 side S4-2.
[0215] Based on the second direction DR2, the third-2 side S3-2 and the fourth-2 side S4-2 may be aligned. That is, the third-2 side S3-2 and the fourth-2 side S4-2 may define one side that extends in the second direction DR2. The distances at which the third-1 side S3-1 and the fourth-1 side S4-1 are separated from the third-2 side S3-2 and the fourth-2 side S4-2 that are extended side by side are different, and they may have different widths from each other.
[0216] In one embodiment, the third bank region BA3 may have a fifth width W5 in the first direction DR1 and a third length L3 in the second direction DR2. The third filter region FA3 may overlap the third bank region BA3. The third bank region BA3 may have a rectangular shape on a plane.
[0217] The fifth width W5 may be substantially the same as the first width W1 of the first sub-region BSA1. The fifth width W5 may be substantially the same as the third width W3 of the third sub-region BSA3. That is, the widths of the first sub-region BSA1, the third sub-region BSA3, and the third bank region BA3 in the first direction DR1 may be constant. On the other hand, in this specification, "substantially the same" includes not only the case where lengths, widths, areas, etc. are physically the same, but also the case where there is a difference only due to process errors that occur despite the same design.
[0218] The third length L3 may be shorter than the first length L1 and the second length L2. The first length L1 and the second length L2 may be substantially the same.
[0219] The third filter region FA3 has a third filter width W-F3 in the first direction DR1, but the third filter width W-F3 may be smaller than the fifth width W5. The third bank region BA3 has a third length L3 in the second direction DR2, and the third filter region FA3 may be shorter in length in the second direction DR2 than the third length L3.
[0220] In one embodiment, the first bank region BA1, the second bank region BA2, and the third bank region BA3 may be sequentially arranged along the first direction DR1. On the other hand, the separation distances in the first direction DR1 of the first sub-region BSA1, the third sub-region BSA3, and the third bank region BA3 may be constant. In one embodiment, the first separation interval d1 between the adjacent first sub-region BSA1 and the third sub-region BSA3, the second separation interval d2 between the adjacent third sub-region BSA3 and the third bank region BA3, and the third separation interval d3 between the adjacent third bank region BA33 and the first sub-region BSA1 may be substantially the same as each other. Each of the first separation interval d1, the second separation interval d2, and the third separation interval d3 may be 8 μm or more and 13 μm or less.
[0221] In the display panel of one embodiment, the first bank region defined by the first bank opening in which the first light control pattern is arranged includes a first sub-region having a first width and a second sub-region having a second width larger than the first width. Further, the second bank region defined by the second bank opening in which the second light control pattern is arranged may include a third sub-region having a third width and a fourth sub-region having a fourth width larger than the third width. In the display panel of one embodiment, since the first filter region and the second filter region that overlap the first sub-region and the second sub-region each having a relatively narrow width have a structure, the size of the pixel region may be reduced and a high resolution may be realized. On the other hand, since the landing regions of the inkjet processes for forming the first light control pattern and the second light control pattern can be secured through the second sub-region and the fourth sub-region each having a wide width, the efficiency of the processes for forming the first light control pattern and the second light control pattern can be improved.
[0222] On the other hand, referring to FIGS. 2, 6b, and 7 together, in the display panel of one embodiment, the display area DA may further include a connection area CNA.
[0223] The connection region CNA may overlap with a part of each of the first bank region BA1 and the second bank region BA2. The connection region CNA may overlap with a part of each of the second sub-region BSA2 and the fourth sub-region BSA2.
[0224] As shown in FIG. 6, a light-emitting opening OH is defined in the pixel definition film PDL. The light-emitting opening OH may include a first light-emitting opening OH1, a second light-emitting opening OH2, and a third light-emitting opening OH3. In the present embodiment, the light-emitting region EA described above may be defined by the light-emitting opening OH. The first light-emitting region EA1 may be defined by the first light-emitting opening OH1, the second light-emitting region EA2 may be defined by the second light-emitting part OH2, and the third light-emitting region EA3 may be defined by the third light-emitting opening OH3. On the other hand, each of the first light-emitting opening OH1, the second light-emitting opening OH2, and the third light-emitting opening OH3 may correspond to each of the first filter region FA1, the second filter region FA2, and the third filter region FA3 described above in FIG. 6a. The connection region CNA may not overlap with each of the first light-emitting region EA1, the second light-emitting region EA2, and the third light-emitting region EA3. The connection region CNA may not overlap with each of the first filter region FA1, the second filter region FA2, and the third filter region FA3 described above.
[0225] Referring to FIGS. 2, 6b, and 7, the connection region CNA may be a region where the auxiliary electrode SE and the second electrode EL2 are connected. The auxiliary electrode SE may be disposed on the circuit element layer DP-CL. The auxiliary electrode SE may include the same material as the above-described first electrode EL1 (see FIG. 3) and may be formed on the circuit element layer DP-CL by the same process. The connection region CNA may be a part where the organic layers such as the hole control layer HTR, the light-emitting layer EML, and the electron control layer ETR included in the light-emitting element are removed by a laser drilling process and the second electrode EL2 is connected to the auxiliary electrode SE. The auxiliary electrode SE may be a conductive pattern to which a power supply voltage is applied.
[0226] The connection region CNA overlaps the bank BMP and may also overlap a part of the first bank opening BOH1 and the second bank opening BOH2. As described above, since the connection region CNA does not overlap each of the first filter region FA1, the second filter region FA2, and the third filter region FA3 described above, color filters CF1, CF2, CF3 (see FIG. 4a) may not overlap the connection region CNA. In the display panel of one embodiment, since the connection region CNA overlaps each of the first bank opening BOH1 and the second bank opening BOH2 and does not overlap each of the first filter region FA1, the second filter region FA2, and the third filter region FA3, a wide inkjet process landing region can be secured while ensuring the aperture ratio of the pixel region, and the efficiency of the manufacturing process of the display panel can be improved.
[0227] FIGS. 8a to 8d are enlarged plan views of a part of a display panel according to an embodiment of the present invention. In FIGS. 8a and 8 respectively, in the display region DA of one embodiment shown in FIG. 2 and the display regions DA-1, DA-2, DA-3, DA-4 of other embodiments, the arrangement relationships of the plurality of filter regions FA1, FA2, FA3 and the bank regions BA1, BA2, BA3 are shown.
[0228] Referring to FIG. 8a, in the display area DA-1 of one embodiment, the plurality of filter areas FA1, FA2, FA3 and bank areas BA1, BA2, BA3 may have a shape that is inverted vertically compared to the display area DA of FIG. 2. That is, in the display area DA of FIG. 2, the first sub-area BSA1 of the first bank area BA1 is arranged downward with respect to the second direction DR2, and the second sub-area BSA2 is arranged upward with respect to the second direction DR2. However, in the surface area DA-1 of one embodiment, the first sub-area BSA1 may be arranged upward with respect to the second direction DR2, and the second sub-area BSA2 may be arranged downward with respect to the second direction DR2. In the display area DA-1 of one embodiment, the third sub-area BSA3 may be arranged upward with respect to the second direction DR2, and the fourth sub-area BSA4 may be arranged downward with respect to the second direction DR2. On the other hand, corresponding to the shape of the vertically inverted bank areas BA1, BA2, BA3, the filter areas FA1, FA2, FA3 and the connection area CNA may also be vertically inverted compared to the embodiment of FIG. 2.
[0229] Referring to FIG. 8b, in the display area DA-2 of one embodiment, each of the first bank area BA1 and the second bank area BA2 may include a portion that is chamfered. In the first bank area BA1, the second sub-area BSA2 may include the first chamfered portion CP1. In the second bank area BA2, the fourth sub-area BSA4 may include the second chamfered portion CP2. The first chamfered portion CP1 may have a shape that is drawn inward from the second-1 side S2-1 into the second sub-area BSA2. The second chamfered portion CP2 may have a shape that is drawn inward from the fourth-1 side S4-1 into the fourth sub-area BSA4.
[0230] Referring to FIG. 8c, in the display area DA-3 of one embodiment, the length of the second bank area BA2 with respect to the second direction DR2 may be shorter than the length of the first bank area BA1 compared to the display area DA of FIG. 2. In one embodiment, the second length L2' of the third sub-area BSA3 with respect to the second direction DR2 may be shorter than the first length L1' of the first sub-area BSA1.
[0231] In the display area DA-3 of one embodiment, the corresponding filter regions FA1, FA2, and FA3 of the first bank region BA1, the second bank region BA2, and the third bank region BA3 may each have a length corresponding to the second direction DR2. That is, the first bank region BA1 may have a length corresponding to the first filter region FA1, the second bank region BA2 may have a length corresponding to the second filter region FA2, and the third bank region BA3 may have a length corresponding to the third filter region FA3.
[0232] In the display area DA-3, the length of the first filter region FA1 with respect to the second direction DR2 may be longer than the length of the second filter region FA2 with respect to the second direction DR2. The length of the second filter region FA2 with respect to the second direction DR2 may be longer than the length of the third filter region FA3 with respect to the second direction DR2. Thereby, the length of the first bank region BA1 with respect to the second direction DR2 may be longer than the length of the second bank region BA2 with respect to the second direction DR2, and the length of the second bank region BA2 with respect to the second direction DR2 may be longer than the length of the third bank region BA3 with respect to the second direction DR2.
[0233] Referring to FIG. 8d, in the display area DA-4 of one embodiment, among the filter regions FA1, FA2, and FA3, the first filter region FA1 and the second filter region FA2 may have a shape in which a part of the width is widened so as to correspond to the first bank region BA1 and the second bank region BA2, respectively. In one embodiment, the first filter region FA1 may include a first sub-filter region SFA1 that overlaps the first sub-region BSA1 and a second sub-filter region SFA2 that overlaps the second sub-region BSA2. The width of the second sub-filter region SFA2 in the second direction DR1 may be larger than the width of the first sub-filter region SFA1 in the first direction DR1. The second filter region FA2 may include a third sub-filter region SFA3 that overlaps the third sub-region BSA3 and a fourth sub-filter region SFA4 that overlaps the fourth sub-region BSA4. The width of the fourth sub-filter region SFA4 in the first direction DR1 may be larger than the width of the third sub-filter region SFA3 in the first direction DR1.
[0234] On the other hand, even if each of the first filter region FA1 and the second filter region FA2 has the second sub-filter region SFA2 and the fourth sub-filter region SFA4 with widened widths, the connection region CNA may be provided so as not to overlap with each of the filter regions FA1, FA2, and FA3.
[0235] FIG. 9 is an enlarged plan view of a part of a display panel according to an embodiment of the present invention. FIG. 9 shows the arrangement relationship between a plurality of filter regions FA1, FA2, FA3 and bank regions BA1, BA2, BA3 in a part of each of the display region DA and the non-display region NDA.
[0236] Referring to FIG. 9, each of the bank regions BA1, BA2, and BA3 may be provided not only in the display region DA but also in at least a part of the non-display region NDA. The first bank region BA1 may include a first-1 bank region BA1-1 provided in the display region DA and a first-2 bank region BA1-2 provided in the non-display region NDA. The above-described first light control pattern CCP-R (see FIG. 4a) may be disposed in each of the first-1 bank region BA1-1 and the first-2 bank region BA1-2. The second bank region BA2 may include a second-1 bank region BA2-1 provided in the display region DA and a second-2 bank region BA2-2 provided in the non-display region NDA. The above-described second light control pattern CCP-G (see FIG. 4a) may be disposed in each of the second-1 bank region BA2-1 and the second-2 bank region BA2-2. The third bank region BA3 may include a third-1 bank region BA3-1 provided in the display region DA and a third-2 bank region BA3-2 provided in the non-display region NDA. The above-described third light control pattern CCP-B (see FIG. 4a) may be disposed in each of the third-1 bank region BA3-1 and the third-2 bank region BA3-2.
[0237] On the other hand, unlike the bank regions BA1, BA2, and BA3, the filter regions FA1, FA2, and FA3 may be provided to the display region DA and not provided to the non-display region NDA. The first filter region FA1 may overlap with the first-1 bank region BA1-1 and may not overlap with the first-2 bank region BA1-2. The second filter region FA2 may overlap with the second-1 bank region BA2-1 and may not overlap with the second-2 bank region BA2-2. The third filter region FA3 may overlap with the third-1 bank region BA3-1 and may not overlap with the third-2 bank region BA3-2.
[0238] Hereinafter, a method for manufacturing a display panel according to an embodiment of the present invention will be described.
[0239] A method for manufacturing a display panel according to an embodiment may include a step of preparing a display element layer including a light-emitting element that outputs source light, and a step of forming an optical structure on the light-emitting element. The step of forming the optical structure includes a step of forming a bank in which a first bank opening to a third bank opening are formed on the light-emitting element, a step of patterning a photoresist material in the third bank opening to form a third light control pattern, and a step of forming a first light control pattern and a second light control pattern respectively by an inkjet process in the first bank opening and the second bank opening. On the other hand, the description of the first bank opening, the second bank opening, the third bank opening, and the bank regions defined by these may be similarly applied to the content described in FIGS. 1a to 9 described above.
[0240] FIGS. 10a to 10d are cross-sectional views showing some steps of a method for manufacturing a display panel according to an embodiment of the present invention. FIGS. 10a to 10d briefly show some steps of the step of forming an optical structure in the method for manufacturing a display panel according to an embodiment.
[0241] Referring to FIG. 10a, a method for manufacturing a display panel according to an embodiment includes a step of forming a bank BMO in which a first bank opening BOH1, a second bank opening BOH2, and a third bank opening BOH3 are formed. The bank BMP may be formed on a base member BLL. The base member BLL may be a member that provides a base surface on which the bank BMP and light control patterns CCP-R, CCP-G, CCP-B (see FIG. 10d) are formed. For example, when manufacturing the display panel DP shown in FIG. 4a, the base member BLL may be the second barrier layer CAP2, and when manufacturing the display panel DP-1 shown in FIG. 4b, the base member BLL may be the first barrier layer CAP1.
[0242] Referring to FIGS. 10b and 10c, a method for manufacturing a display panel according to an embodiment may include a step of applying a photoresist material PRL into at least the third bank opening BOH3 and then patterning it to form a third light control pattern CCP-B. The photoresist material PRL may be provided not only inside the third bank opening BOH3 but also inside the first bank opening BOH1 and the second bank opening BOH2, as shown in FIG. 10b, and may also be provided on the upper part of the bank BMP. That is, the photoresist material PRL may be provided entirely on the upper part of the base member BLL, and after an exposure process for providing light L, the uncured portion may be removed to form the third light control pattern CCP-B. On the other hand, in the step of patterning the photoresist material PRL, a separate photomask may be provided to perform the exposure process only on a part. In FIG. 10b, a negative-type photoresist in which the photoresist material PRL corresponding to the third bank opening BOH3 is irradiated with light L and cured is exemplarily shown, but it is not limited thereto, and the photoresist material PRL may be a positive-type photoresist in which the remaining portion except the third bank opening BOH3 is irradiated with light.
[0243] Referring to FIGS. 10c and 10b, a method for manufacturing a display panel according to an embodiment includes steps of forming a first light control pattern CCP-R and a second light control pattern CCP-G in a first bank opening BOH1 and a second bank opening BOH2 respectively by an inkjet process. The first light control pattern CCP-R may be formed by providing a first ink INK1 into the first bank opening BOH1 through a first nozzle NZ1. The second light control pattern CCP-G may be formed by providing a second ink INK2 into the second bank opening BOH2 through a second nozzle NZ2. Each of the first ink INK1 and the second ink INK2 for forming the first light control pattern CCP-R and the second light control pattern CCP-G respectively may include quantum dots.
[0244] On the other hand, the inkjet landing point where the first ink INK1 is landed through the first nozzle NZ1 may be the second sub-region BSA2 described above with reference to FIG. 6a etc. The inkjet landing point where the second ink INK2 is landed through the second nozzle NZ2 may be the fourth sub-region BSA4 described above with reference to FIG. 6a etc. In the method for manufacturing a display panel according to an embodiment, since the inkjet process of the first ink INK1 and the second ink INK2 is performed through the second sub-region BSA2 and the fourth sub-region BSA4 each having a wide width, the process efficiency of forming the first light control pattern CCP-R and the second light control pattern CCP-G can be improved.
[0245] Although the preferred embodiments of the present invention have been described so far, those skilled in the art or those having ordinary knowledge in the relevant technical field should understand that the present invention can be variously modified and changed without departing from the spirit and technical field of the present invention described in the claims below. Therefore, the technical scope of the present invention should not be limited to the content described in the detailed description of the specification, but should be determined by the claims.
Explanation of Reference Numerals
[0246] DP: Display Panel DP-LED: Display Element Layer OSL: Optical structure layer CCL: Light control layer BMPL bank CFL: Color filter layer BOH1: First bank opening CCP-R: First light control pattern BA1: First bank region CF1: First color filter BSA1: First sub-region BSA2: Second sub-region FA1: First filter region
Claims
1. A display element layer including a light-emitting element that outputs source light, and an optical structure layer disposed on the light-emitting element, the optical structure layer transmitting the source light or converting the source light into light of another wavelength, wherein the optical structure layer includes a bank disposed on the light-emitting element and including a first bank opening, and a light control layer including a first light control pattern disposed in the first bank opening, and a color filter layer disposed on the light control layer and including a first color filter disposed in a first filter region, wherein a first bank region defined by the first bank opening includes a first sub-region having a first width along a first direction and a first length along a second direction intersecting the first direction, and a second sub-region having a second width along the first direction, wherein the second width is larger than the first width, the first filter region overlaps the first sub-region and a part of the second sub-region, a width of the first filter region in the first direction is equal to or less than the first width, and a length of the first filter region in the second direction is equal to or greater than the first length, a display panel.
2. The bank further includes a second bank opening spaced apart from the first bank opening, and a third bank opening spaced apart from each of the first bank opening and the second bank opening, wherein the light control layer further includes a second light control pattern disposed in the second bank opening and a third light control pattern disposed in the third bank opening, the display panel according to claim 1.
3. A second bank region defined by the second bank opening includes a third sub-region having a third width along the first direction and a second length along the second direction, and a fourth sub-region having a fourth width along the first direction, wherein the fourth width is larger than the third width, the display panel according to claim 2.
4. A third bank region is defined by the third bank opening, wherein widths of the first sub-region, the third sub-region, and the third bank region in the first direction are substantially the same, the display panel according to claim 3.
5. The first bank region, the second bank region, and the third bank region are sequentially arranged along the first direction, the first sub-region and the third sub-region are spaced apart by a first separation interval along the first direction, the third sub-region and the third bank region are spaced apart by a second separation interval along the first direction, The display panel according to claim 4, wherein the first separation interval and the second separation interval are substantially the same.
6. The color filter layer A second color filter disposed in a second filter region separated from the first filter region; The display panel according to claim 3, further comprising a third color filter disposed in a third filter region separated from the first filter region and the second filter region.
7. The second filter region Overlaps with the third sub-region and partially overlaps with the fourth sub-region, The width of the second filter region in the first direction is equal to or less than the third width, The display panel according to claim 6, wherein the length of the second filter region in the second direction is equal to or greater than the second length.
8. The widths of the first filter region, the second filter region, and the third filter region in the first direction are substantially the same, The length of the first filter region in the second direction is greater than the length of the second filter region in the second direction, The display panel according to claim 6, wherein the length of the second filter region in the second direction is greater than the length of the third filter region in the second direction.
9. The display panel according to claim 3, wherein the second length is shorter than the first length.
10. A third bank region is defined by the third bank opening, The display panel according to claim 2, wherein the third bank region has a rectangular shape on a plane.
11. A second bank region is defined by the second bank opening, The display panel according to claim 10, wherein the length of the third bank region in the second direction is shorter than the lengths of the first bank region and the second bank region in the second direction.
12. The first light control pattern Including a first quantum dot that converts the source light into light of the first wavelength, The second light control pattern The display panel according to claim 2, including a second quantum dot that converts the source light into light of the second wavelength.
13. The display panel according to claim 2, wherein the second light control pattern includes a photosensitive resin.
14. Further including a circuit element layer including a pixel circuit electrically connected to the light emitting element, The light emitting element A first electrode disposed on the circuit element layer; An intermediate layer disposed on the first electrode and including a light emitting layer; A second electrode disposed on the intermediate layer, The display element It is further included with an auxiliary electrode disposed on the circuit element layer and electrically connected to the second electrode. The display panel according to claim 1, wherein at least a part of the connection region where the auxiliary electrode is disposed overlaps with the second sub-region in a plane.
15. The first sub-region includes a first-1 side and a first-2 side that extend along the second direction and are spaced apart from each other along the first direction. The second sub-region includes a second-1 side and a second-2 side that extend along the second direction and are spaced apart from each other along the first direction. The display panel according to claim 1, wherein the first-2 side and the second-2 side are arranged side by side and aligned along the second direction.
16. The display panel according to claim 15, wherein the second sub-region includes a first chamfered portion that is drawn into the inside of the second sub-region by the second-1 side.
17. The first filter region includes a first sub-filter region that overlaps with the first sub-region, and a second sub-filter region that overlaps with the second sub-region. The display panel according to claim 1, wherein the width of the second sub-filter region in the first direction is larger than the width of the first sub-filter region in the first direction.
18. The display element layer is divided into a display region where the light-emitting element is disposed and a non-display region that surrounds at least a part of the display region. The first bank region includes a first-1 bank region disposed in the display region, and a first-2 bank region disposed in the non-display region.
19. A light-emitting element that outputs source light, and an optical structure layer disposed on the light-emitting element that transmits the source light or converts the source light into light of another wavelength. The optical structure layer includes a bank disposed on the light-emitting element and defining a first bank opening, a second bank opening, and a third bank opening, a first light control pattern disposed in the first bank opening, a second light control pattern disposed in the second bank opening, and a third light control pattern disposed in the third bank opening, and a light control layer. On the light control layer, it includes a first color filter that overlaps with the first light control pattern, a second color filter that overlaps with the second light control pattern, and a third color filter that overlaps with the third light control pattern, and a color filter layer. The first bank region defined by the first bank opening a first sub-region having a first width along a first direction, and a second sub-region having a second width along the first direction, wherein a second bank region defined by the second bank opening includes a third sub-region having a third width along the first direction, and a fourth sub-region having a fourth width along the first direction, wherein the second width is greater than the first width, and the fourth width is greater than the third width, a third bank region is defined by the third bank opening, and a display panel in which widths of the first sub-region, the third sub-region, and the third bank region in the first direction are substantially the same.
20. preparing a display element layer including a light-emitting element that outputs source light; forming an optical structure on the light-emitting element, wherein the step of forming the optical structure includes forming a bank in which a first bank opening, a second bank opening, and a third bank opening are formed on the light-emitting element; patterning a photoresist material in the third bank opening to form a third light control pattern; and forming a first light control pattern and a second light control pattern in the first bank opening and the second bank opening, respectively, by an inkjet process, wherein a first bank region defined by the first bank opening includes a first sub-region having a first width along a first direction, and a second sub-region having a second width along the first direction, wherein a second bank region defined by the second bank opening includes a third sub-region having a third width along the first direction, and a fourth sub-region having a fourth width along the first direction, wherein the second width is greater than the first width, and the fourth width is greater than the third width, and a method for manufacturing a display panel.