DC / DC converter and method of controlling DC / DC converter

Abstract

To improve conversion efficiency while reducing loss by suppressing hard switching and implementing soft switching.SOLUTION: A DC / DC converter includes: a transformer; a primary-side bridge circuit that is connected to a primary side of the transformer, and has a plurality of switching elements which perform ON / OFF switching with a gate signal; a secondary-side bridge circuit that is connected to a secondary side of the transformer, and has a plurality of switching elements which perform ON / OFF switching with a gate signal; and a control unit for controlling the primary-side bridge circuit and the secondary-side bridge circuit. The control unit generates the gate signal, and determines whether or not a transformer current detected by the transformer is inverted in sign. When it is determined that the transformer current is inverted, the control unit generates a screen signal for turning off part of the generated gate signal in a screen period including a timing at which the transformer current is inverted in sign, combines the generated gate signal with the generated screen signal, and outputs the combined signal to the switching element.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present disclosure relates to a DC / DC converter and a method for controlling the DC / DC converter.

Background Art

[0002] Conventionally, a DC / DC converter of a DAB (Dual Active Bridge) type is known (see, for example, Patent Document 1). In this DC / DC converter, intermittent operation is performed in which a transmission period and a pause period are alternately generated, and the transmission power is adjusted by adjusting the length of the pause period. Further, in the DC / DC converter, in intermittent operation, in each of the first full-bridge circuit and the second full-bridge circuit, hard switching is controlled so as to occur in a positive-negative balance over time.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Incidentally, hard switching is likely to occur when the voltage fluctuates (when the primary voltage V1 and the output voltage nV2 obtained by multiplying the turns ratio n of the transformer by the secondary voltage V2 are different voltages as shown in FIG. 1) and under light load conditions. That is, when the voltage fluctuates, the transformer current changes abruptly compared to when the voltage does not fluctuate (V1 = nV2). As a result, in a DC / DC converter, the diode included in the switching element undergoes recovery, temporarily resulting in a short-circuit state, i.e., hard switching, which causes power loss and deterioration of the conversion efficiency. Also, under light load conditions, the transformer current decreases, and even if the primary voltage and the secondary voltage deviate slightly from the standard voltage, the transformer current is likely to cross zero, i.e., the positive and negative polarities are likely to reverse. As a result, in a DC / DC converter, similar to when the voltage fluctuates, the diode undergoes recovery, resulting in hard switching, which causes power loss and deterioration of the conversion efficiency.

[0005] Therefore, an object of the present disclosure is to provide a DC / DC converter and a control method for the DC / DC converter that can suppress hard switching and achieve soft switching, thereby reducing losses and improving the conversion efficiency.

Means for Solving the Problem

[0006] The DC / DC converter of the present disclosure includes a transformer, a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that perform on / off switching by a gate signal, a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that perform on / off switching by a gate signal, and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit. The control unit generates the gate signal, determines whether the positive and negative of the transformer current detected by the transformer are reversed, and when it is determined that the transformer current is reversed, generates a screen signal for turning off a part of the generated gate signal during a screen period including the timing at which the transformer current is reversed between positive and negative, and synthesizes the generated gate signal and the generated screen signal and outputs them to the switching element.

[0007] The control method of the DC / DC converter of the present disclosure is a control method of a DC / DC converter including a transformer, a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that perform on / off switching by a gate signal, a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that perform on / off switching by a gate signal, and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit. The control unit generates the gate signal, determines whether the positive and negative of the transformer current detected by the transformer are reversed, and when it is determined that the transformer current is reversed, generates a screen signal for turning off a part of the generated gate signal during a screen period including the timing at which the transformer current is reversed between positive and negative, and synthesizes the generated gate signal and the generated screen signal and outputs them to the switching element.

Advantages of the Invention

[0008] According to the present disclosure, by suppressing hard switching and performing soft switching, it is possible to improve the conversion efficiency while reducing losses.

Brief Description of the Drawings

[0009] [Figure 1] Figure 1 is a schematic configuration diagram of the DC / DC converter according to this embodiment. [Diagram 2] Figure 2 is a graph of the gate signal during the boost operation in the normal mode of the DC / DC converter. [Figure 3] Figure 3 is a graph of the gate signal during the buck operation in the normal mode of the DC / DC converter. [Figure 4] Figure 4 is a block diagram of the control device of the DC / DC converter according to this embodiment. [Figure 5] Figure 5 is a graph of the gate signal during the boost operation in the screen mode of the DC / DC converter. [Figure 6] Figure 6 is a graph of the gate signal during the buck operation in the screen mode of the DC / DC converter. [Figure 7] Figure 7 is a flowchart of an example of the control method of the DC / DC converter according to this embodiment. [Figure 8] Figure 8 is a flowchart of an example of the control method of the DC / DC converter according to this embodiment. [Figure 9] Figure 9 is a flowchart of an example of the control method of the DC / DC converter according to this embodiment. [Figure 10] Figure 10 is a flowchart of an example of the control method of the DC / DC converter according to this embodiment. [Figure 11] Figure 11 is a flowchart of an example of the control method of the DC / DC converter according to this embodiment.

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments according to the present disclosure will be described in detail with reference to the drawings. Note that the present disclosure is not limited by these embodiments. In addition, the components in the following embodiments include those that can be replaced and are easy for those skilled in the art, or those that are substantially the same. Furthermore, the components described below can be combined as appropriate, and when there are multiple embodiments, it is also possible to combine each embodiment.

[0011] [This embodiment] The DC / DC converter 10 according to this embodiment is a so-called DAB (Dual Active Bridge) type bidirectional DC / DC converter. FIG. 1 is a schematic configuration diagram of the DC / DC converter according to this embodiment. With reference to FIG. 1, the DC / DC converter 10 will be described.

[0012] (DC / DC converter) The DC / DC converter includes a transformer 20, a primary side bridge circuit 21, a secondary side bridge circuit 22, and a control device (see FIG. 4) 25.

[0013] The transformer 20 has a primary coil W1 and a secondary coil W2. When the number of turns of the secondary coil W2 is set to 1, the winding ratio of the primary coil W1 to the secondary coil W2 is n:1. The primary side bridge circuit 21 is connected to the primary coil W1 of the transformer 20 via an inductor L1. Also, the secondary side bridge circuit 22 is connected to the secondary coil W2 of the transformer 20 via an inductor L2.

[0014] The primary side bridge circuit 21 includes a first switching element Q1, a second switching element Q2, a third switching element Q3, a fourth switching element Q4, and a primary capacitor C1. The first switching element Q1 and the second switching element Q2 are connected in series, and the third switching element Q3 and the fourth switching element Q4 are connected in series. The first switching element Q1 and the second switching element Q2, the third switching element Q3 and the fourth switching element Q4, and the primary capacitor C1 are connected in parallel.

[0015] The anode side of the first switching element Q1 is connected to one terminal side (inductor L1 side) of the primary coil W1, and the cathode side is connected to the other terminal side of the primary coil W1 via the third switching element Q3. The cathode side of the second switching element Q2 is connected to one terminal side of the primary coil W1, and the anode side is connected to the other terminal side of the primary coil W1 via the fourth switching element Q4. The anode side of the third switching element Q3 is connected to the other terminal side of the primary coil W1, and the cathode side is connected to one terminal side of the primary coil W1 via the first switching element Q1. The cathode side of the fourth switching element Q4 is connected to the other terminal side of the primary coil W1, and the anode side is connected to one terminal side of the primary coil W1 via the second switching element Q2. The first switching element Q1 and the fourth switching element Q4 operate synchronously, and the second switching element Q2 and the third switching element Q3 operate synchronously.

[0016] The primary capacitor C1 is connected to the cathode side of the diode of the first switching element Q1 and the anode side of the diode of the second switching element Q2.

[0017] The secondary side bridge circuit 22 includes a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, an eighth switching element Q8, and a secondary capacitor C2. The fifth switching element Q5 and the sixth switching element Q6 are connected in series, and the seventh switching element Q7 and the eighth switching element Q8 are connected in series. The fifth switching element Q5 and the sixth switching element Q6, the seventh switching element Q7 and the eighth switching element Q8, and the secondary capacitor C2 are connected in parallel.

[0018] The anode side of the fifth switching element Q5 is connected to one terminal side (inductor L2 side) of the secondary coil W2, and the cathode side is connected to the other terminal side of the secondary coil W2 via the seventh switching element Q7. The cathode side of the sixth switching element Q6 is connected to one terminal side of the secondary coil W2, and the anode side is connected to the other terminal side of the secondary coil W2 via the eighth switching element Q8. The anode side of the seventh switching element Q7 is connected to the other terminal side of the secondary coil W2, and the cathode side is connected to one terminal side of the secondary coil W2 via the fifth switching element Q5. The cathode side of the eighth switching element Q8 is connected to the other terminal side of the secondary coil W2, and the anode side is connected to one terminal side of the secondary coil W2 via the sixth switching element Q6. The fifth switching element Q5 and the eighth switching element Q8 operate synchronously, and the sixth switching element Q6 and the seventh switching element Q7 operate synchronously.

[0019] The secondary capacitor C2 is connected to the cathode side of the diode of the seventh switching element Q7 and the anode side of the diode of the eighth switching element Q8.

[0020] These switching elements Q1 to Q8 include diodes, and for example, power semiconductor switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) are applicable. The switching elements Q1 to Q8 perform on / off switching when a gate signal is input.

[0021] Hereinafter, for simplicity of explanation, the primary side is described as the input side and the secondary side is described as the output side. Note that the power transmission direction is described as the direction from the primary side bridge circuit 21 to the secondary side bridge circuit 22. However, the same control is performed even when the power is transmitted in the reverse direction, that is, from the secondary side bridge circuit 22 to the primary side bridge circuit 21. When the power transmission direction is reversed, the corresponding switching elements of the primary side bridge circuit 21 and the secondary side bridge circuit 22 (Q1 and Q5, Q2 and Q6, Q3 and Q7, Q4 and Q8) are interchanged, and the reverse flow of the transformer current iac described later may be regarded as positive. Also, the voltage on the primary side is V1, and the voltage on the secondary side is V2. In this embodiment, the boost operation of the DC / DC converter 10 takes into account the turns ratio, and is an operation in which the output voltage nV2 is larger than the input voltage V1. Also, in this embodiment, the buck operation of the DC / DC converter 10 takes into account the turns ratio, and is an operation in which the output voltage nV2 is smaller than the input voltage V1.

[0022] Next, with reference to FIGS. 2 and 3, in the normal mode of the DC / DC converter, the gate signals in the boost operation and the buck operation will be described. FIG. 2 is a graph of the gate signal during the boost operation in the normal mode of the DC / DC converter. FIG. 3 is a graph of the gate signal during the buck operation in the normal mode of the DC / DC converter. In FIGS. 2 and 3, the gate signals input to the first switching element Q1 and the fourth switching element Q4 are denoted as the gate signal Vg(Q1,Q4). Similarly, the gate signals input to the second switching element Q2 and the third switching element Q3 are denoted as the gate signal Vg(Q2,Q3), the gate signals input to the fifth switching element Q5 and the eighth switching element Q8 are denoted as the gate signal Vg(Q5,Q8), and the gate signals input to the sixth switching element Q6 and the seventh switching element Q7 are denoted as the gate signal Vg(Q6,Q7). Also, when the gate signal Vg is in the High state, the switching elements Q1~Q8 are in the on state, and when the gate signal Vg is in the Low state, the switching elements Q1~Q8 are in the off state.

[0023] When performing the boost operation in the normal mode of the DC / DC converter, the gate signal Vg changes as shown in FIG. 2 during one control cycle. Specifically, at the timing when the gate signal Vg(Q1,Q4) switches to the High state, the gate signal Vg(Q2,Q3) and the gate signal Vg(Q5,Q8) are in the Low state, and the gate signal Vg(Q6,Q7) is in the High state. After that, after the gate signal Vg(Q6,Q7) becomes the Low state, the gate signal Vg(Q5,Q8) becomes the High state. After a predetermined period, after the gate signal Vg(Q1,Q4) switches to the Low state, the gate signal Vg(Q2,Q3) becomes the High state. After that, after the gate signal Vg(Q5,Q8) becomes the Low state, the gate signal Vg(Q6,Q7) becomes the High state. After a predetermined period, before the gate signal Vg(Q1,Q4) switches to the High state, the gate signal Vg(Q2,Q3) becomes the Low state.

[0024] On the other hand, when performing step-down operation in the normal mode of the DC / DC converter, the gate signal Vg changes as shown in FIG. 3 during one control cycle. Note that since the on / off switching timing of the gate signal Vg is almost the same as that in FIG. 2, the description thereof is omitted.

[0025] When the DC / DC converter is operated in the normal mode, recovery may occur in the diodes of the switching elements Q1 to Q8, resulting in hard switching. During the boost operation in FIG. 2, it is the on-time of the gate signals Vg(Q2, Q3) and the on-time of the gate signals Vg(Q1, Q4). During the step-down operation in FIG. 3, it is the on-time of the gate signals Vg(Q5, Q8) and the on-time of the gate signals Vg(Q6, Q7). In order to suppress the occurrence of recovery, the control device (control unit) 25 executes the following processing in the generation of the gate signal. Hereinafter, the control device 25 will be described with reference to FIG. 4.

[0026] FIG. 4 is a block diagram of the control device of the DC / DC converter according to the present embodiment. The control device 25 includes a gate signal generation unit 31, a transformer current detection circuit 32, a logic circuit 33, and a gate drive circuit 34.

[0027] The gate signal generation unit 31 is a processing unit that generates a gate signal Vg (original gate signal) with a duty ratio of about 50% used in normal DAB control. For example, a microcomputer or the like is used. A screen signal or a signal capable of determining the presence or absence of the output of the screen signal is input to the gate signal generation unit 31 from a first logic circuit 33a described later. The gate signal generation unit 31 switches between the normal mode and the screen mode based on the presence or absence of the input of the screen signal. That is, when there is an input of the screen signal, the gate signal generation unit 31 generates a gate signal Vg corresponding to the screen mode, while when there is no input of the screen signal, the gate signal generation unit 31 generates a gate signal Vg corresponding to the normal mode.

[0028] Here, the screen mode is a mode for suppressing the occurrence of hard switching in the DC / DC converter 10. On the other hand, the normal mode is a mode when the DC / DC converter 10 is operating normally.

[0029] The transformer current detection circuit 32 detects the transformer current iac flowing in the transformer 20. The transformer current detection circuit 32 outputs a signal corresponding to the positive or negative of the detected transformer current iac to the logic circuit 33.

[0030] The logic circuit 33 receives a gate signal from the gate signal generation unit 31 and a signal corresponding to the positive or negative of the transformer current iac from the transformer current detection circuit 32. The logic circuit 33 determines whether to operate in the normal mode or the screen mode based on the signal corresponding to the positive or negative of the input transformer current iac, and generates a screen signal when operating in the screen mode.

[0031] The logic circuit 33 includes a first logic circuit 33a and a second logic circuit 33b. The first logic circuit 33a is a circuit that generates a screen signal, and has a boost logic 33a1 that generates a screen signal during boost operation and a buck logic 33a2 that generates a screen signal during buck operation. The second logic circuit 33b is a circuit that outputs the original gate signal when in the normal mode and outputs a gate signal obtained by synthesizing the original gate signal and the screen signal when in the screen mode. The second logic circuit 33b has a boost logic 33b1 that synthesizes signals during boost operation and a buck logic 33b2 that synthesizes signals during buck operation.

[0032] The gate drive circuit 34 is a circuit that drives the switching elements Q1 to Q8 based on the gate signal output from the second logic circuit 33b.

[0033] Here, referring to FIGS. 5 and 6, the screen signal generated by the control device 25, the gate signal synthesized with the screen signal, and the transformer current iac will be described. FIG. 5 is a graph of the gate signal during the step-up operation in the screen mode of the DC / DC converter. FIG. 6 is a graph of the gate signal during the step-down operation in the screen mode of the DC / DC converter.

[0034] The screen signal generated during the step-up operation in the screen mode of the DC / DC converter 10 is the signal shown in FIG. 5. Specifically, the screen signal becomes High when the gate signal Vg(Q1,Q4) is in the High state and the timing when the transformer current iac reverses from positive to negative. After that, the screen signal becomes Low when the timing when the gate signal Vg(Q2,Q3) switches to the High state. Also, the screen signal becomes High when the gate signal Vg(Q2,Q3) is in the High state and the timing when the transformer current iac reverses from negative to positive. After that, the screen signal becomes Low when the timing when the gate signal Vg(Q1,Q4) switches to the High state. Note that the period during which the screen signal is in the High state is defined as the screen period.

[0035] During the step-up operation, the generated screen signal is synthesized with the gate signal Vg in the secondary-side bridge circuit 22. Specifically, when the screen signal is in the High state and the gate signal Vg(Q5,Q6,Q7,Q8) is in the High state, in the overlapping section, the gate signal Vg(Q5,Q6,Q7,Q8) is set to the Low state. On the other hand, during the step-up operation, the generated screen signal is not synthesized with the gate signal Vg in the primary-side bridge circuit 21, and the original gate signal is output as it is.

[0036] The screen signal generated during the step-down operation in the screen mode of the DC / DC converter 10 is the signal shown in FIG. 6. Specifically, when the timing at which the gate signal Vg(Q1, Q4) switches to the High state occurs, the screen signal becomes High. After that, when the timing at which the gate signal Vg(Q5, Q8) switches to the High state occurs, the screen signal becomes Low. Also, when the timing at which the gate signal Vg(Q2, Q3) switches to the High state occurs, the screen signal becomes High. After that, when the timing at which the gate signal Vg(Q6, Q7) switches to the High state occurs, the screen signal becomes Low.

[0037] During the step-down operation, the generated screen signal is combined with the gate signal Vg in the primary-side bridge circuit 21. Specifically, when the screen signal is in the High state and the gate signal Vg(Q1, Q2, Q3, Q4) is in the High state, in the overlapping section of the High states, the gate signal Vg(Q1, Q2, Q3, Q4) is set to the Low state. On the other hand, during the step-down operation, the generated screen signal is not combined with the gate signal Vg in the secondary-side bridge circuit 22, and the original gate signal is output as it is.

[0038] In this way, by executing the on / off switching of the switching elements Q1 to Q8 with the gate signal combined with the screen signal, during the boost operation and the step-down operation, the transformer current iac becomes stable near zero, the occurrence of recovery is suppressed, and soft switching (ZCS: Zero Current Switching) can be achieved.

[0039] (Control Method of DC / DC Converter) Next, with reference to FIGS. 7 to 11, the control method of the DC / DC converter 10 will be described. FIGS. 7 to 11 are flowcharts of an example related to the control method of the DC / DC converter according to the present embodiment.

[0040] The control method shown in FIG. 7 is a process of determining whether it is in the normal mode or the screen mode in the gate signal generation unit 31 and generating the gate signal Vg. The gate signal generation unit 31 determines from the first logic circuit 33a whether a screen signal has been input (whether the screen period is greater than zero) (step S1). When the gate signal generation unit 31 determines that a screen signal has been input (step S1: Yes), it executes the operation mode of the DC / DC converter 10 as the screen mode and determines whether the voltage on the output side is the desired output (step S2). When the gate signal generation unit 31 determines that it is the desired output (step S2: Yes), it generates a gate signal Vg corresponding to the screen mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S3). On the other hand, in step S2, when the gate signal generation unit 31 determines that it is not the desired output (step S2: No), it adjusts the voltage on the output side by adjusting the phase difference between the gate signals Vg (step S4). After that, the gate signal generation unit 31 generates a gate signal Vg with the phase difference corresponding to the screen mode adjusted and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S5).

[0041] When the gate signal generation unit 31 determines in step S1 that no screen signal is input (step S1: No), it executes the operation mode of the DC / DC converter 10 in the normal mode and determines whether the voltage on the output side is the desired output (step S7). When the gate signal generation unit 31 determines that it is the desired output (step S7: Yes), it generates a gate signal Vg corresponding to the operation mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S8). On the other hand, in step S7, when the gate signal generation unit 31 determines that it is not the desired output (step S7: No), it adjusts the voltage on the output side by adjusting the phase difference between the gate signals Vg (step S9). After that, the gate signal generation unit 31 generates a gate signal Vg with the phase difference adjusted corresponding to the normal mode and outputs it to the first logic circuit 33a and the second logic circuit 33b (step S10).

[0042] After executing steps S3, S5, S8, and S10, the gate signal generation unit 31 ends the process of generating the gate signal Vg.

[0043] Next, the control method shown in FIG. 8 is a process of generating a screen signal in the boost logic 33a1 of the first logic circuit 33a in the case of the screen mode. The first logic circuit 33a determines whether the transformer current iac is positive at the timing when the gate signal Vg (Q2, Q3) becomes High (when Q2 and Q3 are ON) based on the original gate signal input from the gate signal generation unit 31 and the signal corresponding to the positive and negative of the transformer current iac input from the transformer current detection circuit 32 (step S21).

[0044] When the first logic circuit 33a determines that the condition of step S21 is satisfied (step S21: Yes), it assumes that the operation mode of the DC / DC converter 10 is the screen mode, generates a screen signal shown on the right side of FIG. 5, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S22). Specifically, the screen signal (second screen signal) generated in step S22 becomes a high state at the timing when the gate signal Vg(Q2,Q3) is in the high state and the transformer current iac reverses from negative to positive, and becomes a low state at the timing when the gate signal Vg(Q1,Q4) switches to the high state.

[0045] When the first logic circuit 33a determines that the condition of step S21 is not satisfied (step S21: No), it determines whether the transformer current iac is negative at the timing when the gate signal Vg(Q1,Q4) becomes a high state (when Q1,Q4 are ON) (step S23).

[0046] When the first logic circuit 33a determines that the condition of step S23 is satisfied (step S23: Yes), it assumes that the operation mode of the DC / DC converter 10 is the screen mode, generates a screen signal shown on the left side of FIG. 5, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S22). Specifically, the screen signal (first screen signal) generated in step S22 becomes a high state at the timing when the gate signal Vg(Q1,Q4) is in the high state and the transformer current iac reverses from positive to negative, and becomes a low state at the timing when the gate signal Vg(Q2,Q3) switches to the high state.

[0047] When the first logic circuit 33a determines that the condition of step S23 is not satisfied (step S23: No), it assumes that the operation mode of the DC / DC converter 10 is the normal mode, generates a screen signal that becomes a low state, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S24).

[0048] After the execution of steps S22 and S24, the first logic circuit 33a ends the process of generating the screen signal.

[0049] Next, the control method shown in FIG. 9 is a process of synthesizing a screen signal with a gate signal in the boosting logic 33b1 of the second logic circuit 33b. The second logic circuit 33b determines whether the gate signal Vg (Q5, Q6, Q7, Q8) is in the High state and whether the screen signal is in the High state based on the original gate signal Vg input from the gate signal generation unit 31 and the screen signal input from the first logic circuit 33a (step S31). When the second logic circuit 33b determines that the condition of step S31 is satisfied (step S31: Yes), it generates a gate signal Vg with the gate signal Vg (Q5, Q6, Q7, Q8) in the Low state in the overlapping section of the High states and outputs it to the gate drive circuit 34 (step S32). When the second logic circuit 33b determines that the condition of step S31 is not satisfied (step S31: No), it outputs the original gate signal Vg to the gate drive circuit 34 (step S33).

[0050] After the execution of steps S32 and S33, the second logic circuit 33b ends the process of synthesizing the screen signal with the gate signal Vg.

[0051] Next, the control method shown in FIG. 10 is a process of generating a screen signal in the case of the screen mode in the bucking logic 33a2 of the first logic circuit 33a. The first logic circuit 33a determines whether the transformer current iac is negative at the timing when the gate signal Vg (Q5, Q8) becomes in the High state (when Q5 and Q8 are ON) based on the original gate signal input from the gate signal generation unit 31 and the signal corresponding to the positive and negative of the transformer current iac input from the transformer current detection circuit 32 (step S41).

[0052] When the first logic circuit 33a determines that the condition of step S41 is satisfied (step S41: Yes), it assumes that the operation mode of the DC / DC converter 10 is the screen mode, generates the screen signal shown on the left side of FIG. 6, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S42). Specifically, the screen signal (the third screen signal) generated in step S42 becomes High at the timing when the gate signal Vg(Q1,Q4) switches to the High state and becomes Low at the timing when the gate signal Vg(Q5,Q8) switches to the High state.

[0053] When the first logic circuit 33a determines that the condition of step S41 is not satisfied (step S41: No), it determines whether the transformer current iac is positive at the timing when the gate signal Vg(Q6,Q7) becomes High (when Q6 and Q7 are ON) (step S43).

[0054] When the first logic circuit 33a determines that the condition of step S43 is satisfied (step S43: Yes), it assumes that the operation mode of the DC / DC converter 10 is the screen mode, generates the screen signal shown on the right side of FIG. 6, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S42). Specifically, the screen signal (the fourth screen signal) generated in step S42 becomes High at the timing when the gate signal Vg(Q2,Q3) switches to the High state and becomes Low at the timing when the gate signal Vg(Q6,Q7) switches to the High state.

[0055] When the first logic circuit 33a determines that the condition of step S43 is not satisfied (step S43: No), it assumes that the operation mode of the DC / DC converter 10 is the normal mode, generates a screen signal that becomes Low, and outputs it to the gate signal generation unit 31 and the second logic circuit 33b (step S44).

[0056] After executing steps S42 and S44, the first logic circuit 33a ends the process of generating the screen signal.

[0057] Next, in the step-down logic 33b2 of the second logic circuit 33b in the control method shown in FIG. 11, the process is to synthesize the screen signal with the gate signal. The second logic circuit 33b determines whether the gate signal Vg(Q1, Q2, Q3, Q4) is in the High state and whether the screen signal is in the High state based on the original gate signal Vg input from the gate signal generation unit 31 and the screen signal input from the first logic circuit 33a (step S51). When the second logic circuit 33b determines that the condition of step S51 is satisfied (step S51: Yes), it generates a gate signal Vg with the gate signal Vg(Q1, Q2, Q3, Q4) in the Low state in the overlapping section of the High states and outputs it to the gate drive circuit 34 (step S52). When the second logic circuit 33b determines that the condition of step S51 is not satisfied (step S51: No), it outputs the original gate signal Vg to the gate drive circuit 34 (step S53).

[0058] After executing steps S52 and S53, the second logic circuit 33b ends the process of synthesizing the screen signal with the gate signal.

[0059] In this embodiment, the positive and negative of the transformer current iac are detected using the transformer current detection circuit 32, and the screen signal is generated based on the detection result. However, the configuration is not particularly limited to this. The timing of the inversion of the positive and negative of the transformer current iac may be estimated using an estimator, and the screen signal may be generated based on the estimation result.

[0060] Also, in this embodiment, the screen signal is generated so that the transformer current iac becomes stable near zero. However, the screen signal may be generated so that the transformer current iac becomes a value offset from zero to a predetermined positive or negative value.

[0061] As described above, the DC / DC converter 10 and the control method of the DC / DC converter 10 according to the present embodiment can be understood as follows, for example.

[0062] The DC / DC converter 10 according to the first aspect includes a transformer 20, a primary side bridge circuit 21 connected to the primary side of the transformer 20 and having a plurality of switching elements that perform on / off switching by a gate signal Vg, a secondary side bridge circuit 22 connected to the secondary side of the transformer 20 and having a plurality of switching elements that perform on / off switching by the gate signal Vg, and a control unit (control device 25) that controls the primary side bridge circuit 21 and the secondary side bridge circuit 22. The control unit generates the gate signal Vg, determines whether the positive / negative of the transformer current iac detected by the transformer 20 is reversed, and when it is determined that the transformer current iac is reversed, generates a screen signal for turning off a part of the generated gate signal Vg in a screen period including the timing at which the transformer current iac is reversed between positive and negative, and synthesizes the generated gate signal Vg and the generated screen signal and outputs them to the switching element.

[0063] According to this configuration, hard switching generated by the reversal of the transformer current iac between positive and negative can be suppressed, and soft switching can be achieved. Therefore, while reducing losses, the conversion efficiency can be improved.

[0064] As a second aspect, in the DC / DC converter 10 according to the first aspect, the primary-side bridge circuit 21 includes a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4. The anode side of the first switching element Q1 is connected to one terminal side of the primary coil (primary coil W1) of the transformer 20, and the cathode side is connected to the other terminal side of the primary coil via the third switching element Q3. The cathode side of the second switching element Q2 is connected to one terminal side of the primary coil, and the anode side is connected to the other terminal side of the primary coil via the fourth switching element Q4. The third switching element Q3 operates in synchronization with the second switching element Q2, and its anode side is connected to the other terminal side of the primary coil, and its cathode side is connected to one terminal side of the primary coil via the first switching element Q1. The fourth switching element Q4 operates in synchronization with the first switching element Q1, and its cathode side is connected to the other terminal side of the primary coil, and its anode side is connected to one terminal side of the primary coil via the second switching element Q2. The secondary-side bridge circuit 22 includes a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8. The anode side of the fifth switching element Q5 is connected to one terminal side of the secondary coil (secondary coil W2) of the transformer 20, and the cathode side is connected to the other terminal side of the secondary coil via the seventh switching element Q7. The cathode side of the sixth switching element Q6 is connected to one terminal side of the secondary coil, and the anode side is connected to the other terminal side of the secondary coil via the eighth switching element Q8. The seventh switching element Q7 operates in synchronization with the sixth switching element Q6, and its anode side is connected to the other terminal side of the secondary coil, and its cathode side is connected to one terminal side of the secondary coil via the fifth switching element Q5. The eighth switching element Q8 operates in synchronization with the fifth switching element Q5, andThe cathode side is connected to the other terminal side of the secondary coil, and the anode side is connected to one terminal side of the secondary coil via the sixth switching element Q6. Let the voltage in the primary side bridge circuit 21 be V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer 20 be n:1, and the voltage in the secondary side bridge circuit 22 be V2. Then, during the step-up operation when the voltage nV2 is greater than the voltage V1, when the transformer current iac reverses from positive to negative, during the blanking period, the control unit generates the first blanking signal for turning off the gate signals Vg of the fifth switching element Q5 and the eighth switching element Q8. When the transformer current iac reverses from negative to positive, during the blanking period, the control unit generates the second blanking signal for turning off the gate signals Vg of the sixth switching element Q6 and the seventh switching element Q7.

[0065] According to this configuration, the first blanking signal and the second blanking signal can preferably suppress the hard switching generated during the step-up operation.

[0066] As a third aspect, in the DC / DC converter 10 according to the second aspect, the first blanking signal becomes an on state at the timing when the first switching element Q1 and the fourth switching element Q4 are in the on state and the transformer current iac becomes negative, and becomes an off state at the timing when the second switching element Q2 and the third switching element Q3 become in the on state.

[0067] According to this configuration, it is possible to generate the first blanking signal that can preferably suppress hard switching.

[0068] As a fourth aspect, in the DC / DC converter 10 according to the second or third aspect, the second screen signal becomes an on state at a timing when the second switching element Q2 and the third switching element Q3 are in an on state and the transformer current iac becomes positive, and becomes an off state at a timing when the first switching element Q1 and the fourth switching element Q4 are in an on state.

[0069] According to this configuration, it is possible to generate a second screen signal that can suitably suppress hard switching.

[0070] As a fifth aspect, in the DC / DC converter 10 according to any one of the first to fourth aspects, the primary-side bridge circuit 21 includes a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4. The anode side of the first switching element Q1 is connected to one terminal side of the primary-side coil of the transformer 20, and the cathode side is connected to the other terminal side of the primary-side coil via the third switching element Q3. The cathode side of the second switching element Q2 is connected to one terminal side of the primary-side coil, and the anode side is connected to the other terminal side of the primary-side coil via the fourth switching element Q4. The third switching element Q3 operates in synchronization with the second switching element Q2, and the anode side is connected to the other terminal side of the primary-side coil, and the cathode side is connected to one terminal side of the primary-side coil via the first switching element Q1. The fourth switching element Q4 operates in synchronization with the first switching element Q1, and the cathode side is connected to the other terminal side of the primary-side coil, and the anode side is connected to one terminal side of the primary-side coil via the second switching element Q2. The secondary-side bridge circuit 22 includes a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8. The anode side of the fifth switching element Q5 is connected to one terminal side of the secondary-side coil of the transformer 20, and the cathode side is connected to the other terminal side of the secondary-side coil via the seventh switching element Q7. The cathode side of the sixth switching element Q6 is connected to one terminal side of the secondary-side coil, and the anode side is connected to the other terminal side of the secondary-side coil via the eighth switching element Q8. The seventh switching element Q7 operates in synchronization with the sixth switching element Q6, and the anode side is connected to the other terminal side of the secondary-side coil, and the cathode side is connected to one terminal side of the secondary-side coil via the fifth switching element Q5. The eighth switching element Q8 operates in synchronization with the fifth switching element Q5, andThe cathode side is connected to the other terminal side of the secondary coil, and the anode side is connected to one terminal side of the secondary coil via the sixth switching element Q6. Let the voltage in the primary side bridge circuit 21 be V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer 20 be n:1, and the voltage in the secondary side bridge circuit 22 be V2. Then, when the voltage nV2 is smaller than the voltage V1 during the step-down operation and the transformer current iac reverses from negative to positive, during the blanking period, the control unit generates a third blanking signal for turning off the gate signals Vg of the first switching element Q1 and the fourth switching element Q4. When the transformer current iac reverses from positive to negative, during the blanking period, the control unit generates a fourth blanking signal for turning off the gate signals Vg of the second switching element Q2 and the third switching element Q3.

[0071] According to this configuration, the third blanking signal and the fourth blanking signal can preferably suppress the hard switching generated during the step-down operation.

[0072] As a sixth aspect, in the DC / DC converter 10 according to the fifth aspect, the third blanking signal is a signal that becomes on at the timing when the first switching element Q1 and the fourth switching element Q4 become on, and becomes off at the timing when the fifth switching element Q5 and the eighth switching element Q8 become on.

[0073] According to this configuration, a third blanking signal capable of preferably suppressing hard switching can be generated.

[0074] As a seventh aspect, in the DC / DC converter 10 according to the fifth or sixth aspect, the fourth screen signal becomes an on state at a timing when the second switching element Q2 and the third switching element Q3 are in an on state, and becomes an off state at a timing when the sixth switching element Q6 and the seventh switching element Q7 are in an on state.

[0075] According to this configuration, a fourth screen signal that can preferably suppress hard switching can be generated.

[0076] A control method for a DC / DC converter according to an eighth aspect includes a transformer 20, a primary-side bridge circuit 21 connected to the primary side of the transformer 20 and having a plurality of switching elements that perform on / off switching by a gate signal Vg, a secondary-side bridge circuit 22 connected to the secondary side of the transformer 20 and having a plurality of switching elements that perform on / off switching by a gate signal Vg, and a control unit that controls the primary-side bridge circuit 21 and the secondary-side bridge circuit 22. In the control method for the DC / DC converter, the control unit generates the gate signal Vg, determines whether the positive / negative of the transformer current iac detected by the transformer 20 reverses, and when it is determined that the transformer current iac reverses, generates a screen signal for turning off a part of the generated gate signal Vg in a screen period including a timing at which the transformer current iac reverses between positive and negative, and synthesizes the generated gate signal Vg and the generated screen signal and outputs them to the switching element.

[0077] According to this configuration, hard switching generated by the reversal of the transformer current iac between positive and negative can be suppressed, and soft switching can be achieved. Therefore, it is possible to improve the conversion efficiency while reducing losses.

Explanation of Reference Numerals

[0078] 10 DC / DC converter 20 Transformer 21 Primary-side bridge circuit 22 Secondary bridge circuit 25 Control device 31 Gate signal generation unit 32 Transformer current detection circuit 33 Logic circuit 33a First logic circuit 33a1 Boost logic 33a2 Buck logic 33b Second logic circuit 33b1 Boost logic 33b2 Buck logic 34 Gate drive circuit W1 Primary coil W2 Secondary coil Q1~Q8 First to eighth switching elements

Claims

1. A transformer, a primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal, a secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal, and a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit, wherein the control unit generates the gate signal, determines whether the positive / negative of the transformer current detected by the transformer reverses, when it is determined that the transformer current reverses, generates a blanking signal for turning off a part of the generated gate signal during a blanking period including the timing at which the transformer current reverses between positive and negative, and synthesizes the generated gate signal and the generated blanking signal and outputs the result to the switching element, a DC / DC converter.

2. The primary-side bridge circuit has a first switching element, a second switching element, a third switching element, and a fourth switching element, wherein the first switching element has an anode side connected to one terminal side of the coil on the primary side of the transformer and a cathode side connected to the other terminal side of the primary-side coil via the third switching element, the second switching element has a cathode side connected to one terminal side of the primary-side coil and an anode side connected to the other terminal side of the primary-side coil via the fourth switching element, the third switching element operates in synchronization with the second switching element, has an anode side connected to the other terminal side of the primary-side coil, and a cathode side connected to one terminal side of the primary-side coil via the first switching element, the fourth switching element operates in synchronization with the first switching element, has a cathode side connected to the other terminal side of the primary-side coil, and an anode side connected to one terminal side of the primary-side coil via the second switching element, and the secondary-side bridge circuit has a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element, The anode side of the fifth switching element is connected to one terminal side of the secondary coil of the transformer, and the cathode side is connected to the other terminal side of the secondary coil via the seventh switching element. The cathode side of the sixth switching element is connected to one terminal side of the secondary coil, and the anode side is connected to the other terminal side of the secondary coil via the eighth switching element. The seventh switching element operates in synchronization with the sixth switching element. The anode side is connected to the other terminal side of the secondary coil, and the cathode side is connected to one terminal side of the secondary coil via the fifth switching element. The eighth switching element operates in synchronization with the fifth switching element. The cathode side is connected to the other terminal side of the secondary coil, and the anode side is connected to one terminal side of the secondary coil via the sixth switching element. Let the voltage in the primary side bridge circuit be V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer be n:1, and the voltage in the secondary side bridge circuit be V2. The control unit During the boost operation when the voltage nV2 is greater than the voltage V1, When the transformer current reverses from positive to negative, during the blanking period, a first blanking signal for turning off the gate signals of the fifth switching element and the eighth switching element is generated. The DC / DC converter according to claim 1, wherein when the transformer current reverses from negative to positive, during the blanking period, a second blanking signal for turning off the gate signals of the sixth switching element and the seventh switching element is generated.

3. The first blanking signal Is a signal that becomes on at the timing when the first switching element and the fourth switching element are in the on state and the transformer current becomes negative, and becomes off at the timing when the second switching element and the third switching element become in the on state. The DC / DC converter according to claim 2.

4. The second blanking signal Is a signal that becomes on at the timing when the second switching element and the third switching element are in the on state and the transformer current becomes positive. ​ The DC / DC converter according to claim 2, wherein a signal that becomes an off state is output at a timing when the first switching element and the fourth switching element are in an on state.

5. The primary-side bridge circuit includes: a first switching element, a second switching element, a third switching element, and a fourth switching element; the first switching element has an anode side connected to one terminal side of the primary coil of the transformer, and a cathode side connected to the other terminal side of the primary coil via the third switching element; the second switching element has a cathode side connected to one terminal side of the primary coil, and an anode side connected to the other terminal side of the primary coil via the fourth switching element; the third switching element operates in synchronization with the second switching element, has an anode side connected to the other terminal side of the primary coil, and a cathode side connected to one terminal side of the primary coil via the first switching element; the fourth switching element operates in synchronization with the first switching element, has a cathode side connected to the other terminal side of the primary coil, and an anode side connected to one terminal side of the primary coil via the second switching element; The secondary-side bridge circuit includes: a fifth switching element, a sixth switching element, a seventh switching element, and an eighth switching element; the fifth switching element has an anode side connected to one terminal side of the secondary coil of the transformer, and a cathode side connected to the other terminal side of the secondary coil via the seventh switching element; the sixth switching element has a cathode side connected to one terminal side of the secondary coil, and an anode side connected to the other terminal side of the secondary coil via the eighth switching element; the seventh switching element operates in synchronization with the sixth switching element, has an anode side connected to the other terminal side of the secondary coil, and a cathode side connected to one terminal side of the secondary coil via the fifth switching element; The eighth switching element operates in synchronization with the fifth switching element, with its cathode side connected to the other terminal side of the secondary coil and its anode side connected to one terminal side of the secondary coil via the sixth switching element. Assuming that the voltage in the primary-side bridge circuit is V1, the turns ratio of the number of turns of the primary coil to the number of turns of the secondary coil of the transformer is n:1, and the voltage in the secondary-side bridge circuit is V2. The control unit During the step-down operation when the voltage nV2 is smaller than the voltage V1, When the transformer current reverses from negative to positive, during the blanking period, a third blanking signal is generated to turn off the gate signals of the first switching element and the fourth switching element. The DC / DC converter according to claim 1, wherein when the transformer current reverses from positive to negative, during the blanking period, a fourth blanking signal is generated to turn off the gate signals of the second switching element and the third switching element.

6. The third blanking signal Becomes on at the timing when the first switching element and the fourth switching element are in the on state, The DC / DC converter according to claim 5, which is a signal that becomes off at the timing when the fifth switching element and the eighth switching element are in the on state.

7. The fourth blanking signal Becomes on at the timing when the second switching element and the third switching element are in the on state, The DC / DC converter according to claim 5, which is a signal that becomes off at the timing when the sixth switching element and the seventh switching element are in the on state.

8. A transformer, A primary-side bridge circuit connected to the primary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal, A secondary-side bridge circuit connected to the secondary side of the transformer and having a plurality of switching elements that perform on / off switching according to a gate signal, In a control method of a DC / DC converter including a control unit that controls the primary-side bridge circuit and the secondary-side bridge circuit, The control unit Generates the gate signal, Determines whether the positive and negative of the transformer current detected by the transformer reverse. When it is determined that the transformer current has reversed, a screen signal is generated to turn off a part of the generated gate signal during a screen period including the timing at which the transformer current reverses between positive and negative. A control method for a DC / DC converter that synthesizes the generated gate signal and the generated screen signal and outputs the result to the switching element.

Images