Display device

Abstract

To provide a semiconductor display device with a touch panel which consumes less power.SOLUTION: The display device includes a pixel portion, a panel including a driving circuit that controls the input of image signals to the pixel portion, and a touch panel provided overlapping with the panel in the pixel portion. The pixel portion includes a display element that performs display in accordance with the voltage of the input image signal, and a transistor that controls to maintain the voltage. The transistor includes an oxide semiconductor in a channel formation region thereof. The driving frequency of the driving circuit, i.e., how many times the image signals are written within a certain period is changed based on the operation signals input from the touch panel.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] Active matrix semiconductor display device using transistors and its driving method do. [Background technology]

[0002] The touch panel detects the position pointed by a finger or stylus and displays the position information. The position input device is capable of generating a signal corresponding to the position of the touch panel in the image display area. The display device obtained by stacking the lenses is also called a touch screen, and The image is displayed in the area, and the position of the image display area pointed by the user is recorded. The touch screen also has a photo sensor, which can be used to obtain information. By providing a photoelectric conversion element in the image display area, the position pointed by the user is converted into light intensity. Touch screens function as both a position input device and a display. It also functions as a display device, making it easy to operate and compatible with touchpads and mice. This makes it easier to miniaturize electronic devices compared to when using a position input device such as the above.

[0003] The following Patent Document 1 describes an information display device having a touch panel and a liquid crystal display panel: It is written. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-022508 Summary of the Invention [Problem to be solved by the invention]

[0005] As mentioned above, touchscreens have the advantage of making it easier to miniaturize electronic devices. The touch panel or photo sensor is mounted on a thin surface such as a flat panel display. By adding this to semiconductor display devices, electronic devices can be made even smaller and thinner. Therefore, semiconductor display devices with touch panels are not only available as stationary devices. It is expected to be applied to a variety of electronic devices, including portable devices.

[0006] By the way, low power consumption is an important point when evaluating the performance of semiconductor display devices. However, semiconductor display devices having touch panels or photo sensors are no exception. In particular, portable electronic devices such as mobile phones have touch panels or photo sensors. The high power consumption of semiconductor display devices leads to the disadvantage of shortening the continuous use time. Therefore, low power consumption is required.

[0007] The above-mentioned Patent Document 1 also addresses the issue of reducing power consumption. To reduce power consumption, the LCD panel is turned off when there is no key operation on the touch panel. However, Patent Document 1 does not describe a configuration for realizing the above configuration. In order to achieve this, it is necessary to limit the types of liquid crystal materials, which makes it less versatile. In order to display a full-color image, the display panel stacks display layers corresponding to each color. There is a large loss of light inside the panel, resulting in a dark display.

[0008] In view of the above-mentioned problems, the present invention aims to reduce power consumption while preventing deterioration in image quality. The present invention aims to propose a semiconductor display device having a touch panel or a photosensor, which can Alternatively, the present invention can reduce power consumption while preventing degradation of image quality. The object of the present invention is to propose a method for driving a semiconductor display device having a touch panel or a photosensor. Let's say. [Means for solving the problem]

[0009] The present inventors usually input position information to the semiconductor display device by adjusting the image display area. It is easier for users to identify the input position if the image displayed is a still image rather than a video. When inputting position information intermittently into a semiconductor display device, The waiting period for location information input from the user tends to be long, so The inventors have noticed that the period during which a still image is displayed also becomes longer. Therefore, it is thought that there is still room for reducing the power consumption of semiconductor display devices. I got it.

[0010] Therefore, in a semiconductor display device according to one embodiment of the present invention, The drive frequency when a still image is displayed before the position information is input is set to the drive frequency when a video is displayed. By making the wavelength lower than the wavelength, the power consumption of the semiconductor display device can be reduced. In the semiconductor display device according to one aspect, position information is input to a touch panel or a photosensor. The drive frequency when a still image is displayed is set lower than the drive frequency when a video is displayed. By doing so, the power consumption of the semiconductor display device can be reduced. During the period when the device is waiting for position information to be input to the touch panel or photosensor, Power consumption can be reduced.

[0011] Furthermore, in one embodiment of the present invention, in order to realize the above configuration, A pixel portion corresponding to a region has a display element and a voltage control circuit for controlling the voltage applied to the display element. For this purpose, an insulated gate field effect transistor (hereinafter simply referred to as a transistor) with extremely low off-state current is developed. The present invention is characterized by using a transistor with extremely low off-state current. By doing so, the period during which the voltage applied to the display element is maintained can be extended. Therefore, the same image information is displayed on the pixel area over several consecutive frame periods, like a still image. When an image signal having a certain frequency is written, the driving frequency is lowered. Even if the number of times that the image signal is written during this period is reduced, the image display can be maintained. do.

[0012] The transistor uses a semiconductor material with a wider band gap than silicon semiconductor as a channel. The semiconductor material having the above-described characteristics is included in the channel forming region. By including the SiO 2 in the formation region, a transistor with extremely low off-state current can be realized. For example, semiconductor materials with a band gap that is approximately twice as large as that of silicon A transistor having the above structure is provided in a display element. By using it as a switching element to maintain the voltage that is applied to the display element, This can prevent leakage.

[0013] Specifically, a semiconductor display device according to one aspect of the present invention includes a pixel portion and an image display unit for displaying an image on the pixel portion. a panel provided with a driving circuit for controlling the input of a signal; The pixel portion is provided with a touch panel disposed at a position where the pixel portion is overlapped with the touch panel. The display element displays a picture according to a voltage, and the transistor controls the voltage. The transistor has a channel formation region formed of, for example, an oxide semiconductor. The present invention also includes semiconductor materials with bandgaps wider than silicon semiconductors. In addition to the above configuration, a semiconductor display device according to one aspect of the present invention further comprises: a driving frequency of the driving circuit; The number of times an image signal is written within a fixed period is determined according to the operation signal input from the touch panel. Change it to:

[0014] Alternatively, a semiconductor display device according to one aspect of the present invention includes a pixel portion and an image signal to the pixel portion. The pixel portion has a panel provided with a driver circuit for controlling input of an input signal. a display element that displays a picture in accordance with the voltage of an image signal; and a transistor that controls the holding of the voltage. Further, the pixel portion has a photosensor, and the photosensor is A photodiode or other light-receiving element that emits an electrical signal when it receives light, and a transistor The transistor has a channel forming region formed with, for example, an oxide. These include semiconductor materials with wider bandgaps than silicon semiconductors, such as gallium nitride semiconductors. In addition to the above configuration, a semiconductor display device according to one aspect of the present invention may further include a driving circuit having a driving frequency of 100 kHz. The number of waves, that is, the number of times an image signal is written within a certain period, is input from the touch panel. The change is made according to the operation signal.

[0015] Note that oxide semiconductors can be obtained with the same degree of conductivity as those obtained with microcrystalline silicon or polycrystalline silicon. The semiconductor material combines high mobility with the uniform device characteristics obtained by amorphous silicon. It is a metal oxide that exhibits conductive properties. The concentration of impurities such as water and hydrogen is sufficiently reduced. Furthermore, by using an oxide semiconductor film in which oxygen vacancies are reduced, The current and leakage current can be reduced.

[0016] Specifically, the off-state current of a transistor using an oxide semiconductor film as an active layer is low because: This can be proven through various experiments. For example, if the channel width is 1×10 6 The channel length in μm Even with a 10 μm element, the voltage between the source and drain electrodes (drain voltage) is 1 V. In the range of 10V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 x 10 -13 In this case, the off-state current is The off-state current density, which corresponds to the value divided by the channel width of the transistor, is 100 zA / μm or less. In addition, the capacitance element and the transistor (the gate insulating film thickness is 100 nm) ) is connected to the transistor, and the charge supplied to or discharged from the capacitance element is transferred to the transistor. The off-state current density was measured using a circuit controlled by a transistor. A highly purified oxide semiconductor film with reduced oxygen vacancies is used for the channel formation region of a transistor. The off-state current density of the transistor is measured from the change in the amount of charge per unit time of the capacitor element. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, It has been found that even lower off-state current densities of 0 zA / μm to 100 zA / μm can be obtained. Therefore, in the semiconductor display device according to one embodiment of the present invention, the oxide semiconductor film is activated. The off-state current density of the transistor using the layer was measured by changing the voltage between the source and drain electrodes. That is, 10 zA / μm or less, preferably 1 zA / μm or less, and more preferably 1 yA / μm or less. Therefore, the oxide semiconductor can be highly purified and the oxygen vacancies can be reduced. The transistor using the film as an active layer has an off-state current of crystalline silicon. This is significantly lower than that of transistors.

[0017] The oxide semiconductor is an In-Sn-Ga-Zn-O-based oxide semiconductor, which is a quaternary metal oxide. Conductors, ternary metal oxides such as In-Ga-Zn-O oxide semiconductors, In-Sn-Z nO-based oxide semiconductors, In-Al-Zn-O-based oxide semiconductors, Sn-Ga-Zn-O-based Oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn-Al-Zn-O oxide semiconductors Conductors, binary metal oxides such as In-Zn-O oxide semiconductors and Sn-Zn-O oxides semiconductors, Al-Zn-O oxide semiconductors, Zn-Mg-O oxide semiconductors, Sn-Mg -O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, In-Ga-O-based oxide semiconductors, In-O based oxide semiconductors, Sn-O based oxide semiconductors, Zn-O based oxide semiconductors, etc. In this specification, for example, an In—Sn—Ga—Zn—O system Oxide semiconductors are made of indium (In), tin (Sn), gallium (Ga), and zinc (Zn). The composition ratio is not particularly limited. The semiconductor may include silicon.

[0018] In addition, oxide semiconductors have the chemical formula InMO3(ZnO) m (m>0) Here, M is one or more metal elements selected from Ga, Al, Mn, and Co. show. [Effects of the Invention]

[0019] In one aspect of the present invention, a still image is displayed when position information is input to a semiconductor display device. The drive frequency when displaying moving images can be made lower than the drive frequency when displaying moving images. Therefore, it is possible to prevent deterioration of image quality while reducing power consumption. Alternatively, it is possible to realize a semiconductor display device that can reduce power consumption while preventing deterioration in image quality. It is possible to realize a method for driving a semiconductor display device that can reduce the force. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 1 is a block diagram showing a configuration of a semiconductor display device. [Figure 2] 10 is a flowchart showing the operation of the semiconductor display device. [Figure 3] 4 is a timing chart showing the operation of the semiconductor display device. [Figure 4] 4 is a timing chart of a drive signal and a power supply potential. [Figure 5] FIG. 2 is a diagram showing the configuration of a shift register. [Figure 6] 4 is a timing chart showing the operation of a shift register. [Figure 7] FIG. 2 is a circuit diagram showing a configuration of a pixel portion. [Figure 8] FIG. 1 is a block diagram showing a configuration of a semiconductor display device. [Figure 9] 1A to 1C illustrate a method for manufacturing a transistor. [Figure 10] FIG. 1 illustrates a structure of a transistor. [Figure 11] FIG. 2 is a diagram showing the configuration of a touch panel. [Figure 12] FIG. 2 is a diagram showing the configuration of a touch panel. [Figure 13] FIG. [Figure 14] FIG. [Figure 15] FIG. 1 is a perspective view showing a configuration of a semiconductor display device. [Figure 16] Electronic equipment illustration. [Figure 17] FIG. 1 illustrates a configuration of a pixel portion having a photosensor. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and aspects thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0022] The semiconductor display device of the present invention is typified by a liquid crystal display device and an organic light emitting device (OLED). Light-emitting devices with light-emitting elements in each pixel, electronic paper, DMD (Digital Microphone) romirror device), PDP (Plasma Display Pane) l), FED (Field Emission Display), etc., and transistors Other semiconductor display devices having a pixel portion are also included in this category.

[0023] (Embodiment 1) FIG. 1 shows an example of a block diagram illustrating a structure of a semiconductor display device according to one embodiment of the present invention. In this specification, circuits are classified by function in the block diagram and are separated into independent parts. Although it is shown as a block, it is difficult to completely separate the actual circuit by function. A single circuit may be involved in multiple functions.

[0024] The semiconductor display device shown in FIG. 1 includes a panel 100, a display control circuit 101, a CPU 102, and , and a touch panel 104. Furthermore, the semiconductor display device according to one embodiment of the present invention includes a touch panel. The display device may also include a control circuit for the touch panel.

[0025] The panel 100 includes a pixel section having a transistor 105 and a display element 106 in each pixel 110. 107, and a signal line driver circuit 108 and a scanning line driver circuit 109 that control the operation of the pixel portion 107. The scanning line driver circuit 109 includes a driver circuit 111 for driving the pixel portion 107. A pixel 110 included in the pixel array 110 is selected by controlling the switching of the transistor 105 . The signal line driver 108 inputs an image signal to the display element 106 of the selected pixel 110. Control.

[0026] The display control circuit 101 controls the signal line driving circuit 108 and the scanning line driving circuit 109 of the panel 100. It controls the supply of image signals, drive signals and power supply potential to 109. The signal is used to control the operation of the drive circuit 111. The type of drive signal required for operation varies depending on the type of gear. A start signal and a clock signal that control the operation of the register, and a signal that controls data retention in the memory circuit The signal line driving circuit 108 and the scanning line driving circuit 109 are connected to each other. The circuit 109 can perform the above operations by supplying a drive signal and a power supply potential.

[0027] The touch panel 104 is arranged so as to overlap the pixel section 107 of the panel 100. The user touches the touch panel 104 with a stylus or a finger, or When the sensor is brought close to the sensor 104, an operation signal including the position information is generated. The control circuit performs various processes such as AD conversion and amplitude processing on the operation signal input from the touch panel 104. The signal undergoes seed signal processing and is sent to the CPU 102 .

[0028] The operation signal includes a signal for specifying which position of the pixel unit 107 has been selected by the user. The CPU 102 uses the position information included in the operation signal to The image redrawing unit 107 selects whether or not to redraw the image. Therefore, the operation of the display control circuit 101 is controlled. Also, for example, when rewriting, the above positions are selected. An image signal corresponding to the position information is read out from the storage circuit and sent to the display control circuit 101. The storage circuit may be provided inside the CPU 102 or outside the CPU 102. Alternatively, the memory circuit may be provided outside the semiconductor display device. That's fine.

[0029] The position pointed to on the touch panel 104 and the pixel portion 107 overlapping the position are The positional correspondence is extracted in advance through a position correction operation called calibration. The data of the correspondence is stored in a memory circuit of the CPU 102 or The data is stored in a memory circuit included in the touch panel control circuit.

[0030] Although FIG. 1 shows the configuration of a semiconductor display device using a touch panel 104, A semiconductor display device according to one embodiment of the present invention uses a photosensor instead of the touch panel 104. The photosensor can be provided in the pixel portion 107 together with the pixel 110. When a photosensor is used, unlike when the touch panel 104 is used, The position correction operation is not necessarily required.

[0031] In one embodiment of the present invention, the touch panel 104 or the photo sensor receives an operation signal. As a result of rewriting by input, the image displayed on the pixel section 107 is a still image. The driving frequency of the driving circuit 111 is made different depending on whether the image is moving or not. , the driving frequencies of the signal line driving circuit 108 and the scanning line driving circuit 109 when a still image is displayed are The driving frequency is set lower than the driving frequency when a moving image is displayed. We aim to reduce the power consumption of the equipment.

[0032] In one embodiment of the present invention, the voltage applied to the display element 106 in the pixel portion 107 is A transistor with extremely low off-state current is used to control retention. By using a transistor with extremely low off-state current, the voltage applied to the display element 106 can be reduced. This allows for a longer period of time for which pressure is maintained. Over the frame period, an image signal having the same image information is written to the pixel section 107. In such a case, the driving frequency is lowered, in other words, the driving frequency is lowered to the pixel unit 107 within a certain period. Even if the number of times of writing the image signal is reduced, the image display can be maintained. For example, The oxide semiconductor film having the above-described high purity and reduced oxygen vacancies is used as an active layer. By using the transistor, the interval between writing of image signals can be set to 10 seconds or more, preferably The time can be 30 seconds or more, more preferably 1 minute or more. The longer the interval between inputs, the more power consumption can be reduced.

[0033] Unless otherwise specified, in this specification, the off-state current refers to the off-state current of an n-channel (p-channel) In a transistor, the drain electrode is connected to a higher (lower) potential than the source and gate electrodes. When the potential of the gate electrode is set to a low potential, the potential of the gate electrode is When the voltage is less than 0 (more than 0), it means the current that flows between the source electrode and the drain electrode. Unless otherwise specified, leakage current refers to the current that flows from the source electrode or means the current flowing between the drain electrode and the gate electrode.

[0034] The operation of the semiconductor display device according to one embodiment of the present invention is such that a period during which a moving image is displayed and a period during which a still image is displayed are separated. When a still image is displayed, the pixel 110, the driving circuit, An example of a specific operation of the pixel 110 will be described with reference to FIG. 10A and 10B schematically show the change in the operating state over time and the change in the operating state of the drive circuit 111 over time.

[0035] In a period in which a still image is displayed, a period A in which an image signal IMG is written to the pixel 110 and a period B during which the display element 106 maintains a grayscale display according to the image signal IMG. In FIG. 3, there are four periods A shown as periods A1 to A4, and periods B1 to B4. In FIG. 3, four periods B shown as The periods are Period A1, Period B1, Period A2, Period B2, Period A3, Period B3, Period A4, Period They are arranged in the order of B4.

[0036] In the period A, a driving signal and a power supply potential are supplied to the driving circuit 111, The driving circuits such as the scanning line driving circuit 108 and the scanning line driving circuit 109 are put into an operating state. The state in which the drive circuit 111 is operating is indicated by SST.

[0037] When the scanning line driving circuit 109 is put into an operating state, the scanning signal SCN is output from the scanning line driving circuit 109. The pixels 110 are sequentially selected by being input to the pixel section 107. Specifically, the scanning signal The transistor 105 is turned on by the SCN, and the pixel 110 is selected. When the scanning line driving circuit 108 is activated, the pixel 1 selected by the scanning line driving circuit 109 is An image signal IMG is input to the pixel 10 from the signal line driving circuit 108. An image signal IMG is input to a display element 106 via a transistor 105 .

[0038] When the image signal IMG is input to the selected pixel 110, the display element 106 outputs the image signal IM The number of gradations displayed by the display element 106 is binary. The display state of the gradation by the image signal IMG may be three-valued or may be multi-valued with three or more values. The state is maintained for a certain period of time.

[0039] The input of the image signal IMG to the pixel 110 is the same for all other pixels 110. The display state of all pixels is set, and the image signal I An image based on the data of the image signal IMG is displayed. The state in which the display state is set by writing is indicated by W in FIG.

[0040] Next, in a period B, the supply of the driving signal and the power supply potential to the driving circuit 111 is stopped. , the signal line driving circuit 108, the scanning line driving circuit 109, and other driving circuits are stopped. In FIG. 3, the state in which the driver circuit 111 is stopped is indicated by SSTP. When the image signal IMG is input to the pixel unit 107, the image signal IMG is stopped.

[0041] Furthermore, when the scanning line driving circuit 109 is in a stopped state, the scanning signal SCN is transmitted to the pixel unit 107. Therefore, the selection of the pixel 110 by the scanning line driving circuit 109 stops. Therefore, the display element 106 of the pixel 110 remains in the display state set in the immediately preceding period A. The state in which the gradation display by the display element 106 is maintained is indicated by H in FIG. vinegar.

[0042] Specifically, in FIG. 3, the display state set in period A1 is maintained in period B1. The display state set in period A2 is maintained in period B2. The display state set in the period B1 is maintained in the period B2. The display state is maintained during period B4.

[0043] As described above, one embodiment of the present invention uses the transistor 105 with extremely low off-state current. Therefore, the display state in each period B is maintained for 10 seconds or more, preferably 3 It can be 0 seconds or more, and more preferably 1 minute or more.

[0044] In one embodiment of the present invention, the length of the period B is determined by the touch panel 104 or the photosensor 106. The timing can be changed appropriately according to the timing of the pulse of the operation signal input to the For example, in FIG. 3, when the timing of the end of the period B2 is set by the pulse of the operation signal, In FIG. 3, the period B2 is forcibly ended by inputting a pulse of the operation signal. Then, period A3 starts. Therefore, in the case of FIG. 3, period B2 starts after period B1. The period B is shorter than the period B that ended automatically regardless of the input of the operation signal pulse, such as the period B3. stomach.

[0045] Note that there is a limit to the period during which the display element can maintain the display state. Considering the period during which the state can be maintained, the period B during which no pulse of the operation signal is input is taken. The maximum possible length of the still image display is determined in advance. If the length is longer than the maximum length that B can take, the Then, in the next period A, the pixel portion 1 of the same image signal IMG 07 again, and the image held in the immediately preceding period B is Make the image visible again.

[0046] In one aspect of the present invention, during a period in which a still image is displayed, the image is displayed while the image is being displayed. The number of times the signal IMG is written to the pixel section 107 can be significantly reduced. The driving frequency of the driving circuit can be significantly reduced, thereby reducing the power consumption of the semiconductor display device. It is possible.

[0047] During the period when a moving image is displayed, the selected pixel 110 Then, the display element 106 writes the image signal IMG to the pixel 104. However, unlike the period when a still image is displayed, all the pixels 110 are not supplied with an image signal. After writing the signal IMG and setting the display state, the operation of the driver circuit does not necessarily have to be stopped. is also good.

[0048] Next, an operation signal is input to the touch panel 104, and the pixel unit 10 7. In addition, in FIG. 2, the touch panel Although the example uses the touch panel 104, a photo sensor may be used instead of the touch panel 104. Even when using the same, the same operation can be performed.

[0049] FIG. 2 is a flowchart showing an example of the flow of operations of the semiconductor display device. Before the user inputs position information to the touch panel 104, the pixel unit 107 When a still image is displayed (A01: Display of still image) and when a video is displayed ( A02: Display of video).

[0050] In one embodiment of the present invention, first, an image displayed on the pixel portion 107 is transferred to the touch panel 104. Rewrite the image to a still image for input (A03: Transition to input mode). Specifically, an operation signal is input to the touch panel 104 (A04: Operation signal to touch panel A05: Input still image) to display the input still image on the pixel unit 107. When a video is displayed (A02: Video display), the input still image is displayed. Rewriting the image makes it easier for users to identify the input location.

[0051] Next, an operation signal is input to the touch panel 104 based on the still image for input (A 06: Input of operation signal to touch panel) An operation signal is input to the touch panel 104. By this, an image signal is written to the pixel portion 107, and the image displayed on the pixel portion 107 is The image is rewritten. The image displayed by this rewriting is based on the position information of the operation signal. In FIG. 2, when a still image for input is displayed again (A07 : Display of a still image for input) and an image showing the information obtained by inputting an operation signal are displayed. In addition, as shown in Figure 2, After the image showing the information obtained by inputting the operation signal is displayed (A09: Display of the result), Even if no operation signal is input, the still image for input is automatically displayed again (A1 0: Display of a still image for input)

[0052] The image showing the information obtained by inputting the operation signal may be a still image or a video. That's fine.

[0053] In one aspect of the present invention, a still image is displayed by inputting an operation signal to the touch panel 104. During the display period, a driving method is adopted in which the operation of the driving circuit as shown in FIG. In the flowchart shown in 2, for example, (A05: Display of still image for input), (A07: A10: Display of still image for input) or (A10: Display of still image for input) The method can be adopted.

[0054] Furthermore, even if the image showing the information obtained by inputting the operation signal is a still image, as shown in FIG. A driving method for stopping the operation of the driving circuit as described above may be adopted.

[0055] With the above configuration, the user intermittently inputs operation signals to the touch panel 104. When a still image is displayed between the two images, the drive circuit stops operating to reduce power consumption. It can be done.

[0056] (Embodiment 2) In this embodiment, in the semiconductor display device shown in FIG. 1, during the period when a still image is displayed, The drive signal and power supply potential sent from the display control circuit 101 to the drive circuit 111 are shown in FIG. This will be used to explain.

[0057] The display control circuit 101 receives a start signal SP, a clock signal CK, and a power supply potential Vp. The display control circuit 101 also receives control signals GDCTL and The control signal GDCTL is input to the scanning line driving circuit 109. The control signal SDCTL is a signal for controlling the driving of the signal line driving circuit 108. The display control circuit 101 receives the start signal SP and The clock signal CK and the power supply potential Vp are connected to the control signal GDCTL and the control The signal line driver circuit 108 receives the signal from the scanning line driver circuit 109 in accordance with the control signal SDCTL. .

[0058] The start signal SP input to the scanning line driving circuit 109 is referred to as the start signal GSP, and the signal The start signal SP input to the line driving circuit 108 is referred to as the start signal SSP. The clock signal CK input to the scan line driving circuit 109 is the clock signal GCK, and the signal line driving circuit The clock signal CK input to the line 108 is referred to as the clock signal SCK. The power supply potential Vp input to the signal line driver circuit 109 is set to the power supply potential GVp, and the power supply potential Vp input to the signal line driver circuit 108 is set to the power supply potential GVp. The source potential Vp is set as the source potential SVp.

[0059] The start signal GSP is a pulse signal corresponding to the vertical synchronization frequency. SSP is a pulse signal corresponding to one gate selection period.

[0060] Furthermore, the clock signal GCK is not limited to one clock signal, but may be a plurality of clocks with different phases. A clock signal may be used as the clock signal GCK. By using this as the signal GCK, the operation speed of the scanning line driving circuit 109 can be improved. In addition, the clock signal SCK is not limited to one clock signal, but can be a clock signal with different phases. A plurality of clock signals may be used as the clock signal SCK. By using the clock signal SCK as the clock signal SCK, the operating speed of the signal line driving circuit 108 can be The clock signal GCK and the clock signal SCK are both used. A common clock signal CK may be used.

[0061] Next, a semiconductor display device according to one embodiment of the present invention will be described. An example of a driving method of the device will be described. , clock signal GCK, start signal GSP, control signal SDCTL, power supply potential SVp, The graph shows the time change of the potential of the clock signal SCK and the start signal SSP. In this configuration, the power supply potential GVp and the power supply potential SVp are a common power supply potential, and the clock signal GCK is one clock signal, and SCK is one clock signal, Control signal GDCTL, control signal SDCTL, start signal GSP, and start signal SS This illustrates the case where P is a binary digital signal.

[0062] In FIG. 4, there is a frame period 311 in which a moving image is displayed and a frame period 312 in which a still image is displayed. and a frame period 313 for displaying a moving image.

[0063] First, in a frame period 311, the display control circuit 101 controls the pulse of the control signal GDCTL. When the signal is input, the power supply potential GVp, the start signal GSP, and the clock signal GCK are output. Specifically, first, the output of the power supply potential GVp is started, and the output of the power supply potential GVp is stopped. Once the output is stable, the clock signal GCK starts to be output, and then the start signal GSP starts to be output. Just before starting to output the clock signal GCK, By applying a high level potential of the clock signal GCK to the wiring to which the It is preferable to stabilize the potential of the line. This can prevent the scan line driving circuit 109 from malfunctioning.

[0064] In addition, in the frame period 311, the display control circuit 101 controls the pulse of the control signal SDCTL. When a signal is input, the power supply potential SVp, start signal SSP, and clock signal SCK are output. Specifically, first, the output of the power supply potential SVp is started, and then the output of the power supply potential SVp is stopped. Once the output is stable, the clock signal SCK starts to be output, and then the start signal SSP starts to be output. Just before starting to output the clock signal SCK, By applying a high-level potential of the clock signal SCK to the wiring to which the It is preferable to stabilize the potential of the signal line before starting operation. This can prevent the line driver circuit 108 from malfunctioning.

[0065] When the scanning line driving circuit 109 starts operating, the scanning line driving circuit 109 outputs a scanning signal to the scanning line. When SCN is input, pixels are selected sequentially in the pixel section. When the circuit 108 starts operating, the signal line driver circuit 108 outputs the selected image signal via the signal line. An image signal IMG is input to each pixel. The display element sets the display state according to the IMG.

[0066] Next, in the frame period 312, the display control circuit 101 sets the power supply potential GVp, the start The output of the signal GSP and the clock signal GCK is stopped. By stopping the output of the scanning signal GSP, the output of the scanning signal SCN in the scanning line driving circuit 109 Then, the selection operation of all the scanning lines is stopped. Then, the output of the power supply potential GVp is stopped. Note that stopping the output means, for example, putting the wiring to which a signal or potential has been input into a floating state. Alternatively, a low-level potential is applied to the wiring to which a signal or potential has been input. By the above method, when the operation is stopped, the scanning line driving circuit 109 does not malfunction. This can prevent this.

[0067] In FIG. 4, during the frame period 312, the display control circuit 101 receives the control signal GDCT Although the example shows a case where the L pulse is not input, one aspect of the present invention is not limited to this configuration. In the frame period 312, the pulse of the control signal GDCTL is not In this case, the display control circuit 101 may input the control signal GDCTL to the Even if a pulse is input, the power supply potential GVp, the start signal GSP, and the clock signal G It is sufficient to have a mechanism to stop the output of CK.

[0068] In addition, during the frame period 312, the display control circuit 101 supplies the power supply potential SVp, The output of the signal SSP and the clock signal SCK is stopped. By stopping the output of the signal SSP, the output of the image signal IMG in the signal line driving circuit 108 Then, the input operation of the image signal IMG to all the signal lines is stopped. When the operation is stopped by the above method, the signal line driving circuit 108 This can prevent malfunctions.

[0069] In FIG. 4, in the frame period 312, the display control circuit 101 receives the control signal SDCT Although the example shows a case where the L pulse is not input, one aspect of the present invention is not limited to this configuration. In the frame period 312, the pulse of the control signal SDCTL is not In this case, the display control circuit 101 may input the control signal SDCTL. Even if a pulse is input, the power supply potential SVp, start signal SSP, and clock signal S It is sufficient to have a mechanism to stop the output of CK.

[0070] In the frame period 312, the display element of the pixel is The display state based on the data of the written image signal IMG is maintained. For example, When used as a display element, the pixel electrodes of the liquid crystal element are in a floating state. The elements are set based on the data of the image signal IMG written during the frame period 311. Therefore, in the frame period 312, the pixel section maintains the transmittance that was obtained in the frame period 31. The image based on the image signal IMG data written to 1 is held as a still image for a certain period of time. The length of the image retention period based on the data of the image signal IMG is determined by, for example, the CPU 10 2 is controlled by the pulse interval of the control signal GDCTL and the control signal SDCTL. It is possible.

[0071] Next, in the frame period 313, the display control circuit 101 performs the same operation as in the frame period 311. Then, the signal line driver circuit 108 and the scanning line driver circuit 109 start outputting the driving signals and the power supply potential. The driving circuit 109 starts operating.

[0072] As shown above as an example, in the semiconductor display device according to one aspect of the present embodiment, During the period in which the display is performed, the start signal, clock signal, and power supply potential to the driver circuit are The supply of the voltage can be stopped and the image display can be maintained for a certain period of time in the pixel portion. With the above configuration, the semiconductor display device according to one embodiment of this embodiment can reduce power consumption. can be done.

[0073] In addition, in the semiconductor display device according to one aspect of the present embodiment, the image signal IMG is written to the pixel. This allows for a longer interval between images, reducing eye fatigue caused by switching between images. It is possible.

[0074] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0075] (Embodiment 3) In this embodiment mode, a scanning line driver circuit and a signal line driver circuit in the semiconductor display device shown in the above embodiment mode are An example of a shift register applicable to a signal line driver circuit will be described.

[0076] FIG. 5 shows an example of the configuration of a shift register according to this embodiment.

[0077] The shift register shown in FIG. 5A includes P (P is a natural number equal to or greater than 3) sequential logic units 10. In FIG. 5A, P unit sequential circuits 10 are configured using unit sequential circuits. The circuits FF_1 to FF_P are shown as unit sequential circuits.

[0078] Each of the sequential logic units FF_1 to FF_P receives a start signal ST and a reset signal ST. A set signal Res is input.

[0079] Furthermore, each of the sequential logic units FF_1 to FF_P receives a clock signal CK 1, clock signal CK2, and clock signal CK3 are input. The clock signal CK2 and the clock signal CK3 are, for example, a first clock signal (CLK1 ), the second clock signal (also called CLK2), and the third clock signal (CLK3 and the fourth clock signal (also called CLK1), The first to fourth clock signals are high-level It is a digital signal in which high and low level potentials appear repeatedly. It is assumed that different combinations of clock signals are input to the sequential circuit 10. The shift register shown in FIG. 5(A) uses the first to fourth clock signals. This controls the operation of the unit sequential logic circuit 10. The above configuration can improve the operation speed. do.

[0080] Furthermore, an example of a specific circuit configuration of the unit sequential circuit 10 shown in FIG. 5(A) is shown in FIG. 5(B). show.

[0081] The sequential circuit unit shown in FIG. 5B includes a transistor 31, a transistor 32, a transistor 33, transistor 34, transistor 35, transistor 36, transistor 37, It has a transistor 38, a transistor 39, a transistor 40, and a transistor 41. Below, we will take the example of a case where all the above transistors are n-channel type, and explain the specific connections. Explain the relationship.

[0082] In this specification, connection means electrical connection, and the current, voltage, or potential Therefore, the connected state corresponds to the state in which the signal is directly connected. It does not necessarily refer to the state of being connected, but rather to the state in which a current, voltage, or potential is available or is transmitted through circuit elements such as wires, resistors, diodes, and transistors. This also includes situations where the connection is indirectly made via a direct connection.

[0083] Also, even if components that are independent on the circuit diagram are connected, For example, when a part of the wiring also functions as an electrode, one conductive film is connected to a plurality of components. In this specification, the term "connection" refers to such a conductive A membrane that combines the functions of multiple components is also included in this category.

[0084] The source electrode and the drain electrode of the transistor are connected to each other. The name changes depending on the difference in potential applied to the electrodes. Generally, n-channel In a transistor, the electrode to which a low potential is applied is called the source electrode, and the electrode to which a high potential is applied is called the The electrode that is connected to the drain is called the drain electrode. The electrode to which a low potential is applied is called the drain electrode, and the electrode to which a high potential is applied is called the source electrode. In this specification, either the source electrode or the drain electrode is referred to as a first terminal, and the other is referred to as a second terminal. Assuming two terminals, the connection relationship of the transistor is explained.

[0085] A power supply potential Va is input to a first terminal of the transistor 31, and a gate voltage of the transistor 31 is A start signal ST is input to the pole.

[0086] The first terminal of the transistor 32 receives the power supply potential Vb, and the second terminal of the transistor 32 receives the power supply potential Vb. is connected to the second terminal of transistor 31.

[0087] Note that either the power supply potential Va or the power supply potential Vb is a high-level potential Vdd, and the other The power supply potential Va and the power supply potential Vb are set to the low level potential Vss. If the transistor is a p-channel type, the potential relationship is reversed. The potential difference between the source potential Va and the source potential Vb corresponds to the source voltage.

[0088] The first terminal of the transistor 33 is connected to the second terminal of the transistor 31. A power supply potential Va is input to the gate electrode of 33 .

[0089] The first terminal of the transistor 34 is connected to a power supply potential Va, and the gate voltage of the transistor 34 is The clock signal CK3 is input to the pole.

[0090] The first terminal of the transistor 35 is connected to the second terminal of the transistor 34. The second terminal of transistor 35 is connected to the gate electrode of transistor 32 and the gate of transistor 35. A clock signal CK2 is input to the output electrode.

[0091] The first terminal of the transistor 36 is connected to a power supply potential Va, and the gate voltage of the transistor 36 is A reset signal Res is input to the pole.

[0092] The first terminal of the transistor 37 receives the power supply potential Vb, and the second terminal of the transistor 37 receives the power supply potential Vb. is connected to the gate electrode of transistor 32 and the second terminal of transistor 36, A start signal ST is input to the gate electrode of the transistor 37 .

[0093] A signal that becomes a clock signal CK1 is input to a first terminal of the transistor 38. The gate electrode of transistor 38 is connected to the second terminal of transistor 33 .

[0094] The first terminal of the transistor 39 receives the power supply potential Vb, and the second terminal of the transistor 39 receives the power supply potential Vb. is connected to the second terminal of transistor 38, and the gate electrode of transistor 39 is connected to the second terminal of transistor 39. It is connected to the gate electrode of the resistor 32.

[0095] The first terminal of the transistor 40 receives the clock signal CK1. The gate electrode is connected to the second terminal of the transistor 33 .

[0096] The first terminal of the transistor 41 receives the power supply potential Vb, and the second terminal of the transistor 41 receives the power supply potential Vb. is connected to the second terminal of transistor 40, and the gate electrode of transistor 41 is connected to the second terminal of transistor 42. It is connected to the gate electrode of the resistor 32.

[0097] In FIG. 5B, the second terminal of the transistor 33 and the gate of the transistor 38 The connection point between the electrode and the gate electrode of the transistor 40 is referred to as a node NA. the gate electrode of transistor 32, the second terminal of transistor 35, and the second terminal of transistor 36 the second terminal of transistor 37; the gate electrode of transistor 39; The connection point of the second terminal of the transistor 38 and the gate electrode of the transistor 41 is a node NB. The connection point between the first terminal of the transistor 39 and the second terminal of the transistor 39 is a node NC. The connection point between the second terminal of the transistor 41 and the second terminal of the transistor 42 is referred to as a node ND.

[0098] The unit sequential circuit shown in FIG. 5B outputs the potential of the node NC as a first output signal OUT1. The potential of the node ND is output as the second output signal OUT2. T2 is used as a scanning signal SCN for selecting pixels in a scanning line driving circuit, for example. In the signal line driver circuit, the image signal IMG is converted into a signal for outputting to the selected pixel. It is used as follows.

[0099] The start signal ST input to the first-stage sequential logic unit FF_1 may include, for example, the above In the semiconductor display device of the embodiment, the start signal GSP or the start signal STP In addition, in the sequential logic units FF_2 to FF_P in the second and subsequent stages, The first output signal OUT1 in each preceding unit sequential circuit is used as the start signal ST. It is used as follows.

[0100] In the sequential logic unit FF_1 to the sequential logic unit FF_P-2, The first output signal OUT1 of the unit sequential circuit is used as a reset signal Res. In the sequential logic unit FF_P-1 and the sequential logic unit FF_P, the reset signal Res is For example, a separately generated signal can be used. F_P-1 and the P-th stage sequential logic unit FF_P are used as dummy sequential logic units. do.

[0101] Next, an example of the operation of the shift register shown in FIG. 5A will be described with reference to FIG.

[0102] FIG. 6(A) is a timing chart showing an example of the operation of the sequential logic unit shown in FIG. 5(B). FIG. 6B is a timing chart showing an example of the operation of the shift register shown in FIG. 5A. It is a chart.

[0103] In FIG. 6(A), the unit sequential circuit 10 shown in FIG. 5(A) has the configuration shown in FIG. 5(B). 5B shows a timing chart for the case where the unit sequential circuit 1 shown in FIG. 0 are all n-channel transistors. The potential Vdd is input as the power supply potential Va, and the potential Vss is input as the power supply potential Vb. The following explanation will be given taking the case where

[0104] As shown in FIG. 6A, in each unit sequential circuit 10, a start signal is input during a selection period 61. When the pulse of signal ST is input, transistor 31 is turned on, and the bootstrap By the flipping operation, the potential of the node NA becomes higher than the potential Vdd, and the transistors 38 and The transistor 40 is turned on. Also, when a pulse of the start signal ST is input, When the transistor 37 is turned on, the potential of the node NB becomes low, and the transistor 39 and transistor 41 are turned off. As a result, the potential of the first output signal OUT1 becomes high. The potential of the second output signal OUT2 becomes high level.

[0105] Furthermore, during the non-selection period 62, a pulse of the reset signal Res is input. Since the transistor 36 is turned on, the potential of the node NB becomes high level, and the transistor Transistor 32, transistor 39, and transistor 41 are turned on. When transistor 2 is turned on, the potential of node NA becomes low level, and transistors 38 and 39 are turned on. The transistor 40 is turned off. Therefore, the first output signal OUT1 and the second output signal OU The potential of T2 is maintained at a low level.

[0106] The above operations are performed in accordance with the first clock signal CLK1 to the fourth clock signal CLK4. 6(B) from each unit sequential circuit 10. ), the first output signal OUT1 and the second output signal O are sequentially shifted in pulse. UT2 can be output.

[0107] The shift register shown in this embodiment mode is used as a scanning When used in a line driver circuit or a signal line driver circuit, the power supply potential input to each unit sequential circuit, A driving signal such as a clock signal CLK, a start signal S input to the first-stage sequential logic unit By stopping the supply of drive signals such as P, the operation of the scanning line drive circuit and the signal line drive circuit is stopped. It can be stopped.

[0108] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0109] (Fourth embodiment) In this embodiment, a liquid crystal display device, which is one of the semiconductor display devices of the present invention, is taken as an example, and a pixel The specific configuration of the unit will be described below.

[0110] FIG. 7 shows an example of the configuration of a pixel portion 301 in which a plurality of pixels 300 are provided. In this case, each pixel 300 is connected to at least one of the signal lines S1 to Sx and at least one of the scanning lines G1 to Gy. The pixel 300 also has at least one transistor that functions as a switching element. The liquid crystal display device includes a transistor 305, a liquid crystal element 306, and a capacitor 307. The liquid crystal element 306 The liquid crystal display device has a pixel electrode, a counter electrode, and a liquid crystal to which a voltage is applied between the pixel electrode and the counter electrode. do.

[0111] The transistor 305 supplies the pixel electrode of the liquid crystal element 306 with the potential of the signal line, that is, the image signal The counter electrode of the liquid crystal element 306 is supplied with a predetermined power supply voltage. The capacitor 307 has a pair of electrodes. The first electrode is connected to the pixel electrode of the liquid crystal element 306, and the other electrode (second electrode) is connected to a predetermined A constant power supply potential is applied.

[0112] In FIG. 7, one transistor 305 is used as a switching element in the pixel 300. However, the present invention is not limited to this configuration. A plurality of transistors may be used as the switching element.

[0113] Next, the operation of the pixel section 301 shown in FIG. 7 will be described.

[0114] First, when the scanning lines G1 to Gy are selected in order, the pixel 300 having the selected scanning line Then, the transistor 305 is turned on. Then, the voltage of the image signal IMG is applied to the signal lines S1 to Sx. When the potential is applied, the potential of the image signal IMG is applied to the liquid crystal element via the transistor 305 that is turned on. The voltage is applied to the pixel electrode of the element 306.

[0115] In the liquid crystal element 306, the liquid crystal molecules are polarized in accordance with the value of the voltage applied between the pixel electrode and the counter electrode. Therefore, the liquid crystal element 306 changes the orientation of the image signal IMG. The transmittance is controlled by the amount of light emitted from the liquid crystal, thereby enabling gradation to be displayed.

[0116] Next, when the selection of the scanning line is completed, the transistor 305 is turned off. Then, the liquid crystal element 306 is turned off. By maintaining the voltage, the gray scale display is maintained.

[0117] In a liquid crystal display device, in order to prevent deterioration of the liquid crystal, known as burn-in, the liquid crystal element 306 The polarity of the voltage applied to the Specifically, in AC driving, the polarity of the potential of the image signal IMG input to each pixel 300 is changed to This can be done by reversing the potential of the opposing electrode as a reference. When this is done, the change in the potential given to the signal line becomes large, so it functions as a switching element. The potential difference between the source electrode and the drain electrode of the transistor 305 that functions increases. The transistor 305 is prone to characteristic degradation such as a shift in threshold voltage. To maintain the voltage across the element 306, the potential difference between the source and drain electrodes Even if the off-state current is large, it is required to be low.

[0118] In one embodiment of the present invention, the transistor 305 is made of a material with a band gap higher than silicon or germanium. Since a semiconductor such as an oxide semiconductor with a wide gap is used, the resistance of the transistor 305 is Therefore, by increasing the withstand voltage of the transistor 305, the liquid crystal The reliability of the display device can be improved.

[0119] In addition, the purity is increased by reducing impurities such as water or hydrogen, which act as electron donors. The oxide semiconductor in which oxygen vacancies are reduced by oxygen supply is used as a transistor 305. By using the above, the off-state current of the transistor 305 can be significantly reduced.

[0120] By reducing the off-state current of the transistor 305, the image Even if the number of times the image signal IMG is written is reduced, the change in transmittance caused by the off current is reduced. This can be suppressed, thereby maintaining the image display.

[0121] In one embodiment of the present invention, the potential of the counter electrode of the liquid crystal element 306 or the potential of the capacitor 307 The potential of the second electrode is set to a value that significantly reduces the off-current during a period in which a still image is displayed. The semiconductor display device according to the above configuration may be configured to hold the signal by using a transistor having a low resistance. This can further reduce the power consumption.

[0122] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0123] (Embodiment 5) In this embodiment mode, a configuration of a driver circuit included in a semiconductor display device will be described.

[0124] FIG. 8 is a block diagram showing an example of a more detailed configuration of a panel 100 included in a semiconductor display device. In the panel 100 shown in FIG. 8, the signal line driver circuit 108 includes a shift register 130, A first memory circuit 131, a second memory circuit 132, a level shifter 133, a DAC 134, an analog The scanning line driving circuit 109 includes a shift register 136. , and a digital buffer 137.

[0125] Next, the operation of the panel 100 shown in Fig. 8 will be described. Operation of the signal line driver circuit 108 At this time, the power supply potential SVp is input to each of the circuits included in the signal line driver circuit 108. In addition, when the scanning line driving circuit 109 is in operation, the above-mentioned The power supply potential GVp is input to each circuit. Each does not necessarily mean a single power supply potential, but rather multiple power supply potentials with different heights. The source potential is also included in the meaning.

[0126] When a start signal SSP and a clock signal SCK are input to the shift register 130, The soft register 130 generates a timing signal that shifts the pulses sequentially.

[0127] An image signal IMG is input to the first memory circuit 131. When a timing signal is input, the image signal IMG is The signal is sampled and written in order to a plurality of memory elements included in the first memory circuit 131. That is, the image signal IMG inputted serially to the signal line driving circuit 108 is stored in the first memory circuit The image signals written in the first memory circuit 131 are written in parallel. No. IMG will be retained.

[0128] Note that the image signal IMG may be written in order to the plurality of memory elements included in the first memory circuit 131. However, the plurality of memory elements included in the first memory circuit 131 are divided into several groups, and the groups It is also possible to perform so-called divided driving, in which the image signal IMG is input in parallel for each loop. The number of groups at this time is called the division number. For example, if we divide the memory elements into groups of four, In this case, the display will be divided into four parts for split driving.

[0129] The latch signal LP is input to the second memory circuit 132. After the signal IMG has been written, the input to the second memory circuit 132 is In response to the pulse of the latch signal LP input, the image signal held in the first memory circuit 131 is The image signals IMG are simultaneously written into the second memory circuit 132 and stored therein. After the first memory circuit 131 has finished sending the data to the memory circuit 132, the data is again sent from the shift register 130. In accordance with this timing signal, the next image signal IMG is written in succession. During one line period, the image signal IM After the amplitude of the voltage of G is adjusted by the level shifter 133, it is sent to the DAC 134. The DAC 134 converts the input image signal IMG from digital to analog. The image signal IMG converted into analog is sent to an analog buffer 135. The image signal IMG sent from the DAC 134 is output from the analog buffer 135. The signal is sent to the pixel unit 107 via a line.

[0130] On the other hand, in the scanning line driving circuit 109, the shift register 136 receives a start signal GSP, When the clock signal GCK is input, a scan signal SCN is generated in which the pulses are shifted sequentially. The scanning signal SCN output from the shift register 130 is input from the digital buffer 137. The signal is sent to the pixel section 107 via the scanning line.

[0131] The pixels in the pixel portion 107 are driven by a scanning signal SCN input from a scanning line driver circuit 109. The image signal sent from the signal line driving circuit 108 to the pixel section 107 via the signal line is selected. The signal IMG is input to the selected pixel.

[0132] In the panel 100 shown in FIG. 8, a start signal SSP, a clock signal SCK, a latch signal L P and the like correspond to the drive signals of the signal line drive circuit 108. The lock signal GCK corresponds to the drive signal of the scanning line drive circuit 109. During this period, the supply of the driving signal and the power supply potential is stopped, thereby The number of times the signal IMG is written can be reduced, thereby reducing the power consumption of the semiconductor display device. Cut.

[0133] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0134] (Embodiment 6) Next, an example of a method for manufacturing a transistor will be described.

[0135] First, as shown in FIG. 9(A), a gate electrode 801, a An electrode 802 for capacitance is formed.

[0136] The materials of the gate electrode 801 and the electrode 802 are molybdenum, titanium, chromium, tantalum, tantalum, and titanium. Metallic materials such as tin, neodymium, scandium, etc., and alloys containing these metallic materials as the main components A conductive film using a material or a nitride of these metals can be used as a single layer or a laminated layer. In addition, if the metal material can withstand the temperature of the heat treatment to be performed in the subsequent process, Aluminum and copper can also be used as the material. Aluminum and copper are heat resistant and corrosion resistant. To avoid problems with thermal conductivity, it is recommended to use it in combination with a high melting point metal material. Materials include molybdenum, titanium, chromium, tantalum, tungsten, neodymium, and scandium. Sodium, etc. can be used.

[0137] For example, the gate electrode 801 and the electrode 802 each having a two-layer laminated structure may be formed of an aluminum film. Two-layer structure with a molybdenum film laminated on top, and two-layer structure with a molybdenum film laminated on top of a copper film A two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a titanium nitride film It is preferable to use a two-layer structure in which a titanium film and a molybdenum film are laminated. The gate electrode 801 and the electrode 802 are made of aluminum film, aluminum and silicon film. alloy film, aluminum and titanium alloy film, or aluminum and neodymium alloy film a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film as an upper and lower layer; It is preferable to have a laminated structure.

[0138] In addition, the gate electrode 801 and the electrode 802 are made of indium oxide, an alloy of indium oxide and tin oxide, Indium oxide zinc oxide alloy, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride Alternatively, a light-transmitting conductive oxide film such as zinc oxide or zinc gallium oxide can be used.

[0139] The thickness of the gate electrode 801 and the electrode 802 is 10 nm to 400 nm, preferably 100 nm. In this embodiment, a sputtering method using a tungsten target is used. After forming a conductive film for the gate electrode of 150 nm, the conductive film is etched to the desired thickness. By processing (patterning) the film into the above shapes, a gate electrode 801 and an electrode 802 are formed. If the end of the formed gate electrode is tapered, the gate insulating film laminated thereon may It is preferable that the resist mask is formed by an ink jet method. If the resist mask is formed by the inkjet method, no photomask is required. , and manufacturing costs can be reduced.

[0140] Next, as shown in FIG. 9(B), a gate insulating film 801 is formed on the gate electrode 802. The gate insulating film 803 is formed by using a plasma CVD method, a sputtering method, or the like. Silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide film , aluminum nitride film, aluminum oxynitride film, aluminum nitride oxide film, hafnium oxide The gate insulating film can be formed by a single layer or a laminated layer of a tantalum oxide film or a tantalum oxide film. It is desirable that the film 803 contains as little impurities as possible, such as moisture, hydrogen, and oxygen. When forming a silicon oxide film by the ring method, a silicon target or A quartz target was used, and oxygen or a mixture of oxygen and argon was used as the sputtering gas. Use.

[0141] An oxide semiconductor from which impurities have been removed (highly purified oxide semiconductor) has interface states and interface charges. Since the highly purified oxide semiconductor and the gate insulating film 803 are very sensitive to The interface is important. Therefore, the gate insulating film (GI) that contacts the highly purified oxide semiconductor High quality is required.

[0142] For example, high-density plasma CVD using microwaves (frequency 2.45 GHz) produces dense, high-insulation This is preferable because it allows the formation of high-quality insulating films with high pressure. The close contact with the high-quality gate insulating film reduces the interface state and improves the interface characteristics. Because it can be done.

[0143] Of course, if a good quality insulating film can be formed as a gate insulating film, sputtering is also possible. Other film formation methods such as the plasma CVD method and the like can also be applied. This improves the quality of the gate insulating film and the interface characteristics between the gate insulating film and the oxide semiconductor. In any case, it is important that the film quality as a gate insulating film is good. In other words, it is possible to reduce the interface state density between the gate insulating film and the oxide semiconductor and form a good interface. As long as it's possible, that's fine.

[0144] Insulating films made of materials with high barrier properties, silicon oxide films with low nitrogen content, and silicon oxynitride films Alternatively, a gate insulating film 803 having a structure in which an insulating film such as a silicon dioxide film is laminated may be formed. In this case, insulating films such as silicon oxide films and silicon oxynitride films are used as insulating films with high barrier properties and oxide semiconductors. As an insulating film with high barrier properties, for example, a silicon nitride film or a silicon nitride oxide film is used. , aluminum nitride film, or aluminum nitride oxide film. By using a thin insulating film, impurities in the atmosphere such as moisture or hydrogen, or impurities contained in the substrate, Impurities such as alkali metals and heavy metals are present in the oxide semiconductor film, the gate insulating film 803, Alternatively, the intrusion of the oxide semiconductor film into the interface between the oxide semiconductor film and another insulating film and its vicinity can be prevented. In addition, a silicon oxide film or a silicon oxynitride film having a low nitrogen content that is in contact with the oxide semiconductor film may be used. By forming an insulating film such as a film, the insulating film with high barrier properties is in direct contact with the oxide semiconductor film. This can prevent this.

[0145] For example, the first gate insulating film is formed by sputtering to a thickness of 50 nm to 200 nm. The following silicon nitride films (SiN y (y>0)), and a second gate insulating film is formed on the first gate insulating film. As the insulating film, a silicon oxide film (SiO x (x>0) The gate insulating film 803 may be formed by layering the gate insulating film 803 with a thickness of 100 nm. can be set appropriately depending on the characteristics required for the transistor, and is in the range of 350 nm to 400 nm. It can be about m.

[0146] In this embodiment, a silicon nitride film having a thickness of 50 nm is formed by sputtering. A gate insulating film 80 having a structure in which a silicon oxide film having a thickness of 100 nm formed by Form 3.

[0147] In order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the gate insulating film 803 as much as possible, As a pre-treatment for film formation, the gate electrode 801 and the electrode The substrate 800 on which 802 is formed is preheated to remove moisture or hydrogen adsorbed on the substrate 800. It is preferable to desorb and exhaust the impurities. The temperature is 0°C or lower, preferably 150°C to 300°C. The means is preferably a cryopump, but this preheating process can be omitted.

[0148] Next, a film having a thickness of 2 nm to 200 nm, preferably 3 nm, is deposited on the gate insulating film 803. and forming an oxide semiconductor film with a thickness of 3 nm to 20 nm. The oxide semiconductor film is formed by sputtering using an oxide semiconductor as a target. The oxide semiconductor film is formed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or Alternatively, it is formed by sputtering in a mixed atmosphere of rare gas (e.g., argon) and oxygen. It is possible.

[0149] Before forming the oxide semiconductor film by a sputtering method, argon gas was introduced to form a plasma. Reverse sputtering is performed to generate a mask, and dust adhering to the surface of the gate insulating film 803 is removed. Reverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power supply under atmospheric pressure to form plasma on the substrate and modify the surface. It should be noted that nitrogen, helium, etc. may be used instead of the argon atmosphere. Alternatively, the heating may be performed in an argon atmosphere to which oxygen, nitrous oxide, etc. have been added. The treatment may be carried out in an atmosphere containing chlorine, carbon tetrafluoride, or the like.

[0150] As described above, the oxide semiconductor film is made of a quaternary metal oxide, In—Sn—Ga—Zn— O-based oxide semiconductors, ternary metal oxides such as In-Ga-Zn-O-based oxide semiconductors, and I n-Sn-Zn-O based oxide semiconductor, In-Al-Zn-O based oxide semiconductor, Sn-Ga -Zn-O based oxide semiconductor, Al-Ga-Zn-O based oxide semiconductor, Sn-Al-Zn- O-based oxide semiconductors, binary metal oxides such as In-Zn-O-based oxide semiconductors, and Sn-Z nO-based oxide semiconductors, Al-Zn-O-based oxide semiconductors, Zn-Mg-O-based oxide semiconductors , Sn-Mg-O based oxide semiconductor, In-Mg-O based oxide semiconductor, In-Ga-O based oxide oxide semiconductors, In-O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors A conductor or the like can be used. The oxide semiconductor may contain silicon.

[0151] In addition, oxide semiconductors have the chemical formula InMO3(ZnO) m (m>0) Here, M is one or more metal elements selected from Ga, Al, Mn, and Co. show.

[0152] In this embodiment, gold containing In (indium), Ga (gallium), and Zn (zinc) is used. In-Ga-Zn with a film thickness of 30 nm obtained by sputtering using a metal oxide target A -O-based non-single-crystal film is used as the oxide semiconductor film. A target having a composition ratio of n2O3:Ga2O3:ZnO=1:1:1 [molar ratio] was used. In addition, the composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] is used. or a target with In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] A target containing SiO2 in an amount of 2% by weight or more and 10% by weight or less can be used. Alternatively, a metal oxide containing In, Ga, and Zn may be used for film formation. The filling rate of the target is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target with a high filling rate, the oxide semiconductor film formed The film becomes a dense film.

[0153] In addition, when an In-Zn-O-based material is used as the oxide semiconductor, the composition of the target to be used The atomic ratio of In:Zn is 50:1 to 1:2 (converted to molar ratio, In2O3 In:ZnO=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (molar ratio) In terms of In2O3:ZnO=10:1 to 2:1), more preferably In:Zn=1 0.5:1 to 15:1 (converted to a molar ratio of In2O3:ZnO = 3:4 to 15:2) For example, the target used to form an In-Zn-O based oxide semiconductor has an atomic ratio of When In:Zn:O=X:Y:Z, Z>1.5X+Y.

[0154] In this embodiment, the substrate is held in a processing chamber maintained in a reduced pressure state, and the remaining moisture in the processing chamber is removed. While removing the hydrogen and moisture, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the target is used. An oxide semiconductor film is formed on a substrate 800. During the film formation, the substrate temperature is set to 100° C. or higher and 600° C. The temperature may be set to 200° C. or higher and 400° C. or lower. This allows the impurity concentration in the formed oxide semiconductor film to be reduced. In addition, damage caused by sputtering is reduced. To remove residual moisture in the processing chamber, It is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, It is preferable to use a titanium sublimation pump. A cryopump with a cold trap may also be used. When the chamber is evacuated, hydrogen atoms and compounds containing hydrogen atoms, such as water (H2O) (preferably Since the exhaust gas contains carbon atoms, the oxide semiconductor film formed in the film-forming chamber may be damaged. The concentration of impurities contained in the membrane can be reduced.

[0155] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. When a pulsed direct current (DC) power supply is used, particles that are generated during film formation are This is preferable because it reduces dust particles that are generated and makes the film thickness distribution uniform.

[0156] In order to prevent hydrogen, a hydroxyl group, and moisture from being contained in the oxide semiconductor film as much as possible, As a pre-treatment for film formation, up to the gate insulating film 803 is formed in the pre-heating chamber of the sputtering equipment. The substrate 800 is preheated to remove impurities such as moisture or hydrogen adsorbed on the substrate 800. The preheating temperature is preferably 100°C or higher and 400°C or lower. The temperature is preferably 150°C or higher and 300°C or lower. The preheating process can be omitted. The heating is performed before the insulating film 808 is formed. The same process may be carried out on the substrate 800 on which the electrodes 807 have been formed.

[0157] Next, as shown in FIG. 9B, the oxide semiconductor film is etched into a desired shape. By processing (patterning), an island is formed on the gate insulating film 803 at a position overlapping the gate electrode 801. A crystalline oxide semiconductor film 804 is formed.

[0158] A resist mask for forming the island-shaped oxide semiconductor film 804 is formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask is not required. Therefore, the manufacturing cost can be reduced.

[0159] Note that the etching for forming the island-shaped oxide semiconductor film 804 is dry etching. Dry etching can be performed by wet etching, or both can be used. The gas may be a gas containing chlorine (chlorine-based gas, for example, chlorine (Cl2), boron chloride (B Cl3), silicon chloride (SiCl4), carbon tetrachloride (CCl4), etc.) are preferred. Fluorine-containing gases (fluorine-based gases, such as carbon tetrafluoride (CF4), sulfur fluoride (SF6), Nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr), acid Oxygen (O2), and rare gases such as helium (He) and argon (Ar) are added to these gases. Gases such as those mentioned above can be used.

[0160] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0161] The etching solution used for wet etching was ITO-07N (manufactured by Kanto Chemical Co., Ltd.). In addition, the etching solution used after wet etching is washed away together with the etched material. The waste etching solution containing the removed material is purified and the The material used for etching may be reused. By recovering and reusing materials such as aluminum, we can make effective use of resources and reduce costs. This can be done.

[0162] Note that reverse sputtering is performed before forming a conductive film in the next step, and the island-shaped oxide semiconductor film 804 and It is also preferable to remove resist residues adhering to the surface of the gate insulating film 803. .

[0163] Then, under an atmosphere of nitrogen, oxygen, ultra-dry air, or a noble gas (argon, helium, etc.), The oxide semiconductor film 804 is subjected to heat treatment. It is desirable that the concentration of the acid is less than 1 ppm, preferably less than 10 ppb. By performing heat treatment on the oxide semiconductor film 804, moisture or hydrogen in the oxide semiconductor film 804 is removed. Specifically, the temperature is 300°C or higher and 850°C or lower (or a glass substrate). The heat treatment may be carried out at a temperature equal to or lower than the strain point of the sheet, preferably at 550°C or higher and 750°C or lower. For example, the heat treatment may be performed at 600°C for 3 to 6 minutes. If the temperature is too high, dehydration or dehydrogenation can be achieved in a short time, and the temperature can be increased to exceed the strain point of the glass substrate. Alternatively, the substrate can be heated for about an hour at a temperature of 450°C. Heat treatment may also be performed.

[0164] In this embodiment, an electric furnace, which is one of heat treatment devices, is used to heat the oxide semiconductor film 804. Then, a heat treatment is carried out in a nitrogen atmosphere.

[0165] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device for heating the object to be treated by radiation may be provided. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that uses high-temperature gas for heat treatment. An inert gas that does not react with the material to be treated by heat treatment, such as a rare gas such as argon or nitrogen. Sexual gases are used.

[0166] For example, the substrate is transferred into an inert gas heated to a high temperature of 650°C to 700°C as a heat treatment. After heating for several minutes, the substrate is moved and released from the inert gas heated to a high temperature. RTA may also be used. GRTA allows high-temperature heat treatment in a short time.

[0167] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain oxygen or hydrogen. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the impurity concentration is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to set the concentration to 0.1 ppm or less.

[0168] When impurities such as moisture or hydrogen are added to an oxide semiconductor, the gate bias and thermal stress Test conditions are, for example, 85°C, 2 x 10 6 V / cm, 12 hours) In this case, the bonds between the impurities and the main component of the oxide semiconductor are formed by a strong electric field (B: bias) and high temperature ( T: temperature), the dangling bonds generated by the dangling bonds cause the drift of the threshold voltage (Vth). However, as described above, the interface between the gate insulating film and the oxide semiconductor film The characteristics are improved and impurities, particularly moisture or hydrogen, in the oxide semiconductor film are removed as much as possible. By removing the SiO 2 layer, a transistor that is stable even in the BT test can be obtained.

[0169] Through the above steps, the hydrogen concentration in the oxide semiconductor film 804 can be reduced and the oxide semiconductor film 804 can be highly purified. Furthermore, the hydrogen concentration is reduced, resulting in high purity, and oxygen is supplied to the By using an oxide semiconductor film with reduced defects, the voltage resistance is high and the short channel effect is Therefore, a transistor having a low on-off ratio can be manufactured.

[0170] When the oxide semiconductor film is heated, the temperature may vary depending on the material of the oxide semiconductor film and heating conditions. Plate-like crystals may be formed on the surface of the oxide semiconductor film. It is preferable that the crystal is a single crystal with the c-axis oriented substantially perpendicular to the crystal. The crystal is preferably a polycrystalline substance with the c-axis oriented substantially perpendicular to the surface of the oxide semiconductor film. In addition to the c-axis orientation, the polycrystalline body has ab planes that match each other. It is preferable that the a-axis or the b-axis of the oxide semiconductor film be the same. If the surface is uneven, the plate crystal will become polycrystalline. Therefore, the surface of the substrate should be as smooth as possible. It is desirable that it be flat.

[0171] Next, a source electrode or a drain electrode (formed in the same layer as this) is formed on the oxide semiconductor film 804. The conductive film used as the wiring (including the wiring to be used) is formed by sputtering or vacuum deposition, and then By patterning the conductive film by etching or the like, an oxide film is formed as shown in FIG. A source electrode 805 and a drain electrode 806 on the semiconductor film 804 and a gate insulating film 803 are formed. An electrode 802 and an overlapping electrode 807 are formed between them.

[0172] A source electrode 805, a drain electrode 806, and an electrode 807 (which are formed in the same layer) are The materials for the conductive film (including wires) are Al, Cr, Cu, Ta, Ti, Mo, and W. or an alloy containing the above elements or a combination of the above elements In addition, Cr, T, etc. may be placed under or on top of a metal film such as Al or Cu. It may also be configured by laminating high melting point metal films such as Al, Ti, Mo, and W. I, Ta, W, Mo, Cr, Nd, Sc, Y, etc., hillocks and whiskers that occur in Al films Heat resistance can be improved by using Al materials that contain elements that prevent the generation of It becomes possible.

[0173] The conductive film may have a single layer structure or a stacked structure of two or more layers. a single-layer structure of an aluminum film containing titanium; a two-layer structure of a titanium film laminated on an aluminum film; A film is then laminated on top of the Ti film, an aluminum film is then laminated on top of that, and a Ti film is then formed on top of that. Examples include a three-layer structure.

[0174] Also, a source electrode 805, a drain electrode 806, and an electrode 807 (formed in the same layer as this) The conductive film (including the wiring) may be formed of a conductive metal oxide. Metal oxides include indium oxide (In2O3), tin oxide (SnO2), and zinc oxide ( ZnO), indium oxide-tin oxide alloy (In2O3-SnO2, abbreviated as ITO), Indium oxide zinc oxide alloy (In2O3-ZnO) or the above metal oxide material with silicon A material containing silicon dioxide or silicon dioxide can be used.

[0175] When a heat treatment is performed after the conductive film is formed, the conductive film must have heat resistance to withstand this heat treatment. It is preferable that

[0176] Note that the conductive film is etched so as not to remove the oxide semiconductor film 804 as much as possible. The materials and etching conditions are adjusted appropriately. Depending on the etching conditions, island-like The exposed portion of the oxide semiconductor film 804 is partially etched, whereby a groove (a depression) is formed. It may also be achieved.

[0177] In order to reduce the number of photomasks and steps used in the photolithography process, A resist mask formed by a multi-tone mask that gives the applied light multiple levels of intensity is used. The resist mask formed using the multi-tone mask may be formed by etching a plurality of resist masks. The shape can be further modified by etching. Therefore, it can be used in multiple etching processes to process different patterns. A single multi-tone mask can be used to create a register that corresponds to at least two different patterns. Therefore, the number of exposure masks can be reduced, and the corresponding The photolithography process can also be eliminated, which simplifies the process.

[0178] Next, plasma treatment is performed using gases such as N2O, N2, or Ar. The annealing process removes adsorbed water and other substances adhering to the exposed surface of the oxide semiconductor film. Alternatively, the plasma treatment may be performed using a mixed gas of oxygen and argon.

[0179] After the plasma treatment, as shown in FIG. 9(D), the source electrode 805 and the drain electrode An insulating film 808 is formed to cover the gate electrode 806, the electrode 807, and the oxide semiconductor film 804. It is desirable that the insulating film 808 contains as little impurities as possible, such as moisture and hydrogen. It may be a single layer insulating film, or may be made up of a plurality of laminated insulating films. When hydrogen is contained in the film 808, the hydrogen penetrates into the oxide semiconductor film or The oxygen in the conductive film is extracted, and the back channel part of the oxide semiconductor film becomes low-resistance (n-type). Therefore, the insulating film 808 should be as thin as possible. It is important to avoid using hydrogen in the deposition process, so that the resulting film is hydrogen-free. It is desirable to use a material with high barrier properties for the film 808. For example, a material with high barrier properties such as an insulating material The film may be a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film. When using multiple laminated insulating films, the nitrogen content ratio Insulating films such as silicon oxide films and silicon oxynitride films, which have low barrier properties, are used in place of the insulating films with high barrier properties. The insulating film having a low nitrogen content is formed on the oxide semiconductor film 804. The source electrode 805, the drain electrode 806, and the oxide semiconductor film 804 are sandwiched between the By using an insulating film with high barrier properties, oxidation can be prevented. In the oxide semiconductor film 804, in the gate insulating film 803, or between the oxide semiconductor film 804 and other insulating films This can prevent impurities such as moisture or hydrogen from entering the film interface and its vicinity. In addition, a silicon oxide film or a silicon oxynitride film having a low nitrogen ratio is formed in contact with the oxide semiconductor film 804. By forming an insulating film such as a film, the insulating film made of a material with high barrier properties can be directly connected to the oxide semiconductor. This can prevent contact with the body membrane 804.

[0180] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed by sputtering. The insulating film 808 has a structure in which a silicon nitride film having a thickness of 100 nm formed by the method is laminated. The substrate temperature during film formation may be set to a temperature between room temperature and 300° C. Set the temperature to 100°C.

[0181] Note that heat treatment may be performed after the insulating film 808 is formed. , ultra-dry air, or a rare gas (argon, helium, etc.) atmosphere, The temperature is 200°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. The content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less. In this embodiment, for example, a heat treatment is performed in a nitrogen atmosphere at 250° C. for 1 hour. Alternatively, a source electrode 805, a drain electrode 806, and an electrode 807 are formed. Before the heat treatment, RTA treatment was performed at high temperature for a short time, similar to the heat treatment performed on the oxide semiconductor film. The oxide semiconductor film 8 may be formed by the heat treatment previously performed on the oxide semiconductor film. Even if oxygen vacancies occur in 04, the An insulating film 808 containing oxygen is provided in contact with an exposed region of the oxide semiconductor film 804. After the oxidation, heat treatment is performed, whereby oxygen is supplied to the oxide semiconductor film 804. Therefore, oxygen is supplied to a region of the oxide semiconductor film 804 which is in contact with the insulating film 808. As a result, it is possible to reduce oxygen vacancies that act as donors and satisfy the stoichiometric composition ratio. As a result, the electrical characteristics of the transistor can be improved and the variations in the electrical characteristics can be reduced. The timing of this heat treatment is not particularly limited as long as it is performed after the insulating film 808 is formed. For example, heat treatment during resin film formation and heat treatment to reduce the resistance of transparent conductive films. It can also serve as a

[0182] Next, a conductive film is formed on the insulating film 808, and then the conductive film is patterned to form an oxide film. A back gate electrode may be formed at a position overlapping the nitride semiconductor film 804. When forming a back gate electrode, an insulating film is formed so as to cover the back gate electrode. 801, 802, or the source electrode 805 and the drain electrode 806, It can be formed using the same material and structure as the electrode 807 .

[0183] The thickness of the back gate electrode is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a structure in which a titanium film, an aluminum film, and a titanium film are stacked is used. After forming the conductive film, a resist mask is formed by photolithography or the like, and Unnecessary portions are removed by etching, and the conductive film is processed (patterned) into a desired shape. By this, a back gate electrode is formed.

[0184] The insulating film prevents moisture and hydrogen in the atmosphere from affecting the characteristics of the transistor. It is desirable to use a material with high barrier properties that can be used. For example, The film may be a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film. A film or the like is formed in a single layer or laminated by a plasma CVD method, a sputtering method, or the like. To obtain a barrier effect, the insulating film should have a thickness of, for example, 15 nm to 400 nm. It is preferable to form the film with a thickness of 100 μm.

[0185] In this embodiment, a 300 nm insulating film is formed by plasma CVD. The film formation conditions are as follows: The flow rate of silane gas was set to 4 sccm, and the flow rate of nitrous oxide (NO) was set to 800 sccm. The substrate temperature is set to 400°C.

[0186] Through the above steps, a transistor 809 and a capacitor 810 are formed. The element 810 is formed by stacking an electrode 802 and an electrode 807 with a gate insulating film 803 interposed therebetween. It is formed in areas where

[0187] The transistor 809 includes a gate electrode 801 and a gate insulating film 803 on the gate electrode 801. and an oxide semiconductor film 801 overlapping the gate electrode 801 on the gate insulating film 803. 4 and a pair of source and drain electrodes 805 and 806 formed on the oxide semiconductor film 804. Further, the transistor 809 is formed over the oxide semiconductor film 804. The insulating film 808 may be included as a component of the transistor 809 shown in FIG. is a part of the oxide semiconductor film 804 between the source electrode 805 and the drain electrode 806. is an etched channel etch structure.

[0188] Note that although the transistor 809 has been described as a single-gate transistor, If necessary, a plurality of electrically connected gate electrodes 801 may be provided to form a channel. A transistor having a multi-gate structure having multiple regions can also be formed.

[0189] The band gap of an oxide semiconductor is 3.0 eV to 3.5 eV. The band gap of gallium nitride is 3.26 eV, and that of gallium nitride is 3.39 eV. Both of these carbons have a band gap that is approximately three times larger than that of silicon. Compound semiconductors such as silicon nitride and gallium nitride are wide-gap semiconductors. The wide band gap characteristic of oxide semiconductors is also important for signal processing circuits. This is advantageous for improving voltage resistance and reducing power loss.

[0190] However, compound semiconductors such as silicon carbide and gallium nitride must be single crystals. To obtain a single-crystal material, the process temperature must be significantly higher than that of an oxide semiconductor. The manufacturing conditions are different, such as the need for crystal growth or epitaxial growth on a special substrate. The conditions are severe, and it is impossible to form a film on silicon wafers or low-cost glass substrates, both of which are readily available. Therefore, it is not possible to use inexpensive substrates and it is not possible to accommodate larger substrates. Signal processing circuits using compound semiconductors such as silicon and gallium nitride are not suitable for mass production. Oxide semiconductors can be deposited on glass substrates at room temperature, and the amount of High productivity.

[0191] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0192] (Embodiment 7) In this embodiment, a transistor configuration different from that in Embodiment 6 will be described.

[0193] In FIG. 10A, a transistor 401 and a capacitor 402 are formed over a substrate 400. Here is an example:

[0194] The transistor 401 includes a gate electrode 403 and a gate an insulating film 404 on the electrode 403, which overlaps with the gate electrode 403 with the insulating film 404 sandwiched therebetween; The oxide semiconductor film 405 functions as an active layer, and the channel protection layer on the oxide semiconductor film 405 The semiconductor layer 406 is provided with a source electrode 407 and a drain electrode 408 on the oxide semiconductor layer 405. The oxide semiconductor film 405, the channel protection film 406, the source electrode 407, and the drain electrode 408 are An insulating film 409 is formed on the gate electrode 408, and the transistor 401 is 9 may be included as a component.

[0195] The capacitor 402 includes an electrode 410, an insulating film 404 over the electrode 410, and a and an upper electrode 411.

[0196] The channel protection film 406 is formed by vapor deposition such as plasma CVD or thermal CVD, or by sputtering. The channel protection film 406 can be formed by using a coating method. It is desirable to use materials such as silicon oxide, silicon oxynitride, and silicon nitride oxide. By using an inorganic material containing HCl for the channel protective film 406, moisture in the oxide semiconductor film 405 can be prevented. Even if oxygen vacancies occur due to heat treatment to reduce hydrogen or oxide semiconductors, Oxygen is supplied to at least the region of the conductor film 405 that is in contact with the channel protective film 406, and the donor and It is possible to reduce the oxygen deficiency and achieve a structure that satisfies the stoichiometric composition ratio. The variation in the electrical characteristics of the transistor 401 due to oxygen vacancies is reduced, and the electrical characteristics are improved. It can be realized.

[0197] The channel formation region is a region of the semiconductor film that is adjacent to the gate electrode with the gate insulating film sandwiched therebetween. This corresponds to the overlapping area.

[0198] The transistor 401 may further include a back gate electrode over the insulating film 409. The back gate electrode is formed to overlap with a channel formation region of the oxide semiconductor film 405. The back gate electrode may be in an electrically insulating floating state. In the latter case, the back gate electrode may be in a state where a gate voltage is applied. The potential may be the same as that of the electrode 403, or a fixed potential such as ground may be applied. By controlling the potential applied to the back gate electrode, The threshold voltage of the capacitor 401 can be controlled.

[0199] 10B shows a transistor 421 and a capacitor having a different structure from that shown in FIG. 10A. 4 shows an example in which a capacitor 422 is formed on a substrate 400.

[0200] The transistor 421 includes a gate electrode 423 and a gate The insulating film 424 on the electrode 423, the source electrode 427 on the insulating film 424, and the drain electrode 428 28, which overlaps with the gate electrode 423 with the insulating film 424 sandwiched therebetween, and which also overlaps with the source electrode 42 7 and the drain electrode 428, and an oxide semiconductor film 425 that functions as an active layer. The oxide semiconductor film 425, the source electrode 427, and the drain electrode 428 are provided over the oxide semiconductor film 425. The insulating film 429 is formed on the transistor 421. It's okay to be.

[0201] The capacitor 422 includes an electrode 430, an insulating film 424 over the electrode 430, and a and an upper electrode 431.

[0202] The transistor 421 may further include a back gate electrode over the insulating film 429. The back gate electrode is formed to overlap with a channel formation region of the oxide semiconductor film 425. The back gate electrode may be in an electrically insulating floating state. In the latter case, the back gate electrode may be in a state where a gate voltage is applied. The potential may be the same as that of the electrode 423, or a fixed potential such as ground may be applied. By controlling the potential applied to the back gate electrode, The threshold voltage of the capacitor 421 can be controlled.

[0203] Also, FIG. 10(C) shows a transistor having a different configuration from those shown in FIGS. 10(A) and 10(B). 4 shows an example in which a capacitor 441 and a capacitor element 442 are formed on a substrate 400.

[0204] The transistor 441 is formed on a substrate 400 having an insulating surface, and includes a source electrode 447 and a drain electrode 448. The source electrode 447 and the drain electrode 448 function as an active layer. The oxide semiconductor film 445, the insulating film 444 over the oxide semiconductor film 445, and the insulating film 444 The gate electrode 443 overlaps with the oxide semiconductor film 445 and is sandwiched between the gate electrode 443 and the oxide semiconductor film 445. An insulating film 449 is formed on the electrode 443. The transistor 441 is It may be included in the components.

[0205] The capacitor 442 includes an electrode 450, an insulating film 444 over the electrode 450, and a and an upper electrode 451.

[0206] Note that an oxide semiconductor film formed by sputtering or the like contains a large amount of moisture or hydrogen as impurities. It has been found that water or hydrogen easily forms donor levels. Therefore, moisture or hydrogen in the oxide semiconductor film is an impurity. In order to reduce these impurities and achieve high purity, the oxide semiconductor film must be free of nitrogen, oxygen, and superconductors. Heat treatment is carried out in an atmosphere of dry air or a rare gas (argon, helium, etc.). The gas has a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb The above heat treatment should be carried out at a temperature of 500°C to 850°C (or glass). The temperature is preferably in the range of 550°C to 750°C. The heat treatment should not exceed the heat resistance temperature of the substrate used. The effect of heat treatment on desorption of the element was investigated by TDS (Thermal Desorption This has been confirmed by thermal desorption spectrometry (thermal desorption spectrometry).

[0207] Note that a semiconductor display device according to one embodiment of the present invention includes an oxide semiconductor in a channel formation region. The pixel portion is characterized by using a transistor having the same structure as the pixel portion. In this case, the pixel section and the driver circuit can be formed on one substrate. Cut.

[0208] Alternatively, a part or the whole of the driver circuit may be formed using a polycrystalline semiconductor or a polycrystalline semiconductor having higher mobility than an oxide semiconductor. Alternatively, the light emitting device may be manufactured using a single crystal semiconductor and mounted on a substrate on which a pixel portion is formed. For example, a semiconductor having silicon or germanium, which has higher mobility than an oxide semiconductor, Transistors using crystalline semiconductors such as polycrystalline and single crystal are manufactured on silicon wafers, SOI ( Silicon-on-insulator (SIO) substrate, polycrystalline semiconductor deposited on an insulating surface It can be formed using a body membrane or the like.

[0209] The SOI substrate is, for example, a UNIBOND (registered trademark) substrate, represented by Smart Cut (registered trademark). trademark), ELTRAN (Epitaxial Layer Transfer) (registered trademark Marker), Dielectric Separation Method, PACE (Plasma Assisted Chemical Etching method, SIMOX (Separation by Implant It can be prepared using the ed Oxygen method or the like.

[0210] A silicon semiconductor film formed on a substrate having an insulating surface is crystallized by a known technique. Known crystallization methods include laser crystallization using laser light, There are two types of crystallization methods: one using a catalytic element and the other using a laser. It is also possible to use a substrate with excellent heat resistance such as quartz. When using a crystallization method, the thermal crystallization method using an electric furnace, the lamp annealing crystallization method using infrared light, The crystallization method combines a catalyst element-based crystallization method and a high-temperature annealing method at approximately 950°C. is also good.

[0211] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0212] (Embodiment 8) A semiconductor display device according to one aspect of the present invention has a position input device called a touch panel. There are.

[0213] The touch panel detects the position pointed by a finger or stylus in the position detection section. Therefore, the position detection unit can detect the pixel position of the panel. By providing a touch panel so that it overlaps with the pixel area, the user of the semiconductor display device can Information can be obtained as to whether the location of the object was pointed out.

[0214] The position detection unit uses resistive, capacitive, ultrasonic, and infrared methods to detect the position. This can be done using various methods, such as an optical method including the above, and an electromagnetic induction method. 1 shows a perspective view of a position detection unit using a resistive film method. An electrode 1630 and a plurality of second electrodes 1631 are provided facing each other at intervals. When pressure is applied to any of the plurality of first electrodes 1630 with a finger or the like, the first electrode 1630 630 contacts one of the plurality of second electrodes 1631. The value of the voltage applied to both ends of the second electrode 1630 and the value of the voltage applied to both ends of each of the plurality of second electrodes 1631 By monitoring the value of the first electrode 1630 and the second electrode 1631, it is possible to determine which first electrode 1630 and which second electrode 1631 are in contact with each other. Therefore, the position where the finger touched can be detected.

[0215] The first electrode 1630 and the second electrode 1631 are made of a light-transmitting conductive material, for example, silicon oxide. Contains indium tin oxide (ITSO), indium tin oxide (ITO), zinc oxide (Zn O), indium zinc oxide (IZO), and gallium-doped zinc oxide (GZO). It can be formed.

[0216] FIG. 12(A) shows a diagonal view of a position detection unit using a projected capacitance method among the capacitance methods. The projected capacitive position detection unit has a plurality of first electrodes 1640 and a plurality of second electrodes 1641. Each first electrode 1640 is provided so as to overlap with a rectangular conductive film 1641. 642 are connected to each other, and each second electrode 1641 is formed by a rectangular conductive film 16 The first electrode 1640 and the second electrode 1641 are connected to each other. The shape is not limited to this configuration.

[0217] In addition, in FIG. 12(A), a conductive layer is formed on a plurality of first electrodes 1640 and a plurality of second electrodes 1641. 12(A) is overlaid with an insulating layer 1644 which functions as a conductor. A plurality of first electrodes 1640, a plurality of second electrodes 1641, and an insulating layer 1644 are overlapped. As shown in FIG. 12(B), the plurality of first electrodes 1640 and the plurality of second electrodes 1641 are aligned. The two electrodes 1641 are formed by displacing the rectangular conductive film 1642 and the rectangular conductive film 1643 from each other. They overlap so that they can be seen.

[0218] When a finger or the like comes into contact with the insulating layer 1644, a gap between the finger and any of the plurality of first electrodes 1640 is formed. A capacitance is also formed between any of the plurality of second electrodes 1631 and the finger. Therefore, by monitoring the change in capacitance, it is possible to determine whether any of the first electrodes 1630 Since it is possible to identify which of the first and second electrodes 1631 is closest to the finger, the position where the finger is touching can be determined. The position can be detected.

[0219] Note that the touch panel included in the semiconductor display device according to one embodiment of the present invention is a touch panel that allows a user to detect a position. If the device has a configuration that can extract the position information pointed to as a signal at the output unit, 11 and 12. Alternatively, the configuration may be other than that shown in FIGS.

[0220] In addition, a liquid crystal display device according to one embodiment of the present invention may include a photo sensor instead of a touch panel. FIG. 17A shows an example of the structure of a pixel portion having a photosensor. , shown schematically.

[0221] The pixel section 1650 shown in FIG. 17(A) includes a pixel 1651 and a photo corresponding to the pixel 1651. The photosensor 1652 is a light-receiving element such as a photodiode. The photodiode has a function of emitting an electric signal by detecting a light, and a transistor. The light received by the photo sensor 1652 is the light emitted from the backlight when it hits the object to be detected. Reflected light can be used.

[0222] FIG. 17B shows an example of the structure of the photosensor 1652. The photo sensor 1652 includes a photodiode 1653, a transistor 1654, and a transistor The photodiode 1653 has one electrode connected to the reset signal line 16 56, the other electrode of which is connected to the gate electrode of transistor 1654. The capacitor 1654 has one of its source electrode and drain electrode connected to a reference signal line 1657 and the other connected to a reference signal line 1658. The other end is connected to either the source or drain electrode of the transistor 1655. The transistor 1655 has a gate electrode connected to a gate signal line 1658 and a source electrode and a drain electrode connected to a gate signal line 1658. The other of the electrodes is connected to an output signal line 1659 .

[0223] The circuit configuration of the photosensor 1652 is not limited to the above-mentioned configuration, and the information on the light intensity may be converted into an electrical signal. Any circuit configuration that can extract the signal is sufficient. 3 can be made of amorphous, microcrystalline, polycrystalline, or single-crystalline silicon.

[0224] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0225] (Embodiment 9) A liquid crystal display device according to one embodiment of the present invention has a low off-state current in a pixel portion and high reliability. The use of transistors provides high visibility and high reliability.

[0226] FIG. 13 illustrates an example of a cross-sectional view of a pixel in a liquid crystal display device according to one embodiment of the present invention. The transistor 1401 shown in FIG. 3 has a gate electrode 1402 formed on an insulating surface and a gate A gate insulating film 1403 on the gate electrode 1402 and a gate electrode on the gate insulating film 1403 The oxide semiconductor film 1404 overlapping with the electrode 1402 and the oxide semiconductor film 1404 are A conductive film 1405 formed to be stacked and functioning as a source electrode or a drain electrode and a conductive film 1406. The transistor 1401 further includes an oxide semiconductor film 14 The insulating film 1407 formed on the insulating film 1404 may be included as a component of the insulating film 1407. , a gate electrode 1402, a gate insulating film 1403, an oxide semiconductor film 1404, and a conductive film The insulating film 1405 and the conductive film 1406 are formed so as to cover each other.

[0227] An insulating film 1408 is formed on the insulating film 1407. An opening is provided in a part of the conductive film 1406. , a pixel electrode 1410 is formed.

[0228] Moreover, on the insulating film 1408, a spacer 141 for controlling the cell gap of the liquid crystal element is formed. The spacer 1417 is formed by etching the insulating film into a desired shape. However, by dispersing spherical spacers on the insulating film 1408, The gap may also be controlled.

[0229] An alignment film 1411 is formed on the pixel electrode 1410. A counter electrode 1413 is provided at a position facing the electrode 410. An alignment film 1414 is formed on the side closer to the base electrode 1410. 1414 can be formed using organic resins such as polyimide and polyvinyl alcohol. The surface can be subjected to orientation treatment such as rubbing to align the liquid crystal molecules in a certain direction. Rubbing is done by wrapping a roller around a cloth such as nylon so that it comes into contact with the alignment film. This can be done by rotating the roller and rubbing the surface of the alignment film in a certain direction. Using inorganic materials such as silicon oxide, alignment films with alignment properties can be formed by evaporation without alignment treatment. It is also possible to directly form the orientation film 1411 and the alignment film 1414.

[0230] The pixel electrode 1410 and the counter electrode 1413 are surrounded by a sealant 1416. The liquid crystal 1415 is provided in the area. The liquid crystal 1415 is injected by a dispenser ( A dripping method or a dip method (pumping method) may be used. Filler may be mixed into the material 1416 .

[0231] In addition, in FIG. 13, disclination due to the disorder of the alignment of the liquid crystal 1415 between pixels is observed. In order to prevent the pixel from being visible, a light-shielding film 142 is provided between the pixels. The shielding film contains black pigments such as carbon black and low-order titanium oxide. Alternatively, the shielding film may be formed of a film containing chromium. It is also possible.

[0232] Then, a color filter is formed at a position where the pixel electrode 1410, the counter electrode 1413, and the liquid crystal 1415 overlap. A colored layer 1422 that acts as a filter and preferentially transmits only visible light in a specific wavelength range. The red, blue, and green wavelength regions are preferentially transmitted. By providing such a colored layer 1422 for each pixel, a full-color image can be displayed. In this case, using a backlight that produces white light enhances the purity of the colors in the image. For example, a red light source and a blue light source are used as a backlight to obtain white light. a combination of a yellow or orange light source and a blue light source; a combination of a white light source and a green light source; a configuration using a single light source, a configuration using a combination of a cyan light source, a magenta light source, and a yellow light source Composition etc. can be used.

[0233] Alternatively, the backlight may be configured to output light in the wavelength ranges corresponding to red, blue, and green in sequence. In this case, a full-color image can be displayed without using a color filter. This can improve the luminous efficiency of the semiconductor display device. If the display state of the display element is fixed, and no color filter is used, the image will not be full color. A monochrome image can be obtained, and a full-color image can be obtained by using a color filter.

[0234] In addition to cold cathode fluorescent lamps, light-emitting elements such as LEDs and OLEDs can also be used as light sources. However, since the wavelength of light obtained varies depending on the light source, it is necessary to select the appropriate color according to the required color. It is advisable to select the light source to be used.

[0235] In FIG. 13, the shielding film 1421 and the colored layer 1422 are provided on the counter electrode 1413 side. The shielding film 1421 or the colored layer 1422 is disposed on the pixel electrode 1410 side. The incident direction of light to the liquid crystal 1415 and the exit direction of light transmitted through the liquid crystal 1415 In accordance with this, the positions at which the shielding film 1421 and the colored layer 1422 are provided can be determined appropriately. do.

[0236] The pixel electrode 1410 and the counter electrode 1413 are made of, for example, indium tin oxide ( ITSO), indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide Transparent conductive materials such as gallium-doped zinc oxide (GZO) can be used. can.

[0237] In this embodiment, the liquid crystal display device is a TN (Twisted Nematic) ) type, but VA (Vertical Alignment) type, OCB (Opti cally Compensated Birefringence) type, IPS(In -Plane Switching) type, MVA (Multi-domain Vert) Other liquid crystal display devices such as a (Medium Alignment) type may also be used.

[0238] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. For this purpose, a liquid crystal composition containing 5% by weight or more of a chiral agent is used as the liquid crystal 1415. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 10 μsec or more. It is short at 100 μsec or less, and because it is optically isotropic, alignment processing is not required. The reliability is low.

[0239] In FIG. 13, a liquid crystal 1415 is sandwiched between the pixel electrode 1409 and the counter electrode 1413. However, the liquid crystal display device according to one embodiment of the present invention may be The present invention is not limited to this configuration. For example, an IPS type liquid crystal element or a liquid crystal element using a blue phase The pair of electrodes may be formed on the same substrate.

[0240] Next, the appearance of a panel of a liquid crystal display device according to one embodiment of the present invention will be described with reference to FIG. FIG. 14(A) shows a substrate 4001 and an opposing substrate 4006 bonded together by a sealing material 4005. 14(B) is a top view of the panel bonded together, and FIG. 14(B) is a top view of the panel bonded together along the dashed line A-A' in FIG. 14(A). This corresponds to a cross-sectional view of the

[0241] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a substrate 4001. A sealing material 4005 is provided. An opposing substrate 4006 is provided on the pixel portion 4002. 004 is a liquid crystal display panel 400 formed by a substrate 4001, a sealing material 4005, and an opposing substrate 4006. It is sealed together with 7.

[0242] In addition, in a region different from the region surrounded by the sealing material 4005 on the substrate 4001, A substrate 4021 on which a signal line driver circuit 4003 is formed is mounted. A transistor 4009 included in the line driver circuit 4003 is illustrated.

[0243] The pixel portion 4002 and the scanning line driver circuit 4004 provided on the substrate 4001 are In FIG. 14B, the pixel portion 4002 includes a plurality of transistors. 4010 and transistor 4022 are illustrated. In the example shown in FIG. 022, an oxide semiconductor is included in a channel formation region.

[0244] In addition, the pixel electrode 4030 of the liquid crystal element 4011 is electrically connected to the transistor 4010. The counter electrode 4031 of the liquid crystal element 4011 is connected to the counter substrate 4006. The pixel electrode 4030, the counter electrode 4031, and the liquid crystal 4007 are overlapped. The portion corresponds to the liquid crystal element 4011.

[0245] In addition, the spacer 4035 is a spacer for reducing the distance between the pixel electrode 4030 and the counter electrode 4031 (cell size). In FIG. 14(B), the spacer 4035 However, the case where the insulating film is patterned is shown as an example, but the spherical spacer is It is also possible to use "sa".

[0246] Also, a signal line driver circuit 4003, a scanning line driver circuit 4004, and a pixel portion 4002 are provided with Image signals, drive signals, and power supply potentials are connected via wiring 4014 and 4015. The power is supplied from the terminal 4016. The connection terminal 4016 is connected to the terminal of the FPC 4018. , are electrically connected via an anisotropic conductive film 4019 .

[0247] Next, FIG. 15 is an example of a perspective view showing the structure of a liquid crystal display device according to one embodiment of the present invention. The liquid crystal display device shown in FIG. 15 includes a touch panel 1600, a panel 1601, and a first A diffusion plate 1602, a prism sheet 1603, a second diffusion plate 1604, and a light guide plate 160 5, a reflector 1606, a backlight 1607, a circuit board 1608, and a signal line driving circuit. and a substrate 1611 on which a path is formed.

[0248] A touch panel 1600, a panel 1601, a first diffusion plate 1602, and a prism sheet 1603, a second diffusion plate 1604, a light guide plate 1605, and a reflector 1606 are stacked in this order. The backlight 1607 is provided at the end of the light guide plate 1605. The light from the backlight 1607 diffused inside the plate 1605 is diffused through the first diffusion plate 1602, The prism sheet 1603 and the second diffusion plate 1604 allow the light to be uniformly irradiated onto the panel 1601. Be shot.

[0249] The touch panel 1600 includes a position detection unit 1620. 0 is arranged so as to overlap with a pixel portion 1621 of the panel 1601. When a finger or a stylus touches or approaches the position detection unit 1620, the position information is A signal is generated that includes the information.

[0250] In the semiconductor display device shown in FIG. 15, the touch panel 1600 is a unit with the panel 1601. In this case, the touch panel 1600 is positioned between the By making the detection unit 1620 light-transmissive, the user can detect the pixel position via the position detection unit 1620. The image on the touch panel 1600 can be displayed. It is not necessary to place it between 1601 and the user. For example, an electromagnetic induction touch panel In the case of the touch panel 1600, the panel 1601 is located between the user and the touch panel 1600. That's fine.

[0251] In this embodiment, a first diffusion plate 1602 and a second diffusion plate 1604 are used. However, the number of the diffusion plates is not limited to this, and may be one or three or more. The scattering plate may be provided between the light guide plate 1605 and the panel 1601. The diffusion plate may be provided only on the side closer to the panel 1601 than the sheet 1603. Even if the diffusion plate is provided only on the side closer to the light guide plate 1605 than the prism sheet 1603, good.

[0252] The cross section of the prism sheet 1603 is not limited to the sawtooth shape shown in FIG. It is sufficient that the shape can condense the light from the plate 1605 onto the panel 1601 side.

[0253] The circuit board 1608 contains a touch panel control circuit, a CPU, a display control circuit, a backlight A control circuit for controlling the driving of 1607 is provided. The circuit board 1608 and the panel 1601 are connected via a COF tape 1609 . In addition, the substrate 1611 on which the signal line driver circuit is formed is a COF (Chip On Film) ) method is used to connect the COF tape 1609. Also, the circuit board 1608 and the touch panel The panel 1600 is connected via an FPC 1622 .

[0254] 15, the control circuit for controlling the driving of the backlight 1607 and the backlight 1607 is connected via FPC 1610. The control circuit may be formed on the panel 1601. In this case, the panel 1601 and the buffer The connector is connected to the light 1607 by an FPC or the like.

[0255] 15 shows an edge-light type in which a backlight 1607 is arranged at the edge of a panel 1601. However, in the liquid crystal display device of the present invention, the backlight 1607 is It may be a direct type in which it is arranged directly below the tube 1601.

[0256] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes. [Example]

[0257] By using a semiconductor display device according to one embodiment of the present invention, an electronic device with low power consumption is provided. This is especially true for portable electronic devices that are difficult to power constantly. By adding the semiconductor display device according to one aspect of the present invention to the components thereof, There is also the benefit of longer intervals.

[0258] The semiconductor display device according to one aspect of the present invention is applicable to a display device, a notebook personal computer, Image playback devices equipped with recording media (typically DVD: Digital Versatile (Devices with a display that can play recording media such as eDiscs and display the images) In addition, the semiconductor display device according to one embodiment of the present invention can be used in Electronic devices that can be used include mobile phones, portable game consoles, personal digital assistants, e-books, and video cameras. Camera, digital still camera, goggle-type display (head-mounted display) , navigation systems, sound reproduction devices (car audio, digital audio players) Copiers, fax machines, printers, printer-combined machines, automated teller machines Examples of such electronic devices include ATMs and vending machines. Specific examples of these electronic devices are shown in Figure 16. .

[0259] FIG. 16A shows an electronic book having a housing 7001, a display portion 7002, and the like. The semiconductor display device according to this embodiment can be used in the display portion 7002. By using a semiconductor display device according to one embodiment of the present invention, an e-book reader with low power consumption can be provided. In addition, a panel can be manufactured using a flexible substrate and can also be used as a touch panel. By providing flexibility, the semiconductor display device can be made flexible. This allows us to provide e-books that are simple, lightweight, and easy to use.

[0260] FIG. 16B shows a display device, which includes a housing 7011, a display portion 7012, a support base 7013, and the like. The semiconductor display device according to one embodiment of the present invention can be used in the display portion 7012. By using a semiconductor display device according to one embodiment of the present invention for the display portion 7012, a display with low power consumption can be achieved. The display device can be used for personal computers, TVs, etc. This includes all display devices for displaying information, such as those for receiving broadcasts and displaying advertisements.

[0261] FIG. 16C shows an automated teller machine, which includes a housing 7021, a display unit 7022, a coin slot, and a There is an entrance 7023, a bill slot 7024, a card slot 7025, a bankbook slot 7026, etc. The semiconductor display device according to one embodiment of the present invention can be used in the display portion 7022. By using a semiconductor display device according to one embodiment of the present invention for the display portion 7022, low power consumption can be realized. An automated teller machine may be provided.

[0262] FIG. 16D shows a portable game machine, which includes a housing 7031, a housing 7032, a display portion 7033, Display unit 7034, microphone 7035, speaker 7036, operation keys 7037, The semiconductor display device according to one embodiment of the present invention includes a display portion 7033, a display area 7038, and the like. It can be used for the display portion 7034. The display portion 7033 and the display portion 7034 can be used as one embodiment of the present invention. By using the semiconductor display device, it is possible to provide a portable game machine with low power consumption. The portable game machine shown in FIG. 16D has two display units 7033 and 7034, but the number of displays that a portable game machine has is not limited to this. .

[0263] FIG. 16E shows a mobile phone, which includes a housing 7041, a display portion 7042, an audio input portion 7043, It has an audio output unit 7044, an operation key 7045, a light receiving unit 7046, etc. By converting the light received in the sensor into an electrical signal, an external image can be captured. The semiconductor display device according to one embodiment of the present invention can be used for the display portion 7042. By using a semiconductor display device according to one embodiment of the present invention, a mobile phone with low power consumption can be realized. can be provided.

[0264] FIG. 16(F) shows a portable information terminal, which includes a housing 7051, a display unit 7052, and operation keys 7053. The portable information terminal shown in FIG. 16(F) has a modem built in a housing 7051. The semiconductor display device according to one embodiment of the present invention can be used in the display portion 7052. By using a semiconductor display device according to one embodiment of the present invention for the display portion 7052, low power consumption can be achieved. It is possible to provide a mobile information terminal.

[0265] This embodiment can be implemented in appropriate combination with any of the above embodiment modes. [Explanation of symbols]

[0266] 10 Unit Sequential Circuits 31 Transistor 32 transistors 33 Transistor 34 transistors 35 transistors 36 transistors 37 Transistor 38 transistors 39 Transistor 40 transistors 41 Transistor 61 Selection Period 62 Non-selection period 100 panels 101 Display control circuit 102 CPU 104 Touch Panel 105 transistors 106 Display element 107 Pixel section 108 Signal line driver circuit 109 Scanning line driving circuit 110 pixels 111 Drive circuit 130 Shift Register 131 Memory circuit 132 Memory circuit 133 Level Shifter 134 DAC 135 Analog Buffer 136 Shift Register 137 Digital Buffer 300 pixels 301 Pixel section 305 Transistor 306 Liquid crystal element 307 Capacitor 311 frame duration 312 frame duration 313 frame duration 400 boards 401 Transistor 402 Capacitor element 403 Gate electrode 404 Insulating film 405 Oxide semiconductor film 406 Channel protection film 407 Source electrode 408 Drain electrode 409 Insulating Film 410 electrode 411 Electrode 421 Transistor 422 Capacitor 423 Gate electrode 424 insulating film 425 Oxide semiconductor film 427 Source Electrode 428 Drain electrode 429 Insulating Film 430 electrode 431 Electrode 441 Transistor 442 Capacitor 443 Gate electrode 444 insulating film 445 Oxide semiconductor film 447 Source Electrode 448 Drain electrode 449 Insulating Film 450 electrodes 451 Electrode 800 boards 801 Gate electrode 802 Electrode 803 Gate insulating film 804 Oxide semiconductor film 805 Source Electrode 806 Drain electrode 807 Electrode 808 insulating film 809 Transistor 810 Capacitor element 1401 Transistor 1402 gate electrode 1403 Gate insulating film 1404 Oxide semiconductor film 1405 Conductive film 1406 Conductive film 1407 Insulating film 1408 insulating film 1409 Pixel electrode 1410 pixel electrode 1411 Alignment film 1413 Counter electrode 1414 Alignment film 1415 LCD 1416 Sealing material 1417 Spacer 1421 Shielding membrane 1422 Colored layer 1600 touch panel 1601 Panel 1602 Diffuser 1603 Prism Sheet 1604 Diffuser 1605 Light guide plate 1606 Reflector 1607 Backlight 1608 Circuit Board 1609 COF tape 1610 FPC 1611 PCB 1620 Position detection unit 1621 Pixel section 1622 FPC 1630 electrode 1631 Electrode 1640 electrode 1641 Electrode 1642 Conductive film 1643 Conductive film 1644 Insulation layer 1650 pixel unit 1651 pixels 1652 photosensor 1653 Photodiode 1654 transistor 1655 transistor 1656 Reset signal line 1657 Reference signal line 1658 Gate signal line 1659 output signal line 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 Opposing substrate 4007 LCD 4009 Transistor 4010 transistor 4011 Liquid crystal element 4014 Wiring 4016 Connection terminal 4018 FPC 4019 Anisotropic conductive film 4021 board 4022 transistor 4030 pixel electrode 4031 Counter electrode 4035 Spacer 7001 Case 7002 Display section 7011 Case 7012 Display section 7013 Support stand 7021 Housing 7022 Display section 7023 Coin slot 7024 Bill slot 7025 Card slot 7026 Passbook slot 7031 Housing 7032 chassis 7033 Display section 7034 Display section 7035 Microphone 7036 Speaker 7037 Operation Key 7038 Stylus 7041 Housing 7042 Display section 7043 Audio Input Unit 7044 Audio output section 7045 Operation Key 7046 Light receiving section 7051 Housing 7052 Display section 7053 Operation Key

Claims

[Claim 1] A pixel unit, a driver circuit, and a touch panel, the pixel portion has pixels, The pixel includes a transistor and a display element, the transistor has a channel formation region in an oxide semiconductor film, the driver circuit has a function of writing a first image signal to the pixel; the driver circuit has a function of writing a second image signal to the pixel; the touch panel has an area overlapping with the pixel unit, A display device characterized in that, when a still image is displayed in the pixel portion, there is a third period in which the supply of a drive signal to the drive circuit is stopped between a first period in which the first image signal is written to the pixel and a second period in which the second image signal is written to the pixel.

Images