Battery device

Abstract

To provide a battery device capable of detecting disconnection between a charge / discharge control circuit and a charge control FET in a normal state at the time of discharge without increasing an analog circuit element.SOLUTION: A battery device 10 having a charging / discharging path P to which a sense resistor RS is connected includes: a comparator C1 that detects an overcurrent from a voltage drop of the sense resistor RS at the time of discharge; a control circuit 111 that controls a discharge control FET 12 based on an output signal of the comparator C1; a comparator C2 that detects a voltage of an external negative electrode terminal EB-; and a control circuit 112 that returns from an overcharged state to an overcurrent detection reference in a normal state based on an output signal of the comparator C2. When the disconnection occurs between a charge / discharge control circuit 100 and a charge control FET 11 in the normal state during discharge, the comparator C2 detects a change in the voltage of the external negative electrode terminal EB- due to a voltage drop in a body diode D1 of the charge control FET 11 and outputs a signal to the control circuit 111.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a battery device. [Background technology]

[0002] 2. Description of the Related Art A battery device has a charge / discharge control circuit that detects over-discharge, over-charge, and over-current and controls charging and discharging to ensure safe use of a built-in secondary battery such as a lithium-ion battery.

[0003] This charge / discharge control circuit can stop discharging or charging by controlling the on / off of two control field effect transistors (FETs), which are switching elements connected to the charge / discharge path. Specifically, if an over-discharge is detected, the discharge path from the secondary battery to the load is cut off, and if an over-charge is detected, the charge path from the charger to the secondary battery is cut off.Some devices also detect overcurrent in the charge / discharge path by detecting a voltage drop across a sense resistor connected in series to the charge / discharge path (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-77610 Summary of the Invention [Problem to be solved by the invention]

[0005] One aspect of the present invention aims to provide a battery device that can detect a disconnection between a charge / discharge control circuit and a charge control FET in a normal state during discharge without increasing the number of analog circuit elements. [Means for solving the problem]

[0006] The battery device according to an embodiment of the present invention comprises: A battery device having a charge / discharge path with a sense resistor connected in series, a charge control FET having a body diode whose drain and source are connected to the charge / discharge path and whose discharge direction of the charge / discharge path is a forward direction; a discharge control FET whose drain and source are connected to the charge / discharge path; a charge / discharge control circuit that controls the on / off of the charge control FET and the discharge control FET; and The charge / discharge control circuit a current detection comparator that detects a current flowing through the charge / discharge path from a voltage drop of the sense resistor; a discharge control circuit that turns off the discharge control FET when it determines that a discharge overcurrent state exists based on the output signal of the current detection comparator, and turns on the discharge control FET when it determines that a discharge overcurrent state does not exist; an overcharge hysteresis return detection comparator that detects a voltage at a predetermined point in the charge / discharge path to determine whether the battery has returned from an overcharged state to a normal state; an overcharge hysteresis return control circuit that returns the overcurrent detection standard from the overcharge state to the normal state based on the output signal of the voltage detection comparator; Equipped with When a disconnection occurs between the charge / discharge control circuit and the charge control FET during normal discharging, the voltage detection comparator detects a change in voltage at the external negative terminal due to a voltage drop across the body diode of the charge control FET, and outputs a signal to the discharge control circuit. [Effects of the Invention]

[0007] According to one aspect of the present invention, it is possible to provide a battery device that can detect a disconnection between a charge / discharge control circuit and a charge control FET in a normal state during discharge without increasing the number of analog circuit elements. [Brief explanation of the drawings]

[0008] [Figure 1]FIG. 1 is a circuit diagram showing a battery device in a normal state during discharge according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a circuit diagram showing the battery device when a disconnection occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. [Figure 3] FIG. 3 is a circuit diagram showing a battery device in a normal state during discharging according to a second embodiment of the present invention. [Figure 4] FIG. 4 is a circuit diagram showing the battery device when a break occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. [Figure 5] FIG. 5 is a circuit diagram showing a battery device in a normal state during discharging according to a third embodiment of the present invention. [Figure 6] FIG. 6 is a circuit diagram showing the battery device when a break occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. [Figure 7] FIG. 7 is a circuit diagram showing a conventional battery device having a charge / discharge path with a sense resistor connected in series. DETAILED DESCRIPTION OF THE INVENTION

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0010] FIG. 1 is a circuit diagram showing a battery device in a normal state during discharge according to a first embodiment of the present invention. As shown in FIG. 1, the device includes a secondary battery V1, a charge control FET 11, a discharge control FET 12, a sense resistor RS, a charge / discharge control circuit 100, an external positive terminal EB+, and an external negative terminal EB-.

[0011] When the battery device 10 is in use (discharging), a load RL is connected between the external positive terminal EB+ and the external negative terminal EB-. When the battery device 10 is being charged, a charger is connected between the external positive terminal EB+ and the external negative terminal EB-. A load RL, a charge control FET 11, a discharge control FET 12, and a sense resistor RS are connected in series in this order from the positive electrode to the negative electrode of the secondary battery V1 in the charge / discharge path P of the secondary battery V1. The negative electrode of the secondary battery V1 is grounded. The charge control FET 11, the discharge control FET 12, and the sense resistor RS are connected in series to the so-called low side (the negative electrode side of the secondary battery V1).

[0012] In this embodiment, the secondary battery V1 is a lithium ion battery, but is not limited to this and may be any battery that is chargeable and dischargeable.

[0013] The charge control FET 11 is an NMOS (N type Metal-Oxide-Semiconductor) transistor, and its drain and source are connected to the charge / discharge path P. The charge control FET 11 has its gate connected to the charge / discharge control circuit 100, and is on / off controlled by a control signal from the charge / discharge control circuit 100. Furthermore, the on-resistance of the charge control FET 11 is on the order of mΩ, and in the case of a lithium ion battery, the voltage drop across the channel when the charge control FET 11 is on is approximately 0.01 V. Furthermore, the charge control FET 11 is structurally equipped with a body diode D1. The forward direction of this body diode D1 is the discharge direction (the direction of the dotted arrow in FIG. 1) of the charge / discharge path P. The voltage drop across the body diode D1 is approximately 0.7 V.

[0014] When the charge control FET 11 is turned off in the normal state during discharge, the charge / discharge path P in the charge control FET 11 becomes the body diode D1. In other words, if a disconnection occurs between the gate and the charge / discharge control circuit 100 when the charge control FET 11 is on in the normal state during discharge, the voltage drop in the charge control FET 11 changes from approximately 0.01 V to approximately 0.7 V. In this embodiment, the change in this voltage drop is detected by monitoring the voltage at the external negative terminal EB- without adding any new analog circuit elements to the conventional circuit.

[0015] The discharge control FET 12 is an NMOS transistor, similar to the charge control FET 11, and has its drain and source connected to the charge / discharge path P. The discharge control FET 12 has its gate connected to the charge / discharge control circuit 100, and is on / off controlled by a control signal from the charge / discharge control circuit 100. The discharge control FET 12 also structurally includes a body diode D2. The charging direction of the charge / discharge path P of this body diode D2 is the forward direction.

[0016] The sense resistor RS is a resistive element for detecting the current flowing through the charge / discharge path P, and is connected in series to the charge / discharge path P. The current is detected by detecting the voltage drop across the sense resistor RS.

[0017] The charge / discharge control circuit 100 detects the battery voltage of the secondary battery V1 and controls charging / discharging in accordance with the detected battery voltage. Specifically, the charge / discharge control circuit 100 performs control to stop charging the secondary battery V1 when the secondary battery V1 enters an "overcharge state." Also, the charge / discharge control circuit 100 performs control to stop discharging from the secondary battery V1 when the secondary battery V1 enters an "overdischarge state" (low voltage state). Furthermore, the charge / discharge control circuit 100 performs control to stop discharging from the secondary battery V1 when the secondary battery V1 enters an "overcurrent state."

[0018] Here, the "overcharge state" refers to a state in which the battery voltage of the secondary battery V1 exceeds a predetermined overcharge detection voltage and the battery voltage remains above the overcharge detection voltage for a predetermined period of time. Furthermore, if the battery voltage drops below the overcharge release voltage within the predetermined period of time, the device returns to the "normal state." Furthermore, to prevent unstable operation when the battery voltage fluctuates near the overcharge detection voltage, the overcharge release voltage is set lower than the overcharge detection voltage, and an "overcharge hysteresis voltage" (= overcharge detection voltage - overcharge release voltage) is established to stabilize operation. Specifically, the overcharge detection voltage is set to 4.6V, and the overcharge release voltage to 4.3V, for example.

[0019] The "overdischarge state" refers to a state in which the battery voltage of the secondary battery V1 drops below a predetermined overdischarge detection voltage and remains lower than the overdischarge detection voltage for a predetermined period of time or more. Furthermore, if the battery voltage rises above the overdischarge release voltage within the predetermined period of time, the "normal state" is restored. Furthermore, to prevent unstable operation when the battery voltage fluctuates near the overdischarge detection voltage, the overdischarge release voltage is set higher than the overdischarge detection voltage to provide an "overdischarge hysteresis voltage" (= overdischarge release voltage - overdischarge detection voltage) to stabilize operation. Specifically, the overdischarge detection voltage is set to 2.5V, and the overdischarge release voltage to 2.7V, for example.

[0020] The "normal state" refers to a state in which the battery voltage of the secondary battery V1 is equal to or lower than the overcharge detection voltage and equal to or higher than the overdischarge detection voltage.

[0021] This charge / discharge control circuit 100 is connected in parallel to a secondary battery V1 and operates using the secondary battery V1 as a power source. The charge / discharge control circuit 100 includes comparators C1, C2, and C3, reference voltage sources VR1, VR2, and VR3, resistance elements Ra, Rb, and Rc, a switching element SW, and a control logic circuit 110. The charge / discharge control circuit 100 also includes a positive power supply terminal VDD, a negative power supply terminal VSS, a discharge control terminal DO, a charge control terminal CO, an external negative voltage input terminal VM, and an overcurrent detection terminal VINI.

[0022] The positive power supply terminal VDD is connected to the positive electrode of the secondary battery V1 and the external positive terminal EB+. A resistive element may be connected in series between the positive power supply terminal VDD and the secondary battery V1 to suppress electrostatic breakdown and power supply fluctuations. The negative power supply terminal VSS is connected to the negative electrode of the secondary battery V1 and to the ground potential. The charge control terminal CO and the discharge control terminal DO are connected to the gates of the charge control FET 11 and the discharge control FET 12, respectively, and control signals are output from the control logic circuit 110.

[0023] The external negative voltage input terminal VM is a terminal for detecting the voltage of the external negative terminal EB- located in the discharge direction upstream of the charge control FET 11. This external negative voltage input terminal VM is connected to one of the input terminals of the comparator C2 for detecting overcharge hysteresis return. In addition, a resistive element may be connected in series between the external negative voltage input terminal VM and the external negative terminal EB- to suppress the occurrence of electrostatic breakdown and damage when the charger is connected in reverse.

[0024] The overcurrent detection terminal VINI is a terminal that detects the voltage drop across the sense resistor RS in order to detect the current flowing through the charge / discharge path. For this reason, the overcurrent detection terminal VINI is connected upstream of the sense resistor RS in the discharge direction. The overcurrent detection terminal VINI is also connected to one of the input terminals of the comparator C1, which detects the discharge overcurrent state of the secondary battery V1.

[0025] Resistor elements Ra, Rb, and Rc are connected in series between the positive power supply terminal VDD and the negative power supply terminal VSS, forming a bleeder resistor circuit for dividing the battery voltage of secondary battery V1. A switching element SW for providing an overcharge hysteresis voltage is connected in parallel to resistor element Ra. The high-potential terminal of resistor element Rc is connected to the input terminal of comparator C3.

[0026] The comparator C1 is a current detection comparator for detecting a discharge overcurrent state of the secondary battery V1. The comparator C1 has two input terminals connected to the overcurrent detection terminal VINI and the reference voltage source VR1, and compares the applied voltage (voltage drop) of the sense resistor RS with the reference voltage Vref1 of the reference voltage source VR1. The comparator C1 then outputs an H-level or L-level signal to the control logic circuit 110 according to the comparison result.

[0027] Comparator C2 is an overcharge hysteresis return detection comparator for providing an overcharge hysteresis voltage. The comparator C2 has two input terminals connected to an external negative voltage input terminal VM and a reference voltage source VR2, and compares the voltage of the external negative terminal EB-, which is located upstream of the charge control FET 11 in the discharging direction, with the reference voltage Vref2 of the reference voltage source VR2. The comparator C2 then outputs an H-level or L-level signal to the control logic circuit 110 according to the comparison result. The reference voltage Vref2 is 0.35V in this embodiment. In this embodiment, the external negative voltage input terminal VM is connected to one of the input terminals of the comparator C2, but the connection destination is not limited to this. As long as the overcharge hysteresis return control circuit 112 (described later) can determine that the overcharge state has returned to the normal state, any predetermined point on the charge / discharge path P may be connected to one of the input terminals of the comparator C2.

[0028] The comparator C3 is an overcharge detection comparator for detecting an overcharged state of the secondary battery V1. The comparator C3 has two input terminals connected to the high-potential terminal of the resistor Rc and the reference voltage source VR3, and compares the divided voltage Vd of the secondary battery V1 with the reference voltage Vref3 of the reference voltage source VR3. The comparator C3 then outputs an H-level or L-level signal to the control logic circuit 110 according to the comparison result.

[0029] Based on the output signals from the comparators C1, C2, and C3, the control logic circuit 110 performs on / off control of the switching element SW, the charge control FET 11, and the discharge control FET 12. Because the control logic circuit 110 is a logic circuit, it consumes less current than an analog circuit. The control logic circuit 110 also includes an overcurrent control circuit 111 , an overcharge hysteresis return control circuit 112 , an overcharge control circuit 113 , and an output control circuit 114 .

[0030] The overcurrent control circuit 111 determines whether or not a discharge overcurrent state exists based on the output signal of the comparator C1 that detects the discharge overcurrent state, and then outputs an H-level or L-level signal to the output control circuit 114 according to the determination result.

[0031] The overcharge hysteresis return control circuit 112 determines whether or not the overcharge state has transitioned to a normal state based on the control signal of the overcharge control circuit 113 and the output signal of the comparator C2. Then, the overcharge hysteresis return control circuit 112 controls the on / off of the switching element SW according to the determination result. Specifically, when the overcharge hysteresis return control circuit 112 determines that the battery is in an overcharged state based on the output signal of the overcharge control circuit 113, it outputs a control signal to turn on the switching element SW. When the overcharge hysteresis return control circuit 112 determines that the battery has returned to a normal state based on the output signal of the comparator C2, it outputs a control signal to turn off the switching element SW.

[0032] By controlling the on / off of this switching element SW, the divided voltage input to the comparator C3 that detects an overcharge state changes, so that an overcharge hysteresis voltage can be provided. It should be noted that even if the overcharge hysteresis return control circuit 112 determines that the normal state has been restored based on the output signal of the comparator C2 in the normal state, it does not output a control signal to the switching element SW.

[0033] The overcharge control circuit 113 determines whether or not the battery is in an overcharged state based on the output signal of the comparator C3, and outputs an H-level or L-level signal according to the determination result to the output control circuit 114 and the overcharge hysteresis return control circuit 112.

[0034] The output control circuit 114 outputs control signals via the discharge control terminal DO and the charge control terminal CO based on the output signals of the overcurrent control circuit 111 and the overcharge control circuit 113, and controls the on / off of the charge control FET11 and the discharge control FET12. Specifically, when the output control circuit 114 receives a signal indicating that an overcurrent state has occurred from the overcurrent control circuit 111 during discharge, the output control circuit 114 outputs a control signal via the discharge control terminal DO to turn off the discharge control FET 12. Furthermore, when the overcharge control circuit 113 outputs a signal indicating that the battery is in an overcharged state during charging, the output control circuit 114 outputs a control signal via the charge control terminal CO to turn off the charge control FET 11. In addition, the output control circuit 114 outputs a control signal that turns on both the charge control FET 11 and the discharge control FET 12 in the normal state during discharge and charge.

[0035] Up to this point, the same functions as those of the conventional battery device 90 shown in FIG. 7 have been described for the battery device 10 of this embodiment. In conventional battery devices that use this type of sense resistor for overcurrent protection, if a break occurs between the charge / discharge control circuit and the charge control FET during discharge, the discharge cannot be stopped because the discharge overcurrent detection voltage is not detected at the external negative voltage input terminal VM. For this reason, it is necessary to monitor the voltage generated across the body diode D1 at the external negative voltage input terminal VM, but adding an analog circuit such as a comparator for monitoring increases both the chip area and current consumption.

[0036] Therefore, in the first embodiment of the present invention, the comparator C2 for providing an overcharge hysteresis voltage is also used to detect disconnection between the charge / discharge control circuit and the charge control FET, and the output signal of the comparator C2 is output to the overcurrent control circuit 111.

[0037] FIG. 2 is a circuit diagram showing the battery device when a disconnection occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. As shown in Figure 2, if a disconnection occurs between the charge / discharge control circuit 100 and the charge control FET 11 during normal discharging, the charge control FET 11 will be unintentionally turned off. Then, the current flowing between the drain and source of the charge control FET 11 will flow from the channel with low on-resistance to the body diode D1. This causes the voltage drop across the charge control FET 11 to change from approximately 0.01 V to approximately 0.7 V, increasing the voltage at the external negative voltage input terminal VM. Because the reference voltage Vref2 input to the comparator C2 is 0.35 V, the output signal of the comparator C2 changes from low to high.

[0038] Using this, the comparator C2 also outputs an output signal to the overcurrent control circuit 111, which enables the overcurrent control circuit 111 to detect a break in the charge control FET 11. Then, upon detecting the break, the overcurrent control circuit 111 turns off the discharge control FET 12 via the output control circuit 114 to stop discharging. In this way, the battery device 10 of this embodiment can detect a disconnection between the charge / discharge control circuit 100 and the charge control FET 11 in a normal state during discharge without adding an analog circuit such as a comparator.

[0039] FIG. 3 is a circuit diagram showing a battery device in a normal state during discharging according to a second embodiment of the present invention. The second embodiment is the same as the first embodiment except that the one secondary battery V1 in the first embodiment is replaced with three secondary batteries V1, V2, and V3, and a charge / discharge control circuit 100 is connected to each of these secondary batteries V1, V2, and V3. In FIG. 3, components other than the charge / discharge control circuit 100 connected to the secondary battery V2 are omitted from the illustration. As mentioned above, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted.

[0040] 3, the charge / discharge control circuit 100 is connected to the secondary battery V2, and the charge / discharge of the secondary battery V2 is controlled by the charge / discharge control circuit 100. In the normal state during discharge, the charge / discharge control circuit 100 turns on both the charge control FET11 and the discharge control FET12.

[0041] FIG. 4 is a circuit diagram showing the battery device when a break occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. As shown in FIG. 4, similar to the first embodiment, if a disconnection occurs between the charge / discharge control circuit 100 and the charge control FET 11 during normal discharging, the charge control FET 11 is unintentionally turned off. Then, the current flowing between the drain and source of the charge control FET 11 flows from the channel with low on-resistance to the body diode D1. As a result, the voltage drop across the charge control FET 11 changes from approximately 0.01 V to approximately 0.7 V, and the voltage at the external negative voltage input terminal VM increases. Because the reference voltage Vref2 input to the comparator C2 is 0.35 V, the output signal of the comparator C2 changes from low to high.

[0042] Using this, the comparator C2 also outputs an output signal to the overcurrent control circuit 111, which enables the overcurrent control circuit 111 to detect a break in the charge control FET 11. Then, upon detecting the break, the overcurrent control circuit 111 turns off the discharge control FET 12 via the output control circuit 114 to stop discharging. In this way, even in the second embodiment in which multiple secondary batteries are connected, it is possible to detect a disconnection between the charge / discharge control circuit 100 and the charge control FET 11 in the normal state during discharge without adding an analog circuit such as a comparator.

[0043] FIG. 5 is a circuit diagram showing a battery device in a normal state during discharging according to a third embodiment of the present invention. The third embodiment is the same as the first embodiment except that the charge control FET 11, the discharge control FET 12, and the sense resistor RS are connected in series to the so-called high side (the positive electrode side of the secondary battery V1), and each part of the charge / discharge control circuit is arranged accordingly. The battery device 20 of the third embodiment includes a charge control FET 21, a discharge control FET 22, a sense resistor RS, a charge / discharge control circuit 200, an external positive terminal EB+, and an external negative terminal EB-. The charge control FET 21 and the discharge control FET 22 are similar to the charge control FET 11 and the discharge control FET 12 in the first embodiment, and therefore, a description of their functions will be omitted below.

[0044] The charge / discharge control circuit 200 has the same function as the charge / discharge control circuit 100 in that it detects the battery voltage of the secondary battery V1 and controls charging / discharging in accordance with the detected battery voltage. The external negative voltage input terminal VM detects the voltage of the external positive terminal EB+ located in the subsequent stage of the discharge control FET 22 in the discharge direction. The overcurrent detection terminal VINI is connected to the downstream of the sense resistor RS in the discharge direction.

[0045] The control logic circuit 210 includes an overcurrent control circuit 211 , an overcharge hysteresis return control circuit 212 , an overcharge control circuit 213 , and an output control circuit 214 . The overcurrent control circuit 211, the overcharge hysteresis return control circuit 212, the overcharge control circuit 213, and the output control circuit 214 are similar to the overcurrent control circuit 111, the overcharge hysteresis return control circuit 112, the overcharge control circuit 113, and the output control circuit 114 in the first embodiment, and therefore, description of their functions will be omitted below.

[0046] FIG. 6 is a circuit diagram showing the battery device when a break occurs between the charge control circuit and the charge control FET in the normal state during discharge shown in FIG. As shown in Figure 6, if a disconnection occurs between the charge / discharge control circuit 200 and the charge control FET 21 during normal discharging, the charge control FET 21 will be unintentionally turned off. Then, the current flowing between the drain and source of the charge control FET 21 will flow from the channel with low on-resistance to the body diode D1. This causes the voltage drop across the charge control FET 21 to change from approximately 0.01 V to approximately 0.7 V, increasing the voltage at the external negative voltage input terminal VM. Because the reference voltage Vref2 input to the comparator C2 is 0.35 V, the output signal of the comparator C2 changes from low to high.

[0047] Using this, the comparator C2 also outputs an output signal to the overcurrent control circuit 211, which enables the overcurrent control circuit 211 to detect a break in the charge control FET 21. Then, upon detecting the break, the overcurrent control circuit 211 turns off the discharge control FET 22 via the output control circuit 214 to stop discharging. In this way, the battery device 20 of this embodiment can detect a disconnection between the charge / discharge control circuit 200 and the charge control FET 21 in a normal state during discharge without adding an analog circuit such as a comparator.

[0048] As described above, a battery device according to one embodiment of the present invention has a charge / discharge path with a sense resistor connected in series. The battery device also includes a charge control FET with a body diode whose drain and source are connected to the charge / discharge path and whose discharge direction is forward, and a discharge control FET whose drain and source are connected to the charge / discharge path. The battery device also includes a charge / discharge control circuit that controls the on / off of the charge control FET and the discharge control FET. The charge / discharge control circuit includes a current detection comparator that detects the current flowing in the charge / discharge path from the voltage drop across the sense resistor, and a discharge control circuit that determines whether a discharge overcurrent state exists based on the output signal of the current detection comparator and controls the on / off of the discharge control FET. The charge / discharge control circuit also includes a voltage detection comparator that detects the voltage at a predetermined point in the charge / discharge path to determine whether the battery has returned to a normal state from an overcharged state, and a control circuit that returns the overcurrent detection standard for the normal state based on the output signal of the voltage detection comparator.

[0049] The voltage detection comparator detects a change in the voltage at the external negative terminal due to a voltage drop across the body diode of the charge control FET, which has been unintentionally turned off during normal discharging, and also outputs a signal to the discharge control circuit. The discharge control circuit, which receives the output signal from the voltage detection comparator, functions as an open circuit detection circuit and detects an open circuit between the charge / discharge control circuit and the charge control FET. The overcurrent control circuit, which detects the open circuit, then turns off the discharge control FET via the output control circuit to stop discharging, thereby safely controlling charging and discharging.

[0050] In this way, the battery device of this embodiment can detect a disconnection between the charge / discharge control circuit and the charge control FET in the normal state during discharge without adding an analog circuit such as a comparator. Furthermore, even if a disconnection detection function is added, an analog circuit with a large current consumption is not required, and processing is performed using an existing logic circuit, so that an increase in chip area and current consumption can be suppressed.

[0051] Although one embodiment of the present invention has been described above, the present invention is not limited to the embodiment, and various modifications are possible within the scope of the invention. For example, although the embodiment has been described with one secondary battery, it may have a plurality of secondary batteries. [Explanation of symbols]

[0052] 10 Battery device 11 Charge control FET 12 Discharge control FET 100 Charge / discharge control circuit 110 Control logic circuit 111 Overcharge control circuit 112 Hysteresis voltage control circuit 113 Overcurrent control circuit 114 Output control circuit C1 Comparator (current detection comparator) C2 Comparator (Overcharge hysteresis return detection comparator) C3 Comparator (Overcharge detection comparator) CO Charging control terminal DO Discharge control terminal EB+ External positive terminal EB- External negative terminal P charging / discharging path Ra, Rb, Rc resistance elements RL load RS Sense resistor SW Switching element V1 secondary battery VDD Positive power supply terminal VINI Overcurrent detection pin VR3, VR2, VR1 Reference voltage source VSS negative power supply terminal VM External negative voltage input pin

Claims

1. A battery device having a charge / discharge path with a sense resistor connected in series, a charge control FET having a body diode whose drain and source are connected to the charge / discharge path and whose discharge direction of the charge / discharge path is a forward direction; a discharge control FET whose drain and source are connected to the charge / discharge path; a charge / discharge control circuit that controls the on / off of the charge control FET and the discharge control FET; and The charge / discharge control circuit a current detection comparator that detects a current flowing through the charge / discharge path from a voltage drop of the sense resistor; a discharge control circuit that turns off the discharge control FET when it determines that a discharge overcurrent state exists based on the output signal of the current detection comparator, and turns on the discharge control FET when it determines that a discharge overcurrent state does not exist; an overcharge hysteresis return detection comparator that detects a voltage at a predetermined point in the charge / discharge path to determine whether the battery has returned from an overcharged state to a normal state; an overcharge hysteresis return control circuit that returns the overcurrent detection standard from the overcharge state to the normal state based on the output signal of the voltage detection comparator; Equipped with The battery device is characterized in that, when a disconnection occurs between the charge / discharge control circuit and the charge control FET in a normal state during discharge, the voltage detection comparator detects a change in voltage of the external negative terminal due to a voltage drop in the body diode of the charge control FET, and outputs a signal to the discharge control circuit.

2. 2. The battery device according to claim 1, wherein the discharge control circuit outputs a signal to turn off the discharge control FET when receiving an output signal from the voltage detection comparator that detects a change in voltage of the external negative terminal due to a voltage drop across the body diode.

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