Power conversion device control device, control method, and three-level inverter

Abstract

To provide a power conversion device control device, a control method, and a three-level inverter, capable of suppressing the increase of switching losses while suppressing neutral point potential fluctuations.SOLUTION: The power conversion device control device includes a voltage command value correction unit (213) that generates a three-phase correction voltage command using zero-sequence modulation, a dual modulated wave generation unit (214) that divides the three-phase correction voltage command into positive-side and negative-side modulated waves, and a dual-modulated wave correction unit (217) that corrects the positive and negative side modulated waves on the basis of the three-phase correction voltage command and sets the zero value to one side of a predetermined phase range to generate corrected positive and negative side modulated waves on the other side of the predetermined phase range on both sides of the zero-cross, which is near the zero-cross of a three-phase sinusoidal voltage command or the three-phase correction voltage command. PWM pulse signals are generated by comparing the corrected positive and negative side modulated waves with positive and negative side carrier waves, respectively.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a control device and control method for a power conversion device and a three-level inverter, and more particularly to a control device and control method for a neutral point clamped three-level inverter and a neutral point clamped three-level inverter. [Background technology]

[0002] A three-level inverter divides the DC input voltage in half and outputs a three-level phase voltage consisting of a neutral level, or zero level, and two levels, positive and negative, centered around zero. The voltage applied to the semiconductor switching elements is half that of a two-level inverter. This reduces the power loss generated by the semiconductor switching elements. In addition, the waveform of the line voltage becomes closer to a sine wave. This allows for the size of the filter connected to the AC side of the three-level inverter.

[0003] Three-level inverters convert DC power into AC power using pulse width modulation (PWM) control. The triangular wave comparison method is often used for PWM control.

[0004] Fluctuations in the neutral point potential of a three-level inverter can cause imbalances and overvoltages in the voltages applied to the semiconductor switching elements. To address this issue, a technique is known that performs zero-phase modulation of the fundamental wave voltage command by superimposing harmonic components on the fundamental wave voltage command. Fluctuations in the neutral point potential can be suppressed by PWM control, which uses the zero-phase modulated fundamental wave voltage command as the modulating wave.

[0005] The technique described in Patent Document 1 is known as a conventional technique relating to zero-phase modulation in PWM control of a three-level inverter.

[0006] In this conventional technology, two carrier triangular wave signals, one positive and one negative, are compared with the voltage command for each phase to generate a PWM pulse signal that turns on and off four switching elements for each phase.

[0007] The voltage command for each phase is generated by subtracting the average value of the maximum phase voltage and the minimum phase voltage of the three-phase sinusoidal voltage command from the sinusoidal voltage command for each phase, thereby suppressing potential fluctuations at the neutral point. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 10-257780 Summary of the Invention [Problem to be solved by the invention]

[0009] When the above-mentioned conventional technology is applied to pulse width modulation in which positive and negative modulating waves are compared with positive and negative carrier waves, respectively, the potential fluctuation at the neutral point is suppressed, but switching loss increases.

[0010] Therefore, the present invention provides a control device and control method for a power conversion device, and a three-level inverter, which can suppress an increase in switching loss while suppressing potential fluctuations at the neutral point. [Means for solving the problem]

[0011] In order to solve the above problems, a control device for a power conversion device according to the present invention generates a PWM pulse signal for controlling a neutral point clamped three-phase three-level inverter, and includes: a voltage command value corrector that zero-phase modulates a three-phase sinusoidal wave voltage command to generate a three-phase corrected voltage command; a double modulated wave generator that divides each phase of the three-phase corrected voltage command into a positive side modulated wave and a negative side modulated wave; and a double modulated wave corrector that corrects the positive side modulated wave and the negative side modulated wave on the basis of the phase that is the basis of the positive side modulated wave and the negative side modulated wave in the three-phase corrected voltage command, near a zero crossing of a phase that is the basis of the positive side modulated wave and the negative side modulated wave in the three-phase sinusoidal wave voltage command or the three-phase corrected voltage command, on one side of a predetermined phase range on both sides of the zero crossing, and sets a zero value on the other side of the predetermined phase range, thereby generating a corrected positive side modulated wave and a corrected negative side modulated wave. The control device for a power conversion device according to the present invention generates a PWM pulse signal by comparing the corrected positive side modulated wave and the corrected negative side modulated wave with the positive side carrier wave and the negative side carrier wave, respectively.

[0012] In order to solve the above problems, a control method for a power conversion device according to the present invention is a method for generating a PWM pulse signal for controlling a neutral point clamped three-phase three-level inverter, which method includes zero-phase modulation of a three-phase sinusoidal voltage command to generate a three-phase corrected voltage command, dividing each phase of the three-phase corrected voltage command into a positive side modulated wave and a negative side modulated wave, correcting the positive side modulated wave and the negative side modulated wave on the basis of the phase on which the positive side modulated wave and the negative side modulated wave are based, in the three-phase corrected voltage command, near a zero crossing of a phase on which the positive side modulated wave and the negative side modulated wave are based, in the three-phase sinusoidal wave voltage command or the three-phase corrected voltage command, on one side of a predetermined phase range on both sides of the zero crossing, and setting a zero value on the other side of the predetermined phase range, thereby generating a corrected positive side modulated wave and a corrected negative side modulated wave, and comparing the corrected positive side modulated wave and the corrected negative side modulated wave with a positive side carrier wave and a negative side carrier wave, respectively, to generate a PWM pulse signal.

[0013] In order to solve the above problems, a neutral point clamped three-level inverter according to the present invention includes a main circuit section made up of a plurality of semiconductor switching elements, a plurality of drive circuits for driving the plurality of semiconductor switching elements, and a PWM control device for generating PWM pulse signals that serve as on / off control signals for the drive circuits, wherein the PWM control device is a control device for a power conversion device according to the present invention. [Effects of the Invention]

[0014] According to the present invention, the potential fluctuation at the neutral point is suppressed, and an increase in switching loss is also suppressed.

[0015] Problems, configurations, and effects other than those described above will become clear from the following description of the embodiments. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a circuit diagram showing a configuration of a power conversion device according to an embodiment; [Figure 2] 2 is a block diagram showing the functional configuration of a modulated wave generating unit 210 (FIG. 1). FIG. [Figure 3] 10 is a waveform diagram showing an example of a U-phase corrected voltage command vu*' generated by the voltage command value corrector 213 (FIG. 2). FIG. [Figure 4] 3 is a waveform diagram showing an example of a U-phase positive-side modulated wave vup* and a U-phase negative-side modulated wave vun* generated by the double modulated wave generating unit 214 (FIG. 2). FIG. [Figure 5] 10 is table data used in the double modulation wave corrector 217 (FIG. 2) showing the relationship between the phase period and the values ​​taken by vup*' and vun*'. [Figure 6] 10 is a waveform diagram showing an example of a U-phase corrected positive-side modulated wave vup*' and a U-phase corrected negative-side modulated wave vun*' generated by the double-modulated wave corrector 217 (FIG. 2). FIG. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same reference numerals indicate the same components or components having similar functions.

[0018] FIG. 1 is a circuit diagram showing the configuration of a power conversion device according to one embodiment of the present invention.

[0019] The power conversion device of this embodiment is a neutral point clamped three-phase three-level inverter, which converts DC input power into three-phase AC power.

[0020] The main circuit unit 100 has legs for three phases. Of the three phases (U phase, V phase, and W phase), the U phase leg will be described below. The V phase and W phase legs have the same configuration as the U phase leg, so their description will be omitted.

[0021] As shown in FIG. 1, in the U-phase leg of the main circuit section 100, four semiconductor switching elements Q u1 ,Q u2 ,Q u3 ,Q u4 are connected in series in this order. u1 ,Q u2 ,Q u3 ,Q u4 One end of the series connection (Q u1 side) and the other end (Q u4 side) are DC power supply E DC are connected to the high potential (P) and low potential (N) of the

[0022] In this embodiment, insulated gate bipolar transistors (IGBTs) are used as the semiconductor switching elements, and a free wheeling diode is connected in parallel to each semiconductor switching element.

[0023] Capacitors C1 and C2 are connected to the DC side of the main circuit section 100. The capacitance values ​​of the respective capacitors are the same. The capacitors C1 and C2 are connected in series. One end (C1 side) and the other end (C2 side) of the series connection of C1 and C2 are connected to a DC power supply E DCThe series connection point of C1 and C2 is the neutral point (0).

[0024] Q u2 and Q u3 The series connection point is connected to the AC terminal (U). u1 and Q u2 A diode D1 is connected between the series connection point of Q and the neutral point (0). u3 and Q u4 A diode D2 is connected between the series connection point of these two and the neutral point (0). D1 and D2 act as clamp diodes.

[0025] Semiconductor switching element Q u1 is driven by the gate drive signal output by the drive circuit 120. u1 The driving circuit 120 that drives the up The gate drive signal is generated in response to the

[0026] Semiconductor switching element Q u4 is driven by the gate drive signal output by the drive circuit 120. u4 The driving circuit 120 that drives the un The gate drive signal is generated in response to the

[0027] Semiconductor switching element Q u2 ,Q u3 Each of the Q gates is driven by a gate drive signal output from a drive circuit (not shown). u2 The drive circuit that drives the un The gate drive signal is generated according to the inverted signal of Q. u3 The drive circuit that drives the up The gate drive signal is generated in response to the inverted signal.

[0028] OFF control command signal S up ,S unis composed of a PWM pulse signal as shown in FIG. 1 and is generated by a PWM control device 200.

[0029] The PWM control device 200 includes a modulated wave generating section 210 that generates a modulated wave in accordance with a control amount fed back from the main circuit section 100, and a carrier wave generating section 220 that compares the modulated wave generated by the modulated wave generating section 210 with the carrier wave to generate an OFF control command signal S up ,S un and a PWM pulse signal generating unit 220 that generates a PWM pulse signal.

[0030] The PWM control device 200 includes PWM pulse signal generating units 220 for three phases, but Fig. 1 shows the configuration of the PWM pulse signal generating unit 220 for the U phase. The configuration of the PWM pulse signal generating units 220 for the V and W phases is the same as that of the PWM pulse signal generating unit 220 for the U phase.

[0031] In Figure 1, the output phase voltage V o , output phase current i o , capacitor voltage V C1 and V C2 , AC output power P o However, the control amount is selected appropriately depending on the purpose of control. For example, V C1 and V C2 is used to control the voltage balance of capacitors C1 and C2.

[0032] V o is detected using the voltage sensor 123. In this embodiment, the voltage sensor 123 detects the voltage of the capacitor of the AC-side LC filter 130. For convenience, FIG. 1 shows the voltage sensor 123 for one phase.

[0033] i o is detected using the current sensor 126. For convenience, FIG. 1 shows the current sensor 126 for one phase.

[0034] V C1 and V C2 are detected using voltage sensor 124 and voltage sensor 125, respectively.

[0035] The control amount detection unit 113 detects the control amount in response to the signals from the sensors and sends it to the modulated wave generation unit 210. Note that the output power P o When controlling P, the control amount detection unit 113 detects P based on signals from the voltage sensor 123 and the current sensor 126. o Calculate the detected value of The modulated wave generating unit 210 generates a positive side modulated wave v for the X phase (X: U, V, W) in accordance with the feedback control amount. xp *’ and negative modulation wave v xn *’ In Figure 1, the positive modulation wave v for the U phase is generated. up *’ and negative modulation wave v un *’ Positive side modulating wave v xp *’ takes a value greater than or equal to zero. Negative side modulation wave v xn *’ takes a value equal to or less than zero. In this embodiment, 0≦v xp *’ ≦1, −1 ≦ v xn *’ ≦0. In these inequalities, v xp *’ , v xn *’ For convenience, indicates an instantaneous value and does not include phase information.

[0036] The PWM pulse signal generating unit 220 generates a positive side carrier wave S cp and a positive carrier wave generating unit 221 that generates a negative carrier wave S cn and a negative side carrier wave generating unit 222 that generates a positive side carrier wave S cp takes a value greater than or equal to zero. The negative carrier wave S cn takes a value equal to or less than zero. In this embodiment, 0≦S cp ≦1, -1 ≦S cn ≦0. In this embodiment, as shown in FIG. cp and S cnare triangular waves with the same frequency (period). In this embodiment, the carrier waves in the three-phase PWM pulse signal generating unit 220 are triangular waves with the same frequency (period).

[0037] The PWM pulse signal generating unit 220 generates a positive side carrier wave S cp and the positive modulation wave v xp *’ and the on / off control command signal S for the X phase is xp Furthermore, the PWM pulse signal generating unit 220 includes a comparator 223 that generates a negative side carrier wave S cn and the negative modulation wave v xn *’ and the on / off control command signal S for the X phase is xn A comparator 224 generates

[0038] In FIG. 1, the U-phase PWM pulse signal generating unit 220 generates an on-off control command signal S up ,S un An example of the phase voltage is shown below. Note that the zero cross point is at 180° in one cycle (phase = 0 to 360°).

[0039] As shown in Figure 1, S up has a zero period φ0 in which the number of pulses is zero near 180° between 180° and 210°. un has a zero period φ0 in which the number of pulses becomes zero near 180° between 150° and 180°. This reduces the switching loss of the semiconductor switching element. up and S un The zero period φ0 of the positive side modulation wave v up *’ and negative modulation wave v un *’ It is set in.

[0040] As will be described later, the PWM control device 200 generates a U-phase corrected voltage command obtained by correcting the U-phase sinusoidal voltage command so as to suppress fluctuations in the neutral point potential, and further divides the U-phase corrected voltage command to generate a U-phase positive side modulated wave and a U-phase negative side modulated wave.

[0041] The PWM control device 200 corrects the U-phase positive side modulated wave to the U-phase corrected voltage command (≧0) in one of the phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0) in which the phase difference from the zero-crossing point (phase θ0) to a predetermined positive or negative value (±φ0 (φ0>0)) near the zero-crossing point of the U-phase sinusoidal wave voltage command or the U-phase corrected voltage command, and in which the U-phase corrected voltage command takes zero and positive values. Furthermore, the PWM control device 200 corrects the U-phase positive side modulated wave to zero in the other phase range (θ0-φ0 to θ0, θ0 to θ0+φ0) in which the U-phase corrected voltage command takes zero and negative values. As a result, the PWM control device 200 controls the positive side modulated wave v up *’ Generate.

[0042] The PWM control device 200 corrects the U-phase negative side modulated wave to zero in one of the aforementioned phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0) where the U-phase corrected voltage command takes zero and positive values. Also, the PWM control device 200 corrects the U-phase negative side modulated wave to the U-phase corrected voltage command (≦0) in the other of the aforementioned phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0) where the U-phase corrected voltage command takes zero and negative values. As a result, the PWM control device 200 corrects the negative side modulated wave v un *’ Generate.

[0043] As described above, the PWM control device 200 generates an X-phase positive side modulated wave and an X-phase negative side modulated wave (corresponding to the corrected X-phase positive side modulated wave and X-phase negative side modulated wave described later) having zero periods near the zero crossing points of the X-phase sinusoidal wave voltage command or the X-phase corrected voltage command, based on the X-phase corrected voltage command obtained by correcting the X-phase sinusoidal wave voltage command so as to suppress fluctuations in the neutral point potential. The X-phase on-off control command signal Sxp ,S xn In response to this, the semiconductor switching elements constituting the X-phase leg are driven, so that fluctuations in the neutral point potential are suppressed and the switching loss of the main circuit unit 100 is reduced.

[0044] The modulated wave generating section 210 included in the PWM control device 200 will be described below with reference to FIGS. 2 to 6 and equations (1) to (6).

[0045] FIG. 2 is a block diagram showing the functional configuration of the modulated wave generating unit 210 in FIG.

[0046] In this embodiment, a computer system such as a microcomputer operates as each functional unit by executing a predetermined program.

[0047] The compensator 212 calculates the X-phase sinusoidal voltage command v , expressed by the formula (1), by PI calculation or the like so that the detected value of the controlled variable sent from the controlled variable detector 113 (FIG. 1) coincides with the target value of the controlled variable created by the control target value generator 211. x * Generate (X:U,V,W).

[0048]

number

[0049] In equation (1), θ represents the phase, and V m represents the amplitude. In this embodiment, V m =1.

[0050] The voltage command value corrector 213 calculates the X-phase sinusoidal voltage command v using equations (2) to (4). x * is corrected by zero-phase modulation, and the X-phase corrected voltage command v x *’ Generate.

[0051]

number

[0052]

number

[0053]

number

[0054] As shown in equations (2) to (4), the voltage command value corrector 213 calculates v x * From the above, the maximum phase voltage v of the three-phase sinusoidal voltage command max * and the minimum phase voltage v min * By subtracting the mean value of v x *’ That is, in this embodiment, the technique for suppressing the potential fluctuation at the neutral point, which is described in the above-mentioned Patent Document 1, is applied.

[0055] The double modulation wave generating unit 214 generates the X-phase corrected voltage command v generated by the voltage command value correcting unit 213. x *’ By dividing the voltage command into a voltage command that takes a value greater than or equal to zero and a voltage command that takes a value less than or equal to zero using equation (5), the X-phase positive side modulating wave v xp * and the X-phase negative side modulation wave v, which takes a value below zero xn * In this embodiment, v xp * takes a value greater than or equal to zero and less than or equal to one, and v xn * takes a value less than or equal to zero and greater than or equal to -1.

[0056]

number

[0057]

number

[0058] In addition, the double modulation wave generating unit 214 applies a technique called double modulation wave carrier-based PWM (DMWPWM).

[0059] FIG. 3 shows the X-phase corrected voltage command v generated by the voltage command value corrector 213 (FIG. 2). x *’ U phase correction voltage command v u *’ 10 is a waveform diagram showing an example of the phase θ.

[0060] Figure 3 shows the U-phase sinusoidal voltage command v u * The U-phase compensation voltage command v is generated based on one period (θ=0 to 360°) of u *’ Shows.

[0061] As shown in Figure 3, v u *’ has a first waveform in which a third harmonic is superimposed on a sine wave in the phase ranges of θ=30° to 150° and θ=210° to 330°. u *’ has a linear second waveform in each phase range of θ=0° to 30°, 150° to 210°, and 330° to 360° in FIG. 3, where the phase difference with respect to the zero crossing point is within a predetermined value (30° in FIG. 3). The connection points between the first waveform and the second waveform, each connection point at θ=30°, 150°, 210°, and 330° in FIG. 3, are u *’ This is an inflection point in the waveform.

[0062] FIG. 4 shows the X-phase positive-side modulated wave v generated by the double modulated wave generating unit 214 (FIG. 2). xp * and X-phase negative side modulating wave v xn * U phase positive side modulating wave v up * and U phase negative side modulating wave vun * 10 is a waveform diagram showing an example of the phase θ.

[0063] Figure 4 shows the U-phase corrected voltage command v u *’ The U-phase positive side modulating wave v is generated based on one period (θ=0 to 360°) of up * and U phase negative side modulating wave v un * Shows.

[0064] As shown in Figure 4, v up * The waveform of v has no inflection points at θ=30° and 150° and is smooth and continuous. up * is not zero but takes a positive value at θ=0°, 180°, 360°, and takes a zero value at θ=210° in the range of θ=0 to 360°. up * The waveform of v u * Or v u *’ It extends beyond the zero crossing point (θ=180°) to θ=210°.

[0065] As shown in Figure 4, v un * The waveform of v has no inflection points at θ=210° and 330° and is smooth and continuous. un * is not zero but takes a negative value when θ=0°, 180°, 360°, and takes a zero value when θ=150° in the range of θ=0 to 360°. un * The waveform of v u * Or v u *’ It extends beyond the zero crossing point (θ=180°) to θ=150°.

[0066] v up * and v un *are the positive carrier wave S cp and negative carrier wave S cn By comparing the PWM pulse signal with the on / off control signal S up ,S un However, as mentioned above, v up * and v un * As a result of the increase in the number of pulses, the switching loss generated by the semiconductor switching element increases.

[0067] Therefore, in this embodiment, the double modulation wave corrector 217 shown in FIG. 2 corrects the X-phase positive side modulation wave v xp * and X-phase negative side modulating wave v xn * is corrected.

[0068] As shown in FIG. 2, the double modulation wave corrector 217 calculates the X-phase corrected voltage command v x *’ and the zero period φ0 (phase value) for making the number of PWM pulses zero, which is set by the zero period setting unit 215, based on the X-phase positive side modulating wave v xp * and X-phase negative side modulating wave v xn * Correct the X-phase corrected positive side modulating wave v xp *’ and X-phase correction negative side modulation wave v xn *’ Generate.

[0069] Hereinafter, the operation of the double modulation wave corrector 217 will be described using the U phase as an example.

[0070] Figure 5 shows the U-phase corrected positive side modulating wave v up *’ and U phase correction negative side modulating wave v un *’ The phase period and the phase period used in the double modulation wave correction unit 217 when generating v up *’ and v un *’ This is table data showing the relationship between the values ​​taken by

[0071] In Fig. 5, the U-phase sinusoidal voltage command v u * (Equation (1)), U-phase correction voltage command v u *’ (Fig. 3), and U phase positive side modulating wave v up * and U phase negative side modulating wave v un * (Fig. 4) corresponds to one period (θ=0°~360°), v up *’ and v un *’ Shows.

[0072] U-phase sinusoidal voltage command v u * Or U phase correction voltage command v u *’ The phase difference from the zero crossing point (θ=θ0 (=0°, 180°, 360°)) is within a phase range from zero to a positive or negative predetermined value (±φ (φ=30°)) (θ0-φ<θ<θ0+φ: for example, 150°<θ<210°), and the phase difference from the zero crossing point is in one of the phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0 (for example, 180°-φ0 to 180°, 180° to 180°+φ0)) in the vicinity of the zero crossing point, and the U phase correction voltage command v u *’ In the phase range where is zero and positive (for example, 180°-φ0 to 180°), the U-phase corrected positive side modulating wave v up *’ is the U-phase compensation voltage command v u *’ (≧0). Also, in the other phase range (θ0-φ0 to θ0, θ0 to θ0+φ0), the U-phase compensation voltage command v u *’ In the phase range where is zero or negative (for example, 180° to 180° + φ0), the U-phase corrected positive side modulating wave v up *’ is set to zero.

[0073] In phase ranges other than the aforementioned phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0 (for example, 180°-φ0 to 180°, 180° to 180°+φ0)) (φ0 to 30°, 30° to 150°, 150° to 180°-φ0, 180°+φ0 to 210°, 210° to 330°, 330° to 360°-φ0 in Figure 5), the U-phase corrected positive side modulating wave v up *’ is the U phase positive side modulating wave v up * is set to

[0074] In one of the phase ranges (θ0-φ0 to θ0, θ0 to θ0+φ0 (for example, 180°-φ0 to 180°, 180° to 180°+φ0)), the U-phase compensation voltage command v u *’ In the phase range where is zero and positive (for example, 180°-φ0 to 180°), the U-phase corrected negative side modulating wave v un *’ is set to zero. Also, in the other phase range (θ0-φ0 to θ0, θ0 to θ0+φ0) mentioned above, the U-phase correction voltage command v u *’ In the phase range where is zero or negative (for example, 180° to 180° + φ0), the U-phase corrected negative side modulating wave v up *’ is the U-phase compensation voltage command v u *’ (≦0).

[0075] In phase ranges other than the aforementioned phase range (θ0-φ0 to θ0, θ0 to θ0+φ0 (for example, 180°-φ0 to 180°, 180° to 180°+φ0)) (φ0 to 30°, 30° to 150°, 150° to 180°-φ0, 180°+φ0 to 210°, 210° to 330°, 330° to 360°-φ0 in Figure 5), the U-phase corrected negative side modulating wave v un *’ is the U phase positive side modulating wave v un * is set to

[0076] As mentioned above, the U phase positive side modulating wave v up * and U phase negative side modulating wave v un* The U-phase sinusoidal voltage command v u * Or U phase correction voltage command v u *’ The U-phase corrected positive side modulating wave v is corrected near the zero crossing points (in Figure 3, 0° to φ0, 180°-φ0 to 180°, 180° to 180° + φ0, 360°-φ0 to 360°). up *’ and U phase correction negative side modulating wave v un * is generated.

[0077] The voltage zero cross detector 216 shown in FIG. 2 detects the X-phase sinusoidal voltage command v x * When the voltage zero cross detector 216 detects a zero cross, it sends a zero cross detection signal to the double modulation wave corrector 217. The voltage zero cross detector 216 detects a zero cross of the X-phase corrected voltage command v x *’ The zero crossing of the signal may be detected.

[0078] The voltage zero cross detector 216 detects v x * When detecting a zero crossing when the value of v changes from a negative value to a positive value, the double modulation wave correction unit 217 receives a zero crossing detection signal from the voltage zero cross detection unit 216 and calculates the phase period and the X-phase correction positive side modulation wave v as shown in FIG. xp *’ and X-phase correction negative side modulation wave v xn *’ Based on the relationship with the value of X-phase positive side modulating wave v xp * and X-phase negative side modulating wave v un * By correcting the X-phase corrected positive side modulating wave v xp *’ and X-phase correction negative side modulation wave v xn *’ The voltage zero-cross detector 216 determines the phase value shown in Fig. 5 as the increment value of the phase from the time point when the zero-cross detection signal is received.

[0079] FIG. 6 shows the X-phase corrected positive-side modulated wave v generated by the double modulated wave corrector 217 (FIG. 2). xp *’ and X-phase correction negative side modulation wave v xn *’ U phase corrected positive side modulating wave v up *’ and U phase correction negative side modulating wave v un *’ 10 is a waveform diagram showing an example of the phase θ.

[0080] Figure 6 shows the U-phase corrected voltage command v u *’ U-phase corrected positive side modulating wave v generated based on one period (θ=0 to 360°) up *’ and U phase negative side modulating wave v un *’ Shows.

[0081] As shown in Figure 6, v up *’ and v un *’ is v up * and v un * It does not have an expanded waveform like the one in Figure 4. up *’ and v un *’ In v up * and v un * In the phase range of the enlarged waveform in Figure 4, a zero period φ0 is set. vp *’ and v vn *’ , v wp *’ and v wn *’ The same is true for .

[0082] Therefore, the PWM pulse signal generating unit 220 xp *’ and v xn *’ is used as a modulating wave to generate the on / off control signal Sxp ,S xn By generating this, the switching loss generated by the main circuit unit 100 (FIG. 1) of the three-phase three-level inverter device is reduced while suppressing fluctuations in the neutral point potential in the main circuit unit 100.

[0083] The present invention is not limited to the above-described embodiments and modifications, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to add, delete, or replace part of the configuration of the embodiments with other configurations.

[0084] For example, the zero period φ0 may be a fixed value, or may be changed in accordance with changes in the target value of the controlled variable.

[0085] Furthermore, the neutral point clamp is not limited to one using a diode, but may be one using a semiconductor switching element.

[0086] Furthermore, the semiconductor switching element is not limited to an IGBT, but may be a power MOSFET, in which case the body diode of the MOSFET can be used as the freewheeling diode. [Explanation of symbols]

[0087] 100...Main circuit section 113...Control amount detection unit 113...Control amount detection unit 120...Drive circuit 123, 124, 125...Voltage sensors 126...Current sensor 130...AC side LC filter 200...PWM control device 210...Modulation wave generating unit 211...Control target value generation unit 212…Compensator 213...Voltage command value correction unit 214...Double modulation wave generating unit 215...Zero period setting section 216...Voltage zero cross detector 217...Double modulation wave correction unit 220...PWM pulse signal generation unit 221...Positive carrier wave generator 222...Negative carrier wave generating unit 223,224...Comparator

Claims

1. A control device for a power conversion device that generates a PWM pulse signal to control a neutral point clamped three-phase three-level inverter, a voltage command value corrector that performs zero-phase modulation on a three-phase sinusoidal voltage command to generate a three-phase corrected voltage command; a double modulated wave generating unit that divides each phase of the three-phase corrected voltage command into a positive side modulated wave and a negative side modulated wave; a double modulation wave correction unit that corrects the positive side modulated wave and the negative side modulated wave based on the phase that is the basis of the positive side modulated wave and the negative side modulated wave in the three-phase sinusoidal wave voltage command or the three-phase corrected voltage command, in a predetermined phase range on either side of the zero crossing, near a zero crossing of a phase that is the basis of the positive side modulated wave and the negative side modulated wave, and sets a zero value in the other side of the predetermined phase range, thereby generating a corrected positive side modulated wave and a corrected negative side modulated wave; Equipped with A control device for a power conversion device, characterized in that the PWM pulse signal is generated by comparing the corrected positive side modulated wave and the corrected negative side modulated wave with a positive side carrier wave and a negative side carrier wave, respectively.

2. The control device for a power conversion device according to claim 1, the double modulation wave correction unit performs correction based on positive and negative values ​​of the phases that form the basis of the positive side modulation wave and the negative side modulation wave of the three-phase correction voltage command.

3. The control device for a power conversion device according to claim 1, Further, a voltage zero cross detector is provided to detect the zero cross, the double modulation wave correction unit corrects the positive side modulation wave and the negative side modulation wave when the voltage zero cross detection unit detects the zero cross, to generate the corrected positive side modulation wave and the corrected negative side modulation wave.

4. The control device for a power conversion device according to claim 1, the voltage command value correction unit performs zero-phase modulation on the three-phase sinusoidal wave voltage command by subtracting an average value of a maximum phase and a minimum phase of the three-phase sinusoidal wave voltage command from each phase of the three-phase sinusoidal wave voltage command.

5. 1. A control method for a power conversion device that generates a PWM pulse signal for controlling a neutral point clamped three-phase three-level inverter, comprising: The three-phase sinusoidal voltage command is zero-phase modulated to generate a three-phase corrected voltage command; Dividing each phase of the three-phase corrected voltage command into a positive side modulation wave and a negative side modulation wave, generating a corrected positive side modulated wave and a corrected negative side modulated wave by correcting the positive side modulated wave and the negative side modulated wave based on the phase of the three-phase corrected voltage command that is the basis of the positive side modulated wave and the negative side modulated wave, in the vicinity of a zero crossing of a phase of the three-phase sinusoidal wave voltage command or the three-phase corrected voltage command that is the basis of the positive side modulated wave and the negative side modulated wave, and setting a zero value in the other side of the predetermined phase range; A control method for a power conversion device, comprising: generating the PWM pulse signal by comparing the corrected positive-side modulated wave and the corrected negative-side modulated wave with a positive-side carrier wave and a negative-side carrier wave, respectively.

6. a main circuit section composed of a plurality of semiconductor switching elements; a plurality of drive circuits for driving the plurality of semiconductor switching elements; a PWM control device that generates a PWM pulse signal that serves as an on / off control signal for the drive circuit; In a neutral point clamped three-level inverter comprising:

2. A three-level inverter, wherein the PWM control device is the power conversion device control device according to claim 1.

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